Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 02:47:15.949655 lava-dispatcher, installed at version: 2022.11
2 02:47:15.949838 start: 0 validate
3 02:47:15.949976 Start time: 2023-01-25 02:47:15.949968+00:00 (UTC)
4 02:47:15.950102 Using caching service: 'http://localhost/cache/?uri=%s'
5 02:47:15.950232 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 02:47:16.244931 Using caching service: 'http://localhost/cache/?uri=%s'
7 02:47:16.245802 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 02:47:16.543989 Using caching service: 'http://localhost/cache/?uri=%s'
9 02:47:16.544727 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 02:47:16.834958 Using caching service: 'http://localhost/cache/?uri=%s'
11 02:47:16.835701 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 02:47:17.137973 validate duration: 1.19
14 02:47:17.139360 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 02:47:17.139988 start: 1.1 download-retry (timeout 00:10:00) [common]
16 02:47:17.140523 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 02:47:17.141057 Not decompressing ramdisk as can be used compressed.
18 02:47:17.141592 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/initrd.cpio.gz
19 02:47:17.142048 saving as /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/ramdisk/initrd.cpio.gz
20 02:47:17.142426 total size: 5432102 (5MB)
21 02:47:17.149431 progress 0% (0MB)
22 02:47:17.157732 progress 5% (0MB)
23 02:47:17.164369 progress 10% (0MB)
24 02:47:17.168696 progress 15% (0MB)
25 02:47:17.171640 progress 20% (1MB)
26 02:47:17.172933 progress 25% (1MB)
27 02:47:17.174290 progress 30% (1MB)
28 02:47:17.175761 progress 35% (1MB)
29 02:47:17.177083 progress 40% (2MB)
30 02:47:17.178391 progress 45% (2MB)
31 02:47:17.179701 progress 50% (2MB)
32 02:47:17.181161 progress 55% (2MB)
33 02:47:17.182488 progress 60% (3MB)
34 02:47:17.183785 progress 65% (3MB)
35 02:47:17.185237 progress 70% (3MB)
36 02:47:17.186547 progress 75% (3MB)
37 02:47:17.187845 progress 80% (4MB)
38 02:47:17.189144 progress 85% (4MB)
39 02:47:17.190985 progress 90% (4MB)
40 02:47:17.192972 progress 95% (4MB)
41 02:47:17.195050 progress 100% (5MB)
42 02:47:17.195317 5MB downloaded in 0.05s (97.94MB/s)
43 02:47:17.195476 end: 1.1.1 http-download (duration 00:00:00) [common]
45 02:47:17.195727 end: 1.1 download-retry (duration 00:00:00) [common]
46 02:47:17.195818 start: 1.2 download-retry (timeout 00:10:00) [common]
47 02:47:17.195915 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 02:47:17.196024 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 02:47:17.196096 saving as /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/kernel/bzImage
50 02:47:17.196159 total size: 7569296 (7MB)
51 02:47:17.196219 No compression specified
52 02:47:17.198360 progress 0% (0MB)
53 02:47:17.202175 progress 5% (0MB)
54 02:47:17.205406 progress 10% (0MB)
55 02:47:17.208098 progress 15% (1MB)
56 02:47:17.211677 progress 20% (1MB)
57 02:47:17.214461 progress 25% (1MB)
58 02:47:17.217911 progress 30% (2MB)
59 02:47:17.221030 progress 35% (2MB)
60 02:47:17.224527 progress 40% (2MB)
61 02:47:17.227353 progress 45% (3MB)
62 02:47:17.231144 progress 50% (3MB)
63 02:47:17.234354 progress 55% (4MB)
64 02:47:17.237222 progress 60% (4MB)
65 02:47:17.240565 progress 65% (4MB)
66 02:47:17.244045 progress 70% (5MB)
67 02:47:17.246916 progress 75% (5MB)
68 02:47:17.249987 progress 80% (5MB)
69 02:47:17.253265 progress 85% (6MB)
70 02:47:17.256628 progress 90% (6MB)
71 02:47:17.259741 progress 95% (6MB)
72 02:47:17.262930 progress 100% (7MB)
73 02:47:17.263223 7MB downloaded in 0.07s (107.64MB/s)
74 02:47:17.263376 end: 1.2.1 http-download (duration 00:00:00) [common]
76 02:47:17.263619 end: 1.2 download-retry (duration 00:00:00) [common]
77 02:47:17.263712 start: 1.3 download-retry (timeout 00:10:00) [common]
78 02:47:17.263802 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 02:47:17.263910 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/full.rootfs.tar.xz
80 02:47:17.263978 saving as /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/nfsrootfs/full.rootfs.tar
81 02:47:17.264040 total size: 207188056 (197MB)
82 02:47:17.264103 Using unxz to decompress xz
83 02:47:17.268312 progress 0% (0MB)
84 02:47:17.828318 progress 5% (9MB)
85 02:47:18.366217 progress 10% (19MB)
86 02:47:18.957771 progress 15% (29MB)
87 02:47:19.328097 progress 20% (39MB)
88 02:47:19.683783 progress 25% (49MB)
89 02:47:20.274718 progress 30% (59MB)
90 02:47:20.823620 progress 35% (69MB)
91 02:47:21.418893 progress 40% (79MB)
92 02:47:21.971915 progress 45% (88MB)
93 02:47:22.549883 progress 50% (98MB)
94 02:47:23.170107 progress 55% (108MB)
95 02:47:23.854312 progress 60% (118MB)
96 02:47:24.007747 progress 65% (128MB)
97 02:47:24.160799 progress 70% (138MB)
98 02:47:24.258183 progress 75% (148MB)
99 02:47:24.331132 progress 80% (158MB)
100 02:47:24.401030 progress 85% (167MB)
101 02:47:24.499887 progress 90% (177MB)
102 02:47:24.765332 progress 95% (187MB)
103 02:47:25.351056 progress 100% (197MB)
104 02:47:25.357398 197MB downloaded in 8.09s (24.41MB/s)
105 02:47:25.357703 end: 1.3.1 http-download (duration 00:00:08) [common]
107 02:47:25.357989 end: 1.3 download-retry (duration 00:00:08) [common]
108 02:47:25.358082 start: 1.4 download-retry (timeout 00:09:52) [common]
109 02:47:25.358174 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 02:47:25.358291 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 02:47:25.358364 saving as /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/modules/modules.tar
112 02:47:25.358426 total size: 51848 (0MB)
113 02:47:25.358490 Using unxz to decompress xz
114 02:47:25.363257 progress 63% (0MB)
115 02:47:25.363660 progress 100% (0MB)
116 02:47:25.366891 0MB downloaded in 0.01s (5.85MB/s)
117 02:47:25.367109 end: 1.4.1 http-download (duration 00:00:00) [common]
119 02:47:25.367368 end: 1.4 download-retry (duration 00:00:00) [common]
120 02:47:25.367465 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 02:47:25.367562 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 02:47:27.373230 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8867183/extract-nfsrootfs-y5tqfqzz
123 02:47:27.373441 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 02:47:27.373689 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 02:47:27.373823 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b
126 02:47:27.373920 makedir: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin
127 02:47:27.374001 makedir: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/tests
128 02:47:27.374080 makedir: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/results
129 02:47:27.374174 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-add-keys
130 02:47:27.374301 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-add-sources
131 02:47:27.374419 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-background-process-start
132 02:47:27.374537 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-background-process-stop
133 02:47:27.374651 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-common-functions
134 02:47:27.374764 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-echo-ipv4
135 02:47:27.374878 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-install-packages
136 02:47:27.374992 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-installed-packages
137 02:47:27.375104 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-os-build
138 02:47:27.375217 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-probe-channel
139 02:47:27.375329 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-probe-ip
140 02:47:27.375441 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-target-ip
141 02:47:27.375555 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-target-mac
142 02:47:27.375673 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-target-storage
143 02:47:27.375790 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-case
144 02:47:27.375903 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-event
145 02:47:27.376010 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-feedback
146 02:47:27.376115 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-raise
147 02:47:27.376219 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-reference
148 02:47:27.376324 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-runner
149 02:47:27.376428 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-set
150 02:47:27.376531 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-test-shell
151 02:47:27.376637 Updating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-add-keys (debian)
152 02:47:27.376743 Updating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-add-sources (debian)
153 02:47:27.376849 Updating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-install-packages (debian)
154 02:47:27.376954 Updating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-installed-packages (debian)
155 02:47:27.377059 Updating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/bin/lava-os-build (debian)
156 02:47:27.377150 Creating /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/environment
157 02:47:27.377232 LAVA metadata
158 02:47:27.377295 - LAVA_JOB_ID=8867183
159 02:47:27.377355 - LAVA_DISPATCHER_IP=192.168.201.1
160 02:47:27.377448 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 02:47:27.377535 skipped lava-vland-overlay
162 02:47:27.377620 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 02:47:27.377697 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 02:47:27.377756 skipped lava-multinode-overlay
165 02:47:27.377827 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 02:47:27.377904 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 02:47:27.377972 Loading test definitions
168 02:47:27.378060 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 02:47:27.378127 Using /lava-8867183 at stage 0
170 02:47:27.378346 uuid=8867183_1.5.2.3.1 testdef=None
171 02:47:27.378430 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 02:47:27.378512 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 02:47:27.378908 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 02:47:27.379133 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 02:47:27.379605 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 02:47:27.379839 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 02:47:27.380284 runner path: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/0/tests/0_timesync-off test_uuid 8867183_1.5.2.3.1
180 02:47:27.380423 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 02:47:27.380648 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 02:47:27.380721 Using /lava-8867183 at stage 0
184 02:47:27.380814 Fetching tests from https://github.com/kernelci/test-definitions.git
185 02:47:27.380892 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/0/tests/1_kselftest-futex'
186 02:47:29.937699 Running '/usr/bin/git checkout kernelci.org
187 02:47:30.074287 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 02:47:30.074978 uuid=8867183_1.5.2.3.5 testdef=None
189 02:47:30.075141 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
191 02:47:30.075396 start: 1.5.2.3.6 test-overlay (timeout 00:09:47) [common]
192 02:47:30.076112 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 02:47:30.076358 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:47) [common]
195 02:47:30.077293 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 02:47:30.077552 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
198 02:47:30.078490 runner path: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/0/tests/1_kselftest-futex test_uuid 8867183_1.5.2.3.5
199 02:47:30.078581 BOARD='asus-C436FA-Flip-hatch'
200 02:47:30.078649 BRANCH='cip'
201 02:47:30.078711 SKIPFILE='skipfile-lkft.yaml'
202 02:47:30.078773 SKIP_INSTALL='True'
203 02:47:30.078832 TESTPROG_URL='None'
204 02:47:30.078891 TST_CASENAME=''
205 02:47:30.078948 TST_CMDFILES='futex'
206 02:47:30.079080 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 02:47:30.079295 Creating lava-test-runner.conf files
209 02:47:30.079361 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8867183/lava-overlay-7u67f26b/lava-8867183/0 for stage 0
210 02:47:30.079445 - 0_timesync-off
211 02:47:30.079515 - 1_kselftest-futex
212 02:47:30.079607 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
213 02:47:30.079695 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
214 02:47:37.402363 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
215 02:47:37.402532 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
216 02:47:37.402631 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 02:47:37.402732 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
218 02:47:37.402829 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
219 02:47:37.505626 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 02:47:37.505985 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
221 02:47:37.506104 extracting modules file /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867183/extract-nfsrootfs-y5tqfqzz
222 02:47:37.510173 extracting modules file /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867183/extract-overlay-ramdisk-rjlyrpwi/ramdisk
223 02:47:37.513864 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 02:47:37.513978 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
225 02:47:37.514063 [common] Applying overlay to NFS
226 02:47:37.514136 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8867183/compress-overlay-9q9aszjd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8867183/extract-nfsrootfs-y5tqfqzz
227 02:47:37.974891 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 02:47:37.975083 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
229 02:47:37.975188 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 02:47:37.975286 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
231 02:47:37.975369 Building ramdisk /var/lib/lava/dispatcher/tmp/8867183/extract-overlay-ramdisk-rjlyrpwi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8867183/extract-overlay-ramdisk-rjlyrpwi/ramdisk
232 02:47:38.008748 >> 24548 blocks
233 02:47:38.468707 rename /var/lib/lava/dispatcher/tmp/8867183/extract-overlay-ramdisk-rjlyrpwi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
234 02:47:38.469088 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
235 02:47:38.469209 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
236 02:47:38.469312 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
237 02:47:38.469405 No mkimage arch provided, not using FIT.
238 02:47:38.469516 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 02:47:38.469613 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 02:47:38.469715 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
241 02:47:38.469811 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
242 02:47:38.469889 No LXC device requested
243 02:47:38.469972 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 02:47:38.470063 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
245 02:47:38.470142 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 02:47:38.470217 Checking files for TFTP limit of 4294967296 bytes.
247 02:47:38.470602 end: 1 tftp-deploy (duration 00:00:21) [common]
248 02:47:38.470710 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 02:47:38.470804 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 02:47:38.470934 substitutions:
251 02:47:38.471003 - {DTB}: None
252 02:47:38.471067 - {INITRD}: 8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
253 02:47:38.471128 - {KERNEL}: 8867183/tftp-deploy-wiq8hi8m/kernel/bzImage
254 02:47:38.471187 - {LAVA_MAC}: None
255 02:47:38.471245 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8867183/extract-nfsrootfs-y5tqfqzz
256 02:47:38.471304 - {NFS_SERVER_IP}: 192.168.201.1
257 02:47:38.471361 - {PRESEED_CONFIG}: None
258 02:47:38.471419 - {PRESEED_LOCAL}: None
259 02:47:38.471475 - {RAMDISK}: 8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
260 02:47:38.471531 - {ROOT_PART}: None
261 02:47:38.471586 - {ROOT}: None
262 02:47:38.471643 - {SERVER_IP}: 192.168.201.1
263 02:47:38.471698 - {TEE}: None
264 02:47:38.471754 Parsed boot commands:
265 02:47:38.471808 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 02:47:38.471960 Parsed boot commands: tftpboot 192.168.201.1 8867183/tftp-deploy-wiq8hi8m/kernel/bzImage 8867183/tftp-deploy-wiq8hi8m/kernel/cmdline 8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
267 02:47:38.472051 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 02:47:38.472138 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 02:47:38.472233 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 02:47:38.472333 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 02:47:38.472408 Not connected, no need to disconnect.
272 02:47:38.472486 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 02:47:38.472570 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 02:47:38.472640 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
275 02:47:38.475429 Setting prompt string to ['lava-test: # ']
276 02:47:38.475714 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 02:47:38.475849 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 02:47:38.475945 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 02:47:38.476034 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 02:47:38.476206 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
281 02:47:38.495079 >> Command sent successfully.
282 02:47:38.496958 Returned 0 in 0 seconds
283 02:47:38.598019 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
285 02:47:38.599143 end: 2.2.2 reset-device (duration 00:00:00) [common]
286 02:47:38.599521 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
287 02:47:38.599869 Setting prompt string to 'Starting depthcharge on Helios...'
288 02:47:38.600140 Changing prompt to 'Starting depthcharge on Helios...'
289 02:47:38.600411 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 02:47:38.601400 [Enter `^Ec?' for help]
291 02:47:44.971984
292 02:47:44.972662
293 02:47:44.982261 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 02:47:44.985390 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 02:47:44.992394 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 02:47:44.995476 CPU: AES supported, TXT NOT supported, VT supported
297 02:47:45.002485 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 02:47:45.005471 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 02:47:45.012344 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 02:47:45.015390 VBOOT: Loading verstage.
301 02:47:45.018622 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 02:47:45.025608 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 02:47:45.028808 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 02:47:45.032104 CBFS @ c08000 size 3f8000
305 02:47:45.039049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 02:47:45.042194 CBFS: Locating 'fallback/verstage'
307 02:47:45.045946 CBFS: Found @ offset 10fb80 size 1072c
308 02:47:45.049632
309 02:47:45.050235
310 02:47:45.058727 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 02:47:45.073389 Probing TPM: . done!
312 02:47:45.076461 TPM ready after 0 ms
313 02:47:45.079362 Connected to device vid:did:rid of 1ae0:0028:00
314 02:47:45.090769 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 02:47:45.093918 Initialized TPM device CR50 revision 0
316 02:47:45.136838 tlcl_send_startup: Startup return code is 0
317 02:47:45.137405 TPM: setup succeeded
318 02:47:45.149474 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 02:47:45.153564 Chrome EC: UHEPI supported
320 02:47:45.157031 Phase 1
321 02:47:45.160305 FMAP: area GBB found @ c05000 (12288 bytes)
322 02:47:45.166759 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 02:47:45.167345 Phase 2
324 02:47:45.170231
325 02:47:45.170832 Phase 3
326 02:47:45.173163 FMAP: area GBB found @ c05000 (12288 bytes)
327 02:47:45.179756 VB2:vb2_report_dev_firmware() This is developer signed firmware
328 02:47:45.186996 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 02:47:45.189848 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 02:47:45.196274 VB2:vb2_verify_keyblock() Checking keyblock signature...
331 02:47:45.212539 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 02:47:45.215510 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
333 02:47:45.222289 VB2:vb2_verify_fw_preamble() Verifying preamble.
334 02:47:45.226402 Phase 4
335 02:47:45.229821 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
336 02:47:45.236038 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
337 02:47:45.415939 VB2:vb2_rsa_verify_digest() Digest check failed!
338 02:47:45.419152 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
339 02:47:45.422403
340 02:47:45.423007 Saving nvdata
341 02:47:45.426031 Reboot requested (10020007)
342 02:47:45.429286 board_reset() called!
343 02:47:45.429906 full_reset() called!
344 02:47:49.939980
345 02:47:49.940574
346 02:47:49.949063 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
347 02:47:49.952396 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
348 02:47:49.959399 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
349 02:47:49.962348 CPU: AES supported, TXT NOT supported, VT supported
350 02:47:49.968991 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
351 02:47:49.972743 PCH: device id 0284 (rev 00) is Cometlake-U Premium
352 02:47:49.978767 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
353 02:47:49.982240 VBOOT: Loading verstage.
354 02:47:49.985621 FMAP: Found "FLASH" version 1.1 at 0xc04000.
355 02:47:49.992256 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
356 02:47:49.998972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
357 02:47:49.999530 CBFS @ c08000 size 3f8000
358 02:47:50.005550 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
359 02:47:50.009358 CBFS: Locating 'fallback/verstage'
360 02:47:50.012262 CBFS: Found @ offset 10fb80 size 1072c
361 02:47:50.016559
362 02:47:50.017144
363 02:47:50.025986 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
364 02:47:50.040450 Probing TPM: . done!
365 02:47:50.044126 TPM ready after 0 ms
366 02:47:50.047504 Connected to device vid:did:rid of 1ae0:0028:00
367 02:47:50.057330 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
368 02:47:50.060658 Initialized TPM device CR50 revision 0
369 02:47:50.104155 tlcl_send_startup: Startup return code is 0
370 02:47:50.104754 TPM: setup succeeded
371 02:47:50.117197 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
372 02:47:50.121261 Chrome EC: UHEPI supported
373 02:47:50.124506 Phase 1
374 02:47:50.127466 FMAP: area GBB found @ c05000 (12288 bytes)
375 02:47:50.134149 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
376 02:47:50.141028 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
377 02:47:50.144542 Recovery requested (1009000e)
378 02:47:50.145160 Saving nvdata
379 02:47:50.149889
380 02:47:50.156203 tlcl_extend: response is 0
381 02:47:50.164984 tlcl_extend: response is 0
382 02:47:50.172111 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
383 02:47:50.175227 CBFS @ c08000 size 3f8000
384 02:47:50.182113 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
385 02:47:50.185240 CBFS: Locating 'fallback/romstage'
386 02:47:50.188667 CBFS: Found @ offset 80 size 145fc
387 02:47:50.191598 Accumulated console time in verstage 98 ms
388 02:47:50.192176
389 02:47:50.192560
390 02:47:50.205448 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
391 02:47:50.211350 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
392 02:47:50.214611 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
393 02:47:50.218340 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
394 02:47:50.225089 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
395 02:47:50.228037 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
396 02:47:50.231332 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
397 02:47:50.234823 TCO_STS: 0000 0000
398 02:47:50.238062 GEN_PMCON: e0015238 00000200
399 02:47:50.241454 GBLRST_CAUSE: 00000000 00000000
400 02:47:50.242118 prev_sleep_state 5
401 02:47:50.245321 Boot Count incremented to 52513
402 02:47:50.252233 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 02:47:50.254803 CBFS @ c08000 size 3f8000
404 02:47:50.261565 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 02:47:50.262160 CBFS: Locating 'fspm.bin'
406 02:47:50.268650 CBFS: Found @ offset 5ffc0 size 71000
407 02:47:50.271091 Chrome EC: UHEPI supported
408 02:47:50.277707 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
409 02:47:50.281568 Probing TPM: done!
410 02:47:50.288443 Connected to device vid:did:rid of 1ae0:0028:00
411 02:47:50.298075 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
412 02:47:50.304051 Initialized TPM device CR50 revision 0
413 02:47:50.313161 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 02:47:50.320126 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
415 02:47:50.323231 MRC cache found, size 1948
416 02:47:50.326223 bootmode is set to: 2
417 02:47:50.330334 PRMRR disabled by config.
418 02:47:50.330910 SPD INDEX = 1
419 02:47:50.336371 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
420 02:47:50.340015 CBFS @ c08000 size 3f8000
421 02:47:50.346408 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
422 02:47:50.346992 CBFS: Locating 'spd.bin'
423 02:47:50.349985 CBFS: Found @ offset 5fb80 size 400
424 02:47:50.352849 SPD: module type is LPDDR3
425 02:47:50.356692 SPD: module part is
426 02:47:50.362621 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
427 02:47:50.366143 SPD: device width 4 bits, bus width 8 bits
428 02:47:50.369302 SPD: module size is 4096 MB (per channel)
429 02:47:50.372846 memory slot: 0 configuration done.
430 02:47:50.376003 memory slot: 2 configuration done.
431 02:47:50.427536 CBMEM:
432 02:47:50.430601 IMD: root @ 99fff000 254 entries.
433 02:47:50.434330 IMD: root @ 99ffec00 62 entries.
434 02:47:50.437323 External stage cache:
435 02:47:50.440432 IMD: root @ 9abff000 254 entries.
436 02:47:50.443950 IMD: root @ 9abfec00 62 entries.
437 02:47:50.447281 Chrome EC: clear events_b mask to 0x0000000020004000
438 02:47:50.450554
439 02:47:50.462969 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 02:47:50.476958 tlcl_write: response is 0
441 02:47:50.485676 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 02:47:50.492282 MRC: TPM MRC hash updated successfully.
443 02:47:50.492861 2 DIMMs found
444 02:47:50.495759 SMM Memory Map
445 02:47:50.498606 SMRAM : 0x9a000000 0x1000000
446 02:47:50.502017 Subregion 0: 0x9a000000 0xa00000
447 02:47:50.505634 Subregion 1: 0x9aa00000 0x200000
448 02:47:50.509115 Subregion 2: 0x9ac00000 0x400000
449 02:47:50.512432 top_of_ram = 0x9a000000
450 02:47:50.515407 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
451 02:47:50.522075 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
452 02:47:50.525132 MTRR Range: Start=ff000000 End=0 (Size 1000000)
453 02:47:50.532094 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 02:47:50.535244 CBFS @ c08000 size 3f8000
455 02:47:50.538708 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 02:47:50.541721 CBFS: Locating 'fallback/postcar'
457 02:47:50.548869 CBFS: Found @ offset 107000 size 4b44
458 02:47:50.551959 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
459 02:47:50.564300 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
460 02:47:50.567702 Processing 180 relocs. Offset value of 0x97c0c000
461 02:47:50.576430 Accumulated console time in romstage 286 ms
462 02:47:50.577004
463 02:47:50.577389
464 02:47:50.586242 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
465 02:47:50.593051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 02:47:50.596404 CBFS @ c08000 size 3f8000
467 02:47:50.599201 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 02:47:50.605847 CBFS: Locating 'fallback/ramstage'
469 02:47:50.609535 CBFS: Found @ offset 43380 size 1b9e8
470 02:47:50.616009 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
471 02:47:50.648215 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
472 02:47:50.651494 Processing 3976 relocs. Offset value of 0x98db0000
473 02:47:50.658015 Accumulated console time in postcar 52 ms
474 02:47:50.658588
475 02:47:50.658978
476 02:47:50.667690 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
477 02:47:50.674866 FMAP: area RO_VPD found @ c00000 (16384 bytes)
478 02:47:50.677762 WARNING: RO_VPD is uninitialized or empty.
479 02:47:50.680855 FMAP: area RW_VPD found @ af8000 (8192 bytes)
480 02:47:50.687969 FMAP: area RW_VPD found @ af8000 (8192 bytes)
481 02:47:50.688547 Normal boot.
482 02:47:50.694699 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
483 02:47:50.697752 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
484 02:47:50.700888 CBFS @ c08000 size 3f8000
485 02:47:50.707391 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
486 02:47:50.710952 CBFS: Locating 'cpu_microcode_blob.bin'
487 02:47:50.714613 CBFS: Found @ offset 14700 size 2ec00
488 02:47:50.717755 microcode: sig=0x806ec pf=0x4 revision=0xc9
489 02:47:50.720590 Skip microcode update
490 02:47:50.727793 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
491 02:47:50.728379 CBFS @ c08000 size 3f8000
492 02:47:50.734137 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
493 02:47:50.737148 CBFS: Locating 'fsps.bin'
494 02:47:50.740868 CBFS: Found @ offset d1fc0 size 35000
495 02:47:50.766132 Detected 4 core, 8 thread CPU.
496 02:47:50.769564 Setting up SMI for CPU
497 02:47:50.773085 IED base = 0x9ac00000
498 02:47:50.773692 IED size = 0x00400000
499 02:47:50.776180 Will perform SMM setup.
500 02:47:50.782874 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
501 02:47:50.789645 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
502 02:47:50.792786 Processing 16 relocs. Offset value of 0x00030000
503 02:47:50.796662 Attempting to start 7 APs
504 02:47:50.799890 Waiting for 10ms after sending INIT.
505 02:47:50.815994 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
506 02:47:50.816568 done.
507 02:47:50.819647 AP: slot 2 apic_id 6.
508 02:47:50.823393 AP: slot 5 apic_id 7.
509 02:47:50.825932 Waiting for 2nd SIPI to complete...done.
510 02:47:50.829746 AP: slot 6 apic_id 3.
511 02:47:50.830333 AP: slot 7 apic_id 2.
512 02:47:50.832684 AP: slot 4 apic_id 5.
513 02:47:50.835842 AP: slot 1 apic_id 4.
514 02:47:50.842535 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
515 02:47:50.849242 Processing 13 relocs. Offset value of 0x00038000
516 02:47:50.852307 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
517 02:47:50.855737
518 02:47:50.859299 Installing SMM handler to 0x9a000000
519 02:47:50.865511 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
520 02:47:50.869044 Processing 658 relocs. Offset value of 0x9a010000
521 02:47:50.872061
522 02:47:50.878771 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 02:47:50.882734 Processing 13 relocs. Offset value of 0x9a008000
524 02:47:50.889432 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 02:47:50.895732 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 02:47:50.898981 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 02:47:50.902652
528 02:47:50.905171 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
529 02:47:50.912025 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
530 02:47:50.919421 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
531 02:47:50.921847 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
532 02:47:50.928662 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
533 02:47:50.932619 Clearing SMI status registers
534 02:47:50.935776 SMI_STS: PM1
535 02:47:50.936361 PM1_STS: PWRBTN
536 02:47:50.939171 TCO_STS: SECOND_TO
537 02:47:50.942329 New SMBASE 0x9a000000
538 02:47:50.945983 In relocation handler: CPU 0
539 02:47:50.948749 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
540 02:47:50.952482 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 02:47:50.955488 Relocation complete.
542 02:47:50.958963 New SMBASE 0x99fff400
543 02:47:50.961994 In relocation handler: CPU 3
544 02:47:50.965311 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
545 02:47:50.968673 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 02:47:50.972154 Relocation complete.
547 02:47:50.975286 New SMBASE 0x99ffec00
548 02:47:50.975769 In relocation handler: CPU 5
549 02:47:50.981658 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 02:47:50.985588 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 02:47:50.988608 Relocation complete.
552 02:47:50.991892 New SMBASE 0x99fff800
553 02:47:50.992486 In relocation handler: CPU 2
554 02:47:50.998783 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
555 02:47:51.001660 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 02:47:51.005356 Relocation complete.
557 02:47:51.005877 New SMBASE 0x99ffe400
558 02:47:51.008614 In relocation handler: CPU 7
559 02:47:51.015439 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 02:47:51.018251 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 02:47:51.021620 Relocation complete.
562 02:47:51.022199 New SMBASE 0x99ffe800
563 02:47:51.025201 In relocation handler: CPU 6
564 02:47:51.031495 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
565 02:47:51.034621 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 02:47:51.038293 Relocation complete.
567 02:47:51.038873 New SMBASE 0x99fff000
568 02:47:51.041586 In relocation handler: CPU 4
569 02:47:51.044838 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
570 02:47:51.051365 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 02:47:51.055182 Relocation complete.
572 02:47:51.055774 New SMBASE 0x99fffc00
573 02:47:51.058197 In relocation handler: CPU 1
574 02:47:51.061401 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
575 02:47:51.068055 Writing SMRR. base = 0x9a000006, mask=0xff000800
576 02:47:51.071527 Relocation complete.
577 02:47:51.072103 Initializing CPU #0
578 02:47:51.075324 CPU: vendor Intel device 806ec
579 02:47:51.077688 CPU: family 06, model 8e, stepping 0c
580 02:47:51.081210 Clearing out pending MCEs
581 02:47:51.084293 Setting up local APIC...
582 02:47:51.084769 apic_id: 0x00 done.
583 02:47:51.087779
584 02:47:51.088306 Turbo is available but hidden
585 02:47:51.091718 Turbo is available and visible
586 02:47:51.094668 VMX status: enabled
587 02:47:51.097930 IA32_FEATURE_CONTROL status: locked
588 02:47:51.101304 Skip microcode update
589 02:47:51.101822 CPU #0 initialized
590 02:47:51.104337 Initializing CPU #3
591 02:47:51.108125 Initializing CPU #7
592 02:47:51.111039 CPU: vendor Intel device 806ec
593 02:47:51.114736 CPU: family 06, model 8e, stepping 0c
594 02:47:51.115322 Clearing out pending MCEs
595 02:47:51.117512
596 02:47:51.118008 Initializing CPU #6
597 02:47:51.121304 CPU: vendor Intel device 806ec
598 02:47:51.124868 CPU: family 06, model 8e, stepping 0c
599 02:47:51.128058 CPU: vendor Intel device 806ec
600 02:47:51.130852 CPU: family 06, model 8e, stepping 0c
601 02:47:51.134340 Clearing out pending MCEs
602 02:47:51.137915 Clearing out pending MCEs
603 02:47:51.141466 Setting up local APIC...
604 02:47:51.142079 Initializing CPU #5
605 02:47:51.144920 Initializing CPU #2
606 02:47:51.147762 CPU: vendor Intel device 806ec
607 02:47:51.151287 CPU: family 06, model 8e, stepping 0c
608 02:47:51.154315 apic_id: 0x02 done.
609 02:47:51.154898 Setting up local APIC...
610 02:47:51.157849 Initializing CPU #4
611 02:47:51.160800 apic_id: 0x03 done.
612 02:47:51.161280 VMX status: enabled
613 02:47:51.164452 VMX status: enabled
614 02:47:51.167442 IA32_FEATURE_CONTROL status: locked
615 02:47:51.170810 IA32_FEATURE_CONTROL status: locked
616 02:47:51.174715 Skip microcode update
617 02:47:51.175296 Skip microcode update
618 02:47:51.177410 CPU #7 initialized
619 02:47:51.180650 CPU #6 initialized
620 02:47:51.181126 CPU: vendor Intel device 806ec
621 02:47:51.184075
622 02:47:51.187389 CPU: family 06, model 8e, stepping 0c
623 02:47:51.187876 Initializing CPU #1
624 02:47:51.190692 Clearing out pending MCEs
625 02:47:51.194112 Setting up local APIC...
626 02:47:51.197448 CPU: vendor Intel device 806ec
627 02:47:51.201376 CPU: family 06, model 8e, stepping 0c
628 02:47:51.203840 Clearing out pending MCEs
629 02:47:51.204325 Clearing out pending MCEs
630 02:47:51.207311
631 02:47:51.207790 Setting up local APIC...
632 02:47:51.210442 CPU: vendor Intel device 806ec
633 02:47:51.214432 CPU: family 06, model 8e, stepping 0c
634 02:47:51.217131 Clearing out pending MCEs
635 02:47:51.221002 Setting up local APIC...
636 02:47:51.223714 apic_id: 0x01 done.
637 02:47:51.224289 Setting up local APIC...
638 02:47:51.227250 apic_id: 0x07 done.
639 02:47:51.230228 Setting up local APIC...
640 02:47:51.230806 apic_id: 0x04 done.
641 02:47:51.233763 apic_id: 0x05 done.
642 02:47:51.236973 VMX status: enabled
643 02:47:51.237590 VMX status: enabled
644 02:47:51.240554 IA32_FEATURE_CONTROL status: locked
645 02:47:51.243675 IA32_FEATURE_CONTROL status: locked
646 02:47:51.246914 Skip microcode update
647 02:47:51.250327 Skip microcode update
648 02:47:51.250901 CPU #1 initialized
649 02:47:51.253993 CPU #4 initialized
650 02:47:51.257013 VMX status: enabled
651 02:47:51.257628 VMX status: enabled
652 02:47:51.260629 apic_id: 0x06 done.
653 02:47:51.263351 IA32_FEATURE_CONTROL status: locked
654 02:47:51.267068 VMX status: enabled
655 02:47:51.270173 IA32_FEATURE_CONTROL status: locked
656 02:47:51.273613 IA32_FEATURE_CONTROL status: locked
657 02:47:51.274185 Skip microcode update
658 02:47:51.276486 Skip microcode update
659 02:47:51.280309 CPU #5 initialized
660 02:47:51.280888 CPU #2 initialized
661 02:47:51.283100 Skip microcode update
662 02:47:51.286647 CPU #3 initialized
663 02:47:51.290292 bsp_do_flight_plan done after 462 msecs.
664 02:47:51.293337 CPU: frequency set to 4200 MHz
665 02:47:51.293861 Enabling SMIs.
666 02:47:51.296607 Locking SMM.
667 02:47:51.310308 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
668 02:47:51.313815 CBFS @ c08000 size 3f8000
669 02:47:51.320178 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
670 02:47:51.320772 CBFS: Locating 'vbt.bin'
671 02:47:51.323700 CBFS: Found @ offset 5f5c0 size 499
672 02:47:51.330375 Found a VBT of 4608 bytes after decompression
673 02:47:51.515715 Display FSP Version Info HOB
674 02:47:51.519014 Reference Code - CPU = 9.0.1e.30
675 02:47:51.522226 uCode Version = 0.0.0.ca
676 02:47:51.525698 TXT ACM version = ff.ff.ff.ffff
677 02:47:51.528559 Display FSP Version Info HOB
678 02:47:51.532816 Reference Code - ME = 9.0.1e.30
679 02:47:51.535601 MEBx version = 0.0.0.0
680 02:47:51.538913 ME Firmware Version = Consumer SKU
681 02:47:51.542102 Display FSP Version Info HOB
682 02:47:51.546099 Reference Code - CML PCH = 9.0.1e.30
683 02:47:51.546671 PCH-CRID Status = Disabled
684 02:47:51.549253
685 02:47:51.552976 PCH-CRID Original Value = ff.ff.ff.ffff
686 02:47:51.555696 PCH-CRID New Value = ff.ff.ff.ffff
687 02:47:51.559074 OPROM - RST - RAID = ff.ff.ff.ffff
688 02:47:51.562038 ChipsetInit Base Version = ff.ff.ff.ffff
689 02:47:51.565881 ChipsetInit Oem Version = ff.ff.ff.ffff
690 02:47:51.568529 Display FSP Version Info HOB
691 02:47:51.571879 Reference Code - SA - System Agent = 9.0.1e.30
692 02:47:51.575855
693 02:47:51.576430 Reference Code - MRC = 0.7.1.6c
694 02:47:51.578538 SA - PCIe Version = 9.0.1e.30
695 02:47:51.582723 SA-CRID Status = Disabled
696 02:47:51.585944 SA-CRID Original Value = 0.0.0.c
697 02:47:51.589700 SA-CRID New Value = 0.0.0.c
698 02:47:51.592644 OPROM - VBIOS = ff.ff.ff.ffff
699 02:47:51.593223 RTC Init
700 02:47:51.596015 Set power on after power failure.
701 02:47:51.599571
702 02:47:51.600151 Disabling Deep S3
703 02:47:51.602740 Disabling Deep S3
704 02:47:51.603220 Disabling Deep S4
705 02:47:51.605302 Disabling Deep S4
706 02:47:51.605824 Disabling Deep S5
707 02:47:51.608678 Disabling Deep S5
708 02:47:51.615619 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
709 02:47:51.616207 Enumerating buses...
710 02:47:51.622105 Show all devs... Before device enumeration.
711 02:47:51.622586 Root Device: enabled 1
712 02:47:51.625942 CPU_CLUSTER: 0: enabled 1
713 02:47:51.628784 DOMAIN: 0000: enabled 1
714 02:47:51.629368 APIC: 00: enabled 1
715 02:47:51.631930 PCI: 00:00.0: enabled 1
716 02:47:51.635480 PCI: 00:02.0: enabled 1
717 02:47:51.639153 PCI: 00:04.0: enabled 0
718 02:47:51.639732 PCI: 00:05.0: enabled 0
719 02:47:51.641662 PCI: 00:12.0: enabled 1
720 02:47:51.645631 PCI: 00:12.5: enabled 0
721 02:47:51.648296 PCI: 00:12.6: enabled 0
722 02:47:51.648775 PCI: 00:14.0: enabled 1
723 02:47:51.652348 PCI: 00:14.1: enabled 0
724 02:47:51.654906 PCI: 00:14.3: enabled 1
725 02:47:51.658399 PCI: 00:14.5: enabled 0
726 02:47:51.658977 PCI: 00:15.0: enabled 1
727 02:47:51.661781 PCI: 00:15.1: enabled 1
728 02:47:51.665340 PCI: 00:15.2: enabled 0
729 02:47:51.665961 PCI: 00:15.3: enabled 0
730 02:47:51.668322
731 02:47:51.668869 PCI: 00:16.0: enabled 1
732 02:47:51.671519 PCI: 00:16.1: enabled 0
733 02:47:51.675513 PCI: 00:16.2: enabled 0
734 02:47:51.676092 PCI: 00:16.3: enabled 0
735 02:47:51.678377 PCI: 00:16.4: enabled 0
736 02:47:51.681673 PCI: 00:16.5: enabled 0
737 02:47:51.685418 PCI: 00:17.0: enabled 1
738 02:47:51.686040 PCI: 00:19.0: enabled 1
739 02:47:51.689040 PCI: 00:19.1: enabled 0
740 02:47:51.692154 PCI: 00:19.2: enabled 0
741 02:47:51.694920 PCI: 00:1a.0: enabled 0
742 02:47:51.695403 PCI: 00:1c.0: enabled 0
743 02:47:51.698336 PCI: 00:1c.1: enabled 0
744 02:47:51.701623 PCI: 00:1c.2: enabled 0
745 02:47:51.704338 PCI: 00:1c.3: enabled 0
746 02:47:51.704820 PCI: 00:1c.4: enabled 0
747 02:47:51.707895 PCI: 00:1c.5: enabled 0
748 02:47:51.711210 PCI: 00:1c.6: enabled 0
749 02:47:51.711694 PCI: 00:1c.7: enabled 0
750 02:47:51.714258 PCI: 00:1d.0: enabled 1
751 02:47:51.718071 PCI: 00:1d.1: enabled 0
752 02:47:51.721711 PCI: 00:1d.2: enabled 0
753 02:47:51.722310 PCI: 00:1d.3: enabled 0
754 02:47:51.724611 PCI: 00:1d.4: enabled 0
755 02:47:51.728024 PCI: 00:1d.5: enabled 1
756 02:47:51.731535 PCI: 00:1e.0: enabled 1
757 02:47:51.732114 PCI: 00:1e.1: enabled 0
758 02:47:51.734313 PCI: 00:1e.2: enabled 1
759 02:47:51.737768 PCI: 00:1e.3: enabled 1
760 02:47:51.741438 PCI: 00:1f.0: enabled 1
761 02:47:51.742042 PCI: 00:1f.1: enabled 1
762 02:47:51.744689 PCI: 00:1f.2: enabled 1
763 02:47:51.748232 PCI: 00:1f.3: enabled 1
764 02:47:51.748815 PCI: 00:1f.4: enabled 1
765 02:47:51.750853
766 02:47:51.751326 PCI: 00:1f.5: enabled 1
767 02:47:51.754789 PCI: 00:1f.6: enabled 0
768 02:47:51.757712 USB0 port 0: enabled 1
769 02:47:51.758187 I2C: 00:15: enabled 1
770 02:47:51.761133 I2C: 00:5d: enabled 1
771 02:47:51.764571 GENERIC: 0.0: enabled 1
772 02:47:51.765147 I2C: 00:1a: enabled 1
773 02:47:51.767562 I2C: 00:38: enabled 1
774 02:47:51.770743 I2C: 00:39: enabled 1
775 02:47:51.771227 I2C: 00:3a: enabled 1
776 02:47:51.773910 I2C: 00:3b: enabled 1
777 02:47:51.777923 PCI: 00:00.0: enabled 1
778 02:47:51.778535 SPI: 00: enabled 1
779 02:47:51.780969 SPI: 01: enabled 1
780 02:47:51.784007 PNP: 0c09.0: enabled 1
781 02:47:51.784490 USB2 port 0: enabled 1
782 02:47:51.787980 USB2 port 1: enabled 1
783 02:47:51.790875 USB2 port 2: enabled 0
784 02:47:51.793927 USB2 port 3: enabled 0
785 02:47:51.794412 USB2 port 5: enabled 0
786 02:47:51.797913 USB2 port 6: enabled 1
787 02:47:51.801601 USB2 port 9: enabled 1
788 02:47:51.802189 USB3 port 0: enabled 1
789 02:47:51.804182 USB3 port 1: enabled 1
790 02:47:51.807562 USB3 port 2: enabled 1
791 02:47:51.808046 USB3 port 3: enabled 1
792 02:47:51.810839 USB3 port 4: enabled 0
793 02:47:51.814323 APIC: 04: enabled 1
794 02:47:51.815034 APIC: 06: enabled 1
795 02:47:51.817325 APIC: 01: enabled 1
796 02:47:51.820484 APIC: 05: enabled 1
797 02:47:51.821010 APIC: 07: enabled 1
798 02:47:51.824452 APIC: 03: enabled 1
799 02:47:51.825038 APIC: 02: enabled 1
800 02:47:51.827080
801 02:47:51.827564 Compare with tree...
802 02:47:51.830712 Root Device: enabled 1
803 02:47:51.834448 CPU_CLUSTER: 0: enabled 1
804 02:47:51.835037 APIC: 00: enabled 1
805 02:47:51.837049 APIC: 04: enabled 1
806 02:47:51.840438 APIC: 06: enabled 1
807 02:47:51.840923 APIC: 01: enabled 1
808 02:47:51.843918 APIC: 05: enabled 1
809 02:47:51.847127 APIC: 07: enabled 1
810 02:47:51.847613 APIC: 03: enabled 1
811 02:47:51.850450 APIC: 02: enabled 1
812 02:47:51.854251 DOMAIN: 0000: enabled 1
813 02:47:51.857634 PCI: 00:00.0: enabled 1
814 02:47:51.858222 PCI: 00:02.0: enabled 1
815 02:47:51.860700 PCI: 00:04.0: enabled 0
816 02:47:51.864112 PCI: 00:05.0: enabled 0
817 02:47:51.867220 PCI: 00:12.0: enabled 1
818 02:47:51.870463 PCI: 00:12.5: enabled 0
819 02:47:51.870963 PCI: 00:12.6: enabled 0
820 02:47:51.873748 PCI: 00:14.0: enabled 1
821 02:47:51.877072 USB0 port 0: enabled 1
822 02:47:51.880512 USB2 port 0: enabled 1
823 02:47:51.883380 USB2 port 1: enabled 1
824 02:47:51.883863 USB2 port 2: enabled 0
825 02:47:51.887146 USB2 port 3: enabled 0
826 02:47:51.890479 USB2 port 5: enabled 0
827 02:47:51.893924 USB2 port 6: enabled 1
828 02:47:51.896970 USB2 port 9: enabled 1
829 02:47:51.899978 USB3 port 0: enabled 1
830 02:47:51.900461 USB3 port 1: enabled 1
831 02:47:51.903542 USB3 port 2: enabled 1
832 02:47:51.906776 USB3 port 3: enabled 1
833 02:47:51.910197 USB3 port 4: enabled 0
834 02:47:51.913683 PCI: 00:14.1: enabled 0
835 02:47:51.914300 PCI: 00:14.3: enabled 1
836 02:47:51.916958 PCI: 00:14.5: enabled 0
837 02:47:51.920261 PCI: 00:15.0: enabled 1
838 02:47:51.923696 I2C: 00:15: enabled 1
839 02:47:51.926775 PCI: 00:15.1: enabled 1
840 02:47:51.927355 I2C: 00:5d: enabled 1
841 02:47:51.930168 GENERIC: 0.0: enabled 1
842 02:47:51.933564 PCI: 00:15.2: enabled 0
843 02:47:51.937165 PCI: 00:15.3: enabled 0
844 02:47:51.940190 PCI: 00:16.0: enabled 1
845 02:47:51.940673 PCI: 00:16.1: enabled 0
846 02:47:51.943117 PCI: 00:16.2: enabled 0
847 02:47:51.946315 PCI: 00:16.3: enabled 0
848 02:47:51.950092 PCI: 00:16.4: enabled 0
849 02:47:51.950688 PCI: 00:16.5: enabled 0
850 02:47:51.953088
851 02:47:51.953601 PCI: 00:17.0: enabled 1
852 02:47:51.956257 PCI: 00:19.0: enabled 1
853 02:47:51.959960 I2C: 00:1a: enabled 1
854 02:47:51.963828 I2C: 00:38: enabled 1
855 02:47:51.964408 I2C: 00:39: enabled 1
856 02:47:51.966648 I2C: 00:3a: enabled 1
857 02:47:51.970251 I2C: 00:3b: enabled 1
858 02:47:51.973292 PCI: 00:19.1: enabled 0
859 02:47:51.973894 PCI: 00:19.2: enabled 0
860 02:47:51.976406 PCI: 00:1a.0: enabled 0
861 02:47:51.980331 PCI: 00:1c.0: enabled 0
862 02:47:51.983077 PCI: 00:1c.1: enabled 0
863 02:47:51.986847 PCI: 00:1c.2: enabled 0
864 02:47:51.987446 PCI: 00:1c.3: enabled 0
865 02:47:51.990026 PCI: 00:1c.4: enabled 0
866 02:47:51.993357 PCI: 00:1c.5: enabled 0
867 02:47:51.996625 PCI: 00:1c.6: enabled 0
868 02:47:52.000178 PCI: 00:1c.7: enabled 0
869 02:47:52.000761 PCI: 00:1d.0: enabled 1
870 02:47:52.002742 PCI: 00:1d.1: enabled 0
871 02:47:52.006627 PCI: 00:1d.2: enabled 0
872 02:47:52.009789 PCI: 00:1d.3: enabled 0
873 02:47:52.013277 PCI: 00:1d.4: enabled 0
874 02:47:52.013932 PCI: 00:1d.5: enabled 1
875 02:47:52.016845 PCI: 00:00.0: enabled 1
876 02:47:52.019640 PCI: 00:1e.0: enabled 1
877 02:47:52.023681 PCI: 00:1e.1: enabled 0
878 02:47:52.026348 PCI: 00:1e.2: enabled 1
879 02:47:52.027006 SPI: 00: enabled 1
880 02:47:52.029936 PCI: 00:1e.3: enabled 1
881 02:47:52.032685 SPI: 01: enabled 1
882 02:47:52.033165 PCI: 00:1f.0: enabled 1
883 02:47:52.036656 PNP: 0c09.0: enabled 1
884 02:47:52.039539 PCI: 00:1f.1: enabled 1
885 02:47:52.042839 PCI: 00:1f.2: enabled 1
886 02:47:52.046299 PCI: 00:1f.3: enabled 1
887 02:47:52.046900 PCI: 00:1f.4: enabled 1
888 02:47:52.049413 PCI: 00:1f.5: enabled 1
889 02:47:52.052811 PCI: 00:1f.6: enabled 0
890 02:47:52.056380 Root Device scanning...
891 02:47:52.059494 scan_static_bus for Root Device
892 02:47:52.062695 CPU_CLUSTER: 0 enabled
893 02:47:52.063266 DOMAIN: 0000 enabled
894 02:47:52.066124 DOMAIN: 0000 scanning...
895 02:47:52.069539 PCI: pci_scan_bus for bus 00
896 02:47:52.072695 PCI: 00:00.0 [8086/0000] ops
897 02:47:52.076229 PCI: 00:00.0 [8086/9b61] enabled
898 02:47:52.079216 PCI: 00:02.0 [8086/0000] bus ops
899 02:47:52.082660 PCI: 00:02.0 [8086/9b41] enabled
900 02:47:52.086243 PCI: 00:04.0 [8086/1903] disabled
901 02:47:52.089548 PCI: 00:08.0 [8086/1911] enabled
902 02:47:52.094175 PCI: 00:12.0 [8086/02f9] enabled
903 02:47:52.095987 PCI: 00:14.0 [8086/0000] bus ops
904 02:47:52.099277 PCI: 00:14.0 [8086/02ed] enabled
905 02:47:52.102837 PCI: 00:14.2 [8086/02ef] enabled
906 02:47:52.106174 PCI: 00:14.3 [8086/02f0] enabled
907 02:47:52.109046 PCI: 00:15.0 [8086/0000] bus ops
908 02:47:52.112409 PCI: 00:15.0 [8086/02e8] enabled
909 02:47:52.115987 PCI: 00:15.1 [8086/0000] bus ops
910 02:47:52.119517 PCI: 00:15.1 [8086/02e9] enabled
911 02:47:52.122239 PCI: 00:16.0 [8086/0000] ops
912 02:47:52.125517 PCI: 00:16.0 [8086/02e0] enabled
913 02:47:52.129254 PCI: 00:17.0 [8086/0000] ops
914 02:47:52.132661 PCI: 00:17.0 [8086/02d3] enabled
915 02:47:52.135516 PCI: 00:19.0 [8086/0000] bus ops
916 02:47:52.138858 PCI: 00:19.0 [8086/02c5] enabled
917 02:47:52.142383 PCI: 00:1d.0 [8086/0000] bus ops
918 02:47:52.145773 PCI: 00:1d.0 [8086/02b0] enabled
919 02:47:52.149113 PCI: Static device PCI: 00:1d.5 not found, disabling it.
920 02:47:52.152328 PCI: 00:1e.0 [8086/0000] ops
921 02:47:52.155949 PCI: 00:1e.0 [8086/02a8] enabled
922 02:47:52.159435 PCI: 00:1e.2 [8086/0000] bus ops
923 02:47:52.162492 PCI: 00:1e.2 [8086/02aa] enabled
924 02:47:52.165684 PCI: 00:1e.3 [8086/0000] bus ops
925 02:47:52.169298 PCI: 00:1e.3 [8086/02ab] enabled
926 02:47:52.172103 PCI: 00:1f.0 [8086/0000] bus ops
927 02:47:52.175736 PCI: 00:1f.0 [8086/0284] enabled
928 02:47:52.181970 PCI: Static device PCI: 00:1f.1 not found, disabling it.
929 02:47:52.188660 PCI: Static device PCI: 00:1f.2 not found, disabling it.
930 02:47:52.191890 PCI: 00:1f.3 [8086/0000] bus ops
931 02:47:52.195842 PCI: 00:1f.3 [8086/02c8] enabled
932 02:47:52.198741 PCI: 00:1f.4 [8086/0000] bus ops
933 02:47:52.201822 PCI: 00:1f.4 [8086/02a3] enabled
934 02:47:52.205528 PCI: 00:1f.5 [8086/0000] bus ops
935 02:47:52.208728 PCI: 00:1f.5 [8086/02a4] enabled
936 02:47:52.211961 PCI: Leftover static devices:
937 02:47:52.212436 PCI: 00:05.0
938 02:47:52.212812 PCI: 00:12.5
939 02:47:52.215057 PCI: 00:12.6
940 02:47:52.215607 PCI: 00:14.1
941 02:47:52.219180 PCI: 00:14.5
942 02:47:52.219759 PCI: 00:15.2
943 02:47:52.221861 PCI: 00:15.3
944 02:47:52.222334 PCI: 00:16.1
945 02:47:52.222710 PCI: 00:16.2
946 02:47:52.225340 PCI: 00:16.3
947 02:47:52.225843 PCI: 00:16.4
948 02:47:52.228586 PCI: 00:16.5
949 02:47:52.229067 PCI: 00:19.1
950 02:47:52.229450 PCI: 00:19.2
951 02:47:52.232353 PCI: 00:1a.0
952 02:47:52.232943 PCI: 00:1c.0
953 02:47:52.235424 PCI: 00:1c.1
954 02:47:52.236014 PCI: 00:1c.2
955 02:47:52.236398 PCI: 00:1c.3
956 02:47:52.238454 PCI: 00:1c.4
957 02:47:52.238939 PCI: 00:1c.5
958 02:47:52.242246 PCI: 00:1c.6
959 02:47:52.242832 PCI: 00:1c.7
960 02:47:52.243220 PCI: 00:1d.1
961 02:47:52.244966
962 02:47:52.245448 PCI: 00:1d.2
963 02:47:52.245866 PCI: 00:1d.3
964 02:47:52.248935 PCI: 00:1d.4
965 02:47:52.249550 PCI: 00:1d.5
966 02:47:52.252229 PCI: 00:1e.1
967 02:47:52.252718 PCI: 00:1f.1
968 02:47:52.253098 PCI: 00:1f.2
969 02:47:52.255425 PCI: 00:1f.6
970 02:47:52.258783 PCI: Check your devicetree.cb.
971 02:47:52.259377 PCI: 00:02.0 scanning...
972 02:47:52.262037
973 02:47:52.265366 scan_generic_bus for PCI: 00:02.0
974 02:47:52.268750 scan_generic_bus for PCI: 00:02.0 done
975 02:47:52.271657 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
976 02:47:52.275178
977 02:47:52.275754 PCI: 00:14.0 scanning...
978 02:47:52.278414 scan_static_bus for PCI: 00:14.0
979 02:47:52.281752 USB0 port 0 enabled
980 02:47:52.284899 USB0 port 0 scanning...
981 02:47:52.288675 scan_static_bus for USB0 port 0
982 02:47:52.289251 USB2 port 0 enabled
983 02:47:52.291751 USB2 port 1 enabled
984 02:47:52.294937 USB2 port 2 disabled
985 02:47:52.295411 USB2 port 3 disabled
986 02:47:52.298707 USB2 port 5 disabled
987 02:47:52.301785 USB2 port 6 enabled
988 02:47:52.302363 USB2 port 9 enabled
989 02:47:52.304884 USB3 port 0 enabled
990 02:47:52.305474 USB3 port 1 enabled
991 02:47:52.307870 USB3 port 2 enabled
992 02:47:52.311547 USB3 port 3 enabled
993 02:47:52.311999 USB3 port 4 disabled
994 02:47:52.314874 USB2 port 0 scanning...
995 02:47:52.318218 scan_static_bus for USB2 port 0
996 02:47:52.321459 scan_static_bus for USB2 port 0 done
997 02:47:52.328408 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
998 02:47:52.331489 USB2 port 1 scanning...
999 02:47:52.334719 scan_static_bus for USB2 port 1
1000 02:47:52.338214 scan_static_bus for USB2 port 1 done
1001 02:47:52.341727 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
1002 02:47:52.344779 USB2 port 6 scanning...
1003 02:47:52.347574 scan_static_bus for USB2 port 6
1004 02:47:52.351402 scan_static_bus for USB2 port 6 done
1005 02:47:52.358162 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
1006 02:47:52.361388 USB2 port 9 scanning...
1007 02:47:52.364821 scan_static_bus for USB2 port 9
1008 02:47:52.367769 scan_static_bus for USB2 port 9 done
1009 02:47:52.371038 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
1010 02:47:52.374901 USB3 port 0 scanning...
1011 02:47:52.377915 scan_static_bus for USB3 port 0
1012 02:47:52.381222 scan_static_bus for USB3 port 0 done
1013 02:47:52.387961 scan_bus: scanning of bus USB3 port 0 took 9712 usecs
1014 02:47:52.391456 USB3 port 1 scanning...
1015 02:47:52.394278 scan_static_bus for USB3 port 1
1016 02:47:52.397650 scan_static_bus for USB3 port 1 done
1017 02:47:52.400999 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
1018 02:47:52.404701 USB3 port 2 scanning...
1019 02:47:52.407927 scan_static_bus for USB3 port 2
1020 02:47:52.410637 scan_static_bus for USB3 port 2 done
1021 02:47:52.418143 scan_bus: scanning of bus USB3 port 2 took 9714 usecs
1022 02:47:52.421187 USB3 port 3 scanning...
1023 02:47:52.424422 scan_static_bus for USB3 port 3
1024 02:47:52.427503 scan_static_bus for USB3 port 3 done
1025 02:47:52.431330 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
1026 02:47:52.437604 scan_static_bus for USB0 port 0 done
1027 02:47:52.440884 scan_bus: scanning of bus USB0 port 0 took 155463 usecs
1028 02:47:52.444324 scan_static_bus for PCI: 00:14.0 done
1029 02:47:52.450525 scan_bus: scanning of bus PCI: 00:14.0 took 173095 usecs
1030 02:47:52.454078 PCI: 00:15.0 scanning...
1031 02:47:52.458200 scan_generic_bus for PCI: 00:15.0
1032 02:47:52.460629 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1033 02:47:52.464271 scan_generic_bus for PCI: 00:15.0 done
1034 02:47:52.470584 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
1035 02:47:52.473847 PCI: 00:15.1 scanning...
1036 02:47:52.477401 scan_generic_bus for PCI: 00:15.1
1037 02:47:52.480726 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1038 02:47:52.487270 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1039 02:47:52.490556 scan_generic_bus for PCI: 00:15.1 done
1040 02:47:52.493719 scan_bus: scanning of bus PCI: 00:15.1 took 18619 usecs
1041 02:47:52.497111 PCI: 00:19.0 scanning...
1042 02:47:52.500744 scan_generic_bus for PCI: 00:19.0
1043 02:47:52.504076 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1044 02:47:52.506920
1045 02:47:52.510272 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1046 02:47:52.513576 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1047 02:47:52.516817 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1048 02:47:52.520310 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1049 02:47:52.527122 scan_generic_bus for PCI: 00:19.0 done
1050 02:47:52.530331 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1051 02:47:52.533077 PCI: 00:1d.0 scanning...
1052 02:47:52.536620 do_pci_scan_bridge for PCI: 00:1d.0
1053 02:47:52.540220 PCI: pci_scan_bus for bus 01
1054 02:47:52.543681 PCI: 01:00.0 [1c5c/1327] enabled
1055 02:47:52.547114 Enabling Common Clock Configuration
1056 02:47:52.553646 L1 Sub-State supported from root port 29
1057 02:47:52.554230 L1 Sub-State Support = 0xf
1058 02:47:52.556921 CommonModeRestoreTime = 0x28
1059 02:47:52.563348 Power On Value = 0x16, Power On Scale = 0x0
1060 02:47:52.563927 ASPM: Enabled L1
1061 02:47:52.570216 scan_bus: scanning of bus PCI: 00:1d.0 took 32809 usecs
1062 02:47:52.573376 PCI: 00:1e.2 scanning...
1063 02:47:52.576745 scan_generic_bus for PCI: 00:1e.2
1064 02:47:52.580097 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1065 02:47:52.583050 scan_generic_bus for PCI: 00:1e.2 done
1066 02:47:52.590158 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1067 02:47:52.590735 PCI: 00:1e.3 scanning...
1068 02:47:52.593298 scan_generic_bus for PCI: 00:1e.3
1069 02:47:52.596679
1070 02:47:52.600261 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1071 02:47:52.603258 scan_generic_bus for PCI: 00:1e.3 done
1072 02:47:52.607036 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1073 02:47:52.609865
1074 02:47:52.610613 PCI: 00:1f.0 scanning...
1075 02:47:52.613283 scan_static_bus for PCI: 00:1f.0
1076 02:47:52.616056 PNP: 0c09.0 enabled
1077 02:47:52.619330 scan_static_bus for PCI: 00:1f.0 done
1078 02:47:52.626143 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1079 02:47:52.629888 PCI: 00:1f.3 scanning...
1080 02:47:52.633159 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1081 02:47:52.636694 PCI: 00:1f.4 scanning...
1082 02:47:52.639681 scan_generic_bus for PCI: 00:1f.4
1083 02:47:52.642748 scan_generic_bus for PCI: 00:1f.4 done
1084 02:47:52.649679 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1085 02:47:52.653339 PCI: 00:1f.5 scanning...
1086 02:47:52.656108 scan_generic_bus for PCI: 00:1f.5
1087 02:47:52.659643 scan_generic_bus for PCI: 00:1f.5 done
1088 02:47:52.666144 scan_bus: scanning of bus PCI: 00:1f.5 took 10207 usecs
1089 02:47:52.672926 scan_bus: scanning of bus DOMAIN: 0000 took 605361 usecs
1090 02:47:52.676150 scan_static_bus for Root Device done
1091 02:47:52.679129 scan_bus: scanning of bus Root Device took 625246 usecs
1092 02:47:52.682758 done
1093 02:47:52.683386 Chrome EC: UHEPI supported
1094 02:47:52.686354
1095 02:47:52.689323 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1096 02:47:52.696028 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1097 02:47:52.702695 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1098 02:47:52.709290 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1099 02:47:52.712593 SPI flash protection: WPSW=0 SRP0=0
1100 02:47:52.719396 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1101 02:47:52.723182 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1102 02:47:52.726185 found VGA at PCI: 00:02.0
1103 02:47:52.729738 Setting up VGA for PCI: 00:02.0
1104 02:47:52.735572 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1105 02:47:52.739040 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1106 02:47:52.742194 Allocating resources...
1107 02:47:52.742692 Reading resources...
1108 02:47:52.745934
1109 02:47:52.748974 Root Device read_resources bus 0 link: 0
1110 02:47:52.752798 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1111 02:47:52.759021 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1112 02:47:52.762453 DOMAIN: 0000 read_resources bus 0 link: 0
1113 02:47:52.769601 PCI: 00:14.0 read_resources bus 0 link: 0
1114 02:47:52.772178 USB0 port 0 read_resources bus 0 link: 0
1115 02:47:52.780918 USB0 port 0 read_resources bus 0 link: 0 done
1116 02:47:52.783976 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 02:47:52.791435 PCI: 00:15.0 read_resources bus 1 link: 0
1118 02:47:52.794709 PCI: 00:15.0 read_resources bus 1 link: 0 done
1119 02:47:52.801441 PCI: 00:15.1 read_resources bus 2 link: 0
1120 02:47:52.805241 PCI: 00:15.1 read_resources bus 2 link: 0 done
1121 02:47:52.812224 PCI: 00:19.0 read_resources bus 3 link: 0
1122 02:47:52.818686 PCI: 00:19.0 read_resources bus 3 link: 0 done
1123 02:47:52.821818 PCI: 00:1d.0 read_resources bus 1 link: 0
1124 02:47:52.828329 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1125 02:47:52.831749 PCI: 00:1e.2 read_resources bus 4 link: 0
1126 02:47:52.838405 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1127 02:47:52.841936 PCI: 00:1e.3 read_resources bus 5 link: 0
1128 02:47:52.848538 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1129 02:47:52.852142 PCI: 00:1f.0 read_resources bus 0 link: 0
1130 02:47:52.858264 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1131 02:47:52.865130 DOMAIN: 0000 read_resources bus 0 link: 0 done
1132 02:47:52.868943 Root Device read_resources bus 0 link: 0 done
1133 02:47:52.871541 Done reading resources.
1134 02:47:52.874755 Show resources in subtree (Root Device)...After reading.
1135 02:47:52.878433
1136 02:47:52.881710 Root Device child on link 0 CPU_CLUSTER: 0
1137 02:47:52.884715 CPU_CLUSTER: 0 child on link 0 APIC: 00
1138 02:47:52.885212 APIC: 00
1139 02:47:52.888830
1140 02:47:52.889418 APIC: 04
1141 02:47:52.889855 APIC: 06
1142 02:47:52.891786 APIC: 01
1143 02:47:52.892373 APIC: 05
1144 02:47:52.892755 APIC: 07
1145 02:47:52.895047 APIC: 03
1146 02:47:52.895554 APIC: 02
1147 02:47:52.898119 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1148 02:47:52.901528
1149 02:47:52.952142 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1150 02:47:52.952725 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1151 02:47:52.953627 PCI: 00:00.0
1152 02:47:52.954070 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1153 02:47:52.954798 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1154 02:47:52.955176 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1155 02:47:52.960798 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1156 02:47:52.967230 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1157 02:47:52.976878 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1158 02:47:52.986886 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1159 02:47:52.996919 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1160 02:47:53.003761 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1161 02:47:53.013122 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1162 02:47:53.023535 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1163 02:47:53.032786 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1164 02:47:53.043411 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1165 02:47:53.053350 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1166 02:47:53.060224 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1167 02:47:53.069887 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1168 02:47:53.073439 PCI: 00:02.0
1169 02:47:53.082936 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 02:47:53.093348 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 02:47:53.099592 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 02:47:53.102875
1173 02:47:53.103462 PCI: 00:04.0
1174 02:47:53.103959 PCI: 00:08.0
1175 02:47:53.105967
1176 02:47:53.112450 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 02:47:53.116400
1178 02:47:53.116886 PCI: 00:12.0
1179 02:47:53.126430 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 02:47:53.129171 PCI: 00:14.0 child on link 0 USB0 port 0
1181 02:47:53.138851 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 02:47:53.146409 USB0 port 0 child on link 0 USB2 port 0
1183 02:47:53.146992 USB2 port 0
1184 02:47:53.149664 USB2 port 1
1185 02:47:53.150246 USB2 port 2
1186 02:47:53.152365 USB2 port 3
1187 02:47:53.152944 USB2 port 5
1188 02:47:53.155829 USB2 port 6
1189 02:47:53.156424 USB2 port 9
1190 02:47:53.158734 USB3 port 0
1191 02:47:53.159218 USB3 port 1
1192 02:47:53.162441 USB3 port 2
1193 02:47:53.163028 USB3 port 3
1194 02:47:53.165709
1195 02:47:53.166291 USB3 port 4
1196 02:47:53.169174 PCI: 00:14.2
1197 02:47:53.179292 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1198 02:47:53.189095 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 02:47:53.189736 PCI: 00:14.3
1200 02:47:53.199247 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1201 02:47:53.202611 PCI: 00:15.0 child on link 0 I2C: 01:15
1202 02:47:53.211936 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 02:47:53.215320 I2C: 01:15
1204 02:47:53.219113 PCI: 00:15.1 child on link 0 I2C: 02:5d
1205 02:47:53.228877 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 02:47:53.229464 I2C: 02:5d
1207 02:47:53.231860
1208 02:47:53.232367 GENERIC: 0.0
1209 02:47:53.235538 PCI: 00:16.0
1210 02:47:53.245171 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 02:47:53.245715 PCI: 00:17.0
1212 02:47:53.254951 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1213 02:47:53.261914 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1214 02:47:53.265242
1215 02:47:53.271438 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1216 02:47:53.278424 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1217 02:47:53.281808
1218 02:47:53.288177 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1219 02:47:53.298057 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1220 02:47:53.301769 PCI: 00:19.0 child on link 0 I2C: 03:1a
1221 02:47:53.311337 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 02:47:53.314548 I2C: 03:1a
1223 02:47:53.315065 I2C: 03:38
1224 02:47:53.315464 I2C: 03:39
1225 02:47:53.317878 I2C: 03:3a
1226 02:47:53.318353 I2C: 03:3b
1227 02:47:53.324937 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1228 02:47:53.331934 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1229 02:47:53.341718 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1230 02:47:53.351172 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1231 02:47:53.354689 PCI: 01:00.0
1232 02:47:53.364825 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 02:47:53.365411 PCI: 00:1e.0
1234 02:47:53.374311 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1235 02:47:53.384308 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1236 02:47:53.391070 PCI: 00:1e.2 child on link 0 SPI: 00
1237 02:47:53.401272 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 02:47:53.401908 SPI: 00
1239 02:47:53.404343 PCI: 00:1e.3 child on link 0 SPI: 01
1240 02:47:53.414113 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 02:47:53.417417 SPI: 01
1242 02:47:53.420721 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1243 02:47:53.430812 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1244 02:47:53.437669 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1245 02:47:53.441035 PNP: 0c09.0
1246 02:47:53.447488 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1247 02:47:53.450824 PCI: 00:1f.3
1248 02:47:53.460988 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 02:47:53.470962 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1250 02:47:53.471542 PCI: 00:1f.4
1251 02:47:53.480552 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1252 02:47:53.491031 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1253 02:47:53.493935 PCI: 00:1f.5
1254 02:47:53.500713 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1255 02:47:53.507284 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1256 02:47:53.513706 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1257 02:47:53.520630 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1258 02:47:53.523750 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1259 02:47:53.527158 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1260 02:47:53.530154 PCI: 00:17.0 18 * [0x60 - 0x67] io
1261 02:47:53.533860
1262 02:47:53.536513 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1263 02:47:53.543563 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1264 02:47:53.550179 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1265 02:47:53.557562 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1266 02:47:53.566915 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1267 02:47:53.573361 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1268 02:47:53.576548 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1269 02:47:53.583297 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1270 02:47:53.589921 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1271 02:47:53.593103 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1272 02:47:53.599501 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1273 02:47:53.603431 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1274 02:47:53.606714 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1275 02:47:53.609689
1276 02:47:53.613433 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1277 02:47:53.616023 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1278 02:47:53.623235 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1279 02:47:53.626345 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1280 02:47:53.633092 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1281 02:47:53.636169 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1282 02:47:53.642995 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1283 02:47:53.646530 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1284 02:47:53.653072 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1285 02:47:53.655921 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1286 02:47:53.663111 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1287 02:47:53.666307 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1288 02:47:53.673054 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1289 02:47:53.675810 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1290 02:47:53.679069 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1291 02:47:53.682721
1292 02:47:53.686371 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1293 02:47:53.689460 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1294 02:47:53.696065 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1295 02:47:53.702625 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1296 02:47:53.706002
1297 02:47:53.709567 avoid_fixed_resources: DOMAIN: 0000
1298 02:47:53.712260 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1299 02:47:53.718772 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1300 02:47:53.725843 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1301 02:47:53.729063
1302 02:47:53.735549 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1303 02:47:53.741998 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1304 02:47:53.749111 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1305 02:47:53.758963 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1306 02:47:53.765529 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1307 02:47:53.771854 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1308 02:47:53.781958 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1309 02:47:53.788637 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1310 02:47:53.795581 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1311 02:47:53.798405 Setting resources...
1312 02:47:53.805147 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1313 02:47:53.808542 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1314 02:47:53.811972 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1315 02:47:53.814699 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1316 02:47:53.818429 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1317 02:47:53.824620 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1318 02:47:53.831551 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1319 02:47:53.838137 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1320 02:47:53.844805 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1321 02:47:53.851535 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1322 02:47:53.858429 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1323 02:47:53.861192 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1324 02:47:53.864757 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1325 02:47:53.871015 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1326 02:47:53.874673 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1327 02:47:53.881216 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1328 02:47:53.884316 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1329 02:47:53.891039 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1330 02:47:53.894458 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1331 02:47:53.901157 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1332 02:47:53.904667 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1333 02:47:53.911626 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1334 02:47:53.914440 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1335 02:47:53.920850 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1336 02:47:53.924145 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1337 02:47:53.930746 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1338 02:47:53.934047 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1339 02:47:53.938378 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1340 02:47:53.944314 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1341 02:47:53.947331 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1342 02:47:53.954137 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1343 02:47:53.957991 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1344 02:47:53.967373 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1345 02:47:53.974037 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1346 02:47:53.980825 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1347 02:47:53.986916 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1348 02:47:53.993549 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1349 02:47:54.000545 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1350 02:47:54.003848 Root Device assign_resources, bus 0 link: 0
1351 02:47:54.010434 DOMAIN: 0000 assign_resources, bus 0 link: 0
1352 02:47:54.017289 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1353 02:47:54.027520 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1354 02:47:54.033504 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1355 02:47:54.043810 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1356 02:47:54.050000 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1357 02:47:54.060012 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1358 02:47:54.063932 PCI: 00:14.0 assign_resources, bus 0 link: 0
1359 02:47:54.066722 PCI: 00:14.0 assign_resources, bus 0 link: 0
1360 02:47:54.069668
1361 02:47:54.076533 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1362 02:47:54.082920 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1363 02:47:54.093468 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1364 02:47:54.099859 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1365 02:47:54.106619 PCI: 00:15.0 assign_resources, bus 1 link: 0
1366 02:47:54.110353 PCI: 00:15.0 assign_resources, bus 1 link: 0
1367 02:47:54.120039 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1368 02:47:54.123470 PCI: 00:15.1 assign_resources, bus 2 link: 0
1369 02:47:54.127432 PCI: 00:15.1 assign_resources, bus 2 link: 0
1370 02:47:54.137020 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1371 02:47:54.143501 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1372 02:47:54.153068 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1373 02:47:54.160449 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1374 02:47:54.166586 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1375 02:47:54.176430 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1376 02:47:54.183145 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1377 02:47:54.192809 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1378 02:47:54.196021 PCI: 00:19.0 assign_resources, bus 3 link: 0
1379 02:47:54.200238 PCI: 00:19.0 assign_resources, bus 3 link: 0
1380 02:47:54.209521 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1381 02:47:54.219190 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1382 02:47:54.225759 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1383 02:47:54.232437 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1384 02:47:54.239120 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1385 02:47:54.245740 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1386 02:47:54.252643 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1387 02:47:54.262184 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1388 02:47:54.265623 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1389 02:47:54.269230 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1390 02:47:54.278484 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1391 02:47:54.282371 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1392 02:47:54.289124 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1393 02:47:54.291779 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1394 02:47:54.298349 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1395 02:47:54.301725 LPC: Trying to open IO window from 800 size 1ff
1396 02:47:54.311450 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1397 02:47:54.318505 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1398 02:47:54.328347 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1399 02:47:54.335031 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1400 02:47:54.338119 DOMAIN: 0000 assign_resources, bus 0 link: 0
1401 02:47:54.341382
1402 02:47:54.344532 Root Device assign_resources, bus 0 link: 0
1403 02:47:54.347979 Done setting resources.
1404 02:47:54.354677 Show resources in subtree (Root Device)...After assigning values.
1405 02:47:54.357823 Root Device child on link 0 CPU_CLUSTER: 0
1406 02:47:54.361439 CPU_CLUSTER: 0 child on link 0 APIC: 00
1407 02:47:54.364827 APIC: 00
1408 02:47:54.365429 APIC: 04
1409 02:47:54.365851 APIC: 06
1410 02:47:54.367999 APIC: 01
1411 02:47:54.368588 APIC: 05
1412 02:47:54.371450 APIC: 07
1413 02:47:54.372040 APIC: 03
1414 02:47:54.372430 APIC: 02
1415 02:47:54.377929 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 02:47:54.387606 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1417 02:47:54.397616 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1418 02:47:54.398217 PCI: 00:00.0
1419 02:47:54.407528 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 02:47:54.417718 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 02:47:54.427322 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 02:47:54.437027 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 02:47:54.447031 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 02:47:54.453878 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 02:47:54.463861 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 02:47:54.473966 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 02:47:54.483261 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 02:47:54.493449 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1429 02:47:54.500151 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1430 02:47:54.509914 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1431 02:47:54.519725 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1432 02:47:54.529811 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1433 02:47:54.540518 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1434 02:47:54.549734 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1435 02:47:54.550317 PCI: 00:02.0
1436 02:47:54.563045 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1437 02:47:54.572643 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1438 02:47:54.582600 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1439 02:47:54.583187 PCI: 00:04.0
1440 02:47:54.585835 PCI: 00:08.0
1441 02:47:54.596132 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1442 02:47:54.596714 PCI: 00:12.0
1443 02:47:54.605730 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1444 02:47:54.612202 PCI: 00:14.0 child on link 0 USB0 port 0
1445 02:47:54.622450 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1446 02:47:54.625732 USB0 port 0 child on link 0 USB2 port 0
1447 02:47:54.629219 USB2 port 0
1448 02:47:54.629834 USB2 port 1
1449 02:47:54.632507 USB2 port 2
1450 02:47:54.633083 USB2 port 3
1451 02:47:54.635433 USB2 port 5
1452 02:47:54.635933 USB2 port 6
1453 02:47:54.639226 USB2 port 9
1454 02:47:54.639705 USB3 port 0
1455 02:47:54.642171 USB3 port 1
1456 02:47:54.642650 USB3 port 2
1457 02:47:54.645323 USB3 port 3
1458 02:47:54.645835 USB3 port 4
1459 02:47:54.648858 PCI: 00:14.2
1460 02:47:54.658729 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1461 02:47:54.668789 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1462 02:47:54.672566 PCI: 00:14.3
1463 02:47:54.682076 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1464 02:47:54.685125 PCI: 00:15.0 child on link 0 I2C: 01:15
1465 02:47:54.695247 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1466 02:47:54.698432 I2C: 01:15
1467 02:47:54.702325 PCI: 00:15.1 child on link 0 I2C: 02:5d
1468 02:47:54.711549 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1469 02:47:54.715665 I2C: 02:5d
1470 02:47:54.716257 GENERIC: 0.0
1471 02:47:54.718119 PCI: 00:16.0
1472 02:47:54.728206 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1473 02:47:54.728801 PCI: 00:17.0
1474 02:47:54.738159 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1475 02:47:54.748144 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1476 02:47:54.757972 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1477 02:47:54.768092 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1478 02:47:54.777781 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1479 02:47:54.787872 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1480 02:47:54.791655 PCI: 00:19.0 child on link 0 I2C: 03:1a
1481 02:47:54.801287 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1482 02:47:54.808994 I2C: 03:1a
1483 02:47:54.809182 I2C: 03:38
1484 02:47:54.809255 I2C: 03:39
1485 02:47:54.809348 I2C: 03:3a
1486 02:47:54.809410 I2C: 03:3b
1487 02:47:54.814272 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1488 02:47:54.824043 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1489 02:47:54.834180 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1490 02:47:54.843709 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1491 02:47:54.844200 PCI: 01:00.0
1492 02:47:54.853870 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1493 02:47:54.857401
1494 02:47:54.858026 PCI: 00:1e.0
1495 02:47:54.867093 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 02:47:54.877331 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1497 02:47:54.883676 PCI: 00:1e.2 child on link 0 SPI: 00
1498 02:47:54.893713 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1499 02:47:54.894288 SPI: 00
1500 02:47:54.897099 PCI: 00:1e.3 child on link 0 SPI: 01
1501 02:47:54.906968 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1502 02:47:54.910657
1503 02:47:54.911248 SPI: 01
1504 02:47:54.913418 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1505 02:47:54.923353 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1506 02:47:54.934154 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1507 02:47:54.934738 PNP: 0c09.0
1508 02:47:54.943483 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1509 02:47:54.944064 PCI: 00:1f.3
1510 02:47:54.952724 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1511 02:47:54.963401 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1512 02:47:54.966069
1513 02:47:54.966552 PCI: 00:1f.4
1514 02:47:54.976692 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1515 02:47:54.986291 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1516 02:47:54.986857 PCI: 00:1f.5
1517 02:47:54.996331 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1518 02:47:54.999660 Done allocating resources.
1519 02:47:55.006105 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1520 02:47:55.010066 Enabling resources...
1521 02:47:55.012438 PCI: 00:00.0 subsystem <- 8086/9b61
1522 02:47:55.015966 PCI: 00:00.0 cmd <- 06
1523 02:47:55.019726 PCI: 00:02.0 subsystem <- 8086/9b41
1524 02:47:55.022280 PCI: 00:02.0 cmd <- 03
1525 02:47:55.025808 PCI: 00:08.0 cmd <- 06
1526 02:47:55.029148 PCI: 00:12.0 subsystem <- 8086/02f9
1527 02:47:55.029782 PCI: 00:12.0 cmd <- 02
1528 02:47:55.035515 PCI: 00:14.0 subsystem <- 8086/02ed
1529 02:47:55.035991 PCI: 00:14.0 cmd <- 02
1530 02:47:55.039235 PCI: 00:14.2 cmd <- 02
1531 02:47:55.042591 PCI: 00:14.3 subsystem <- 8086/02f0
1532 02:47:55.045607 PCI: 00:14.3 cmd <- 02
1533 02:47:55.049447 PCI: 00:15.0 subsystem <- 8086/02e8
1534 02:47:55.052731 PCI: 00:15.0 cmd <- 02
1535 02:47:55.055722 PCI: 00:15.1 subsystem <- 8086/02e9
1536 02:47:55.058827 PCI: 00:15.1 cmd <- 02
1537 02:47:55.062381 PCI: 00:16.0 subsystem <- 8086/02e0
1538 02:47:55.065600 PCI: 00:16.0 cmd <- 02
1539 02:47:55.069527 PCI: 00:17.0 subsystem <- 8086/02d3
1540 02:47:55.072500 PCI: 00:17.0 cmd <- 03
1541 02:47:55.075297 PCI: 00:19.0 subsystem <- 8086/02c5
1542 02:47:55.075776 PCI: 00:19.0 cmd <- 02
1543 02:47:55.079218 PCI: 00:1d.0 bridge ctrl <- 0013
1544 02:47:55.085893 PCI: 00:1d.0 subsystem <- 8086/02b0
1545 02:47:55.086491 PCI: 00:1d.0 cmd <- 06
1546 02:47:55.089191 PCI: 00:1e.0 subsystem <- 8086/02a8
1547 02:47:55.092436 PCI: 00:1e.0 cmd <- 06
1548 02:47:55.095610 PCI: 00:1e.2 subsystem <- 8086/02aa
1549 02:47:55.098897 PCI: 00:1e.2 cmd <- 06
1550 02:47:55.102122 PCI: 00:1e.3 subsystem <- 8086/02ab
1551 02:47:55.105755 PCI: 00:1e.3 cmd <- 02
1552 02:47:55.109313 PCI: 00:1f.0 subsystem <- 8086/0284
1553 02:47:55.112743 PCI: 00:1f.0 cmd <- 407
1554 02:47:55.116035 PCI: 00:1f.3 subsystem <- 8086/02c8
1555 02:47:55.118512 PCI: 00:1f.3 cmd <- 02
1556 02:47:55.121819 PCI: 00:1f.4 subsystem <- 8086/02a3
1557 02:47:55.125427 PCI: 00:1f.4 cmd <- 03
1558 02:47:55.129159 PCI: 00:1f.5 subsystem <- 8086/02a4
1559 02:47:55.131665 PCI: 00:1f.5 cmd <- 406
1560 02:47:55.139809 PCI: 01:00.0 cmd <- 02
1561 02:47:55.145664 done.
1562 02:47:55.155146 ME: Version: 14.0.39.1367
1563 02:47:55.161607 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 9
1564 02:47:55.164640 Initializing devices...
1565 02:47:55.165117 Root Device init ...
1566 02:47:55.171261 Chrome EC: Set SMI mask to 0x0000000000000000
1567 02:47:55.174583 Chrome EC: clear events_b mask to 0x0000000000000000
1568 02:47:55.181201 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 02:47:55.188048 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1570 02:47:55.194693 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1571 02:47:55.197832 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 02:47:55.200854 Root Device init finished in 35211 usecs
1573 02:47:55.204581 CPU_CLUSTER: 0 init ...
1574 02:47:55.208070 CPU_CLUSTER: 0 init finished in 2448 usecs
1575 02:47:55.211469
1576 02:47:55.215605 PCI: 00:00.0 init ...
1577 02:47:55.218789 CPU TDP: 15 Watts
1578 02:47:55.222312 CPU PL2 = 64 Watts
1579 02:47:55.225507 PCI: 00:00.0 init finished in 7084 usecs
1580 02:47:55.228994 PCI: 00:02.0 init ...
1581 02:47:55.232382 PCI: 00:02.0 init finished in 2255 usecs
1582 02:47:55.235513 PCI: 00:08.0 init ...
1583 02:47:55.238058 PCI: 00:08.0 init finished in 2252 usecs
1584 02:47:55.241744 PCI: 00:12.0 init ...
1585 02:47:55.245036 PCI: 00:12.0 init finished in 2254 usecs
1586 02:47:55.248351 PCI: 00:14.0 init ...
1587 02:47:55.251893 PCI: 00:14.0 init finished in 2254 usecs
1588 02:47:55.254789 PCI: 00:14.2 init ...
1589 02:47:55.257840 PCI: 00:14.2 init finished in 2253 usecs
1590 02:47:55.261286 PCI: 00:14.3 init ...
1591 02:47:55.264810 PCI: 00:14.3 init finished in 2269 usecs
1592 02:47:55.267355 PCI: 00:15.0 init ...
1593 02:47:55.271078 DW I2C bus 0 at 0xd121f000 (400 KHz)
1594 02:47:55.274018 PCI: 00:15.0 init finished in 5976 usecs
1595 02:47:55.277640
1596 02:47:55.278217 PCI: 00:15.1 init ...
1597 02:47:55.281018 DW I2C bus 1 at 0xd1220000 (400 KHz)
1598 02:47:55.287464 PCI: 00:15.1 init finished in 5978 usecs
1599 02:47:55.288027 PCI: 00:16.0 init ...
1600 02:47:55.290730
1601 02:47:55.294175 PCI: 00:16.0 init finished in 2252 usecs
1602 02:47:55.297841 PCI: 00:19.0 init ...
1603 02:47:55.300966 DW I2C bus 4 at 0xd1222000 (400 KHz)
1604 02:47:55.303778 PCI: 00:19.0 init finished in 5972 usecs
1605 02:47:55.307370 PCI: 00:1d.0 init ...
1606 02:47:55.310957 Initializing PCH PCIe bridge.
1607 02:47:55.313826 PCI: 00:1d.0 init finished in 5276 usecs
1608 02:47:55.317297 PCI: 00:1f.0 init ...
1609 02:47:55.320851 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 02:47:55.326903 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 02:47:55.327408 IOAPIC: ID = 0x02
1612 02:47:55.330084 IOAPIC: Dumping registers
1613 02:47:55.333819 reg 0x0000: 0x02000000
1614 02:47:55.337032 reg 0x0001: 0x00770020
1615 02:47:55.337656 reg 0x0002: 0x00000000
1616 02:47:55.343756 PCI: 00:1f.0 init finished in 23544 usecs
1617 02:47:55.347557 PCI: 00:1f.4 init ...
1618 02:47:55.350451 PCI: 00:1f.4 init finished in 2264 usecs
1619 02:47:55.361401 PCI: 01:00.0 init ...
1620 02:47:55.364743 PCI: 01:00.0 init finished in 2244 usecs
1621 02:47:55.369202 PNP: 0c09.0 init ...
1622 02:47:55.372448 Google Chrome EC uptime: 11.109 seconds
1623 02:47:55.379251 Google Chrome AP resets since EC boot: 0
1624 02:47:55.382416 Google Chrome most recent AP reset causes:
1625 02:47:55.389007 Google Chrome EC reset flags at last EC boot: reset-pin
1626 02:47:55.392419 PNP: 0c09.0 init finished in 20605 usecs
1627 02:47:55.395285 Devices initialized
1628 02:47:55.395759 Show all devs... After init.
1629 02:47:55.398862
1630 02:47:55.399443 Root Device: enabled 1
1631 02:47:55.402384 CPU_CLUSTER: 0: enabled 1
1632 02:47:55.405152 DOMAIN: 0000: enabled 1
1633 02:47:55.405700 APIC: 00: enabled 1
1634 02:47:55.408904 PCI: 00:00.0: enabled 1
1635 02:47:55.412235 PCI: 00:02.0: enabled 1
1636 02:47:55.415903 PCI: 00:04.0: enabled 0
1637 02:47:55.416498 PCI: 00:05.0: enabled 0
1638 02:47:55.418683 PCI: 00:12.0: enabled 1
1639 02:47:55.422097 PCI: 00:12.5: enabled 0
1640 02:47:55.422714 PCI: 00:12.6: enabled 0
1641 02:47:55.425056
1642 02:47:55.425606 PCI: 00:14.0: enabled 1
1643 02:47:55.428336 PCI: 00:14.1: enabled 0
1644 02:47:55.431944 PCI: 00:14.3: enabled 1
1645 02:47:55.432420 PCI: 00:14.5: enabled 0
1646 02:47:55.435184 PCI: 00:15.0: enabled 1
1647 02:47:55.438633 PCI: 00:15.1: enabled 1
1648 02:47:55.442172 PCI: 00:15.2: enabled 0
1649 02:47:55.442744 PCI: 00:15.3: enabled 0
1650 02:47:55.445169 PCI: 00:16.0: enabled 1
1651 02:47:55.448541 PCI: 00:16.1: enabled 0
1652 02:47:55.451731 PCI: 00:16.2: enabled 0
1653 02:47:55.452313 PCI: 00:16.3: enabled 0
1654 02:47:55.454928 PCI: 00:16.4: enabled 0
1655 02:47:55.458655 PCI: 00:16.5: enabled 0
1656 02:47:55.461801 PCI: 00:17.0: enabled 1
1657 02:47:55.462376 PCI: 00:19.0: enabled 1
1658 02:47:55.464840 PCI: 00:19.1: enabled 0
1659 02:47:55.468292 PCI: 00:19.2: enabled 0
1660 02:47:55.468869 PCI: 00:1a.0: enabled 0
1661 02:47:55.472023 PCI: 00:1c.0: enabled 0
1662 02:47:55.475074 PCI: 00:1c.1: enabled 0
1663 02:47:55.478060 PCI: 00:1c.2: enabled 0
1664 02:47:55.478536 PCI: 00:1c.3: enabled 0
1665 02:47:55.481941 PCI: 00:1c.4: enabled 0
1666 02:47:55.484874 PCI: 00:1c.5: enabled 0
1667 02:47:55.487863 PCI: 00:1c.6: enabled 0
1668 02:47:55.488336 PCI: 00:1c.7: enabled 0
1669 02:47:55.491652 PCI: 00:1d.0: enabled 1
1670 02:47:55.494632 PCI: 00:1d.1: enabled 0
1671 02:47:55.498102 PCI: 00:1d.2: enabled 0
1672 02:47:55.498683 PCI: 00:1d.3: enabled 0
1673 02:47:55.502037 PCI: 00:1d.4: enabled 0
1674 02:47:55.504945 PCI: 00:1d.5: enabled 0
1675 02:47:55.505569 PCI: 00:1e.0: enabled 1
1676 02:47:55.507885
1677 02:47:55.508367 PCI: 00:1e.1: enabled 0
1678 02:47:55.511302 PCI: 00:1e.2: enabled 1
1679 02:47:55.514609 PCI: 00:1e.3: enabled 1
1680 02:47:55.515200 PCI: 00:1f.0: enabled 1
1681 02:47:55.518114 PCI: 00:1f.1: enabled 0
1682 02:47:55.521525 PCI: 00:1f.2: enabled 0
1683 02:47:55.524437 PCI: 00:1f.3: enabled 1
1684 02:47:55.524935 PCI: 00:1f.4: enabled 1
1685 02:47:55.527684 PCI: 00:1f.5: enabled 1
1686 02:47:55.530826 PCI: 00:1f.6: enabled 0
1687 02:47:55.534363 USB0 port 0: enabled 1
1688 02:47:55.534850 I2C: 01:15: enabled 1
1689 02:47:55.537523 I2C: 02:5d: enabled 1
1690 02:47:55.540904 GENERIC: 0.0: enabled 1
1691 02:47:55.541390 I2C: 03:1a: enabled 1
1692 02:47:55.544029 I2C: 03:38: enabled 1
1693 02:47:55.547666 I2C: 03:39: enabled 1
1694 02:47:55.548261 I2C: 03:3a: enabled 1
1695 02:47:55.550989 I2C: 03:3b: enabled 1
1696 02:47:55.553860 PCI: 00:00.0: enabled 1
1697 02:47:55.554347 SPI: 00: enabled 1
1698 02:47:55.558033 SPI: 01: enabled 1
1699 02:47:55.560857 PNP: 0c09.0: enabled 1
1700 02:47:55.561447 USB2 port 0: enabled 1
1701 02:47:55.564479 USB2 port 1: enabled 1
1702 02:47:55.567439 USB2 port 2: enabled 0
1703 02:47:55.567887 USB2 port 3: enabled 0
1704 02:47:55.571273
1705 02:47:55.571868 USB2 port 5: enabled 0
1706 02:47:55.573843 USB2 port 6: enabled 1
1707 02:47:55.577458 USB2 port 9: enabled 1
1708 02:47:55.578085 USB3 port 0: enabled 1
1709 02:47:55.580826 USB3 port 1: enabled 1
1710 02:47:55.583832 USB3 port 2: enabled 1
1711 02:47:55.584319 USB3 port 3: enabled 1
1712 02:47:55.587653 USB3 port 4: enabled 0
1713 02:47:55.590877 APIC: 04: enabled 1
1714 02:47:55.591476 APIC: 06: enabled 1
1715 02:47:55.594172 APIC: 01: enabled 1
1716 02:47:55.597378 APIC: 05: enabled 1
1717 02:47:55.597903 APIC: 07: enabled 1
1718 02:47:55.600934 APIC: 03: enabled 1
1719 02:47:55.601564 APIC: 02: enabled 1
1720 02:47:55.603831 PCI: 00:08.0: enabled 1
1721 02:47:55.607217 PCI: 00:14.2: enabled 1
1722 02:47:55.610405 PCI: 01:00.0: enabled 1
1723 02:47:55.613706 Disabling ACPI via APMC:
1724 02:47:55.617361 done.
1725 02:47:55.620789 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1726 02:47:55.623866 ELOG: NV offset 0xaf0000 size 0x4000
1727 02:47:55.630505 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1728 02:47:55.637420 ELOG: Event(17) added with size 13 at 2023-01-25 02:47:54 UTC
1729 02:47:55.644172 ELOG: Event(92) added with size 9 at 2023-01-25 02:47:54 UTC
1730 02:47:55.650510 ELOG: Event(93) added with size 9 at 2023-01-25 02:47:54 UTC
1731 02:47:55.657109 ELOG: Event(9A) added with size 9 at 2023-01-25 02:47:54 UTC
1732 02:47:55.663999 ELOG: Event(9E) added with size 10 at 2023-01-25 02:47:54 UTC
1733 02:47:55.670631 ELOG: Event(9F) added with size 14 at 2023-01-25 02:47:54 UTC
1734 02:47:55.674087 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1735 02:47:55.681196 ELOG: Event(A1) added with size 10 at 2023-01-25 02:47:54 UTC
1736 02:47:55.691570 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1737 02:47:55.698022 ELOG: Event(A0) added with size 9 at 2023-01-25 02:47:54 UTC
1738 02:47:55.701134 elog_add_boot_reason: Logged dev mode boot
1739 02:47:55.703832 Finalize devices...
1740 02:47:55.704321 PCI: 00:17.0 final
1741 02:47:55.707684 Devices finalized
1742 02:47:55.710936 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1743 02:47:55.717310 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1744 02:47:55.720794 ME: HFSTS1 : 0x90000245
1745 02:47:55.723954 ME: HFSTS2 : 0x3B850126
1746 02:47:55.730595 ME: HFSTS3 : 0x00000020
1747 02:47:55.734078 ME: HFSTS4 : 0x00004800
1748 02:47:55.736944 ME: HFSTS5 : 0x00000000
1749 02:47:55.740683 ME: HFSTS6 : 0x40400006
1750 02:47:55.744251 ME: Manufacturing Mode : NO
1751 02:47:55.746932 ME: FW Partition Table : OK
1752 02:47:55.750436 ME: Bringup Loader Failure : NO
1753 02:47:55.753656 ME: Firmware Init Complete : YES
1754 02:47:55.757021 ME: Boot Options Present : NO
1755 02:47:55.760479 ME: Update In Progress : NO
1756 02:47:55.763847 ME: D0i3 Support : YES
1757 02:47:55.766626 ME: Low Power State Enabled : NO
1758 02:47:55.770032 ME: CPU Replaced : NO
1759 02:47:55.773729 ME: CPU Replacement Valid : YES
1760 02:47:55.777052 ME: Current Working State : 5
1761 02:47:55.780416 ME: Current Operation State : 1
1762 02:47:55.783911 ME: Current Operation Mode : 0
1763 02:47:55.787165 ME: Error Code : 0
1764 02:47:55.790259 ME: CPU Debug Disabled : YES
1765 02:47:55.793692 ME: TXT Support : NO
1766 02:47:55.800383 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1767 02:47:55.806922 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1768 02:47:55.807514 CBFS @ c08000 size 3f8000
1769 02:47:55.813642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1770 02:47:55.816441 CBFS: Locating 'fallback/dsdt.aml'
1771 02:47:55.820091 CBFS: Found @ offset 10bb80 size 3fa5
1772 02:47:55.826333 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1773 02:47:55.829800 CBFS @ c08000 size 3f8000
1774 02:47:55.833444 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1775 02:47:55.836410 CBFS: Locating 'fallback/slic'
1776 02:47:55.841729 CBFS: 'fallback/slic' not found.
1777 02:47:55.848937 ACPI: Writing ACPI tables at 99b3e000.
1778 02:47:55.849607 ACPI: * FACS
1779 02:47:55.851647 ACPI: * DSDT
1780 02:47:55.855494 Ramoops buffer: 0x100000@0x99a3d000.
1781 02:47:55.858151 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1782 02:47:55.864893 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1783 02:47:55.868568 Google Chrome EC: version:
1784 02:47:55.871293 ro: helios_v2.0.2659-56403530b
1785 02:47:55.874727 rw: helios_v2.0.2849-c41de27e7d
1786 02:47:55.875209 running image: 1
1787 02:47:55.879202 ACPI: * FADT
1788 02:47:55.879794 SCI is IRQ9
1789 02:47:55.882610 ACPI: added table 1/32, length now 40
1790 02:47:55.885777
1791 02:47:55.886304 ACPI: * SSDT
1792 02:47:55.888779 Found 1 CPU(s) with 8 core(s) each.
1793 02:47:55.892321 Error: Could not locate 'wifi_sar' in VPD.
1794 02:47:55.898772 Checking CBFS for default SAR values
1795 02:47:55.902353 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1796 02:47:55.905662 CBFS @ c08000 size 3f8000
1797 02:47:55.912214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1798 02:47:55.915043 CBFS: Locating 'wifi_sar_defaults.hex'
1799 02:47:55.918430 CBFS: Found @ offset 5fac0 size 77
1800 02:47:55.922075 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1801 02:47:55.928591 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1802 02:47:55.932098 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1803 02:47:55.938828 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1804 02:47:55.941733 failed to find key in VPD: dsm_calib_r0_0
1805 02:47:55.951934 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1806 02:47:55.954973 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1807 02:47:55.958345 failed to find key in VPD: dsm_calib_r0_1
1808 02:47:55.968236 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1809 02:47:55.974942 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1810 02:47:55.978042 failed to find key in VPD: dsm_calib_r0_2
1811 02:47:55.988049 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1812 02:47:55.991021 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1813 02:47:55.998012 failed to find key in VPD: dsm_calib_r0_3
1814 02:47:56.004781 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1815 02:47:56.011532 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1816 02:47:56.014842 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1817 02:47:56.017914 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1818 02:47:56.021770 EC returned error result code 1
1819 02:47:56.025526 EC returned error result code 1
1820 02:47:56.028884 EC returned error result code 1
1821 02:47:56.035736 PS2K: Bad resp from EC. Vivaldi disabled!
1822 02:47:56.038868 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1823 02:47:56.045674 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1824 02:47:56.052413 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1825 02:47:56.055818 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1826 02:47:56.062365 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1827 02:47:56.069060 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1828 02:47:56.075562 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1829 02:47:56.079046 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1830 02:47:56.086209 ACPI: added table 2/32, length now 44
1831 02:47:56.086795 ACPI: * MCFG
1832 02:47:56.089239 ACPI: added table 3/32, length now 48
1833 02:47:56.092296 ACPI: * TPM2
1834 02:47:56.095535 TPM2 log created at 99a2d000
1835 02:47:56.098863 ACPI: added table 4/32, length now 52
1836 02:47:56.099435 ACPI: * MADT
1837 02:47:56.101938 SCI is IRQ9
1838 02:47:56.105169 ACPI: added table 5/32, length now 56
1839 02:47:56.105764 current = 99b43ac0
1840 02:47:56.108656 ACPI: * DMAR
1841 02:47:56.112328 ACPI: added table 6/32, length now 60
1842 02:47:56.115228 ACPI: * IGD OpRegion
1843 02:47:56.115711 GMA: Found VBT in CBFS
1844 02:47:56.118826 GMA: Found valid VBT in CBFS
1845 02:47:56.121962 ACPI: added table 7/32, length now 64
1846 02:47:56.124928 ACPI: * HPET
1847 02:47:56.128254 ACPI: added table 8/32, length now 68
1848 02:47:56.128735 ACPI: done.
1849 02:47:56.132457 ACPI tables: 31744 bytes.
1850 02:47:56.135651 smbios_write_tables: 99a2c000
1851 02:47:56.138932 EC returned error result code 3
1852 02:47:56.141884 Couldn't obtain OEM name from CBI
1853 02:47:56.145328 Create SMBIOS type 17
1854 02:47:56.149249 PCI: 00:00.0 (Intel Cannonlake)
1855 02:47:56.151885 PCI: 00:14.3 (Intel WiFi)
1856 02:47:56.155712 SMBIOS tables: 939 bytes.
1857 02:47:56.158695 Writing table forward entry at 0x00000500
1858 02:47:56.165575 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1859 02:47:56.168492 Writing coreboot table at 0x99b62000
1860 02:47:56.175007 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1861 02:47:56.178254 1. 0000000000001000-000000000009ffff: RAM
1862 02:47:56.181646 2. 00000000000a0000-00000000000fffff: RESERVED
1863 02:47:56.188107 3. 0000000000100000-0000000099a2bfff: RAM
1864 02:47:56.191739 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1865 02:47:56.198433 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1866 02:47:56.204811 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1867 02:47:56.208460 7. 000000009a000000-000000009f7fffff: RESERVED
1868 02:47:56.214917 8. 00000000e0000000-00000000efffffff: RESERVED
1869 02:47:56.218186 9. 00000000fc000000-00000000fc000fff: RESERVED
1870 02:47:56.221661 10. 00000000fe000000-00000000fe00ffff: RESERVED
1871 02:47:56.227817 11. 00000000fed10000-00000000fed17fff: RESERVED
1872 02:47:56.231238 12. 00000000fed80000-00000000fed83fff: RESERVED
1873 02:47:56.238005 13. 00000000fed90000-00000000fed91fff: RESERVED
1874 02:47:56.241413 14. 00000000feda0000-00000000feda1fff: RESERVED
1875 02:47:56.248313 15. 0000000100000000-000000045e7fffff: RAM
1876 02:47:56.251325 Graphics framebuffer located at 0xc0000000
1877 02:47:56.255207 Passing 5 GPIOs to payload:
1878 02:47:56.257700 NAME | PORT | POLARITY | VALUE
1879 02:47:56.264873 write protect | undefined | high | low
1880 02:47:56.267942 lid | undefined | high | high
1881 02:47:56.274386 power | undefined | high | low
1882 02:47:56.281600 oprom | undefined | high | low
1883 02:47:56.284356 EC in RW | 0x000000cb | high | low
1884 02:47:56.288141 Board ID: 4
1885 02:47:56.291128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1886 02:47:56.294399 CBFS @ c08000 size 3f8000
1887 02:47:56.301013 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1888 02:47:56.304348 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1889 02:47:56.307305
1890 02:47:56.307788 coreboot table: 1492 bytes.
1891 02:47:56.311415 IMD ROOT 0. 99fff000 00001000
1892 02:47:56.314659 IMD SMALL 1. 99ffe000 00001000
1893 02:47:56.317626 FSP MEMORY 2. 99c4e000 003b0000
1894 02:47:56.321202 CONSOLE 3. 99c2e000 00020000
1895 02:47:56.324277 FMAP 4. 99c2d000 0000054e
1896 02:47:56.327380 TIME STAMP 5. 99c2c000 00000910
1897 02:47:56.330652 VBOOT WORK 6. 99c18000 00014000
1898 02:47:56.334335 MRC DATA 7. 99c16000 00001958
1899 02:47:56.337741 ROMSTG STCK 8. 99c15000 00001000
1900 02:47:56.341081 AFTER CAR 9. 99c0b000 0000a000
1901 02:47:56.343993 RAMSTAGE 10. 99baf000 0005c000
1902 02:47:56.347987 REFCODE 11. 99b7a000 00035000
1903 02:47:56.350708 SMM BACKUP 12. 99b6a000 00010000
1904 02:47:56.353983 COREBOOT 13. 99b62000 00008000
1905 02:47:56.357684 ACPI 14. 99b3e000 00024000
1906 02:47:56.360475 ACPI GNVS 15. 99b3d000 00001000
1907 02:47:56.364264 RAMOOPS 16. 99a3d000 00100000
1908 02:47:56.366976 TPM2 TCGLOG17. 99a2d000 00010000
1909 02:47:56.370502 SMBIOS 18. 99a2c000 00000800
1910 02:47:56.374157 IMD small region:
1911 02:47:56.377420 IMD ROOT 0. 99ffec00 00000400
1912 02:47:56.380765 FSP RUNTIME 1. 99ffebe0 00000004
1913 02:47:56.384184 EC HOSTEVENT 2. 99ffebc0 00000008
1914 02:47:56.387266 POWER STATE 3. 99ffeb80 00000040
1915 02:47:56.390702 ROMSTAGE 4. 99ffeb60 00000004
1916 02:47:56.393773 MEM INFO 5. 99ffe9a0 000001b9
1917 02:47:56.400386 VPD 6. 99ffe920 0000006c
1918 02:47:56.400968 MTRR: Physical address space:
1919 02:47:56.406714 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1920 02:47:56.413779 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1921 02:47:56.420529 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1922 02:47:56.426622 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1923 02:47:56.433037 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1924 02:47:56.439726 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1925 02:47:56.446154 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1926 02:47:56.449716 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 02:47:56.453311 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 02:47:56.456220 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 02:47:56.463218 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 02:47:56.466622 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 02:47:56.469705 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 02:47:56.473028 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 02:47:56.479615 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 02:47:56.482705 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 02:47:56.486354 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 02:47:56.489187 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 02:47:56.493082 call enable_fixed_mtrr()
1938 02:47:56.496115 CPU physical address size: 39 bits
1939 02:47:56.503134 MTRR: default type WB/UC MTRR counts: 6/8.
1940 02:47:56.506289 MTRR: WB selected as default type.
1941 02:47:56.512701 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1942 02:47:56.516179 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1943 02:47:56.522739 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 02:47:56.529456 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1945 02:47:56.536508 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1946 02:47:56.542199 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1947 02:47:56.545618 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 02:47:56.552380 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 02:47:56.556174 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 02:47:56.558829 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 02:47:56.562287 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 02:47:56.569080 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 02:47:56.572256 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 02:47:56.575501 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 02:47:56.578910 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 02:47:56.585771 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 02:47:56.589047 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 02:47:56.589673
1959 02:47:56.590160 MTRR check
1960 02:47:56.591736 Fixed MTRRs : Enabled
1961 02:47:56.595355 Variable MTRRs: Enabled
1962 02:47:56.595835
1963 02:47:56.599156 call enable_fixed_mtrr()
1964 02:47:56.601960 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1965 02:47:56.605228 CPU physical address size: 39 bits
1966 02:47:56.612884 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1967 02:47:56.615711 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 02:47:56.618902 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 02:47:56.625730 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 02:47:56.628855 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 02:47:56.631938 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 02:47:56.635504 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 02:47:56.639047 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 02:47:56.642059
1975 02:47:56.645499 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 02:47:56.648735 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 02:47:56.652082 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 02:47:56.654991 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 02:47:56.662136 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 02:47:56.665226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 02:47:56.668931 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 02:47:56.672217 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 02:47:56.678492 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 02:47:56.681729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 02:47:56.685081 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 02:47:56.687963 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 02:47:56.691447
1988 02:47:56.692037 call enable_fixed_mtrr()
1989 02:47:56.695321 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 02:47:56.698404
1991 02:47:56.701627 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 02:47:56.704845 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 02:47:56.708263 CPU physical address size: 39 bits
1994 02:47:56.711573 call enable_fixed_mtrr()
1995 02:47:56.714823 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 02:47:56.717974 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 02:47:56.725025 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 02:47:56.727959 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 02:47:56.731269 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 02:47:56.734770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 02:47:56.740976 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 02:47:56.744746 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 02:47:56.748308 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 02:47:56.751328 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 02:47:56.757863 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 02:47:56.761109 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 02:47:56.764344 call enable_fixed_mtrr()
2008 02:47:56.767786 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 02:47:56.770839 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 02:47:56.774263 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 02:47:56.781232 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 02:47:56.784324 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 02:47:56.787290 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 02:47:56.791047 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 02:47:56.797771 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 02:47:56.800768 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 02:47:56.803796 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 02:47:56.807147 CPU physical address size: 39 bits
2019 02:47:56.810593 call enable_fixed_mtrr()
2020 02:47:56.814366 CBFS @ c08000 size 3f8000
2021 02:47:56.820207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2022 02:47:56.824062 CBFS: Locating 'fallback/payload'
2023 02:47:56.827115 CPU physical address size: 39 bits
2024 02:47:56.830230 CBFS: Found @ offset 1c96c0 size 3f798
2025 02:47:56.833949 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 02:47:56.837229 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 02:47:56.843628 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 02:47:56.846976 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 02:47:56.850597 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 02:47:56.853851 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 02:47:56.856993 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 02:47:56.860341
2033 02:47:56.863515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 02:47:56.866730 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 02:47:56.870080 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 02:47:56.873471 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 02:47:56.879686 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 02:47:56.883214 call enable_fixed_mtrr()
2039 02:47:56.886478 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 02:47:56.889890 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 02:47:56.893060 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 02:47:56.899629 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 02:47:56.902969 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 02:47:56.906709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 02:47:56.910078 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 02:47:56.913276 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 02:47:56.919890 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 02:47:56.923418 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 02:47:56.926739 CPU physical address size: 39 bits
2050 02:47:56.929886 call enable_fixed_mtrr()
2051 02:47:56.932918 CPU physical address size: 39 bits
2052 02:47:56.936415 Checking segment from ROM address 0xffdd16f8
2053 02:47:56.939431 CPU physical address size: 39 bits
2054 02:47:56.946820 Checking segment from ROM address 0xffdd1714
2055 02:47:56.949709 Loading segment from ROM address 0xffdd16f8
2056 02:47:56.953347 code (compression=0)
2057 02:47:56.959202 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2058 02:47:56.969630 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2059 02:47:56.972382 it's not compressed!
2060 02:47:57.063830 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2061 02:47:57.070880 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2062 02:47:57.073828 Loading segment from ROM address 0xffdd1714
2063 02:47:57.077264 Entry Point 0x30000000
2064 02:47:57.080737 Loaded segments
2065 02:47:57.085762 Finalizing chipset.
2066 02:47:57.089091 Finalizing SMM.
2067 02:47:57.092510 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2068 02:47:57.095829 mp_park_aps done after 0 msecs.
2069 02:47:57.102203 Jumping to boot code at 30000000(99b62000)
2070 02:47:57.108853 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2071 02:47:57.109441
2072 02:47:57.109866
2073 02:47:57.110230
2074 02:47:57.112192 Starting depthcharge on Helios...
2075 02:47:57.112774
2076 02:47:57.113966 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2077 02:47:57.114608 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2078 02:47:57.115079 Setting prompt string to ['hatch:']
2079 02:47:57.115529 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2080 02:47:57.122143 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 02:47:57.122724
2082 02:47:57.128675 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 02:47:57.129248
2084 02:47:57.135370 board_setup: Info: eMMC controller not present; skipping
2085 02:47:57.135885
2086 02:47:57.139396 New NVMe Controller 0x30053ac0 @ 00:1d:00
2087 02:47:57.139885
2088 02:47:57.145551 board_setup: Info: SDHCI controller not present; skipping
2089 02:47:57.146129
2090 02:47:57.151774 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2091 02:47:57.152354
2092 02:47:57.152737 Wipe memory regions:
2093 02:47:57.153092
2094 02:47:57.155230 [0x00000000001000, 0x000000000a0000)
2095 02:47:57.155827
2096 02:47:57.161658 [0x00000000100000, 0x00000030000000)
2097 02:47:57.162244
2098 02:47:57.228210 [0x00000030657430, 0x00000099a2c000)
2099 02:47:57.228785
2100 02:47:57.376221 [0x00000100000000, 0x0000045e800000)
2101 02:47:57.376810
2102 02:47:58.760002 R8152: Initializing
2103 02:47:58.760580
2104 02:47:58.763014 Version 9 (ocp_data = 6010)
2105 02:47:58.763595
2106 02:47:58.767566 R8152: Done initializing
2107 02:47:58.768144
2108 02:47:58.770637 Adding net device
2109 02:47:58.771119
2110 02:47:59.380147 R8152: Initializing
2111 02:47:59.380723
2112 02:47:59.383040 Version 6 (ocp_data = 5c30)
2113 02:47:59.383513
2114 02:47:59.385953 R8152: Done initializing
2115 02:47:59.386035
2116 02:47:59.392887 net_add_device: Attemp to include the same device
2117 02:47:59.393055
2118 02:47:59.399731 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2119 02:47:59.399902
2120 02:47:59.399987
2121 02:47:59.400060
2122 02:47:59.400364 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 02:47:59.501374 hatch: tftpboot 192.168.201.1 8867183/tftp-deploy-wiq8hi8m/kernel/bzImage 8867183/tftp-deploy-wiq8hi8m/kernel/cmdline 8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
2125 02:47:59.502098 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2126 02:47:59.502556 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2127 02:47:59.506896 tftpboot 192.168.201.1 8867183/tftp-deploy-wiq8hi8m/kernel/bzImay-wiq8hi8m/kernel/cmdline 8867183/tftp-deploy-wiq8hi8m/ramdisk/ramdisk.cpio.gz
2128 02:47:59.507381
2129 02:47:59.507756 Waiting for link
2130 02:47:59.508099
2131 02:47:59.707758 done.
2132 02:47:59.708334
2133 02:47:59.708829 MAC: 00:24:32:50:1a:5f
2134 02:47:59.709313
2135 02:47:59.711474 Sending DHCP discover... done.
2136 02:47:59.711955
2137 02:47:59.714210 Waiting for reply... done.
2138 02:47:59.714787
2139 02:47:59.718008 Sending DHCP request... done.
2140 02:47:59.718586
2141 02:47:59.720957 Waiting for reply... done.
2142 02:47:59.721439
2143 02:47:59.724505 My ip is 192.168.201.21
2144 02:47:59.725084
2145 02:47:59.728106 The DHCP server ip is 192.168.201.1
2146 02:47:59.728690
2147 02:47:59.730913 TFTP server IP predefined by user: 192.168.201.1
2148 02:47:59.731524
2149 02:47:59.737422 Bootfile predefined by user: 8867183/tftp-deploy-wiq8hi8m/kernel/bzImage
2150 02:47:59.738043
2151 02:47:59.740604 Sending tftp read request... done.
2152 02:47:59.741086
2153 02:47:59.748193 Waiting for the transfer...
2154 02:47:59.748697
2155 02:48:00.413849 00000000 ################################################################
2156 02:48:00.414383
2157 02:48:01.097725 00080000 ################################################################
2158 02:48:01.098292
2159 02:48:01.776837 00100000 ################################################################
2160 02:48:01.777356
2161 02:48:02.435406 00180000 ################################################################
2162 02:48:02.435926
2163 02:48:03.113962 00200000 ################################################################
2164 02:48:03.114488
2165 02:48:03.778784 00280000 ################################################################
2166 02:48:03.779306
2167 02:48:04.455661 00300000 ################################################################
2168 02:48:04.455799
2169 02:48:05.049767 00380000 ################################################################
2170 02:48:05.049920
2171 02:48:05.724304 00400000 ################################################################
2172 02:48:05.724931
2173 02:48:06.357748 00480000 ################################################################
2174 02:48:06.357907
2175 02:48:07.022799 00500000 ################################################################
2176 02:48:07.023370
2177 02:48:07.700946 00580000 ################################################################
2178 02:48:07.701550
2179 02:48:08.379785 00600000 ################################################################
2180 02:48:08.380311
2181 02:48:09.060236 00680000 ################################################################
2182 02:48:09.060766
2183 02:48:09.342252 00700000 ############################ done.
2184 02:48:09.342775
2185 02:48:09.345700 The bootfile was 7569296 bytes long.
2186 02:48:09.346140
2187 02:48:09.348549 Sending tftp read request... done.
2188 02:48:09.348977
2189 02:48:09.351563 Waiting for the transfer...
2190 02:48:09.352164
2191 02:48:10.069021 00000000 ################################################################
2192 02:48:10.069626
2193 02:48:10.771482 00080000 ################################################################
2194 02:48:10.772013
2195 02:48:11.486493 00100000 ################################################################
2196 02:48:11.487159
2197 02:48:12.201057 00180000 ################################################################
2198 02:48:12.201680
2199 02:48:12.891346 00200000 ################################################################
2200 02:48:12.891977
2201 02:48:13.596712 00280000 ################################################################
2202 02:48:13.597277
2203 02:48:14.307455 00300000 ################################################################
2204 02:48:14.307983
2205 02:48:15.016907 00380000 ################################################################
2206 02:48:15.017535
2207 02:48:15.722949 00400000 ################################################################
2208 02:48:15.723569
2209 02:48:16.424493 00480000 ################################################################
2210 02:48:16.425048
2211 02:48:16.774609 00500000 ################################ done.
2212 02:48:16.775208
2213 02:48:16.777734 Sending tftp read request... done.
2214 02:48:16.778217
2215 02:48:16.781686 Waiting for the transfer...
2216 02:48:16.782258
2217 02:48:16.782648 00000000 # done.
2218 02:48:16.783018
2219 02:48:16.791203 Command line loaded dynamically from TFTP file: 8867183/tftp-deploy-wiq8hi8m/kernel/cmdline
2220 02:48:16.791836
2221 02:48:16.813789 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8867183/extract-nfsrootfs-y5tqfqzz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2222 02:48:16.814391
2223 02:48:16.820595 ec_init(0): CrosEC protocol v3 supported (256, 256)
2224 02:48:16.821102
2225 02:48:16.827377 Shutting down all USB controllers.
2226 02:48:16.827859
2227 02:48:16.828245 Removing current net device
2228 02:48:16.828601
2229 02:48:16.835626 Finalizing coreboot
2230 02:48:16.836197
2231 02:48:16.842111 Exiting depthcharge with code 4 at timestamp: 27069369
2232 02:48:16.842693
2233 02:48:16.843086
2234 02:48:16.843445 Starting kernel ...
2235 02:48:16.843790
2236 02:48:16.844124
2237 02:48:16.845412 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2238 02:48:16.845975 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2239 02:48:16.846388 Setting prompt string to ['Linux version [0-9]']
2240 02:48:16.846775 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2241 02:48:16.847166 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2242 02:48:16.848122
2244 02:52:38.846950 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2246 02:52:38.848115 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2248 02:52:38.848993 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2251 02:52:38.850483 end: 2 depthcharge-action (duration 00:05:00) [common]
2253 02:52:38.851614 Cleaning after the job
2254 02:52:38.851696 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/ramdisk
2255 02:52:38.852154 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/kernel
2256 02:52:38.852697 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/nfsrootfs
2257 02:52:38.890477 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867183/tftp-deploy-wiq8hi8m/modules
2258 02:52:38.890774 start: 4.1 power-off (timeout 00:00:30) [common]
2259 02:52:38.890928 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2260 02:52:38.909928 >> Command sent successfully.
2261 02:52:38.911749 Returned 0 in 0 seconds
2262 02:52:39.012917 end: 4.1 power-off (duration 00:00:00) [common]
2264 02:52:39.014607 start: 4.2 read-feedback (timeout 00:10:00) [common]
2265 02:52:39.015861 Listened to connection for namespace 'common' for up to 1s
2266 02:52:39.991193 Listened to connection for namespace 'common' for up to 1s
2267 02:52:39.994062 Listened to connection for namespace 'common' for up to 1s
2268 02:52:39.997431 Listened to connection for namespace 'common' for up to 1s
2269 02:52:40.000699 Listened to connection for namespace 'common' for up to 1s
2270 02:52:40.003956 Listened to connection for namespace 'common' for up to 1s
2271 02:52:40.007343 Listened to connection for namespace 'common' for up to 1s
2272 02:52:40.010880 Listened to connection for namespace 'common' for up to 1s
2273 02:52:40.014040 Listened to connection for namespace 'common' for up to 1s
2274 02:52:40.015250 Finalising connection for namespace 'common'
2275 02:52:40.015466 Disconnecting from shell: Finalise
2276 02:52:40.015620
2277 02:52:40.116735 end: 4.2 read-feedback (duration 00:00:01) [common]
2278 02:52:40.117440 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8867183
2279 02:52:40.320855 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8867183
2280 02:52:40.321049 JobError: Your job cannot terminate cleanly.