Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 02:40:55.551981 lava-dispatcher, installed at version: 2022.11
2 02:40:55.552194 start: 0 validate
3 02:40:55.552338 Start time: 2023-01-25 02:40:55.552330+00:00 (UTC)
4 02:40:55.552481 Using caching service: 'http://localhost/cache/?uri=%s'
5 02:40:55.552623 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 02:40:55.555532 Using caching service: 'http://localhost/cache/?uri=%s'
7 02:40:55.555668 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 02:40:55.561895 Using caching service: 'http://localhost/cache/?uri=%s'
9 02:40:55.562058 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 02:40:55.563704 Using caching service: 'http://localhost/cache/?uri=%s'
11 02:40:55.563827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 02:40:55.566672 validate duration: 0.01
14 02:40:55.566926 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 02:40:55.567052 start: 1.1 download-retry (timeout 00:10:00) [common]
16 02:40:55.567143 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 02:40:55.567262 Not decompressing ramdisk as can be used compressed.
18 02:40:55.567348 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/initrd.cpio.gz
19 02:40:55.567423 saving as /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/ramdisk/initrd.cpio.gz
20 02:40:55.567486 total size: 5432131 (5MB)
21 02:40:55.569794 progress 0% (0MB)
22 02:40:55.575100 progress 5% (0MB)
23 02:40:55.579528 progress 10% (0MB)
24 02:40:55.583713 progress 15% (0MB)
25 02:40:55.588923 progress 20% (1MB)
26 02:40:55.592912 progress 25% (1MB)
27 02:40:55.597290 progress 30% (1MB)
28 02:40:55.602724 progress 35% (1MB)
29 02:40:55.606915 progress 40% (2MB)
30 02:40:55.611485 progress 45% (2MB)
31 02:40:55.616144 progress 50% (2MB)
32 02:40:55.621594 progress 55% (2MB)
33 02:40:55.624990 progress 60% (3MB)
34 02:40:55.629994 progress 65% (3MB)
35 02:40:55.634376 progress 70% (3MB)
36 02:40:55.638957 progress 75% (3MB)
37 02:40:55.644002 progress 80% (4MB)
38 02:40:55.648611 progress 85% (4MB)
39 02:40:55.652839 progress 90% (4MB)
40 02:40:55.657607 progress 95% (4MB)
41 02:40:55.661643 progress 100% (5MB)
42 02:40:55.661937 5MB downloaded in 0.09s (54.85MB/s)
43 02:40:55.662104 end: 1.1.1 http-download (duration 00:00:00) [common]
45 02:40:55.662376 end: 1.1 download-retry (duration 00:00:00) [common]
46 02:40:55.662478 start: 1.2 download-retry (timeout 00:10:00) [common]
47 02:40:55.662571 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 02:40:55.662689 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 02:40:55.662761 saving as /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/kernel/bzImage
50 02:40:55.662835 total size: 7569296 (7MB)
51 02:40:55.662899 No compression specified
52 02:40:55.665124 progress 0% (0MB)
53 02:40:55.671448 progress 5% (0MB)
54 02:40:55.678003 progress 10% (0MB)
55 02:40:55.685104 progress 15% (1MB)
56 02:40:55.690840 progress 20% (1MB)
57 02:40:55.697578 progress 25% (1MB)
58 02:40:55.704680 progress 30% (2MB)
59 02:40:55.710818 progress 35% (2MB)
60 02:40:55.717158 progress 40% (2MB)
61 02:40:55.722855 progress 45% (3MB)
62 02:40:55.729605 progress 50% (3MB)
63 02:40:55.735963 progress 55% (4MB)
64 02:40:55.742140 progress 60% (4MB)
65 02:40:55.749407 progress 65% (4MB)
66 02:40:55.755573 progress 70% (5MB)
67 02:40:55.761889 progress 75% (5MB)
68 02:40:55.768220 progress 80% (5MB)
69 02:40:55.774772 progress 85% (6MB)
70 02:40:55.781878 progress 90% (6MB)
71 02:40:55.787812 progress 95% (6MB)
72 02:40:55.794003 progress 100% (7MB)
73 02:40:55.794313 7MB downloaded in 0.13s (54.91MB/s)
74 02:40:55.794477 end: 1.2.1 http-download (duration 00:00:00) [common]
76 02:40:55.794731 end: 1.2 download-retry (duration 00:00:00) [common]
77 02:40:55.794831 start: 1.3 download-retry (timeout 00:10:00) [common]
78 02:40:55.794922 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 02:40:55.795036 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/full.rootfs.tar.xz
80 02:40:55.795105 saving as /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/nfsrootfs/full.rootfs.tar
81 02:40:55.795168 total size: 123909728 (118MB)
82 02:40:55.795238 Using unxz to decompress xz
83 02:40:55.807064 progress 0% (0MB)
84 02:40:56.260435 progress 5% (5MB)
85 02:40:56.723307 progress 10% (11MB)
86 02:40:57.189965 progress 15% (17MB)
87 02:40:57.662107 progress 20% (23MB)
88 02:40:57.990856 progress 25% (29MB)
89 02:40:58.322066 progress 30% (35MB)
90 02:40:58.591502 progress 35% (41MB)
91 02:40:58.756031 progress 40% (47MB)
92 02:40:59.113468 progress 45% (53MB)
93 02:40:59.467295 progress 50% (59MB)
94 02:40:59.792007 progress 55% (65MB)
95 02:41:00.140914 progress 60% (70MB)
96 02:41:00.469586 progress 65% (76MB)
97 02:41:00.844382 progress 70% (82MB)
98 02:41:01.251809 progress 75% (88MB)
99 02:41:01.663224 progress 80% (94MB)
100 02:41:01.786086 progress 85% (100MB)
101 02:41:01.944110 progress 90% (106MB)
102 02:41:02.271251 progress 95% (112MB)
103 02:41:02.647643 progress 100% (118MB)
104 02:41:02.653282 118MB downloaded in 6.86s (17.23MB/s)
105 02:41:02.653587 end: 1.3.1 http-download (duration 00:00:07) [common]
107 02:41:02.653857 end: 1.3 download-retry (duration 00:00:07) [common]
108 02:41:02.653949 start: 1.4 download-retry (timeout 00:09:53) [common]
109 02:41:02.654039 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 02:41:02.654158 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 02:41:02.654232 saving as /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/modules/modules.tar
112 02:41:02.654295 total size: 51848 (0MB)
113 02:41:02.654359 Using unxz to decompress xz
114 02:41:02.680188 progress 63% (0MB)
115 02:41:02.683926 progress 100% (0MB)
116 02:41:02.685426 0MB downloaded in 0.03s (1.59MB/s)
117 02:41:02.685746 end: 1.4.1 http-download (duration 00:00:00) [common]
119 02:41:02.686018 end: 1.4 download-retry (duration 00:00:00) [common]
120 02:41:02.686116 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 02:41:02.686212 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 02:41:04.358604 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8867166/extract-nfsrootfs-avqedi_7
123 02:41:04.358815 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 02:41:04.358923 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 02:41:04.359066 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq
126 02:41:04.359171 makedir: /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin
127 02:41:04.359258 makedir: /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/tests
128 02:41:04.359341 makedir: /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/results
129 02:41:04.359441 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-add-keys
130 02:41:04.359572 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-add-sources
131 02:41:04.359686 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-background-process-start
132 02:41:04.359802 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-background-process-stop
133 02:41:04.359914 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-common-functions
134 02:41:04.360025 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-echo-ipv4
135 02:41:04.360140 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-install-packages
136 02:41:04.360252 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-installed-packages
137 02:41:04.360361 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-os-build
138 02:41:04.360471 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-probe-channel
139 02:41:04.360581 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-probe-ip
140 02:41:04.360691 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-target-ip
141 02:41:04.360800 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-target-mac
142 02:41:04.360909 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-target-storage
143 02:41:04.361021 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-case
144 02:41:04.361132 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-event
145 02:41:04.361240 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-feedback
146 02:41:04.361349 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-raise
147 02:41:04.361457 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-reference
148 02:41:04.361570 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-runner
149 02:41:04.361680 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-set
150 02:41:04.361790 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-test-shell
151 02:41:04.361902 Updating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-install-packages (oe)
152 02:41:04.362017 Updating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/bin/lava-installed-packages (oe)
153 02:41:04.362115 Creating /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/environment
154 02:41:04.362201 LAVA metadata
155 02:41:04.362268 - LAVA_JOB_ID=8867166
156 02:41:04.362333 - LAVA_DISPATCHER_IP=192.168.201.1
157 02:41:04.362432 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 02:41:04.362499 skipped lava-vland-overlay
159 02:41:04.362577 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 02:41:04.362660 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 02:41:04.362725 skipped lava-multinode-overlay
162 02:41:04.362801 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 02:41:04.362882 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 02:41:04.362953 Loading test definitions
165 02:41:04.363047 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 02:41:04.363119 Using /lava-8867166 at stage 0
167 02:41:04.363219 Fetching tests from https://github.com/kernelci/test-definitions
168 02:41:04.363300 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/0/tests/0_ltp-ipc'
169 02:41:09.299369 Running '/usr/bin/git checkout kernelci.org
170 02:41:09.436450 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 02:41:09.437218 uuid=8867166_1.5.2.3.1 testdef=None
172 02:41:09.437384 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 02:41:09.437685 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 02:41:09.438489 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 02:41:09.438738 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 02:41:09.439751 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 02:41:09.440003 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 02:41:09.440976 runner path: /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/0/tests/0_ltp-ipc test_uuid 8867166_1.5.2.3.1
182 02:41:09.441074 SKIPFILE='skipfile-lkft.yaml'
183 02:41:09.441147 SKIP_INSTALL='true'
184 02:41:09.441209 TST_CMDFILES='ipc'
185 02:41:09.441350 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 02:41:09.441609 Creating lava-test-runner.conf files
188 02:41:09.441691 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8867166/lava-overlay-0ludxpvq/lava-8867166/0 for stage 0
189 02:41:09.441783 - 0_ltp-ipc
190 02:41:09.441891 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 02:41:09.441990 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 02:41:16.809860 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 02:41:16.810025 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 02:41:16.810120 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 02:41:16.810226 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 02:41:16.810319 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 02:41:16.910956 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 02:41:16.911314 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 02:41:16.911509 extracting modules file /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867166/extract-nfsrootfs-avqedi_7
200 02:41:16.915438 extracting modules file /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867166/extract-overlay-ramdisk-0uxuqvyb/ramdisk
201 02:41:16.919094 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 02:41:16.919202 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 02:41:16.919283 [common] Applying overlay to NFS
204 02:41:16.919353 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8867166/compress-overlay-5bugye58/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8867166/extract-nfsrootfs-avqedi_7
205 02:41:17.368910 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 02:41:17.369082 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
207 02:41:17.369179 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 02:41:17.369266 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
209 02:41:17.369345 Building ramdisk /var/lib/lava/dispatcher/tmp/8867166/extract-overlay-ramdisk-0uxuqvyb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8867166/extract-overlay-ramdisk-0uxuqvyb/ramdisk
210 02:41:17.402676 >> 24548 blocks
211 02:41:17.857555 rename /var/lib/lava/dispatcher/tmp/8867166/extract-overlay-ramdisk-0uxuqvyb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
212 02:41:17.857995 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 02:41:17.858121 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 02:41:17.858225 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 02:41:17.858320 No mkimage arch provided, not using FIT.
216 02:41:17.858407 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 02:41:17.858491 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 02:41:17.858590 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 02:41:17.858688 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 02:41:17.858765 No LXC device requested
221 02:41:17.858846 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 02:41:17.858934 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 02:41:17.859016 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 02:41:17.859090 Checking files for TFTP limit of 4294967296 bytes.
225 02:41:17.859468 end: 1 tftp-deploy (duration 00:00:22) [common]
226 02:41:17.859573 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 02:41:17.859667 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 02:41:17.859797 substitutions:
229 02:41:17.859865 - {DTB}: None
230 02:41:17.859929 - {INITRD}: 8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
231 02:41:17.859990 - {KERNEL}: 8867166/tftp-deploy-j3ou8tsd/kernel/bzImage
232 02:41:17.860049 - {LAVA_MAC}: None
233 02:41:17.860107 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8867166/extract-nfsrootfs-avqedi_7
234 02:41:17.860167 - {NFS_SERVER_IP}: 192.168.201.1
235 02:41:17.860223 - {PRESEED_CONFIG}: None
236 02:41:17.860278 - {PRESEED_LOCAL}: None
237 02:41:17.860334 - {RAMDISK}: 8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
238 02:41:17.860390 - {ROOT_PART}: None
239 02:41:17.860446 - {ROOT}: None
240 02:41:17.860501 - {SERVER_IP}: 192.168.201.1
241 02:41:17.860556 - {TEE}: None
242 02:41:17.860611 Parsed boot commands:
243 02:41:17.860665 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 02:41:17.860821 Parsed boot commands: tftpboot 192.168.201.1 8867166/tftp-deploy-j3ou8tsd/kernel/bzImage 8867166/tftp-deploy-j3ou8tsd/kernel/cmdline 8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
245 02:41:17.860911 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 02:41:17.861001 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 02:41:17.861094 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 02:41:17.861182 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 02:41:17.861256 Not connected, no need to disconnect.
250 02:41:17.861335 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 02:41:17.861417 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 02:41:17.861489 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
253 02:41:17.864215 Setting prompt string to ['lava-test: # ']
254 02:41:17.864493 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 02:41:17.864596 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 02:41:17.864693 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 02:41:17.864785 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 02:41:17.864965 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
259 02:41:17.883814 >> Command sent successfully.
260 02:41:17.885875 Returned 0 in 0 seconds
261 02:41:17.986971 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 02:41:17.988260 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 02:41:17.988718 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 02:41:17.989103 Setting prompt string to 'Starting depthcharge on Helios...'
266 02:41:17.989428 Changing prompt to 'Starting depthcharge on Helios...'
267 02:41:17.989805 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 02:41:17.990970 [Enter `^Ec?' for help]
269 02:41:23.963451
270 02:41:23.964106
271 02:41:23.973470 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 02:41:23.976399 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 02:41:23.983382 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 02:41:23.986795 CPU: AES supported, TXT NOT supported, VT supported
275 02:41:23.993984 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 02:41:23.997014 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 02:41:24.003743 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 02:41:24.006864 VBOOT: Loading verstage.
279 02:41:24.010412 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 02:41:24.017118 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 02:41:24.020101 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 02:41:24.023591 CBFS @ c08000 size 3f8000
283 02:41:24.030263 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 02:41:24.033259 CBFS: Locating 'fallback/verstage'
285 02:41:24.036930 CBFS: Found @ offset 10fb80 size 1072c
286 02:41:24.037543
287 02:41:24.040212
288 02:41:24.040795
289 02:41:24.050383 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 02:41:24.064314 Probing TPM: . done!
291 02:41:24.067406 TPM ready after 0 ms
292 02:41:24.070819 Connected to device vid:did:rid of 1ae0:0028:00
293 02:41:24.081330 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 02:41:24.084928 Initialized TPM device CR50 revision 0
295 02:41:24.128460 tlcl_send_startup: Startup return code is 0
296 02:41:24.129127 TPM: setup succeeded
297 02:41:24.141011 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 02:41:24.144870 Chrome EC: UHEPI supported
299 02:41:24.148585 Phase 1
300 02:41:24.151346 FMAP: area GBB found @ c05000 (12288 bytes)
301 02:41:24.157750 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 02:41:24.161725 Phase 2
303 02:41:24.162299 Phase 3
304 02:41:24.164553 FMAP: area GBB found @ c05000 (12288 bytes)
305 02:41:24.171022 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 02:41:24.178175 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 02:41:24.181616 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 02:41:24.188026 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 02:41:24.203965 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 02:41:24.206992 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 02:41:24.213408 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 02:41:24.217659 Phase 4
313 02:41:24.220661 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 02:41:24.228106 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 02:41:24.407511 VB2:vb2_rsa_verify_digest() Digest check failed!
316 02:41:24.410975 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 02:41:24.413863
318 02:41:24.414440 Saving nvdata
319 02:41:24.417254 Reboot requested (10020007)
320 02:41:24.420509 board_reset() called!
321 02:41:24.420992 full_reset() called!
322 02:41:28.930727
323 02:41:28.931312
324 02:41:28.941036 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
325 02:41:28.943671 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
326 02:41:28.950738 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
327 02:41:28.954181 CPU: AES supported, TXT NOT supported, VT supported
328 02:41:28.960450 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
329 02:41:28.964153 PCH: device id 0284 (rev 00) is Cometlake-U Premium
330 02:41:28.970583 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
331 02:41:28.973694 VBOOT: Loading verstage.
332 02:41:28.977121 FMAP: Found "FLASH" version 1.1 at 0xc04000.
333 02:41:28.983448 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
334 02:41:28.990181 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 02:41:28.990694 CBFS @ c08000 size 3f8000
336 02:41:28.996521 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 02:41:29.000760 CBFS: Locating 'fallback/verstage'
338 02:41:29.003637 CBFS: Found @ offset 10fb80 size 1072c
339 02:41:29.007721
340 02:41:29.008312
341 02:41:29.017755 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
342 02:41:29.031953 Probing TPM: . done!
343 02:41:29.035435 TPM ready after 0 ms
344 02:41:29.038696 Connected to device vid:did:rid of 1ae0:0028:00
345 02:41:29.048912 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
346 02:41:29.052152 Initialized TPM device CR50 revision 0
347 02:41:29.095926 tlcl_send_startup: Startup return code is 0
348 02:41:29.096507 TPM: setup succeeded
349 02:41:29.108555 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
350 02:41:29.112386 Chrome EC: UHEPI supported
351 02:41:29.115430 Phase 1
352 02:41:29.118983 FMAP: area GBB found @ c05000 (12288 bytes)
353 02:41:29.125604 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
354 02:41:29.132568 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
355 02:41:29.135825 Recovery requested (1009000e)
356 02:41:29.142014 Saving nvdata
357 02:41:29.147540 tlcl_extend: response is 0
358 02:41:29.156314 tlcl_extend: response is 0
359 02:41:29.163279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 02:41:29.166995 CBFS @ c08000 size 3f8000
361 02:41:29.173096 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 02:41:29.176634 CBFS: Locating 'fallback/romstage'
363 02:41:29.179692 CBFS: Found @ offset 80 size 145fc
364 02:41:29.183407 Accumulated console time in verstage 98 ms
365 02:41:29.183899
366 02:41:29.184307
367 02:41:29.196248 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
368 02:41:29.202815 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
369 02:41:29.206161 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 02:41:29.209901 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 02:41:29.216316 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
372 02:41:29.220002 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
373 02:41:29.223411 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
374 02:41:29.226331 TCO_STS: 0000 0000
375 02:41:29.229705 GEN_PMCON: e0015238 00000200
376 02:41:29.232911 GBLRST_CAUSE: 00000000 00000000
377 02:41:29.233525 prev_sleep_state 5
378 02:41:29.236329 Boot Count incremented to 52512
379 02:41:29.243102 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 02:41:29.245906 CBFS @ c08000 size 3f8000
381 02:41:29.249860 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 02:41:29.252876
383 02:41:29.253450 CBFS: Locating 'fspm.bin'
384 02:41:29.256227 CBFS: Found @ offset 5ffc0 size 71000
385 02:41:29.259335
386 02:41:29.262685 Chrome EC: UHEPI supported
387 02:41:29.269356 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
388 02:41:29.273236 Probing TPM: done!
389 02:41:29.279585 Connected to device vid:did:rid of 1ae0:0028:00
390 02:41:29.289732 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
391 02:41:29.295592 Initialized TPM device CR50 revision 0
392 02:41:29.304295 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 02:41:29.311436 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
394 02:41:29.314208 MRC cache found, size 1948
395 02:41:29.317950 bootmode is set to: 2
396 02:41:29.321103 PRMRR disabled by config.
397 02:41:29.321884 SPD INDEX = 1
398 02:41:29.324342
399 02:41:29.327805 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 02:41:29.331339 CBFS @ c08000 size 3f8000
401 02:41:29.337656 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 02:41:29.338307 CBFS: Locating 'spd.bin'
403 02:41:29.341557 CBFS: Found @ offset 5fb80 size 400
404 02:41:29.344520 SPD: module type is LPDDR3
405 02:41:29.347362 SPD: module part is
406 02:41:29.354289 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
407 02:41:29.357899 SPD: device width 4 bits, bus width 8 bits
408 02:41:29.360817 SPD: module size is 4096 MB (per channel)
409 02:41:29.364339 memory slot: 0 configuration done.
410 02:41:29.367530 memory slot: 2 configuration done.
411 02:41:29.419363 CBMEM:
412 02:41:29.422354 IMD: root @ 99fff000 254 entries.
413 02:41:29.425829 IMD: root @ 99ffec00 62 entries.
414 02:41:29.428830 External stage cache:
415 02:41:29.432588 IMD: root @ 9abff000 254 entries.
416 02:41:29.435557 IMD: root @ 9abfec00 62 entries.
417 02:41:29.438671 Chrome EC: clear events_b mask to 0x0000000020004000
418 02:41:29.455224 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 02:41:29.468075 tlcl_write: response is 0
420 02:41:29.477879 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 02:41:29.483617 MRC: TPM MRC hash updated successfully.
422 02:41:29.484201 2 DIMMs found
423 02:41:29.486787 SMM Memory Map
424 02:41:29.490539 SMRAM : 0x9a000000 0x1000000
425 02:41:29.493588 Subregion 0: 0x9a000000 0xa00000
426 02:41:29.497096 Subregion 1: 0x9aa00000 0x200000
427 02:41:29.500569 Subregion 2: 0x9ac00000 0x400000
428 02:41:29.503716 top_of_ram = 0x9a000000
429 02:41:29.506934 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 02:41:29.513764 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 02:41:29.517104 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 02:41:29.523274 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 02:41:29.526717 CBFS @ c08000 size 3f8000
434 02:41:29.530050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 02:41:29.533193 CBFS: Locating 'fallback/postcar'
436 02:41:29.540153 CBFS: Found @ offset 107000 size 4b44
437 02:41:29.543491 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 02:41:29.546699
439 02:41:29.556452 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 02:41:29.559619 Processing 180 relocs. Offset value of 0x97c0c000
441 02:41:29.568288 Accumulated console time in romstage 286 ms
442 02:41:29.568879
443 02:41:29.569385
444 02:41:29.577914 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 02:41:29.584156 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 02:41:29.587561 CBFS @ c08000 size 3f8000
447 02:41:29.590950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 02:41:29.597653 CBFS: Locating 'fallback/ramstage'
449 02:41:29.600921 CBFS: Found @ offset 43380 size 1b9e8
450 02:41:29.607738 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 02:41:29.639753 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 02:41:29.643262 Processing 3976 relocs. Offset value of 0x98db0000
453 02:41:29.649846 Accumulated console time in postcar 52 ms
454 02:41:29.650444
455 02:41:29.650956
456 02:41:29.659608 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 02:41:29.666354 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 02:41:29.669342 WARNING: RO_VPD is uninitialized or empty.
459 02:41:29.672592 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 02:41:29.679334 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 02:41:29.679971 Normal boot.
462 02:41:29.686123 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 02:41:29.690316 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 02:41:29.692995 CBFS @ c08000 size 3f8000
465 02:41:29.699486 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 02:41:29.702948 CBFS: Locating 'cpu_microcode_blob.bin'
467 02:41:29.706436 CBFS: Found @ offset 14700 size 2ec00
468 02:41:29.709445 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 02:41:29.712778 Skip microcode update
470 02:41:29.716111 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 02:41:29.719780 CBFS @ c08000 size 3f8000
472 02:41:29.726130 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 02:41:29.729440 CBFS: Locating 'fsps.bin'
474 02:41:29.733141 CBFS: Found @ offset d1fc0 size 35000
475 02:41:29.758076 Detected 4 core, 8 thread CPU.
476 02:41:29.761215 Setting up SMI for CPU
477 02:41:29.764615 IED base = 0x9ac00000
478 02:41:29.765211 IED size = 0x00400000
479 02:41:29.767519 Will perform SMM setup.
480 02:41:29.774822 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 02:41:29.781237 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 02:41:29.784122 Processing 16 relocs. Offset value of 0x00030000
483 02:41:29.788218 Attempting to start 7 APs
484 02:41:29.791257 Waiting for 10ms after sending INIT.
485 02:41:29.807913 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
486 02:41:29.808515 done.
487 02:41:29.811018 AP: slot 1 apic_id 2.
488 02:41:29.814235 AP: slot 3 apic_id 3.
489 02:41:29.814731 AP: slot 4 apic_id 6.
490 02:41:29.817553 AP: slot 5 apic_id 7.
491 02:41:29.820920 Waiting for 2nd SIPI to complete...done.
492 02:41:29.824706 AP: slot 6 apic_id 4.
493 02:41:29.827847 AP: slot 7 apic_id 5.
494 02:41:29.834624 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 02:41:29.837643 Processing 13 relocs. Offset value of 0x00038000
496 02:41:29.840849
497 02:41:29.844241 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 02:41:29.851055 Installing SMM handler to 0x9a000000
499 02:41:29.857509 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 02:41:29.861132 Processing 658 relocs. Offset value of 0x9a010000
501 02:41:29.863971
502 02:41:29.870764 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 02:41:29.874447 Processing 13 relocs. Offset value of 0x9a008000
504 02:41:29.880337 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 02:41:29.887352 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 02:41:29.893889 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 02:41:29.897186 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 02:41:29.903764 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 02:41:29.910460 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 02:41:29.913558 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 02:41:29.920184 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 02:41:29.923915 Clearing SMI status registers
513 02:41:29.927185 SMI_STS: PM1
514 02:41:29.927679 PM1_STS: PWRBTN
515 02:41:29.930837 TCO_STS: SECOND_TO
516 02:41:29.933975 New SMBASE 0x9a000000
517 02:41:29.937632 In relocation handler: CPU 0
518 02:41:29.940884 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 02:41:29.944006 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 02:41:29.947030 Relocation complete.
521 02:41:29.950824 New SMBASE 0x99fff800
522 02:41:29.951414 In relocation handler: CPU 2
523 02:41:29.957230 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
524 02:41:29.960580 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 02:41:29.964152 Relocation complete.
526 02:41:29.967255 New SMBASE 0x99ffe800
527 02:41:29.967849 In relocation handler: CPU 6
528 02:41:29.974003 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
529 02:41:29.977266 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 02:41:29.980180 Relocation complete.
531 02:41:29.980697 New SMBASE 0x99ffec00
532 02:41:29.983666
533 02:41:29.984153 In relocation handler: CPU 5
534 02:41:29.990162 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
535 02:41:29.993459 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 02:41:29.997466 Relocation complete.
537 02:41:29.998092 New SMBASE 0x99fff000
538 02:41:30.000344 In relocation handler: CPU 4
539 02:41:30.007265 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 02:41:30.009997 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 02:41:30.013307 Relocation complete.
542 02:41:30.013954 New SMBASE 0x99ffe400
543 02:41:30.016822 In relocation handler: CPU 7
544 02:41:30.023020 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 02:41:30.026456 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 02:41:30.029791 Relocation complete.
547 02:41:30.030272 New SMBASE 0x99fff400
548 02:41:30.033642 In relocation handler: CPU 3
549 02:41:30.036774 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
550 02:41:30.043618 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 02:41:30.046581 Relocation complete.
552 02:41:30.047171 New SMBASE 0x99fffc00
553 02:41:30.049598 In relocation handler: CPU 1
554 02:41:30.053526 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 02:41:30.060150 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 02:41:30.063740 Relocation complete.
557 02:41:30.064328 Initializing CPU #0
558 02:41:30.066200 CPU: vendor Intel device 806ec
559 02:41:30.069871 CPU: family 06, model 8e, stepping 0c
560 02:41:30.073319 Clearing out pending MCEs
561 02:41:30.076281 Setting up local APIC...
562 02:41:30.079908 apic_id: 0x00 done.
563 02:41:30.080529 Turbo is available but hidden
564 02:41:30.083427 Turbo is available and visible
565 02:41:30.086151 VMX status: enabled
566 02:41:30.089523 IA32_FEATURE_CONTROL status: locked
567 02:41:30.092637 Skip microcode update
568 02:41:30.093146 CPU #0 initialized
569 02:41:30.096420 Initializing CPU #2
570 02:41:30.099447 Initializing CPU #7
571 02:41:30.100049 Initializing CPU #6
572 02:41:30.102959 CPU: vendor Intel device 806ec
573 02:41:30.106302 CPU: family 06, model 8e, stepping 0c
574 02:41:30.109152 Clearing out pending MCEs
575 02:41:30.112338 Initializing CPU #4
576 02:41:30.112824 Initializing CPU #5
577 02:41:30.116020 CPU: vendor Intel device 806ec
578 02:41:30.119326 CPU: family 06, model 8e, stepping 0c
579 02:41:30.122927
580 02:41:30.123621 Initializing CPU #3
581 02:41:30.126101 Initializing CPU #1
582 02:41:30.129537 CPU: vendor Intel device 806ec
583 02:41:30.132193 CPU: family 06, model 8e, stepping 0c
584 02:41:30.135849 CPU: vendor Intel device 806ec
585 02:41:30.138867 CPU: family 06, model 8e, stepping 0c
586 02:41:30.142306 Clearing out pending MCEs
587 02:41:30.142898 Clearing out pending MCEs
588 02:41:30.145886
589 02:41:30.146483 Setting up local APIC...
590 02:41:30.149220 Clearing out pending MCEs
591 02:41:30.152134 CPU: vendor Intel device 806ec
592 02:41:30.155411 CPU: family 06, model 8e, stepping 0c
593 02:41:30.159052 Setting up local APIC...
594 02:41:30.162398 apic_id: 0x03 done.
595 02:41:30.162987 Setting up local APIC...
596 02:41:30.165726 Clearing out pending MCEs
597 02:41:30.168994 apic_id: 0x06 done.
598 02:41:30.169616 Setting up local APIC...
599 02:41:30.172533
600 02:41:30.173125 apic_id: 0x02 done.
601 02:41:30.176168 VMX status: enabled
602 02:41:30.176758 VMX status: enabled
603 02:41:30.178777 IA32_FEATURE_CONTROL status: locked
604 02:41:30.182170
605 02:41:30.185663 IA32_FEATURE_CONTROL status: locked
606 02:41:30.186262 Skip microcode update
607 02:41:30.188730 Skip microcode update
608 02:41:30.192217 CPU #3 initialized
609 02:41:30.192795 CPU #1 initialized
610 02:41:30.195249 Setting up local APIC...
611 02:41:30.198618 CPU: vendor Intel device 806ec
612 02:41:30.202431 CPU: family 06, model 8e, stepping 0c
613 02:41:30.205548 CPU: vendor Intel device 806ec
614 02:41:30.209051 CPU: family 06, model 8e, stepping 0c
615 02:41:30.211930 VMX status: enabled
616 02:41:30.212417 apic_id: 0x07 done.
617 02:41:30.215301 Clearing out pending MCEs
618 02:41:30.218307 Clearing out pending MCEs
619 02:41:30.222073 Setting up local APIC...
620 02:41:30.222559 apic_id: 0x01 done.
621 02:41:30.224943 IA32_FEATURE_CONTROL status: locked
622 02:41:30.228680 VMX status: enabled
623 02:41:30.231617 Setting up local APIC...
624 02:41:30.235147 IA32_FEATURE_CONTROL status: locked
625 02:41:30.238846 Skip microcode update
626 02:41:30.239428 VMX status: enabled
627 02:41:30.241801 CPU #4 initialized
628 02:41:30.245156 IA32_FEATURE_CONTROL status: locked
629 02:41:30.245824 apic_id: 0x05 done.
630 02:41:30.248729
631 02:41:30.249308 apic_id: 0x04 done.
632 02:41:30.251589 VMX status: enabled
633 02:41:30.252074 VMX status: enabled
634 02:41:30.255109 Skip microcode update
635 02:41:30.258279 Skip microcode update
636 02:41:30.262420 IA32_FEATURE_CONTROL status: locked
637 02:41:30.264869 IA32_FEATURE_CONTROL status: locked
638 02:41:30.268773 Skip microcode update
639 02:41:30.269349 CPU #2 initialized
640 02:41:30.271503 CPU #5 initialized
641 02:41:30.272082 Skip microcode update
642 02:41:30.275175 CPU #7 initialized
643 02:41:30.278127 CPU #6 initialized
644 02:41:30.281359 bsp_do_flight_plan done after 457 msecs.
645 02:41:30.284995 CPU: frequency set to 4200 MHz
646 02:41:30.285620 Enabling SMIs.
647 02:41:30.287956 Locking SMM.
648 02:41:30.302051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 02:41:30.305617 CBFS @ c08000 size 3f8000
650 02:41:30.312099 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 02:41:30.312677 CBFS: Locating 'vbt.bin'
652 02:41:30.315460 CBFS: Found @ offset 5f5c0 size 499
653 02:41:30.322268 Found a VBT of 4608 bytes after decompression
654 02:41:30.506424 Display FSP Version Info HOB
655 02:41:30.509878 Reference Code - CPU = 9.0.1e.30
656 02:41:30.513077 uCode Version = 0.0.0.ca
657 02:41:30.516504 TXT ACM version = ff.ff.ff.ffff
658 02:41:30.519833 Display FSP Version Info HOB
659 02:41:30.522923 Reference Code - ME = 9.0.1e.30
660 02:41:30.526483 MEBx version = 0.0.0.0
661 02:41:30.529787 ME Firmware Version = Consumer SKU
662 02:41:30.533180 Display FSP Version Info HOB
663 02:41:30.536514 Reference Code - CML PCH = 9.0.1e.30
664 02:41:30.537102 PCH-CRID Status = Disabled
665 02:41:30.540009
666 02:41:30.542992 PCH-CRID Original Value = ff.ff.ff.ffff
667 02:41:30.546479 PCH-CRID New Value = ff.ff.ff.ffff
668 02:41:30.549689 OPROM - RST - RAID = ff.ff.ff.ffff
669 02:41:30.552830 ChipsetInit Base Version = ff.ff.ff.ffff
670 02:41:30.556417 ChipsetInit Oem Version = ff.ff.ff.ffff
671 02:41:30.560058 Display FSP Version Info HOB
672 02:41:30.566500 Reference Code - SA - System Agent = 9.0.1e.30
673 02:41:30.567083 Reference Code - MRC = 0.7.1.6c
674 02:41:30.569680
675 02:41:30.570263 SA - PCIe Version = 9.0.1e.30
676 02:41:30.572700 SA-CRID Status = Disabled
677 02:41:30.576497 SA-CRID Original Value = 0.0.0.c
678 02:41:30.579587 SA-CRID New Value = 0.0.0.c
679 02:41:30.582495 OPROM - VBIOS = ff.ff.ff.ffff
680 02:41:30.582983 RTC Init
681 02:41:30.586145
682 02:41:30.589356 Set power on after power failure.
683 02:41:30.589888 Disabling Deep S3
684 02:41:30.592438 Disabling Deep S3
685 02:41:30.592922 Disabling Deep S4
686 02:41:30.595735 Disabling Deep S4
687 02:41:30.596219 Disabling Deep S5
688 02:41:30.599640 Disabling Deep S5
689 02:41:30.605592 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
690 02:41:30.606081 Enumerating buses...
691 02:41:30.612534 Show all devs... Before device enumeration.
692 02:41:30.613125 Root Device: enabled 1
693 02:41:30.615825 CPU_CLUSTER: 0: enabled 1
694 02:41:30.618911 DOMAIN: 0000: enabled 1
695 02:41:30.622364 APIC: 00: enabled 1
696 02:41:30.622850 PCI: 00:00.0: enabled 1
697 02:41:30.625771 PCI: 00:02.0: enabled 1
698 02:41:30.629317 PCI: 00:04.0: enabled 0
699 02:41:30.629936 PCI: 00:05.0: enabled 0
700 02:41:30.632116 PCI: 00:12.0: enabled 1
701 02:41:30.635855 PCI: 00:12.5: enabled 0
702 02:41:30.638852 PCI: 00:12.6: enabled 0
703 02:41:30.639337 PCI: 00:14.0: enabled 1
704 02:41:30.642515 PCI: 00:14.1: enabled 0
705 02:41:30.645533 PCI: 00:14.3: enabled 1
706 02:41:30.648756 PCI: 00:14.5: enabled 0
707 02:41:30.649355 PCI: 00:15.0: enabled 1
708 02:41:30.652601 PCI: 00:15.1: enabled 1
709 02:41:30.655530 PCI: 00:15.2: enabled 0
710 02:41:30.659180 PCI: 00:15.3: enabled 0
711 02:41:30.659759 PCI: 00:16.0: enabled 1
712 02:41:30.662142 PCI: 00:16.1: enabled 0
713 02:41:30.666004 PCI: 00:16.2: enabled 0
714 02:41:30.666484 PCI: 00:16.3: enabled 0
715 02:41:30.668836 PCI: 00:16.4: enabled 0
716 02:41:30.672374 PCI: 00:16.5: enabled 0
717 02:41:30.675696 PCI: 00:17.0: enabled 1
718 02:41:30.676273 PCI: 00:19.0: enabled 1
719 02:41:30.678883 PCI: 00:19.1: enabled 0
720 02:41:30.682186 PCI: 00:19.2: enabled 0
721 02:41:30.685564 PCI: 00:1a.0: enabled 0
722 02:41:30.686144 PCI: 00:1c.0: enabled 0
723 02:41:30.688995 PCI: 00:1c.1: enabled 0
724 02:41:30.692159 PCI: 00:1c.2: enabled 0
725 02:41:30.692754 PCI: 00:1c.3: enabled 0
726 02:41:30.695602 PCI: 00:1c.4: enabled 0
727 02:41:30.698920 PCI: 00:1c.5: enabled 0
728 02:41:30.702648 PCI: 00:1c.6: enabled 0
729 02:41:30.703127 PCI: 00:1c.7: enabled 0
730 02:41:30.705543 PCI: 00:1d.0: enabled 1
731 02:41:30.709296 PCI: 00:1d.1: enabled 0
732 02:41:30.712746 PCI: 00:1d.2: enabled 0
733 02:41:30.713381 PCI: 00:1d.3: enabled 0
734 02:41:30.715862 PCI: 00:1d.4: enabled 0
735 02:41:30.719247 PCI: 00:1d.5: enabled 1
736 02:41:30.722037 PCI: 00:1e.0: enabled 1
737 02:41:30.722518 PCI: 00:1e.1: enabled 0
738 02:41:30.725191 PCI: 00:1e.2: enabled 1
739 02:41:30.728759 PCI: 00:1e.3: enabled 1
740 02:41:30.729238 PCI: 00:1f.0: enabled 1
741 02:41:30.732788 PCI: 00:1f.1: enabled 1
742 02:41:30.735287 PCI: 00:1f.2: enabled 1
743 02:41:30.738913 PCI: 00:1f.3: enabled 1
744 02:41:30.739390 PCI: 00:1f.4: enabled 1
745 02:41:30.742351 PCI: 00:1f.5: enabled 1
746 02:41:30.745913 PCI: 00:1f.6: enabled 0
747 02:41:30.746500 USB0 port 0: enabled 1
748 02:41:30.749407
749 02:41:30.750049 I2C: 00:15: enabled 1
750 02:41:30.752515 I2C: 00:5d: enabled 1
751 02:41:30.755816 GENERIC: 0.0: enabled 1
752 02:41:30.756394 I2C: 00:1a: enabled 1
753 02:41:30.758910 I2C: 00:38: enabled 1
754 02:41:30.762048 I2C: 00:39: enabled 1
755 02:41:30.762535 I2C: 00:3a: enabled 1
756 02:41:30.765773 I2C: 00:3b: enabled 1
757 02:41:30.768705 PCI: 00:00.0: enabled 1
758 02:41:30.769198 SPI: 00: enabled 1
759 02:41:30.772522 SPI: 01: enabled 1
760 02:41:30.775745 PNP: 0c09.0: enabled 1
761 02:41:30.776336 USB2 port 0: enabled 1
762 02:41:30.779178 USB2 port 1: enabled 1
763 02:41:30.781957 USB2 port 2: enabled 0
764 02:41:30.782472 USB2 port 3: enabled 0
765 02:41:30.785797 USB2 port 5: enabled 0
766 02:41:30.788672 USB2 port 6: enabled 1
767 02:41:30.791653 USB2 port 9: enabled 1
768 02:41:30.792144 USB3 port 0: enabled 1
769 02:41:30.795263 USB3 port 1: enabled 1
770 02:41:30.798794 USB3 port 2: enabled 1
771 02:41:30.799281 USB3 port 3: enabled 1
772 02:41:30.801710 USB3 port 4: enabled 0
773 02:41:30.805396 APIC: 02: enabled 1
774 02:41:30.806051 APIC: 01: enabled 1
775 02:41:30.808686 APIC: 03: enabled 1
776 02:41:30.812176 APIC: 06: enabled 1
777 02:41:30.812767 APIC: 07: enabled 1
778 02:41:30.814735 APIC: 04: enabled 1
779 02:41:30.815220 APIC: 05: enabled 1
780 02:41:30.818458 Compare with tree...
781 02:41:30.821683 Root Device: enabled 1
782 02:41:30.825224 CPU_CLUSTER: 0: enabled 1
783 02:41:30.825769 APIC: 00: enabled 1
784 02:41:30.828301 APIC: 02: enabled 1
785 02:41:30.831788 APIC: 01: enabled 1
786 02:41:30.832377 APIC: 03: enabled 1
787 02:41:30.835078 APIC: 06: enabled 1
788 02:41:30.838267 APIC: 07: enabled 1
789 02:41:30.838852 APIC: 04: enabled 1
790 02:41:30.841574 APIC: 05: enabled 1
791 02:41:30.844676 DOMAIN: 0000: enabled 1
792 02:41:30.848707 PCI: 00:00.0: enabled 1
793 02:41:30.849283 PCI: 00:02.0: enabled 1
794 02:41:30.852048 PCI: 00:04.0: enabled 0
795 02:41:30.854763 PCI: 00:05.0: enabled 0
796 02:41:30.858160 PCI: 00:12.0: enabled 1
797 02:41:30.858737 PCI: 00:12.5: enabled 0
798 02:41:30.861698
799 02:41:30.862180 PCI: 00:12.6: enabled 0
800 02:41:30.865323 PCI: 00:14.0: enabled 1
801 02:41:30.868277 USB0 port 0: enabled 1
802 02:41:30.872037 USB2 port 0: enabled 1
803 02:41:30.874795 USB2 port 1: enabled 1
804 02:41:30.875373 USB2 port 2: enabled 0
805 02:41:30.878411 USB2 port 3: enabled 0
806 02:41:30.881207 USB2 port 5: enabled 0
807 02:41:30.884602 USB2 port 6: enabled 1
808 02:41:30.888394 USB2 port 9: enabled 1
809 02:41:30.889133 USB3 port 0: enabled 1
810 02:41:30.891412 USB3 port 1: enabled 1
811 02:41:30.894386 USB3 port 2: enabled 1
812 02:41:30.897802 USB3 port 3: enabled 1
813 02:41:30.901299 USB3 port 4: enabled 0
814 02:41:30.905001 PCI: 00:14.1: enabled 0
815 02:41:30.905620 PCI: 00:14.3: enabled 1
816 02:41:30.907814 PCI: 00:14.5: enabled 0
817 02:41:30.911276 PCI: 00:15.0: enabled 1
818 02:41:30.914355 I2C: 00:15: enabled 1
819 02:41:30.914839 PCI: 00:15.1: enabled 1
820 02:41:30.917454 I2C: 00:5d: enabled 1
821 02:41:30.921277 GENERIC: 0.0: enabled 1
822 02:41:30.924555 PCI: 00:15.2: enabled 0
823 02:41:30.927547 PCI: 00:15.3: enabled 0
824 02:41:30.928026 PCI: 00:16.0: enabled 1
825 02:41:30.930647 PCI: 00:16.1: enabled 0
826 02:41:30.934103 PCI: 00:16.2: enabled 0
827 02:41:30.937452 PCI: 00:16.3: enabled 0
828 02:41:30.940878 PCI: 00:16.4: enabled 0
829 02:41:30.941350 PCI: 00:16.5: enabled 0
830 02:41:30.943850 PCI: 00:17.0: enabled 1
831 02:41:30.947502 PCI: 00:19.0: enabled 1
832 02:41:30.951090 I2C: 00:1a: enabled 1
833 02:41:30.954398 I2C: 00:38: enabled 1
834 02:41:30.955003 I2C: 00:39: enabled 1
835 02:41:30.957774 I2C: 00:3a: enabled 1
836 02:41:30.961019 I2C: 00:3b: enabled 1
837 02:41:30.964139 PCI: 00:19.1: enabled 0
838 02:41:30.964720 PCI: 00:19.2: enabled 0
839 02:41:30.967505 PCI: 00:1a.0: enabled 0
840 02:41:30.970696 PCI: 00:1c.0: enabled 0
841 02:41:30.973919 PCI: 00:1c.1: enabled 0
842 02:41:30.977579 PCI: 00:1c.2: enabled 0
843 02:41:30.978160 PCI: 00:1c.3: enabled 0
844 02:41:30.980959 PCI: 00:1c.4: enabled 0
845 02:41:30.984250 PCI: 00:1c.5: enabled 0
846 02:41:30.987503 PCI: 00:1c.6: enabled 0
847 02:41:30.990757 PCI: 00:1c.7: enabled 0
848 02:41:30.991379 PCI: 00:1d.0: enabled 1
849 02:41:30.993964 PCI: 00:1d.1: enabled 0
850 02:41:30.996950 PCI: 00:1d.2: enabled 0
851 02:41:31.000474 PCI: 00:1d.3: enabled 0
852 02:41:31.000955 PCI: 00:1d.4: enabled 0
853 02:41:31.004065 PCI: 00:1d.5: enabled 1
854 02:41:31.006934 PCI: 00:00.0: enabled 1
855 02:41:31.010971 PCI: 00:1e.0: enabled 1
856 02:41:31.014339 PCI: 00:1e.1: enabled 0
857 02:41:31.014918 PCI: 00:1e.2: enabled 1
858 02:41:31.017087 SPI: 00: enabled 1
859 02:41:31.020479 PCI: 00:1e.3: enabled 1
860 02:41:31.024055 SPI: 01: enabled 1
861 02:41:31.024591 PCI: 00:1f.0: enabled 1
862 02:41:31.027106 PNP: 0c09.0: enabled 1
863 02:41:31.030397 PCI: 00:1f.1: enabled 1
864 02:41:31.033497 PCI: 00:1f.2: enabled 1
865 02:41:31.037078 PCI: 00:1f.3: enabled 1
866 02:41:31.037581 PCI: 00:1f.4: enabled 1
867 02:41:31.040153 PCI: 00:1f.5: enabled 1
868 02:41:31.043605 PCI: 00:1f.6: enabled 0
869 02:41:31.047148 Root Device scanning...
870 02:41:31.050652 scan_static_bus for Root Device
871 02:41:31.051241 CPU_CLUSTER: 0 enabled
872 02:41:31.053414 DOMAIN: 0000 enabled
873 02:41:31.056829 DOMAIN: 0000 scanning...
874 02:41:31.060562 PCI: pci_scan_bus for bus 00
875 02:41:31.063741 PCI: 00:00.0 [8086/0000] ops
876 02:41:31.066851 PCI: 00:00.0 [8086/9b61] enabled
877 02:41:31.070571 PCI: 00:02.0 [8086/0000] bus ops
878 02:41:31.073952 PCI: 00:02.0 [8086/9b41] enabled
879 02:41:31.077407 PCI: 00:04.0 [8086/1903] disabled
880 02:41:31.080703 PCI: 00:08.0 [8086/1911] enabled
881 02:41:31.084078 PCI: 00:12.0 [8086/02f9] enabled
882 02:41:31.087372 PCI: 00:14.0 [8086/0000] bus ops
883 02:41:31.090071 PCI: 00:14.0 [8086/02ed] enabled
884 02:41:31.093863 PCI: 00:14.2 [8086/02ef] enabled
885 02:41:31.096758 PCI: 00:14.3 [8086/02f0] enabled
886 02:41:31.100193 PCI: 00:15.0 [8086/0000] bus ops
887 02:41:31.103949 PCI: 00:15.0 [8086/02e8] enabled
888 02:41:31.106649 PCI: 00:15.1 [8086/0000] bus ops
889 02:41:31.109986 PCI: 00:15.1 [8086/02e9] enabled
890 02:41:31.113406 PCI: 00:16.0 [8086/0000] ops
891 02:41:31.116864 PCI: 00:16.0 [8086/02e0] enabled
892 02:41:31.120074 PCI: 00:17.0 [8086/0000] ops
893 02:41:31.123226 PCI: 00:17.0 [8086/02d3] enabled
894 02:41:31.126736 PCI: 00:19.0 [8086/0000] bus ops
895 02:41:31.127217 PCI: 00:19.0 [8086/02c5] enabled
896 02:41:31.130060
897 02:41:31.133645 PCI: 00:1d.0 [8086/0000] bus ops
898 02:41:31.136535 PCI: 00:1d.0 [8086/02b0] enabled
899 02:41:31.139880 PCI: Static device PCI: 00:1d.5 not found, disabling it.
900 02:41:31.143216 PCI: 00:1e.0 [8086/0000] ops
901 02:41:31.147189 PCI: 00:1e.0 [8086/02a8] enabled
902 02:41:31.150140 PCI: 00:1e.2 [8086/0000] bus ops
903 02:41:31.153049 PCI: 00:1e.2 [8086/02aa] enabled
904 02:41:31.156975 PCI: 00:1e.3 [8086/0000] bus ops
905 02:41:31.159967 PCI: 00:1e.3 [8086/02ab] enabled
906 02:41:31.162949 PCI: 00:1f.0 [8086/0000] bus ops
907 02:41:31.166464 PCI: 00:1f.0 [8086/0284] enabled
908 02:41:31.173266 PCI: Static device PCI: 00:1f.1 not found, disabling it.
909 02:41:31.176632 PCI: Static device PCI: 00:1f.2 not found, disabling it.
910 02:41:31.180252
911 02:41:31.180831 PCI: 00:1f.3 [8086/0000] bus ops
912 02:41:31.183649
913 02:41:31.184127 PCI: 00:1f.3 [8086/02c8] enabled
914 02:41:31.186808 PCI: 00:1f.4 [8086/0000] bus ops
915 02:41:31.190126 PCI: 00:1f.4 [8086/02a3] enabled
916 02:41:31.193469 PCI: 00:1f.5 [8086/0000] bus ops
917 02:41:31.196396 PCI: 00:1f.5 [8086/02a4] enabled
918 02:41:31.200095 PCI: Leftover static devices:
919 02:41:31.203906 PCI: 00:05.0
920 02:41:31.204492 PCI: 00:12.5
921 02:41:31.206708 PCI: 00:12.6
922 02:41:31.207188 PCI: 00:14.1
923 02:41:31.207561 PCI: 00:14.5
924 02:41:31.210180 PCI: 00:15.2
925 02:41:31.210666 PCI: 00:15.3
926 02:41:31.213362 PCI: 00:16.1
927 02:41:31.213977 PCI: 00:16.2
928 02:41:31.214358 PCI: 00:16.3
929 02:41:31.216576
930 02:41:31.217156 PCI: 00:16.4
931 02:41:31.217579 PCI: 00:16.5
932 02:41:31.220083 PCI: 00:19.1
933 02:41:31.220662 PCI: 00:19.2
934 02:41:31.223195 PCI: 00:1a.0
935 02:41:31.223672 PCI: 00:1c.0
936 02:41:31.224050 PCI: 00:1c.1
937 02:41:31.226789 PCI: 00:1c.2
938 02:41:31.227268 PCI: 00:1c.3
939 02:41:31.230165 PCI: 00:1c.4
940 02:41:31.230642 PCI: 00:1c.5
941 02:41:31.231015 PCI: 00:1c.6
942 02:41:31.233325 PCI: 00:1c.7
943 02:41:31.233943 PCI: 00:1d.1
944 02:41:31.236769 PCI: 00:1d.2
945 02:41:31.237246 PCI: 00:1d.3
946 02:41:31.237662 PCI: 00:1d.4
947 02:41:31.240287
948 02:41:31.240870 PCI: 00:1d.5
949 02:41:31.241249 PCI: 00:1e.1
950 02:41:31.242743 PCI: 00:1f.1
951 02:41:31.243217 PCI: 00:1f.2
952 02:41:31.246656 PCI: 00:1f.6
953 02:41:31.247136 PCI: Check your devicetree.cb.
954 02:41:31.249600
955 02:41:31.250023 PCI: 00:02.0 scanning...
956 02:41:31.253106 scan_generic_bus for PCI: 00:02.0
957 02:41:31.259411 scan_generic_bus for PCI: 00:02.0 done
958 02:41:31.263188 scan_bus: scanning of bus PCI: 00:02.0 took 10179 usecs
959 02:41:31.266584 PCI: 00:14.0 scanning...
960 02:41:31.270176 scan_static_bus for PCI: 00:14.0
961 02:41:31.272656 USB0 port 0 enabled
962 02:41:31.273235 USB0 port 0 scanning...
963 02:41:31.276974 scan_static_bus for USB0 port 0
964 02:41:31.279770 USB2 port 0 enabled
965 02:41:31.283357 USB2 port 1 enabled
966 02:41:31.283833 USB2 port 2 disabled
967 02:41:31.286707 USB2 port 3 disabled
968 02:41:31.290066 USB2 port 5 disabled
969 02:41:31.290667 USB2 port 6 enabled
970 02:41:31.293233 USB2 port 9 enabled
971 02:41:31.293783 USB3 port 0 enabled
972 02:41:31.296124 USB3 port 1 enabled
973 02:41:31.299845 USB3 port 2 enabled
974 02:41:31.300435 USB3 port 3 enabled
975 02:41:31.302833 USB3 port 4 disabled
976 02:41:31.306094 USB2 port 0 scanning...
977 02:41:31.309586 scan_static_bus for USB2 port 0
978 02:41:31.312852 scan_static_bus for USB2 port 0 done
979 02:41:31.316342 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
980 02:41:31.319455
981 02:41:31.320039 USB2 port 1 scanning...
982 02:41:31.322962 scan_static_bus for USB2 port 1
983 02:41:31.326357 scan_static_bus for USB2 port 1 done
984 02:41:31.332422 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
985 02:41:31.336126 USB2 port 6 scanning...
986 02:41:31.338933 scan_static_bus for USB2 port 6
987 02:41:31.343184 scan_static_bus for USB2 port 6 done
988 02:41:31.349635 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
989 02:41:31.350214 USB2 port 9 scanning...
990 02:41:31.352774 scan_static_bus for USB2 port 9
991 02:41:31.355592 scan_static_bus for USB2 port 9 done
992 02:41:31.363051 scan_bus: scanning of bus USB2 port 9 took 9687 usecs
993 02:41:31.366120 USB3 port 0 scanning...
994 02:41:31.369444 scan_static_bus for USB3 port 0
995 02:41:31.372775 scan_static_bus for USB3 port 0 done
996 02:41:31.379208 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
997 02:41:31.379787 USB3 port 1 scanning...
998 02:41:31.382430 scan_static_bus for USB3 port 1
999 02:41:31.385820 scan_static_bus for USB3 port 1 done
1000 02:41:31.392316 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
1001 02:41:31.395806 USB3 port 2 scanning...
1002 02:41:31.399786 scan_static_bus for USB3 port 2
1003 02:41:31.402193 scan_static_bus for USB3 port 2 done
1004 02:41:31.409405 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1005 02:41:31.410020 USB3 port 3 scanning...
1006 02:41:31.412430 scan_static_bus for USB3 port 3
1007 02:41:31.415693 scan_static_bus for USB3 port 3 done
1008 02:41:31.419340
1009 02:41:31.422776 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1010 02:41:31.425667 scan_static_bus for USB0 port 0 done
1011 02:41:31.432708 scan_bus: scanning of bus USB0 port 0 took 155333 usecs
1012 02:41:31.435404 scan_static_bus for PCI: 00:14.0 done
1013 02:41:31.442010 scan_bus: scanning of bus PCI: 00:14.0 took 172952 usecs
1014 02:41:31.445893 PCI: 00:15.0 scanning...
1015 02:41:31.449292 scan_generic_bus for PCI: 00:15.0
1016 02:41:31.452035 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1017 02:41:31.455126 scan_generic_bus for PCI: 00:15.0 done
1018 02:41:31.462268 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1019 02:41:31.462855 PCI: 00:15.1 scanning...
1020 02:41:31.465703
1021 02:41:31.469003 scan_generic_bus for PCI: 00:15.1
1022 02:41:31.472499 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 02:41:31.475145 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 02:41:31.478611 scan_generic_bus for PCI: 00:15.1 done
1025 02:41:31.485078 scan_bus: scanning of bus PCI: 00:15.1 took 18583 usecs
1026 02:41:31.488861 PCI: 00:19.0 scanning...
1027 02:41:31.491726 scan_generic_bus for PCI: 00:19.0
1028 02:41:31.495054 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 02:41:31.498194 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 02:41:31.504986 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 02:41:31.509020 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 02:41:31.511715 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 02:41:31.514897 scan_generic_bus for PCI: 00:19.0 done
1034 02:41:31.521398 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
1035 02:41:31.524596 PCI: 00:1d.0 scanning...
1036 02:41:31.528104 do_pci_scan_bridge for PCI: 00:1d.0
1037 02:41:31.531520 PCI: pci_scan_bus for bus 01
1038 02:41:31.535503 PCI: 01:00.0 [1c5c/1327] enabled
1039 02:41:31.538341 Enabling Common Clock Configuration
1040 02:41:31.541749 L1 Sub-State supported from root port 29
1041 02:41:31.545739 L1 Sub-State Support = 0xf
1042 02:41:31.548441 CommonModeRestoreTime = 0x28
1043 02:41:31.551407 Power On Value = 0x16, Power On Scale = 0x0
1044 02:41:31.554520 ASPM: Enabled L1
1045 02:41:31.557937 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1046 02:41:31.561260 PCI: 00:1e.2 scanning...
1047 02:41:31.564817 scan_generic_bus for PCI: 00:1e.2
1048 02:41:31.568131 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 02:41:31.575326 scan_generic_bus for PCI: 00:1e.2 done
1050 02:41:31.577930 scan_bus: scanning of bus PCI: 00:1e.2 took 14001 usecs
1051 02:41:31.581521 PCI: 00:1e.3 scanning...
1052 02:41:31.584525 scan_generic_bus for PCI: 00:1e.3
1053 02:41:31.588408 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 02:41:31.591211 scan_generic_bus for PCI: 00:1e.3 done
1055 02:41:31.597953 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1056 02:41:31.601767 PCI: 00:1f.0 scanning...
1057 02:41:31.604650 scan_static_bus for PCI: 00:1f.0
1058 02:41:31.608015 PNP: 0c09.0 enabled
1059 02:41:31.611570 scan_static_bus for PCI: 00:1f.0 done
1060 02:41:31.614376 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1061 02:41:31.618042 PCI: 00:1f.3 scanning...
1062 02:41:31.624485 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1063 02:41:31.627363 PCI: 00:1f.4 scanning...
1064 02:41:31.631469 scan_generic_bus for PCI: 00:1f.4
1065 02:41:31.634737 scan_generic_bus for PCI: 00:1f.4 done
1066 02:41:31.641272 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1067 02:41:31.642055 PCI: 00:1f.5 scanning...
1068 02:41:31.644310 scan_generic_bus for PCI: 00:1f.5
1069 02:41:31.648255
1070 02:41:31.650850 scan_generic_bus for PCI: 00:1f.5 done
1071 02:41:31.654597 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1072 02:41:31.660863 scan_bus: scanning of bus DOMAIN: 0000 took 604840 usecs
1073 02:41:31.664551 scan_static_bus for Root Device done
1074 02:41:31.671221 scan_bus: scanning of bus Root Device took 624758 usecs
1075 02:41:31.671799 done
1076 02:41:31.674242 Chrome EC: UHEPI supported
1077 02:41:31.681144 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1078 02:41:31.687533 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1079 02:41:31.691072 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1080 02:41:31.693926
1081 02:41:31.700686 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1082 02:41:31.704060 SPI flash protection: WPSW=0 SRP0=0
1083 02:41:31.707685 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1084 02:41:31.713977 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1085 02:41:31.716900 found VGA at PCI: 00:02.0
1086 02:41:31.720770 Setting up VGA for PCI: 00:02.0
1087 02:41:31.723948 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1088 02:41:31.730211 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1089 02:41:31.730691 Allocating resources...
1090 02:41:31.734053 Reading resources...
1091 02:41:31.737245 Root Device read_resources bus 0 link: 0
1092 02:41:31.744316 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1093 02:41:31.746864 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1094 02:41:31.753535 DOMAIN: 0000 read_resources bus 0 link: 0
1095 02:41:31.757045 PCI: 00:14.0 read_resources bus 0 link: 0
1096 02:41:31.763645 USB0 port 0 read_resources bus 0 link: 0
1097 02:41:31.770463 USB0 port 0 read_resources bus 0 link: 0 done
1098 02:41:31.773874 PCI: 00:14.0 read_resources bus 0 link: 0 done
1099 02:41:31.781513 PCI: 00:15.0 read_resources bus 1 link: 0
1100 02:41:31.784846 PCI: 00:15.0 read_resources bus 1 link: 0 done
1101 02:41:31.791678 PCI: 00:15.1 read_resources bus 2 link: 0
1102 02:41:31.794267 PCI: 00:15.1 read_resources bus 2 link: 0 done
1103 02:41:31.801866 PCI: 00:19.0 read_resources bus 3 link: 0
1104 02:41:31.808347 PCI: 00:19.0 read_resources bus 3 link: 0 done
1105 02:41:31.811446 PCI: 00:1d.0 read_resources bus 1 link: 0
1106 02:41:31.818361 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1107 02:41:31.822126 PCI: 00:1e.2 read_resources bus 4 link: 0
1108 02:41:31.828413 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1109 02:41:31.831681 PCI: 00:1e.3 read_resources bus 5 link: 0
1110 02:41:31.838345 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1111 02:41:31.841559 PCI: 00:1f.0 read_resources bus 0 link: 0
1112 02:41:31.848541 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1113 02:41:31.854740 DOMAIN: 0000 read_resources bus 0 link: 0 done
1114 02:41:31.857983 Root Device read_resources bus 0 link: 0 done
1115 02:41:31.861526 Done reading resources.
1116 02:41:31.867769 Show resources in subtree (Root Device)...After reading.
1117 02:41:31.871634 Root Device child on link 0 CPU_CLUSTER: 0
1118 02:41:31.874580 CPU_CLUSTER: 0 child on link 0 APIC: 00
1119 02:41:31.875163 APIC: 00
1120 02:41:31.878003
1121 02:41:31.878482 APIC: 02
1122 02:41:31.878860 APIC: 01
1123 02:41:31.880948 APIC: 03
1124 02:41:31.881426 APIC: 06
1125 02:41:31.881840 APIC: 07
1126 02:41:31.884667 APIC: 04
1127 02:41:31.885144 APIC: 05
1128 02:41:31.887588 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 02:41:31.891262
1130 02:41:31.897974 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 02:41:31.944547 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1132 02:41:31.945134 PCI: 00:00.0
1133 02:41:31.945966 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 02:41:31.946380 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 02:41:31.946741 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 02:41:31.948943 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 02:41:31.955811 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 02:41:31.958891
1139 02:41:31.965525 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1140 02:41:31.975775 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1141 02:41:31.985212 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1142 02:41:31.995106 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1143 02:41:32.002074 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1144 02:41:32.011831 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1145 02:41:32.022315 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1146 02:41:32.032402 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1147 02:41:32.042256 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1148 02:41:32.052192 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1149 02:41:32.061840 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1150 02:41:32.062425 PCI: 00:02.0
1151 02:41:32.071493 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1152 02:41:32.081999 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1153 02:41:32.092208 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1154 02:41:32.092797 PCI: 00:04.0
1155 02:41:32.094729 PCI: 00:08.0
1156 02:41:32.104961 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 02:41:32.105586 PCI: 00:12.0
1158 02:41:32.114838 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 02:41:32.121254 PCI: 00:14.0 child on link 0 USB0 port 0
1160 02:41:32.130986 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 02:41:32.134879 USB0 port 0 child on link 0 USB2 port 0
1162 02:41:32.135460 USB2 port 0
1163 02:41:32.138286 USB2 port 1
1164 02:41:32.138864 USB2 port 2
1165 02:41:32.141251
1166 02:41:32.141872 USB2 port 3
1167 02:41:32.144505 USB2 port 5
1168 02:41:32.145008 USB2 port 6
1169 02:41:32.147631 USB2 port 9
1170 02:41:32.148109 USB3 port 0
1171 02:41:32.151347 USB3 port 1
1172 02:41:32.151927 USB3 port 2
1173 02:41:32.154420 USB3 port 3
1174 02:41:32.154944 USB3 port 4
1175 02:41:32.158220 PCI: 00:14.2
1176 02:41:32.167858 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1177 02:41:32.177805 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 02:41:32.178397 PCI: 00:14.3
1179 02:41:32.188354 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 02:41:32.194530 PCI: 00:15.0 child on link 0 I2C: 01:15
1181 02:41:32.204261 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 02:41:32.204863 I2C: 01:15
1183 02:41:32.207545 PCI: 00:15.1 child on link 0 I2C: 02:5d
1184 02:41:32.217544 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 02:41:32.220950 I2C: 02:5d
1186 02:41:32.221558 GENERIC: 0.0
1187 02:41:32.224069 PCI: 00:16.0
1188 02:41:32.234173 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 02:41:32.234744 PCI: 00:17.0
1190 02:41:32.244170 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1191 02:41:32.254426 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1192 02:41:32.260304 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1193 02:41:32.270559 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1194 02:41:32.276879 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1195 02:41:32.287056 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1196 02:41:32.290665 PCI: 00:19.0 child on link 0 I2C: 03:1a
1197 02:41:32.300221 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 02:41:32.303759 I2C: 03:1a
1199 02:41:32.304363 I2C: 03:38
1200 02:41:32.306919 I2C: 03:39
1201 02:41:32.307499 I2C: 03:3a
1202 02:41:32.310347 I2C: 03:3b
1203 02:41:32.313527 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1204 02:41:32.323832 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1205 02:41:32.333577 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1206 02:41:32.339882 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1207 02:41:32.343187 PCI: 01:00.0
1208 02:41:32.353072 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 02:41:32.353706 PCI: 00:1e.0
1210 02:41:32.366721 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 02:41:32.377038 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1212 02:41:32.379794 PCI: 00:1e.2 child on link 0 SPI: 00
1213 02:41:32.390110 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 02:41:32.390692 SPI: 00
1215 02:41:32.393279 PCI: 00:1e.3 child on link 0 SPI: 01
1216 02:41:32.403032 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 02:41:32.406589 SPI: 01
1218 02:41:32.409877 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 02:41:32.419695 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 02:41:32.426184 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1221 02:41:32.429877 PNP: 0c09.0
1222 02:41:32.439304 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1223 02:41:32.439887 PCI: 00:1f.3
1224 02:41:32.449696 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 02:41:32.459812 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1226 02:41:32.462424 PCI: 00:1f.4
1227 02:41:32.469111 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1228 02:41:32.479260 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1229 02:41:32.482263 PCI: 00:1f.5
1230 02:41:32.492418 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1231 02:41:32.499036 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1232 02:41:32.502467 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1233 02:41:32.509740 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1234 02:41:32.515785 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1235 02:41:32.519117 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1236 02:41:32.522370 PCI: 00:17.0 18 * [0x60 - 0x67] io
1237 02:41:32.525525 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1238 02:41:32.532099 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1239 02:41:32.538574 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1240 02:41:32.545638 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 02:41:32.555129 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 02:41:32.561934 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1243 02:41:32.565191 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 02:41:32.571586 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 02:41:32.578966 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1246 02:41:32.582408 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1247 02:41:32.588568 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1248 02:41:32.591721 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1249 02:41:32.598549 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1250 02:41:32.601602 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1251 02:41:32.608724 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1252 02:41:32.612011 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1253 02:41:32.618376 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1254 02:41:32.622060 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1255 02:41:32.624861 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1256 02:41:32.628842
1257 02:41:32.631412 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 02:41:32.634969 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 02:41:32.641879 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 02:41:32.644998 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 02:41:32.651720 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 02:41:32.654676 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 02:41:32.661635 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 02:41:32.664541 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 02:41:32.671419 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 02:41:32.674213 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 02:41:32.681730 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 02:41:32.684669 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 02:41:32.694834 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 02:41:32.698184 avoid_fixed_resources: DOMAIN: 0000
1271 02:41:32.704218 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 02:41:32.707632 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 02:41:32.718039 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 02:41:32.724891 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 02:41:32.730644 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 02:41:32.740789 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 02:41:32.747654 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 02:41:32.753859 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 02:41:32.760798 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 02:41:32.763886
1281 02:41:32.770574 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1282 02:41:32.777079 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1283 02:41:32.783942 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1284 02:41:32.787147 Setting resources...
1285 02:41:32.793321 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1286 02:41:32.796833 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1287 02:41:32.800127 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1288 02:41:32.803240 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1289 02:41:32.809900 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1290 02:41:32.813461 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1291 02:41:32.819881 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1292 02:41:32.826485 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1293 02:41:32.836468 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1294 02:41:32.839970 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1295 02:41:32.846692 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1296 02:41:32.849809 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1297 02:41:32.856373 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1298 02:41:32.859583 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1299 02:41:32.863470 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1300 02:41:32.866321
1301 02:41:32.869193 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1302 02:41:32.872770 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1303 02:41:32.879607 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1304 02:41:32.882712 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1305 02:41:32.889425 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1306 02:41:32.892434 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1307 02:41:32.899132 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1308 02:41:32.902330 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1309 02:41:32.909028 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1310 02:41:32.912285 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1311 02:41:32.919017 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1312 02:41:32.922243 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1313 02:41:32.928954 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1314 02:41:32.932227 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1315 02:41:32.938911 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1316 02:41:32.942349 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1317 02:41:32.945426 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1318 02:41:32.955598 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1319 02:41:32.962426 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1320 02:41:32.968602 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1321 02:41:32.975505 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1322 02:41:32.982040 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1323 02:41:32.988664 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1324 02:41:32.991966 Root Device assign_resources, bus 0 link: 0
1325 02:41:32.998555 DOMAIN: 0000 assign_resources, bus 0 link: 0
1326 02:41:33.005071 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1327 02:41:33.008143
1328 02:41:33.014855 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1329 02:41:33.021779 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1330 02:41:33.031466 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1331 02:41:33.038110 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1332 02:41:33.047880 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1333 02:41:33.051466 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 02:41:33.057935 PCI: 00:14.0 assign_resources, bus 0 link: 0
1335 02:41:33.064663 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1336 02:41:33.074460 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1337 02:41:33.081351 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1338 02:41:33.091024 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1339 02:41:33.094156 PCI: 00:15.0 assign_resources, bus 1 link: 0
1340 02:41:33.097695 PCI: 00:15.0 assign_resources, bus 1 link: 0
1341 02:41:33.107649 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1342 02:41:33.110869 PCI: 00:15.1 assign_resources, bus 2 link: 0
1343 02:41:33.117990 PCI: 00:15.1 assign_resources, bus 2 link: 0
1344 02:41:33.124393 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1345 02:41:33.133993 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1346 02:41:33.140732 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1347 02:41:33.147457 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1348 02:41:33.157119 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1349 02:41:33.164050 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1350 02:41:33.170365 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1351 02:41:33.181187 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1352 02:41:33.183823 PCI: 00:19.0 assign_resources, bus 3 link: 0
1353 02:41:33.190658 PCI: 00:19.0 assign_resources, bus 3 link: 0
1354 02:41:33.196896 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1355 02:41:33.207158 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1356 02:41:33.213585 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1357 02:41:33.220274 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1358 02:41:33.227188 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1359 02:41:33.233247 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1360 02:41:33.240692 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1361 02:41:33.250229 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1362 02:41:33.253305 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1363 02:41:33.259725 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1364 02:41:33.266477 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1365 02:41:33.270261 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1366 02:41:33.276372 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1367 02:41:33.279844 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1368 02:41:33.286629 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1369 02:41:33.290145 LPC: Trying to open IO window from 800 size 1ff
1370 02:41:33.299851 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1371 02:41:33.306501 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1372 02:41:33.316312 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1373 02:41:33.322852 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1374 02:41:33.329326 DOMAIN: 0000 assign_resources, bus 0 link: 0
1375 02:41:33.332670 Root Device assign_resources, bus 0 link: 0
1376 02:41:33.335917 Done setting resources.
1377 02:41:33.343196 Show resources in subtree (Root Device)...After assigning values.
1378 02:41:33.346095 Root Device child on link 0 CPU_CLUSTER: 0
1379 02:41:33.349513 CPU_CLUSTER: 0 child on link 0 APIC: 00
1380 02:41:33.352252 APIC: 00
1381 02:41:33.352337 APIC: 02
1382 02:41:33.352405 APIC: 01
1383 02:41:33.356013
1384 02:41:33.356098 APIC: 03
1385 02:41:33.356166 APIC: 06
1386 02:41:33.359382 APIC: 07
1387 02:41:33.359468 APIC: 04
1388 02:41:33.359535 APIC: 05
1389 02:41:33.365583 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1390 02:41:33.376116 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1391 02:41:33.385345 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1392 02:41:33.385450 PCI: 00:00.0
1393 02:41:33.389307
1394 02:41:33.395365 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1395 02:41:33.405567 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1396 02:41:33.415445 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1397 02:41:33.425578 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1398 02:41:33.435054 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1399 02:41:33.444882 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1400 02:41:33.451622 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1401 02:41:33.461687 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1402 02:41:33.471522 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1403 02:41:33.481322 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1404 02:41:33.491654 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1405 02:41:33.497609 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1406 02:41:33.508215 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1407 02:41:33.517685 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1408 02:41:33.527476 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1409 02:41:33.537604 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1410 02:41:33.537690 PCI: 00:02.0
1411 02:41:33.550820 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1412 02:41:33.560608 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1413 02:41:33.571149 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1414 02:41:33.571228 PCI: 00:04.0
1415 02:41:33.573966 PCI: 00:08.0
1416 02:41:33.584028 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1417 02:41:33.584112 PCI: 00:12.0
1418 02:41:33.593543 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1419 02:41:33.600189 PCI: 00:14.0 child on link 0 USB0 port 0
1420 02:41:33.610437 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1421 02:41:33.613624 USB0 port 0 child on link 0 USB2 port 0
1422 02:41:33.616799 USB2 port 0
1423 02:41:33.616884 USB2 port 1
1424 02:41:33.620058 USB2 port 2
1425 02:41:33.620142 USB2 port 3
1426 02:41:33.623937 USB2 port 5
1427 02:41:33.624021 USB2 port 6
1428 02:41:33.627070 USB2 port 9
1429 02:41:33.627155 USB3 port 0
1430 02:41:33.630208 USB3 port 1
1431 02:41:33.630292 USB3 port 2
1432 02:41:33.633424 USB3 port 3
1433 02:41:33.633544 USB3 port 4
1434 02:41:33.636726
1435 02:41:33.636811 PCI: 00:14.2
1436 02:41:33.646792 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1437 02:41:33.656517 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1438 02:41:33.659798 PCI: 00:14.3
1439 02:41:33.669898 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1440 02:41:33.673341 PCI: 00:15.0 child on link 0 I2C: 01:15
1441 02:41:33.683091 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1442 02:41:33.686792 I2C: 01:15
1443 02:41:33.689459 PCI: 00:15.1 child on link 0 I2C: 02:5d
1444 02:41:33.699516 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1445 02:41:33.703055 I2C: 02:5d
1446 02:41:33.703140 GENERIC: 0.0
1447 02:41:33.706199 PCI: 00:16.0
1448 02:41:33.716474 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1449 02:41:33.716560 PCI: 00:17.0
1450 02:41:33.726075 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1451 02:41:33.735860 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1452 02:41:33.746358 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1453 02:41:33.756566 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1454 02:41:33.765562 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1455 02:41:33.775779 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1456 02:41:33.779197 PCI: 00:19.0 child on link 0 I2C: 03:1a
1457 02:41:33.789252 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1458 02:41:33.792228 I2C: 03:1a
1459 02:41:33.792313 I2C: 03:38
1460 02:41:33.795725 I2C: 03:39
1461 02:41:33.795811 I2C: 03:3a
1462 02:41:33.798928 I2C: 03:3b
1463 02:41:33.802391 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1464 02:41:33.812176 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1465 02:41:33.821944 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1466 02:41:33.831850 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1467 02:41:33.831936 PCI: 01:00.0
1468 02:41:33.845312 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1469 02:41:33.845398 PCI: 00:1e.0
1470 02:41:33.855417 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1471 02:41:33.868540 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1472 02:41:33.871827 PCI: 00:1e.2 child on link 0 SPI: 00
1473 02:41:33.881412 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1474 02:41:33.881503 SPI: 00
1475 02:41:33.884699 PCI: 00:1e.3 child on link 0 SPI: 01
1476 02:41:33.898137 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1477 02:41:33.898223 SPI: 01
1478 02:41:33.901430 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1479 02:41:33.911232 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1480 02:41:33.921082 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1481 02:41:33.921168 PNP: 0c09.0
1482 02:41:33.931149 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 02:41:33.931235 PCI: 00:1f.3
1484 02:41:33.941262 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1485 02:41:33.954515 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1486 02:41:33.954602 PCI: 00:1f.4
1487 02:41:33.964506 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1488 02:41:33.974186 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1489 02:41:33.974273 PCI: 00:1f.5
1490 02:41:33.984344 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1491 02:41:33.987256
1492 02:41:33.987342 Done allocating resources.
1493 02:41:33.994178 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1494 02:41:33.997251 Enabling resources...
1495 02:41:34.000504 PCI: 00:00.0 subsystem <- 8086/9b61
1496 02:41:34.004168 PCI: 00:00.0 cmd <- 06
1497 02:41:34.007312 PCI: 00:02.0 subsystem <- 8086/9b41
1498 02:41:34.010564 PCI: 00:02.0 cmd <- 03
1499 02:41:34.013884 PCI: 00:08.0 cmd <- 06
1500 02:41:34.017254 PCI: 00:12.0 subsystem <- 8086/02f9
1501 02:41:34.019995 PCI: 00:12.0 cmd <- 02
1502 02:41:34.023388 PCI: 00:14.0 subsystem <- 8086/02ed
1503 02:41:34.023475 PCI: 00:14.0 cmd <- 02
1504 02:41:34.027548 PCI: 00:14.2 cmd <- 02
1505 02:41:34.030788 PCI: 00:14.3 subsystem <- 8086/02f0
1506 02:41:34.033784 PCI: 00:14.3 cmd <- 02
1507 02:41:34.036901 PCI: 00:15.0 subsystem <- 8086/02e8
1508 02:41:34.040349 PCI: 00:15.0 cmd <- 02
1509 02:41:34.043465 PCI: 00:15.1 subsystem <- 8086/02e9
1510 02:41:34.046922 PCI: 00:15.1 cmd <- 02
1511 02:41:34.050649 PCI: 00:16.0 subsystem <- 8086/02e0
1512 02:41:34.053629 PCI: 00:16.0 cmd <- 02
1513 02:41:34.057074 PCI: 00:17.0 subsystem <- 8086/02d3
1514 02:41:34.060087 PCI: 00:17.0 cmd <- 03
1515 02:41:34.063448 PCI: 00:19.0 subsystem <- 8086/02c5
1516 02:41:34.066762 PCI: 00:19.0 cmd <- 02
1517 02:41:34.069909 PCI: 00:1d.0 bridge ctrl <- 0013
1518 02:41:34.073292 PCI: 00:1d.0 subsystem <- 8086/02b0
1519 02:41:34.073378 PCI: 00:1d.0 cmd <- 06
1520 02:41:34.080211 PCI: 00:1e.0 subsystem <- 8086/02a8
1521 02:41:34.080297 PCI: 00:1e.0 cmd <- 06
1522 02:41:34.083598 PCI: 00:1e.2 subsystem <- 8086/02aa
1523 02:41:34.086844 PCI: 00:1e.2 cmd <- 06
1524 02:41:34.089870 PCI: 00:1e.3 subsystem <- 8086/02ab
1525 02:41:34.093667 PCI: 00:1e.3 cmd <- 02
1526 02:41:34.096807 PCI: 00:1f.0 subsystem <- 8086/0284
1527 02:41:34.100052 PCI: 00:1f.0 cmd <- 407
1528 02:41:34.103730 PCI: 00:1f.3 subsystem <- 8086/02c8
1529 02:41:34.106894 PCI: 00:1f.3 cmd <- 02
1530 02:41:34.110249 PCI: 00:1f.4 subsystem <- 8086/02a3
1531 02:41:34.113360 PCI: 00:1f.4 cmd <- 03
1532 02:41:34.116645 PCI: 00:1f.5 subsystem <- 8086/02a4
1533 02:41:34.119777 PCI: 00:1f.5 cmd <- 406
1534 02:41:34.127487 PCI: 01:00.0 cmd <- 02
1535 02:41:34.132764 done.
1536 02:41:34.145621 ME: Version: 14.0.39.1367
1537 02:41:34.152397 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1538 02:41:34.155531 Initializing devices...
1539 02:41:34.155617 Root Device init ...
1540 02:41:34.162463 Chrome EC: Set SMI mask to 0x0000000000000000
1541 02:41:34.165797 Chrome EC: clear events_b mask to 0x0000000000000000
1542 02:41:34.172076 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1543 02:41:34.178995 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1544 02:41:34.185322 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1545 02:41:34.188582 Chrome EC: Set WAKE mask to 0x0000000000000000
1546 02:41:34.192147 Root Device init finished in 35187 usecs
1547 02:41:34.195405 CPU_CLUSTER: 0 init ...
1548 02:41:34.199299 CPU_CLUSTER: 0 init finished in 2449 usecs
1549 02:41:34.202206
1550 02:41:34.206270 PCI: 00:00.0 init ...
1551 02:41:34.209396 CPU TDP: 15 Watts
1552 02:41:34.212779 CPU PL2 = 64 Watts
1553 02:41:34.216626 PCI: 00:00.0 init finished in 7083 usecs
1554 02:41:34.219857 PCI: 00:02.0 init ...
1555 02:41:34.222740 PCI: 00:02.0 init finished in 2254 usecs
1556 02:41:34.226275 PCI: 00:08.0 init ...
1557 02:41:34.229627 PCI: 00:08.0 init finished in 2255 usecs
1558 02:41:34.232556 PCI: 00:12.0 init ...
1559 02:41:34.235914 PCI: 00:12.0 init finished in 2252 usecs
1560 02:41:34.239291 PCI: 00:14.0 init ...
1561 02:41:34.243554 PCI: 00:14.0 init finished in 2254 usecs
1562 02:41:34.246232 PCI: 00:14.2 init ...
1563 02:41:34.249266 PCI: 00:14.2 init finished in 2245 usecs
1564 02:41:34.252463 PCI: 00:14.3 init ...
1565 02:41:34.255862 PCI: 00:14.3 init finished in 2270 usecs
1566 02:41:34.259803 PCI: 00:15.0 init ...
1567 02:41:34.262462 DW I2C bus 0 at 0xd121f000 (400 KHz)
1568 02:41:34.265931 PCI: 00:15.0 init finished in 5979 usecs
1569 02:41:34.269260 PCI: 00:15.1 init ...
1570 02:41:34.272500 DW I2C bus 1 at 0xd1220000 (400 KHz)
1571 02:41:34.279360 PCI: 00:15.1 init finished in 5978 usecs
1572 02:41:34.279439 PCI: 00:16.0 init ...
1573 02:41:34.285416 PCI: 00:16.0 init finished in 2254 usecs
1574 02:41:34.288965 PCI: 00:19.0 init ...
1575 02:41:34.292598 DW I2C bus 4 at 0xd1222000 (400 KHz)
1576 02:41:34.295231 PCI: 00:19.0 init finished in 5981 usecs
1577 02:41:34.299003 PCI: 00:1d.0 init ...
1578 02:41:34.301907 Initializing PCH PCIe bridge.
1579 02:41:34.305790 PCI: 00:1d.0 init finished in 5289 usecs
1580 02:41:34.308473 PCI: 00:1f.0 init ...
1581 02:41:34.311881 IOAPIC: Initializing IOAPIC at 0xfec00000
1582 02:41:34.318537 IOAPIC: Bootstrap Processor Local APIC = 0x00
1583 02:41:34.318622 IOAPIC: ID = 0x02
1584 02:41:34.322336 IOAPIC: Dumping registers
1585 02:41:34.324892 reg 0x0000: 0x02000000
1586 02:41:34.328471 reg 0x0001: 0x00770020
1587 02:41:34.328555 reg 0x0002: 0x00000000
1588 02:41:34.335135 PCI: 00:1f.0 init finished in 23546 usecs
1589 02:41:34.338631 PCI: 00:1f.4 init ...
1590 02:41:34.341537 PCI: 00:1f.4 init finished in 2264 usecs
1591 02:41:34.352548 PCI: 01:00.0 init ...
1592 02:41:34.355502 PCI: 01:00.0 init finished in 2244 usecs
1593 02:41:34.360595 PNP: 0c09.0 init ...
1594 02:41:34.363347 Google Chrome EC uptime: 11.094 seconds
1595 02:41:34.369928 Google Chrome AP resets since EC boot: 0
1596 02:41:34.373091 Google Chrome most recent AP reset causes:
1597 02:41:34.379929 Google Chrome EC reset flags at last EC boot: reset-pin
1598 02:41:34.383621 PNP: 0c09.0 init finished in 20594 usecs
1599 02:41:34.386380 Devices initialized
1600 02:41:34.386466 Show all devs... After init.
1601 02:41:34.389715
1602 02:41:34.389801 Root Device: enabled 1
1603 02:41:34.393158 CPU_CLUSTER: 0: enabled 1
1604 02:41:34.396495 DOMAIN: 0000: enabled 1
1605 02:41:34.396581 APIC: 00: enabled 1
1606 02:41:34.399595 PCI: 00:00.0: enabled 1
1607 02:41:34.402860 PCI: 00:02.0: enabled 1
1608 02:41:34.406561 PCI: 00:04.0: enabled 0
1609 02:41:34.406647 PCI: 00:05.0: enabled 0
1610 02:41:34.409681 PCI: 00:12.0: enabled 1
1611 02:41:34.413048 PCI: 00:12.5: enabled 0
1612 02:41:34.413133 PCI: 00:12.6: enabled 0
1613 02:41:34.416419
1614 02:41:34.416504 PCI: 00:14.0: enabled 1
1615 02:41:34.419659 PCI: 00:14.1: enabled 0
1616 02:41:34.422874 PCI: 00:14.3: enabled 1
1617 02:41:34.422960 PCI: 00:14.5: enabled 0
1618 02:41:34.425999 PCI: 00:15.0: enabled 1
1619 02:41:34.429629 PCI: 00:15.1: enabled 1
1620 02:41:34.432654 PCI: 00:15.2: enabled 0
1621 02:41:34.432741 PCI: 00:15.3: enabled 0
1622 02:41:34.436187 PCI: 00:16.0: enabled 1
1623 02:41:34.439574 PCI: 00:16.1: enabled 0
1624 02:41:34.443149 PCI: 00:16.2: enabled 0
1625 02:41:34.443245 PCI: 00:16.3: enabled 0
1626 02:41:34.445936 PCI: 00:16.4: enabled 0
1627 02:41:34.449374 PCI: 00:16.5: enabled 0
1628 02:41:34.452653 PCI: 00:17.0: enabled 1
1629 02:41:34.452738 PCI: 00:19.0: enabled 1
1630 02:41:34.455900 PCI: 00:19.1: enabled 0
1631 02:41:34.459081 PCI: 00:19.2: enabled 0
1632 02:41:34.459168 PCI: 00:1a.0: enabled 0
1633 02:41:34.462330
1634 02:41:34.462416 PCI: 00:1c.0: enabled 0
1635 02:41:34.465989 PCI: 00:1c.1: enabled 0
1636 02:41:34.469800 PCI: 00:1c.2: enabled 0
1637 02:41:34.469885 PCI: 00:1c.3: enabled 0
1638 02:41:34.472193 PCI: 00:1c.4: enabled 0
1639 02:41:34.475811 PCI: 00:1c.5: enabled 0
1640 02:41:34.478913 PCI: 00:1c.6: enabled 0
1641 02:41:34.478999 PCI: 00:1c.7: enabled 0
1642 02:41:34.482245 PCI: 00:1d.0: enabled 1
1643 02:41:34.485812 PCI: 00:1d.1: enabled 0
1644 02:41:34.489093 PCI: 00:1d.2: enabled 0
1645 02:41:34.489178 PCI: 00:1d.3: enabled 0
1646 02:41:34.492721 PCI: 00:1d.4: enabled 0
1647 02:41:34.495434 PCI: 00:1d.5: enabled 0
1648 02:41:34.499519 PCI: 00:1e.0: enabled 1
1649 02:41:34.499604 PCI: 00:1e.1: enabled 0
1650 02:41:34.502295 PCI: 00:1e.2: enabled 1
1651 02:41:34.505513 PCI: 00:1e.3: enabled 1
1652 02:41:34.505600 PCI: 00:1f.0: enabled 1
1653 02:41:34.509209
1654 02:41:34.509294 PCI: 00:1f.1: enabled 0
1655 02:41:34.512066 PCI: 00:1f.2: enabled 0
1656 02:41:34.515586 PCI: 00:1f.3: enabled 1
1657 02:41:34.515671 PCI: 00:1f.4: enabled 1
1658 02:41:34.518811 PCI: 00:1f.5: enabled 1
1659 02:41:34.522043 PCI: 00:1f.6: enabled 0
1660 02:41:34.525460 USB0 port 0: enabled 1
1661 02:41:34.525584 I2C: 01:15: enabled 1
1662 02:41:34.528260 I2C: 02:5d: enabled 1
1663 02:41:34.531966 GENERIC: 0.0: enabled 1
1664 02:41:34.532052 I2C: 03:1a: enabled 1
1665 02:41:34.535337 I2C: 03:38: enabled 1
1666 02:41:34.538841 I2C: 03:39: enabled 1
1667 02:41:34.538916 I2C: 03:3a: enabled 1
1668 02:41:34.541596 I2C: 03:3b: enabled 1
1669 02:41:34.545453 PCI: 00:00.0: enabled 1
1670 02:41:34.545534 SPI: 00: enabled 1
1671 02:41:34.548471 SPI: 01: enabled 1
1672 02:41:34.551817 PNP: 0c09.0: enabled 1
1673 02:41:34.551886 USB2 port 0: enabled 1
1674 02:41:34.554955 USB2 port 1: enabled 1
1675 02:41:34.558445 USB2 port 2: enabled 0
1676 02:41:34.561573 USB2 port 3: enabled 0
1677 02:41:34.561643 USB2 port 5: enabled 0
1678 02:41:34.564664 USB2 port 6: enabled 1
1679 02:41:34.568433 USB2 port 9: enabled 1
1680 02:41:34.568518 USB3 port 0: enabled 1
1681 02:41:34.571801 USB3 port 1: enabled 1
1682 02:41:34.574986 USB3 port 2: enabled 1
1683 02:41:34.578283 USB3 port 3: enabled 1
1684 02:41:34.578375 USB3 port 4: enabled 0
1685 02:41:34.581411 APIC: 02: enabled 1
1686 02:41:34.581534 APIC: 01: enabled 1
1687 02:41:34.584755 APIC: 03: enabled 1
1688 02:41:34.588149 APIC: 06: enabled 1
1689 02:41:34.588235 APIC: 07: enabled 1
1690 02:41:34.591470 APIC: 04: enabled 1
1691 02:41:34.594569 APIC: 05: enabled 1
1692 02:41:34.594655 PCI: 00:08.0: enabled 1
1693 02:41:34.597785 PCI: 00:14.2: enabled 1
1694 02:41:34.601383 PCI: 01:00.0: enabled 1
1695 02:41:34.604648 Disabling ACPI via APMC:
1696 02:41:34.607982 done.
1697 02:41:34.611484 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1698 02:41:34.614822 ELOG: NV offset 0xaf0000 size 0x4000
1699 02:41:34.621714 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1700 02:41:34.628496 ELOG: Event(17) added with size 13 at 2023-01-25 02:41:33 UTC
1701 02:41:34.634857 ELOG: Event(92) added with size 9 at 2023-01-25 02:41:33 UTC
1702 02:41:34.641793 ELOG: Event(93) added with size 9 at 2023-01-25 02:41:33 UTC
1703 02:41:34.648160 ELOG: Event(9A) added with size 9 at 2023-01-25 02:41:33 UTC
1704 02:41:34.654936 ELOG: Event(9E) added with size 10 at 2023-01-25 02:41:33 UTC
1705 02:41:34.661694 ELOG: Event(9F) added with size 14 at 2023-01-25 02:41:33 UTC
1706 02:41:34.664949 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1707 02:41:34.672277 ELOG: Event(A1) added with size 10 at 2023-01-25 02:41:33 UTC
1708 02:41:34.681893 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1709 02:41:34.688624 ELOG: Event(A0) added with size 9 at 2023-01-25 02:41:33 UTC
1710 02:41:34.691942 ELOG: Event(16) added with size 11 at 2023-01-25 02:41:33 UTC
1711 02:41:34.695344
1712 02:41:34.698156 Erasing flash addr af0000 + 4 KiB
1713 02:41:34.767437 elog_add_boot_reason: Logged dev mode boot
1714 02:41:34.767532 Finalize devices...
1715 02:41:34.771049 PCI: 00:17.0 final
1716 02:41:34.774607 Devices finalized
1717 02:41:34.777329 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1718 02:41:34.783915 BS: BS_POST_DEVICE times (ms): entry 57 run 0 exit 0
1719 02:41:34.787554 ME: HFSTS1 : 0x90000245
1720 02:41:34.790820 ME: HFSTS2 : 0x3B850126
1721 02:41:34.794036 ME: HFSTS3 : 0x00000020
1722 02:41:34.797649
1723 02:41:34.800739 ME: HFSTS4 : 0x00004800
1724 02:41:34.804098 ME: HFSTS5 : 0x00000000
1725 02:41:34.807166 ME: HFSTS6 : 0x40400006
1726 02:41:34.810667 ME: Manufacturing Mode : NO
1727 02:41:34.813919 ME: FW Partition Table : OK
1728 02:41:34.817277 ME: Bringup Loader Failure : NO
1729 02:41:34.820527 ME: Firmware Init Complete : YES
1730 02:41:34.823931 ME: Boot Options Present : NO
1731 02:41:34.827041 ME: Update In Progress : NO
1732 02:41:34.830554 ME: D0i3 Support : YES
1733 02:41:34.833988 ME: Low Power State Enabled : NO
1734 02:41:34.837235 ME: CPU Replaced : NO
1735 02:41:34.840563 ME: CPU Replacement Valid : YES
1736 02:41:34.843832 ME: Current Working State : 5
1737 02:41:34.846753 ME: Current Operation State : 1
1738 02:41:34.850134 ME: Current Operation Mode : 0
1739 02:41:34.853636 ME: Error Code : 0
1740 02:41:34.857347 ME: CPU Debug Disabled : YES
1741 02:41:34.860477 ME: TXT Support : NO
1742 02:41:34.866759 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1743 02:41:34.870221 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1744 02:41:34.873760 CBFS @ c08000 size 3f8000
1745 02:41:34.880029 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1746 02:41:34.883312 CBFS: Locating 'fallback/dsdt.aml'
1747 02:41:34.886641 CBFS: Found @ offset 10bb80 size 3fa5
1748 02:41:34.893430 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1749 02:41:34.896856 CBFS @ c08000 size 3f8000
1750 02:41:34.899901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1751 02:41:34.903230 CBFS: Locating 'fallback/slic'
1752 02:41:34.908422 CBFS: 'fallback/slic' not found.
1753 02:41:34.914872 ACPI: Writing ACPI tables at 99b3e000.
1754 02:41:34.914957 ACPI: * FACS
1755 02:41:34.917899 ACPI: * DSDT
1756 02:41:34.921373 Ramoops buffer: 0x100000@0x99a3d000.
1757 02:41:34.924812 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1758 02:41:34.931473 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1759 02:41:34.934671 Google Chrome EC: version:
1760 02:41:34.938013 ro: helios_v2.0.2659-56403530b
1761 02:41:34.941560 rw: helios_v2.0.2849-c41de27e7d
1762 02:41:34.941645 running image: 1
1763 02:41:34.945753 ACPI: * FADT
1764 02:41:34.945838 SCI is IRQ9
1765 02:41:34.948754 ACPI: added table 1/32, length now 40
1766 02:41:34.951953
1767 02:41:34.952038 ACPI: * SSDT
1768 02:41:34.955748 Found 1 CPU(s) with 8 core(s) each.
1769 02:41:34.958794 Error: Could not locate 'wifi_sar' in VPD.
1770 02:41:34.965363 Checking CBFS for default SAR values
1771 02:41:34.968996 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1772 02:41:34.972294 CBFS @ c08000 size 3f8000
1773 02:41:34.978642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1774 02:41:34.981977 CBFS: Locating 'wifi_sar_defaults.hex'
1775 02:41:34.985363 CBFS: Found @ offset 5fac0 size 77
1776 02:41:34.988681 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1777 02:41:34.992213 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1778 02:41:34.994995
1779 02:41:34.998488 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1780 02:41:35.004902 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1781 02:41:35.009497 failed to find key in VPD: dsm_calib_r0_0
1782 02:41:35.018399 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1783 02:41:35.021722 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1784 02:41:35.025108 failed to find key in VPD: dsm_calib_r0_1
1785 02:41:35.034893 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1786 02:41:35.041626 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1787 02:41:35.045088 failed to find key in VPD: dsm_calib_r0_2
1788 02:41:35.054809 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1789 02:41:35.058245 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1790 02:41:35.064741 failed to find key in VPD: dsm_calib_r0_3
1791 02:41:35.071364 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1792 02:41:35.077766 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1793 02:41:35.080998 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1794 02:41:35.084384 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1795 02:41:35.088665 EC returned error result code 1
1796 02:41:35.091978 EC returned error result code 1
1797 02:41:35.096391 EC returned error result code 1
1798 02:41:35.102925 PS2K: Bad resp from EC. Vivaldi disabled!
1799 02:41:35.105846 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1800 02:41:35.112733 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1801 02:41:35.119076 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1802 02:41:35.122653 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1803 02:41:35.128860 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1804 02:41:35.136105 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1805 02:41:35.142475 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1806 02:41:35.145620 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1807 02:41:35.149180 ACPI: added table 2/32, length now 44
1808 02:41:35.152207
1809 02:41:35.152302 ACPI: * MCFG
1810 02:41:35.155813 ACPI: added table 3/32, length now 48
1811 02:41:35.158930 ACPI: * TPM2
1812 02:41:35.162492 TPM2 log created at 99a2d000
1813 02:41:35.165460 ACPI: added table 4/32, length now 52
1814 02:41:35.165587 ACPI: * MADT
1815 02:41:35.169155 SCI is IRQ9
1816 02:41:35.172149 ACPI: added table 5/32, length now 56
1817 02:41:35.172235 current = 99b43ac0
1818 02:41:35.175291 ACPI: * DMAR
1819 02:41:35.178722 ACPI: added table 6/32, length now 60
1820 02:41:35.182063 ACPI: * IGD OpRegion
1821 02:41:35.182149 GMA: Found VBT in CBFS
1822 02:41:35.185610 GMA: Found valid VBT in CBFS
1823 02:41:35.188829 ACPI: added table 7/32, length now 64
1824 02:41:35.192035 ACPI: * HPET
1825 02:41:35.195152 ACPI: added table 8/32, length now 68
1826 02:41:35.195237 ACPI: done.
1827 02:41:35.198908 ACPI tables: 31744 bytes.
1828 02:41:35.202819 smbios_write_tables: 99a2c000
1829 02:41:35.205873 EC returned error result code 3
1830 02:41:35.208937 Couldn't obtain OEM name from CBI
1831 02:41:35.212355 Create SMBIOS type 17
1832 02:41:35.215479 PCI: 00:00.0 (Intel Cannonlake)
1833 02:41:35.218469 PCI: 00:14.3 (Intel WiFi)
1834 02:41:35.222198 SMBIOS tables: 939 bytes.
1835 02:41:35.225586 Writing table forward entry at 0x00000500
1836 02:41:35.231870 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1837 02:41:35.235583 Writing coreboot table at 0x99b62000
1838 02:41:35.241691 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1839 02:41:35.245116 1. 0000000000001000-000000000009ffff: RAM
1840 02:41:35.248522 2. 00000000000a0000-00000000000fffff: RESERVED
1841 02:41:35.255328 3. 0000000000100000-0000000099a2bfff: RAM
1842 02:41:35.258691 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1843 02:41:35.264998 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1844 02:41:35.272120 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1845 02:41:35.274815 7. 000000009a000000-000000009f7fffff: RESERVED
1846 02:41:35.281864 8. 00000000e0000000-00000000efffffff: RESERVED
1847 02:41:35.284690 9. 00000000fc000000-00000000fc000fff: RESERVED
1848 02:41:35.288090 10. 00000000fe000000-00000000fe00ffff: RESERVED
1849 02:41:35.294870 11. 00000000fed10000-00000000fed17fff: RESERVED
1850 02:41:35.298159 12. 00000000fed80000-00000000fed83fff: RESERVED
1851 02:41:35.304705 13. 00000000fed90000-00000000fed91fff: RESERVED
1852 02:41:35.308121 14. 00000000feda0000-00000000feda1fff: RESERVED
1853 02:41:35.315027 15. 0000000100000000-000000045e7fffff: RAM
1854 02:41:35.317839 Graphics framebuffer located at 0xc0000000
1855 02:41:35.321473 Passing 5 GPIOs to payload:
1856 02:41:35.324815 NAME | PORT | POLARITY | VALUE
1857 02:41:35.331122 write protect | undefined | high | low
1858 02:41:35.334662 lid | undefined | high | high
1859 02:41:35.341178 power | undefined | high | low
1860 02:41:35.347491 oprom | undefined | high | low
1861 02:41:35.351131 EC in RW | 0x000000cb | high | low
1862 02:41:35.354188 Board ID: 4
1863 02:41:35.357775 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1864 02:41:35.360819 CBFS @ c08000 size 3f8000
1865 02:41:35.367719 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1866 02:41:35.374059 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1867 02:41:35.374146 coreboot table: 1492 bytes.
1868 02:41:35.377465 IMD ROOT 0. 99fff000 00001000
1869 02:41:35.380895 IMD SMALL 1. 99ffe000 00001000
1870 02:41:35.384193 FSP MEMORY 2. 99c4e000 003b0000
1871 02:41:35.387888 CONSOLE 3. 99c2e000 00020000
1872 02:41:35.391007 FMAP 4. 99c2d000 0000054e
1873 02:41:35.393925 TIME STAMP 5. 99c2c000 00000910
1874 02:41:35.397428 VBOOT WORK 6. 99c18000 00014000
1875 02:41:35.400885 MRC DATA 7. 99c16000 00001958
1876 02:41:35.403979 ROMSTG STCK 8. 99c15000 00001000
1877 02:41:35.407265 AFTER CAR 9. 99c0b000 0000a000
1878 02:41:35.410554 RAMSTAGE 10. 99baf000 0005c000
1879 02:41:35.414315 REFCODE 11. 99b7a000 00035000
1880 02:41:35.417669 SMM BACKUP 12. 99b6a000 00010000
1881 02:41:35.420987 COREBOOT 13. 99b62000 00008000
1882 02:41:35.424046 ACPI 14. 99b3e000 00024000
1883 02:41:35.427021 ACPI GNVS 15. 99b3d000 00001000
1884 02:41:35.430698 RAMOOPS 16. 99a3d000 00100000
1885 02:41:35.433867 TPM2 TCGLOG17. 99a2d000 00010000
1886 02:41:35.437275 SMBIOS 18. 99a2c000 00000800
1887 02:41:35.440291 IMD small region:
1888 02:41:35.444034 IMD ROOT 0. 99ffec00 00000400
1889 02:41:35.447623 FSP RUNTIME 1. 99ffebe0 00000004
1890 02:41:35.450660 EC HOSTEVENT 2. 99ffebc0 00000008
1891 02:41:35.453922 POWER STATE 3. 99ffeb80 00000040
1892 02:41:35.457119 ROMSTAGE 4. 99ffeb60 00000004
1893 02:41:35.460429 MEM INFO 5. 99ffe9a0 000001b9
1894 02:41:35.463721 VPD 6. 99ffe920 0000006c
1895 02:41:35.466957
1896 02:41:35.467043 MTRR: Physical address space:
1897 02:41:35.473678 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1898 02:41:35.480747 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1899 02:41:35.486779 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1900 02:41:35.493387 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1901 02:41:35.500149 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1902 02:41:35.506836 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1903 02:41:35.513516 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1904 02:41:35.516645 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 02:41:35.520275 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 02:41:35.523098 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 02:41:35.529764 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 02:41:35.533032 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 02:41:35.536301 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 02:41:35.539992 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 02:41:35.543041 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 02:41:35.546493
1913 02:41:35.549784 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 02:41:35.553183 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 02:41:35.556307 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 02:41:35.559818 call enable_fixed_mtrr()
1917 02:41:35.563158 CPU physical address size: 39 bits
1918 02:41:35.569378 MTRR: default type WB/UC MTRR counts: 6/8.
1919 02:41:35.572859 MTRR: WB selected as default type.
1920 02:41:35.579713 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1921 02:41:35.582807 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1922 02:41:35.589252 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1923 02:41:35.595906 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1924 02:41:35.602821 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1925 02:41:35.609290 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1926 02:41:35.612749 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 02:41:35.615686
1928 02:41:35.619080 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 02:41:35.622421 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 02:41:35.625715 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 02:41:35.629158 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 02:41:35.635799 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 02:41:35.639223 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 02:41:35.641991 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 02:41:35.645570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 02:41:35.652106 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 02:41:35.655441 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 02:41:35.655527
1939 02:41:35.655595 MTRR check
1940 02:41:35.658944 Fixed MTRRs : Enabled
1941 02:41:35.662438 Variable MTRRs: Enabled
1942 02:41:35.662523
1943 02:41:35.665399 call enable_fixed_mtrr()
1944 02:41:35.669037 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1945 02:41:35.672167 CPU physical address size: 39 bits
1946 02:41:35.679066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1947 02:41:35.681945 CBFS @ c08000 size 3f8000
1948 02:41:35.688255 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1949 02:41:35.691930 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 02:41:35.695127 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 02:41:35.698663 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 02:41:35.701513 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 02:41:35.704932
1954 02:41:35.708127 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 02:41:35.711696 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 02:41:35.715226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 02:41:35.718018 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 02:41:35.724605 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 02:41:35.728232 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 02:41:35.731456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 02:41:35.735001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 02:41:35.741282 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 02:41:35.741368 call enable_fixed_mtrr()
1964 02:41:35.744463
1965 02:41:35.747934 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 02:41:35.751273 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 02:41:35.754681 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 02:41:35.758114 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 02:41:35.764452 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 02:41:35.767729 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 02:41:35.771329 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 02:41:35.774402 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 02:41:35.781260 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 02:41:35.784137 CPU physical address size: 39 bits
1975 02:41:35.787455 call enable_fixed_mtrr()
1976 02:41:35.790838 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 02:41:35.794016 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 02:41:35.797412 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 02:41:35.804020 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 02:41:35.807289 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 02:41:35.810674 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 02:41:35.814098 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 02:41:35.820625 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 02:41:35.824033 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 02:41:35.827392 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 02:41:35.830690 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 02:41:35.833798 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 02:41:35.837251
1989 02:41:35.840986 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 02:41:35.843644 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 02:41:35.847427 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 02:41:35.853497 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 02:41:35.856790 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 02:41:35.860405 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 02:41:35.863830 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 02:41:35.866902 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 02:41:35.870005
1998 02:41:35.873773 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 02:41:35.876759 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 02:41:35.879863 call enable_fixed_mtrr()
2001 02:41:35.883831 call enable_fixed_mtrr()
2002 02:41:35.886886 CPU physical address size: 39 bits
2003 02:41:35.889784 CPU physical address size: 39 bits
2004 02:41:35.893101 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 02:41:35.896333 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 02:41:35.903395 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 02:41:35.906249 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 02:41:35.909733 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 02:41:35.913242 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 02:41:35.916406 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 02:41:35.923395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 02:41:35.926111 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 02:41:35.929878 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 02:41:35.933075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 02:41:35.939625 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 02:41:35.943220 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 02:41:35.946282 call enable_fixed_mtrr()
2018 02:41:35.949307 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 02:41:35.952887 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 02:41:35.956101 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 02:41:35.962639 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 02:41:35.965848 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 02:41:35.969285 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 02:41:35.972469 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 02:41:35.979235 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 02:41:35.982641 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 02:41:35.985944 CPU physical address size: 39 bits
2028 02:41:35.989115 call enable_fixed_mtrr()
2029 02:41:35.992309 CBFS: Locating 'fallback/payload'
2030 02:41:35.995716 CPU physical address size: 39 bits
2031 02:41:35.998923 CPU physical address size: 39 bits
2032 02:41:36.002087 CBFS: Found @ offset 1c96c0 size 3f798
2033 02:41:36.009050 Checking segment from ROM address 0xffdd16f8
2034 02:41:36.012540 Checking segment from ROM address 0xffdd1714
2035 02:41:36.015617 Loading segment from ROM address 0xffdd16f8
2036 02:41:36.018913 code (compression=0)
2037 02:41:36.029119 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2038 02:41:36.035691 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2039 02:41:36.039162 it's not compressed!
2040 02:41:36.130330 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2041 02:41:36.136745 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2042 02:41:36.139974 Loading segment from ROM address 0xffdd1714
2043 02:41:36.143384 Entry Point 0x30000000
2044 02:41:36.146557 Loaded segments
2045 02:41:36.152326 Finalizing chipset.
2046 02:41:36.155732 Finalizing SMM.
2047 02:41:36.159192 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2048 02:41:36.162345 mp_park_aps done after 0 msecs.
2049 02:41:36.169016 Jumping to boot code at 30000000(99b62000)
2050 02:41:36.175887 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2051 02:41:36.175973
2052 02:41:36.176041
2053 02:41:36.176102
2054 02:41:36.179523 Starting depthcharge on Helios...
2055 02:41:36.179608
2056 02:41:36.179955 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2057 02:41:36.180060 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2058 02:41:36.180147 Setting prompt string to ['hatch:']
2059 02:41:36.180228 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2060 02:41:36.188779 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2061 02:41:36.188866
2062 02:41:36.195297 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2063 02:41:36.195384
2064 02:41:36.201650 board_setup: Info: eMMC controller not present; skipping
2065 02:41:36.201736
2066 02:41:36.204879 New NVMe Controller 0x30053ac0 @ 00:1d:00
2067 02:41:36.204966
2068 02:41:36.211693 board_setup: Info: SDHCI controller not present; skipping
2069 02:41:36.211780
2070 02:41:36.218494 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2071 02:41:36.218581
2072 02:41:36.218648 Wipe memory regions:
2073 02:41:36.218727
2074 02:41:36.221955 [0x00000000001000, 0x000000000a0000)
2075 02:41:36.222041
2076 02:41:36.228384 [0x00000000100000, 0x00000030000000)
2077 02:41:36.228470
2078 02:41:36.294382 [0x00000030657430, 0x00000099a2c000)
2079 02:41:36.294472
2080 02:41:36.434545 [0x00000100000000, 0x0000045e800000)
2081 02:41:36.434653
2082 02:41:37.817154 R8152: Initializing
2083 02:41:37.817317
2084 02:41:37.820456 Version 9 (ocp_data = 6010)
2085 02:41:37.820541
2086 02:41:37.824794 R8152: Done initializing
2087 02:41:37.824879
2088 02:41:37.828140 Adding net device
2089 02:41:37.828240
2090 02:41:38.437293 R8152: Initializing
2091 02:41:38.437430
2092 02:41:38.440457 Version 6 (ocp_data = 5c30)
2093 02:41:38.440540
2094 02:41:38.444064 R8152: Done initializing
2095 02:41:38.444144
2096 02:41:38.451079 net_add_device: Attemp to include the same device
2097 02:41:38.451156
2098 02:41:38.457890 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2099 02:41:38.457979
2100 02:41:38.458044
2101 02:41:38.458106
2102 02:41:38.458375 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2104 02:41:38.559125 hatch: tftpboot 192.168.201.1 8867166/tftp-deploy-j3ou8tsd/kernel/bzImage 8867166/tftp-deploy-j3ou8tsd/kernel/cmdline 8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
2105 02:41:38.559262 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2106 02:41:38.559344 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2107 02:41:38.563852 tftpboot 192.168.201.1 8867166/tftp-deploy-j3ou8tsd/kernel/bzImay-j3ou8tsd/kernel/cmdline 8867166/tftp-deploy-j3ou8tsd/ramdisk/ramdisk.cpio.gz
2108 02:41:38.563940
2109 02:41:38.564007 Waiting for link
2110 02:41:38.564069
2111 02:41:38.764480 done.
2112 02:41:38.764602
2113 02:41:38.764671 MAC: 00:24:32:50:1a:5f
2114 02:41:38.764734
2115 02:41:38.767561 Sending DHCP discover... done.
2116 02:41:38.767648
2117 02:41:38.771192 Waiting for reply... done.
2118 02:41:38.771278
2119 02:41:38.774389 Sending DHCP request... done.
2120 02:41:38.774476
2121 02:41:38.777685 Waiting for reply... done.
2122 02:41:38.777771
2123 02:41:38.781242 My ip is 192.168.201.21
2124 02:41:38.781328
2125 02:41:38.784010 The DHCP server ip is 192.168.201.1
2126 02:41:38.784096
2127 02:41:38.791269 TFTP server IP predefined by user: 192.168.201.1
2128 02:41:38.791355
2129 02:41:38.797803 Bootfile predefined by user: 8867166/tftp-deploy-j3ou8tsd/kernel/bzImage
2130 02:41:38.797896
2131 02:41:38.800738 Sending tftp read request... done.
2132 02:41:38.800854
2133 02:41:38.804048 Waiting for the transfer...
2134 02:41:38.804134
2135 02:41:39.340160 00000000 ################################################################
2136 02:41:39.340306
2137 02:41:39.873705 00080000 ################################################################
2138 02:41:39.873848
2139 02:41:40.522201 00100000 ################################################################
2140 02:41:40.522731
2141 02:41:41.162249 00180000 ################################################################
2142 02:41:41.162768
2143 02:41:41.804551 00200000 ################################################################
2144 02:41:41.805115
2145 02:41:42.474286 00280000 ################################################################
2146 02:41:42.474846
2147 02:41:43.139294 00300000 ################################################################
2148 02:41:43.139852
2149 02:41:43.805548 00380000 ################################################################
2150 02:41:43.806165
2151 02:41:44.476887 00400000 ################################################################
2152 02:41:44.477403
2153 02:41:45.154068 00480000 ################################################################
2154 02:41:45.154586
2155 02:41:45.819344 00500000 ################################################################
2156 02:41:45.819875
2157 02:41:46.496928 00580000 ################################################################
2158 02:41:46.497515
2159 02:41:47.142187 00600000 ################################################################
2160 02:41:47.142702
2161 02:41:47.800836 00680000 ################################################################
2162 02:41:47.801371
2163 02:41:48.095480 00700000 ############################ done.
2164 02:41:48.095982
2165 02:41:48.099061 The bootfile was 7569296 bytes long.
2166 02:41:48.099590
2167 02:41:48.101826 Sending tftp read request... done.
2168 02:41:48.102310
2169 02:41:48.105255 Waiting for the transfer...
2170 02:41:48.105803
2171 02:41:48.800355 00000000 ################################################################
2172 02:41:48.800604
2173 02:41:49.407639 00080000 ################################################################
2174 02:41:49.407799
2175 02:41:49.989906 00100000 ################################################################
2176 02:41:49.990053
2177 02:41:50.605956 00180000 ################################################################
2178 02:41:50.606428
2179 02:41:51.274662 00200000 ################################################################
2180 02:41:51.275223
2181 02:41:51.888583 00280000 ################################################################
2182 02:41:51.888731
2183 02:41:52.438966 00300000 ################################################################
2184 02:41:52.439115
2185 02:41:53.019497 00380000 ################################################################
2186 02:41:53.019654
2187 02:41:53.618462 00400000 ################################################################
2188 02:41:53.618601
2189 02:41:54.219166 00480000 ################################################################
2190 02:41:54.219303
2191 02:41:54.498872 00500000 ################################ done.
2192 02:41:54.499010
2193 02:41:54.502686 Sending tftp read request... done.
2194 02:41:54.502770
2195 02:41:54.505660 Waiting for the transfer...
2196 02:41:54.505743
2197 02:41:54.505808 00000000 # done.
2198 02:41:54.505871
2199 02:41:54.515741 Command line loaded dynamically from TFTP file: 8867166/tftp-deploy-j3ou8tsd/kernel/cmdline
2200 02:41:54.515825
2201 02:41:54.538625 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8867166/extract-nfsrootfs-avqedi_7,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2202 02:41:54.538715
2203 02:41:54.545036 ec_init(0): CrosEC protocol v3 supported (256, 256)
2204 02:41:54.545122
2205 02:41:54.552059 Shutting down all USB controllers.
2206 02:41:54.552143
2207 02:41:54.552210 Removing current net device
2208 02:41:54.552272
2209 02:41:54.559469 Finalizing coreboot
2210 02:41:54.559554
2211 02:41:54.566352 Exiting depthcharge with code 4 at timestamp: 25795839
2212 02:41:54.566438
2213 02:41:54.566505
2214 02:41:54.566567 Starting kernel ...
2215 02:41:54.566626
2216 02:41:54.566683
2217 02:41:54.566739
2218 02:41:54.567097 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2219 02:41:54.567193 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2220 02:41:54.567267 Setting prompt string to ['Linux version [0-9]']
2221 02:41:54.567339 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2222 02:41:54.567407 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2224 02:46:17.567489 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2226 02:46:17.567723 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2228 02:46:17.567910 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2231 02:46:17.568206 end: 2 depthcharge-action (duration 00:05:00) [common]
2233 02:46:17.568458 Cleaning after the job
2234 02:46:17.568543 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/ramdisk
2235 02:46:17.569064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/kernel
2236 02:46:17.569669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/nfsrootfs
2237 02:46:17.622073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867166/tftp-deploy-j3ou8tsd/modules
2238 02:46:17.622401 start: 4.1 power-off (timeout 00:00:30) [common]
2239 02:46:17.622568 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2240 02:46:17.643772 >> Command sent successfully.
2241 02:46:17.646079 Returned 0 in 0 seconds
2242 02:46:17.746862 end: 4.1 power-off (duration 00:00:00) [common]
2244 02:46:17.747216 start: 4.2 read-feedback (timeout 00:10:00) [common]
2245 02:46:17.747473 Listened to connection for namespace 'common' for up to 1s
2246 02:46:18.752409 Finalising connection for namespace 'common'
2247 02:46:18.752576 Disconnecting from shell: Finalise
2248 02:46:18.853320 end: 4.2 read-feedback (duration 00:00:01) [common]
2249 02:46:18.853516 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8867166
2250 02:46:19.007477 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8867166
2251 02:46:19.007681 JobError: Your job cannot terminate cleanly.