Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 02:41:11.470996 lava-dispatcher, installed at version: 2022.11
2 02:41:11.471208 start: 0 validate
3 02:41:11.471352 Start time: 2023-01-25 02:41:11.471344+00:00 (UTC)
4 02:41:11.471488 Using caching service: 'http://localhost/cache/?uri=%s'
5 02:41:11.471629 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 02:41:11.761889 Using caching service: 'http://localhost/cache/?uri=%s'
7 02:41:11.762084 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 02:41:12.050832 Using caching service: 'http://localhost/cache/?uri=%s'
9 02:41:12.051019 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 02:41:12.336988 Using caching service: 'http://localhost/cache/?uri=%s'
11 02:41:12.337699 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip71-590-g22fc523bf881%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 02:41:12.636875 validate duration: 1.17
14 02:41:12.638221 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 02:41:12.638779 start: 1.1 download-retry (timeout 00:10:00) [common]
16 02:41:12.639275 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 02:41:12.639784 Not decompressing ramdisk as can be used compressed.
18 02:41:12.640270 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/initrd.cpio.gz
19 02:41:12.640654 saving as /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/ramdisk/initrd.cpio.gz
20 02:41:12.640999 total size: 5432131 (5MB)
21 02:41:12.646329 progress 0% (0MB)
22 02:41:12.654753 progress 5% (0MB)
23 02:41:12.661832 progress 10% (0MB)
24 02:41:12.666625 progress 15% (0MB)
25 02:41:12.670746 progress 20% (1MB)
26 02:41:12.673553 progress 25% (1MB)
27 02:41:12.675017 progress 30% (1MB)
28 02:41:12.676672 progress 35% (1MB)
29 02:41:12.678178 progress 40% (2MB)
30 02:41:12.679580 progress 45% (2MB)
31 02:41:12.681017 progress 50% (2MB)
32 02:41:12.682642 progress 55% (2MB)
33 02:41:12.684058 progress 60% (3MB)
34 02:41:12.685556 progress 65% (3MB)
35 02:41:12.687210 progress 70% (3MB)
36 02:41:12.688685 progress 75% (3MB)
37 02:41:12.690116 progress 80% (4MB)
38 02:41:12.691521 progress 85% (4MB)
39 02:41:12.693217 progress 90% (4MB)
40 02:41:12.694650 progress 95% (4MB)
41 02:41:12.696104 progress 100% (5MB)
42 02:41:12.696398 5MB downloaded in 0.06s (93.51MB/s)
43 02:41:12.696564 end: 1.1.1 http-download (duration 00:00:00) [common]
45 02:41:12.696839 end: 1.1 download-retry (duration 00:00:00) [common]
46 02:41:12.696938 start: 1.2 download-retry (timeout 00:10:00) [common]
47 02:41:12.697034 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 02:41:12.697149 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 02:41:12.697224 saving as /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/kernel/bzImage
50 02:41:12.697292 total size: 7569296 (7MB)
51 02:41:12.697359 No compression specified
52 02:41:12.698529 progress 0% (0MB)
53 02:41:12.700645 progress 5% (0MB)
54 02:41:12.702850 progress 10% (0MB)
55 02:41:12.704839 progress 15% (1MB)
56 02:41:12.707040 progress 20% (1MB)
57 02:41:12.709017 progress 25% (1MB)
58 02:41:12.711156 progress 30% (2MB)
59 02:41:12.713115 progress 35% (2MB)
60 02:41:12.715250 progress 40% (2MB)
61 02:41:12.717186 progress 45% (3MB)
62 02:41:12.719272 progress 50% (3MB)
63 02:41:12.721378 progress 55% (4MB)
64 02:41:12.723305 progress 60% (4MB)
65 02:41:12.725415 progress 65% (4MB)
66 02:41:12.727352 progress 70% (5MB)
67 02:41:12.729530 progress 75% (5MB)
68 02:41:12.731472 progress 80% (5MB)
69 02:41:12.733589 progress 85% (6MB)
70 02:41:12.735520 progress 90% (6MB)
71 02:41:12.737634 progress 95% (6MB)
72 02:41:12.739588 progress 100% (7MB)
73 02:41:12.739896 7MB downloaded in 0.04s (169.45MB/s)
74 02:41:12.740064 end: 1.2.1 http-download (duration 00:00:00) [common]
76 02:41:12.740334 end: 1.2 download-retry (duration 00:00:00) [common]
77 02:41:12.740434 start: 1.3 download-retry (timeout 00:10:00) [common]
78 02:41:12.740531 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 02:41:12.740645 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/full.rootfs.tar.xz
80 02:41:12.740721 saving as /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/nfsrootfs/full.rootfs.tar
81 02:41:12.740790 total size: 123909728 (118MB)
82 02:41:12.740859 Using unxz to decompress xz
83 02:41:12.744194 progress 0% (0MB)
84 02:41:13.232533 progress 5% (5MB)
85 02:41:13.738077 progress 10% (11MB)
86 02:41:14.252012 progress 15% (17MB)
87 02:41:14.761866 progress 20% (23MB)
88 02:41:15.128758 progress 25% (29MB)
89 02:41:15.498866 progress 30% (35MB)
90 02:41:15.799032 progress 35% (41MB)
91 02:41:15.982224 progress 40% (47MB)
92 02:41:16.383025 progress 45% (53MB)
93 02:41:16.778943 progress 50% (59MB)
94 02:41:17.147958 progress 55% (65MB)
95 02:41:17.533958 progress 60% (70MB)
96 02:41:17.902972 progress 65% (76MB)
97 02:41:18.320528 progress 70% (82MB)
98 02:41:18.783264 progress 75% (88MB)
99 02:41:19.260533 progress 80% (94MB)
100 02:41:19.401760 progress 85% (100MB)
101 02:41:19.579169 progress 90% (106MB)
102 02:41:19.943081 progress 95% (112MB)
103 02:41:20.349015 progress 100% (118MB)
104 02:41:20.355123 118MB downloaded in 7.61s (15.52MB/s)
105 02:41:20.355437 end: 1.3.1 http-download (duration 00:00:08) [common]
107 02:41:20.355792 end: 1.3 download-retry (duration 00:00:08) [common]
108 02:41:20.355916 start: 1.4 download-retry (timeout 00:09:52) [common]
109 02:41:20.356040 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 02:41:20.356189 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip71-590-g22fc523bf881/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 02:41:20.356279 saving as /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/modules/modules.tar
112 02:41:20.356371 total size: 51848 (0MB)
113 02:41:20.356461 Using unxz to decompress xz
114 02:41:20.359900 progress 63% (0MB)
115 02:41:20.360370 progress 100% (0MB)
116 02:41:20.363940 0MB downloaded in 0.01s (6.54MB/s)
117 02:41:20.364217 end: 1.4.1 http-download (duration 00:00:00) [common]
119 02:41:20.364548 end: 1.4 download-retry (duration 00:00:00) [common]
120 02:41:20.364674 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 02:41:20.364804 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 02:41:22.237207 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8867167/extract-nfsrootfs-q_et41x3
123 02:41:22.237436 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 02:41:22.237557 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 02:41:22.237709 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf
126 02:41:22.237823 makedir: /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin
127 02:41:22.237919 makedir: /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/tests
128 02:41:22.238011 makedir: /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/results
129 02:41:22.238123 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-add-keys
130 02:41:22.238270 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-add-sources
131 02:41:22.238402 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-background-process-start
132 02:41:22.238531 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-background-process-stop
133 02:41:22.238657 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-common-functions
134 02:41:22.238781 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-echo-ipv4
135 02:41:22.238908 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-install-packages
136 02:41:22.239032 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-installed-packages
137 02:41:22.239155 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-os-build
138 02:41:22.239278 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-probe-channel
139 02:41:22.239401 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-probe-ip
140 02:41:22.239531 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-target-ip
141 02:41:22.239654 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-target-mac
142 02:41:22.239774 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-target-storage
143 02:41:22.239898 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-case
144 02:41:22.240022 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-event
145 02:41:22.240322 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-feedback
146 02:41:22.240446 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-raise
147 02:41:22.240569 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-reference
148 02:41:22.240691 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-runner
149 02:41:22.240814 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-set
150 02:41:22.240936 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-test-shell
151 02:41:22.241059 Updating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-install-packages (oe)
152 02:41:22.241186 Updating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/bin/lava-installed-packages (oe)
153 02:41:22.241295 Creating /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/environment
154 02:41:22.241390 LAVA metadata
155 02:41:22.241463 - LAVA_JOB_ID=8867167
156 02:41:22.241534 - LAVA_DISPATCHER_IP=192.168.201.1
157 02:41:22.241643 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 02:41:22.241718 skipped lava-vland-overlay
159 02:41:22.241804 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 02:41:22.241903 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 02:41:22.241979 skipped lava-multinode-overlay
162 02:41:22.242064 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 02:41:22.242155 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 02:41:22.242234 Loading test definitions
165 02:41:22.242334 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 02:41:22.242411 Using /lava-8867167 at stage 0
167 02:41:22.242517 Fetching tests from https://github.com/kernelci/test-definitions
168 02:41:22.242608 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/0/tests/0_ltp-mm'
169 02:41:26.327222 Running '/usr/bin/git checkout kernelci.org
170 02:41:26.479000 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 02:41:26.479853 uuid=8867167_1.5.2.3.1 testdef=None
172 02:41:26.480045 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 02:41:26.480382 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 02:41:26.481298 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 02:41:26.481605 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 02:41:26.482744 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 02:41:26.483078 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 02:41:26.484182 runner path: /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/0/tests/0_ltp-mm test_uuid 8867167_1.5.2.3.1
182 02:41:26.484297 SKIPFILE='skipfile-lkft.yaml'
183 02:41:26.484387 SKIP_INSTALL='true'
184 02:41:26.484478 TST_CMDFILES='mm'
185 02:41:26.484666 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 02:41:26.484938 Creating lava-test-runner.conf files
188 02:41:26.485033 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8867167/lava-overlay-gev13ouf/lava-8867167/0 for stage 0
189 02:41:26.485154 - 0_ltp-mm
190 02:41:26.485281 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 02:41:26.485400 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 02:41:34.752299 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 02:41:34.752480 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 02:41:34.752608 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 02:41:34.752750 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
196 02:41:34.752872 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 02:41:34.865813 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 02:41:34.866197 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 02:41:34.866438 extracting modules file /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867167/extract-nfsrootfs-q_et41x3
200 02:41:34.871033 extracting modules file /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8867167/extract-overlay-ramdisk-3j_51yrv/ramdisk
201 02:41:34.875355 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 02:41:34.875486 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 02:41:34.875593 [common] Applying overlay to NFS
204 02:41:34.875681 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8867167/compress-overlay-76fnfzbn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8867167/extract-nfsrootfs-q_et41x3
205 02:41:35.388802 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
206 02:41:35.388977 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 02:41:35.389087 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 02:41:35.389190 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 02:41:35.389277 Building ramdisk /var/lib/lava/dispatcher/tmp/8867167/extract-overlay-ramdisk-3j_51yrv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8867167/extract-overlay-ramdisk-3j_51yrv/ramdisk
210 02:41:35.426061 >> 24548 blocks
211 02:41:35.956722 rename /var/lib/lava/dispatcher/tmp/8867167/extract-overlay-ramdisk-3j_51yrv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
212 02:41:35.957147 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 02:41:35.957280 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 02:41:35.957395 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 02:41:35.957500 No mkimage arch provided, not using FIT.
216 02:41:35.957606 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 02:41:35.957703 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 02:41:35.957812 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 02:41:35.957916 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 02:41:35.958004 No LXC device requested
221 02:41:35.958096 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 02:41:35.958196 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 02:41:35.958290 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 02:41:35.958369 Checking files for TFTP limit of 4294967296 bytes.
225 02:41:35.958801 end: 1 tftp-deploy (duration 00:00:23) [common]
226 02:41:35.958920 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 02:41:35.959028 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 02:41:35.959170 substitutions:
229 02:41:35.959248 - {DTB}: None
230 02:41:35.959323 - {INITRD}: 8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
231 02:41:35.959391 - {KERNEL}: 8867167/tftp-deploy-qr_0t9i3/kernel/bzImage
232 02:41:35.959463 - {LAVA_MAC}: None
233 02:41:35.959532 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8867167/extract-nfsrootfs-q_et41x3
234 02:41:35.959600 - {NFS_SERVER_IP}: 192.168.201.1
235 02:41:35.959665 - {PRESEED_CONFIG}: None
236 02:41:35.959731 - {PRESEED_LOCAL}: None
237 02:41:35.959795 - {RAMDISK}: 8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
238 02:41:35.959859 - {ROOT_PART}: None
239 02:41:35.959922 - {ROOT}: None
240 02:41:35.959985 - {SERVER_IP}: 192.168.201.1
241 02:41:35.960054 - {TEE}: None
242 02:41:35.960121 Parsed boot commands:
243 02:41:35.960183 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 02:41:35.960350 Parsed boot commands: tftpboot 192.168.201.1 8867167/tftp-deploy-qr_0t9i3/kernel/bzImage 8867167/tftp-deploy-qr_0t9i3/kernel/cmdline 8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
245 02:41:35.960454 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 02:41:35.960560 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 02:41:35.960666 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 02:41:35.960768 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 02:41:35.960847 Not connected, no need to disconnect.
250 02:41:35.960939 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 02:41:35.961032 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 02:41:35.961113 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 02:41:35.963947 Setting prompt string to ['lava-test: # ']
254 02:41:35.964273 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 02:41:35.964391 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 02:41:35.964503 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 02:41:35.964609 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 02:41:35.964817 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 02:41:35.985569 >> Command sent successfully.
260 02:41:35.987533 Returned 0 in 0 seconds
261 02:41:36.088446 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 02:41:36.089481 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 02:41:36.089871 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 02:41:36.090208 Setting prompt string to 'Starting depthcharge on Helios...'
266 02:41:36.090474 Changing prompt to 'Starting depthcharge on Helios...'
267 02:41:36.090743 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 02:41:36.091663 [Enter `^Ec?' for help]
269 02:41:42.545933
270 02:41:42.546450
271 02:41:42.555932 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 02:41:42.559341 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 02:41:42.565953 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 02:41:42.569564 CPU: AES supported, TXT NOT supported, VT supported
275 02:41:42.576447 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 02:41:42.579772 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 02:41:42.586680 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 02:41:42.589804 VBOOT: Loading verstage.
279 02:41:42.592676 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 02:41:42.599802 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 02:41:42.602934 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 02:41:42.606175 CBFS @ c08000 size 3f8000
283 02:41:42.612556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 02:41:42.615659 CBFS: Locating 'fallback/verstage'
285 02:41:42.619191 CBFS: Found @ offset 10fb80 size 1072c
286 02:41:42.622517
287 02:41:42.622975
288 02:41:42.632702 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 02:41:42.646855 Probing TPM: . done!
290 02:41:42.650863 TPM ready after 0 ms
291 02:41:42.653480 Connected to device vid:did:rid of 1ae0:0028:00
292 02:41:42.664138 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 02:41:42.667447 Initialized TPM device CR50 revision 0
294 02:41:42.710698 tlcl_send_startup: Startup return code is 0
295 02:41:42.711188 TPM: setup succeeded
296 02:41:42.723885 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 02:41:42.726943 Chrome EC: UHEPI supported
298 02:41:42.730741 Phase 1
299 02:41:42.734046 FMAP: area GBB found @ c05000 (12288 bytes)
300 02:41:42.740632 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 02:41:42.741082 Phase 2
302 02:41:42.743768
303 02:41:42.744187 Phase 3
304 02:41:42.746976 FMAP: area GBB found @ c05000 (12288 bytes)
305 02:41:42.753545 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 02:41:42.760501 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 02:41:42.763805 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 02:41:42.770381 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 02:41:42.785732 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 02:41:42.789110 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 02:41:42.795616 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 02:41:42.800010 Phase 4
313 02:41:42.803278 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 02:41:42.809860 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 02:41:42.989729 VB2:vb2_rsa_verify_digest() Digest check failed!
316 02:41:42.993061 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 02:41:42.996272
318 02:41:42.996676 Saving nvdata
319 02:41:42.999615 Reboot requested (10020007)
320 02:41:43.002788 board_reset() called!
321 02:41:43.003214 full_reset() called!
322 02:41:47.513345
323 02:41:47.513854
324 02:41:47.523098 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
325 02:41:47.526236 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
326 02:41:47.532811 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
327 02:41:47.536128 CPU: AES supported, TXT NOT supported, VT supported
328 02:41:47.542487 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
329 02:41:47.545910 PCH: device id 0284 (rev 00) is Cometlake-U Premium
330 02:41:47.552620 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
331 02:41:47.556391 VBOOT: Loading verstage.
332 02:41:47.559379 FMAP: Found "FLASH" version 1.1 at 0xc04000.
333 02:41:47.565790 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
334 02:41:47.569691 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 02:41:47.573039 CBFS @ c08000 size 3f8000
336 02:41:47.579676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 02:41:47.583040 CBFS: Locating 'fallback/verstage'
338 02:41:47.586285 CBFS: Found @ offset 10fb80 size 1072c
339 02:41:47.589742
340 02:41:47.590185
341 02:41:47.599526 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
342 02:41:47.614430 Probing TPM: . done!
343 02:41:47.617839 TPM ready after 0 ms
344 02:41:47.620640 Connected to device vid:did:rid of 1ae0:0028:00
345 02:41:47.631309 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
346 02:41:47.634434 Initialized TPM device CR50 revision 0
347 02:41:47.676992 tlcl_send_startup: Startup return code is 0
348 02:41:47.677442 TPM: setup succeeded
349 02:41:47.689622 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
350 02:41:47.692953 Chrome EC: UHEPI supported
351 02:41:47.696276 Phase 1
352 02:41:47.699706 FMAP: area GBB found @ c05000 (12288 bytes)
353 02:41:47.706222 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
354 02:41:47.712697 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
355 02:41:47.715927 Recovery requested (1009000e)
356 02:41:47.722320 Saving nvdata
357 02:41:47.728603 tlcl_extend: response is 0
358 02:41:47.737083 tlcl_extend: response is 0
359 02:41:47.743968 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 02:41:47.747231 CBFS @ c08000 size 3f8000
361 02:41:47.753841 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 02:41:47.757221 CBFS: Locating 'fallback/romstage'
363 02:41:47.760568 CBFS: Found @ offset 80 size 145fc
364 02:41:47.763769 Accumulated console time in verstage 98 ms
365 02:41:47.764300
366 02:41:47.764723
367 02:41:47.777121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
368 02:41:47.783920 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
369 02:41:47.787162 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 02:41:47.790370 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 02:41:47.797093 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
372 02:41:47.800512 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
373 02:41:47.803795 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
374 02:41:47.806995 TCO_STS: 0000 0000
375 02:41:47.810409 GEN_PMCON: e0015238 00000200
376 02:41:47.813632 GBLRST_CAUSE: 00000000 00000000
377 02:41:47.814067 prev_sleep_state 5
378 02:41:47.816724 Boot Count incremented to 42962
379 02:41:47.823829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 02:41:47.827128 CBFS @ c08000 size 3f8000
381 02:41:47.834130 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 02:41:47.834584 CBFS: Locating 'fspm.bin'
383 02:41:47.837427 CBFS: Found @ offset 5ffc0 size 71000
384 02:41:47.840131
385 02:41:47.843446 Chrome EC: UHEPI supported
386 02:41:47.850288 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
387 02:41:47.853923 Probing TPM: done!
388 02:41:47.860486 Connected to device vid:did:rid of 1ae0:0028:00
389 02:41:47.870095 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
390 02:41:47.876697 Initialized TPM device CR50 revision 0
391 02:41:47.885194 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
392 02:41:47.891837 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
393 02:41:47.895100 MRC cache found, size 1948
394 02:41:47.898521 bootmode is set to: 2
395 02:41:47.901643 PRMRR disabled by config.
396 02:41:47.902079 SPD INDEX = 1
397 02:41:47.905074
398 02:41:47.908457 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 02:41:47.911633 CBFS @ c08000 size 3f8000
400 02:41:47.918270 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 02:41:47.918708 CBFS: Locating 'spd.bin'
402 02:41:47.921614 CBFS: Found @ offset 5fb80 size 400
403 02:41:47.924973 SPD: module type is LPDDR3
404 02:41:47.928164 SPD: module part is
405 02:41:47.934657 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
406 02:41:47.937851 SPD: device width 4 bits, bus width 8 bits
407 02:41:47.941850 SPD: module size is 4096 MB (per channel)
408 02:41:47.945157 memory slot: 0 configuration done.
409 02:41:47.948423 memory slot: 2 configuration done.
410 02:41:47.999169 CBMEM:
411 02:41:48.002334 IMD: root @ 99fff000 254 entries.
412 02:41:48.005672 IMD: root @ 99ffec00 62 entries.
413 02:41:48.008963 External stage cache:
414 02:41:48.012304 IMD: root @ 9abff000 254 entries.
415 02:41:48.015637 IMD: root @ 9abfec00 62 entries.
416 02:41:48.018949 Chrome EC: clear events_b mask to 0x0000000020004000
417 02:41:48.022343
418 02:41:48.035551 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 02:41:48.048468 tlcl_write: response is 0
420 02:41:48.057236 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 02:41:48.064007 MRC: TPM MRC hash updated successfully.
422 02:41:48.064479 2 DIMMs found
423 02:41:48.067336 SMM Memory Map
424 02:41:48.070571 SMRAM : 0x9a000000 0x1000000
425 02:41:48.073739 Subregion 0: 0x9a000000 0xa00000
426 02:41:48.077498 Subregion 1: 0x9aa00000 0x200000
427 02:41:48.080315 Subregion 2: 0x9ac00000 0x400000
428 02:41:48.083899 top_of_ram = 0x9a000000
429 02:41:48.087646 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 02:41:48.093689 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 02:41:48.096975 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 02:41:48.104039 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 02:41:48.107313 CBFS @ c08000 size 3f8000
434 02:41:48.110618 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 02:41:48.113859 CBFS: Locating 'fallback/postcar'
436 02:41:48.120589 CBFS: Found @ offset 107000 size 4b44
437 02:41:48.123688 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 02:41:48.135591 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
439 02:41:48.138882 Processing 180 relocs. Offset value of 0x97c0c000
440 02:41:48.147382 Accumulated console time in romstage 286 ms
441 02:41:48.147690
442 02:41:48.147932
443 02:41:48.157973 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
444 02:41:48.164454 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 02:41:48.167279 CBFS @ c08000 size 3f8000
446 02:41:48.170689 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 02:41:48.177126 CBFS: Locating 'fallback/ramstage'
448 02:41:48.180448 CBFS: Found @ offset 43380 size 1b9e8
449 02:41:48.187478 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
450 02:41:48.219063 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
451 02:41:48.222358 Processing 3976 relocs. Offset value of 0x98db0000
452 02:41:48.228922 Accumulated console time in postcar 52 ms
453 02:41:48.229018
454 02:41:48.229095
455 02:41:48.239380 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
456 02:41:48.245434 FMAP: area RO_VPD found @ c00000 (16384 bytes)
457 02:41:48.249334 WARNING: RO_VPD is uninitialized or empty.
458 02:41:48.252528 FMAP: area RW_VPD found @ af8000 (8192 bytes)
459 02:41:48.259191 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 02:41:48.259365 Normal boot.
461 02:41:48.265262 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
462 02:41:48.269211 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 02:41:48.272451 CBFS @ c08000 size 3f8000
464 02:41:48.278728 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 02:41:48.282605 CBFS: Locating 'cpu_microcode_blob.bin'
466 02:41:48.285882 CBFS: Found @ offset 14700 size 2ec00
467 02:41:48.289226 microcode: sig=0x806ec pf=0x4 revision=0xc9
468 02:41:48.292411 Skip microcode update
469 02:41:48.299047 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
470 02:41:48.299540 CBFS @ c08000 size 3f8000
471 02:41:48.305659 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
472 02:41:48.308451 CBFS: Locating 'fsps.bin'
473 02:41:48.311800 CBFS: Found @ offset d1fc0 size 35000
474 02:41:48.337946 Detected 4 core, 8 thread CPU.
475 02:41:48.340668 Setting up SMI for CPU
476 02:41:48.344580 IED base = 0x9ac00000
477 02:41:48.345030 IED size = 0x00400000
478 02:41:48.347743 Will perform SMM setup.
479 02:41:48.354410 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
480 02:41:48.360725 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
481 02:41:48.363880 Processing 16 relocs. Offset value of 0x00030000
482 02:41:48.368106 Attempting to start 7 APs
483 02:41:48.371293 Waiting for 10ms after sending INIT.
484 02:41:48.387691 Waiting for 1st SIPI to complete...done.
485 02:41:48.388163 AP: slot 6 apic_id 6.
486 02:41:48.390982 AP: slot 2 apic_id 7.
487 02:41:48.393933 AP: slot 5 apic_id 5.
488 02:41:48.394368 AP: slot 7 apic_id 4.
489 02:41:48.397151 AP: slot 4 apic_id 2.
490 02:41:48.400653 AP: slot 1 apic_id 3.
491 02:41:48.403934 Waiting for 2nd SIPI to complete...done.
492 02:41:48.407397 AP: slot 3 apic_id 1.
493 02:41:48.414074 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
494 02:41:48.420514 Processing 13 relocs. Offset value of 0x00038000
495 02:41:48.423785 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
496 02:41:48.427017
497 02:41:48.430378 Installing SMM handler to 0x9a000000
498 02:41:48.436997 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 02:41:48.443537 Processing 658 relocs. Offset value of 0x9a010000
500 02:41:48.450305 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 02:41:48.453282 Processing 13 relocs. Offset value of 0x9a008000
502 02:41:48.459925 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 02:41:48.466765 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 02:41:48.473471 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 02:41:48.476694 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 02:41:48.483462 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 02:41:48.489908 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 02:41:48.493122 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 02:41:48.496533
510 02:41:48.499654 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 02:41:48.503776 Clearing SMI status registers
512 02:41:48.507011 SMI_STS: PM1
513 02:41:48.507449 PM1_STS: PWRBTN
514 02:41:48.510458 TCO_STS: SECOND_TO
515 02:41:48.513172 New SMBASE 0x9a000000
516 02:41:48.516538 In relocation handler: CPU 0
517 02:41:48.519850 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 02:41:48.523140 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 02:41:48.526489 Relocation complete.
520 02:41:48.529800 New SMBASE 0x99fff400
521 02:41:48.530258 In relocation handler: CPU 3
522 02:41:48.537244 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
523 02:41:48.540286 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 02:41:48.543548 Relocation complete.
525 02:41:48.543980 New SMBASE 0x99fffc00
526 02:41:48.546901
527 02:41:48.547379 In relocation handler: CPU 1
528 02:41:48.553536 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
529 02:41:48.556868 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 02:41:48.560006 Relocation complete.
531 02:41:48.560470 New SMBASE 0x99fff000
532 02:41:48.563491 In relocation handler: CPU 4
533 02:41:48.569684 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
534 02:41:48.572986 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 02:41:48.576283 Relocation complete.
536 02:41:48.576714 New SMBASE 0x99ffec00
537 02:41:48.579621 In relocation handler: CPU 5
538 02:41:48.582921 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
539 02:41:48.586259
540 02:41:48.589760 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 02:41:48.593028 Relocation complete.
542 02:41:48.593465 New SMBASE 0x99ffe400
543 02:41:48.596325 In relocation handler: CPU 7
544 02:41:48.599474 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 02:41:48.606783 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 02:41:48.609858 Relocation complete.
547 02:41:48.610294 New SMBASE 0x99fff800
548 02:41:48.613273 In relocation handler: CPU 2
549 02:41:48.616456 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 02:41:48.623080 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 02:41:48.623562 Relocation complete.
552 02:41:48.626339
553 02:41:48.626920 New SMBASE 0x99ffe800
554 02:41:48.629652 In relocation handler: CPU 6
555 02:41:48.632813 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
556 02:41:48.639448 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 02:41:48.639888 Relocation complete.
558 02:41:48.643308 Initializing CPU #0
559 02:41:48.646269 CPU: vendor Intel device 806ec
560 02:41:48.649771 CPU: family 06, model 8e, stepping 0c
561 02:41:48.652971 Clearing out pending MCEs
562 02:41:48.656285 Setting up local APIC...
563 02:41:48.656728 apic_id: 0x00 done.
564 02:41:48.659575 Turbo is available but hidden
565 02:41:48.662837 Turbo is available and visible
566 02:41:48.665913 VMX status: enabled
567 02:41:48.669488 IA32_FEATURE_CONTROL status: locked
568 02:41:48.672470 Skip microcode update
569 02:41:48.672910 CPU #0 initialized
570 02:41:48.675712 Initializing CPU #3
571 02:41:48.679081 Initializing CPU #7
572 02:41:48.679555 Initializing CPU #5
573 02:41:48.682518 CPU: vendor Intel device 806ec
574 02:41:48.685877 CPU: family 06, model 8e, stepping 0c
575 02:41:48.689734 CPU: vendor Intel device 806ec
576 02:41:48.692211 CPU: family 06, model 8e, stepping 0c
577 02:41:48.695603 Clearing out pending MCEs
578 02:41:48.699317 Clearing out pending MCEs
579 02:41:48.702781 Setting up local APIC...
580 02:41:48.703281 Initializing CPU #2
581 02:41:48.705894 Initializing CPU #6
582 02:41:48.709438 CPU: vendor Intel device 806ec
583 02:41:48.712350 CPU: family 06, model 8e, stepping 0c
584 02:41:48.715389 CPU: vendor Intel device 806ec
585 02:41:48.718788 CPU: family 06, model 8e, stepping 0c
586 02:41:48.722120 Clearing out pending MCEs
587 02:41:48.725551 Clearing out pending MCEs
588 02:41:48.725990 Setting up local APIC...
589 02:41:48.728755 CPU: vendor Intel device 806ec
590 02:41:48.735248 CPU: family 06, model 8e, stepping 0c
591 02:41:48.735708 Clearing out pending MCEs
592 02:41:48.739235 apic_id: 0x06 done.
593 02:41:48.742508 Setting up local APIC...
594 02:41:48.745925 Setting up local APIC...
595 02:41:48.746362 apic_id: 0x07 done.
596 02:41:48.748841 VMX status: enabled
597 02:41:48.749274 VMX status: enabled
598 02:41:48.752195 IA32_FEATURE_CONTROL status: locked
599 02:41:48.755448
600 02:41:48.758829 IA32_FEATURE_CONTROL status: locked
601 02:41:48.759263 Skip microcode update
602 02:41:48.762083 Skip microcode update
603 02:41:48.765538 CPU #6 initialized
604 02:41:48.765969 CPU #2 initialized
605 02:41:48.768637 Initializing CPU #1
606 02:41:48.769094 Initializing CPU #4
607 02:41:48.772661 CPU: vendor Intel device 806ec
608 02:41:48.775826 CPU: family 06, model 8e, stepping 0c
609 02:41:48.779088 CPU: vendor Intel device 806ec
610 02:41:48.782600 CPU: family 06, model 8e, stepping 0c
611 02:41:48.785439
612 02:41:48.785900 Clearing out pending MCEs
613 02:41:48.788841 Clearing out pending MCEs
614 02:41:48.791987 Setting up local APIC...
615 02:41:48.795823 Setting up local APIC...
616 02:41:48.796394 apic_id: 0x01 done.
617 02:41:48.798543 apic_id: 0x04 done.
618 02:41:48.802402 apic_id: 0x05 done.
619 02:41:48.803077 VMX status: enabled
620 02:41:48.805326 VMX status: enabled
621 02:41:48.808857 IA32_FEATURE_CONTROL status: locked
622 02:41:48.812178 IA32_FEATURE_CONTROL status: locked
623 02:41:48.815590 Skip microcode update
624 02:41:48.816107 Skip microcode update
625 02:41:48.818761 CPU #7 initialized
626 02:41:48.819245 CPU #5 initialized
627 02:41:48.821978
628 02:41:48.822491 apic_id: 0x03 done.
629 02:41:48.825167 Setting up local APIC...
630 02:41:48.828535 VMX status: enabled
631 02:41:48.829124 apic_id: 0x02 done.
632 02:41:48.831892 VMX status: enabled
633 02:41:48.832435 VMX status: enabled
634 02:41:48.834790 IA32_FEATURE_CONTROL status: locked
635 02:41:48.838494
636 02:41:48.841864 IA32_FEATURE_CONTROL status: locked
637 02:41:48.842403 Skip microcode update
638 02:41:48.845344 Skip microcode update
639 02:41:48.848396 CPU #1 initialized
640 02:41:48.848945 CPU #4 initialized
641 02:41:48.851813 IA32_FEATURE_CONTROL status: locked
642 02:41:48.855014 Skip microcode update
643 02:41:48.858070 CPU #3 initialized
644 02:41:48.861442 bsp_do_flight_plan done after 455 msecs.
645 02:41:48.864715 CPU: frequency set to 4200 MHz
646 02:41:48.865277 Enabling SMIs.
647 02:41:48.868116 Locking SMM.
648 02:41:48.881496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 02:41:48.884784 CBFS @ c08000 size 3f8000
650 02:41:48.891527 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 02:41:48.891988 CBFS: Locating 'vbt.bin'
652 02:41:48.894649 CBFS: Found @ offset 5f5c0 size 499
653 02:41:48.898389
654 02:41:48.901940 Found a VBT of 4608 bytes after decompression
655 02:41:49.083455 Display FSP Version Info HOB
656 02:41:49.087394 Reference Code - CPU = 9.0.1e.30
657 02:41:49.090792 uCode Version = 0.0.0.ca
658 02:41:49.093674 TXT ACM version = ff.ff.ff.ffff
659 02:41:49.096968 Display FSP Version Info HOB
660 02:41:49.099996 Reference Code - ME = 9.0.1e.30
661 02:41:49.103717 MEBx version = 0.0.0.0
662 02:41:49.107099 ME Firmware Version = Consumer SKU
663 02:41:49.110228 Display FSP Version Info HOB
664 02:41:49.113434 Reference Code - CML PCH = 9.0.1e.30
665 02:41:49.116593 PCH-CRID Status = Disabled
666 02:41:49.119892 PCH-CRID Original Value = ff.ff.ff.ffff
667 02:41:49.123693 PCH-CRID New Value = ff.ff.ff.ffff
668 02:41:49.126776 OPROM - RST - RAID = ff.ff.ff.ffff
669 02:41:49.130233 ChipsetInit Base Version = ff.ff.ff.ffff
670 02:41:49.133190 ChipsetInit Oem Version = ff.ff.ff.ffff
671 02:41:49.136711 Display FSP Version Info HOB
672 02:41:49.143375 Reference Code - SA - System Agent = 9.0.1e.30
673 02:41:49.146960 Reference Code - MRC = 0.7.1.6c
674 02:41:49.147539 SA - PCIe Version = 9.0.1e.30
675 02:41:49.150141 SA-CRID Status = Disabled
676 02:41:49.153335 SA-CRID Original Value = 0.0.0.c
677 02:41:49.156650 SA-CRID New Value = 0.0.0.c
678 02:41:49.159841 OPROM - VBIOS = ff.ff.ff.ffff
679 02:41:49.162928 RTC Init
680 02:41:49.166882 Set power on after power failure.
681 02:41:49.167465 Disabling Deep S3
682 02:41:49.169579 Disabling Deep S3
683 02:41:49.170156 Disabling Deep S4
684 02:41:49.173380 Disabling Deep S4
685 02:41:49.173979 Disabling Deep S5
686 02:41:49.176666 Disabling Deep S5
687 02:41:49.183399 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1
688 02:41:49.183967 Enumerating buses...
689 02:41:49.189958 Show all devs... Before device enumeration.
690 02:41:49.190537 Root Device: enabled 1
691 02:41:49.193246 CPU_CLUSTER: 0: enabled 1
692 02:41:49.196590 DOMAIN: 0000: enabled 1
693 02:41:49.199719 APIC: 00: enabled 1
694 02:41:49.200386 PCI: 00:00.0: enabled 1
695 02:41:49.202714 PCI: 00:02.0: enabled 1
696 02:41:49.206273 PCI: 00:04.0: enabled 0
697 02:41:49.209241 PCI: 00:05.0: enabled 0
698 02:41:49.209681 PCI: 00:12.0: enabled 1
699 02:41:49.212609 PCI: 00:12.5: enabled 0
700 02:41:49.215897 PCI: 00:12.6: enabled 0
701 02:41:49.216360 PCI: 00:14.0: enabled 1
702 02:41:49.218983
703 02:41:49.219420 PCI: 00:14.1: enabled 0
704 02:41:49.222293 PCI: 00:14.3: enabled 1
705 02:41:49.225518 PCI: 00:14.5: enabled 0
706 02:41:49.225964 PCI: 00:15.0: enabled 1
707 02:41:49.228913 PCI: 00:15.1: enabled 1
708 02:41:49.232224 PCI: 00:15.2: enabled 0
709 02:41:49.236194 PCI: 00:15.3: enabled 0
710 02:41:49.236729 PCI: 00:16.0: enabled 1
711 02:41:49.239750 PCI: 00:16.1: enabled 0
712 02:41:49.242273 PCI: 00:16.2: enabled 0
713 02:41:49.246137 PCI: 00:16.3: enabled 0
714 02:41:49.246690 PCI: 00:16.4: enabled 0
715 02:41:49.249144 PCI: 00:16.5: enabled 0
716 02:41:49.252820 PCI: 00:17.0: enabled 1
717 02:41:49.255766 PCI: 00:19.0: enabled 1
718 02:41:49.256338 PCI: 00:19.1: enabled 0
719 02:41:49.259077 PCI: 00:19.2: enabled 0
720 02:41:49.262087 PCI: 00:1a.0: enabled 0
721 02:41:49.262525 PCI: 00:1c.0: enabled 0
722 02:41:49.265213 PCI: 00:1c.1: enabled 0
723 02:41:49.268917 PCI: 00:1c.2: enabled 0
724 02:41:49.272156 PCI: 00:1c.3: enabled 0
725 02:41:49.272696 PCI: 00:1c.4: enabled 0
726 02:41:49.275464 PCI: 00:1c.5: enabled 0
727 02:41:49.278502 PCI: 00:1c.6: enabled 0
728 02:41:49.282332 PCI: 00:1c.7: enabled 0
729 02:41:49.282798 PCI: 00:1d.0: enabled 1
730 02:41:49.285554 PCI: 00:1d.1: enabled 0
731 02:41:49.288652 PCI: 00:1d.2: enabled 0
732 02:41:49.291932 PCI: 00:1d.3: enabled 0
733 02:41:49.292403 PCI: 00:1d.4: enabled 0
734 02:41:49.295106 PCI: 00:1d.5: enabled 1
735 02:41:49.298408 PCI: 00:1e.0: enabled 1
736 02:41:49.298846 PCI: 00:1e.1: enabled 0
737 02:41:49.301952 PCI: 00:1e.2: enabled 1
738 02:41:49.305368 PCI: 00:1e.3: enabled 1
739 02:41:49.308784 PCI: 00:1f.0: enabled 1
740 02:41:49.309222 PCI: 00:1f.1: enabled 1
741 02:41:49.312208 PCI: 00:1f.2: enabled 1
742 02:41:49.315404 PCI: 00:1f.3: enabled 1
743 02:41:49.318561 PCI: 00:1f.4: enabled 1
744 02:41:49.319086 PCI: 00:1f.5: enabled 1
745 02:41:49.321627 PCI: 00:1f.6: enabled 0
746 02:41:49.325568 USB0 port 0: enabled 1
747 02:41:49.326005 I2C: 00:15: enabled 1
748 02:41:49.328870 I2C: 00:5d: enabled 1
749 02:41:49.331480 GENERIC: 0.0: enabled 1
750 02:41:49.335380 I2C: 00:1a: enabled 1
751 02:41:49.335915 I2C: 00:38: enabled 1
752 02:41:49.338633 I2C: 00:39: enabled 1
753 02:41:49.341820 I2C: 00:3a: enabled 1
754 02:41:49.342282 I2C: 00:3b: enabled 1
755 02:41:49.344914 PCI: 00:00.0: enabled 1
756 02:41:49.348478 SPI: 00: enabled 1
757 02:41:49.349027 SPI: 01: enabled 1
758 02:41:49.351856 PNP: 0c09.0: enabled 1
759 02:41:49.355359 USB2 port 0: enabled 1
760 02:41:49.355900 USB2 port 1: enabled 1
761 02:41:49.358334 USB2 port 2: enabled 0
762 02:41:49.361564 USB2 port 3: enabled 0
763 02:41:49.362105 USB2 port 5: enabled 0
764 02:41:49.364695 USB2 port 6: enabled 1
765 02:41:49.368131 USB2 port 9: enabled 1
766 02:41:49.371842 USB3 port 0: enabled 1
767 02:41:49.372418 USB3 port 1: enabled 1
768 02:41:49.374844 USB3 port 2: enabled 1
769 02:41:49.377859 USB3 port 3: enabled 1
770 02:41:49.378301 USB3 port 4: enabled 0
771 02:41:49.381362 APIC: 03: enabled 1
772 02:41:49.385162 APIC: 07: enabled 1
773 02:41:49.385693 APIC: 01: enabled 1
774 02:41:49.388277 APIC: 02: enabled 1
775 02:41:49.388713 APIC: 05: enabled 1
776 02:41:49.391365 APIC: 06: enabled 1
777 02:41:49.394840 APIC: 04: enabled 1
778 02:41:49.395381 Compare with tree...
779 02:41:49.398258 Root Device: enabled 1
780 02:41:49.401152 CPU_CLUSTER: 0: enabled 1
781 02:41:49.405029 APIC: 00: enabled 1
782 02:41:49.405578 APIC: 03: enabled 1
783 02:41:49.408130 APIC: 07: enabled 1
784 02:41:49.411363 APIC: 01: enabled 1
785 02:41:49.411919 APIC: 02: enabled 1
786 02:41:49.414986 APIC: 05: enabled 1
787 02:41:49.417900 APIC: 06: enabled 1
788 02:41:49.418337 APIC: 04: enabled 1
789 02:41:49.421170 DOMAIN: 0000: enabled 1
790 02:41:49.424359 PCI: 00:00.0: enabled 1
791 02:41:49.427748 PCI: 00:02.0: enabled 1
792 02:41:49.428207 PCI: 00:04.0: enabled 0
793 02:41:49.431309 PCI: 00:05.0: enabled 0
794 02:41:49.434592 PCI: 00:12.0: enabled 1
795 02:41:49.437632 PCI: 00:12.5: enabled 0
796 02:41:49.440718 PCI: 00:12.6: enabled 0
797 02:41:49.441156 PCI: 00:14.0: enabled 1
798 02:41:49.444740 USB0 port 0: enabled 1
799 02:41:49.447841 USB2 port 0: enabled 1
800 02:41:49.450864 USB2 port 1: enabled 1
801 02:41:49.454649 USB2 port 2: enabled 0
802 02:41:49.455085 USB2 port 3: enabled 0
803 02:41:49.457986 USB2 port 5: enabled 0
804 02:41:49.461014 USB2 port 6: enabled 1
805 02:41:49.464728 USB2 port 9: enabled 1
806 02:41:49.467587 USB3 port 0: enabled 1
807 02:41:49.470893 USB3 port 1: enabled 1
808 02:41:49.471432 USB3 port 2: enabled 1
809 02:41:49.474488 USB3 port 3: enabled 1
810 02:41:49.477509 USB3 port 4: enabled 0
811 02:41:49.480918 PCI: 00:14.1: enabled 0
812 02:41:49.484004 PCI: 00:14.3: enabled 1
813 02:41:49.484462 PCI: 00:14.5: enabled 0
814 02:41:49.487180 PCI: 00:15.0: enabled 1
815 02:41:49.490863 I2C: 00:15: enabled 1
816 02:41:49.494232 PCI: 00:15.1: enabled 1
817 02:41:49.497308 I2C: 00:5d: enabled 1
818 02:41:49.497747 GENERIC: 0.0: enabled 1
819 02:41:49.500481 PCI: 00:15.2: enabled 0
820 02:41:49.503655 PCI: 00:15.3: enabled 0
821 02:41:49.507734 PCI: 00:16.0: enabled 1
822 02:41:49.508305 PCI: 00:16.1: enabled 0
823 02:41:49.510829
824 02:41:49.511307 PCI: 00:16.2: enabled 0
825 02:41:49.514108 PCI: 00:16.3: enabled 0
826 02:41:49.517818 PCI: 00:16.4: enabled 0
827 02:41:49.520649 PCI: 00:16.5: enabled 0
828 02:41:49.521104 PCI: 00:17.0: enabled 1
829 02:41:49.524122 PCI: 00:19.0: enabled 1
830 02:41:49.527259 I2C: 00:1a: enabled 1
831 02:41:49.530871 I2C: 00:38: enabled 1
832 02:41:49.533846 I2C: 00:39: enabled 1
833 02:41:49.534285 I2C: 00:3a: enabled 1
834 02:41:49.537267 I2C: 00:3b: enabled 1
835 02:41:49.540545 PCI: 00:19.1: enabled 0
836 02:41:49.543880 PCI: 00:19.2: enabled 0
837 02:41:49.544451 PCI: 00:1a.0: enabled 0
838 02:41:49.547014 PCI: 00:1c.0: enabled 0
839 02:41:49.550061 PCI: 00:1c.1: enabled 0
840 02:41:49.553432 PCI: 00:1c.2: enabled 0
841 02:41:49.557150 PCI: 00:1c.3: enabled 0
842 02:41:49.557584 PCI: 00:1c.4: enabled 0
843 02:41:49.560186 PCI: 00:1c.5: enabled 0
844 02:41:49.563506 PCI: 00:1c.6: enabled 0
845 02:41:49.566502 PCI: 00:1c.7: enabled 0
846 02:41:49.570356 PCI: 00:1d.0: enabled 1
847 02:41:49.570793 PCI: 00:1d.1: enabled 0
848 02:41:49.573364 PCI: 00:1d.2: enabled 0
849 02:41:49.576997 PCI: 00:1d.3: enabled 0
850 02:41:49.580022 PCI: 00:1d.4: enabled 0
851 02:41:49.583439 PCI: 00:1d.5: enabled 1
852 02:41:49.583873 PCI: 00:00.0: enabled 1
853 02:41:49.586994 PCI: 00:1e.0: enabled 1
854 02:41:49.589858 PCI: 00:1e.1: enabled 0
855 02:41:49.593662 PCI: 00:1e.2: enabled 1
856 02:41:49.594198 SPI: 00: enabled 1
857 02:41:49.596993 PCI: 00:1e.3: enabled 1
858 02:41:49.600277 SPI: 01: enabled 1
859 02:41:49.603616 PCI: 00:1f.0: enabled 1
860 02:41:49.606452 PNP: 0c09.0: enabled 1
861 02:41:49.606890 PCI: 00:1f.1: enabled 1
862 02:41:49.609754 PCI: 00:1f.2: enabled 1
863 02:41:49.613443 PCI: 00:1f.3: enabled 1
864 02:41:49.616902 PCI: 00:1f.4: enabled 1
865 02:41:49.617437 PCI: 00:1f.5: enabled 1
866 02:41:49.619562
867 02:41:49.620000 PCI: 00:1f.6: enabled 0
868 02:41:49.622756 Root Device scanning...
869 02:41:49.626495 scan_static_bus for Root Device
870 02:41:49.629794 CPU_CLUSTER: 0 enabled
871 02:41:49.630233 DOMAIN: 0000 enabled
872 02:41:49.633110 DOMAIN: 0000 scanning...
873 02:41:49.636366 PCI: pci_scan_bus for bus 00
874 02:41:49.639759 PCI: 00:00.0 [8086/0000] ops
875 02:41:49.642918 PCI: 00:00.0 [8086/9b61] enabled
876 02:41:49.646171 PCI: 00:02.0 [8086/0000] bus ops
877 02:41:49.649212 PCI: 00:02.0 [8086/9b41] enabled
878 02:41:49.652986 PCI: 00:04.0 [8086/1903] disabled
879 02:41:49.656541 PCI: 00:08.0 [8086/1911] enabled
880 02:41:49.659693 PCI: 00:12.0 [8086/02f9] enabled
881 02:41:49.662943 PCI: 00:14.0 [8086/0000] bus ops
882 02:41:49.666196 PCI: 00:14.0 [8086/02ed] enabled
883 02:41:49.669210 PCI: 00:14.2 [8086/02ef] enabled
884 02:41:49.672901 PCI: 00:14.3 [8086/02f0] enabled
885 02:41:49.675943 PCI: 00:15.0 [8086/0000] bus ops
886 02:41:49.679133 PCI: 00:15.0 [8086/02e8] enabled
887 02:41:49.682380 PCI: 00:15.1 [8086/0000] bus ops
888 02:41:49.686071 PCI: 00:15.1 [8086/02e9] enabled
889 02:41:49.689667 PCI: 00:16.0 [8086/0000] ops
890 02:41:49.692438 PCI: 00:16.0 [8086/02e0] enabled
891 02:41:49.695945 PCI: 00:17.0 [8086/0000] ops
892 02:41:49.699143 PCI: 00:17.0 [8086/02d3] enabled
893 02:41:49.703185 PCI: 00:19.0 [8086/0000] bus ops
894 02:41:49.706316 PCI: 00:19.0 [8086/02c5] enabled
895 02:41:49.709412 PCI: 00:1d.0 [8086/0000] bus ops
896 02:41:49.712722 PCI: 00:1d.0 [8086/02b0] enabled
897 02:41:49.719183 PCI: Static device PCI: 00:1d.5 not found, disabling it.
898 02:41:49.722214 PCI: 00:1e.0 [8086/0000] ops
899 02:41:49.725946 PCI: 00:1e.0 [8086/02a8] enabled
900 02:41:49.729078 PCI: 00:1e.2 [8086/0000] bus ops
901 02:41:49.732077 PCI: 00:1e.2 [8086/02aa] enabled
902 02:41:49.735310 PCI: 00:1e.3 [8086/0000] bus ops
903 02:41:49.739372 PCI: 00:1e.3 [8086/02ab] enabled
904 02:41:49.742372 PCI: 00:1f.0 [8086/0000] bus ops
905 02:41:49.745518 PCI: 00:1f.0 [8086/0284] enabled
906 02:41:49.748719 PCI: Static device PCI: 00:1f.1 not found, disabling it.
907 02:41:49.755279 PCI: Static device PCI: 00:1f.2 not found, disabling it.
908 02:41:49.759226 PCI: 00:1f.3 [8086/0000] bus ops
909 02:41:49.762440 PCI: 00:1f.3 [8086/02c8] enabled
910 02:41:49.765635 PCI: 00:1f.4 [8086/0000] bus ops
911 02:41:49.768550 PCI: 00:1f.4 [8086/02a3] enabled
912 02:41:49.771921 PCI: 00:1f.5 [8086/0000] bus ops
913 02:41:49.775584 PCI: 00:1f.5 [8086/02a4] enabled
914 02:41:49.778806 PCI: Leftover static devices:
915 02:41:49.779286 PCI: 00:05.0
916 02:41:49.782093 PCI: 00:12.5
917 02:41:49.782636 PCI: 00:12.6
918 02:41:49.785207 PCI: 00:14.1
919 02:41:49.785659 PCI: 00:14.5
920 02:41:49.785999 PCI: 00:15.2
921 02:41:49.788855 PCI: 00:15.3
922 02:41:49.789285 PCI: 00:16.1
923 02:41:49.792212 PCI: 00:16.2
924 02:41:49.792695 PCI: 00:16.3
925 02:41:49.793036 PCI: 00:16.4
926 02:41:49.795505
927 02:41:49.795940 PCI: 00:16.5
928 02:41:49.796337 PCI: 00:19.1
929 02:41:49.798536 PCI: 00:19.2
930 02:41:49.798967 PCI: 00:1a.0
931 02:41:49.801898 PCI: 00:1c.0
932 02:41:49.802429 PCI: 00:1c.1
933 02:41:49.802772 PCI: 00:1c.2
934 02:41:49.804874 PCI: 00:1c.3
935 02:41:49.805306 PCI: 00:1c.4
936 02:41:49.808654 PCI: 00:1c.5
937 02:41:49.809134 PCI: 00:1c.6
938 02:41:49.809471 PCI: 00:1c.7
939 02:41:49.811827 PCI: 00:1d.1
940 02:41:49.812307 PCI: 00:1d.2
941 02:41:49.814982 PCI: 00:1d.3
942 02:41:49.815412 PCI: 00:1d.4
943 02:41:49.815752 PCI: 00:1d.5
944 02:41:49.818905 PCI: 00:1e.1
945 02:41:49.819336 PCI: 00:1f.1
946 02:41:49.822079 PCI: 00:1f.2
947 02:41:49.822531 PCI: 00:1f.6
948 02:41:49.825260 PCI: Check your devicetree.cb.
949 02:41:49.828569 PCI: 00:02.0 scanning...
950 02:41:49.831902 scan_generic_bus for PCI: 00:02.0
951 02:41:49.835185 scan_generic_bus for PCI: 00:02.0 done
952 02:41:49.841860 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
953 02:41:49.844930 PCI: 00:14.0 scanning...
954 02:41:49.848232 scan_static_bus for PCI: 00:14.0
955 02:41:49.848662 USB0 port 0 enabled
956 02:41:49.851302 USB0 port 0 scanning...
957 02:41:49.854729 scan_static_bus for USB0 port 0
958 02:41:49.858654 USB2 port 0 enabled
959 02:41:49.859086 USB2 port 1 enabled
960 02:41:49.861234 USB2 port 2 disabled
961 02:41:49.864763 USB2 port 3 disabled
962 02:41:49.865312 USB2 port 5 disabled
963 02:41:49.868286 USB2 port 6 enabled
964 02:41:49.868833 USB2 port 9 enabled
965 02:41:49.871836
966 02:41:49.872405 USB3 port 0 enabled
967 02:41:49.875163 USB3 port 1 enabled
968 02:41:49.875709 USB3 port 2 enabled
969 02:41:49.878100 USB3 port 3 enabled
970 02:41:49.881283 USB3 port 4 disabled
971 02:41:49.881725 USB2 port 0 scanning...
972 02:41:49.884932 scan_static_bus for USB2 port 0
973 02:41:49.891625 scan_static_bus for USB2 port 0 done
974 02:41:49.895026 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
975 02:41:49.897813 USB2 port 1 scanning...
976 02:41:49.901143 scan_static_bus for USB2 port 1
977 02:41:49.905088 scan_static_bus for USB2 port 1 done
978 02:41:49.910854 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
979 02:41:49.911301 USB2 port 6 scanning...
980 02:41:49.914614 scan_static_bus for USB2 port 6
981 02:41:49.921185 scan_static_bus for USB2 port 6 done
982 02:41:49.924336 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
983 02:41:49.927624 USB2 port 9 scanning...
984 02:41:49.931012 scan_static_bus for USB2 port 9
985 02:41:49.934792 scan_static_bus for USB2 port 9 done
986 02:41:49.940813 scan_bus: scanning of bus USB2 port 9 took 9688 usecs
987 02:41:49.941249 USB3 port 0 scanning...
988 02:41:49.944919 scan_static_bus for USB3 port 0
989 02:41:49.951553 scan_static_bus for USB3 port 0 done
990 02:41:49.954540 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
991 02:41:49.957819 USB3 port 1 scanning...
992 02:41:49.961132 scan_static_bus for USB3 port 1
993 02:41:49.964487 scan_static_bus for USB3 port 1 done
994 02:41:49.971006 scan_bus: scanning of bus USB3 port 1 took 9687 usecs
995 02:41:49.971538 USB3 port 2 scanning...
996 02:41:49.974754 scan_static_bus for USB3 port 2
997 02:41:49.981081 scan_static_bus for USB3 port 2 done
998 02:41:49.984324 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
999 02:41:49.988262 USB3 port 3 scanning...
1000 02:41:49.990689 scan_static_bus for USB3 port 3
1001 02:41:49.994605 scan_static_bus for USB3 port 3 done
1002 02:41:50.001069 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1003 02:41:50.004378 scan_static_bus for USB0 port 0 done
1004 02:41:50.007606 scan_bus: scanning of bus USB0 port 0 took 155375 usecs
1005 02:41:50.011156
1006 02:41:50.014379 scan_static_bus for PCI: 00:14.0 done
1007 02:41:50.017443 scan_bus: scanning of bus PCI: 00:14.0 took 172990 usecs
1008 02:41:50.020970 PCI: 00:15.0 scanning...
1009 02:41:50.024304 scan_generic_bus for PCI: 00:15.0
1010 02:41:50.027363 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 02:41:50.034944 scan_generic_bus for PCI: 00:15.0 done
1012 02:41:50.037733 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1013 02:41:50.041498 PCI: 00:15.1 scanning...
1014 02:41:50.043989 scan_generic_bus for PCI: 00:15.1
1015 02:41:50.048259 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 02:41:50.053959 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 02:41:50.057508 scan_generic_bus for PCI: 00:15.1 done
1018 02:41:50.063906 scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
1019 02:41:50.064378 PCI: 00:19.0 scanning...
1020 02:41:50.067034 scan_generic_bus for PCI: 00:19.0
1021 02:41:50.073965 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 02:41:50.077107 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 02:41:50.080413 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 02:41:50.084348 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 02:41:50.091016 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 02:41:50.094012 scan_generic_bus for PCI: 00:19.0 done
1027 02:41:50.097174 scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs
1028 02:41:50.100449 PCI: 00:1d.0 scanning...
1029 02:41:50.103604 do_pci_scan_bridge for PCI: 00:1d.0
1030 02:41:50.107224 PCI: pci_scan_bus for bus 01
1031 02:41:50.110326 PCI: 01:00.0 [1c5c/1327] enabled
1032 02:41:50.113573 Enabling Common Clock Configuration
1033 02:41:50.120716 L1 Sub-State supported from root port 29
1034 02:41:50.121169 L1 Sub-State Support = 0xf
1035 02:41:50.123664
1036 02:41:50.124155 CommonModeRestoreTime = 0x28
1037 02:41:50.130380 Power On Value = 0x16, Power On Scale = 0x0
1038 02:41:50.130832 ASPM: Enabled L1
1039 02:41:50.136900 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1040 02:41:50.140600 PCI: 00:1e.2 scanning...
1041 02:41:50.143919 scan_generic_bus for PCI: 00:1e.2
1042 02:41:50.147388 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1043 02:41:50.150599 scan_generic_bus for PCI: 00:1e.2 done
1044 02:41:50.156902 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1045 02:41:50.160420 PCI: 00:1e.3 scanning...
1046 02:41:50.163567 scan_generic_bus for PCI: 00:1e.3
1047 02:41:50.167528 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1048 02:41:50.169951 scan_generic_bus for PCI: 00:1e.3 done
1049 02:41:50.176948 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1050 02:41:50.177492 PCI: 00:1f.0 scanning...
1051 02:41:50.180215 scan_static_bus for PCI: 00:1f.0
1052 02:41:50.183945 PNP: 0c09.0 enabled
1053 02:41:50.186960 scan_static_bus for PCI: 00:1f.0 done
1054 02:41:50.193764 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1055 02:41:50.197333 PCI: 00:1f.3 scanning...
1056 02:41:50.200698 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1057 02:41:50.203781 PCI: 00:1f.4 scanning...
1058 02:41:50.206779 scan_generic_bus for PCI: 00:1f.4
1059 02:41:50.210657 scan_generic_bus for PCI: 00:1f.4 done
1060 02:41:50.217097 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1061 02:41:50.220153 PCI: 00:1f.5 scanning...
1062 02:41:50.223476 scan_generic_bus for PCI: 00:1f.5
1063 02:41:50.226614 scan_generic_bus for PCI: 00:1f.5 done
1064 02:41:50.233331 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1065 02:41:50.239980 scan_bus: scanning of bus DOMAIN: 0000 took 605071 usecs
1066 02:41:50.243582 scan_static_bus for Root Device done
1067 02:41:50.246902 scan_bus: scanning of bus Root Device took 624937 usecs
1068 02:41:50.250218 done
1069 02:41:50.253310 Chrome EC: UHEPI supported
1070 02:41:50.256485 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1071 02:41:50.263340 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1072 02:41:50.269674 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1073 02:41:50.276656 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1074 02:41:50.279934 SPI flash protection: WPSW=0 SRP0=0
1075 02:41:50.286268 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1076 02:41:50.289502 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1077 02:41:50.293488 found VGA at PCI: 00:02.0
1078 02:41:50.296629 Setting up VGA for PCI: 00:02.0
1079 02:41:50.302958 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1080 02:41:50.306107 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1081 02:41:50.309100 Allocating resources...
1082 02:41:50.312997 Reading resources...
1083 02:41:50.316105 Root Device read_resources bus 0 link: 0
1084 02:41:50.319336 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1085 02:41:50.325874 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1086 02:41:50.329288 DOMAIN: 0000 read_resources bus 0 link: 0
1087 02:41:50.336235 PCI: 00:14.0 read_resources bus 0 link: 0
1088 02:41:50.339664 USB0 port 0 read_resources bus 0 link: 0
1089 02:41:50.348257 USB0 port 0 read_resources bus 0 link: 0 done
1090 02:41:50.350935 PCI: 00:14.0 read_resources bus 0 link: 0 done
1091 02:41:50.358501 PCI: 00:15.0 read_resources bus 1 link: 0
1092 02:41:50.361640 PCI: 00:15.0 read_resources bus 1 link: 0 done
1093 02:41:50.368313 PCI: 00:15.1 read_resources bus 2 link: 0
1094 02:41:50.372042 PCI: 00:15.1 read_resources bus 2 link: 0 done
1095 02:41:50.379691 PCI: 00:19.0 read_resources bus 3 link: 0
1096 02:41:50.386205 PCI: 00:19.0 read_resources bus 3 link: 0 done
1097 02:41:50.389166 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 02:41:50.396160 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 02:41:50.399190 PCI: 00:1e.2 read_resources bus 4 link: 0
1100 02:41:50.405622 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1101 02:41:50.408902 PCI: 00:1e.3 read_resources bus 5 link: 0
1102 02:41:50.415698 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1103 02:41:50.418883 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 02:41:50.425447 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 02:41:50.431906 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 02:41:50.435641 Root Device read_resources bus 0 link: 0 done
1107 02:41:50.439027 Done reading resources.
1108 02:41:50.442141 Show resources in subtree (Root Device)...After reading.
1109 02:41:50.445558
1110 02:41:50.448547 Root Device child on link 0 CPU_CLUSTER: 0
1111 02:41:50.451909 CPU_CLUSTER: 0 child on link 0 APIC: 00
1112 02:41:50.452424 APIC: 00
1113 02:41:50.455233 APIC: 03
1114 02:41:50.455677 APIC: 07
1115 02:41:50.458432 APIC: 01
1116 02:41:50.458904 APIC: 02
1117 02:41:50.459356 APIC: 05
1118 02:41:50.462338 APIC: 06
1119 02:41:50.462781 APIC: 04
1120 02:41:50.465481 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1121 02:41:50.475712 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1122 02:41:50.528302 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1123 02:41:50.528936 PCI: 00:00.0
1124 02:41:50.529344 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1125 02:41:50.530075 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1126 02:41:50.530564 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1127 02:41:50.530910 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1128 02:41:50.577463 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1129 02:41:50.577770 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1130 02:41:50.578047 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1131 02:41:50.579028 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1132 02:41:50.579310 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1133 02:41:50.607216 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1134 02:41:50.607508 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1135 02:41:50.607788 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1136 02:41:50.611183 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1137 02:41:50.617361 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1138 02:41:50.627856 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1139 02:41:50.637325 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1140 02:41:50.637419 PCI: 00:02.0
1141 02:41:50.647635 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 02:41:50.660836 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 02:41:50.667275 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 02:41:50.670554 PCI: 00:04.0
1145 02:41:50.670638 PCI: 00:08.0
1146 02:41:50.680239 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 02:41:50.684215 PCI: 00:12.0
1148 02:41:50.693929 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 02:41:50.696970 PCI: 00:14.0 child on link 0 USB0 port 0
1150 02:41:50.707183 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 02:41:50.710100 USB0 port 0 child on link 0 USB2 port 0
1152 02:41:50.713453 USB2 port 0
1153 02:41:50.713548 USB2 port 1
1154 02:41:50.716722 USB2 port 2
1155 02:41:50.716817 USB2 port 3
1156 02:41:50.719894 USB2 port 5
1157 02:41:50.719988 USB2 port 6
1158 02:41:50.723785
1159 02:41:50.723881 USB2 port 9
1160 02:41:50.726895 USB3 port 0
1161 02:41:50.726991 USB3 port 1
1162 02:41:50.730167 USB3 port 2
1163 02:41:50.730263 USB3 port 3
1164 02:41:50.733385 USB3 port 4
1165 02:41:50.733481 PCI: 00:14.2
1166 02:41:50.743529 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1167 02:41:50.753353 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1168 02:41:50.756574 PCI: 00:14.3
1169 02:41:50.766467 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1170 02:41:50.769619 PCI: 00:15.0 child on link 0 I2C: 01:15
1171 02:41:50.779852 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 02:41:50.779949 I2C: 01:15
1173 02:41:50.786245 PCI: 00:15.1 child on link 0 I2C: 02:5d
1174 02:41:50.796045 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 02:41:50.796150 I2C: 02:5d
1176 02:41:50.799829 GENERIC: 0.0
1177 02:41:50.799925 PCI: 00:16.0
1178 02:41:50.809283 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 02:41:50.813107 PCI: 00:17.0
1180 02:41:50.819559 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1181 02:41:50.822679
1182 02:41:50.829077 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1183 02:41:50.839668 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1184 02:41:50.845989 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1185 02:41:50.855562 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1186 02:41:50.862111 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1187 02:41:50.869275 PCI: 00:19.0 child on link 0 I2C: 03:1a
1188 02:41:50.879036 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 02:41:50.879133 I2C: 03:1a
1190 02:41:50.882239 I2C: 03:38
1191 02:41:50.882323 I2C: 03:39
1192 02:41:50.885350 I2C: 03:3a
1193 02:41:50.885432 I2C: 03:3b
1194 02:41:50.888640 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1195 02:41:50.898919 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1196 02:41:50.908945 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1197 02:41:50.918381 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1198 02:41:50.918471 PCI: 01:00.0
1199 02:41:50.928624 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1200 02:41:50.931819 PCI: 00:1e.0
1201 02:41:50.941415 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 02:41:50.951684 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1203 02:41:50.954847 PCI: 00:1e.2 child on link 0 SPI: 00
1204 02:41:50.965098 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 02:41:50.968204 SPI: 00
1206 02:41:50.971512 PCI: 00:1e.3 child on link 0 SPI: 01
1207 02:41:50.981672 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 02:41:50.981760 SPI: 01
1209 02:41:50.988054 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1210 02:41:50.994478 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1211 02:41:51.004629 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1212 02:41:51.004720 PNP: 0c09.0
1213 02:41:51.007860
1214 02:41:51.014848 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1215 02:41:51.018074 PCI: 00:1f.3
1216 02:41:51.027670 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 02:41:51.038112 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1218 02:41:51.038200 PCI: 00:1f.4
1219 02:41:51.047727 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1220 02:41:51.057336 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1221 02:41:51.057429 PCI: 00:1f.5
1222 02:41:51.067556 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 02:41:51.073866 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1224 02:41:51.080809 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1225 02:41:51.087233 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1226 02:41:51.090441 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1227 02:41:51.094298 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1228 02:41:51.097475 PCI: 00:17.0 18 * [0x60 - 0x67] io
1229 02:41:51.100794 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1230 02:41:51.107064 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1231 02:41:51.113870 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1232 02:41:51.123494 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1233 02:41:51.130268 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1234 02:41:51.136699 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1235 02:41:51.140597
1236 02:41:51.143312 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 02:41:51.149818 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 02:41:51.153701 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1239 02:41:51.160201 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1240 02:41:51.163192 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1241 02:41:51.169638 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1242 02:41:51.173070 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1243 02:41:51.180181 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1244 02:41:51.183504 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1245 02:41:51.190008 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1246 02:41:51.193092 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1247 02:41:51.199540 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1248 02:41:51.203056 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1249 02:41:51.209851 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1250 02:41:51.213035 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1251 02:41:51.219910 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1252 02:41:51.222579 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1253 02:41:51.226369 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1254 02:41:51.229667
1255 02:41:51.232685 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 02:41:51.235982 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 02:41:51.243128 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 02:41:51.245700 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 02:41:51.252650 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 02:41:51.256024 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 02:41:51.262673 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 02:41:51.269172 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 02:41:51.272414 avoid_fixed_resources: DOMAIN: 0000
1264 02:41:51.279432 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 02:41:51.286008 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 02:41:51.292177 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 02:41:51.302046 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 02:41:51.308971 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 02:41:51.315399 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 02:41:51.325662 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 02:41:51.331824 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 02:41:51.338932 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 02:41:51.348725 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 02:41:51.355222 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 02:41:51.362092 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 02:41:51.365156 Setting resources...
1277 02:41:51.371489 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 02:41:51.375410 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 02:41:51.378064 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 02:41:51.381946 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 02:41:51.384798 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 02:41:51.391686 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 02:41:51.398054 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 02:41:51.404532 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 02:41:51.411596 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 02:41:51.417978 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 02:41:51.421118 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 02:41:51.428238 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 02:41:51.431484 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 02:41:51.437814 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 02:41:51.441256 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 02:41:51.447828 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 02:41:51.450895 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 02:41:51.458131 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 02:41:51.461440 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 02:41:51.467881 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 02:41:51.471216 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 02:41:51.477738 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 02:41:51.480982 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 02:41:51.484208 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 02:41:51.487500
1302 02:41:51.490790 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1303 02:41:51.494128 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1304 02:41:51.500494 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1305 02:41:51.504357 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1306 02:41:51.510407 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1307 02:41:51.514050 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1308 02:41:51.520399 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1309 02:41:51.523677 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1310 02:41:51.533934 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1311 02:41:51.540069 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1312 02:41:51.547356 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1313 02:41:51.553919 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1314 02:41:51.560256 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1315 02:41:51.566637 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1316 02:41:51.569875 Root Device assign_resources, bus 0 link: 0
1317 02:41:51.577021 DOMAIN: 0000 assign_resources, bus 0 link: 0
1318 02:41:51.583486 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1319 02:41:51.593152 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1320 02:41:51.600063 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1321 02:41:51.609634 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1322 02:41:51.616760 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1323 02:41:51.626693 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1324 02:41:51.629997 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 02:41:51.633311 PCI: 00:14.0 assign_resources, bus 0 link: 0
1326 02:41:51.643369 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1327 02:41:51.649784 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1328 02:41:51.660089 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1329 02:41:51.666390 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1330 02:41:51.672722 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 02:41:51.675925 PCI: 00:15.0 assign_resources, bus 1 link: 0
1332 02:41:51.685676 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1333 02:41:51.689539 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 02:41:51.692862 PCI: 00:15.1 assign_resources, bus 2 link: 0
1335 02:41:51.703163 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1336 02:41:51.709719 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1337 02:41:51.719122 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1338 02:41:51.726063 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1339 02:41:51.732301 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1340 02:41:51.742329 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1341 02:41:51.748832 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1342 02:41:51.758504 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1343 02:41:51.762268 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 02:41:51.765586 PCI: 00:19.0 assign_resources, bus 3 link: 0
1345 02:41:51.775367 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1346 02:41:51.785194 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 02:41:51.791755 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1348 02:41:51.798400 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 02:41:51.804903 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1350 02:41:51.811577 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1351 02:41:51.818053 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1352 02:41:51.828250 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1353 02:41:51.831297 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 02:41:51.834562 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1355 02:41:51.844663 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1356 02:41:51.847890 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 02:41:51.854919 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1358 02:41:51.858164 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 02:41:51.864497 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 02:41:51.868237 LPC: Trying to open IO window from 800 size 1ff
1361 02:41:51.877959 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1362 02:41:51.884394 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1363 02:41:51.894249 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1364 02:41:51.900847 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1365 02:41:51.903989 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 02:41:51.907629
1367 02:41:51.910846 Root Device assign_resources, bus 0 link: 0
1368 02:41:51.914059 Done setting resources.
1369 02:41:51.920745 Show resources in subtree (Root Device)...After assigning values.
1370 02:41:51.923838 Root Device child on link 0 CPU_CLUSTER: 0
1371 02:41:51.927038 CPU_CLUSTER: 0 child on link 0 APIC: 00
1372 02:41:51.930694 APIC: 00
1373 02:41:51.930783 APIC: 03
1374 02:41:51.930857 APIC: 07
1375 02:41:51.933967 APIC: 01
1376 02:41:51.934065 APIC: 02
1377 02:41:51.937224 APIC: 05
1378 02:41:51.937317 APIC: 06
1379 02:41:51.937392 APIC: 04
1380 02:41:51.943512 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1381 02:41:51.953892 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1382 02:41:51.963600 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1383 02:41:51.963695 PCI: 00:00.0
1384 02:41:51.973257 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1385 02:41:51.983460 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1386 02:41:51.993285 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1387 02:41:52.003568 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1388 02:41:52.013147 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1389 02:41:52.019669 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1390 02:41:52.029567 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1391 02:41:52.039872 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1392 02:41:52.049509 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1393 02:41:52.059300 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1394 02:41:52.066271 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1395 02:41:52.075931 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1396 02:41:52.085548 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1397 02:41:52.095921 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1398 02:41:52.105609 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1399 02:41:52.115968 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1400 02:41:52.116074 PCI: 00:02.0
1401 02:41:52.129009 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1402 02:41:52.139074 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1403 02:41:52.148655 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1404 02:41:52.148753 PCI: 00:04.0
1405 02:41:52.151896 PCI: 00:08.0
1406 02:41:52.162191 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1407 02:41:52.162287 PCI: 00:12.0
1408 02:41:52.171602 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1409 02:41:52.178560 PCI: 00:14.0 child on link 0 USB0 port 0
1410 02:41:52.188159 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1411 02:41:52.191386 USB0 port 0 child on link 0 USB2 port 0
1412 02:41:52.194698 USB2 port 0
1413 02:41:52.194785 USB2 port 1
1414 02:41:52.198549 USB2 port 2
1415 02:41:52.198637 USB2 port 3
1416 02:41:52.201787 USB2 port 5
1417 02:41:52.201874 USB2 port 6
1418 02:41:52.205065 USB2 port 9
1419 02:41:52.205146 USB3 port 0
1420 02:41:52.208219 USB3 port 1
1421 02:41:52.208303 USB3 port 2
1422 02:41:52.211511 USB3 port 3
1423 02:41:52.211592 USB3 port 4
1424 02:41:52.214809 PCI: 00:14.2
1425 02:41:52.224731 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1426 02:41:52.234646 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1427 02:41:52.238044 PCI: 00:14.3
1428 02:41:52.247439 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1429 02:41:52.251350 PCI: 00:15.0 child on link 0 I2C: 01:15
1430 02:41:52.260933 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1431 02:41:52.264074 I2C: 01:15
1432 02:41:52.267278 PCI: 00:15.1 child on link 0 I2C: 02:5d
1433 02:41:52.277502 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1434 02:41:52.280878 I2C: 02:5d
1435 02:41:52.280980 GENERIC: 0.0
1436 02:41:52.283997 PCI: 00:16.0
1437 02:41:52.294321 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1438 02:41:52.294415 PCI: 00:17.0
1439 02:41:52.303751 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1440 02:41:52.313487 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1441 02:41:52.323754 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1442 02:41:52.333317 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1443 02:41:52.343461 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1444 02:41:52.353427 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1445 02:41:52.356682 PCI: 00:19.0 child on link 0 I2C: 03:1a
1446 02:41:52.366403 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1447 02:41:52.370247 I2C: 03:1a
1448 02:41:52.370331 I2C: 03:38
1449 02:41:52.373511 I2C: 03:39
1450 02:41:52.373592 I2C: 03:3a
1451 02:41:52.376563 I2C: 03:3b
1452 02:41:52.379855 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1453 02:41:52.390220 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1454 02:41:52.399447 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1455 02:41:52.409723 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1456 02:41:52.409811 PCI: 01:00.0
1457 02:41:52.422614 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1458 02:41:52.422701 PCI: 00:1e.0
1459 02:41:52.432722 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1460 02:41:52.446171 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1461 02:41:52.449324 PCI: 00:1e.2 child on link 0 SPI: 00
1462 02:41:52.458881 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1463 02:41:52.458976 SPI: 00
1464 02:41:52.465852 PCI: 00:1e.3 child on link 0 SPI: 01
1465 02:41:52.475578 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1466 02:41:52.475666 SPI: 01
1467 02:41:52.478692 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1468 02:41:52.488909 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1469 02:41:52.498522 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1470 02:41:52.498619 PNP: 0c09.0
1471 02:41:52.508986 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1472 02:41:52.509083 PCI: 00:1f.3
1473 02:41:52.518523 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1474 02:41:52.532077 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1475 02:41:52.532176 PCI: 00:1f.4
1476 02:41:52.541337 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1477 02:41:52.551380 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1478 02:41:52.551481 PCI: 00:1f.5
1479 02:41:52.564982 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1480 02:41:52.565079 Done allocating resources.
1481 02:41:52.571279 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1482 02:41:52.574610 Enabling resources...
1483 02:41:52.577904 PCI: 00:00.0 subsystem <- 8086/9b61
1484 02:41:52.581064 PCI: 00:00.0 cmd <- 06
1485 02:41:52.584429 PCI: 00:02.0 subsystem <- 8086/9b41
1486 02:41:52.587591 PCI: 00:02.0 cmd <- 03
1487 02:41:52.590971 PCI: 00:08.0 cmd <- 06
1488 02:41:52.594095 PCI: 00:12.0 subsystem <- 8086/02f9
1489 02:41:52.597436 PCI: 00:12.0 cmd <- 02
1490 02:41:52.600637 PCI: 00:14.0 subsystem <- 8086/02ed
1491 02:41:52.600733 PCI: 00:14.0 cmd <- 02
1492 02:41:52.603980
1493 02:41:52.604082 PCI: 00:14.2 cmd <- 02
1494 02:41:52.610771 PCI: 00:14.3 subsystem <- 8086/02f0
1495 02:41:52.610867 PCI: 00:14.3 cmd <- 02
1496 02:41:52.613936 PCI: 00:15.0 subsystem <- 8086/02e8
1497 02:41:52.617116 PCI: 00:15.0 cmd <- 02
1498 02:41:52.620945 PCI: 00:15.1 subsystem <- 8086/02e9
1499 02:41:52.624189 PCI: 00:15.1 cmd <- 02
1500 02:41:52.627447 PCI: 00:16.0 subsystem <- 8086/02e0
1501 02:41:52.630610 PCI: 00:16.0 cmd <- 02
1502 02:41:52.633900 PCI: 00:17.0 subsystem <- 8086/02d3
1503 02:41:52.637198 PCI: 00:17.0 cmd <- 03
1504 02:41:52.640885 PCI: 00:19.0 subsystem <- 8086/02c5
1505 02:41:52.643792 PCI: 00:19.0 cmd <- 02
1506 02:41:52.646864 PCI: 00:1d.0 bridge ctrl <- 0013
1507 02:41:52.650860 PCI: 00:1d.0 subsystem <- 8086/02b0
1508 02:41:52.654031 PCI: 00:1d.0 cmd <- 06
1509 02:41:52.656976 PCI: 00:1e.0 subsystem <- 8086/02a8
1510 02:41:52.657073 PCI: 00:1e.0 cmd <- 06
1511 02:41:52.660152
1512 02:41:52.663362 PCI: 00:1e.2 subsystem <- 8086/02aa
1513 02:41:52.663458 PCI: 00:1e.2 cmd <- 06
1514 02:41:52.670364 PCI: 00:1e.3 subsystem <- 8086/02ab
1515 02:41:52.670460 PCI: 00:1e.3 cmd <- 02
1516 02:41:52.673605 PCI: 00:1f.0 subsystem <- 8086/0284
1517 02:41:52.676915 PCI: 00:1f.0 cmd <- 407
1518 02:41:52.679984 PCI: 00:1f.3 subsystem <- 8086/02c8
1519 02:41:52.683268 PCI: 00:1f.3 cmd <- 02
1520 02:41:52.687072 PCI: 00:1f.4 subsystem <- 8086/02a3
1521 02:41:52.690278 PCI: 00:1f.4 cmd <- 03
1522 02:41:52.693390 PCI: 00:1f.5 subsystem <- 8086/02a4
1523 02:41:52.696389 PCI: 00:1f.5 cmd <- 406
1524 02:41:52.705406 PCI: 01:00.0 cmd <- 02
1525 02:41:52.710463 done.
1526 02:41:52.722798 ME: Version: 14.0.39.1367
1527 02:41:52.729395 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1528 02:41:52.732493 Initializing devices...
1529 02:41:52.732589 Root Device init ...
1530 02:41:52.739529 Chrome EC: Set SMI mask to 0x0000000000000000
1531 02:41:52.742713 Chrome EC: clear events_b mask to 0x0000000000000000
1532 02:41:52.749410 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1533 02:41:52.755859 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1534 02:41:52.762636 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1535 02:41:52.765914 Chrome EC: Set WAKE mask to 0x0000000000000000
1536 02:41:52.769185 Root Device init finished in 35205 usecs
1537 02:41:52.772913 CPU_CLUSTER: 0 init ...
1538 02:41:52.776025 CPU_CLUSTER: 0 init finished in 2448 usecs
1539 02:41:52.779323
1540 02:41:52.783826 PCI: 00:00.0 init ...
1541 02:41:52.787024 CPU TDP: 15 Watts
1542 02:41:52.790020 CPU PL2 = 64 Watts
1543 02:41:52.793355 PCI: 00:00.0 init finished in 7079 usecs
1544 02:41:52.796437 PCI: 00:02.0 init ...
1545 02:41:52.800346 PCI: 00:02.0 init finished in 2254 usecs
1546 02:41:52.803047 PCI: 00:08.0 init ...
1547 02:41:52.806284 PCI: 00:08.0 init finished in 2252 usecs
1548 02:41:52.810142 PCI: 00:12.0 init ...
1549 02:41:52.813363 PCI: 00:12.0 init finished in 2251 usecs
1550 02:41:52.816608 PCI: 00:14.0 init ...
1551 02:41:52.819908 PCI: 00:14.0 init finished in 2252 usecs
1552 02:41:52.823163 PCI: 00:14.2 init ...
1553 02:41:52.826198 PCI: 00:14.2 init finished in 2253 usecs
1554 02:41:52.829315 PCI: 00:14.3 init ...
1555 02:41:52.832533 PCI: 00:14.3 init finished in 2262 usecs
1556 02:41:52.836247 PCI: 00:15.0 init ...
1557 02:41:52.839357 DW I2C bus 0 at 0xd121f000 (400 KHz)
1558 02:41:52.842680 PCI: 00:15.0 init finished in 5967 usecs
1559 02:41:52.846428 PCI: 00:15.1 init ...
1560 02:41:52.849592 DW I2C bus 1 at 0xd1220000 (400 KHz)
1561 02:41:52.853364 PCI: 00:15.1 init finished in 5977 usecs
1562 02:41:52.856375
1563 02:41:52.856458 PCI: 00:16.0 init ...
1564 02:41:52.862921 PCI: 00:16.0 init finished in 2251 usecs
1565 02:41:52.863009 PCI: 00:19.0 init ...
1566 02:41:52.866165
1567 02:41:52.869352 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 02:41:52.872681 PCI: 00:19.0 init finished in 5976 usecs
1569 02:41:52.875826 PCI: 00:1d.0 init ...
1570 02:41:52.879689 Initializing PCH PCIe bridge.
1571 02:41:52.882893 PCI: 00:1d.0 init finished in 5275 usecs
1572 02:41:52.886129 PCI: 00:1f.0 init ...
1573 02:41:52.889302 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 02:41:52.895971 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 02:41:52.896066 IOAPIC: ID = 0x02
1576 02:41:52.899121 IOAPIC: Dumping registers
1577 02:41:52.902373 reg 0x0000: 0x02000000
1578 02:41:52.905463 reg 0x0001: 0x00770020
1579 02:41:52.905550 reg 0x0002: 0x00000000
1580 02:41:52.912007 PCI: 00:1f.0 init finished in 23552 usecs
1581 02:41:52.916127 PCI: 00:1f.4 init ...
1582 02:41:52.918585 PCI: 00:1f.4 init finished in 2263 usecs
1583 02:41:52.929543 PCI: 01:00.0 init ...
1584 02:41:52.932822 PCI: 01:00.0 init finished in 2252 usecs
1585 02:41:52.937156 PNP: 0c09.0 init ...
1586 02:41:52.940295 Google Chrome EC uptime: 11.058 seconds
1587 02:41:52.947327 Google Chrome AP resets since EC boot: 0
1588 02:41:52.950535 Google Chrome most recent AP reset causes:
1589 02:41:52.956965 Google Chrome EC reset flags at last EC boot: reset-pin
1590 02:41:52.960597 PNP: 0c09.0 init finished in 20568 usecs
1591 02:41:52.963697 Devices initialized
1592 02:41:52.963780 Show all devs... After init.
1593 02:41:52.967251
1594 02:41:52.967341 Root Device: enabled 1
1595 02:41:52.970491 CPU_CLUSTER: 0: enabled 1
1596 02:41:52.973736 DOMAIN: 0000: enabled 1
1597 02:41:52.973825 APIC: 00: enabled 1
1598 02:41:52.977029 PCI: 00:00.0: enabled 1
1599 02:41:52.980306 PCI: 00:02.0: enabled 1
1600 02:41:52.983701 PCI: 00:04.0: enabled 0
1601 02:41:52.983804 PCI: 00:05.0: enabled 0
1602 02:41:52.986725 PCI: 00:12.0: enabled 1
1603 02:41:52.990042 PCI: 00:12.5: enabled 0
1604 02:41:52.990125 PCI: 00:12.6: enabled 0
1605 02:41:52.993203
1606 02:41:52.993292 PCI: 00:14.0: enabled 1
1607 02:41:52.996482 PCI: 00:14.1: enabled 0
1608 02:41:53.000179 PCI: 00:14.3: enabled 1
1609 02:41:53.000271 PCI: 00:14.5: enabled 0
1610 02:41:53.003382 PCI: 00:15.0: enabled 1
1611 02:41:53.006632 PCI: 00:15.1: enabled 1
1612 02:41:53.009973 PCI: 00:15.2: enabled 0
1613 02:41:53.010060 PCI: 00:15.3: enabled 0
1614 02:41:53.013402 PCI: 00:16.0: enabled 1
1615 02:41:53.016537 PCI: 00:16.1: enabled 0
1616 02:41:53.019894 PCI: 00:16.2: enabled 0
1617 02:41:53.019991 PCI: 00:16.3: enabled 0
1618 02:41:53.023051 PCI: 00:16.4: enabled 0
1619 02:41:53.026312 PCI: 00:16.5: enabled 0
1620 02:41:53.030105 PCI: 00:17.0: enabled 1
1621 02:41:53.030202 PCI: 00:19.0: enabled 1
1622 02:41:53.033256 PCI: 00:19.1: enabled 0
1623 02:41:53.036570 PCI: 00:19.2: enabled 0
1624 02:41:53.036650 PCI: 00:1a.0: enabled 0
1625 02:41:53.039854 PCI: 00:1c.0: enabled 0
1626 02:41:53.043185 PCI: 00:1c.1: enabled 0
1627 02:41:53.046129 PCI: 00:1c.2: enabled 0
1628 02:41:53.046214 PCI: 00:1c.3: enabled 0
1629 02:41:53.049446 PCI: 00:1c.4: enabled 0
1630 02:41:53.053209 PCI: 00:1c.5: enabled 0
1631 02:41:53.056331 PCI: 00:1c.6: enabled 0
1632 02:41:53.056412 PCI: 00:1c.7: enabled 0
1633 02:41:53.059715 PCI: 00:1d.0: enabled 1
1634 02:41:53.062758 PCI: 00:1d.1: enabled 0
1635 02:41:53.066416 PCI: 00:1d.2: enabled 0
1636 02:41:53.066506 PCI: 00:1d.3: enabled 0
1637 02:41:53.069672 PCI: 00:1d.4: enabled 0
1638 02:41:53.072843 PCI: 00:1d.5: enabled 0
1639 02:41:53.072928 PCI: 00:1e.0: enabled 1
1640 02:41:53.076280
1641 02:41:53.076368 PCI: 00:1e.1: enabled 0
1642 02:41:53.079436 PCI: 00:1e.2: enabled 1
1643 02:41:53.082701 PCI: 00:1e.3: enabled 1
1644 02:41:53.082778 PCI: 00:1f.0: enabled 1
1645 02:41:53.085893 PCI: 00:1f.1: enabled 0
1646 02:41:53.089650 PCI: 00:1f.2: enabled 0
1647 02:41:53.092828 PCI: 00:1f.3: enabled 1
1648 02:41:53.092911 PCI: 00:1f.4: enabled 1
1649 02:41:53.096000 PCI: 00:1f.5: enabled 1
1650 02:41:53.099318 PCI: 00:1f.6: enabled 0
1651 02:41:53.102507 USB0 port 0: enabled 1
1652 02:41:53.102589 I2C: 01:15: enabled 1
1653 02:41:53.105763 I2C: 02:5d: enabled 1
1654 02:41:53.109019 GENERIC: 0.0: enabled 1
1655 02:41:53.109099 I2C: 03:1a: enabled 1
1656 02:41:53.112309 I2C: 03:38: enabled 1
1657 02:41:53.115634 I2C: 03:39: enabled 1
1658 02:41:53.115716 I2C: 03:3a: enabled 1
1659 02:41:53.118821 I2C: 03:3b: enabled 1
1660 02:41:53.122713 PCI: 00:00.0: enabled 1
1661 02:41:53.122795 SPI: 00: enabled 1
1662 02:41:53.125520 SPI: 01: enabled 1
1663 02:41:53.129226 PNP: 0c09.0: enabled 1
1664 02:41:53.129324 USB2 port 0: enabled 1
1665 02:41:53.132521 USB2 port 1: enabled 1
1666 02:41:53.135543 USB2 port 2: enabled 0
1667 02:41:53.135635 USB2 port 3: enabled 0
1668 02:41:53.138976 USB2 port 5: enabled 0
1669 02:41:53.142117 USB2 port 6: enabled 1
1670 02:41:53.145430 USB2 port 9: enabled 1
1671 02:41:53.145518 USB3 port 0: enabled 1
1672 02:41:53.149224 USB3 port 1: enabled 1
1673 02:41:53.152414 USB3 port 2: enabled 1
1674 02:41:53.152504 USB3 port 3: enabled 1
1675 02:41:53.155500 USB3 port 4: enabled 0
1676 02:41:53.158681 APIC: 03: enabled 1
1677 02:41:53.158768 APIC: 07: enabled 1
1678 02:41:53.161848 APIC: 01: enabled 1
1679 02:41:53.165790 APIC: 02: enabled 1
1680 02:41:53.165875 APIC: 05: enabled 1
1681 02:41:53.168602 APIC: 06: enabled 1
1682 02:41:53.168681 APIC: 04: enabled 1
1683 02:41:53.172441 PCI: 00:08.0: enabled 1
1684 02:41:53.175675 PCI: 00:14.2: enabled 1
1685 02:41:53.178916 PCI: 01:00.0: enabled 1
1686 02:41:53.182211 Disabling ACPI via APMC:
1687 02:41:53.182307 done.
1688 02:41:53.188637 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1689 02:41:53.191842 ELOG: NV offset 0xaf0000 size 0x4000
1690 02:41:53.198799 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1691 02:41:53.205214 ELOG: Event(17) added with size 13 at 2023-01-25 02:41:52 UTC
1692 02:41:53.212308 ELOG: Event(92) added with size 9 at 2023-01-25 02:41:52 UTC
1693 02:41:53.218738 ELOG: Event(93) added with size 9 at 2023-01-25 02:41:52 UTC
1694 02:41:53.225234 ELOG: Event(9A) added with size 9 at 2023-01-25 02:41:52 UTC
1695 02:41:53.231936 ELOG: Event(9E) added with size 10 at 2023-01-25 02:41:52 UTC
1696 02:41:53.238655 ELOG: Event(9F) added with size 14 at 2023-01-25 02:41:52 UTC
1697 02:41:53.241915 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1698 02:41:53.249060 ELOG: Event(A1) added with size 10 at 2023-01-25 02:41:52 UTC
1699 02:41:53.259229 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1700 02:41:53.265650 ELOG: Event(A0) added with size 9 at 2023-01-25 02:41:52 UTC
1701 02:41:53.268693 elog_add_boot_reason: Logged dev mode boot
1702 02:41:53.271860 Finalize devices...
1703 02:41:53.271956 PCI: 00:17.0 final
1704 02:41:53.275745 Devices finalized
1705 02:41:53.278920 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1706 02:41:53.285296 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1707 02:41:53.288517 ME: HFSTS1 : 0x90000245
1708 02:41:53.292355 ME: HFSTS2 : 0x3B850126
1709 02:41:53.298732 ME: HFSTS3 : 0x00000020
1710 02:41:53.301924 ME: HFSTS4 : 0x00004800
1711 02:41:53.305158 ME: HFSTS5 : 0x00000000
1712 02:41:53.308993 ME: HFSTS6 : 0x40400006
1713 02:41:53.312005 ME: Manufacturing Mode : NO
1714 02:41:53.315292 ME: FW Partition Table : OK
1715 02:41:53.318631 ME: Bringup Loader Failure : NO
1716 02:41:53.321379 ME: Firmware Init Complete : YES
1717 02:41:53.325185 ME: Boot Options Present : NO
1718 02:41:53.328318 ME: Update In Progress : NO
1719 02:41:53.331745 ME: D0i3 Support : YES
1720 02:41:53.335014 ME: Low Power State Enabled : NO
1721 02:41:53.338123 ME: CPU Replaced : NO
1722 02:41:53.341361 ME: CPU Replacement Valid : YES
1723 02:41:53.344677 ME: Current Working State : 5
1724 02:41:53.347866 ME: Current Operation State : 1
1725 02:41:53.351838 ME: Current Operation Mode : 0
1726 02:41:53.354992 ME: Error Code : 0
1727 02:41:53.358233 ME: CPU Debug Disabled : YES
1728 02:41:53.361401 ME: TXT Support : NO
1729 02:41:53.367756 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1730 02:41:53.374723 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 02:41:53.374810 CBFS @ c08000 size 3f8000
1732 02:41:53.381128 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 02:41:53.384281 CBFS: Locating 'fallback/dsdt.aml'
1734 02:41:53.387579 CBFS: Found @ offset 10bb80 size 3fa5
1735 02:41:53.394455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 02:41:53.397710 CBFS @ c08000 size 3f8000
1737 02:41:53.404218 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 02:41:53.404306 CBFS: Locating 'fallback/slic'
1739 02:41:53.409917 CBFS: 'fallback/slic' not found.
1740 02:41:53.416318 ACPI: Writing ACPI tables at 99b3e000.
1741 02:41:53.416415 ACPI: * FACS
1742 02:41:53.419633 ACPI: * DSDT
1743 02:41:53.422853 Ramoops buffer: 0x100000@0x99a3d000.
1744 02:41:53.426057 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1745 02:41:53.432644 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1746 02:41:53.435953 Google Chrome EC: version:
1747 02:41:53.439114 ro: helios_v2.0.2659-56403530b
1748 02:41:53.442570 rw: helios_v2.0.2849-c41de27e7d
1749 02:41:53.442657 running image: 1
1750 02:41:53.447121 ACPI: * FADT
1751 02:41:53.447211 SCI is IRQ9
1752 02:41:53.450311 ACPI: added table 1/32, length now 40
1753 02:41:53.453430
1754 02:41:53.453519 ACPI: * SSDT
1755 02:41:53.456659 Found 1 CPU(s) with 8 core(s) each.
1756 02:41:53.460339 Error: Could not locate 'wifi_sar' in VPD.
1757 02:41:53.466860 Checking CBFS for default SAR values
1758 02:41:53.469979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1759 02:41:53.473168 CBFS @ c08000 size 3f8000
1760 02:41:53.480274 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1761 02:41:53.483602 CBFS: Locating 'wifi_sar_defaults.hex'
1762 02:41:53.486843 CBFS: Found @ offset 5fac0 size 77
1763 02:41:53.490080 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1764 02:41:53.493254 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1765 02:41:53.496346
1766 02:41:53.500175 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1767 02:41:53.506560 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1768 02:41:53.509943 failed to find key in VPD: dsm_calib_r0_0
1769 02:41:53.520135 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1770 02:41:53.523362 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1771 02:41:53.526590 failed to find key in VPD: dsm_calib_r0_1
1772 02:41:53.535941 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1773 02:41:53.542946 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1774 02:41:53.546219 failed to find key in VPD: dsm_calib_r0_2
1775 02:41:53.555826 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1776 02:41:53.559227 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1777 02:41:53.566074 failed to find key in VPD: dsm_calib_r0_3
1778 02:41:53.572567 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1779 02:41:53.578977 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1780 02:41:53.582299 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1781 02:41:53.586176 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1782 02:41:53.590090 EC returned error result code 1
1783 02:41:53.593481 EC returned error result code 1
1784 02:41:53.597186 EC returned error result code 1
1785 02:41:53.603895 PS2K: Bad resp from EC. Vivaldi disabled!
1786 02:41:53.607233 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1787 02:41:53.613673 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1788 02:41:53.620645 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1789 02:41:53.623879 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1790 02:41:53.630507 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1791 02:41:53.636992 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1792 02:41:53.643477 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1793 02:41:53.646686 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1794 02:41:53.653710 ACPI: added table 2/32, length now 44
1795 02:41:53.653805 ACPI: * MCFG
1796 02:41:53.656931 ACPI: added table 3/32, length now 48
1797 02:41:53.660078 ACPI: * TPM2
1798 02:41:53.663285 TPM2 log created at 99a2d000
1799 02:41:53.666463 ACPI: added table 4/32, length now 52
1800 02:41:53.666558 ACPI: * MADT
1801 02:41:53.670340 SCI is IRQ9
1802 02:41:53.673547 ACPI: added table 5/32, length now 56
1803 02:41:53.673641 current = 99b43ac0
1804 02:41:53.676751 ACPI: * DMAR
1805 02:41:53.679665 ACPI: added table 6/32, length now 60
1806 02:41:53.682842 ACPI: * IGD OpRegion
1807 02:41:53.682937 GMA: Found VBT in CBFS
1808 02:41:53.686650 GMA: Found valid VBT in CBFS
1809 02:41:53.689840 ACPI: added table 7/32, length now 64
1810 02:41:53.693105
1811 02:41:53.693200 ACPI: * HPET
1812 02:41:53.696431 ACPI: added table 8/32, length now 68
1813 02:41:53.699687 ACPI: done.
1814 02:41:53.699782 ACPI tables: 31744 bytes.
1815 02:41:53.703278 smbios_write_tables: 99a2c000
1816 02:41:53.706512 EC returned error result code 3
1817 02:41:53.709781 Couldn't obtain OEM name from CBI
1818 02:41:53.713503 Create SMBIOS type 17
1819 02:41:53.716717 PCI: 00:00.0 (Intel Cannonlake)
1820 02:41:53.720002 PCI: 00:14.3 (Intel WiFi)
1821 02:41:53.723269 SMBIOS tables: 939 bytes.
1822 02:41:53.726599 Writing table forward entry at 0x00000500
1823 02:41:53.733100 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1824 02:41:53.736445 Writing coreboot table at 0x99b62000
1825 02:41:53.742918 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1826 02:41:53.746597 1. 0000000000001000-000000000009ffff: RAM
1827 02:41:53.749429 2. 00000000000a0000-00000000000fffff: RESERVED
1828 02:41:53.756418 3. 0000000000100000-0000000099a2bfff: RAM
1829 02:41:53.759642 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1830 02:41:53.765962 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1831 02:41:53.772524 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1832 02:41:53.775905 7. 000000009a000000-000000009f7fffff: RESERVED
1833 02:41:53.782830 8. 00000000e0000000-00000000efffffff: RESERVED
1834 02:41:53.786129 9. 00000000fc000000-00000000fc000fff: RESERVED
1835 02:41:53.789278 10. 00000000fe000000-00000000fe00ffff: RESERVED
1836 02:41:53.795764 11. 00000000fed10000-00000000fed17fff: RESERVED
1837 02:41:53.799026 12. 00000000fed80000-00000000fed83fff: RESERVED
1838 02:41:53.806168 13. 00000000fed90000-00000000fed91fff: RESERVED
1839 02:41:53.809298 14. 00000000feda0000-00000000feda1fff: RESERVED
1840 02:41:53.815792 15. 0000000100000000-000000045e7fffff: RAM
1841 02:41:53.818827 Graphics framebuffer located at 0xc0000000
1842 02:41:53.822131 Passing 5 GPIOs to payload:
1843 02:41:53.825475 NAME | PORT | POLARITY | VALUE
1844 02:41:53.832103 write protect | undefined | high | low
1845 02:41:53.835364 lid | undefined | high | high
1846 02:41:53.842366 power | undefined | high | low
1847 02:41:53.848758 oprom | undefined | high | low
1848 02:41:53.852107 EC in RW | 0x000000cb | high | low
1849 02:41:53.855275 Board ID: 4
1850 02:41:53.858591 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1851 02:41:53.861890 CBFS @ c08000 size 3f8000
1852 02:41:53.869060 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1853 02:41:53.872199 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1854 02:41:53.875365
1855 02:41:53.875461 coreboot table: 1492 bytes.
1856 02:41:53.878546 IMD ROOT 0. 99fff000 00001000
1857 02:41:53.881822 IMD SMALL 1. 99ffe000 00001000
1858 02:41:53.885547 FSP MEMORY 2. 99c4e000 003b0000
1859 02:41:53.888731 CONSOLE 3. 99c2e000 00020000
1860 02:41:53.892061 FMAP 4. 99c2d000 0000054e
1861 02:41:53.895278 TIME STAMP 5. 99c2c000 00000910
1862 02:41:53.898390 VBOOT WORK 6. 99c18000 00014000
1863 02:41:53.901809 MRC DATA 7. 99c16000 00001958
1864 02:41:53.904907 ROMSTG STCK 8. 99c15000 00001000
1865 02:41:53.908939 AFTER CAR 9. 99c0b000 0000a000
1866 02:41:53.912137 RAMSTAGE 10. 99baf000 0005c000
1867 02:41:53.915226 REFCODE 11. 99b7a000 00035000
1868 02:41:53.918371 SMM BACKUP 12. 99b6a000 00010000
1869 02:41:53.921570 COREBOOT 13. 99b62000 00008000
1870 02:41:53.924933 ACPI 14. 99b3e000 00024000
1871 02:41:53.928135 ACPI GNVS 15. 99b3d000 00001000
1872 02:41:53.931440
1873 02:41:53.931530 RAMOOPS 16. 99a3d000 00100000
1874 02:41:53.934760
1875 02:41:53.934849 TPM2 TCGLOG17. 99a2d000 00010000
1876 02:41:53.938109
1877 02:41:53.941363 SMBIOS 18. 99a2c000 00000800
1878 02:41:53.941465 IMD small region:
1879 02:41:53.944478 IMD ROOT 0. 99ffec00 00000400
1880 02:41:53.947772 FSP RUNTIME 1. 99ffebe0 00000004
1881 02:41:53.951029 EC HOSTEVENT 2. 99ffebc0 00000008
1882 02:41:53.954903 POWER STATE 3. 99ffeb80 00000040
1883 02:41:53.958143 ROMSTAGE 4. 99ffeb60 00000004
1884 02:41:53.961268 MEM INFO 5. 99ffe9a0 000001b9
1885 02:41:53.967786 VPD 6. 99ffe920 0000006c
1886 02:41:53.967881 MTRR: Physical address space:
1887 02:41:53.974140 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1888 02:41:53.980794 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1889 02:41:53.987835 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1890 02:41:53.994185 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1891 02:41:54.000794 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1892 02:41:54.007374 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1893 02:41:54.014345 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1894 02:41:54.017417 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 02:41:54.020763 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 02:41:54.023864 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 02:41:54.030351 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 02:41:54.034227 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 02:41:54.037388 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 02:41:54.040672 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 02:41:54.047062 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 02:41:54.050159 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 02:41:54.054014 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 02:41:54.056751 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 02:41:54.060505 call enable_fixed_mtrr()
1906 02:41:54.063913 CPU physical address size: 39 bits
1907 02:41:54.070871 MTRR: default type WB/UC MTRR counts: 6/8.
1908 02:41:54.074014 MTRR: WB selected as default type.
1909 02:41:54.080737 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1910 02:41:54.083839 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1911 02:41:54.090240 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1912 02:41:54.096664 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1913 02:41:54.103664 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1914 02:41:54.110064 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1915 02:41:54.113478 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 02:41:54.120112 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 02:41:54.123609 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 02:41:54.126635 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 02:41:54.129863 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 02:41:54.136271 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 02:41:54.140146 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 02:41:54.143342 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 02:41:54.146596 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 02:41:54.152825 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 02:41:54.156077 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 02:41:54.156173
1927 02:41:54.156250 MTRR check
1928 02:41:54.159874 Fixed MTRRs : Enabled
1929 02:41:54.163051 Variable MTRRs: Enabled
1930 02:41:54.163146
1931 02:41:54.166252 call enable_fixed_mtrr()
1932 02:41:54.169505 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1933 02:41:54.172684 CPU physical address size: 39 bits
1934 02:41:54.179097 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1935 02:41:54.182936 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 02:41:54.186149 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 02:41:54.192590 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 02:41:54.195818 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 02:41:54.199021 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 02:41:54.202296 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 02:41:54.208734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 02:41:54.212492 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 02:41:54.215295 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 02:41:54.218950 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 02:41:54.225415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 02:41:54.228997 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 02:41:54.232293 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 02:41:54.235526 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 02:41:54.242257 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 02:41:54.245378 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 02:41:54.248634 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 02:41:54.251848 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 02:41:54.258324 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 02:41:54.261637 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 02:41:54.265225 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 02:41:54.268548 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 02:41:54.271689 call enable_fixed_mtrr()
1958 02:41:54.274872 call enable_fixed_mtrr()
1959 02:41:54.277954 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 02:41:54.281198 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 02:41:54.284521
1962 02:41:54.288160 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 02:41:54.291284 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 02:41:54.294957 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 02:41:54.298152 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 02:41:54.304178 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 02:41:54.307450 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 02:41:54.310591 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 02:41:54.314574 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 02:41:54.320480 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 02:41:54.324367 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 02:41:54.327420 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 02:41:54.330801 call enable_fixed_mtrr()
1974 02:41:54.333967 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 02:41:54.340667 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 02:41:54.343883 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 02:41:54.347111 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 02:41:54.350258 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 02:41:54.356700 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 02:41:54.359972 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 02:41:54.363439 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 02:41:54.366614 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 02:41:54.370618 CPU physical address size: 39 bits
1984 02:41:54.373174 call enable_fixed_mtrr()
1985 02:41:54.377100 CPU physical address size: 39 bits
1986 02:41:54.380220 CPU physical address size: 39 bits
1987 02:41:54.386708 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 02:41:54.390530 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 02:41:54.393641 CPU physical address size: 39 bits
1990 02:41:54.396928 CBFS @ c08000 size 3f8000
1991 02:41:54.400838 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1992 02:41:54.403239 CBFS: Locating 'fallback/payload'
1993 02:41:54.410411 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 02:41:54.413575 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 02:41:54.416812 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 02:41:54.419742 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 02:41:54.426701 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 02:41:54.430083 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 02:41:54.433105 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 02:41:54.436339 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 02:41:54.442873 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 02:41:54.446025 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 02:41:54.449407 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 02:41:54.452625 call enable_fixed_mtrr()
2005 02:41:54.456409 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 02:41:54.459774 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 02:41:54.466013 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 02:41:54.469299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 02:41:54.472637 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 02:41:54.475934 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 02:41:54.482828 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 02:41:54.485896 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 02:41:54.489138 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 02:41:54.492457 CPU physical address size: 39 bits
2015 02:41:54.496227 call enable_fixed_mtrr()
2016 02:41:54.499221 CBFS: Found @ offset 1c96c0 size 3f798
2017 02:41:54.502409 CPU physical address size: 39 bits
2018 02:41:54.509019 Checking segment from ROM address 0xffdd16f8
2019 02:41:54.512275 Checking segment from ROM address 0xffdd1714
2020 02:41:54.515430 Loading segment from ROM address 0xffdd16f8
2021 02:41:54.519304 code (compression=0)
2022 02:41:54.529161 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2023 02:41:54.536006 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2024 02:41:54.538656 it's not compressed!
2025 02:41:54.630781 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2026 02:41:54.637471 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2027 02:41:54.640510 Loading segment from ROM address 0xffdd1714
2028 02:41:54.643677 Entry Point 0x30000000
2029 02:41:54.646908 Loaded segments
2030 02:41:54.652705 Finalizing chipset.
2031 02:41:54.655996 Finalizing SMM.
2032 02:41:54.659261 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2033 02:41:54.662328 mp_park_aps done after 0 msecs.
2034 02:41:54.669397 Jumping to boot code at 30000000(99b62000)
2035 02:41:54.675953 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2036 02:41:54.676056
2037 02:41:54.676133
2038 02:41:54.676209
2039 02:41:54.679179 Starting depthcharge on Helios...
2040 02:41:54.679268
2041 02:41:54.679628 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2042 02:41:54.679750 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2043 02:41:54.679847 Setting prompt string to ['hatch:']
2044 02:41:54.679940 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2045 02:41:54.688716 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2046 02:41:54.688808
2047 02:41:54.695876 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2048 02:41:54.695966
2049 02:41:54.701950 board_setup: Info: eMMC controller not present; skipping
2050 02:41:54.702036
2051 02:41:54.705769 New NVMe Controller 0x30053ac0 @ 00:1d:00
2052 02:41:54.705862
2053 02:41:54.712016 board_setup: Info: SDHCI controller not present; skipping
2054 02:41:54.712116
2055 02:41:54.719005 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2056 02:41:54.719102
2057 02:41:54.719179 Wipe memory regions:
2058 02:41:54.719249
2059 02:41:54.722153 [0x00000000001000, 0x000000000a0000)
2060 02:41:54.722233
2061 02:41:54.725328 [0x00000000100000, 0x00000030000000)
2062 02:41:54.728587
2063 02:41:54.794907 [0x00000030657430, 0x00000099a2c000)
2064 02:41:54.795025
2065 02:41:54.945256 [0x00000100000000, 0x0000045e800000)
2066 02:41:54.945409
2067 02:41:56.400851 R8152: Initializing
2068 02:41:56.401019
2069 02:41:56.403995 Version 9 (ocp_data = 6010)
2070 02:41:56.404092
2071 02:41:56.408520 R8152: Done initializing
2072 02:41:56.408611
2073 02:41:56.411711 Adding net device
2074 02:41:56.411800
2075 02:41:56.894538 R8152: Initializing
2076 02:41:56.894701
2077 02:41:56.897892 Version 6 (ocp_data = 5c30)
2078 02:41:56.898019
2079 02:41:56.901168 R8152: Done initializing
2080 02:41:56.901264
2081 02:41:56.908059 net_add_device: Attemp to include the same device
2082 02:41:56.908159
2083 02:41:56.915042 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2084 02:41:56.915131
2085 02:41:56.915208
2086 02:41:56.915282
2087 02:41:56.915569 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2089 02:41:57.016066 hatch: tftpboot 192.168.201.1 8867167/tftp-deploy-qr_0t9i3/kernel/bzImage 8867167/tftp-deploy-qr_0t9i3/kernel/cmdline 8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
2090 02:41:57.016221 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2091 02:41:57.016314 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2092 02:41:57.020709 tftpboot 192.168.201.1 8867167/tftp-deploy-qr_0t9i3/kernel/bzImoy-qr_0t9i3/kernel/cmdline 8867167/tftp-deploy-qr_0t9i3/ramdisk/ramdisk.cpio.gz
2093 02:41:57.020804
2094 02:41:57.020884 Waiting for link
2095 02:41:57.020954
2096 02:41:57.221425 done.
2097 02:41:57.221577
2098 02:41:57.221658 MAC: 00:24:32:50:1a:59
2099 02:41:57.221737
2100 02:41:57.224724 Sending DHCP discover... done.
2101 02:41:57.224811
2102 02:41:57.227767 Waiting for reply... done.
2103 02:41:57.227848
2104 02:41:57.231066 Sending DHCP request... done.
2105 02:41:57.231145
2106 02:41:57.237931 Waiting for reply... done.
2107 02:41:57.238028
2108 02:41:57.238105 My ip is 192.168.201.14
2109 02:41:57.238177
2110 02:41:57.241239 The DHCP server ip is 192.168.201.1
2111 02:41:57.241335
2112 02:41:57.247636 TFTP server IP predefined by user: 192.168.201.1
2113 02:41:57.247722
2114 02:41:57.254345 Bootfile predefined by user: 8867167/tftp-deploy-qr_0t9i3/kernel/bzImage
2115 02:41:57.254437
2116 02:41:57.257995 Sending tftp read request... done.
2117 02:41:57.258079
2118 02:41:57.261150 Waiting for the transfer...
2119 02:41:57.261237
2120 02:41:57.834259 00000000 ################################################################
2121 02:41:57.834435
2122 02:41:58.437079 00080000 ################################################################
2123 02:41:58.437245
2124 02:41:59.032670 00100000 ################################################################
2125 02:41:59.032815
2126 02:41:59.591836 00180000 ################################################################
2127 02:41:59.591986
2128 02:42:00.186835 00200000 ################################################################
2129 02:42:00.186982
2130 02:42:00.784444 00280000 ################################################################
2131 02:42:00.784591
2132 02:42:01.380217 00300000 ################################################################
2133 02:42:01.380365
2134 02:42:01.956869 00380000 ################################################################
2135 02:42:01.957015
2136 02:42:02.545917 00400000 ################################################################
2137 02:42:02.546071
2138 02:42:03.172627 00480000 ################################################################
2139 02:42:03.173226
2140 02:42:03.886650 00500000 ################################################################
2141 02:42:03.887251
2142 02:42:04.577026 00580000 ################################################################
2143 02:42:04.577589
2144 02:42:05.242161 00600000 ################################################################
2145 02:42:05.242689
2146 02:42:05.877662 00680000 ################################################################
2147 02:42:05.878202
2148 02:42:06.156689 00700000 ############################ done.
2149 02:42:06.157198
2150 02:42:06.160182 The bootfile was 7569296 bytes long.
2151 02:42:06.160659
2152 02:42:06.163278 Sending tftp read request... done.
2153 02:42:06.163720
2154 02:42:06.166624 Waiting for the transfer...
2155 02:42:06.167079
2156 02:42:06.813516 00000000 ################################################################
2157 02:42:06.814044
2158 02:42:07.467943 00080000 ################################################################
2159 02:42:07.468109
2160 02:42:07.995965 00100000 ################################################################
2161 02:42:07.996166
2162 02:42:08.543394 00180000 ################################################################
2163 02:42:08.543545
2164 02:42:09.081314 00200000 ################################################################
2165 02:42:09.081490
2166 02:42:09.649626 00280000 ################################################################
2167 02:42:09.649778
2168 02:42:10.214351 00300000 ################################################################
2169 02:42:10.214510
2170 02:42:10.880752 00380000 ################################################################
2171 02:42:10.880930
2172 02:42:11.543732 00400000 ################################################################
2173 02:42:11.543894
2174 02:42:12.085216 00480000 ################################################################
2175 02:42:12.085371
2176 02:42:12.355127 00500000 ################################ done.
2177 02:42:12.355278
2178 02:42:12.358400 Sending tftp read request... done.
2179 02:42:12.358496
2180 02:42:12.361461 Waiting for the transfer...
2181 02:42:12.361558
2182 02:42:12.361634 00000000 # done.
2183 02:42:12.361706
2184 02:42:12.371026 Command line loaded dynamically from TFTP file: 8867167/tftp-deploy-qr_0t9i3/kernel/cmdline
2185 02:42:12.371130
2186 02:42:12.397835 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8867167/extract-nfsrootfs-q_et41x3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2187 02:42:12.397967
2188 02:42:12.404046 ec_init(0): CrosEC protocol v3 supported (256, 256)
2189 02:42:12.404192
2190 02:42:12.410874 Shutting down all USB controllers.
2191 02:42:12.411026
2192 02:42:12.411145 Removing current net device
2193 02:42:12.411255
2194 02:42:12.414789 Finalizing coreboot
2195 02:42:12.414962
2196 02:42:12.421582 Exiting depthcharge with code 4 at timestamp: 25064380
2197 02:42:12.421878
2198 02:42:12.422062
2199 02:42:12.422281 Starting kernel ...
2200 02:42:12.422462
2201 02:42:12.422625
2202 02:42:12.423331 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2203 02:42:12.423595 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2204 02:42:12.423799 Setting prompt string to ['Linux version [0-9]']
2205 02:42:12.423989 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2206 02:42:12.424205 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2207 02:42:12.424688
2209 02:46:36.423889 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2211 02:46:36.424256 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2213 02:46:36.424543 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2216 02:46:36.424998 end: 2 depthcharge-action (duration 00:05:00) [common]
2218 02:46:36.425263 Cleaning after the job
2219 02:46:36.425364 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/ramdisk
2220 02:46:36.425854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/kernel
2221 02:46:36.426442 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/nfsrootfs
2222 02:46:36.482332 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8867167/tftp-deploy-qr_0t9i3/modules
2223 02:46:36.482671 start: 4.1 power-off (timeout 00:00:30) [common]
2224 02:46:36.482859 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2225 02:46:36.504125 >> Command sent successfully.
2226 02:46:36.506227 Returned 0 in 0 seconds
2227 02:46:36.607077 end: 4.1 power-off (duration 00:00:00) [common]
2229 02:46:36.607490 start: 4.2 read-feedback (timeout 00:10:00) [common]
2230 02:46:36.607781 Listened to connection for namespace 'common' for up to 1s
2231 02:46:37.497988 Listened to connection for namespace 'common' for up to 1s
2232 02:46:37.501008 Listened to connection for namespace 'common' for up to 1s
2233 02:46:37.504213 Listened to connection for namespace 'common' for up to 1s
2234 02:46:37.508064 Listened to connection for namespace 'common' for up to 1s
2235 02:46:37.511031 Listened to connection for namespace 'common' for up to 1s
2236 02:46:37.514699 Listened to connection for namespace 'common' for up to 1s
2237 02:46:37.517962 Listened to connection for namespace 'common' for up to 1s
2238 02:46:37.521043 Listened to connection for namespace 'common' for up to 1s
2239 02:46:37.524147 Listened to connection for namespace 'common' for up to 1s
2240 02:46:37.527936 Listened to connection for namespace 'common' for up to 1s
2241 02:46:37.531082 Listened to connection for namespace 'common' for up to 1s
2242 02:46:37.534259 Listened to connection for namespace 'common' for up to 1s
2243 02:46:37.537939 Listened to connection for namespace 'common' for up to 1s
2244 02:46:37.544131 Listened to connection for namespace 'common' for up to 1s
2245 02:46:37.547154 Listened to connection for namespace 'common' for up to 1s
2246 02:46:37.607990 Finalising connection for namespace 'common'
2247 02:46:37.608191 Disconnecting from shell: Finalise
2248 02:46:37.608294
2249 02:46:37.709047 end: 4.2 read-feedback (duration 00:00:01) [common]
2250 02:46:37.709227 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8867167
2251 02:46:37.878821 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8867167
2252 02:46:37.879038 JobError: Your job cannot terminate cleanly.