Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:45:39.506015 lava-dispatcher, installed at version: 2023.10
2 08:45:39.506235 start: 0 validate
3 08:45:39.506368 Start time: 2023-12-11 08:45:39.506360+00:00 (UTC)
4 08:45:39.506484 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:45:39.506618 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 08:45:39.767777 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:45:39.767951 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:45:40.025992 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:45:40.026174 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 08:45:44.941086 validate duration: 5.43
12 08:45:44.941383 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:45:44.941501 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:45:44.941603 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:45:44.941728 Not decompressing ramdisk as can be used compressed.
16 08:45:44.941820 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 08:45:44.941889 saving as /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/ramdisk/rootfs.cpio.gz
18 08:45:44.941954 total size: 8418130 (8 MB)
19 08:45:45.468964 progress 0 % (0 MB)
20 08:45:45.483035 progress 5 % (0 MB)
21 08:45:45.500427 progress 10 % (0 MB)
22 08:45:45.509229 progress 15 % (1 MB)
23 08:45:45.514578 progress 20 % (1 MB)
24 08:45:45.520706 progress 25 % (2 MB)
25 08:45:45.526503 progress 30 % (2 MB)
26 08:45:45.530967 progress 35 % (2 MB)
27 08:45:45.533897 progress 40 % (3 MB)
28 08:45:45.536598 progress 45 % (3 MB)
29 08:45:45.539205 progress 50 % (4 MB)
30 08:45:45.541639 progress 55 % (4 MB)
31 08:45:45.544006 progress 60 % (4 MB)
32 08:45:45.546091 progress 65 % (5 MB)
33 08:45:45.548900 progress 70 % (5 MB)
34 08:45:45.551146 progress 75 % (6 MB)
35 08:45:45.553407 progress 80 % (6 MB)
36 08:45:45.555620 progress 85 % (6 MB)
37 08:45:45.557912 progress 90 % (7 MB)
38 08:45:45.560187 progress 95 % (7 MB)
39 08:45:45.562271 progress 100 % (8 MB)
40 08:45:45.562506 8 MB downloaded in 0.62 s (12.94 MB/s)
41 08:45:45.562662 end: 1.1.1 http-download (duration 00:00:01) [common]
43 08:45:45.562905 end: 1.1 download-retry (duration 00:00:01) [common]
44 08:45:45.563001 start: 1.2 download-retry (timeout 00:09:59) [common]
45 08:45:45.563089 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 08:45:45.563221 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 08:45:45.563298 saving as /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/kernel/bzImage
48 08:45:45.563362 total size: 8572816 (8 MB)
49 08:45:45.563425 No compression specified
50 08:45:45.564609 progress 0 % (0 MB)
51 08:45:45.566959 progress 5 % (0 MB)
52 08:45:45.569362 progress 10 % (0 MB)
53 08:45:45.571742 progress 15 % (1 MB)
54 08:45:45.574200 progress 20 % (1 MB)
55 08:45:45.576625 progress 25 % (2 MB)
56 08:45:45.578920 progress 30 % (2 MB)
57 08:45:45.581232 progress 35 % (2 MB)
58 08:45:45.583542 progress 40 % (3 MB)
59 08:45:45.585934 progress 45 % (3 MB)
60 08:45:45.588251 progress 50 % (4 MB)
61 08:45:45.590644 progress 55 % (4 MB)
62 08:45:45.592932 progress 60 % (4 MB)
63 08:45:45.595316 progress 65 % (5 MB)
64 08:45:45.597581 progress 70 % (5 MB)
65 08:45:45.599893 progress 75 % (6 MB)
66 08:45:45.603021 progress 80 % (6 MB)
67 08:45:45.605432 progress 85 % (6 MB)
68 08:45:45.607770 progress 90 % (7 MB)
69 08:45:45.610012 progress 95 % (7 MB)
70 08:45:45.612317 progress 100 % (8 MB)
71 08:45:45.612515 8 MB downloaded in 0.05 s (166.34 MB/s)
72 08:45:45.612665 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:45:45.612900 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:45:45.612993 start: 1.3 download-retry (timeout 00:09:59) [common]
76 08:45:45.613079 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 08:45:45.613220 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 08:45:45.613293 saving as /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/modules/modules.tar
79 08:45:45.613355 total size: 251012 (0 MB)
80 08:45:45.613419 Using unxz to decompress xz
81 08:45:45.617882 progress 13 % (0 MB)
82 08:45:45.618334 progress 26 % (0 MB)
83 08:45:45.618583 progress 39 % (0 MB)
84 08:45:45.620263 progress 52 % (0 MB)
85 08:45:45.622228 progress 65 % (0 MB)
86 08:45:45.624236 progress 78 % (0 MB)
87 08:45:45.626025 progress 91 % (0 MB)
88 08:45:45.628014 progress 100 % (0 MB)
89 08:45:45.633458 0 MB downloaded in 0.02 s (11.91 MB/s)
90 08:45:45.633732 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:45:45.634012 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:45:45.634114 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 08:45:45.634214 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 08:45:45.634305 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:45:45.634397 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 08:45:45.634641 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc
98 08:45:45.634781 makedir: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin
99 08:45:45.634890 makedir: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/tests
100 08:45:45.634991 makedir: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/results
101 08:45:45.635113 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-add-keys
102 08:45:45.635266 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-add-sources
103 08:45:45.635401 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-background-process-start
104 08:45:45.635535 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-background-process-stop
105 08:45:45.635692 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-common-functions
106 08:45:45.635836 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-echo-ipv4
107 08:45:45.635966 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-install-packages
108 08:45:45.636097 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-installed-packages
109 08:45:45.636226 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-os-build
110 08:45:45.636353 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-probe-channel
111 08:45:45.636501 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-probe-ip
112 08:45:45.636660 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-target-ip
113 08:45:45.636794 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-target-mac
114 08:45:45.636933 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-target-storage
115 08:45:45.637095 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-case
116 08:45:45.637221 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-event
117 08:45:45.637348 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-feedback
118 08:45:45.637475 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-raise
119 08:45:45.637603 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-reference
120 08:45:45.637731 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-runner
121 08:45:45.637857 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-set
122 08:45:45.637985 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-test-shell
123 08:45:45.638116 Updating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-install-packages (oe)
124 08:45:45.638276 Updating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/bin/lava-installed-packages (oe)
125 08:45:45.638406 Creating /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/environment
126 08:45:45.638509 LAVA metadata
127 08:45:45.638596 - LAVA_JOB_ID=12243806
128 08:45:45.638664 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:45:45.638778 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 08:45:45.638850 skipped lava-vland-overlay
131 08:45:45.638928 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:45:45.639009 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 08:45:45.639073 skipped lava-multinode-overlay
134 08:45:45.639146 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:45:45.639232 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 08:45:45.639325 Loading test definitions
137 08:45:45.639426 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 08:45:45.639514 Using /lava-12243806 at stage 0
139 08:45:45.639909 uuid=12243806_1.4.2.3.1 testdef=None
140 08:45:45.640000 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:45:45.640091 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 08:45:45.640669 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:45:45.640947 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 08:45:45.641611 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:45:45.641887 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 08:45:45.642518 runner path: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/0/tests/0_dmesg test_uuid 12243806_1.4.2.3.1
149 08:45:45.642678 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:45:45.642914 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 08:45:45.642987 Using /lava-12243806 at stage 1
153 08:45:45.643305 uuid=12243806_1.4.2.3.5 testdef=None
154 08:45:45.643411 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:45:45.643511 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 08:45:45.644042 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:45:45.644305 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 08:45:45.644973 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:45:45.645252 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 08:45:45.645953 runner path: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/1/tests/1_bootrr test_uuid 12243806_1.4.2.3.5
163 08:45:45.646142 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:45:45.646406 Creating lava-test-runner.conf files
166 08:45:45.646500 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/0 for stage 0
167 08:45:45.646611 - 0_dmesg
168 08:45:45.646707 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243806/lava-overlay-2m11iskc/lava-12243806/1 for stage 1
169 08:45:45.646814 - 1_bootrr
170 08:45:45.646912 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:45:45.647017 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 08:45:45.655991 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:45:45.656155 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 08:45:45.656278 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:45:45.656382 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:45:45.656516 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 08:45:45.924631 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:45:45.925054 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 08:45:45.925201 extracting modules file /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243806/extract-overlay-ramdisk-mpttdf9u/ramdisk
180 08:45:45.939543 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:45:45.939776 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 08:45:45.939900 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243806/compress-overlay-5vb7kiz_/overlay-1.4.2.4.tar.gz to ramdisk
183 08:45:45.939986 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243806/compress-overlay-5vb7kiz_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243806/extract-overlay-ramdisk-mpttdf9u/ramdisk
184 08:45:45.949490 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:45:45.949669 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 08:45:45.949786 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:45:45.949906 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 08:45:45.950005 Building ramdisk /var/lib/lava/dispatcher/tmp/12243806/extract-overlay-ramdisk-mpttdf9u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243806/extract-overlay-ramdisk-mpttdf9u/ramdisk
189 08:45:46.087161 >> 49790 blocks
190 08:45:46.954186 rename /var/lib/lava/dispatcher/tmp/12243806/extract-overlay-ramdisk-mpttdf9u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
191 08:45:46.954789 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:45:46.954983 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 08:45:46.955135 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 08:45:46.955278 No mkimage arch provided, not using FIT.
195 08:45:46.955418 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:45:46.955555 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:45:46.955737 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:45:46.955883 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 08:45:46.956017 No LXC device requested
200 08:45:46.956153 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:45:46.956286 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 08:45:46.956426 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:45:46.956545 Checking files for TFTP limit of 4294967296 bytes.
204 08:45:46.957139 end: 1 tftp-deploy (duration 00:00:02) [common]
205 08:45:46.957301 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:45:46.957436 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:45:46.957624 substitutions:
208 08:45:46.957732 - {DTB}: None
209 08:45:46.957841 - {INITRD}: 12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
210 08:45:46.957950 - {KERNEL}: 12243806/tftp-deploy-1rslvo1n/kernel/bzImage
211 08:45:46.958058 - {LAVA_MAC}: None
212 08:45:46.958161 - {PRESEED_CONFIG}: None
213 08:45:46.958267 - {PRESEED_LOCAL}: None
214 08:45:46.958375 - {RAMDISK}: 12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
215 08:45:46.958479 - {ROOT_PART}: None
216 08:45:46.958580 - {ROOT}: None
217 08:45:46.958680 - {SERVER_IP}: 192.168.201.1
218 08:45:46.958780 - {TEE}: None
219 08:45:46.958878 Parsed boot commands:
220 08:45:46.958980 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:45:46.959236 Parsed boot commands: tftpboot 192.168.201.1 12243806/tftp-deploy-1rslvo1n/kernel/bzImage 12243806/tftp-deploy-1rslvo1n/kernel/cmdline 12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
222 08:45:46.959380 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:45:46.959519 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:45:46.959678 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:45:46.959823 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:45:46.959945 Not connected, no need to disconnect.
227 08:45:46.960073 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:45:46.960207 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:45:46.960320 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-7'
230 08:45:46.965391 Setting prompt string to ['lava-test: # ']
231 08:45:46.965911 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:45:46.966080 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:45:46.966226 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:45:46.966366 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:45:46.966686 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
236 08:45:52.102763 >> Command sent successfully.
237 08:45:52.105374 Returned 0 in 5 seconds
238 08:45:52.205747 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:45:52.206137 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:45:52.206236 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:45:52.206329 Setting prompt string to 'Starting depthcharge on Magolor...'
243 08:45:52.206403 Changing prompt to 'Starting depthcharge on Magolor...'
244 08:45:52.206472 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 08:45:52.206739 [Enter `^Ec?' for help]
246 08:45:53.352382
247 08:45:53.352601
248 08:45:53.361820 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 08:45:53.365407 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 08:45:53.371751 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 08:45:53.375430 CPU: AES supported, TXT NOT supported, VT supported
252 08:45:53.382281 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 08:45:53.385522 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 08:45:53.389467 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 08:45:53.393142 VBOOT: Loading verstage.
256 08:45:53.396489 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 08:45:53.404058 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 08:45:53.407101 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 08:45:53.413739 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 08:45:53.413864
261 08:45:53.413973
262 08:45:53.427259 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 08:45:53.440794 Probing TPM: . done!
264 08:45:53.443734 TPM ready after 0 ms
265 08:45:53.448163 Connected to device vid:did:rid of 1ae0:0028:00
266 08:45:53.459050 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 08:45:53.465389 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 08:45:53.515007 Initialized TPM device CR50 revision 0
269 08:45:53.525205 tlcl_send_startup: Startup return code is 0
270 08:45:53.525341 TPM: setup succeeded
271 08:45:53.539063 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 08:45:53.553035 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 08:45:53.566017 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 08:45:53.575377 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 08:45:53.579300 Chrome EC: UHEPI supported
276 08:45:53.582140 Phase 1
277 08:45:53.585708 FMAP: area GBB found @ c05000 (12288 bytes)
278 08:45:53.592385 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 08:45:53.598801 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 08:45:53.603058 Recovery requested (1009000e)
281 08:45:53.615166 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 08:45:53.622202 tlcl_extend: response is 0
283 08:45:53.637212 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 08:45:53.640994 tlcl_extend: response is 0
285 08:45:53.647194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 08:45:53.650982 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 08:45:53.657247 BS: verstage times (exec / console): total (unknown) / 124 ms
288 08:45:53.657370
289 08:45:53.660645
290 08:45:53.671513 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 08:45:53.674962 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 08:45:53.681952 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 08:45:53.684796 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 08:45:53.689231 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 08:45:53.695209 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 08:45:53.698307 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 08:45:53.702071 TCO_STS: 0000 0001
298 08:45:53.702194 GEN_PMCON: d0015038 00002200
299 08:45:53.705250 GBLRST_CAUSE: 00000000 00000000
300 08:45:53.708159 prev_sleep_state 5
301 08:45:53.711541 Boot Count incremented to 710
302 08:45:53.718014 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 08:45:53.721213 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 08:45:53.725534 Chrome EC: UHEPI supported
305 08:45:53.731374 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 08:45:53.737623 Probing TPM: done!
307 08:45:53.744559 Connected to device vid:did:rid of 1ae0:0028:00
308 08:45:53.754412 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 08:45:53.761876 Initialized TPM device CR50 revision 0
310 08:45:53.773746 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 08:45:53.777554 MRC: Hash idx 0x100b comparison successful.
312 08:45:53.780744 MRC cache found, size 5458
313 08:45:53.783964 bootmode is set to: 2
314 08:45:53.784090 SPD INDEX = 0
315 08:45:53.788070 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 08:45:53.791713 SPD: module type is LPDDR4X
317 08:45:53.798842 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 08:45:53.804778 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 08:45:53.808539 SPD: device width 16 bits, bus width 32 bits
320 08:45:53.811875 SPD: module size is 4096 MB (per channel)
321 08:45:53.814914 meminit_channels: DRAM half-populated
322 08:45:53.899057 CBMEM:
323 08:45:53.901906 IMD: root @ 0x76fff000 254 entries.
324 08:45:53.905249 IMD: root @ 0x76ffec00 62 entries.
325 08:45:53.909029 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 08:45:53.916180 WARNING: RO_VPD is uninitialized or empty.
327 08:45:53.918937 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 08:45:53.922087 External stage cache:
329 08:45:53.925319 IMD: root @ 0x7b3ff000 254 entries.
330 08:45:53.928955 IMD: root @ 0x7b3fec00 62 entries.
331 08:45:53.938686 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 08:45:53.945702 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 08:45:53.951976 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 08:45:53.960696 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 08:45:53.963695 cse_lite: Skip switching to RW in the recovery path
336 08:45:53.967612 1 DIMMs found
337 08:45:53.967745 SMM Memory Map
338 08:45:53.970278 SMRAM : 0x7b000000 0x800000
339 08:45:53.973862 Subregion 0: 0x7b000000 0x200000
340 08:45:53.976740 Subregion 1: 0x7b200000 0x200000
341 08:45:53.980526 Subregion 2: 0x7b400000 0x400000
342 08:45:53.983564 top_of_ram = 0x77000000
343 08:45:53.991137 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 08:45:53.993563 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 08:45:54.000306 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 08:45:54.004590 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 08:45:54.009948 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 08:45:54.022372 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 08:45:54.028858 Processing 188 relocs. Offset value of 0x74c0e000
350 08:45:54.035481 BS: romstage times (exec / console): total (unknown) / 255 ms
351 08:45:54.040479
352 08:45:54.040609
353 08:45:54.050246 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 08:45:54.053795 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 08:45:54.059845 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 08:45:54.066903 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 08:45:54.122837 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 08:45:54.129347 Processing 4805 relocs. Offset value of 0x75da8000
359 08:45:54.132359 BS: postcar times (exec / console): total (unknown) / 42 ms
360 08:45:54.135914
361 08:45:54.136043
362 08:45:54.145593 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 08:45:54.145733 Normal boot
364 08:45:54.149538 EC returned error result code 3
365 08:45:54.153225 FW_CONFIG value is 0x204
366 08:45:54.156117 GENERIC: 0.0 disabled by fw_config
367 08:45:54.162828 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 08:45:54.166359 I2C: 00:10 disabled by fw_config
369 08:45:54.169705 I2C: 00:10 disabled by fw_config
370 08:45:54.173096 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 08:45:54.179225 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 08:45:54.182946 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 08:45:54.189443 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 08:45:54.192894 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 08:45:54.196010 I2C: 00:10 disabled by fw_config
376 08:45:54.203079 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 08:45:54.209624 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 08:45:54.213234 I2C: 00:1a disabled by fw_config
379 08:45:54.217272 I2C: 00:1a disabled by fw_config
380 08:45:54.219344 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 08:45:54.227139 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 08:45:54.229422 GENERIC: 0.0 disabled by fw_config
383 08:45:54.232687 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 08:45:54.239181 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 08:45:54.246333 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 08:45:54.249356 microcode: Update skipped, already up-to-date
387 08:45:54.252702 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 08:45:54.281202 Detected 2 core, 2 thread CPU.
389 08:45:54.284559 Setting up SMI for CPU
390 08:45:54.288343 IED base = 0x7b400000
391 08:45:54.288449 IED size = 0x00400000
392 08:45:54.291613 Will perform SMM setup.
393 08:45:54.294554 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 08:45:54.304069 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 08:45:54.307825 Processing 16 relocs. Offset value of 0x00030000
396 08:45:54.311183 Attempting to start 1 APs
397 08:45:54.315193 Waiting for 10ms after sending INIT.
398 08:45:54.331246 Waiting for 1st SIPI to complete...done.
399 08:45:54.331396 AP: slot 1 apic_id 2.
400 08:45:54.337810 Waiting for 2nd SIPI to complete...done.
401 08:45:54.344224 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 08:45:54.352455 Processing 13 relocs. Offset value of 0x00038000
403 08:45:54.352589 Unable to locate Global NVS
404 08:45:54.361442 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 08:45:54.364102 Installing permanent SMM handler to 0x7b000000
406 08:45:54.371410 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 08:45:54.377574 Processing 704 relocs. Offset value of 0x7b010000
408 08:45:54.384212 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 08:45:54.391575 Processing 13 relocs. Offset value of 0x7b008000
410 08:45:54.398130 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 08:45:54.398271 Unable to locate Global NVS
412 08:45:54.407791 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 08:45:54.410783 Clearing SMI status registers
414 08:45:54.410888 SMI_STS: PM1
415 08:45:54.414220 PM1_STS: PWRBTN
416 08:45:54.414332 TCO_STS: INTRD_DET
417 08:45:54.420722 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 08:45:54.425494 In relocation handler: CPU 0
419 08:45:54.430795 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 08:45:54.433936 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 08:45:54.437591 Relocation complete.
422 08:45:54.444806 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 08:45:54.447903 In relocation handler: CPU 1
424 08:45:54.451203 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 08:45:54.455431 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 08:45:54.458774 Relocation complete.
427 08:45:54.458897 Initializing CPU #0
428 08:45:54.462005 CPU: vendor Intel device 906c0
429 08:45:54.465530 CPU: family 06, model 9c, stepping 00
430 08:45:54.468994 Clearing out pending MCEs
431 08:45:54.472060 Setting up local APIC...
432 08:45:54.475535 apic_id: 0x00 done.
433 08:45:54.478833 Turbo is available but hidden
434 08:45:54.478985 Turbo is available and visible
435 08:45:54.485184 microcode: Update skipped, already up-to-date
436 08:45:54.485315 CPU #0 initialized
437 08:45:54.488920 Initializing CPU #1
438 08:45:54.492025 CPU: vendor Intel device 906c0
439 08:45:54.495392 CPU: family 06, model 9c, stepping 00
440 08:45:54.498889 Clearing out pending MCEs
441 08:45:54.501978 Setting up local APIC...
442 08:45:54.502080 apic_id: 0x02 done.
443 08:45:54.508268 microcode: Update skipped, already up-to-date
444 08:45:54.508394 CPU #1 initialized
445 08:45:54.515054 bsp_do_flight_plan done after 173 msecs.
446 08:45:54.518461 CPU: frequency set to 2800 MHz
447 08:45:54.518574 Enabling SMIs.
448 08:45:54.525045 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 08:45:54.535662 Probing TPM: done!
450 08:45:54.542235 Connected to device vid:did:rid of 1ae0:0028:00
451 08:45:54.552092 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
452 08:45:54.555897 Initialized TPM device CR50 revision 0
453 08:45:54.558545 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 08:45:54.566141 Found a VBT of 7680 bytes after decompression
455 08:45:54.572115 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 08:45:54.607366 Detected 2 core, 2 thread CPU.
457 08:45:54.610502 Detected 2 core, 2 thread CPU.
458 08:45:54.972429 Display FSP Version Info HOB
459 08:45:54.975443 Reference Code - CPU = 8.7.22.30
460 08:45:54.979311 uCode Version = 24.0.0.1f
461 08:45:54.982568 TXT ACM version = ff.ff.ff.ffff
462 08:45:54.985896 Reference Code - ME = 8.7.22.30
463 08:45:54.989339 MEBx version = 0.0.0.0
464 08:45:54.992170 ME Firmware Version = Consumer SKU
465 08:45:54.995520 Reference Code - PCH = 8.7.22.30
466 08:45:54.999200 PCH-CRID Status = Disabled
467 08:45:55.002676 PCH-CRID Original Value = ff.ff.ff.ffff
468 08:45:55.005459 PCH-CRID New Value = ff.ff.ff.ffff
469 08:45:55.009094 OPROM - RST - RAID = ff.ff.ff.ffff
470 08:45:55.012165 PCH Hsio Version = 4.0.0.0
471 08:45:55.016115 Reference Code - SA - System Agent = 8.7.22.30
472 08:45:55.019036 Reference Code - MRC = 0.0.4.68
473 08:45:55.022926 SA - PCIe Version = 8.7.22.30
474 08:45:55.025308 SA-CRID Status = Disabled
475 08:45:55.028578 SA-CRID Original Value = 0.0.0.0
476 08:45:55.031856 SA-CRID New Value = 0.0.0.0
477 08:45:55.035909 OPROM - VBIOS = ff.ff.ff.ffff
478 08:45:55.039679 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 08:45:55.043304 PHY Build Version = ff.ff.ff.ffff
480 08:45:55.046447 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 08:45:55.053745 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 08:45:55.059484 ITSS IRQ Polarities Before:
483 08:45:55.059604 IPC0: 0xffffffff
484 08:45:55.059735 IPC1: 0xffffffff
485 08:45:55.060982 IPC2: 0xffffffff
486 08:45:55.064561 IPC3: 0xffffffff
487 08:45:55.064648 ITSS IRQ Polarities After:
488 08:45:55.067360 IPC0: 0xffffffff
489 08:45:55.067450 IPC1: 0xffffffff
490 08:45:55.070936 IPC2: 0xffffffff
491 08:45:55.071026 IPC3: 0xffffffff
492 08:45:55.084289 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 08:45:55.090769 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
494 08:45:55.094804 Enumerating buses...
495 08:45:55.097563 Show all devs... Before device enumeration.
496 08:45:55.100925 Root Device: enabled 1
497 08:45:55.101018 CPU_CLUSTER: 0: enabled 1
498 08:45:55.104078 DOMAIN: 0000: enabled 1
499 08:45:55.107697 PCI: 00:00.0: enabled 1
500 08:45:55.110892 PCI: 00:02.0: enabled 1
501 08:45:55.110977 PCI: 00:04.0: enabled 1
502 08:45:55.113864 PCI: 00:05.0: enabled 1
503 08:45:55.117898 PCI: 00:09.0: enabled 0
504 08:45:55.121331 PCI: 00:12.6: enabled 0
505 08:45:55.121419 PCI: 00:14.0: enabled 1
506 08:45:55.123912 PCI: 00:14.1: enabled 0
507 08:45:55.128643 PCI: 00:14.2: enabled 0
508 08:45:55.131120 PCI: 00:14.3: enabled 1
509 08:45:55.131205 PCI: 00:14.5: enabled 1
510 08:45:55.134167 PCI: 00:15.0: enabled 1
511 08:45:55.137239 PCI: 00:15.1: enabled 1
512 08:45:55.140980 PCI: 00:15.2: enabled 1
513 08:45:55.141065 PCI: 00:15.3: enabled 1
514 08:45:55.143781 PCI: 00:16.0: enabled 1
515 08:45:55.147496 PCI: 00:16.1: enabled 0
516 08:45:55.147581 PCI: 00:16.4: enabled 0
517 08:45:55.150361 PCI: 00:16.5: enabled 0
518 08:45:55.153636 PCI: 00:17.0: enabled 0
519 08:45:55.156931 PCI: 00:19.0: enabled 1
520 08:45:55.157016 PCI: 00:19.1: enabled 0
521 08:45:55.161188 PCI: 00:19.2: enabled 1
522 08:45:55.163501 PCI: 00:1a.0: enabled 1
523 08:45:55.166936 PCI: 00:1c.0: enabled 0
524 08:45:55.167021 PCI: 00:1c.1: enabled 0
525 08:45:55.170125 PCI: 00:1c.2: enabled 0
526 08:45:55.173568 PCI: 00:1c.3: enabled 0
527 08:45:55.176789 PCI: 00:1c.4: enabled 0
528 08:45:55.176873 PCI: 00:1c.5: enabled 0
529 08:45:55.179985 PCI: 00:1c.6: enabled 0
530 08:45:55.183960 PCI: 00:1c.7: enabled 1
531 08:45:55.184048 PCI: 00:1e.0: enabled 0
532 08:45:55.186815 PCI: 00:1e.1: enabled 0
533 08:45:55.190153 PCI: 00:1e.2: enabled 1
534 08:45:55.193862 PCI: 00:1e.3: enabled 0
535 08:45:55.193955 PCI: 00:1f.0: enabled 1
536 08:45:55.197791 PCI: 00:1f.1: enabled 1
537 08:45:55.199900 PCI: 00:1f.2: enabled 1
538 08:45:55.203430 PCI: 00:1f.3: enabled 1
539 08:45:55.203526 PCI: 00:1f.4: enabled 0
540 08:45:55.207649 PCI: 00:1f.5: enabled 1
541 08:45:55.210049 PCI: 00:1f.7: enabled 0
542 08:45:55.210139 GENERIC: 0.0: enabled 1
543 08:45:55.213888 GENERIC: 0.0: enabled 1
544 08:45:55.217012 USB0 port 0: enabled 1
545 08:45:55.219965 GENERIC: 0.0: enabled 1
546 08:45:55.220060 I2C: 00:2c: enabled 1
547 08:45:55.223822 I2C: 00:15: enabled 1
548 08:45:55.226368 GENERIC: 0.0: enabled 0
549 08:45:55.226460 I2C: 00:15: enabled 1
550 08:45:55.229948 I2C: 00:10: enabled 0
551 08:45:55.233340 I2C: 00:10: enabled 0
552 08:45:55.233434 I2C: 00:2c: enabled 1
553 08:45:55.236420 I2C: 00:40: enabled 1
554 08:45:55.240026 I2C: 00:10: enabled 1
555 08:45:55.240119 I2C: 00:39: enabled 1
556 08:45:55.242949 I2C: 00:36: enabled 1
557 08:45:55.246256 I2C: 00:10: enabled 0
558 08:45:55.246348 I2C: 00:0c: enabled 1
559 08:45:55.249589 I2C: 00:50: enabled 1
560 08:45:55.253912 I2C: 00:1a: enabled 1
561 08:45:55.256257 I2C: 00:1a: enabled 0
562 08:45:55.256347 I2C: 00:1a: enabled 0
563 08:45:55.259844 I2C: 00:28: enabled 1
564 08:45:55.262655 I2C: 00:29: enabled 1
565 08:45:55.262743 PCI: 00:00.0: enabled 1
566 08:45:55.267366 SPI: 00: enabled 1
567 08:45:55.269468 PNP: 0c09.0: enabled 1
568 08:45:55.269555 GENERIC: 0.0: enabled 0
569 08:45:55.272854 USB2 port 0: enabled 1
570 08:45:55.277116 USB2 port 1: enabled 1
571 08:45:55.277207 USB2 port 2: enabled 1
572 08:45:55.280181 USB2 port 3: enabled 1
573 08:45:55.283266 USB2 port 4: enabled 0
574 08:45:55.286092 USB2 port 5: enabled 1
575 08:45:55.286177 USB2 port 6: enabled 0
576 08:45:55.289476 USB2 port 7: enabled 1
577 08:45:55.292754 USB3 port 0: enabled 1
578 08:45:55.292840 USB3 port 1: enabled 1
579 08:45:55.296037 USB3 port 2: enabled 1
580 08:45:55.299365 USB3 port 3: enabled 1
581 08:45:55.299453 APIC: 00: enabled 1
582 08:45:55.303302 APIC: 02: enabled 1
583 08:45:55.306057 Compare with tree...
584 08:45:55.306146 Root Device: enabled 1
585 08:45:55.309435 CPU_CLUSTER: 0: enabled 1
586 08:45:55.313305 APIC: 00: enabled 1
587 08:45:55.313395 APIC: 02: enabled 1
588 08:45:55.315793 DOMAIN: 0000: enabled 1
589 08:45:55.319203 PCI: 00:00.0: enabled 1
590 08:45:55.322696 PCI: 00:02.0: enabled 1
591 08:45:55.326421 PCI: 00:04.0: enabled 1
592 08:45:55.326512 GENERIC: 0.0: enabled 1
593 08:45:55.329680 PCI: 00:05.0: enabled 1
594 08:45:55.333125 GENERIC: 0.0: enabled 1
595 08:45:55.336210 PCI: 00:09.0: enabled 0
596 08:45:55.338800 PCI: 00:12.6: enabled 0
597 08:45:55.338904 PCI: 00:14.0: enabled 1
598 08:45:55.342742 USB0 port 0: enabled 1
599 08:45:55.345550 USB2 port 0: enabled 1
600 08:45:55.349568 USB2 port 1: enabled 1
601 08:45:55.352334 USB2 port 2: enabled 1
602 08:45:55.355865 USB2 port 3: enabled 1
603 08:45:55.355960 USB2 port 4: enabled 0
604 08:45:55.359240 USB2 port 5: enabled 1
605 08:45:55.362007 USB2 port 6: enabled 0
606 08:45:55.366009 USB2 port 7: enabled 1
607 08:45:55.369550 USB3 port 0: enabled 1
608 08:45:55.369646 USB3 port 1: enabled 1
609 08:45:55.373041 USB3 port 2: enabled 1
610 08:45:55.375166 USB3 port 3: enabled 1
611 08:45:55.378863 PCI: 00:14.1: enabled 0
612 08:45:55.382578 PCI: 00:14.2: enabled 0
613 08:45:55.382677 PCI: 00:14.3: enabled 1
614 08:45:55.385153 GENERIC: 0.0: enabled 1
615 08:45:55.388836 PCI: 00:14.5: enabled 1
616 08:45:55.392017 PCI: 00:15.0: enabled 1
617 08:45:55.395091 I2C: 00:2c: enabled 1
618 08:45:55.395200 I2C: 00:15: enabled 1
619 08:45:55.398839 PCI: 00:15.1: enabled 1
620 08:45:55.401846 PCI: 00:15.2: enabled 1
621 08:45:55.404968 GENERIC: 0.0: enabled 0
622 08:45:55.408640 I2C: 00:15: enabled 1
623 08:45:55.408758 I2C: 00:10: enabled 0
624 08:45:55.411689 I2C: 00:10: enabled 0
625 08:45:55.414877 I2C: 00:2c: enabled 1
626 08:45:55.418713 I2C: 00:40: enabled 1
627 08:45:55.418806 I2C: 00:10: enabled 1
628 08:45:55.421709 I2C: 00:39: enabled 1
629 08:45:55.425088 PCI: 00:15.3: enabled 1
630 08:45:55.428381 I2C: 00:36: enabled 1
631 08:45:55.428489 I2C: 00:10: enabled 0
632 08:45:55.431635 I2C: 00:0c: enabled 1
633 08:45:55.434877 I2C: 00:50: enabled 1
634 08:45:55.438557 PCI: 00:16.0: enabled 1
635 08:45:55.441639 PCI: 00:16.1: enabled 0
636 08:45:55.441741 PCI: 00:16.4: enabled 0
637 08:45:55.445262 PCI: 00:16.5: enabled 0
638 08:45:55.449315 PCI: 00:17.0: enabled 0
639 08:45:55.451593 PCI: 00:19.0: enabled 1
640 08:45:55.454698 I2C: 00:1a: enabled 1
641 08:45:55.454804 I2C: 00:1a: enabled 0
642 08:45:55.457759 I2C: 00:1a: enabled 0
643 08:45:55.461559 I2C: 00:28: enabled 1
644 08:45:55.465153 I2C: 00:29: enabled 1
645 08:45:55.465265 PCI: 00:19.1: enabled 0
646 08:45:55.468228 PCI: 00:19.2: enabled 1
647 08:45:55.471990 PCI: 00:1a.0: enabled 1
648 08:45:55.474595 PCI: 00:1e.0: enabled 0
649 08:45:55.477853 PCI: 00:1e.1: enabled 0
650 08:45:55.477953 PCI: 00:1e.2: enabled 1
651 08:45:55.481685 SPI: 00: enabled 1
652 08:45:55.484961 PCI: 00:1e.3: enabled 0
653 08:45:55.489613 PCI: 00:1f.0: enabled 1
654 08:45:55.489745 PNP: 0c09.0: enabled 1
655 08:45:55.491527 PCI: 00:1f.1: enabled 1
656 08:45:55.494551 PCI: 00:1f.2: enabled 1
657 08:45:55.497965 PCI: 00:1f.3: enabled 1
658 08:45:55.498060 GENERIC: 0.0: enabled 0
659 08:45:55.501560 PCI: 00:1f.4: enabled 0
660 08:45:55.504681 PCI: 00:1f.5: enabled 1
661 08:45:55.508938 PCI: 00:1f.7: enabled 0
662 08:45:55.511565 Root Device scanning...
663 08:45:55.514590 scan_static_bus for Root Device
664 08:45:55.514679 CPU_CLUSTER: 0 enabled
665 08:45:55.517966 DOMAIN: 0000 enabled
666 08:45:55.521397 DOMAIN: 0000 scanning...
667 08:45:55.524623 PCI: pci_scan_bus for bus 00
668 08:45:55.527968 PCI: 00:00.0 [8086/0000] ops
669 08:45:55.532238 PCI: 00:00.0 [8086/4e22] enabled
670 08:45:55.534760 PCI: 00:02.0 [8086/0000] bus ops
671 08:45:55.537630 PCI: 00:02.0 [8086/4e55] enabled
672 08:45:55.541450 PCI: 00:04.0 [8086/0000] bus ops
673 08:45:55.544255 PCI: 00:04.0 [8086/4e03] enabled
674 08:45:55.548276 PCI: 00:05.0 [8086/0000] bus ops
675 08:45:55.551424 PCI: 00:05.0 [8086/4e19] enabled
676 08:45:55.554787 PCI: 00:08.0 [8086/4e11] enabled
677 08:45:55.558011 PCI: 00:14.0 [8086/0000] bus ops
678 08:45:55.560938 PCI: 00:14.0 [8086/4ded] enabled
679 08:45:55.564312 PCI: 00:14.2 [8086/4def] disabled
680 08:45:55.567734 PCI: 00:14.3 [8086/0000] bus ops
681 08:45:55.571594 PCI: 00:14.3 [8086/4df0] enabled
682 08:45:55.571761 PCI: 00:14.5 [8086/0000] ops
683 08:45:55.574603 PCI: 00:14.5 [8086/4df8] enabled
684 08:45:55.577803 PCI: 00:15.0 [8086/0000] bus ops
685 08:45:55.581452 PCI: 00:15.0 [8086/4de8] enabled
686 08:45:55.584239 PCI: 00:15.1 [8086/0000] bus ops
687 08:45:55.587446 PCI: 00:15.1 [8086/4de9] enabled
688 08:45:55.590913 PCI: 00:15.2 [8086/0000] bus ops
689 08:45:55.594304 PCI: 00:15.2 [8086/4dea] enabled
690 08:45:55.597761 PCI: 00:15.3 [8086/0000] bus ops
691 08:45:55.600621 PCI: 00:15.3 [8086/4deb] enabled
692 08:45:55.604188 PCI: 00:16.0 [8086/0000] ops
693 08:45:55.607355 PCI: 00:16.0 [8086/4de0] enabled
694 08:45:55.610729 PCI: 00:19.0 [8086/0000] bus ops
695 08:45:55.614378 PCI: 00:19.0 [8086/4dc5] enabled
696 08:45:55.617196 PCI: 00:19.2 [8086/0000] ops
697 08:45:55.620693 PCI: 00:19.2 [8086/4dc7] enabled
698 08:45:55.624127 PCI: 00:1a.0 [8086/0000] ops
699 08:45:55.627286 PCI: 00:1a.0 [8086/4dc4] enabled
700 08:45:55.630585 PCI: 00:1e.0 [8086/0000] ops
701 08:45:55.634667 PCI: 00:1e.0 [8086/4da8] disabled
702 08:45:55.637403 PCI: 00:1e.2 [8086/0000] bus ops
703 08:45:55.640702 PCI: 00:1e.2 [8086/4daa] enabled
704 08:45:55.643892 PCI: 00:1f.0 [8086/0000] bus ops
705 08:45:55.647519 PCI: 00:1f.0 [8086/4d87] enabled
706 08:45:55.654849 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 08:45:55.654989 RTC Init
708 08:45:55.657550 Set power on after power failure.
709 08:45:55.660768 Disabling Deep S3
710 08:45:55.660878 Disabling Deep S3
711 08:45:55.664107 Disabling Deep S4
712 08:45:55.664209 Disabling Deep S4
713 08:45:55.667452 Disabling Deep S5
714 08:45:55.667579 Disabling Deep S5
715 08:45:55.671120 PCI: 00:1f.2 [0000/0000] hidden
716 08:45:55.674715 PCI: 00:1f.3 [8086/0000] bus ops
717 08:45:55.678067 PCI: 00:1f.3 [8086/4dc8] enabled
718 08:45:55.681640 PCI: 00:1f.5 [8086/0000] bus ops
719 08:45:55.684044 PCI: 00:1f.5 [8086/4da4] enabled
720 08:45:55.687756 PCI: Leftover static devices:
721 08:45:55.690535 PCI: 00:12.6
722 08:45:55.690639 PCI: 00:09.0
723 08:45:55.690706 PCI: 00:14.1
724 08:45:55.694411 PCI: 00:16.1
725 08:45:55.694510 PCI: 00:16.4
726 08:45:55.697328 PCI: 00:16.5
727 08:45:55.697420 PCI: 00:17.0
728 08:45:55.697488 PCI: 00:19.1
729 08:45:55.700670 PCI: 00:1e.1
730 08:45:55.700762 PCI: 00:1e.3
731 08:45:55.704397 PCI: 00:1f.1
732 08:45:55.704491 PCI: 00:1f.4
733 08:45:55.707809 PCI: 00:1f.7
734 08:45:55.707897 PCI: Check your devicetree.cb.
735 08:45:55.710557 PCI: 00:02.0 scanning...
736 08:45:55.714332 scan_generic_bus for PCI: 00:02.0
737 08:45:55.717504 scan_generic_bus for PCI: 00:02.0 done
738 08:45:55.724946 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 08:45:55.725062 PCI: 00:04.0 scanning...
740 08:45:55.728856 scan_generic_bus for PCI: 00:04.0
741 08:45:55.731958 GENERIC: 0.0 enabled
742 08:45:55.738546 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 08:45:55.742348 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 08:45:55.745485 PCI: 00:05.0 scanning...
745 08:45:55.748623 scan_generic_bus for PCI: 00:05.0
746 08:45:55.752041 GENERIC: 0.0 enabled
747 08:45:55.755090 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 08:45:55.761976 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 08:45:55.765028 PCI: 00:14.0 scanning...
750 08:45:55.768566 scan_static_bus for PCI: 00:14.0
751 08:45:55.768684 USB0 port 0 enabled
752 08:45:55.772286 USB0 port 0 scanning...
753 08:45:55.775101 scan_static_bus for USB0 port 0
754 08:45:55.778315 USB2 port 0 enabled
755 08:45:55.778427 USB2 port 1 enabled
756 08:45:55.782015 USB2 port 2 enabled
757 08:45:55.785182 USB2 port 3 enabled
758 08:45:55.785311 USB2 port 4 disabled
759 08:45:55.788308 USB2 port 5 enabled
760 08:45:55.788414 USB2 port 6 disabled
761 08:45:55.791611 USB2 port 7 enabled
762 08:45:55.795426 USB3 port 0 enabled
763 08:45:55.795552 USB3 port 1 enabled
764 08:45:55.798088 USB3 port 2 enabled
765 08:45:55.801905 USB3 port 3 enabled
766 08:45:55.802035 USB2 port 0 scanning...
767 08:45:55.805113 scan_static_bus for USB2 port 0
768 08:45:55.808668 scan_static_bus for USB2 port 0 done
769 08:45:55.814982 scan_bus: bus USB2 port 0 finished in 6 msecs
770 08:45:55.818499 USB2 port 1 scanning...
771 08:45:55.821233 scan_static_bus for USB2 port 1
772 08:45:55.825109 scan_static_bus for USB2 port 1 done
773 08:45:55.828115 scan_bus: bus USB2 port 1 finished in 6 msecs
774 08:45:55.832364 USB2 port 2 scanning...
775 08:45:55.834430 scan_static_bus for USB2 port 2
776 08:45:55.838123 scan_static_bus for USB2 port 2 done
777 08:45:55.841316 scan_bus: bus USB2 port 2 finished in 6 msecs
778 08:45:55.844537 USB2 port 3 scanning...
779 08:45:55.847769 scan_static_bus for USB2 port 3
780 08:45:55.851370 scan_static_bus for USB2 port 3 done
781 08:45:55.857715 scan_bus: bus USB2 port 3 finished in 6 msecs
782 08:45:55.857854 USB2 port 5 scanning...
783 08:45:55.861317 scan_static_bus for USB2 port 5
784 08:45:55.865037 scan_static_bus for USB2 port 5 done
785 08:45:55.870851 scan_bus: bus USB2 port 5 finished in 6 msecs
786 08:45:55.874325 USB2 port 7 scanning...
787 08:45:55.878028 scan_static_bus for USB2 port 7
788 08:45:55.881165 scan_static_bus for USB2 port 7 done
789 08:45:55.884598 scan_bus: bus USB2 port 7 finished in 6 msecs
790 08:45:55.887730 USB3 port 0 scanning...
791 08:45:55.891078 scan_static_bus for USB3 port 0
792 08:45:55.894952 scan_static_bus for USB3 port 0 done
793 08:45:55.897643 scan_bus: bus USB3 port 0 finished in 6 msecs
794 08:45:55.901542 USB3 port 1 scanning...
795 08:45:55.904475 scan_static_bus for USB3 port 1
796 08:45:55.908281 scan_static_bus for USB3 port 1 done
797 08:45:55.911184 scan_bus: bus USB3 port 1 finished in 6 msecs
798 08:45:55.914549 USB3 port 2 scanning...
799 08:45:55.917751 scan_static_bus for USB3 port 2
800 08:45:55.921362 scan_static_bus for USB3 port 2 done
801 08:45:55.928254 scan_bus: bus USB3 port 2 finished in 6 msecs
802 08:45:55.928395 USB3 port 3 scanning...
803 08:45:55.931589 scan_static_bus for USB3 port 3
804 08:45:55.937873 scan_static_bus for USB3 port 3 done
805 08:45:55.940880 scan_bus: bus USB3 port 3 finished in 6 msecs
806 08:45:55.944389 scan_static_bus for USB0 port 0 done
807 08:45:55.948156 scan_bus: bus USB0 port 0 finished in 172 msecs
808 08:45:55.954624 scan_static_bus for PCI: 00:14.0 done
809 08:45:55.957485 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 08:45:55.960716 PCI: 00:14.3 scanning...
811 08:45:55.964485 scan_static_bus for PCI: 00:14.3
812 08:45:55.967426 GENERIC: 0.0 enabled
813 08:45:55.970875 scan_static_bus for PCI: 00:14.3 done
814 08:45:55.974546 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 08:45:55.978106 PCI: 00:15.0 scanning...
816 08:45:55.981354 scan_static_bus for PCI: 00:15.0
817 08:45:55.981438 I2C: 00:2c enabled
818 08:45:55.984701 I2C: 00:15 enabled
819 08:45:55.987416 scan_static_bus for PCI: 00:15.0 done
820 08:45:55.994105 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
821 08:45:55.994190 PCI: 00:15.1 scanning...
822 08:45:55.997415 scan_static_bus for PCI: 00:15.1
823 08:45:56.005166 scan_static_bus for PCI: 00:15.1 done
824 08:45:56.007302 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 08:45:56.011000 PCI: 00:15.2 scanning...
826 08:45:56.015280 scan_static_bus for PCI: 00:15.2
827 08:45:56.015442 GENERIC: 0.0 disabled
828 08:45:56.017800 I2C: 00:15 enabled
829 08:45:56.020883 I2C: 00:10 disabled
830 08:45:56.021043 I2C: 00:10 disabled
831 08:45:56.024117 I2C: 00:2c enabled
832 08:45:56.024277 I2C: 00:40 enabled
833 08:45:56.028134 I2C: 00:10 enabled
834 08:45:56.030667 I2C: 00:39 enabled
835 08:45:56.033832 scan_static_bus for PCI: 00:15.2 done
836 08:45:56.037152 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 08:45:56.041029 PCI: 00:15.3 scanning...
838 08:45:56.043890 scan_static_bus for PCI: 00:15.3
839 08:45:56.047167 I2C: 00:36 enabled
840 08:45:56.047249 I2C: 00:10 disabled
841 08:45:56.050584 I2C: 00:0c enabled
842 08:45:56.050669 I2C: 00:50 enabled
843 08:45:56.057756 scan_static_bus for PCI: 00:15.3 done
844 08:45:56.060945 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 08:45:56.064020 PCI: 00:19.0 scanning...
846 08:45:56.067796 scan_static_bus for PCI: 00:19.0
847 08:45:56.067906 I2C: 00:1a enabled
848 08:45:56.070472 I2C: 00:1a disabled
849 08:45:56.074677 I2C: 00:1a disabled
850 08:45:56.074838 I2C: 00:28 enabled
851 08:45:56.077279 I2C: 00:29 enabled
852 08:45:56.080868 scan_static_bus for PCI: 00:19.0 done
853 08:45:56.084098 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
854 08:45:56.087563 PCI: 00:1e.2 scanning...
855 08:45:56.090739 scan_generic_bus for PCI: 00:1e.2
856 08:45:56.094165 SPI: 00 enabled
857 08:45:56.100500 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 08:45:56.104740 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 08:45:56.106986 PCI: 00:1f.0 scanning...
860 08:45:56.110589 scan_static_bus for PCI: 00:1f.0
861 08:45:56.110828 PNP: 0c09.0 enabled
862 08:45:56.114466 PNP: 0c09.0 scanning...
863 08:45:56.117005 scan_static_bus for PNP: 0c09.0
864 08:45:56.120028 scan_static_bus for PNP: 0c09.0 done
865 08:45:56.127156 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 08:45:56.130924 scan_static_bus for PCI: 00:1f.0 done
867 08:45:56.134591 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 08:45:56.136987 PCI: 00:1f.3 scanning...
869 08:45:56.140259 scan_static_bus for PCI: 00:1f.3
870 08:45:56.143629 GENERIC: 0.0 disabled
871 08:45:56.146755 scan_static_bus for PCI: 00:1f.3 done
872 08:45:56.149829 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 08:45:56.153431 PCI: 00:1f.5 scanning...
874 08:45:56.157072 scan_generic_bus for PCI: 00:1f.5
875 08:45:56.159975 scan_generic_bus for PCI: 00:1f.5 done
876 08:45:56.167374 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 08:45:56.170169 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
878 08:45:56.173296 scan_static_bus for Root Device done
879 08:45:56.179579 scan_bus: bus Root Device finished in 664 msecs
880 08:45:56.180192 done
881 08:45:56.186838 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
882 08:45:56.189399 Chrome EC: UHEPI supported
883 08:45:56.195974 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 08:45:56.202829 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 08:45:56.207283 SPI flash protection: WPSW=0 SRP0=0
886 08:45:56.209633 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 08:45:56.216173 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 08:45:56.219567 found VGA at PCI: 00:02.0
889 08:45:56.222896 Setting up VGA for PCI: 00:02.0
890 08:45:56.226505 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 08:45:56.233376 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 08:45:56.233865 Allocating resources...
893 08:45:56.236103 Reading resources...
894 08:45:56.239828 Root Device read_resources bus 0 link: 0
895 08:45:56.246858 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 08:45:56.249994 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 08:45:56.253496 DOMAIN: 0000 read_resources bus 0 link: 0
898 08:45:56.259779 PCI: 00:04.0 read_resources bus 1 link: 0
899 08:45:56.263222 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 08:45:56.270065 PCI: 00:05.0 read_resources bus 2 link: 0
901 08:45:56.273012 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 08:45:56.276812 PCI: 00:14.0 read_resources bus 0 link: 0
903 08:45:56.283710 USB0 port 0 read_resources bus 0 link: 0
904 08:45:56.290539 USB0 port 0 read_resources bus 0 link: 0 done
905 08:45:56.293128 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 08:45:56.296832 PCI: 00:14.3 read_resources bus 0 link: 0
907 08:45:56.304178 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 08:45:56.359732 PCI: 00:15.0 read_resources bus 0 link: 0
909 08:45:56.360262 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 08:45:56.360607 PCI: 00:15.2 read_resources bus 0 link: 0
911 08:45:56.360927 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 08:45:56.361569 PCI: 00:15.3 read_resources bus 0 link: 0
913 08:45:56.361901 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 08:45:56.362207 PCI: 00:19.0 read_resources bus 0 link: 0
915 08:45:56.362563 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 08:45:56.362871 PCI: 00:1e.2 read_resources bus 3 link: 0
917 08:45:56.363166 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 08:45:56.363451 PCI: 00:1f.0 read_resources bus 0 link: 0
919 08:45:56.367831 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 08:45:56.368266 PCI: 00:1f.3 read_resources bus 0 link: 0
921 08:45:56.370950 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 08:45:56.377719 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 08:45:56.381010 Root Device read_resources bus 0 link: 0 done
924 08:45:56.384228 Done reading resources.
925 08:45:56.390739 Show resources in subtree (Root Device)...After reading.
926 08:45:56.393984 Root Device child on link 0 CPU_CLUSTER: 0
927 08:45:56.397581 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 08:45:56.400520 APIC: 00
929 08:45:56.400975 APIC: 02
930 08:45:56.403928 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 08:45:56.414051 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 08:45:56.424212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 08:45:56.427746 PCI: 00:00.0
934 08:45:56.437703 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 08:45:56.443466 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 08:45:56.453828 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 08:45:56.463439 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 08:45:56.475222 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 08:45:56.483770 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 08:45:56.490262 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 08:45:56.500370 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 08:45:56.510118 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 08:45:56.520828 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 08:45:56.530023 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 08:45:56.537175 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 08:45:56.546611 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 08:45:56.556565 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 08:45:56.566713 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 08:45:56.576594 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 08:45:56.586749 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 08:45:56.593108 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 08:45:56.603692 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 08:45:56.606324 PCI: 00:02.0
954 08:45:56.616424 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 08:45:56.626275 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 08:45:56.633296 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 08:45:56.639792 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 08:45:56.649424 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 08:45:56.650479 GENERIC: 0.0
960 08:45:56.656165 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 08:45:56.666008 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 08:45:56.666524 GENERIC: 0.0
963 08:45:56.669242 PCI: 00:08.0
964 08:45:56.679438 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 08:45:56.682814 PCI: 00:14.0 child on link 0 USB0 port 0
966 08:45:56.692596 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 08:45:56.696368 USB0 port 0 child on link 0 USB2 port 0
968 08:45:56.698920 USB2 port 0
969 08:45:56.699368 USB2 port 1
970 08:45:56.702818 USB2 port 2
971 08:45:56.703252 USB2 port 3
972 08:45:56.705667 USB2 port 4
973 08:45:56.706327 USB2 port 5
974 08:45:56.709303 USB2 port 6
975 08:45:56.712405 USB2 port 7
976 08:45:56.712887 USB3 port 0
977 08:45:56.715802 USB3 port 1
978 08:45:56.716241 USB3 port 2
979 08:45:56.719140 USB3 port 3
980 08:45:56.719576 PCI: 00:14.2
981 08:45:56.725625 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 08:45:56.732359 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 08:45:56.735553 GENERIC: 0.0
984 08:45:56.739090 PCI: 00:14.5
985 08:45:56.749010 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 08:45:56.752375 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 08:45:56.762297 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 08:45:56.762640 I2C: 00:2c
989 08:45:56.765164 I2C: 00:15
990 08:45:56.765551 PCI: 00:15.1
991 08:45:56.774959 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 08:45:56.781645 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 08:45:56.791724 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 08:45:56.792129 GENERIC: 0.0
995 08:45:56.795867 I2C: 00:15
996 08:45:56.796429 I2C: 00:10
997 08:45:56.798044 I2C: 00:10
998 08:45:56.798488 I2C: 00:2c
999 08:45:56.798808 I2C: 00:40
1000 08:45:56.801530 I2C: 00:10
1001 08:45:56.801927 I2C: 00:39
1002 08:45:56.808382 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 08:45:56.818255 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 08:45:56.818543 I2C: 00:36
1005 08:45:56.821575 I2C: 00:10
1006 08:45:56.821949 I2C: 00:0c
1007 08:45:56.825076 I2C: 00:50
1008 08:45:56.825360 PCI: 00:16.0
1009 08:45:56.834809 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 08:45:56.837910 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 08:45:56.847798 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 08:45:56.851157 I2C: 00:1a
1013 08:45:56.851588 I2C: 00:1a
1014 08:45:56.855301 I2C: 00:1a
1015 08:45:56.855784 I2C: 00:28
1016 08:45:56.857880 I2C: 00:29
1017 08:45:56.858323 PCI: 00:19.2
1018 08:45:56.871482 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 08:45:56.880945 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 08:45:56.881585 PCI: 00:1a.0
1021 08:45:56.891431 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 08:45:56.894985 PCI: 00:1e.0
1023 08:45:56.897608 PCI: 00:1e.2 child on link 0 SPI: 00
1024 08:45:56.907682 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 08:45:56.908140 SPI: 00
1026 08:45:56.910983 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 08:45:56.920850 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 08:45:56.925356 PNP: 0c09.0
1029 08:45:56.931203 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 08:45:56.933963 PCI: 00:1f.2
1031 08:45:56.940935 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 08:45:56.950576 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 08:45:56.957461 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 08:45:56.967968 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 08:45:56.977402 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 08:45:56.977877 GENERIC: 0.0
1037 08:45:56.982004 PCI: 00:1f.5
1038 08:45:56.988146 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 08:45:56.995323 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 08:45:57.004867 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 08:45:57.008550 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 08:45:57.018255 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 08:45:57.025043 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 08:45:57.031722 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 08:45:57.034849 DOMAIN: 0000: Resource ranges:
1046 08:45:57.038106 * Base: 1000, Size: 800, Tag: 100
1047 08:45:57.041370 * Base: 1900, Size: e700, Tag: 100
1048 08:45:57.048081 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 08:45:57.055188 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 08:45:57.061331 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 08:45:57.067976 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 08:45:57.078073 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 08:45:57.084517 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 08:45:57.091307 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 08:45:57.097651 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 08:45:57.107773 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 08:45:57.114795 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 08:45:57.121187 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 08:45:57.130827 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 08:45:57.137451 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 08:45:57.144190 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 08:45:57.154186 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 08:45:57.160916 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 08:45:57.167772 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 08:45:57.177082 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 08:45:57.183725 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 08:45:57.191264 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 08:45:57.201152 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 08:45:57.207139 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 08:45:57.213601 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 08:45:57.223512 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 08:45:57.226747 DOMAIN: 0000: Resource ranges:
1073 08:45:57.230205 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 08:45:57.233591 * Base: d0000000, Size: 2b000000, Tag: 200
1075 08:45:57.238190 * Base: fb001000, Size: 2fff000, Tag: 200
1076 08:45:57.243468 * Base: fe010000, Size: 22000, Tag: 200
1077 08:45:57.246936 * Base: fe033000, Size: a4d000, Tag: 200
1078 08:45:57.250179 * Base: fea88000, Size: 2f8000, Tag: 200
1079 08:45:57.253538 * Base: fed88000, Size: 8000, Tag: 200
1080 08:45:57.260064 * Base: fed93000, Size: d000, Tag: 200
1081 08:45:57.263215 * Base: feda2000, Size: 125e000, Tag: 200
1082 08:45:57.267042 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 08:45:57.276354 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 08:45:57.283689 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 08:45:57.289556 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 08:45:57.296794 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 08:45:57.302762 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 08:45:57.309368 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 08:45:57.315913 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 08:45:57.323150 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 08:45:57.326838 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 08:45:57.332967 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 08:45:57.339562 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 08:45:57.346269 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 08:45:57.352880 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 08:45:57.359031 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 08:45:57.366167 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 08:45:57.372326 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 08:45:57.378999 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 08:45:57.385762 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 08:45:57.392917 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 08:45:57.399571 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 08:45:57.409712 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 08:45:57.416474 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 08:45:57.418855 Root Device assign_resources, bus 0 link: 0
1106 08:45:57.422213 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 08:45:57.432558 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 08:45:57.440386 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 08:45:57.449418 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 08:45:57.455950 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 08:45:57.462406 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 08:45:57.466065 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 08:45:57.473326 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 08:45:57.478781 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 08:45:57.482064 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 08:45:57.491985 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 08:45:57.499197 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 08:45:57.502632 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 08:45:57.508931 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 08:45:57.515527 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 08:45:57.522626 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 08:45:57.525569 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 08:45:57.532081 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 08:45:57.542140 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 08:45:57.545541 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 08:45:57.552721 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 08:45:57.559919 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 08:45:57.569049 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 08:45:57.573292 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 08:45:57.576988 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 08:45:57.583396 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 08:45:57.589625 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 08:45:57.593786 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 08:45:57.603070 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 08:45:57.609420 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 08:45:57.613050 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 08:45:57.619596 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 08:45:57.625916 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 08:45:57.635942 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 08:45:57.642883 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 08:45:57.649051 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 08:45:57.652207 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 08:45:57.655950 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 08:45:57.662536 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 08:45:57.665807 LPC: Trying to open IO window from 800 size 1ff
1146 08:45:57.675533 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 08:45:57.682363 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 08:45:57.688853 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 08:45:57.692166 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 08:45:57.698340 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 08:45:57.705548 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 08:45:57.709238 Root Device assign_resources, bus 0 link: 0
1153 08:45:57.711978 Done setting resources.
1154 08:45:57.719071 Show resources in subtree (Root Device)...After assigning values.
1155 08:45:57.721757 Root Device child on link 0 CPU_CLUSTER: 0
1156 08:45:57.728836 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 08:45:57.729268 APIC: 00
1158 08:45:57.729598 APIC: 02
1159 08:45:57.735883 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 08:45:57.742127 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 08:45:57.751530 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 08:45:57.755426 PCI: 00:00.0
1163 08:45:57.764785 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 08:45:57.774615 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 08:45:57.781128 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 08:45:57.790851 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 08:45:57.800737 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 08:45:57.810978 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 08:45:57.820795 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 08:45:57.827868 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 08:45:57.837646 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 08:45:57.847871 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 08:45:57.857469 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 08:45:57.867599 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 08:45:57.877432 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 08:45:57.884263 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 08:45:57.893765 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 08:45:57.904058 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 08:45:57.914455 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 08:45:57.923993 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 08:45:57.930627 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 08:45:57.933647 PCI: 00:02.0
1183 08:45:57.943240 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 08:45:57.953851 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 08:45:57.962973 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 08:45:57.970134 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 08:45:57.980706 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 08:45:57.981218 GENERIC: 0.0
1189 08:45:57.986666 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 08:45:57.996680 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 08:45:57.997102 GENERIC: 0.0
1192 08:45:57.999804 PCI: 00:08.0
1193 08:45:58.009301 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 08:45:58.013169 PCI: 00:14.0 child on link 0 USB0 port 0
1195 08:45:58.023026 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 08:45:58.029390 USB0 port 0 child on link 0 USB2 port 0
1197 08:45:58.029977 USB2 port 0
1198 08:45:58.032601 USB2 port 1
1199 08:45:58.033022 USB2 port 2
1200 08:45:58.036220 USB2 port 3
1201 08:45:58.036660 USB2 port 4
1202 08:45:58.039347 USB2 port 5
1203 08:45:58.039813 USB2 port 6
1204 08:45:58.042518 USB2 port 7
1205 08:45:58.042936 USB3 port 0
1206 08:45:58.045652 USB3 port 1
1207 08:45:58.049426 USB3 port 2
1208 08:45:58.049840 USB3 port 3
1209 08:45:58.052777 PCI: 00:14.2
1210 08:45:58.055624 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 08:45:58.065688 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 08:45:58.069774 GENERIC: 0.0
1213 08:45:58.070292 PCI: 00:14.5
1214 08:45:58.078984 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 08:45:58.082142 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 08:45:58.095397 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 08:45:58.095924 I2C: 00:2c
1218 08:45:58.096263 I2C: 00:15
1219 08:45:58.100009 PCI: 00:15.1
1220 08:45:58.108691 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 08:45:58.112453 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 08:45:58.125643 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 08:45:58.126172 GENERIC: 0.0
1224 08:45:58.128699 I2C: 00:15
1225 08:45:58.129164 I2C: 00:10
1226 08:45:58.129512 I2C: 00:10
1227 08:45:58.132768 I2C: 00:2c
1228 08:45:58.133180 I2C: 00:40
1229 08:45:58.136143 I2C: 00:10
1230 08:45:58.136559 I2C: 00:39
1231 08:45:58.142510 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 08:45:58.151826 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 08:45:58.152252 I2C: 00:36
1234 08:45:58.155746 I2C: 00:10
1235 08:45:58.156163 I2C: 00:0c
1236 08:45:58.158887 I2C: 00:50
1237 08:45:58.159302 PCI: 00:16.0
1238 08:45:58.168709 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 08:45:58.171627 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 08:45:58.185009 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 08:45:58.185520 I2C: 00:1a
1242 08:45:58.188494 I2C: 00:1a
1243 08:45:58.188905 I2C: 00:1a
1244 08:45:58.189233 I2C: 00:28
1245 08:45:58.192125 I2C: 00:29
1246 08:45:58.192605 PCI: 00:19.2
1247 08:45:58.204648 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 08:45:58.214764 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 08:45:58.215189 PCI: 00:1a.0
1250 08:45:58.227958 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 08:45:58.228422 PCI: 00:1e.0
1252 08:45:58.231304 PCI: 00:1e.2 child on link 0 SPI: 00
1253 08:45:58.241445 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 08:45:58.245202 SPI: 00
1255 08:45:58.248236 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 08:45:58.258068 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 08:45:58.258595 PNP: 0c09.0
1258 08:45:58.267519 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 08:45:58.268149 PCI: 00:1f.2
1260 08:45:58.278256 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 08:45:58.288054 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 08:45:58.290816 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 08:45:58.301316 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 08:45:58.314049 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 08:45:58.314574 GENERIC: 0.0
1266 08:45:58.317668 PCI: 00:1f.5
1267 08:45:58.327395 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 08:45:58.328011 Done allocating resources.
1269 08:45:58.333786 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1270 08:45:58.337107 Enabling resources...
1271 08:45:58.340880 PCI: 00:00.0 subsystem <- 8086/4e22
1272 08:45:58.343944 PCI: 00:00.0 cmd <- 06
1273 08:45:58.347152 PCI: 00:02.0 subsystem <- 8086/4e55
1274 08:45:58.350501 PCI: 00:02.0 cmd <- 03
1275 08:45:58.354176 PCI: 00:04.0 subsystem <- 8086/4e03
1276 08:45:58.356973 PCI: 00:04.0 cmd <- 02
1277 08:45:58.360975 PCI: 00:05.0 bridge ctrl <- 0003
1278 08:45:58.364310 PCI: 00:05.0 subsystem <- 8086/4e19
1279 08:45:58.367001 PCI: 00:05.0 cmd <- 02
1280 08:45:58.367440 PCI: 00:08.0 cmd <- 06
1281 08:45:58.370124 PCI: 00:14.0 subsystem <- 8086/4ded
1282 08:45:58.374599 PCI: 00:14.0 cmd <- 02
1283 08:45:58.376849 PCI: 00:14.3 subsystem <- 8086/4df0
1284 08:45:58.380170 PCI: 00:14.3 cmd <- 02
1285 08:45:58.383674 PCI: 00:14.5 subsystem <- 8086/4df8
1286 08:45:58.387275 PCI: 00:14.5 cmd <- 06
1287 08:45:58.390416 PCI: 00:15.0 subsystem <- 8086/4de8
1288 08:45:58.393880 PCI: 00:15.0 cmd <- 02
1289 08:45:58.397538 PCI: 00:15.1 subsystem <- 8086/4de9
1290 08:45:58.400460 PCI: 00:15.1 cmd <- 02
1291 08:45:58.403502 PCI: 00:15.2 subsystem <- 8086/4dea
1292 08:45:58.403967 PCI: 00:15.2 cmd <- 02
1293 08:45:58.410911 PCI: 00:15.3 subsystem <- 8086/4deb
1294 08:45:58.411329 PCI: 00:15.3 cmd <- 02
1295 08:45:58.413533 PCI: 00:16.0 subsystem <- 8086/4de0
1296 08:45:58.417070 PCI: 00:16.0 cmd <- 02
1297 08:45:58.420118 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 08:45:58.423405 PCI: 00:19.0 cmd <- 02
1299 08:45:58.426746 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 08:45:58.429757 PCI: 00:19.2 cmd <- 06
1301 08:45:58.434196 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 08:45:58.436505 PCI: 00:1a.0 cmd <- 06
1303 08:45:58.440523 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 08:45:58.440942 PCI: 00:1e.2 cmd <- 06
1305 08:45:58.446624 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 08:45:58.447173 PCI: 00:1f.0 cmd <- 407
1307 08:45:58.449780 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 08:45:58.453214 PCI: 00:1f.3 cmd <- 02
1309 08:45:58.456539 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 08:45:58.459625 PCI: 00:1f.5 cmd <- 406
1311 08:45:58.464009 done.
1312 08:45:58.467508 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1313 08:45:58.470785 Initializing devices...
1314 08:45:58.474240 Root Device init
1315 08:45:58.474659 mainboard: EC init
1316 08:45:58.480657 Chrome EC: Set SMI mask to 0x0000000000000000
1317 08:45:58.484058 Chrome EC: clear events_b mask to 0x0000000000000000
1318 08:45:58.490660 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 08:45:58.497458 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 08:45:58.504349 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 08:45:58.509244 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 08:45:58.510874 Root Device init finished in 35 msecs
1323 08:45:58.515030 PCI: 00:00.0 init
1324 08:45:58.518613 CPU TDP = 6 Watts
1325 08:45:58.519210 CPU PL1 = 7 Watts
1326 08:45:58.521939 CPU PL2 = 12 Watts
1327 08:45:58.525389 PCI: 00:00.0 init finished in 6 msecs
1328 08:45:58.528085 PCI: 00:02.0 init
1329 08:45:58.531492 GMA: Found VBT in CBFS
1330 08:45:58.531958 GMA: Found valid VBT in CBFS
1331 08:45:58.538261 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 08:45:58.545055 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 08:45:58.551403 PCI: 00:02.0 init finished in 18 msecs
1334 08:45:58.551860 PCI: 00:08.0 init
1335 08:45:58.558398 PCI: 00:08.0 init finished in 0 msecs
1336 08:45:58.558818 PCI: 00:14.0 init
1337 08:45:58.564703 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 08:45:58.567631 PCI: 00:14.0 init finished in 4 msecs
1339 08:45:58.571242 PCI: 00:15.0 init
1340 08:45:58.572000 I2C bus 0 version 0x3230302a
1341 08:45:58.578139 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 08:45:58.581443 PCI: 00:15.0 init finished in 6 msecs
1343 08:45:58.581867 PCI: 00:15.1 init
1344 08:45:58.584148 I2C bus 1 version 0x3230302a
1345 08:45:58.587671 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 08:45:58.590922 PCI: 00:15.1 init finished in 6 msecs
1347 08:45:58.594503 PCI: 00:15.2 init
1348 08:45:58.597603 I2C bus 2 version 0x3230302a
1349 08:45:58.600627 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 08:45:58.603906 PCI: 00:15.2 init finished in 6 msecs
1351 08:45:58.607309 PCI: 00:15.3 init
1352 08:45:58.612317 I2C bus 3 version 0x3230302a
1353 08:45:58.613982 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 08:45:58.618244 PCI: 00:15.3 init finished in 6 msecs
1355 08:45:58.620822 PCI: 00:16.0 init
1356 08:45:58.624396 PCI: 00:16.0 init finished in 0 msecs
1357 08:45:58.624823 PCI: 00:19.0 init
1358 08:45:58.627767 I2C bus 4 version 0x3230302a
1359 08:45:58.630816 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 08:45:58.635974 PCI: 00:19.0 init finished in 6 msecs
1361 08:45:58.637702 PCI: 00:1a.0 init
1362 08:45:58.642294 PCI: 00:1a.0 init finished in 0 msecs
1363 08:45:58.644730 PCI: 00:1f.0 init
1364 08:45:58.647842 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 08:45:58.654927 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 08:45:58.655437 IOAPIC: ID = 0x02
1367 08:45:58.657851 IOAPIC: Dumping registers
1368 08:45:58.660985 reg 0x0000: 0x02000000
1369 08:45:58.661422 reg 0x0001: 0x00770020
1370 08:45:58.665420 reg 0x0002: 0x00000000
1371 08:45:58.667985 PCI: 00:1f.0 init finished in 21 msecs
1372 08:45:58.671209 PCI: 00:1f.2 init
1373 08:45:58.674656 Disabling ACPI via APMC.
1374 08:45:58.678283 APMC done.
1375 08:45:58.681533 PCI: 00:1f.2 init finished in 6 msecs
1376 08:45:58.692869 PNP: 0c09.0 init
1377 08:45:58.696365 Google Chrome EC uptime: 6.498 seconds
1378 08:45:58.702849 Google Chrome AP resets since EC boot: 0
1379 08:45:58.706153 Google Chrome most recent AP reset causes:
1380 08:45:58.713189 Google Chrome EC reset flags at last EC boot: reset-pin
1381 08:45:58.716331 PNP: 0c09.0 init finished in 18 msecs
1382 08:45:58.719101 Devices initialized
1383 08:45:58.719527 Show all devs... After init.
1384 08:45:58.722717 Root Device: enabled 1
1385 08:45:58.725771 CPU_CLUSTER: 0: enabled 1
1386 08:45:58.729148 DOMAIN: 0000: enabled 1
1387 08:45:58.729701 PCI: 00:00.0: enabled 1
1388 08:45:58.732979 PCI: 00:02.0: enabled 1
1389 08:45:58.736014 PCI: 00:04.0: enabled 1
1390 08:45:58.739252 PCI: 00:05.0: enabled 1
1391 08:45:58.739889 PCI: 00:09.0: enabled 0
1392 08:45:58.742453 PCI: 00:12.6: enabled 0
1393 08:45:58.745581 PCI: 00:14.0: enabled 1
1394 08:45:58.749469 PCI: 00:14.1: enabled 0
1395 08:45:58.749894 PCI: 00:14.2: enabled 0
1396 08:45:58.752165 PCI: 00:14.3: enabled 1
1397 08:45:58.755840 PCI: 00:14.5: enabled 1
1398 08:45:58.759122 PCI: 00:15.0: enabled 1
1399 08:45:58.759576 PCI: 00:15.1: enabled 1
1400 08:45:58.762563 PCI: 00:15.2: enabled 1
1401 08:45:58.765664 PCI: 00:15.3: enabled 1
1402 08:45:58.766092 PCI: 00:16.0: enabled 1
1403 08:45:58.768949 PCI: 00:16.1: enabled 0
1404 08:45:58.772179 PCI: 00:16.4: enabled 0
1405 08:45:58.775386 PCI: 00:16.5: enabled 0
1406 08:45:58.775876 PCI: 00:17.0: enabled 0
1407 08:45:58.779052 PCI: 00:19.0: enabled 1
1408 08:45:58.782468 PCI: 00:19.1: enabled 0
1409 08:45:58.785476 PCI: 00:19.2: enabled 1
1410 08:45:58.785901 PCI: 00:1a.0: enabled 1
1411 08:45:58.789201 PCI: 00:1c.0: enabled 0
1412 08:45:58.792245 PCI: 00:1c.1: enabled 0
1413 08:45:58.795443 PCI: 00:1c.2: enabled 0
1414 08:45:58.796130 PCI: 00:1c.3: enabled 0
1415 08:45:58.798700 PCI: 00:1c.4: enabled 0
1416 08:45:58.801995 PCI: 00:1c.5: enabled 0
1417 08:45:58.802658 PCI: 00:1c.6: enabled 0
1418 08:45:58.805779 PCI: 00:1c.7: enabled 1
1419 08:45:58.810271 PCI: 00:1e.0: enabled 0
1420 08:45:58.812380 PCI: 00:1e.1: enabled 0
1421 08:45:58.812959 PCI: 00:1e.2: enabled 1
1422 08:45:58.815501 PCI: 00:1e.3: enabled 0
1423 08:45:58.819700 PCI: 00:1f.0: enabled 1
1424 08:45:58.822449 PCI: 00:1f.1: enabled 0
1425 08:45:58.822870 PCI: 00:1f.2: enabled 1
1426 08:45:58.825196 PCI: 00:1f.3: enabled 1
1427 08:45:58.828498 PCI: 00:1f.4: enabled 0
1428 08:45:58.828917 PCI: 00:1f.5: enabled 1
1429 08:45:58.832062 PCI: 00:1f.7: enabled 0
1430 08:45:58.835465 GENERIC: 0.0: enabled 1
1431 08:45:58.838984 GENERIC: 0.0: enabled 1
1432 08:45:58.839491 USB0 port 0: enabled 1
1433 08:45:58.841810 GENERIC: 0.0: enabled 1
1434 08:45:58.844937 I2C: 00:2c: enabled 1
1435 08:45:58.845372 I2C: 00:15: enabled 1
1436 08:45:58.849429 GENERIC: 0.0: enabled 0
1437 08:45:58.851913 I2C: 00:15: enabled 1
1438 08:45:58.855715 I2C: 00:10: enabled 0
1439 08:45:58.856320 I2C: 00:10: enabled 0
1440 08:45:58.859057 I2C: 00:2c: enabled 1
1441 08:45:58.861546 I2C: 00:40: enabled 1
1442 08:45:58.862165 I2C: 00:10: enabled 1
1443 08:45:58.865145 I2C: 00:39: enabled 1
1444 08:45:58.869164 I2C: 00:36: enabled 1
1445 08:45:58.869673 I2C: 00:10: enabled 0
1446 08:45:58.871465 I2C: 00:0c: enabled 1
1447 08:45:58.875099 I2C: 00:50: enabled 1
1448 08:45:58.875715 I2C: 00:1a: enabled 1
1449 08:45:58.878718 I2C: 00:1a: enabled 0
1450 08:45:58.881856 I2C: 00:1a: enabled 0
1451 08:45:58.882330 I2C: 00:28: enabled 1
1452 08:45:58.884712 I2C: 00:29: enabled 1
1453 08:45:58.888241 PCI: 00:00.0: enabled 1
1454 08:45:58.888877 SPI: 00: enabled 1
1455 08:45:58.891475 PNP: 0c09.0: enabled 1
1456 08:45:58.894759 GENERIC: 0.0: enabled 0
1457 08:45:58.895337 USB2 port 0: enabled 1
1458 08:45:58.898175 USB2 port 1: enabled 1
1459 08:45:58.901267 USB2 port 2: enabled 1
1460 08:45:58.904831 USB2 port 3: enabled 1
1461 08:45:58.905406 USB2 port 4: enabled 0
1462 08:45:58.908797 USB2 port 5: enabled 1
1463 08:45:58.911362 USB2 port 6: enabled 0
1464 08:45:58.911918 USB2 port 7: enabled 1
1465 08:45:58.914524 USB3 port 0: enabled 1
1466 08:45:58.918195 USB3 port 1: enabled 1
1467 08:45:58.918631 USB3 port 2: enabled 1
1468 08:45:58.921790 USB3 port 3: enabled 1
1469 08:45:58.924783 APIC: 00: enabled 1
1470 08:45:58.925312 APIC: 02: enabled 1
1471 08:45:58.927730 PCI: 00:08.0: enabled 1
1472 08:45:58.934848 BS: BS_DEV_INIT run times (exec / console): 24 / 436 ms
1473 08:45:58.937878 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 08:45:58.940963 ELOG: NV offset 0xbfa000 size 0x1000
1475 08:45:58.948944 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 08:45:58.956329 ELOG: Event(17) added with size 13 at 2023-12-11 08:45:58 UTC
1477 08:45:58.962459 ELOG: Event(92) added with size 9 at 2023-12-11 08:45:58 UTC
1478 08:45:58.969434 ELOG: Event(93) added with size 9 at 2023-12-11 08:45:58 UTC
1479 08:45:58.975703 ELOG: Event(9E) added with size 10 at 2023-12-11 08:45:58 UTC
1480 08:45:58.982662 ELOG: Event(9F) added with size 14 at 2023-12-11 08:45:58 UTC
1481 08:45:58.985931 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 08:45:58.993499 ELOG: Event(A1) added with size 10 at 2023-12-11 08:45:58 UTC
1483 08:45:59.002358 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 08:45:59.008868 ELOG: Event(A0) added with size 9 at 2023-12-11 08:45:58 UTC
1485 08:45:59.012187 elog_add_boot_reason: Logged dev mode boot
1486 08:45:59.018970 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 08:45:59.019283 Finalize devices...
1488 08:45:59.022352 Devices finalized
1489 08:45:59.026266 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 08:45:59.033037 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 08:45:59.039693 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 08:45:59.042136 ME: HFSTS1 : 0x80030045
1493 08:45:59.045752 ME: HFSTS2 : 0x30280136
1494 08:45:59.048916 ME: HFSTS3 : 0x00000050
1495 08:45:59.055589 ME: HFSTS4 : 0x00004000
1496 08:45:59.058624 ME: HFSTS5 : 0x00000000
1497 08:45:59.062212 ME: HFSTS6 : 0x40400006
1498 08:45:59.065443 ME: Manufacturing Mode : NO
1499 08:45:59.068397 ME: FW Partition Table : OK
1500 08:45:59.072050 ME: Bringup Loader Failure : NO
1501 08:45:59.075164 ME: Firmware Init Complete : NO
1502 08:45:59.078338 ME: Boot Options Present : NO
1503 08:45:59.081741 ME: Update In Progress : NO
1504 08:45:59.085179 ME: D0i3 Support : YES
1505 08:45:59.088964 ME: Low Power State Enabled : NO
1506 08:45:59.091724 ME: CPU Replaced : YES
1507 08:45:59.095456 ME: CPU Replacement Valid : YES
1508 08:45:59.098333 ME: Current Working State : 5
1509 08:45:59.101964 ME: Current Operation State : 1
1510 08:45:59.105805 ME: Current Operation Mode : 3
1511 08:45:59.108597 ME: Error Code : 0
1512 08:45:59.112086 ME: CPU Debug Disabled : YES
1513 08:45:59.115492 ME: TXT Support : NO
1514 08:45:59.121836 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1515 08:45:59.125197 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 08:45:59.132796 ACPI: Writing ACPI tables at 76b27000.
1517 08:45:59.133092 ACPI: * FACS
1518 08:45:59.135211 ACPI: * DSDT
1519 08:45:59.138518 Ramoops buffer: 0x100000@0x76a26000.
1520 08:45:59.141872 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 08:45:59.149053 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 08:45:59.152078 Google Chrome EC: version:
1523 08:45:59.155600 ro: magolor_1.1.9999-103b6f9
1524 08:45:59.158760 rw: magolor_1.1.9999-103b6f9
1525 08:45:59.159327 running image: 1
1526 08:45:59.166275 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 08:45:59.169332 ACPI: * FADT
1528 08:45:59.169924 SCI is IRQ9
1529 08:45:59.176009 ACPI: added table 1/32, length now 40
1530 08:45:59.176436 ACPI: * SSDT
1531 08:45:59.179225 Found 1 CPU(s) with 2 core(s) each.
1532 08:45:59.182294 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 08:45:59.189251 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 08:45:59.192867 Could not locate 'wifi_sar' in VPD.
1535 08:45:59.195711 Checking CBFS for default SAR values
1536 08:45:59.202077 wifi_sar_defaults.hex has bad len in CBFS
1537 08:45:59.205346 failed from getting SAR limits!
1538 08:45:59.209399 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 08:45:59.216155 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 08:45:59.219361 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 08:45:59.226336 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 08:45:59.228378 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 08:45:59.235202 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 08:45:59.238387 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 08:45:59.244924 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 08:45:59.251423 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 08:45:59.258761 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 08:45:59.261863 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 08:45:59.267889 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 08:45:59.275015 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 08:45:59.277916 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 08:45:59.281205 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 08:45:59.289618 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 08:45:59.292081 PS2K: Passing 101 keymaps to kernel
1555 08:45:59.299283 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 08:45:59.305665 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 08:45:59.308800 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 08:45:59.315619 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 08:45:59.322202 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 08:45:59.325647 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 08:45:59.332238 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 08:45:59.338392 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 08:45:59.341711 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 08:45:59.348961 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 08:45:59.351913 ACPI: added table 2/32, length now 44
1566 08:45:59.355454 ACPI: * MCFG
1567 08:45:59.358410 ACPI: added table 3/32, length now 48
1568 08:45:59.358500 ACPI: * TPM2
1569 08:45:59.361577 TPM2 log created at 0x76a16000
1570 08:45:59.364902 ACPI: added table 4/32, length now 52
1571 08:45:59.368439 ACPI: * MADT
1572 08:45:59.368524 SCI is IRQ9
1573 08:45:59.372246 ACPI: added table 5/32, length now 56
1574 08:45:59.375346 current = 76b2d580
1575 08:45:59.378518 ACPI: * DMAR
1576 08:45:59.381735 ACPI: added table 6/32, length now 60
1577 08:45:59.385370 ACPI: added table 7/32, length now 64
1578 08:45:59.385468 ACPI: * HPET
1579 08:45:59.391810 ACPI: added table 8/32, length now 68
1580 08:45:59.391929 ACPI: done.
1581 08:45:59.395315 ACPI tables: 26304 bytes.
1582 08:45:59.400169 smbios_write_tables: 76a15000
1583 08:45:59.401892 EC returned error result code 3
1584 08:45:59.404772 Couldn't obtain OEM name from CBI
1585 08:45:59.408568 Create SMBIOS type 16
1586 08:45:59.408686 Create SMBIOS type 17
1587 08:45:59.412058 GENERIC: 0.0 (WIFI Device)
1588 08:45:59.414846 SMBIOS tables: 913 bytes.
1589 08:45:59.418750 Writing table forward entry at 0x00000500
1590 08:45:59.425294 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 08:45:59.428818 Writing coreboot table at 0x76b4b000
1592 08:45:59.435787 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 08:45:59.438233 1. 0000000000001000-000000000009ffff: RAM
1594 08:45:59.444910 2. 00000000000a0000-00000000000fffff: RESERVED
1595 08:45:59.448037 3. 0000000000100000-0000000076a14fff: RAM
1596 08:45:59.454949 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 08:45:59.458170 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 08:45:59.465245 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 08:45:59.471244 7. 0000000077000000-000000007fbfffff: RESERVED
1600 08:45:59.475231 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 08:45:59.478023 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 08:45:59.484672 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 08:45:59.487921 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 08:45:59.495606 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 08:45:59.498202 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 08:45:59.504510 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 08:45:59.508559 15. 0000000100000000-00000001803fffff: RAM
1608 08:45:59.511663 Passing 4 GPIOs to payload:
1609 08:45:59.515254 NAME | PORT | POLARITY | VALUE
1610 08:45:59.521794 lid | undefined | high | high
1611 08:45:59.525277 power | undefined | high | low
1612 08:45:59.531406 oprom | undefined | high | low
1613 08:45:59.538245 EC in RW | 0x000000b9 | high | low
1614 08:45:59.544941 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum d574
1615 08:45:59.545077 coreboot table: 1504 bytes.
1616 08:45:59.548033 IMD ROOT 0. 0x76fff000 0x00001000
1617 08:45:59.554270 IMD SMALL 1. 0x76ffe000 0x00001000
1618 08:45:59.559931 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 08:45:59.561722 CONSOLE 3. 0x76c2e000 0x00020000
1620 08:45:59.564702 FMAP 4. 0x76c2d000 0x00000578
1621 08:45:59.567714 TIME STAMP 5. 0x76c2c000 0x00000910
1622 08:45:59.571302 VBOOT WORK 6. 0x76c18000 0x00014000
1623 08:45:59.574266 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 08:45:59.577804 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 08:45:59.584404 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 08:45:59.587408 REFCODE 10. 0x76b67000 0x00040000
1627 08:45:59.591180 SMM BACKUP 11. 0x76b57000 0x00010000
1628 08:45:59.594012 4f444749 12. 0x76b55000 0x00002000
1629 08:45:59.597476 EXT VBT13. 0x76b53000 0x00001c43
1630 08:45:59.601010 COREBOOT 14. 0x76b4b000 0x00008000
1631 08:45:59.604134 ACPI 15. 0x76b27000 0x00024000
1632 08:45:59.607163 ACPI GNVS 16. 0x76b26000 0x00001000
1633 08:45:59.610957 RAMOOPS 17. 0x76a26000 0x00100000
1634 08:45:59.614475 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 08:45:59.620942 SMBIOS 19. 0x76a15000 0x00000800
1636 08:45:59.621051 IMD small region:
1637 08:45:59.624299 IMD ROOT 0. 0x76ffec00 0x00000400
1638 08:45:59.627408 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 08:45:59.633945 VPD 2. 0x76ffeb60 0x0000006c
1640 08:45:59.637562 POWER STATE 3. 0x76ffeb20 0x00000040
1641 08:45:59.641486 ROMSTAGE 4. 0x76ffeb00 0x00000004
1642 08:45:59.644666 MEM INFO 5. 0x76ffe920 0x000001e0
1643 08:45:59.650785 BS: BS_WRITE_TABLES run times (exec / console): 8 / 516 ms
1644 08:45:59.654107 MTRR: Physical address space:
1645 08:45:59.660405 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 08:45:59.667038 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 08:45:59.670536 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 08:45:59.677585 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 08:45:59.684079 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 08:45:59.690641 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 08:45:59.697107 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 08:45:59.700760 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 08:45:59.703639 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 08:45:59.710228 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 08:45:59.713722 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 08:45:59.717068 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 08:45:59.720140 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 08:45:59.726816 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 08:45:59.730221 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 08:45:59.733820 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 08:45:59.736685 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 08:45:59.740627 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 08:45:59.744012 call enable_fixed_mtrr()
1664 08:45:59.747286 CPU physical address size: 39 bits
1665 08:45:59.754047 MTRR: default type WB/UC MTRR counts: 6/5.
1666 08:45:59.757471 MTRR: UC selected as default type.
1667 08:45:59.760850 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 08:45:59.768446 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 08:45:59.774497 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 08:45:59.780495 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 08:45:59.787084 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 08:45:59.787179
1673 08:45:59.790263 MTRR check
1674 08:45:59.790342 Fixed MTRRs : Enabled
1675 08:45:59.793914 Variable MTRRs: Enabled
1676 08:45:59.794002
1677 08:45:59.797482 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 08:45:59.803943 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 08:45:59.807324 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 08:45:59.810827 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 08:45:59.814558 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 08:45:59.817237 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 08:45:59.823807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 08:45:59.826906 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 08:45:59.830354 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 08:45:59.833655 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 08:45:59.840260 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 08:45:59.843384 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 08:45:59.847299 call enable_fixed_mtrr()
1690 08:45:59.852618 Checking cr50 for pending updates
1691 08:45:59.855519 CPU physical address size: 39 bits
1692 08:45:59.858202 Reading cr50 TPM mode
1693 08:45:59.868409 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1694 08:45:59.875760 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 08:45:59.878955 Checking segment from ROM address 0xfff9d5b8
1696 08:45:59.885792 Checking segment from ROM address 0xfff9d5d4
1697 08:45:59.889518 Loading segment from ROM address 0xfff9d5b8
1698 08:45:59.893155 code (compression=0)
1699 08:45:59.899818 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 08:45:59.909415 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 08:45:59.912156 it's not compressed!
1702 08:46:00.036994 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 08:46:00.043014 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 08:46:00.050775 Loading segment from ROM address 0xfff9d5d4
1705 08:46:00.053668 Entry Point 0x30000000
1706 08:46:00.053760 Loaded segments
1707 08:46:00.060762 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1708 08:46:00.076894 Finalizing chipset.
1709 08:46:00.079807 Finalizing SMM.
1710 08:46:00.079888 APMC done.
1711 08:46:00.086299 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 08:46:00.089838 mp_park_aps done after 0 msecs.
1713 08:46:00.093273 Jumping to boot code at 0x30000000(0x76b4b000)
1714 08:46:00.103292 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 08:46:00.103418
1716 08:46:00.103524
1717 08:46:00.103625
1718 08:46:00.106765 Starting depthcharge on Magolor...
1719 08:46:00.106899
1720 08:46:00.107260 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 08:46:00.107374 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 08:46:00.107477 Setting prompt string to ['dedede:']
1723 08:46:00.107579 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 08:46:00.116650 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1725 08:46:00.116785
1726 08:46:00.123452 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1727 08:46:00.123590
1728 08:46:00.126399 fw_config match found: AUDIO_AMP=UNPROVISIONED
1729 08:46:00.126565
1730 08:46:00.129640 Wipe memory regions:
1731 08:46:00.129839
1732 08:46:00.133276 [0x00000000001000, 0x000000000a0000)
1733 08:46:00.133718
1734 08:46:00.136598 [0x00000000100000, 0x00000030000000)
1735 08:46:00.265942
1736 08:46:00.268922 [0x00000031062170, 0x00000076a15000)
1737 08:46:00.437649
1738 08:46:00.440790 [0x00000100000000, 0x00000180400000)
1739 08:46:01.504242
1740 08:46:01.504406 R8152: Initializing
1741 08:46:01.504481
1742 08:46:01.507342 Version 6 (ocp_data = 5c30)
1743 08:46:01.511273
1744 08:46:01.511386 R8152: Done initializing
1745 08:46:01.511485
1746 08:46:01.514060 Adding net device
1747 08:46:01.514140
1748 08:46:01.517484 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1749 08:46:01.521134
1750 08:46:01.521215
1751 08:46:01.521307
1752 08:46:01.521623 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 08:46:01.622025 dedede: tftpboot 192.168.201.1 12243806/tftp-deploy-1rslvo1n/kernel/bzImage 12243806/tftp-deploy-1rslvo1n/kernel/cmdline 12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
1755 08:46:01.622207 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 08:46:01.622316 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1757 08:46:01.626564 tftpboot 192.168.201.1 12243806/tftp-deploy-1rslvo1n/kernel/bzImloy-1rslvo1n/kernel/cmdline 12243806/tftp-deploy-1rslvo1n/ramdisk/ramdisk.cpio.gz
1758 08:46:01.626651
1759 08:46:01.626721 Waiting for link
1760 08:46:01.828443
1761 08:46:01.828635 done.
1762 08:46:01.828709
1763 08:46:01.828774 MAC: 00:24:32:30:79:17
1764 08:46:01.828837
1765 08:46:01.831987 Sending DHCP discover... done.
1766 08:46:01.832072
1767 08:46:01.835433 Waiting for reply... done.
1768 08:46:01.835518
1769 08:46:01.839325 Sending DHCP request... done.
1770 08:46:01.839435
1771 08:46:01.846865 Waiting for reply... done.
1772 08:46:01.846955
1773 08:46:01.847023 My ip is 192.168.201.10
1774 08:46:01.847086
1775 08:46:01.849484 The DHCP server ip is 192.168.201.1
1776 08:46:01.852817
1777 08:46:01.856532 TFTP server IP predefined by user: 192.168.201.1
1778 08:46:01.856618
1779 08:46:01.862976 Bootfile predefined by user: 12243806/tftp-deploy-1rslvo1n/kernel/bzImage
1780 08:46:01.863063
1781 08:46:01.866246 Sending tftp read request... done.
1782 08:46:01.866325
1783 08:46:01.869943 Waiting for the transfer...
1784 08:46:01.872687
1785 08:46:02.467324 00000000 ################################################################
1786 08:46:02.467461
1787 08:46:03.066917 00080000 ################################################################
1788 08:46:03.067052
1789 08:46:03.662008 00100000 ################################################################
1790 08:46:03.662141
1791 08:46:04.256869 00180000 ################################################################
1792 08:46:04.257003
1793 08:46:04.860973 00200000 ################################################################
1794 08:46:04.861105
1795 08:46:05.457342 00280000 ################################################################
1796 08:46:05.457510
1797 08:46:06.031589 00300000 ################################################################
1798 08:46:06.031761
1799 08:46:06.619390 00380000 ################################################################
1800 08:46:06.619564
1801 08:46:07.178801 00400000 ################################################################
1802 08:46:07.178978
1803 08:46:07.734144 00480000 ################################################################
1804 08:46:07.734279
1805 08:46:08.318411 00500000 ################################################################
1806 08:46:08.318571
1807 08:46:08.912838 00580000 ################################################################
1808 08:46:08.912975
1809 08:46:09.506663 00600000 ################################################################
1810 08:46:09.506841
1811 08:46:10.101498 00680000 ################################################################
1812 08:46:10.101724
1813 08:46:10.670765 00700000 ################################################################
1814 08:46:10.670908
1815 08:46:11.217472 00780000 ################################################################
1816 08:46:11.217647
1817 08:46:11.401612 00800000 ####################### done.
1818 08:46:11.401778
1819 08:46:11.404999 The bootfile was 8572816 bytes long.
1820 08:46:11.405105
1821 08:46:11.408319 Sending tftp read request... done.
1822 08:46:11.408413
1823 08:46:11.411661 Waiting for the transfer...
1824 08:46:11.411743
1825 08:46:11.966754 00000000 ################################################################
1826 08:46:11.966933
1827 08:46:12.513695 00080000 ################################################################
1828 08:46:12.513861
1829 08:46:13.061826 00100000 ################################################################
1830 08:46:13.061990
1831 08:46:13.608127 00180000 ################################################################
1832 08:46:13.608274
1833 08:46:14.154038 00200000 ################################################################
1834 08:46:14.154203
1835 08:46:14.691840 00280000 ################################################################
1836 08:46:14.691983
1837 08:46:15.223933 00300000 ################################################################
1838 08:46:15.224069
1839 08:46:15.774181 00380000 ################################################################
1840 08:46:15.774319
1841 08:46:16.328561 00400000 ################################################################
1842 08:46:16.328755
1843 08:46:16.875886 00480000 ################################################################
1844 08:46:16.876044
1845 08:46:17.439804 00500000 ################################################################
1846 08:46:17.440270
1847 08:46:18.140294 00580000 ################################################################
1848 08:46:18.140766
1849 08:46:18.855290 00600000 ################################################################
1850 08:46:18.855970
1851 08:46:19.559232 00680000 ################################################################
1852 08:46:19.560043
1853 08:46:20.210005 00700000 ################################################################
1854 08:46:20.210153
1855 08:46:20.786454 00780000 ################################################################
1856 08:46:20.786592
1857 08:46:21.243996 00800000 #################################################### done.
1858 08:46:21.244146
1859 08:46:21.247203 Sending tftp read request... done.
1860 08:46:21.247282
1861 08:46:21.250992 Waiting for the transfer...
1862 08:46:21.251069
1863 08:46:21.251133 00000000 # done.
1864 08:46:21.251195
1865 08:46:21.260946 Command line loaded dynamically from TFTP file: 12243806/tftp-deploy-1rslvo1n/kernel/cmdline
1866 08:46:21.261025
1867 08:46:21.277120 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1868 08:46:21.277203
1869 08:46:21.280426 ec_init: CrosEC protocol v3 supported (256, 256)
1870 08:46:21.287563
1871 08:46:21.291025 Shutting down all USB controllers.
1872 08:46:21.291099
1873 08:46:21.291162 Removing current net device
1874 08:46:21.291224
1875 08:46:21.294078 Finalizing coreboot
1876 08:46:21.294148
1877 08:46:21.300503 Exiting depthcharge with code 4 at timestamp: 27991314
1878 08:46:21.300577
1879 08:46:21.300638
1880 08:46:21.300698 Starting kernel ...
1881 08:46:21.300758
1882 08:46:21.300817
1883 08:46:21.301180 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
1884 08:46:21.301273 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
1885 08:46:21.301352 Setting prompt string to ['Linux version [0-9]']
1886 08:46:21.301422 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1887 08:46:21.301490 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1889 08:50:47.302307 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
1891 08:50:47.303296 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
1893 08:50:47.304201 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1896 08:50:47.305537 end: 2 depthcharge-action (duration 00:05:00) [common]
1898 08:50:47.306658 Cleaning after the job
1899 08:50:47.307097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/ramdisk
1900 08:50:47.312938 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/kernel
1901 08:50:47.318826 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243806/tftp-deploy-1rslvo1n/modules
1902 08:50:47.321049 start: 5.1 power-off (timeout 00:00:30) [common]
1903 08:50:47.321855 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1904 08:50:47.407018 >> Command sent successfully.
1905 08:50:47.411767 Returned 0 in 0 seconds
1906 08:50:47.512679 end: 5.1 power-off (duration 00:00:00) [common]
1908 08:50:47.514134 start: 5.2 read-feedback (timeout 00:10:00) [common]
1909 08:50:47.515349 Listened to connection for namespace 'common' for up to 1s
1911 08:50:47.516629 Listened to connection for namespace 'common' for up to 1s
1912 08:50:48.515887 Finalising connection for namespace 'common'
1913 08:50:48.516492 Disconnecting from shell: Finalise
1914 08:50:48.516856
1915 08:50:48.617925 end: 5.2 read-feedback (duration 00:00:01) [common]
1916 08:50:48.618506 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243806
1917 08:50:48.672957 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243806
1918 08:50:48.673198 JobError: Your job cannot terminate cleanly.