Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:46:09.276622 lava-dispatcher, installed at version: 2023.10
2 08:46:09.276834 start: 0 validate
3 08:46:09.276974 Start time: 2023-12-11 08:46:09.276966+00:00 (UTC)
4 08:46:09.277091 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:46:09.277222 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 08:46:10.547161 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:46:10.547947 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:46:13.053354 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:46:13.054120 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 08:46:14.062855 validate duration: 4.79
12 08:46:14.063500 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:46:14.063742 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:46:14.063967 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:46:14.064267 Not decompressing ramdisk as can be used compressed.
16 08:46:14.064543 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 08:46:14.064779 saving as /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/ramdisk/rootfs.cpio.gz
18 08:46:14.064954 total size: 8418130 (8 MB)
19 08:46:14.067196 progress 0 % (0 MB)
20 08:46:14.071765 progress 5 % (0 MB)
21 08:46:14.076495 progress 10 % (0 MB)
22 08:46:14.081037 progress 15 % (1 MB)
23 08:46:14.085643 progress 20 % (1 MB)
24 08:46:14.090257 progress 25 % (2 MB)
25 08:46:14.095008 progress 30 % (2 MB)
26 08:46:14.097717 progress 35 % (2 MB)
27 08:46:14.100363 progress 40 % (3 MB)
28 08:46:14.102977 progress 45 % (3 MB)
29 08:46:14.105276 progress 50 % (4 MB)
30 08:46:14.107582 progress 55 % (4 MB)
31 08:46:14.109806 progress 60 % (4 MB)
32 08:46:14.111901 progress 65 % (5 MB)
33 08:46:14.114124 progress 70 % (5 MB)
34 08:46:14.116379 progress 75 % (6 MB)
35 08:46:14.118622 progress 80 % (6 MB)
36 08:46:14.120900 progress 85 % (6 MB)
37 08:46:14.123110 progress 90 % (7 MB)
38 08:46:14.125416 progress 95 % (7 MB)
39 08:46:14.127542 progress 100 % (8 MB)
40 08:46:14.127773 8 MB downloaded in 0.06 s (127.79 MB/s)
41 08:46:14.127933 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:46:14.128176 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:46:14.128263 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:46:14.128345 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:46:14.128469 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 08:46:14.128543 saving as /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/kernel/bzImage
48 08:46:14.128604 total size: 8572816 (8 MB)
49 08:46:14.128663 No compression specified
50 08:46:14.129830 progress 0 % (0 MB)
51 08:46:14.132188 progress 5 % (0 MB)
52 08:46:14.134449 progress 10 % (0 MB)
53 08:46:14.136759 progress 15 % (1 MB)
54 08:46:14.139015 progress 20 % (1 MB)
55 08:46:14.141341 progress 25 % (2 MB)
56 08:46:14.143684 progress 30 % (2 MB)
57 08:46:14.145948 progress 35 % (2 MB)
58 08:46:14.148257 progress 40 % (3 MB)
59 08:46:14.150529 progress 45 % (3 MB)
60 08:46:14.152797 progress 50 % (4 MB)
61 08:46:14.155046 progress 55 % (4 MB)
62 08:46:14.157272 progress 60 % (4 MB)
63 08:46:14.159653 progress 65 % (5 MB)
64 08:46:14.161879 progress 70 % (5 MB)
65 08:46:14.164088 progress 75 % (6 MB)
66 08:46:14.166300 progress 80 % (6 MB)
67 08:46:14.168532 progress 85 % (6 MB)
68 08:46:14.170837 progress 90 % (7 MB)
69 08:46:14.173092 progress 95 % (7 MB)
70 08:46:14.175423 progress 100 % (8 MB)
71 08:46:14.175631 8 MB downloaded in 0.05 s (173.86 MB/s)
72 08:46:14.175775 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:46:14.176002 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:46:14.176090 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:46:14.176174 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:46:14.176307 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 08:46:14.176380 saving as /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/modules/modules.tar
79 08:46:14.176441 total size: 251012 (0 MB)
80 08:46:14.176503 Using unxz to decompress xz
81 08:46:14.180827 progress 13 % (0 MB)
82 08:46:14.181237 progress 26 % (0 MB)
83 08:46:14.181472 progress 39 % (0 MB)
84 08:46:14.183109 progress 52 % (0 MB)
85 08:46:14.185051 progress 65 % (0 MB)
86 08:46:14.186906 progress 78 % (0 MB)
87 08:46:14.188676 progress 91 % (0 MB)
88 08:46:14.190742 progress 100 % (0 MB)
89 08:46:14.196174 0 MB downloaded in 0.02 s (12.14 MB/s)
90 08:46:14.196415 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:46:14.196686 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:46:14.196783 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 08:46:14.196884 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 08:46:14.196970 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:46:14.197055 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 08:46:14.197285 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl
98 08:46:14.197425 makedir: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin
99 08:46:14.197529 makedir: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/tests
100 08:46:14.197627 makedir: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/results
101 08:46:14.197742 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-add-keys
102 08:46:14.197893 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-add-sources
103 08:46:14.198025 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-background-process-start
104 08:46:14.198156 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-background-process-stop
105 08:46:14.198282 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-common-functions
106 08:46:14.198407 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-echo-ipv4
107 08:46:14.198531 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-install-packages
108 08:46:14.198657 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-installed-packages
109 08:46:14.198781 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-os-build
110 08:46:14.198905 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-probe-channel
111 08:46:14.199028 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-probe-ip
112 08:46:14.199151 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-target-ip
113 08:46:14.199274 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-target-mac
114 08:46:14.199442 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-target-storage
115 08:46:14.199571 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-case
116 08:46:14.199697 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-event
117 08:46:14.199821 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-feedback
118 08:46:14.199945 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-raise
119 08:46:14.200071 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-reference
120 08:46:14.200198 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-runner
121 08:46:14.200321 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-set
122 08:46:14.200447 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-test-shell
123 08:46:14.200614 Updating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-install-packages (oe)
124 08:46:14.200763 Updating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/bin/lava-installed-packages (oe)
125 08:46:14.200886 Creating /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/environment
126 08:46:14.200985 LAVA metadata
127 08:46:14.201059 - LAVA_JOB_ID=12243854
128 08:46:14.201125 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:46:14.201228 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 08:46:14.201297 skipped lava-vland-overlay
131 08:46:14.201369 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:46:14.201446 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 08:46:14.201506 skipped lava-multinode-overlay
134 08:46:14.201575 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:46:14.201655 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 08:46:14.201733 Loading test definitions
137 08:46:14.201829 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 08:46:14.201902 Using /lava-12243854 at stage 0
139 08:46:14.202218 uuid=12243854_1.4.2.3.1 testdef=None
140 08:46:14.202309 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:46:14.202395 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 08:46:14.202928 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:46:14.203148 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 08:46:14.203824 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:46:14.204051 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 08:46:14.204745 runner path: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/0/tests/0_dmesg test_uuid 12243854_1.4.2.3.1
149 08:46:14.204902 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:46:14.205131 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 08:46:14.205202 Using /lava-12243854 at stage 1
153 08:46:14.205501 uuid=12243854_1.4.2.3.5 testdef=None
154 08:46:14.205589 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:46:14.205669 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 08:46:14.206147 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:46:14.206364 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 08:46:14.207020 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:46:14.207249 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 08:46:14.207920 runner path: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/1/tests/1_bootrr test_uuid 12243854_1.4.2.3.5
163 08:46:14.208071 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:46:14.208275 Creating lava-test-runner.conf files
166 08:46:14.208337 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/0 for stage 0
167 08:46:14.208425 - 0_dmesg
168 08:46:14.208506 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243854/lava-overlay-d017kdpl/lava-12243854/1 for stage 1
169 08:46:14.208597 - 1_bootrr
170 08:46:14.208690 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:46:14.208774 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 08:46:14.217264 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:46:14.217371 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 08:46:14.217455 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:46:14.217540 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:46:14.217626 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 08:46:14.472802 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:46:14.473198 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 08:46:14.473311 extracting modules file /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243854/extract-overlay-ramdisk-jk48ad2t/ramdisk
180 08:46:14.487103 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:46:14.487240 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 08:46:14.487336 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243854/compress-overlay-4s6egpl5/overlay-1.4.2.4.tar.gz to ramdisk
183 08:46:14.487449 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243854/compress-overlay-4s6egpl5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243854/extract-overlay-ramdisk-jk48ad2t/ramdisk
184 08:46:14.496522 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:46:14.496643 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 08:46:14.496733 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:46:14.496826 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 08:46:14.496908 Building ramdisk /var/lib/lava/dispatcher/tmp/12243854/extract-overlay-ramdisk-jk48ad2t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243854/extract-overlay-ramdisk-jk48ad2t/ramdisk
189 08:46:14.641901 >> 49790 blocks
190 08:46:15.479497 rename /var/lib/lava/dispatcher/tmp/12243854/extract-overlay-ramdisk-jk48ad2t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
191 08:46:15.479941 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:46:15.480064 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 08:46:15.480169 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 08:46:15.480262 No mkimage arch provided, not using FIT.
195 08:46:15.480348 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:46:15.480428 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:46:15.480530 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:46:15.480650 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 08:46:15.480759 No LXC device requested
200 08:46:15.480836 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:46:15.480920 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 08:46:15.481063 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:46:15.481157 Checking files for TFTP limit of 4294967296 bytes.
204 08:46:15.481555 end: 1 tftp-deploy (duration 00:00:01) [common]
205 08:46:15.481666 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:46:15.481756 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:46:15.481869 substitutions:
208 08:46:15.481933 - {DTB}: None
209 08:46:15.481996 - {INITRD}: 12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
210 08:46:15.482054 - {KERNEL}: 12243854/tftp-deploy-jqe1vx4o/kernel/bzImage
211 08:46:15.482109 - {LAVA_MAC}: None
212 08:46:15.482163 - {PRESEED_CONFIG}: None
213 08:46:15.482216 - {PRESEED_LOCAL}: None
214 08:46:15.482269 - {RAMDISK}: 12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
215 08:46:15.482322 - {ROOT_PART}: None
216 08:46:15.482375 - {ROOT}: None
217 08:46:15.482427 - {SERVER_IP}: 192.168.201.1
218 08:46:15.482479 - {TEE}: None
219 08:46:15.482531 Parsed boot commands:
220 08:46:15.482583 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:46:15.482755 Parsed boot commands: tftpboot 192.168.201.1 12243854/tftp-deploy-jqe1vx4o/kernel/bzImage 12243854/tftp-deploy-jqe1vx4o/kernel/cmdline 12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
222 08:46:15.482838 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:46:15.482919 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:46:15.483010 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:46:15.483095 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:46:15.483161 Not connected, no need to disconnect.
227 08:46:15.483232 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:46:15.483312 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:46:15.483407 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-5'
230 08:46:15.487501 Setting prompt string to ['lava-test: # ']
231 08:46:15.487852 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:46:15.487954 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:46:15.488047 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:46:15.488178 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:46:15.488373 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
236 08:46:20.629120 >> Command sent successfully.
237 08:46:20.640350 Returned 0 in 5 seconds
238 08:46:20.741741 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:46:20.743431 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:46:20.744182 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:46:20.744822 Setting prompt string to 'Starting depthcharge on Voema...'
243 08:46:20.745227 Changing prompt to 'Starting depthcharge on Voema...'
244 08:46:20.745591 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 08:46:20.746906 [Enter `^Ec?' for help]
246 08:46:22.335673
247 08:46:22.336411
248 08:46:22.345386 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 08:46:22.348190 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 08:46:22.355317 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 08:46:22.358790 CPU: AES supported, TXT NOT supported, VT supported
252 08:46:22.365324 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 08:46:22.372025 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 08:46:22.374864 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 08:46:22.378417 VBOOT: Loading verstage.
256 08:46:22.382102 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 08:46:22.388510 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 08:46:22.392088 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 08:46:22.402634 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 08:46:22.409199 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 08:46:22.409763
262 08:46:22.410132
263 08:46:22.422512 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 08:46:22.436251 Probing TPM: . done!
265 08:46:22.439467 TPM ready after 0 ms
266 08:46:22.442776 Connected to device vid:did:rid of 1ae0:0028:00
267 08:46:22.453877 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
268 08:46:22.460472 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 08:46:22.463831 Initialized TPM device CR50 revision 0
270 08:46:22.515205 tlcl_send_startup: Startup return code is 0
271 08:46:22.515804 TPM: setup succeeded
272 08:46:22.529821 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 08:46:22.544104 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 08:46:22.557023 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 08:46:22.567079 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 08:46:22.570827 Chrome EC: UHEPI supported
277 08:46:22.574250 Phase 1
278 08:46:22.577367 FMAP: area GBB found @ 1805000 (458752 bytes)
279 08:46:22.584096 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 08:46:22.593628 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 08:46:22.600354 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 08:46:22.606867 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 08:46:22.610339 Recovery requested (1009000e)
284 08:46:22.613988 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 08:46:22.625161 tlcl_extend: response is 0
286 08:46:22.631707 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 08:46:22.641992 tlcl_extend: response is 0
288 08:46:22.648177 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 08:46:22.654693 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 08:46:22.661566 BS: verstage times (exec / console): total (unknown) / 142 ms
291 08:46:22.661993
292 08:46:22.662326
293 08:46:22.674898 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 08:46:22.678221 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 08:46:22.685532 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 08:46:22.688731 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 08:46:22.692350 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 08:46:22.699343 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 08:46:22.702963 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 08:46:22.705805 TCO_STS: 0000 0000
301 08:46:22.709342 GEN_PMCON: d0015038 00002200
302 08:46:22.712522 GBLRST_CAUSE: 00000000 00000000
303 08:46:22.712987 HPR_CAUSE0: 00000000
304 08:46:22.715655 prev_sleep_state 5
305 08:46:22.719172 Boot Count incremented to 25336
306 08:46:22.725914 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 08:46:22.732127 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 08:46:22.738903 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 08:46:22.745526 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 08:46:22.749143 Chrome EC: UHEPI supported
311 08:46:22.755933 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 08:46:22.769242 Probing TPM: done!
313 08:46:22.775782 Connected to device vid:did:rid of 1ae0:0028:00
314 08:46:22.786629 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
315 08:46:22.794330 Initialized TPM device CR50 revision 0
316 08:46:22.803806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 08:46:22.810549 MRC: Hash idx 0x100b comparison successful.
318 08:46:22.813741 MRC cache found, size faa8
319 08:46:22.814287 bootmode is set to: 2
320 08:46:22.817066 SPD index = 0
321 08:46:22.824085 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 08:46:22.827461 SPD: module type is LPDDR4X
323 08:46:22.830404 SPD: module part number is MT53E512M64D4NW-046
324 08:46:22.837066 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 08:46:22.840394 SPD: device width 16 bits, bus width 16 bits
326 08:46:22.847936 SPD: module size is 1024 MB (per channel)
327 08:46:23.278137 CBMEM:
328 08:46:23.282338 IMD: root @ 0x76fff000 254 entries.
329 08:46:23.284848 IMD: root @ 0x76ffec00 62 entries.
330 08:46:23.288363 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 08:46:23.294600 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 08:46:23.298305 External stage cache:
333 08:46:23.301336 IMD: root @ 0x7b3ff000 254 entries.
334 08:46:23.304870 IMD: root @ 0x7b3fec00 62 entries.
335 08:46:23.319860 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 08:46:23.326833 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 08:46:23.333008 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 08:46:23.347744 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 08:46:23.350495 cse_lite: Skip switching to RW in the recovery path
340 08:46:23.354350 8 DIMMs found
341 08:46:23.354918 SMM Memory Map
342 08:46:23.357532 SMRAM : 0x7b000000 0x800000
343 08:46:23.361234 Subregion 0: 0x7b000000 0x200000
344 08:46:23.365034 Subregion 1: 0x7b200000 0x200000
345 08:46:23.368418 Subregion 2: 0x7b400000 0x400000
346 08:46:23.371555 top_of_ram = 0x77000000
347 08:46:23.378365 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 08:46:23.381476 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 08:46:23.388275 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 08:46:23.392021 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 08:46:23.399000 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 08:46:23.405157 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 08:46:23.417143 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 08:46:23.420032 Processing 211 relocs. Offset value of 0x74c0b000
355 08:46:23.430058 BS: romstage times (exec / console): total (unknown) / 277 ms
356 08:46:23.436069
357 08:46:23.436628
358 08:46:23.446118 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 08:46:23.449421 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 08:46:23.459153 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 08:46:23.466155 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 08:46:23.472794 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 08:46:23.479530 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 08:46:23.526290 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 08:46:23.532528 Processing 5008 relocs. Offset value of 0x75d98000
366 08:46:23.536034 BS: postcar times (exec / console): total (unknown) / 59 ms
367 08:46:23.539999
368 08:46:23.540559
369 08:46:23.549164 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 08:46:23.549949 Normal boot
371 08:46:23.552428 FW_CONFIG value is 0x804c02
372 08:46:23.556302 PCI: 00:07.0 disabled by fw_config
373 08:46:23.559975 PCI: 00:07.1 disabled by fw_config
374 08:46:23.563206 PCI: 00:0d.2 disabled by fw_config
375 08:46:23.566808 PCI: 00:1c.7 disabled by fw_config
376 08:46:23.573339 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 08:46:23.580003 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 08:46:23.583217 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 08:46:23.586618 GENERIC: 0.0 disabled by fw_config
380 08:46:23.590325 GENERIC: 1.0 disabled by fw_config
381 08:46:23.596742 fw_config match found: DB_USB=USB3_ACTIVE
382 08:46:23.599872 fw_config match found: DB_USB=USB3_ACTIVE
383 08:46:23.603242 fw_config match found: DB_USB=USB3_ACTIVE
384 08:46:23.606632 fw_config match found: DB_USB=USB3_ACTIVE
385 08:46:23.613184 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 08:46:23.619796 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 08:46:23.626548 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 08:46:23.637234 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 08:46:23.640052 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 08:46:23.642956 microcode: Update skipped, already up-to-date
391 08:46:23.649993 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 08:46:23.679747 Detected 4 core, 8 thread CPU.
393 08:46:23.682696 Setting up SMI for CPU
394 08:46:23.685965 IED base = 0x7b400000
395 08:46:23.686439 IED size = 0x00400000
396 08:46:23.689633 Will perform SMM setup.
397 08:46:23.696224 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 08:46:23.702614 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 08:46:23.709180 Processing 16 relocs. Offset value of 0x00030000
400 08:46:23.712805 Attempting to start 7 APs
401 08:46:23.716166 Waiting for 10ms after sending INIT.
402 08:46:23.731576 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 08:46:23.732009 done.
404 08:46:23.735014 AP: slot 3 apic_id 7.
405 08:46:23.738163 AP: slot 7 apic_id 6.
406 08:46:23.741756 Waiting for 2nd SIPI to complete...done.
407 08:46:23.745246 AP: slot 5 apic_id 4.
408 08:46:23.745676 AP: slot 4 apic_id 5.
409 08:46:23.748068 AP: slot 6 apic_id 2.
410 08:46:23.752051 AP: slot 2 apic_id 3.
411 08:46:23.758750 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 08:46:23.764947 Processing 13 relocs. Offset value of 0x00038000
413 08:46:23.765472 Unable to locate Global NVS
414 08:46:23.775119 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 08:46:23.777912 Installing permanent SMM handler to 0x7b000000
416 08:46:23.788059 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 08:46:23.791531 Processing 794 relocs. Offset value of 0x7b010000
418 08:46:23.798747 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 08:46:23.804861 Processing 13 relocs. Offset value of 0x7b008000
420 08:46:23.812000 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 08:46:23.818329 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 08:46:23.821536 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 08:46:23.827930 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 08:46:23.834509 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 08:46:23.841403 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 08:46:23.848309 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 08:46:23.848842 Unable to locate Global NVS
428 08:46:23.855224 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 08:46:23.859716 Clearing SMI status registers
430 08:46:23.862858 SMI_STS: PM1
431 08:46:23.863466 PM1_STS: PWRBTN
432 08:46:23.873047 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 08:46:23.873612 In relocation handler: CPU 0
434 08:46:23.879445 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 08:46:23.882683 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 08:46:23.886205 Relocation complete.
437 08:46:23.893620 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 08:46:23.895995 In relocation handler: CPU 1
439 08:46:23.899933 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 08:46:23.902812 Relocation complete.
441 08:46:23.910036 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 08:46:23.913124 In relocation handler: CPU 6
443 08:46:23.916445 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 08:46:23.919466 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 08:46:23.922908 Relocation complete.
446 08:46:23.929859 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 08:46:23.933075 In relocation handler: CPU 2
448 08:46:23.936260 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 08:46:23.939590 Relocation complete.
450 08:46:23.946546 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 08:46:23.949506 In relocation handler: CPU 5
452 08:46:23.953154 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 08:46:23.960318 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 08:46:23.960912 Relocation complete.
455 08:46:23.970095 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 08:46:23.972891 In relocation handler: CPU 4
457 08:46:23.976220 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 08:46:23.976782 Relocation complete.
459 08:46:23.986570 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
460 08:46:23.989257 In relocation handler: CPU 3
461 08:46:23.992553 New SMBASE=0x7afff400 IEDBASE=0x7b400000
462 08:46:23.993028 Relocation complete.
463 08:46:24.003106 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
464 08:46:24.006477 In relocation handler: CPU 7
465 08:46:24.009386 New SMBASE=0x7affe400 IEDBASE=0x7b400000
466 08:46:24.012716 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 08:46:24.015730 Relocation complete.
468 08:46:24.016157 Initializing CPU #0
469 08:46:24.019212 CPU: vendor Intel device 806c1
470 08:46:24.026412 CPU: family 06, model 8c, stepping 01
471 08:46:24.026932 Clearing out pending MCEs
472 08:46:24.030443 Setting up local APIC...
473 08:46:24.034640 apic_id: 0x00 done.
474 08:46:24.035190 Turbo is available but hidden
475 08:46:24.037297 Turbo is available and visible
476 08:46:24.044162 microcode: Update skipped, already up-to-date
477 08:46:24.044685 CPU #0 initialized
478 08:46:24.047350 Initializing CPU #4
479 08:46:24.050722 Initializing CPU #5
480 08:46:24.054314 CPU: vendor Intel device 806c1
481 08:46:24.057636 CPU: family 06, model 8c, stepping 01
482 08:46:24.060828 CPU: vendor Intel device 806c1
483 08:46:24.063644 CPU: family 06, model 8c, stepping 01
484 08:46:24.067266 Clearing out pending MCEs
485 08:46:24.067787 Clearing out pending MCEs
486 08:46:24.071103 Setting up local APIC...
487 08:46:24.074197 Initializing CPU #1
488 08:46:24.074761 Initializing CPU #7
489 08:46:24.077572 Initializing CPU #3
490 08:46:24.080767 CPU: vendor Intel device 806c1
491 08:46:24.083741 CPU: family 06, model 8c, stepping 01
492 08:46:24.087477 Initializing CPU #6
493 08:46:24.087951 Initializing CPU #2
494 08:46:24.090792 CPU: vendor Intel device 806c1
495 08:46:24.094250 CPU: family 06, model 8c, stepping 01
496 08:46:24.097646 CPU: vendor Intel device 806c1
497 08:46:24.100424 CPU: family 06, model 8c, stepping 01
498 08:46:24.103947 Clearing out pending MCEs
499 08:46:24.107475 apic_id: 0x05 done.
500 08:46:24.110831 Setting up local APIC...
501 08:46:24.113941 CPU: vendor Intel device 806c1
502 08:46:24.118148 CPU: family 06, model 8c, stepping 01
503 08:46:24.118714 Clearing out pending MCEs
504 08:46:24.120625 Clearing out pending MCEs
505 08:46:24.124060 Setting up local APIC...
506 08:46:24.127676 apic_id: 0x04 done.
507 08:46:24.130910 microcode: Update skipped, already up-to-date
508 08:46:24.134389 CPU: vendor Intel device 806c1
509 08:46:24.137371 CPU: family 06, model 8c, stepping 01
510 08:46:24.141583 apic_id: 0x06 done.
511 08:46:24.143724 Setting up local APIC...
512 08:46:24.147584 microcode: Update skipped, already up-to-date
513 08:46:24.148103 CPU #4 initialized
514 08:46:24.151301 CPU #5 initialized
515 08:46:24.154656 Setting up local APIC...
516 08:46:24.157922 microcode: Update skipped, already up-to-date
517 08:46:24.161272 apic_id: 0x07 done.
518 08:46:24.161855 CPU #7 initialized
519 08:46:24.167504 microcode: Update skipped, already up-to-date
520 08:46:24.168072 apic_id: 0x02 done.
521 08:46:24.170752 Clearing out pending MCEs
522 08:46:24.177461 microcode: Update skipped, already up-to-date
523 08:46:24.178017 Setting up local APIC...
524 08:46:24.180496 CPU #6 initialized
525 08:46:24.184358 apic_id: 0x03 done.
526 08:46:24.184923 Clearing out pending MCEs
527 08:46:24.191112 microcode: Update skipped, already up-to-date
528 08:46:24.191709 CPU #3 initialized
529 08:46:24.194410 Setting up local APIC...
530 08:46:24.197976 CPU #2 initialized
531 08:46:24.198546 apic_id: 0x01 done.
532 08:46:24.204253 microcode: Update skipped, already up-to-date
533 08:46:24.204876 CPU #1 initialized
534 08:46:24.211052 bsp_do_flight_plan done after 464 msecs.
535 08:46:24.213788 CPU: frequency set to 4000 MHz
536 08:46:24.214256 Enabling SMIs.
537 08:46:24.220764 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 08:46:24.236937 SATAXPCIE1 indicates PCIe NVMe is present
539 08:46:24.240040 Probing TPM: done!
540 08:46:24.243855 Connected to device vid:did:rid of 1ae0:0028:00
541 08:46:24.254622 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
542 08:46:24.257814 Initialized TPM device CR50 revision 0
543 08:46:24.260947 Enabling S0i3.4
544 08:46:24.267457 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 08:46:24.270731 Found a VBT of 8704 bytes after decompression
546 08:46:24.277629 cse_lite: CSE RO boot. HybridStorageMode disabled
547 08:46:24.283856 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 08:46:24.359132 FSPS returned 0
549 08:46:24.362649 Executing Phase 1 of FspMultiPhaseSiInit
550 08:46:24.372220 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 08:46:24.376089 port C0 DISC req: usage 1 usb3 1 usb2 5
552 08:46:24.379075 Raw Buffer output 0 00000511
553 08:46:24.382708 Raw Buffer output 1 00000000
554 08:46:24.386399 pmc_send_ipc_cmd succeeded
555 08:46:24.393242 port C1 DISC req: usage 1 usb3 2 usb2 3
556 08:46:24.393813 Raw Buffer output 0 00000321
557 08:46:24.395917 Raw Buffer output 1 00000000
558 08:46:24.400432 pmc_send_ipc_cmd succeeded
559 08:46:24.405158 Detected 4 core, 8 thread CPU.
560 08:46:24.408891 Detected 4 core, 8 thread CPU.
561 08:46:24.643069 Display FSP Version Info HOB
562 08:46:24.646413 Reference Code - CPU = a.0.4c.31
563 08:46:24.649596 uCode Version = 0.0.0.86
564 08:46:24.652677 TXT ACM version = ff.ff.ff.ffff
565 08:46:24.656622 Reference Code - ME = a.0.4c.31
566 08:46:24.659819 MEBx version = 0.0.0.0
567 08:46:24.663098 ME Firmware Version = Consumer SKU
568 08:46:24.666119 Reference Code - PCH = a.0.4c.31
569 08:46:24.669423 PCH-CRID Status = Disabled
570 08:46:24.672894 PCH-CRID Original Value = ff.ff.ff.ffff
571 08:46:24.676147 PCH-CRID New Value = ff.ff.ff.ffff
572 08:46:24.679448 OPROM - RST - RAID = ff.ff.ff.ffff
573 08:46:24.682768 PCH Hsio Version = 4.0.0.0
574 08:46:24.686132 Reference Code - SA - System Agent = a.0.4c.31
575 08:46:24.689860 Reference Code - MRC = 2.0.0.1
576 08:46:24.692731 SA - PCIe Version = a.0.4c.31
577 08:46:24.696270 SA-CRID Status = Disabled
578 08:46:24.699695 SA-CRID Original Value = 0.0.0.1
579 08:46:24.703174 SA-CRID New Value = 0.0.0.1
580 08:46:24.706148 OPROM - VBIOS = ff.ff.ff.ffff
581 08:46:24.709529 IO Manageability Engine FW Version = 11.1.4.0
582 08:46:24.712706 PHY Build Version = 0.0.0.e0
583 08:46:24.716256 Thunderbolt(TM) FW Version = 0.0.0.0
584 08:46:24.722505 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 08:46:24.725947 ITSS IRQ Polarities Before:
586 08:46:24.726413 IPC0: 0xffffffff
587 08:46:24.729838 IPC1: 0xffffffff
588 08:46:24.730405 IPC2: 0xffffffff
589 08:46:24.732889 IPC3: 0xffffffff
590 08:46:24.736098 ITSS IRQ Polarities After:
591 08:46:24.736563 IPC0: 0xffffffff
592 08:46:24.739271 IPC1: 0xffffffff
593 08:46:24.739778 IPC2: 0xffffffff
594 08:46:24.743093 IPC3: 0xffffffff
595 08:46:24.746018 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 08:46:24.759315 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 08:46:24.769583 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 08:46:24.782886 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 08:46:24.789609 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 08:46:24.790139 Enumerating buses...
601 08:46:24.795947 Show all devs... Before device enumeration.
602 08:46:24.796526 Root Device: enabled 1
603 08:46:24.799710 DOMAIN: 0000: enabled 1
604 08:46:24.803153 CPU_CLUSTER: 0: enabled 1
605 08:46:24.805828 PCI: 00:00.0: enabled 1
606 08:46:24.806246 PCI: 00:02.0: enabled 1
607 08:46:24.809349 PCI: 00:04.0: enabled 1
608 08:46:24.813049 PCI: 00:05.0: enabled 1
609 08:46:24.816113 PCI: 00:06.0: enabled 0
610 08:46:24.816534 PCI: 00:07.0: enabled 0
611 08:46:24.819124 PCI: 00:07.1: enabled 0
612 08:46:24.822733 PCI: 00:07.2: enabled 0
613 08:46:24.825835 PCI: 00:07.3: enabled 0
614 08:46:24.826255 PCI: 00:08.0: enabled 1
615 08:46:24.829420 PCI: 00:09.0: enabled 0
616 08:46:24.832636 PCI: 00:0a.0: enabled 0
617 08:46:24.833163 PCI: 00:0d.0: enabled 1
618 08:46:24.836205 PCI: 00:0d.1: enabled 0
619 08:46:24.839894 PCI: 00:0d.2: enabled 0
620 08:46:24.842457 PCI: 00:0d.3: enabled 0
621 08:46:24.842898 PCI: 00:0e.0: enabled 0
622 08:46:24.846298 PCI: 00:10.2: enabled 1
623 08:46:24.849290 PCI: 00:10.6: enabled 0
624 08:46:24.852882 PCI: 00:10.7: enabled 0
625 08:46:24.853301 PCI: 00:12.0: enabled 0
626 08:46:24.856062 PCI: 00:12.6: enabled 0
627 08:46:24.859303 PCI: 00:13.0: enabled 0
628 08:46:24.862423 PCI: 00:14.0: enabled 1
629 08:46:24.862947 PCI: 00:14.1: enabled 0
630 08:46:24.866081 PCI: 00:14.2: enabled 1
631 08:46:24.869110 PCI: 00:14.3: enabled 1
632 08:46:24.872539 PCI: 00:15.0: enabled 1
633 08:46:24.873067 PCI: 00:15.1: enabled 1
634 08:46:24.876060 PCI: 00:15.2: enabled 1
635 08:46:24.879134 PCI: 00:15.3: enabled 1
636 08:46:24.879693 PCI: 00:16.0: enabled 1
637 08:46:24.883206 PCI: 00:16.1: enabled 0
638 08:46:24.885990 PCI: 00:16.2: enabled 0
639 08:46:24.889120 PCI: 00:16.3: enabled 0
640 08:46:24.889639 PCI: 00:16.4: enabled 0
641 08:46:24.892295 PCI: 00:16.5: enabled 0
642 08:46:24.895782 PCI: 00:17.0: enabled 1
643 08:46:24.898905 PCI: 00:19.0: enabled 0
644 08:46:24.899331 PCI: 00:19.1: enabled 1
645 08:46:24.902700 PCI: 00:19.2: enabled 0
646 08:46:24.905472 PCI: 00:1c.0: enabled 1
647 08:46:24.909295 PCI: 00:1c.1: enabled 0
648 08:46:24.909718 PCI: 00:1c.2: enabled 0
649 08:46:24.912296 PCI: 00:1c.3: enabled 0
650 08:46:24.915891 PCI: 00:1c.4: enabled 0
651 08:46:24.916421 PCI: 00:1c.5: enabled 0
652 08:46:24.918905 PCI: 00:1c.6: enabled 1
653 08:46:24.922079 PCI: 00:1c.7: enabled 0
654 08:46:24.925847 PCI: 00:1d.0: enabled 1
655 08:46:24.926271 PCI: 00:1d.1: enabled 0
656 08:46:24.928860 PCI: 00:1d.2: enabled 1
657 08:46:24.932214 PCI: 00:1d.3: enabled 0
658 08:46:24.935760 PCI: 00:1e.0: enabled 1
659 08:46:24.936181 PCI: 00:1e.1: enabled 0
660 08:46:24.939171 PCI: 00:1e.2: enabled 1
661 08:46:24.942775 PCI: 00:1e.3: enabled 1
662 08:46:24.945564 PCI: 00:1f.0: enabled 1
663 08:46:24.946091 PCI: 00:1f.1: enabled 0
664 08:46:24.948784 PCI: 00:1f.2: enabled 1
665 08:46:24.952277 PCI: 00:1f.3: enabled 1
666 08:46:24.955666 PCI: 00:1f.4: enabled 0
667 08:46:24.956091 PCI: 00:1f.5: enabled 1
668 08:46:24.958991 PCI: 00:1f.6: enabled 0
669 08:46:24.962374 PCI: 00:1f.7: enabled 0
670 08:46:24.962898 APIC: 00: enabled 1
671 08:46:24.965645 GENERIC: 0.0: enabled 1
672 08:46:24.968906 GENERIC: 0.0: enabled 1
673 08:46:24.972388 GENERIC: 1.0: enabled 1
674 08:46:24.972913 GENERIC: 0.0: enabled 1
675 08:46:24.975522 GENERIC: 1.0: enabled 1
676 08:46:24.979176 USB0 port 0: enabled 1
677 08:46:24.979749 GENERIC: 0.0: enabled 1
678 08:46:24.982330 USB0 port 0: enabled 1
679 08:46:24.985719 GENERIC: 0.0: enabled 1
680 08:46:24.988824 I2C: 00:1a: enabled 1
681 08:46:24.989343 I2C: 00:31: enabled 1
682 08:46:24.992407 I2C: 00:32: enabled 1
683 08:46:24.995352 I2C: 00:10: enabled 1
684 08:46:24.995809 I2C: 00:15: enabled 1
685 08:46:24.999066 GENERIC: 0.0: enabled 0
686 08:46:25.002544 GENERIC: 1.0: enabled 0
687 08:46:25.003177 GENERIC: 0.0: enabled 1
688 08:46:25.005736 SPI: 00: enabled 1
689 08:46:25.008732 SPI: 00: enabled 1
690 08:46:25.009149 PNP: 0c09.0: enabled 1
691 08:46:25.012915 GENERIC: 0.0: enabled 1
692 08:46:25.016307 USB3 port 0: enabled 1
693 08:46:25.016830 USB3 port 1: enabled 1
694 08:46:25.018960 USB3 port 2: enabled 0
695 08:46:25.022465 USB3 port 3: enabled 0
696 08:46:25.025434 USB2 port 0: enabled 0
697 08:46:25.025912 USB2 port 1: enabled 1
698 08:46:25.028745 USB2 port 2: enabled 1
699 08:46:25.031889 USB2 port 3: enabled 0
700 08:46:25.032360 USB2 port 4: enabled 1
701 08:46:25.035484 USB2 port 5: enabled 0
702 08:46:25.039048 USB2 port 6: enabled 0
703 08:46:25.042581 USB2 port 7: enabled 0
704 08:46:25.043139 USB2 port 8: enabled 0
705 08:46:25.045598 USB2 port 9: enabled 0
706 08:46:25.049137 USB3 port 0: enabled 0
707 08:46:25.049774 USB3 port 1: enabled 1
708 08:46:25.051903 USB3 port 2: enabled 0
709 08:46:25.056047 USB3 port 3: enabled 0
710 08:46:25.056612 GENERIC: 0.0: enabled 1
711 08:46:25.058872 GENERIC: 1.0: enabled 1
712 08:46:25.062211 APIC: 01: enabled 1
713 08:46:25.062774 APIC: 03: enabled 1
714 08:46:25.065783 APIC: 07: enabled 1
715 08:46:25.069296 APIC: 05: enabled 1
716 08:46:25.069858 APIC: 04: enabled 1
717 08:46:25.072104 APIC: 02: enabled 1
718 08:46:25.075844 APIC: 06: enabled 1
719 08:46:25.076403 Compare with tree...
720 08:46:25.078747 Root Device: enabled 1
721 08:46:25.082012 DOMAIN: 0000: enabled 1
722 08:46:25.082572 PCI: 00:00.0: enabled 1
723 08:46:25.085750 PCI: 00:02.0: enabled 1
724 08:46:25.089467 PCI: 00:04.0: enabled 1
725 08:46:25.092109 GENERIC: 0.0: enabled 1
726 08:46:25.095796 PCI: 00:05.0: enabled 1
727 08:46:25.096360 PCI: 00:06.0: enabled 0
728 08:46:25.099210 PCI: 00:07.0: enabled 0
729 08:46:25.102427 GENERIC: 0.0: enabled 1
730 08:46:25.105317 PCI: 00:07.1: enabled 0
731 08:46:25.108871 GENERIC: 1.0: enabled 1
732 08:46:25.109362 PCI: 00:07.2: enabled 0
733 08:46:25.112458 GENERIC: 0.0: enabled 1
734 08:46:25.115887 PCI: 00:07.3: enabled 0
735 08:46:25.119166 GENERIC: 1.0: enabled 1
736 08:46:25.122359 PCI: 00:08.0: enabled 1
737 08:46:25.122890 PCI: 00:09.0: enabled 0
738 08:46:25.126149 PCI: 00:0a.0: enabled 0
739 08:46:25.128581 PCI: 00:0d.0: enabled 1
740 08:46:25.131886 USB0 port 0: enabled 1
741 08:46:25.135871 USB3 port 0: enabled 1
742 08:46:25.136406 USB3 port 1: enabled 1
743 08:46:25.138772 USB3 port 2: enabled 0
744 08:46:25.142362 USB3 port 3: enabled 0
745 08:46:25.145614 PCI: 00:0d.1: enabled 0
746 08:46:25.148686 PCI: 00:0d.2: enabled 0
747 08:46:25.149118 GENERIC: 0.0: enabled 1
748 08:46:25.152215 PCI: 00:0d.3: enabled 0
749 08:46:25.155534 PCI: 00:0e.0: enabled 0
750 08:46:25.159221 PCI: 00:10.2: enabled 1
751 08:46:25.162786 PCI: 00:10.6: enabled 0
752 08:46:25.165904 PCI: 00:10.7: enabled 0
753 08:46:25.166466 PCI: 00:12.0: enabled 0
754 08:46:25.168745 PCI: 00:12.6: enabled 0
755 08:46:25.172011 PCI: 00:13.0: enabled 0
756 08:46:25.175310 PCI: 00:14.0: enabled 1
757 08:46:25.175918 USB0 port 0: enabled 1
758 08:46:25.178710 USB2 port 0: enabled 0
759 08:46:25.181914 USB2 port 1: enabled 1
760 08:46:25.185443 USB2 port 2: enabled 1
761 08:46:25.188900 USB2 port 3: enabled 0
762 08:46:25.192161 USB2 port 4: enabled 1
763 08:46:25.192735 USB2 port 5: enabled 0
764 08:46:25.195588 USB2 port 6: enabled 0
765 08:46:25.198959 USB2 port 7: enabled 0
766 08:46:25.202132 USB2 port 8: enabled 0
767 08:46:25.205251 USB2 port 9: enabled 0
768 08:46:25.208520 USB3 port 0: enabled 0
769 08:46:25.209011 USB3 port 1: enabled 1
770 08:46:25.212276 USB3 port 2: enabled 0
771 08:46:25.215338 USB3 port 3: enabled 0
772 08:46:25.218464 PCI: 00:14.1: enabled 0
773 08:46:25.222086 PCI: 00:14.2: enabled 1
774 08:46:25.222639 PCI: 00:14.3: enabled 1
775 08:46:25.225738 GENERIC: 0.0: enabled 1
776 08:46:25.228398 PCI: 00:15.0: enabled 1
777 08:46:25.231546 I2C: 00:1a: enabled 1
778 08:46:25.235280 I2C: 00:31: enabled 1
779 08:46:25.235817 I2C: 00:32: enabled 1
780 08:46:25.238466 PCI: 00:15.1: enabled 1
781 08:46:25.241527 I2C: 00:10: enabled 1
782 08:46:25.245099 PCI: 00:15.2: enabled 1
783 08:46:25.245568 PCI: 00:15.3: enabled 1
784 08:46:25.248398 PCI: 00:16.0: enabled 1
785 08:46:25.251923 PCI: 00:16.1: enabled 0
786 08:46:25.254662 PCI: 00:16.2: enabled 0
787 08:46:25.258387 PCI: 00:16.3: enabled 0
788 08:46:25.258904 PCI: 00:16.4: enabled 0
789 08:46:25.261736 PCI: 00:16.5: enabled 0
790 08:46:25.265236 PCI: 00:17.0: enabled 1
791 08:46:25.267997 PCI: 00:19.0: enabled 0
792 08:46:25.271852 PCI: 00:19.1: enabled 1
793 08:46:25.272375 I2C: 00:15: enabled 1
794 08:46:25.275970 PCI: 00:19.2: enabled 0
795 08:46:25.278979 PCI: 00:1d.0: enabled 1
796 08:46:25.282278 GENERIC: 0.0: enabled 1
797 08:46:25.282818 PCI: 00:1e.0: enabled 1
798 08:46:25.285798 PCI: 00:1e.1: enabled 0
799 08:46:25.289155 PCI: 00:1e.2: enabled 1
800 08:46:25.292941 SPI: 00: enabled 1
801 08:46:25.293458 PCI: 00:1e.3: enabled 1
802 08:46:25.296286 SPI: 00: enabled 1
803 08:46:25.299422 PCI: 00:1f.0: enabled 1
804 08:46:25.302613 PNP: 0c09.0: enabled 1
805 08:46:25.303099 PCI: 00:1f.1: enabled 0
806 08:46:25.305959 PCI: 00:1f.2: enabled 1
807 08:46:25.353112 GENERIC: 0.0: enabled 1
808 08:46:25.353672 GENERIC: 0.0: enabled 1
809 08:46:25.354048 GENERIC: 1.0: enabled 1
810 08:46:25.354392 PCI: 00:1f.3: enabled 1
811 08:46:25.355162 PCI: 00:1f.4: enabled 0
812 08:46:25.355713 PCI: 00:1f.5: enabled 1
813 08:46:25.356075 PCI: 00:1f.6: enabled 0
814 08:46:25.356502 PCI: 00:1f.7: enabled 0
815 08:46:25.356836 CPU_CLUSTER: 0: enabled 1
816 08:46:25.357153 APIC: 00: enabled 1
817 08:46:25.357472 APIC: 01: enabled 1
818 08:46:25.357787 APIC: 03: enabled 1
819 08:46:25.358098 APIC: 07: enabled 1
820 08:46:25.358403 APIC: 05: enabled 1
821 08:46:25.358711 APIC: 04: enabled 1
822 08:46:25.359016 APIC: 02: enabled 1
823 08:46:25.359320 APIC: 06: enabled 1
824 08:46:25.359675 Root Device scanning...
825 08:46:25.360058 scan_static_bus for Root Device
826 08:46:25.360379 DOMAIN: 0000 enabled
827 08:46:25.362415 CPU_CLUSTER: 0 enabled
828 08:46:25.362882 DOMAIN: 0000 scanning...
829 08:46:25.365918 PCI: pci_scan_bus for bus 00
830 08:46:25.369079 PCI: 00:00.0 [8086/0000] ops
831 08:46:25.372468 PCI: 00:00.0 [8086/9a12] enabled
832 08:46:25.376116 PCI: 00:02.0 [8086/0000] bus ops
833 08:46:25.379651 PCI: 00:02.0 [8086/9a40] enabled
834 08:46:25.382442 PCI: 00:04.0 [8086/0000] bus ops
835 08:46:25.386334 PCI: 00:04.0 [8086/9a03] enabled
836 08:46:25.389048 PCI: 00:05.0 [8086/9a19] enabled
837 08:46:25.392660 PCI: 00:07.0 [0000/0000] hidden
838 08:46:25.396294 PCI: 00:08.0 [8086/9a11] enabled
839 08:46:25.399273 PCI: 00:0a.0 [8086/9a0d] disabled
840 08:46:25.402632 PCI: 00:0d.0 [8086/0000] bus ops
841 08:46:25.405789 PCI: 00:0d.0 [8086/9a13] enabled
842 08:46:25.409187 PCI: 00:14.0 [8086/0000] bus ops
843 08:46:25.412726 PCI: 00:14.0 [8086/a0ed] enabled
844 08:46:25.416309 PCI: 00:14.2 [8086/a0ef] enabled
845 08:46:25.419839 PCI: 00:14.3 [8086/0000] bus ops
846 08:46:25.422814 PCI: 00:14.3 [8086/a0f0] enabled
847 08:46:25.426067 PCI: 00:15.0 [8086/0000] bus ops
848 08:46:25.429034 PCI: 00:15.0 [8086/a0e8] enabled
849 08:46:25.432625 PCI: 00:15.1 [8086/0000] bus ops
850 08:46:25.436038 PCI: 00:15.1 [8086/a0e9] enabled
851 08:46:25.438830 PCI: 00:15.2 [8086/0000] bus ops
852 08:46:25.442546 PCI: 00:15.2 [8086/a0ea] enabled
853 08:46:25.446079 PCI: 00:15.3 [8086/0000] bus ops
854 08:46:25.448982 PCI: 00:15.3 [8086/a0eb] enabled
855 08:46:25.452189 PCI: 00:16.0 [8086/0000] ops
856 08:46:25.455930 PCI: 00:16.0 [8086/a0e0] enabled
857 08:46:25.462374 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 08:46:25.466033 PCI: 00:19.0 [8086/0000] bus ops
859 08:46:25.468921 PCI: 00:19.0 [8086/a0c5] disabled
860 08:46:25.472534 PCI: 00:19.1 [8086/0000] bus ops
861 08:46:25.475812 PCI: 00:19.1 [8086/a0c6] enabled
862 08:46:25.479133 PCI: 00:1d.0 [8086/0000] bus ops
863 08:46:25.482307 PCI: 00:1d.0 [8086/a0b0] enabled
864 08:46:25.485845 PCI: 00:1e.0 [8086/0000] ops
865 08:46:25.488941 PCI: 00:1e.0 [8086/a0a8] enabled
866 08:46:25.492481 PCI: 00:1e.2 [8086/0000] bus ops
867 08:46:25.495854 PCI: 00:1e.2 [8086/a0aa] enabled
868 08:46:25.499031 PCI: 00:1e.3 [8086/0000] bus ops
869 08:46:25.502669 PCI: 00:1e.3 [8086/a0ab] enabled
870 08:46:25.505483 PCI: 00:1f.0 [8086/0000] bus ops
871 08:46:25.508969 PCI: 00:1f.0 [8086/a087] enabled
872 08:46:25.509387 RTC Init
873 08:46:25.512220 Set power on after power failure.
874 08:46:25.515793 Disabling Deep S3
875 08:46:25.516210 Disabling Deep S3
876 08:46:25.519497 Disabling Deep S4
877 08:46:25.520012 Disabling Deep S4
878 08:46:25.522622 Disabling Deep S5
879 08:46:25.523156 Disabling Deep S5
880 08:46:25.526104 PCI: 00:1f.2 [0000/0000] hidden
881 08:46:25.528928 PCI: 00:1f.3 [8086/0000] bus ops
882 08:46:25.532510 PCI: 00:1f.3 [8086/a0c8] enabled
883 08:46:25.535470 PCI: 00:1f.5 [8086/0000] bus ops
884 08:46:25.539118 PCI: 00:1f.5 [8086/a0a4] enabled
885 08:46:25.542239 PCI: Leftover static devices:
886 08:46:25.545991 PCI: 00:10.2
887 08:46:25.546513 PCI: 00:10.6
888 08:46:25.548992 PCI: 00:10.7
889 08:46:25.549415 PCI: 00:06.0
890 08:46:25.549885 PCI: 00:07.1
891 08:46:25.552251 PCI: 00:07.2
892 08:46:25.552672 PCI: 00:07.3
893 08:46:25.555773 PCI: 00:09.0
894 08:46:25.556284 PCI: 00:0d.1
895 08:46:25.556685 PCI: 00:0d.2
896 08:46:25.559474 PCI: 00:0d.3
897 08:46:25.560027 PCI: 00:0e.0
898 08:46:25.562764 PCI: 00:12.0
899 08:46:25.563316 PCI: 00:12.6
900 08:46:25.563740 PCI: 00:13.0
901 08:46:25.565885 PCI: 00:14.1
902 08:46:25.566440 PCI: 00:16.1
903 08:46:25.569044 PCI: 00:16.2
904 08:46:25.569598 PCI: 00:16.3
905 08:46:25.572232 PCI: 00:16.4
906 08:46:25.572698 PCI: 00:16.5
907 08:46:25.573063 PCI: 00:17.0
908 08:46:25.575758 PCI: 00:19.2
909 08:46:25.576338 PCI: 00:1e.1
910 08:46:25.579294 PCI: 00:1f.1
911 08:46:25.579890 PCI: 00:1f.4
912 08:46:25.580262 PCI: 00:1f.6
913 08:46:25.583777 PCI: 00:1f.7
914 08:46:25.586105 PCI: Check your devicetree.cb.
915 08:46:25.586663 PCI: 00:02.0 scanning...
916 08:46:25.592685 scan_generic_bus for PCI: 00:02.0
917 08:46:25.596153 scan_generic_bus for PCI: 00:02.0 done
918 08:46:25.599549 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 08:46:25.603120 PCI: 00:04.0 scanning...
920 08:46:25.606040 scan_generic_bus for PCI: 00:04.0
921 08:46:25.609418 GENERIC: 0.0 enabled
922 08:46:25.612504 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 08:46:25.619272 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 08:46:25.622923 PCI: 00:0d.0 scanning...
925 08:46:25.626076 scan_static_bus for PCI: 00:0d.0
926 08:46:25.626664 USB0 port 0 enabled
927 08:46:25.629001 USB0 port 0 scanning...
928 08:46:25.632569 scan_static_bus for USB0 port 0
929 08:46:25.635997 USB3 port 0 enabled
930 08:46:25.636545 USB3 port 1 enabled
931 08:46:25.639156 USB3 port 2 disabled
932 08:46:25.642533 USB3 port 3 disabled
933 08:46:25.642953 USB3 port 0 scanning...
934 08:46:25.645838 scan_static_bus for USB3 port 0
935 08:46:25.649554 scan_static_bus for USB3 port 0 done
936 08:46:25.656076 scan_bus: bus USB3 port 0 finished in 6 msecs
937 08:46:25.658947 USB3 port 1 scanning...
938 08:46:25.662485 scan_static_bus for USB3 port 1
939 08:46:25.665883 scan_static_bus for USB3 port 1 done
940 08:46:25.669409 scan_bus: bus USB3 port 1 finished in 6 msecs
941 08:46:25.672697 scan_static_bus for USB0 port 0 done
942 08:46:25.679518 scan_bus: bus USB0 port 0 finished in 43 msecs
943 08:46:25.682374 scan_static_bus for PCI: 00:0d.0 done
944 08:46:25.685723 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 08:46:25.689517 PCI: 00:14.0 scanning...
946 08:46:25.692565 scan_static_bus for PCI: 00:14.0
947 08:46:25.696243 USB0 port 0 enabled
948 08:46:25.696798 USB0 port 0 scanning...
949 08:46:25.699773 scan_static_bus for USB0 port 0
950 08:46:25.702658 USB2 port 0 disabled
951 08:46:25.706603 USB2 port 1 enabled
952 08:46:25.707162 USB2 port 2 enabled
953 08:46:25.708985 USB2 port 3 disabled
954 08:46:25.712703 USB2 port 4 enabled
955 08:46:25.713271 USB2 port 5 disabled
956 08:46:25.716153 USB2 port 6 disabled
957 08:46:25.719122 USB2 port 7 disabled
958 08:46:25.719734 USB2 port 8 disabled
959 08:46:25.722570 USB2 port 9 disabled
960 08:46:25.723127 USB3 port 0 disabled
961 08:46:25.725802 USB3 port 1 enabled
962 08:46:25.729146 USB3 port 2 disabled
963 08:46:25.729702 USB3 port 3 disabled
964 08:46:25.732287 USB2 port 1 scanning...
965 08:46:25.735646 scan_static_bus for USB2 port 1
966 08:46:25.739082 scan_static_bus for USB2 port 1 done
967 08:46:25.745724 scan_bus: bus USB2 port 1 finished in 6 msecs
968 08:46:25.746228 USB2 port 2 scanning...
969 08:46:25.749088 scan_static_bus for USB2 port 2
970 08:46:25.755698 scan_static_bus for USB2 port 2 done
971 08:46:25.758908 scan_bus: bus USB2 port 2 finished in 6 msecs
972 08:46:25.762360 USB2 port 4 scanning...
973 08:46:25.765878 scan_static_bus for USB2 port 4
974 08:46:25.769039 scan_static_bus for USB2 port 4 done
975 08:46:25.772324 scan_bus: bus USB2 port 4 finished in 6 msecs
976 08:46:25.776055 USB3 port 1 scanning...
977 08:46:25.779016 scan_static_bus for USB3 port 1
978 08:46:25.782008 scan_static_bus for USB3 port 1 done
979 08:46:25.786346 scan_bus: bus USB3 port 1 finished in 6 msecs
980 08:46:25.792700 scan_static_bus for USB0 port 0 done
981 08:46:25.795715 scan_bus: bus USB0 port 0 finished in 93 msecs
982 08:46:25.799053 scan_static_bus for PCI: 00:14.0 done
983 08:46:25.805521 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 08:46:25.806067 PCI: 00:14.3 scanning...
985 08:46:25.809082 scan_static_bus for PCI: 00:14.3
986 08:46:25.812272 GENERIC: 0.0 enabled
987 08:46:25.815597 scan_static_bus for PCI: 00:14.3 done
988 08:46:25.821988 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 08:46:25.822580 PCI: 00:15.0 scanning...
990 08:46:25.825611 scan_static_bus for PCI: 00:15.0
991 08:46:25.828741 I2C: 00:1a enabled
992 08:46:25.831846 I2C: 00:31 enabled
993 08:46:25.832477 I2C: 00:32 enabled
994 08:46:25.835397 scan_static_bus for PCI: 00:15.0 done
995 08:46:25.842298 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 08:46:25.845835 PCI: 00:15.1 scanning...
997 08:46:25.848886 scan_static_bus for PCI: 00:15.1
998 08:46:25.849348 I2C: 00:10 enabled
999 08:46:25.851842 scan_static_bus for PCI: 00:15.1 done
1000 08:46:25.859220 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 08:46:25.859668 PCI: 00:15.2 scanning...
1002 08:46:25.862911 scan_static_bus for PCI: 00:15.2
1003 08:46:25.869244 scan_static_bus for PCI: 00:15.2 done
1004 08:46:25.872613 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 08:46:25.876238 PCI: 00:15.3 scanning...
1006 08:46:25.879409 scan_static_bus for PCI: 00:15.3
1007 08:46:25.882630 scan_static_bus for PCI: 00:15.3 done
1008 08:46:25.886575 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 08:46:25.890103 PCI: 00:19.1 scanning...
1010 08:46:25.892818 scan_static_bus for PCI: 00:19.1
1011 08:46:25.896044 I2C: 00:15 enabled
1012 08:46:25.899882 scan_static_bus for PCI: 00:19.1 done
1013 08:46:25.903037 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 08:46:25.906349 PCI: 00:1d.0 scanning...
1015 08:46:25.909846 do_pci_scan_bridge for PCI: 00:1d.0
1016 08:46:25.912844 PCI: pci_scan_bus for bus 01
1017 08:46:25.916295 PCI: 01:00.0 [1c5c/174a] enabled
1018 08:46:25.919612 GENERIC: 0.0 enabled
1019 08:46:25.922834 Enabling Common Clock Configuration
1020 08:46:25.926175 L1 Sub-State supported from root port 29
1021 08:46:25.929750 L1 Sub-State Support = 0xf
1022 08:46:25.932949 CommonModeRestoreTime = 0x28
1023 08:46:25.936032 Power On Value = 0x16, Power On Scale = 0x0
1024 08:46:25.939541 ASPM: Enabled L1
1025 08:46:25.942842 PCIe: Max_Payload_Size adjusted to 128
1026 08:46:25.946446 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 08:46:25.949879 PCI: 00:1e.2 scanning...
1028 08:46:25.952849 scan_generic_bus for PCI: 00:1e.2
1029 08:46:25.956236 SPI: 00 enabled
1030 08:46:25.962996 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 08:46:25.966167 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 08:46:25.969981 PCI: 00:1e.3 scanning...
1033 08:46:25.973251 scan_generic_bus for PCI: 00:1e.3
1034 08:46:25.973715 SPI: 00 enabled
1035 08:46:25.979631 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 08:46:25.986500 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 08:46:25.987080 PCI: 00:1f.0 scanning...
1038 08:46:25.989702 scan_static_bus for PCI: 00:1f.0
1039 08:46:25.992689 PNP: 0c09.0 enabled
1040 08:46:25.996882 PNP: 0c09.0 scanning...
1041 08:46:25.999740 scan_static_bus for PNP: 0c09.0
1042 08:46:26.003023 scan_static_bus for PNP: 0c09.0 done
1043 08:46:26.006399 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 08:46:26.009470 scan_static_bus for PCI: 00:1f.0 done
1045 08:46:26.016522 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 08:46:26.019940 PCI: 00:1f.2 scanning...
1047 08:46:26.022816 scan_static_bus for PCI: 00:1f.2
1048 08:46:26.023276 GENERIC: 0.0 enabled
1049 08:46:26.025982 GENERIC: 0.0 scanning...
1050 08:46:26.029250 scan_static_bus for GENERIC: 0.0
1051 08:46:26.032564 GENERIC: 0.0 enabled
1052 08:46:26.033024 GENERIC: 1.0 enabled
1053 08:46:26.039352 scan_static_bus for GENERIC: 0.0 done
1054 08:46:26.042646 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 08:46:26.047009 scan_static_bus for PCI: 00:1f.2 done
1056 08:46:26.052485 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 08:46:26.052899 PCI: 00:1f.3 scanning...
1058 08:46:26.056023 scan_static_bus for PCI: 00:1f.3
1059 08:46:26.063512 scan_static_bus for PCI: 00:1f.3 done
1060 08:46:26.066285 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 08:46:26.069815 PCI: 00:1f.5 scanning...
1062 08:46:26.072665 scan_generic_bus for PCI: 00:1f.5
1063 08:46:26.075900 scan_generic_bus for PCI: 00:1f.5 done
1064 08:46:26.079112 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 08:46:26.086442 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 08:46:26.089151 scan_static_bus for Root Device done
1067 08:46:26.096182 scan_bus: bus Root Device finished in 736 msecs
1068 08:46:26.096742 done
1069 08:46:26.102292 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 08:46:26.106110 Chrome EC: UHEPI supported
1071 08:46:26.109090 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 08:46:26.116089 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 08:46:26.119126 SPI flash protection: WPSW=0 SRP0=0
1074 08:46:26.126357 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 08:46:26.132290 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 08:46:26.133096 found VGA at PCI: 00:02.0
1077 08:46:26.135865 Setting up VGA for PCI: 00:02.0
1078 08:46:26.142947 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 08:46:26.145704 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 08:46:26.149560 Allocating resources...
1081 08:46:26.152841 Reading resources...
1082 08:46:26.155592 Root Device read_resources bus 0 link: 0
1083 08:46:26.159179 DOMAIN: 0000 read_resources bus 0 link: 0
1084 08:46:26.166255 PCI: 00:04.0 read_resources bus 1 link: 0
1085 08:46:26.169738 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 08:46:26.176307 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 08:46:26.179600 USB0 port 0 read_resources bus 0 link: 0
1088 08:46:26.185937 USB0 port 0 read_resources bus 0 link: 0 done
1089 08:46:26.189757 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 08:46:26.192980 PCI: 00:14.0 read_resources bus 0 link: 0
1091 08:46:26.199815 USB0 port 0 read_resources bus 0 link: 0
1092 08:46:26.202733 USB0 port 0 read_resources bus 0 link: 0 done
1093 08:46:26.209537 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 08:46:26.212683 PCI: 00:14.3 read_resources bus 0 link: 0
1095 08:46:26.219433 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 08:46:26.222921 PCI: 00:15.0 read_resources bus 0 link: 0
1097 08:46:26.230566 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 08:46:26.232919 PCI: 00:15.1 read_resources bus 0 link: 0
1099 08:46:26.240072 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 08:46:26.243704 PCI: 00:19.1 read_resources bus 0 link: 0
1101 08:46:26.250286 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 08:46:26.253754 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 08:46:26.260044 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 08:46:26.263762 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 08:46:26.269979 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 08:46:26.273435 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 08:46:26.279964 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 08:46:26.283311 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 08:46:26.290472 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 08:46:26.294000 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 08:46:26.296693 GENERIC: 0.0 read_resources bus 0 link: 0
1112 08:46:26.303929 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 08:46:26.306803 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 08:46:26.314597 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 08:46:26.317728 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 08:46:26.324521 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 08:46:26.328235 Root Device read_resources bus 0 link: 0 done
1118 08:46:26.331120 Done reading resources.
1119 08:46:26.338030 Show resources in subtree (Root Device)...After reading.
1120 08:46:26.340856 Root Device child on link 0 DOMAIN: 0000
1121 08:46:26.344521 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 08:46:26.354577 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 08:46:26.364015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 08:46:26.364435 PCI: 00:00.0
1125 08:46:26.374450 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 08:46:26.384126 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 08:46:26.394460 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 08:46:26.404512 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 08:46:26.414520 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 08:46:26.420835 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 08:46:26.431261 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 08:46:26.441405 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 08:46:26.451016 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 08:46:26.460621 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 08:46:26.470850 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 08:46:26.478403 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 08:46:26.487286 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 08:46:26.497746 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 08:46:26.507432 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 08:46:26.517488 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 08:46:26.527456 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 08:46:26.533590 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 08:46:26.543747 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 08:46:26.553763 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 08:46:26.557281 PCI: 00:02.0
1146 08:46:26.566857 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 08:46:26.577246 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 08:46:26.583632 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 08:46:26.590415 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 08:46:26.600483 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 08:46:26.601017 GENERIC: 0.0
1152 08:46:26.603982 PCI: 00:05.0
1153 08:46:26.613404 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 08:46:26.616765 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 08:46:26.620098 GENERIC: 0.0
1156 08:46:26.620507 PCI: 00:08.0
1157 08:46:26.630259 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 08:46:26.633686 PCI: 00:0a.0
1159 08:46:26.636608 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 08:46:26.647050 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 08:46:26.650250 USB0 port 0 child on link 0 USB3 port 0
1162 08:46:26.653635 USB3 port 0
1163 08:46:26.654169 USB3 port 1
1164 08:46:26.657026 USB3 port 2
1165 08:46:26.660043 USB3 port 3
1166 08:46:26.663495 PCI: 00:14.0 child on link 0 USB0 port 0
1167 08:46:26.673864 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 08:46:26.676888 USB0 port 0 child on link 0 USB2 port 0
1169 08:46:26.680546 USB2 port 0
1170 08:46:26.681097 USB2 port 1
1171 08:46:26.683527 USB2 port 2
1172 08:46:26.683981 USB2 port 3
1173 08:46:26.687336 USB2 port 4
1174 08:46:26.687918 USB2 port 5
1175 08:46:26.690383 USB2 port 6
1176 08:46:26.690832 USB2 port 7
1177 08:46:26.693781 USB2 port 8
1178 08:46:26.697531 USB2 port 9
1179 08:46:26.697983 USB3 port 0
1180 08:46:26.700959 USB3 port 1
1181 08:46:26.701412 USB3 port 2
1182 08:46:26.703810 USB3 port 3
1183 08:46:26.704219 PCI: 00:14.2
1184 08:46:26.713290 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 08:46:26.723961 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 08:46:26.730043 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 08:46:26.739878 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 08:46:26.740355 GENERIC: 0.0
1189 08:46:26.743028 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 08:46:26.753353 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 08:46:26.756608 I2C: 00:1a
1192 08:46:26.757016 I2C: 00:31
1193 08:46:26.759936 I2C: 00:32
1194 08:46:26.763334 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 08:46:26.773214 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 08:46:26.773693 I2C: 00:10
1197 08:46:26.776592 PCI: 00:15.2
1198 08:46:26.786972 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 08:46:26.787604 PCI: 00:15.3
1200 08:46:26.796958 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 08:46:26.800529 PCI: 00:16.0
1202 08:46:26.810263 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 08:46:26.810809 PCI: 00:19.0
1204 08:46:26.816650 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 08:46:26.826560 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 08:46:26.827094 I2C: 00:15
1207 08:46:26.833369 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 08:46:26.839901 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 08:46:26.850049 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 08:46:26.860090 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 08:46:26.860614 GENERIC: 0.0
1212 08:46:26.863236 PCI: 01:00.0
1213 08:46:26.873192 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 08:46:26.883163 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 08:46:26.893234 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 08:46:26.893776 PCI: 00:1e.0
1217 08:46:26.903181 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 08:46:26.909887 PCI: 00:1e.2 child on link 0 SPI: 00
1219 08:46:26.916764 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 08:46:26.919857 SPI: 00
1221 08:46:26.922923 PCI: 00:1e.3 child on link 0 SPI: 00
1222 08:46:26.933234 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 08:46:26.933680 SPI: 00
1224 08:46:26.939630 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 08:46:26.946246 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 08:46:26.950028 PNP: 0c09.0
1227 08:46:26.959465 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 08:46:26.963105 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 08:46:26.973354 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 08:46:26.979331 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 08:46:26.985966 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 08:46:26.986289 GENERIC: 0.0
1233 08:46:26.989629 GENERIC: 1.0
1234 08:46:26.989928 PCI: 00:1f.3
1235 08:46:26.999414 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 08:46:27.009587 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 08:46:27.013164 PCI: 00:1f.5
1238 08:46:27.023232 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 08:46:27.026264 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 08:46:27.026651 APIC: 00
1241 08:46:27.029611 APIC: 01
1242 08:46:27.030093 APIC: 03
1243 08:46:27.033154 APIC: 07
1244 08:46:27.033568 APIC: 05
1245 08:46:27.033897 APIC: 04
1246 08:46:27.036863 APIC: 02
1247 08:46:27.037280 APIC: 06
1248 08:46:27.042958 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 08:46:27.049847 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 08:46:27.056611 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 08:46:27.062900 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 08:46:27.066780 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 08:46:27.069917 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 08:46:27.077014 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 08:46:27.082673 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 08:46:27.089508 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 08:46:27.096250 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 08:46:27.102809 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 08:46:27.109984 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 08:46:27.119577 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 08:46:27.126588 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 08:46:27.132903 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 08:46:27.136050 DOMAIN: 0000: Resource ranges:
1264 08:46:27.139448 * Base: 1000, Size: 800, Tag: 100
1265 08:46:27.142664 * Base: 1900, Size: e700, Tag: 100
1266 08:46:27.149574 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 08:46:27.156702 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 08:46:27.162597 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 08:46:27.170086 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 08:46:27.179154 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 08:46:27.186284 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 08:46:27.192431 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 08:46:27.202813 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 08:46:27.209102 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 08:46:27.215689 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 08:46:27.223433 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 08:46:27.232756 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 08:46:27.238918 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 08:46:27.246204 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 08:46:27.255936 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 08:46:27.262628 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 08:46:27.269193 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 08:46:27.278702 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 08:46:27.285515 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 08:46:27.292552 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 08:46:27.301911 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 08:46:27.309087 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 08:46:27.315483 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 08:46:27.325335 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 08:46:27.332138 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 08:46:27.335349 DOMAIN: 0000: Resource ranges:
1292 08:46:27.338854 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 08:46:27.345585 * Base: d0000000, Size: 28000000, Tag: 200
1294 08:46:27.348645 * Base: fa000000, Size: 1000000, Tag: 200
1295 08:46:27.351949 * Base: fb001000, Size: 2fff000, Tag: 200
1296 08:46:27.355643 * Base: fe010000, Size: 2e000, Tag: 200
1297 08:46:27.361880 * Base: fe03f000, Size: d41000, Tag: 200
1298 08:46:27.365729 * Base: fed88000, Size: 8000, Tag: 200
1299 08:46:27.368967 * Base: fed93000, Size: d000, Tag: 200
1300 08:46:27.372714 * Base: feda2000, Size: 1e000, Tag: 200
1301 08:46:27.379044 * Base: fede0000, Size: 1220000, Tag: 200
1302 08:46:27.382514 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 08:46:27.388903 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 08:46:27.395697 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 08:46:27.402402 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 08:46:27.408649 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 08:46:27.415335 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 08:46:27.422224 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 08:46:27.428695 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 08:46:27.435852 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 08:46:27.442306 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 08:46:27.448580 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 08:46:27.455256 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 08:46:27.461964 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 08:46:27.468835 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 08:46:27.474923 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 08:46:27.481528 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 08:46:27.488618 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 08:46:27.494986 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 08:46:27.501446 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 08:46:27.508289 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 08:46:27.515138 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 08:46:27.521989 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 08:46:27.528658 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 08:46:27.535175 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 08:46:27.544786 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 08:46:27.548092 PCI: 00:1d.0: Resource ranges:
1328 08:46:27.552006 * Base: 7fc00000, Size: 100000, Tag: 200
1329 08:46:27.558363 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 08:46:27.564825 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 08:46:27.571997 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 08:46:27.581413 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 08:46:27.588767 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 08:46:27.591435 Root Device assign_resources, bus 0 link: 0
1335 08:46:27.595017 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 08:46:27.605372 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 08:46:27.611803 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 08:46:27.621654 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 08:46:27.628493 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 08:46:27.635056 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 08:46:27.638599 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 08:46:27.645133 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 08:46:27.655033 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 08:46:27.662102 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 08:46:27.668691 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 08:46:27.671619 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 08:46:27.681494 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 08:46:27.685076 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 08:46:27.688363 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 08:46:27.698618 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 08:46:27.704936 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 08:46:27.714721 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 08:46:27.717844 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 08:46:27.724841 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 08:46:27.731226 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 08:46:27.734362 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 08:46:27.741008 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 08:46:27.747913 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 08:46:27.755284 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 08:46:27.758114 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 08:46:27.767748 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 08:46:27.774437 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 08:46:27.784246 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 08:46:27.791562 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 08:46:27.793895 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 08:46:27.801369 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 08:46:27.807474 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 08:46:27.817934 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 08:46:27.827440 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 08:46:27.830972 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 08:46:27.840762 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 08:46:27.847463 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 08:46:27.857964 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 08:46:27.860965 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 08:46:27.870527 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 08:46:27.874638 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 08:46:27.878402 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 08:46:27.887734 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 08:46:27.890543 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 08:46:27.897550 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 08:46:27.901009 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 08:46:27.904051 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 08:46:27.910950 LPC: Trying to open IO window from 800 size 1ff
1384 08:46:27.917277 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 08:46:27.928062 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 08:46:27.934490 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 08:46:27.940570 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 08:46:27.943988 Root Device assign_resources, bus 0 link: 0
1389 08:46:27.947182 Done setting resources.
1390 08:46:27.954242 Show resources in subtree (Root Device)...After assigning values.
1391 08:46:27.957001 Root Device child on link 0 DOMAIN: 0000
1392 08:46:27.960511 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 08:46:27.970811 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 08:46:27.980620 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 08:46:27.983953 PCI: 00:00.0
1396 08:46:27.993757 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 08:46:28.000283 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 08:46:28.010784 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 08:46:28.020472 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 08:46:28.030535 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 08:46:28.040795 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 08:46:28.047102 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 08:46:28.057108 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 08:46:28.067133 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 08:46:28.077254 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 08:46:28.087220 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 08:46:28.097217 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 08:46:28.103667 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 08:46:28.113558 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 08:46:28.123955 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 08:46:28.133840 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 08:46:28.143851 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 08:46:28.150516 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 08:46:28.161070 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 08:46:28.170920 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 08:46:28.173773 PCI: 00:02.0
1417 08:46:28.184022 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 08:46:28.193534 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 08:46:28.203569 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 08:46:28.207055 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 08:46:28.216716 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 08:46:28.220717 GENERIC: 0.0
1423 08:46:28.221180 PCI: 00:05.0
1424 08:46:28.233776 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 08:46:28.236628 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 08:46:28.237067 GENERIC: 0.0
1427 08:46:28.240276 PCI: 00:08.0
1428 08:46:28.250609 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 08:46:28.253736 PCI: 00:0a.0
1430 08:46:28.256913 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 08:46:28.267093 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 08:46:28.270241 USB0 port 0 child on link 0 USB3 port 0
1433 08:46:28.273590 USB3 port 0
1434 08:46:28.274010 USB3 port 1
1435 08:46:28.276744 USB3 port 2
1436 08:46:28.277316 USB3 port 3
1437 08:46:28.283707 PCI: 00:14.0 child on link 0 USB0 port 0
1438 08:46:28.293813 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 08:46:28.297041 USB0 port 0 child on link 0 USB2 port 0
1440 08:46:28.300651 USB2 port 0
1441 08:46:28.301139 USB2 port 1
1442 08:46:28.304098 USB2 port 2
1443 08:46:28.304511 USB2 port 3
1444 08:46:28.307146 USB2 port 4
1445 08:46:28.307649 USB2 port 5
1446 08:46:28.310517 USB2 port 6
1447 08:46:28.310997 USB2 port 7
1448 08:46:28.313367 USB2 port 8
1449 08:46:28.313783 USB2 port 9
1450 08:46:28.316840 USB3 port 0
1451 08:46:28.320424 USB3 port 1
1452 08:46:28.320839 USB3 port 2
1453 08:46:28.323590 USB3 port 3
1454 08:46:28.324018 PCI: 00:14.2
1455 08:46:28.333276 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 08:46:28.344748 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 08:46:28.350476 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 08:46:28.360422 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 08:46:28.361012 GENERIC: 0.0
1460 08:46:28.367071 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 08:46:28.377411 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 08:46:28.377839 I2C: 00:1a
1463 08:46:28.380316 I2C: 00:31
1464 08:46:28.380727 I2C: 00:32
1465 08:46:28.383610 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 08:46:28.393628 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 08:46:28.397112 I2C: 00:10
1468 08:46:28.397558 PCI: 00:15.2
1469 08:46:28.410068 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 08:46:28.410556 PCI: 00:15.3
1471 08:46:28.421056 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 08:46:28.423875 PCI: 00:16.0
1473 08:46:28.434858 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 08:46:28.435465 PCI: 00:19.0
1475 08:46:28.440375 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 08:46:28.450754 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 08:46:28.451176 I2C: 00:15
1478 08:46:28.456685 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 08:46:28.463320 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 08:46:28.477172 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 08:46:28.486921 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 08:46:28.490196 GENERIC: 0.0
1483 08:46:28.490650 PCI: 01:00.0
1484 08:46:28.500236 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 08:46:28.510341 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 08:46:28.520283 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 08:46:28.523334 PCI: 00:1e.0
1488 08:46:28.533761 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 08:46:28.536888 PCI: 00:1e.2 child on link 0 SPI: 00
1490 08:46:28.549983 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 08:46:28.550410 SPI: 00
1492 08:46:28.553584 PCI: 00:1e.3 child on link 0 SPI: 00
1493 08:46:28.563768 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 08:46:28.566753 SPI: 00
1495 08:46:28.570248 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 08:46:28.579640 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 08:46:28.580124 PNP: 0c09.0
1498 08:46:28.589998 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 08:46:28.593603 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 08:46:28.603071 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 08:46:28.612940 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 08:46:28.616469 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 08:46:28.619329 GENERIC: 0.0
1504 08:46:28.619948 GENERIC: 1.0
1505 08:46:28.623436 PCI: 00:1f.3
1506 08:46:28.633230 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 08:46:28.642885 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 08:46:28.646296 PCI: 00:1f.5
1509 08:46:28.656458 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 08:46:28.659396 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 08:46:28.659977 APIC: 00
1512 08:46:28.662711 APIC: 01
1513 08:46:28.663285 APIC: 03
1514 08:46:28.663823 APIC: 07
1515 08:46:28.666344 APIC: 05
1516 08:46:28.666832 APIC: 04
1517 08:46:28.669201 APIC: 02
1518 08:46:28.669614 APIC: 06
1519 08:46:28.672658 Done allocating resources.
1520 08:46:28.679579 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 08:46:28.682564 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 08:46:28.689515 Configure GPIOs for I2S audio on UP4.
1523 08:46:28.695942 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 08:46:28.696476 Enabling resources...
1525 08:46:28.703402 PCI: 00:00.0 subsystem <- 8086/9a12
1526 08:46:28.703925 PCI: 00:00.0 cmd <- 06
1527 08:46:28.706348 PCI: 00:02.0 subsystem <- 8086/9a40
1528 08:46:28.709908 PCI: 00:02.0 cmd <- 03
1529 08:46:28.712966 PCI: 00:04.0 subsystem <- 8086/9a03
1530 08:46:28.716204 PCI: 00:04.0 cmd <- 02
1531 08:46:28.719642 PCI: 00:05.0 subsystem <- 8086/9a19
1532 08:46:28.722720 PCI: 00:05.0 cmd <- 02
1533 08:46:28.726267 PCI: 00:08.0 subsystem <- 8086/9a11
1534 08:46:28.730045 PCI: 00:08.0 cmd <- 06
1535 08:46:28.732858 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 08:46:28.736519 PCI: 00:0d.0 cmd <- 02
1537 08:46:28.739777 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 08:46:28.740270 PCI: 00:14.0 cmd <- 02
1539 08:46:28.746774 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 08:46:28.747254 PCI: 00:14.2 cmd <- 02
1541 08:46:28.750154 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 08:46:28.752921 PCI: 00:14.3 cmd <- 02
1543 08:46:28.756619 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 08:46:28.760104 PCI: 00:15.0 cmd <- 02
1545 08:46:28.762851 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 08:46:28.766619 PCI: 00:15.1 cmd <- 02
1547 08:46:28.769816 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 08:46:28.772765 PCI: 00:15.2 cmd <- 02
1549 08:46:28.776604 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 08:46:28.780013 PCI: 00:15.3 cmd <- 02
1551 08:46:28.782899 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 08:46:28.783422 PCI: 00:16.0 cmd <- 02
1553 08:46:28.789965 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 08:46:28.790479 PCI: 00:19.1 cmd <- 02
1555 08:46:28.793207 PCI: 00:1d.0 bridge ctrl <- 0013
1556 08:46:28.796812 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 08:46:28.799821 PCI: 00:1d.0 cmd <- 06
1558 08:46:28.803243 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 08:46:28.806393 PCI: 00:1e.0 cmd <- 06
1560 08:46:28.809901 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 08:46:28.813048 PCI: 00:1e.2 cmd <- 06
1562 08:46:28.816182 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 08:46:28.819678 PCI: 00:1e.3 cmd <- 02
1564 08:46:28.823114 PCI: 00:1f.0 subsystem <- 8086/a087
1565 08:46:28.826475 PCI: 00:1f.0 cmd <- 407
1566 08:46:28.829829 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 08:46:28.830314 PCI: 00:1f.3 cmd <- 02
1568 08:46:28.836621 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 08:46:28.837140 PCI: 00:1f.5 cmd <- 406
1570 08:46:28.842169 PCI: 01:00.0 cmd <- 02
1571 08:46:28.846699 done.
1572 08:46:28.849631 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 08:46:28.853145 Initializing devices...
1574 08:46:28.856530 Root Device init
1575 08:46:28.859947 Chrome EC: Set SMI mask to 0x0000000000000000
1576 08:46:28.866462 Chrome EC: clear events_b mask to 0x0000000000000000
1577 08:46:28.873790 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 08:46:28.880508 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 08:46:28.886708 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 08:46:28.893935 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 08:46:28.897278 fw_config match found: DB_USB=USB3_ACTIVE
1582 08:46:28.903817 Configure Right Type-C port orientation for retimer
1583 08:46:28.906892 Root Device init finished in 47 msecs
1584 08:46:28.910155 PCI: 00:00.0 init
1585 08:46:28.914189 CPU TDP = 9 Watts
1586 08:46:28.914886 CPU PL1 = 9 Watts
1587 08:46:28.917742 CPU PL2 = 40 Watts
1588 08:46:28.918378 CPU PL4 = 83 Watts
1589 08:46:28.924325 PCI: 00:00.0 init finished in 8 msecs
1590 08:46:28.924850 PCI: 00:02.0 init
1591 08:46:28.926878 GMA: Found VBT in CBFS
1592 08:46:28.930370 GMA: Found valid VBT in CBFS
1593 08:46:28.936765 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 08:46:28.943358 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 08:46:28.946858 PCI: 00:02.0 init finished in 18 msecs
1596 08:46:28.950065 PCI: 00:05.0 init
1597 08:46:28.953783 PCI: 00:05.0 init finished in 0 msecs
1598 08:46:28.956920 PCI: 00:08.0 init
1599 08:46:28.960342 PCI: 00:08.0 init finished in 0 msecs
1600 08:46:28.963998 PCI: 00:14.0 init
1601 08:46:28.966955 PCI: 00:14.0 init finished in 0 msecs
1602 08:46:28.967312 PCI: 00:14.2 init
1603 08:46:28.970352 PCI: 00:14.2 init finished in 0 msecs
1604 08:46:28.974316 PCI: 00:15.0 init
1605 08:46:28.977538 I2C bus 0 version 0x3230302a
1606 08:46:28.981082 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 08:46:28.984381 PCI: 00:15.0 init finished in 6 msecs
1608 08:46:28.988447 PCI: 00:15.1 init
1609 08:46:28.991227 I2C bus 1 version 0x3230302a
1610 08:46:28.994357 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 08:46:28.997633 PCI: 00:15.1 init finished in 6 msecs
1612 08:46:29.001397 PCI: 00:15.2 init
1613 08:46:29.004369 I2C bus 2 version 0x3230302a
1614 08:46:29.007716 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 08:46:29.011255 PCI: 00:15.2 init finished in 6 msecs
1616 08:46:29.011706 PCI: 00:15.3 init
1617 08:46:29.014311 I2C bus 3 version 0x3230302a
1618 08:46:29.018132 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 08:46:29.024590 PCI: 00:15.3 init finished in 6 msecs
1620 08:46:29.025107 PCI: 00:16.0 init
1621 08:46:29.027969 PCI: 00:16.0 init finished in 0 msecs
1622 08:46:29.031194 PCI: 00:19.1 init
1623 08:46:29.034341 I2C bus 5 version 0x3230302a
1624 08:46:29.037927 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 08:46:29.042278 PCI: 00:19.1 init finished in 6 msecs
1626 08:46:29.044673 PCI: 00:1d.0 init
1627 08:46:29.047724 Initializing PCH PCIe bridge.
1628 08:46:29.051060 PCI: 00:1d.0 init finished in 3 msecs
1629 08:46:29.054417 PCI: 00:1f.0 init
1630 08:46:29.057539 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 08:46:29.060984 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 08:46:29.064619 IOAPIC: ID = 0x02
1633 08:46:29.067270 IOAPIC: Dumping registers
1634 08:46:29.070645 reg 0x0000: 0x02000000
1635 08:46:29.070825 reg 0x0001: 0x00770020
1636 08:46:29.073997 reg 0x0002: 0x00000000
1637 08:46:29.077430 PCI: 00:1f.0 init finished in 21 msecs
1638 08:46:29.080678 PCI: 00:1f.2 init
1639 08:46:29.084410 Disabling ACPI via APMC.
1640 08:46:29.084544 APMC done.
1641 08:46:29.091343 PCI: 00:1f.2 init finished in 5 msecs
1642 08:46:29.101837 PCI: 01:00.0 init
1643 08:46:29.104959 PCI: 01:00.0 init finished in 0 msecs
1644 08:46:29.108162 PNP: 0c09.0 init
1645 08:46:29.111785 Google Chrome EC uptime: 8.390 seconds
1646 08:46:29.118006 Google Chrome AP resets since EC boot: 1
1647 08:46:29.121787 Google Chrome most recent AP reset causes:
1648 08:46:29.124905 0.349: 32775 shutdown: entering G3
1649 08:46:29.132017 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 08:46:29.135043 PNP: 0c09.0 init finished in 22 msecs
1651 08:46:29.140421 Devices initialized
1652 08:46:29.143678 Show all devs... After init.
1653 08:46:29.146995 Root Device: enabled 1
1654 08:46:29.147088 DOMAIN: 0000: enabled 1
1655 08:46:29.150632 CPU_CLUSTER: 0: enabled 1
1656 08:46:29.153995 PCI: 00:00.0: enabled 1
1657 08:46:29.157265 PCI: 00:02.0: enabled 1
1658 08:46:29.157350 PCI: 00:04.0: enabled 1
1659 08:46:29.160675 PCI: 00:05.0: enabled 1
1660 08:46:29.163607 PCI: 00:06.0: enabled 0
1661 08:46:29.167071 PCI: 00:07.0: enabled 0
1662 08:46:29.167187 PCI: 00:07.1: enabled 0
1663 08:46:29.170481 PCI: 00:07.2: enabled 0
1664 08:46:29.173639 PCI: 00:07.3: enabled 0
1665 08:46:29.177093 PCI: 00:08.0: enabled 1
1666 08:46:29.177189 PCI: 00:09.0: enabled 0
1667 08:46:29.180451 PCI: 00:0a.0: enabled 0
1668 08:46:29.183468 PCI: 00:0d.0: enabled 1
1669 08:46:29.187248 PCI: 00:0d.1: enabled 0
1670 08:46:29.187359 PCI: 00:0d.2: enabled 0
1671 08:46:29.190195 PCI: 00:0d.3: enabled 0
1672 08:46:29.193732 PCI: 00:0e.0: enabled 0
1673 08:46:29.193814 PCI: 00:10.2: enabled 1
1674 08:46:29.196884 PCI: 00:10.6: enabled 0
1675 08:46:29.200071 PCI: 00:10.7: enabled 0
1676 08:46:29.203695 PCI: 00:12.0: enabled 0
1677 08:46:29.203787 PCI: 00:12.6: enabled 0
1678 08:46:29.207103 PCI: 00:13.0: enabled 0
1679 08:46:29.210451 PCI: 00:14.0: enabled 1
1680 08:46:29.213614 PCI: 00:14.1: enabled 0
1681 08:46:29.213716 PCI: 00:14.2: enabled 1
1682 08:46:29.217025 PCI: 00:14.3: enabled 1
1683 08:46:29.220812 PCI: 00:15.0: enabled 1
1684 08:46:29.224017 PCI: 00:15.1: enabled 1
1685 08:46:29.224111 PCI: 00:15.2: enabled 1
1686 08:46:29.226825 PCI: 00:15.3: enabled 1
1687 08:46:29.230138 PCI: 00:16.0: enabled 1
1688 08:46:29.230234 PCI: 00:16.1: enabled 0
1689 08:46:29.233772 PCI: 00:16.2: enabled 0
1690 08:46:29.236856 PCI: 00:16.3: enabled 0
1691 08:46:29.240082 PCI: 00:16.4: enabled 0
1692 08:46:29.240165 PCI: 00:16.5: enabled 0
1693 08:46:29.243467 PCI: 00:17.0: enabled 0
1694 08:46:29.246759 PCI: 00:19.0: enabled 0
1695 08:46:29.250072 PCI: 00:19.1: enabled 1
1696 08:46:29.250162 PCI: 00:19.2: enabled 0
1697 08:46:29.253333 PCI: 00:1c.0: enabled 1
1698 08:46:29.257715 PCI: 00:1c.1: enabled 0
1699 08:46:29.259928 PCI: 00:1c.2: enabled 0
1700 08:46:29.260012 PCI: 00:1c.3: enabled 0
1701 08:46:29.263599 PCI: 00:1c.4: enabled 0
1702 08:46:29.266760 PCI: 00:1c.5: enabled 0
1703 08:46:29.266842 PCI: 00:1c.6: enabled 1
1704 08:46:29.269928 PCI: 00:1c.7: enabled 0
1705 08:46:29.274073 PCI: 00:1d.0: enabled 1
1706 08:46:29.276782 PCI: 00:1d.1: enabled 0
1707 08:46:29.276868 PCI: 00:1d.2: enabled 1
1708 08:46:29.280639 PCI: 00:1d.3: enabled 0
1709 08:46:29.283725 PCI: 00:1e.0: enabled 1
1710 08:46:29.286816 PCI: 00:1e.1: enabled 0
1711 08:46:29.287237 PCI: 00:1e.2: enabled 1
1712 08:46:29.290282 PCI: 00:1e.3: enabled 1
1713 08:46:29.293923 PCI: 00:1f.0: enabled 1
1714 08:46:29.297238 PCI: 00:1f.1: enabled 0
1715 08:46:29.297567 PCI: 00:1f.2: enabled 1
1716 08:46:29.300670 PCI: 00:1f.3: enabled 1
1717 08:46:29.303873 PCI: 00:1f.4: enabled 0
1718 08:46:29.304176 PCI: 00:1f.5: enabled 1
1719 08:46:29.306878 PCI: 00:1f.6: enabled 0
1720 08:46:29.310111 PCI: 00:1f.7: enabled 0
1721 08:46:29.313554 APIC: 00: enabled 1
1722 08:46:29.313793 GENERIC: 0.0: enabled 1
1723 08:46:29.317030 GENERIC: 0.0: enabled 1
1724 08:46:29.320475 GENERIC: 1.0: enabled 1
1725 08:46:29.323691 GENERIC: 0.0: enabled 1
1726 08:46:29.324029 GENERIC: 1.0: enabled 1
1727 08:46:29.327036 USB0 port 0: enabled 1
1728 08:46:29.330543 GENERIC: 0.0: enabled 1
1729 08:46:29.331126 USB0 port 0: enabled 1
1730 08:46:29.334075 GENERIC: 0.0: enabled 1
1731 08:46:29.337456 I2C: 00:1a: enabled 1
1732 08:46:29.338017 I2C: 00:31: enabled 1
1733 08:46:29.340361 I2C: 00:32: enabled 1
1734 08:46:29.343678 I2C: 00:10: enabled 1
1735 08:46:29.344134 I2C: 00:15: enabled 1
1736 08:46:29.347103 GENERIC: 0.0: enabled 0
1737 08:46:29.350480 GENERIC: 1.0: enabled 0
1738 08:46:29.354302 GENERIC: 0.0: enabled 1
1739 08:46:29.354728 SPI: 00: enabled 1
1740 08:46:29.357234 SPI: 00: enabled 1
1741 08:46:29.360741 PNP: 0c09.0: enabled 1
1742 08:46:29.361168 GENERIC: 0.0: enabled 1
1743 08:46:29.363754 USB3 port 0: enabled 1
1744 08:46:29.367585 USB3 port 1: enabled 1
1745 08:46:29.368105 USB3 port 2: enabled 0
1746 08:46:29.370375 USB3 port 3: enabled 0
1747 08:46:29.373532 USB2 port 0: enabled 0
1748 08:46:29.377503 USB2 port 1: enabled 1
1749 08:46:29.378031 USB2 port 2: enabled 1
1750 08:46:29.380321 USB2 port 3: enabled 0
1751 08:46:29.383905 USB2 port 4: enabled 1
1752 08:46:29.384438 USB2 port 5: enabled 0
1753 08:46:29.387137 USB2 port 6: enabled 0
1754 08:46:29.390247 USB2 port 7: enabled 0
1755 08:46:29.390670 USB2 port 8: enabled 0
1756 08:46:29.393702 USB2 port 9: enabled 0
1757 08:46:29.396988 USB3 port 0: enabled 0
1758 08:46:29.400089 USB3 port 1: enabled 1
1759 08:46:29.400524 USB3 port 2: enabled 0
1760 08:46:29.404120 USB3 port 3: enabled 0
1761 08:46:29.407279 GENERIC: 0.0: enabled 1
1762 08:46:29.407849 GENERIC: 1.0: enabled 1
1763 08:46:29.410483 APIC: 01: enabled 1
1764 08:46:29.413429 APIC: 03: enabled 1
1765 08:46:29.413847 APIC: 07: enabled 1
1766 08:46:29.416971 APIC: 05: enabled 1
1767 08:46:29.419903 APIC: 04: enabled 1
1768 08:46:29.420318 APIC: 02: enabled 1
1769 08:46:29.423670 APIC: 06: enabled 1
1770 08:46:29.427016 PCI: 01:00.0: enabled 1
1771 08:46:29.430040 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1772 08:46:29.437299 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 08:46:29.440300 ELOG: NV offset 0xf30000 size 0x1000
1774 08:46:29.446713 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 08:46:29.453397 ELOG: Event(17) added with size 13 at 2023-12-11 08:46:29 UTC
1776 08:46:29.459796 ELOG: Event(92) added with size 9 at 2023-12-11 08:46:29 UTC
1777 08:46:29.466724 ELOG: Event(93) added with size 9 at 2023-12-11 08:46:29 UTC
1778 08:46:29.473398 ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:29 UTC
1779 08:46:29.480185 ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:29 UTC
1780 08:46:29.483945 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 08:46:29.490406 ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:29 UTC
1782 08:46:29.497291 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 08:46:29.503398 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 08:46:29.503898 Finalize devices...
1785 08:46:29.506729 Devices finalized
1786 08:46:29.513544 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 08:46:29.516788 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 08:46:29.523278 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 08:46:29.526943 ME: HFSTS1 : 0x80030055
1790 08:46:29.533963 ME: HFSTS2 : 0x30280116
1791 08:46:29.536799 ME: HFSTS3 : 0x00000050
1792 08:46:29.540428 ME: HFSTS4 : 0x00004000
1793 08:46:29.546689 ME: HFSTS5 : 0x00000000
1794 08:46:29.550158 ME: HFSTS6 : 0x00400006
1795 08:46:29.553265 ME: Manufacturing Mode : YES
1796 08:46:29.557204 ME: SPI Protection Mode Enabled : NO
1797 08:46:29.559943 ME: FW Partition Table : OK
1798 08:46:29.566873 ME: Bringup Loader Failure : NO
1799 08:46:29.570312 ME: Firmware Init Complete : NO
1800 08:46:29.573153 ME: Boot Options Present : NO
1801 08:46:29.577090 ME: Update In Progress : NO
1802 08:46:29.580047 ME: D0i3 Support : YES
1803 08:46:29.583116 ME: Low Power State Enabled : NO
1804 08:46:29.586832 ME: CPU Replaced : YES
1805 08:46:29.589911 ME: CPU Replacement Valid : YES
1806 08:46:29.596646 ME: Current Working State : 5
1807 08:46:29.600177 ME: Current Operation State : 1
1808 08:46:29.603227 ME: Current Operation Mode : 3
1809 08:46:29.606498 ME: Error Code : 0
1810 08:46:29.610341 ME: Enhanced Debug Mode : NO
1811 08:46:29.613261 ME: CPU Debug Disabled : YES
1812 08:46:29.616612 ME: TXT Support : NO
1813 08:46:29.623302 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 08:46:29.630012 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 08:46:29.633820 CBFS: 'fallback/slic' not found.
1816 08:46:29.636833 ACPI: Writing ACPI tables at 76b01000.
1817 08:46:29.639965 ACPI: * FACS
1818 08:46:29.640445 ACPI: * DSDT
1819 08:46:29.647226 Ramoops buffer: 0x100000@0x76a00000.
1820 08:46:29.650094 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 08:46:29.653057 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 08:46:29.657576 Google Chrome EC: version:
1823 08:46:29.661072 ro: voema_v2.0.7540-147f8d37d1
1824 08:46:29.664254 rw: voema_v2.0.7540-147f8d37d1
1825 08:46:29.667606 running image: 2
1826 08:46:29.674291 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 08:46:29.678248 ACPI: * FADT
1828 08:46:29.678788 SCI is IRQ9
1829 08:46:29.680578 ACPI: added table 1/32, length now 40
1830 08:46:29.684322 ACPI: * SSDT
1831 08:46:29.687331 Found 1 CPU(s) with 8 core(s) each.
1832 08:46:29.691094 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 08:46:29.697252 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 08:46:29.700222 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 08:46:29.704153 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 08:46:29.710661 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 08:46:29.717168 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 08:46:29.720256 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 08:46:29.727267 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 08:46:29.734118 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 08:46:29.737260 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 08:46:29.740632 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 08:46:29.747644 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 08:46:29.754008 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 08:46:29.757179 PS2K: Passing 80 keymaps to kernel
1846 08:46:29.764174 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 08:46:29.770300 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 08:46:29.777150 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 08:46:29.784515 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 08:46:29.790694 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 08:46:29.793977 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 08:46:29.800258 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 08:46:29.807766 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 08:46:29.813539 ACPI: added table 2/32, length now 44
1855 08:46:29.813977 ACPI: * MCFG
1856 08:46:29.816967 ACPI: added table 3/32, length now 48
1857 08:46:29.820211 ACPI: * TPM2
1858 08:46:29.823763 TPM2 log created at 0x769f0000
1859 08:46:29.826888 ACPI: added table 4/32, length now 52
1860 08:46:29.827404 ACPI: * MADT
1861 08:46:29.830201 SCI is IRQ9
1862 08:46:29.834032 ACPI: added table 5/32, length now 56
1863 08:46:29.834535 current = 76b09850
1864 08:46:29.836890 ACPI: * DMAR
1865 08:46:29.840481 ACPI: added table 6/32, length now 60
1866 08:46:29.843610 ACPI: added table 7/32, length now 64
1867 08:46:29.846948 ACPI: * HPET
1868 08:46:29.850626 ACPI: added table 8/32, length now 68
1869 08:46:29.851044 ACPI: done.
1870 08:46:29.853650 ACPI tables: 35216 bytes.
1871 08:46:29.856850 smbios_write_tables: 769ef000
1872 08:46:29.860095 EC returned error result code 3
1873 08:46:29.863475 Couldn't obtain OEM name from CBI
1874 08:46:29.866994 Create SMBIOS type 16
1875 08:46:29.870525 Create SMBIOS type 17
1876 08:46:29.873502 GENERIC: 0.0 (WIFI Device)
1877 08:46:29.873921 SMBIOS tables: 1750 bytes.
1878 08:46:29.880200 Writing table forward entry at 0x00000500
1879 08:46:29.887239 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 08:46:29.890582 Writing coreboot table at 0x76b25000
1881 08:46:29.893779 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 08:46:29.900940 1. 0000000000001000-000000000009ffff: RAM
1883 08:46:29.903478 2. 00000000000a0000-00000000000fffff: RESERVED
1884 08:46:29.907249 3. 0000000000100000-00000000769eefff: RAM
1885 08:46:29.913537 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 08:46:29.920207 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 08:46:29.923577 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 08:46:29.930028 7. 0000000077000000-000000007fbfffff: RESERVED
1889 08:46:29.933660 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 08:46:29.940056 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 08:46:29.943606 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 08:46:29.951070 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 08:46:29.953633 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 08:46:29.960464 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 08:46:29.963183 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 08:46:29.967013 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 08:46:29.973626 16. 0000000100000000-00000002803fffff: RAM
1898 08:46:29.977029 Passing 4 GPIOs to payload:
1899 08:46:29.979939 NAME | PORT | POLARITY | VALUE
1900 08:46:29.986773 lid | undefined | high | high
1901 08:46:29.989781 power | undefined | high | low
1902 08:46:29.996942 oprom | undefined | high | low
1903 08:46:30.000033 EC in RW | 0x000000e5 | high | high
1904 08:46:30.007057 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a670
1905 08:46:30.010071 coreboot table: 1576 bytes.
1906 08:46:30.013389 IMD ROOT 0. 0x76fff000 0x00001000
1907 08:46:30.016750 IMD SMALL 1. 0x76ffe000 0x00001000
1908 08:46:30.023815 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 08:46:30.026580 VPD 3. 0x76c4d000 0x00000367
1910 08:46:30.030408 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 08:46:30.033504 CONSOLE 5. 0x76c2c000 0x00020000
1912 08:46:30.037026 FMAP 6. 0x76c2b000 0x00000578
1913 08:46:30.040587 TIME STAMP 7. 0x76c2a000 0x00000910
1914 08:46:30.043735 VBOOT WORK 8. 0x76c16000 0x00014000
1915 08:46:30.046938 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 08:46:30.053264 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 08:46:30.056691 RAMSTAGE 11. 0x76b97000 0x00073000
1918 08:46:30.059846 REFCODE 12. 0x76b42000 0x00055000
1919 08:46:30.063620 SMM BACKUP 13. 0x76b32000 0x00010000
1920 08:46:30.067249 4f444749 14. 0x76b30000 0x00002000
1921 08:46:30.070073 EXT VBT15. 0x76b2d000 0x0000219f
1922 08:46:30.073754 COREBOOT 16. 0x76b25000 0x00008000
1923 08:46:30.077145 ACPI 17. 0x76b01000 0x00024000
1924 08:46:30.080013 ACPI GNVS 18. 0x76b00000 0x00001000
1925 08:46:30.083200 RAMOOPS 19. 0x76a00000 0x00100000
1926 08:46:30.089955 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 08:46:30.094137 SMBIOS 21. 0x769ef000 0x00000800
1928 08:46:30.094646 IMD small region:
1929 08:46:30.097071 IMD ROOT 0. 0x76ffec00 0x00000400
1930 08:46:30.103341 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 08:46:30.106831 POWER STATE 2. 0x76ffeb80 0x00000044
1932 08:46:30.110315 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 08:46:30.113598 MEM INFO 4. 0x76ffe980 0x000001e0
1934 08:46:30.120175 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1935 08:46:30.123694 MTRR: Physical address space:
1936 08:46:30.130392 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 08:46:30.137129 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 08:46:30.140510 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 08:46:30.147152 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 08:46:30.153618 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 08:46:30.160655 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 08:46:30.167225 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 08:46:30.170460 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 08:46:30.173957 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 08:46:30.180351 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 08:46:30.184052 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 08:46:30.186919 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 08:46:30.190086 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 08:46:30.196442 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 08:46:30.199924 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 08:46:30.202940 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 08:46:30.206414 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 08:46:30.212835 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 08:46:30.216341 call enable_fixed_mtrr()
1955 08:46:30.219934 CPU physical address size: 39 bits
1956 08:46:30.222973 MTRR: default type WB/UC MTRR counts: 6/6.
1957 08:46:30.226360 MTRR: UC selected as default type.
1958 08:46:30.232554 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 08:46:30.239296 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 08:46:30.245888 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 08:46:30.252468 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 08:46:30.259329 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 08:46:30.265946 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 08:46:30.266471
1965 08:46:30.266801 MTRR check
1966 08:46:30.269664 Fixed MTRRs : Enabled
1967 08:46:30.272832 Variable MTRRs: Enabled
1968 08:46:30.273363
1969 08:46:30.276379 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 08:46:30.279659 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 08:46:30.286023 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 08:46:30.289626 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 08:46:30.292782 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 08:46:30.296396 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 08:46:30.299526 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 08:46:30.305924 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 08:46:30.309288 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 08:46:30.312344 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 08:46:30.315813 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 08:46:30.322415 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 08:46:30.325813 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 08:46:30.329542 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 08:46:30.332808 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 08:46:30.339558 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 08:46:30.342483 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 08:46:30.345839 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 08:46:30.349919 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 08:46:30.352613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 08:46:30.359219 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 08:46:30.362750 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 08:46:30.365988 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 08:46:30.372987 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 08:46:30.375782 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 08:46:30.379315 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 08:46:30.383630 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 08:46:30.389291 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 08:46:30.393168 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 08:46:30.395929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 08:46:30.399401 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 08:46:30.406306 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 08:46:30.409852 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 08:46:30.412543 call enable_fixed_mtrr()
2003 08:46:30.416032 call enable_fixed_mtrr()
2004 08:46:30.420228 CPU physical address size: 39 bits
2005 08:46:30.422877 CPU physical address size: 39 bits
2006 08:46:30.426153 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 08:46:30.429778 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 08:46:30.436103 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 08:46:30.439156 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 08:46:30.443187 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 08:46:30.445792 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 08:46:30.452369 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 08:46:30.455773 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 08:46:30.459495 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 08:46:30.462532 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 08:46:30.469009 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 08:46:30.472641 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 08:46:30.475878 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 08:46:30.479157 call enable_fixed_mtrr()
2020 08:46:30.482603 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 08:46:30.489183 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 08:46:30.492798 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 08:46:30.496237 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 08:46:30.499351 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 08:46:30.502386 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 08:46:30.509563 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 08:46:30.512818 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 08:46:30.515981 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 08:46:30.519520 CPU physical address size: 39 bits
2030 08:46:30.526421 call enable_fixed_mtrr()
2031 08:46:30.529532 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2032 08:46:30.533022 call enable_fixed_mtrr()
2033 08:46:30.536856 Checking cr50 for pending updates
2034 08:46:30.540783 CPU physical address size: 39 bits
2035 08:46:30.543954 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 08:46:30.547846 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 08:46:30.550778 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 08:46:30.557608 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 08:46:30.560676 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 08:46:30.564052 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 08:46:30.567259 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 08:46:30.574205 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 08:46:30.577529 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 08:46:30.580421 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 08:46:30.583991 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 08:46:30.590699 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 08:46:30.594266 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 08:46:30.597297 call enable_fixed_mtrr()
2049 08:46:30.600700 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 08:46:30.604311 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 08:46:30.610607 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 08:46:30.614108 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 08:46:30.617192 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 08:46:30.620395 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 08:46:30.623688 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 08:46:30.630501 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 08:46:30.634013 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 08:46:30.637377 CPU physical address size: 39 bits
2059 08:46:30.641437 call enable_fixed_mtrr()
2060 08:46:30.644557 CPU physical address size: 39 bits
2061 08:46:30.647817 CPU physical address size: 39 bits
2062 08:46:30.651009 Reading cr50 TPM mode
2063 08:46:30.661233 BS: BS_PAYLOAD_LOAD entry times (exec / console): 119 / 6 ms
2064 08:46:30.670717 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 08:46:30.674218 Checking segment from ROM address 0xffc02b38
2066 08:46:30.677648 Checking segment from ROM address 0xffc02b54
2067 08:46:30.684257 Loading segment from ROM address 0xffc02b38
2068 08:46:30.684350 code (compression=0)
2069 08:46:30.693719 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 08:46:30.700576 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 08:46:30.703882 it's not compressed!
2072 08:46:30.843333 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 08:46:30.849954 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 08:46:30.856594 Loading segment from ROM address 0xffc02b54
2075 08:46:30.856693 Entry Point 0x30000000
2076 08:46:30.860592 Loaded segments
2077 08:46:30.866449 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2078 08:46:30.909805 Finalizing chipset.
2079 08:46:30.912678 Finalizing SMM.
2080 08:46:30.912770 APMC done.
2081 08:46:30.919290 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 08:46:30.922732 mp_park_aps done after 0 msecs.
2083 08:46:30.926081 Jumping to boot code at 0x30000000(0x76b25000)
2084 08:46:30.935873 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 08:46:30.935995
2086 08:46:30.936061
2087 08:46:30.936120
2088 08:46:30.939548 Starting depthcharge on Voema...
2089 08:46:30.939629
2090 08:46:30.939978 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 08:46:30.940075 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 08:46:30.940158 Setting prompt string to ['volteer:']
2093 08:46:30.940234 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 08:46:30.949158 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 08:46:30.949246
2096 08:46:30.955995 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 08:46:30.956113
2098 08:46:30.959277 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 08:46:30.963344
2100 08:46:30.963455 Failed to find eMMC card reader
2101 08:46:30.963521
2102 08:46:30.966900 Wipe memory regions:
2103 08:46:30.966981
2104 08:46:30.970355 [0x00000000001000, 0x000000000a0000)
2105 08:46:30.970439
2106 08:46:30.973706 [0x00000000100000, 0x00000030000000)
2107 08:46:31.001044
2108 08:46:31.004506 [0x00000032662db0, 0x000000769ef000)
2109 08:46:31.040740
2110 08:46:31.044204 [0x00000100000000, 0x00000280400000)
2111 08:46:31.246566
2112 08:46:31.249597 ec_init: CrosEC protocol v3 supported (256, 256)
2113 08:46:31.249689
2114 08:46:31.256660 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 08:46:31.256768
2116 08:46:31.266400 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 08:46:31.266488
2118 08:46:31.273041 pmc_check_ipc_sts: STS_BUSY done after 1528 us
2119 08:46:31.273153
2120 08:46:31.276422 send_conn_disc_msg: pmc_send_cmd succeeded
2121 08:46:31.709315
2122 08:46:31.709484 R8152: Initializing
2123 08:46:31.709594
2124 08:46:31.712349 Version 6 (ocp_data = 5c30)
2125 08:46:31.712447
2126 08:46:31.715564 R8152: Done initializing
2127 08:46:31.715644
2128 08:46:31.719011 Adding net device
2129 08:46:32.022087
2130 08:46:32.025318 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 08:46:32.025401
2132 08:46:32.025464
2133 08:46:32.025523
2134 08:46:32.029031 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 08:46:32.129414 volteer: tftpboot 192.168.201.1 12243854/tftp-deploy-jqe1vx4o/kernel/bzImage 12243854/tftp-deploy-jqe1vx4o/kernel/cmdline 12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
2137 08:46:32.129582 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 08:46:32.129678 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 08:46:32.134018 tftpboot 192.168.201.1 12243854/tftp-deploy-jqe1vx4o/kernel/bzImloy-jqe1vx4o/kernel/cmdline 12243854/tftp-deploy-jqe1vx4o/ramdisk/ramdisk.cpio.gz
2140 08:46:32.134103
2141 08:46:32.134166 Waiting for link
2142 08:46:32.337458
2143 08:46:32.337629 done.
2144 08:46:32.337696
2145 08:46:32.337784 MAC: 00:24:32:30:7d:bc
2146 08:46:32.337883
2147 08:46:32.340818 Sending DHCP discover... done.
2148 08:46:32.340900
2149 08:46:32.348123 Waiting for reply... done.
2150 08:46:32.348254
2151 08:46:32.351288 Sending DHCP request... done.
2152 08:46:32.351418
2153 08:46:32.351510 Waiting for reply... done.
2154 08:46:32.351568
2155 08:46:32.354536 My ip is 192.168.201.22
2156 08:46:32.354616
2157 08:46:32.357984 The DHCP server ip is 192.168.201.1
2158 08:46:32.358067
2159 08:46:32.364554 TFTP server IP predefined by user: 192.168.201.1
2160 08:46:32.364648
2161 08:46:32.371251 Bootfile predefined by user: 12243854/tftp-deploy-jqe1vx4o/kernel/bzImage
2162 08:46:32.371373
2163 08:46:32.374475 Sending tftp read request... done.
2164 08:46:32.374556
2165 08:46:32.377859 Waiting for the transfer...
2166 08:46:32.377965
2167 08:46:32.913182 00000000 ################################################################
2168 08:46:32.913324
2169 08:46:33.436660 00080000 ################################################################
2170 08:46:33.436795
2171 08:46:33.965572 00100000 ################################################################
2172 08:46:33.965743
2173 08:46:34.485384 00180000 ################################################################
2174 08:46:34.485536
2175 08:46:35.015535 00200000 ################################################################
2176 08:46:35.015705
2177 08:46:35.534979 00280000 ################################################################
2178 08:46:35.535128
2179 08:46:36.059295 00300000 ################################################################
2180 08:46:36.059464
2181 08:46:36.592625 00380000 ################################################################
2182 08:46:36.592782
2183 08:46:37.113221 00400000 ################################################################
2184 08:46:37.113367
2185 08:46:37.639071 00480000 ################################################################
2186 08:46:37.639229
2187 08:46:38.161839 00500000 ################################################################
2188 08:46:38.161987
2189 08:46:38.699934 00580000 ################################################################
2190 08:46:38.700151
2191 08:46:39.218006 00600000 ################################################################
2192 08:46:39.218143
2193 08:46:39.748708 00680000 ################################################################
2194 08:46:39.748851
2195 08:46:40.297383 00700000 ################################################################
2196 08:46:40.297531
2197 08:46:40.879802 00780000 ################################################################
2198 08:46:40.879956
2199 08:46:41.080331 00800000 ####################### done.
2200 08:46:41.080474
2201 08:46:41.083801 The bootfile was 8572816 bytes long.
2202 08:46:41.083892
2203 08:46:41.086834 Sending tftp read request... done.
2204 08:46:41.086922
2205 08:46:41.090048 Waiting for the transfer...
2206 08:46:41.090133
2207 08:46:41.680108 00000000 ################################################################
2208 08:46:41.680249
2209 08:46:42.268074 00080000 ################################################################
2210 08:46:42.268211
2211 08:46:42.859847 00100000 ################################################################
2212 08:46:42.859991
2213 08:46:43.448394 00180000 ################################################################
2214 08:46:43.448533
2215 08:46:44.038809 00200000 ################################################################
2216 08:46:44.038965
2217 08:46:44.588557 00280000 ################################################################
2218 08:46:44.588706
2219 08:46:45.188077 00300000 ################################################################
2220 08:46:45.188236
2221 08:46:45.754976 00380000 ################################################################
2222 08:46:45.755134
2223 08:46:46.331734 00400000 ################################################################
2224 08:46:46.331890
2225 08:46:46.900785 00480000 ################################################################
2226 08:46:46.900940
2227 08:46:47.492283 00500000 ################################################################
2228 08:46:47.492438
2229 08:46:48.074825 00580000 ################################################################
2230 08:46:48.074973
2231 08:46:48.673448 00600000 ################################################################
2232 08:46:48.673593
2233 08:46:49.279824 00680000 ################################################################
2234 08:46:49.279974
2235 08:46:49.874043 00700000 ################################################################
2236 08:46:49.874192
2237 08:46:50.466707 00780000 ################################################################
2238 08:46:50.466861
2239 08:46:50.946449 00800000 ###################################################### done.
2240 08:46:50.946598
2241 08:46:50.950297 Sending tftp read request... done.
2242 08:46:50.950379
2243 08:46:50.953180 Waiting for the transfer...
2244 08:46:50.953262
2245 08:46:50.956438 00000000 # done.
2246 08:46:50.956522
2247 08:46:50.963793 Command line loaded dynamically from TFTP file: 12243854/tftp-deploy-jqe1vx4o/kernel/cmdline
2248 08:46:50.966518
2249 08:46:50.980090 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 08:46:50.985153
2251 08:46:50.988463 Shutting down all USB controllers.
2252 08:46:50.988546
2253 08:46:50.988609 Removing current net device
2254 08:46:50.988668
2255 08:46:50.991794 Finalizing coreboot
2256 08:46:50.991877
2257 08:46:50.998168 Exiting depthcharge with code 4 at timestamp: 28702732
2258 08:46:50.998251
2259 08:46:50.998316
2260 08:46:50.998376 Starting kernel ...
2261 08:46:50.998433
2262 08:46:50.998488
2263 08:46:50.998855 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2264 08:46:50.998951 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2265 08:46:50.999026 Setting prompt string to ['Linux version [0-9]']
2266 08:46:50.999093 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 08:46:50.999164 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 08:51:15.000134 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2271 08:51:15.001218 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2273 08:51:15.002079 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 08:51:15.003695 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 08:51:15.004871 Cleaning after the job
2279 08:51:15.004987 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/ramdisk
2280 08:51:15.006283 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/kernel
2281 08:51:15.007647 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243854/tftp-deploy-jqe1vx4o/modules
2282 08:51:15.007990 start: 5.1 power-off (timeout 00:00:30) [common]
2283 08:51:15.008143 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2284 08:51:15.088029 >> Command sent successfully.
2285 08:51:15.095885 Returned 0 in 0 seconds
2286 08:51:15.197098 end: 5.1 power-off (duration 00:00:00) [common]
2288 08:51:15.198638 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 08:51:15.199965 Listened to connection for namespace 'common' for up to 1s
2290 08:51:16.200404 Finalising connection for namespace 'common'
2291 08:51:16.201240 Disconnecting from shell: Finalise
2292 08:51:16.201664
2293 08:51:16.302794 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 08:51:16.303444 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243854
2295 08:51:16.323023 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243854
2296 08:51:16.323158 JobError: Your job cannot terminate cleanly.