Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:46:26.890344 lava-dispatcher, installed at version: 2023.10
2 08:46:26.890592 start: 0 validate
3 08:46:26.890740 Start time: 2023-12-11 08:46:26.890731+00:00 (UTC)
4 08:46:26.890889 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:46:26.891034 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 08:46:27.162821 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:46:27.163012 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:46:27.429304 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:46:27.429507 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 08:46:27.697792 Using caching service: 'http://localhost/cache/?uri=%s'
11 08:46:27.697983 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 08:46:27.964496 validate duration: 1.07
14 08:46:27.964798 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:46:27.964908 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:46:27.965006 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:46:27.965147 Not decompressing ramdisk as can be used compressed.
18 08:46:27.965239 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 08:46:27.965310 saving as /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/ramdisk/initrd.cpio.gz
20 08:46:27.965380 total size: 5432690 (5 MB)
21 08:46:27.966637 progress 0 % (0 MB)
22 08:46:27.968628 progress 5 % (0 MB)
23 08:46:27.970263 progress 10 % (0 MB)
24 08:46:27.971875 progress 15 % (0 MB)
25 08:46:27.973881 progress 20 % (1 MB)
26 08:46:27.975492 progress 25 % (1 MB)
27 08:46:27.977146 progress 30 % (1 MB)
28 08:46:27.978900 progress 35 % (1 MB)
29 08:46:27.980529 progress 40 % (2 MB)
30 08:46:27.982154 progress 45 % (2 MB)
31 08:46:27.983765 progress 50 % (2 MB)
32 08:46:27.985632 progress 55 % (2 MB)
33 08:46:27.987210 progress 60 % (3 MB)
34 08:46:27.988807 progress 65 % (3 MB)
35 08:46:27.990630 progress 70 % (3 MB)
36 08:46:27.992199 progress 75 % (3 MB)
37 08:46:27.993846 progress 80 % (4 MB)
38 08:46:27.995519 progress 85 % (4 MB)
39 08:46:27.997277 progress 90 % (4 MB)
40 08:46:27.998888 progress 95 % (4 MB)
41 08:46:28.000652 progress 100 % (5 MB)
42 08:46:28.000967 5 MB downloaded in 0.04 s (145.59 MB/s)
43 08:46:28.001212 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:46:28.001647 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:46:28.001777 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:46:28.001909 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:46:28.002095 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 08:46:28.002205 saving as /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/kernel/bzImage
50 08:46:28.002277 total size: 8572816 (8 MB)
51 08:46:28.002347 No compression specified
52 08:46:28.004161 progress 0 % (0 MB)
53 08:46:28.006973 progress 5 % (0 MB)
54 08:46:28.009671 progress 10 % (0 MB)
55 08:46:28.012332 progress 15 % (1 MB)
56 08:46:28.014971 progress 20 % (1 MB)
57 08:46:28.017646 progress 25 % (2 MB)
58 08:46:28.020434 progress 30 % (2 MB)
59 08:46:28.023410 progress 35 % (2 MB)
60 08:46:28.026471 progress 40 % (3 MB)
61 08:46:28.029331 progress 45 % (3 MB)
62 08:46:28.032131 progress 50 % (4 MB)
63 08:46:28.034969 progress 55 % (4 MB)
64 08:46:28.037671 progress 60 % (4 MB)
65 08:46:28.040539 progress 65 % (5 MB)
66 08:46:28.043098 progress 70 % (5 MB)
67 08:46:28.045811 progress 75 % (6 MB)
68 08:46:28.048457 progress 80 % (6 MB)
69 08:46:28.051066 progress 85 % (6 MB)
70 08:46:28.053655 progress 90 % (7 MB)
71 08:46:28.056253 progress 95 % (7 MB)
72 08:46:28.058818 progress 100 % (8 MB)
73 08:46:28.059086 8 MB downloaded in 0.06 s (143.93 MB/s)
74 08:46:28.059258 end: 1.2.1 http-download (duration 00:00:00) [common]
76 08:46:28.059534 end: 1.2 download-retry (duration 00:00:00) [common]
77 08:46:28.059636 start: 1.3 download-retry (timeout 00:10:00) [common]
78 08:46:28.059744 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 08:46:28.059907 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 08:46:28.059983 saving as /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/nfsrootfs/full.rootfs.tar
81 08:46:28.060055 total size: 133380384 (127 MB)
82 08:46:28.060130 Using unxz to decompress xz
83 08:46:28.064515 progress 0 % (0 MB)
84 08:46:28.467707 progress 5 % (6 MB)
85 08:46:28.874350 progress 10 % (12 MB)
86 08:46:29.213109 progress 15 % (19 MB)
87 08:46:29.427526 progress 20 % (25 MB)
88 08:46:29.726719 progress 25 % (31 MB)
89 08:46:30.145223 progress 30 % (38 MB)
90 08:46:30.554910 progress 35 % (44 MB)
91 08:46:31.034656 progress 40 % (50 MB)
92 08:46:31.488184 progress 45 % (57 MB)
93 08:46:31.910288 progress 50 % (63 MB)
94 08:46:32.353660 progress 55 % (69 MB)
95 08:46:32.780417 progress 60 % (76 MB)
96 08:46:33.196125 progress 65 % (82 MB)
97 08:46:33.615921 progress 70 % (89 MB)
98 08:46:34.043192 progress 75 % (95 MB)
99 08:46:34.556077 progress 80 % (101 MB)
100 08:46:35.063689 progress 85 % (108 MB)
101 08:46:35.370815 progress 90 % (114 MB)
102 08:46:35.773904 progress 95 % (120 MB)
103 08:46:36.231006 progress 100 % (127 MB)
104 08:46:36.237058 127 MB downloaded in 8.18 s (15.56 MB/s)
105 08:46:36.237350 end: 1.3.1 http-download (duration 00:00:08) [common]
107 08:46:36.237657 end: 1.3 download-retry (duration 00:00:08) [common]
108 08:46:36.237759 start: 1.4 download-retry (timeout 00:09:52) [common]
109 08:46:36.237856 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 08:46:36.238029 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 08:46:36.238112 saving as /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/modules/modules.tar
112 08:46:36.238182 total size: 251012 (0 MB)
113 08:46:36.238254 Using unxz to decompress xz
114 08:46:36.243198 progress 13 % (0 MB)
115 08:46:36.243676 progress 26 % (0 MB)
116 08:46:36.243998 progress 39 % (0 MB)
117 08:46:36.245799 progress 52 % (0 MB)
118 08:46:36.248010 progress 65 % (0 MB)
119 08:46:36.250189 progress 78 % (0 MB)
120 08:46:36.252240 progress 91 % (0 MB)
121 08:46:36.254532 progress 100 % (0 MB)
122 08:46:36.260951 0 MB downloaded in 0.02 s (10.52 MB/s)
123 08:46:36.261276 end: 1.4.1 http-download (duration 00:00:00) [common]
125 08:46:36.261747 end: 1.4 download-retry (duration 00:00:00) [common]
126 08:46:36.261897 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 08:46:36.262047 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 08:46:39.068966 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243849/extract-nfsrootfs-fdf3x9cw
129 08:46:39.069178 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 08:46:39.069292 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 08:46:39.069489 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w
132 08:46:39.069681 makedir: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin
133 08:46:39.069829 makedir: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/tests
134 08:46:39.069983 makedir: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/results
135 08:46:39.070138 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-add-keys
136 08:46:39.070341 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-add-sources
137 08:46:39.070544 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-background-process-start
138 08:46:39.070738 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-background-process-stop
139 08:46:39.070933 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-common-functions
140 08:46:39.071133 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-echo-ipv4
141 08:46:39.071322 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-install-packages
142 08:46:39.071511 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-installed-packages
143 08:46:39.071694 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-os-build
144 08:46:39.071873 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-probe-channel
145 08:46:39.072058 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-probe-ip
146 08:46:39.072237 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-target-ip
147 08:46:39.072407 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-target-mac
148 08:46:39.072564 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-target-storage
149 08:46:39.072713 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-case
150 08:46:39.072861 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-event
151 08:46:39.073001 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-feedback
152 08:46:39.073157 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-raise
153 08:46:39.073299 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-reference
154 08:46:39.073445 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-runner
155 08:46:39.073586 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-set
156 08:46:39.073737 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-test-shell
157 08:46:39.073889 Updating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-install-packages (oe)
158 08:46:39.074069 Updating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/bin/lava-installed-packages (oe)
159 08:46:39.074215 Creating /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/environment
160 08:46:39.074324 LAVA metadata
161 08:46:39.074415 - LAVA_JOB_ID=12243849
162 08:46:39.074492 - LAVA_DISPATCHER_IP=192.168.201.1
163 08:46:39.074632 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 08:46:39.074711 skipped lava-vland-overlay
165 08:46:39.074795 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 08:46:39.074889 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 08:46:39.074958 skipped lava-multinode-overlay
168 08:46:39.075057 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 08:46:39.075172 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 08:46:39.075290 Loading test definitions
171 08:46:39.075440 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 08:46:39.075554 Using /lava-12243849 at stage 0
173 08:46:39.075934 uuid=12243849_1.5.2.3.1 testdef=None
174 08:46:39.076032 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 08:46:39.076128 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 08:46:39.076796 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 08:46:39.077064 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 08:46:39.077938 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 08:46:39.078353 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 08:46:39.079396 runner path: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/0/tests/0_dmesg test_uuid 12243849_1.5.2.3.1
183 08:46:39.079652 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 08:46:39.080059 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 08:46:39.080187 Using /lava-12243849 at stage 1
187 08:46:39.080633 uuid=12243849_1.5.2.3.5 testdef=None
188 08:46:39.080763 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 08:46:39.080867 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 08:46:39.081452 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 08:46:39.081836 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 08:46:39.082804 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 08:46:39.083065 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 08:46:39.083814 runner path: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/1/tests/1_bootrr test_uuid 12243849_1.5.2.3.5
197 08:46:39.084012 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 08:46:39.084415 Creating lava-test-runner.conf files
200 08:46:39.084501 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/0 for stage 0
201 08:46:39.084629 - 0_dmesg
202 08:46:39.084752 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243849/lava-overlay-2hj5bp0w/lava-12243849/1 for stage 1
203 08:46:39.084897 - 1_bootrr
204 08:46:39.085045 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 08:46:39.085187 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 08:46:39.095308 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 08:46:39.095506 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 08:46:39.095642 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 08:46:39.095777 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 08:46:39.095912 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 08:46:39.258042 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 08:46:39.258498 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 08:46:39.258664 extracting modules file /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243849/extract-nfsrootfs-fdf3x9cw
214 08:46:39.280321 extracting modules file /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243849/extract-overlay-ramdisk-tpqy2w7f/ramdisk
215 08:46:39.300161 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 08:46:39.300361 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 08:46:39.300473 [common] Applying overlay to NFS
218 08:46:39.300551 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243849/compress-overlay-svw632u0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243849/extract-nfsrootfs-fdf3x9cw
219 08:46:39.313523 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 08:46:39.313714 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 08:46:39.313855 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 08:46:39.313991 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 08:46:39.314116 Building ramdisk /var/lib/lava/dispatcher/tmp/12243849/extract-overlay-ramdisk-tpqy2w7f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243849/extract-overlay-ramdisk-tpqy2w7f/ramdisk
224 08:46:39.399310 >> 26162 blocks
225 08:46:40.026930 rename /var/lib/lava/dispatcher/tmp/12243849/extract-overlay-ramdisk-tpqy2w7f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
226 08:46:40.027532 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 08:46:40.027727 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 08:46:40.027895 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 08:46:40.028050 No mkimage arch provided, not using FIT.
230 08:46:40.028194 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 08:46:40.028345 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 08:46:40.028526 end: 1.5 prepare-tftp-overlay (duration 00:00:04) [common]
233 08:46:40.028684 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 08:46:40.028823 No LXC device requested
235 08:46:40.028961 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 08:46:40.029108 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 08:46:40.029257 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 08:46:40.029392 Checking files for TFTP limit of 4294967296 bytes.
239 08:46:40.030031 end: 1 tftp-deploy (duration 00:00:12) [common]
240 08:46:40.030194 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 08:46:40.030352 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 08:46:40.030547 substitutions:
243 08:46:40.030662 - {DTB}: None
244 08:46:40.030768 - {INITRD}: 12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
245 08:46:40.030877 - {KERNEL}: 12243849/tftp-deploy-ajjnj4zb/kernel/bzImage
246 08:46:40.030981 - {LAVA_MAC}: None
247 08:46:40.031083 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243849/extract-nfsrootfs-fdf3x9cw
248 08:46:40.031185 - {NFS_SERVER_IP}: 192.168.201.1
249 08:46:40.031288 - {PRESEED_CONFIG}: None
250 08:46:40.031397 - {PRESEED_LOCAL}: None
251 08:46:40.031495 - {RAMDISK}: 12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
252 08:46:40.031597 - {ROOT_PART}: None
253 08:46:40.031704 - {ROOT}: None
254 08:46:40.031811 - {SERVER_IP}: 192.168.201.1
255 08:46:40.031917 - {TEE}: None
256 08:46:40.032017 Parsed boot commands:
257 08:46:40.032119 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 08:46:40.032397 Parsed boot commands: tftpboot 192.168.201.1 12243849/tftp-deploy-ajjnj4zb/kernel/bzImage 12243849/tftp-deploy-ajjnj4zb/kernel/cmdline 12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
259 08:46:40.032543 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 08:46:40.032687 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 08:46:40.032842 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 08:46:40.033000 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 08:46:40.033125 Not connected, no need to disconnect.
264 08:46:40.033251 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 08:46:40.033393 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 08:46:40.033512 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 08:46:40.038426 Setting prompt string to ['lava-test: # ']
268 08:46:40.038959 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 08:46:40.039135 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 08:46:40.039301 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 08:46:40.039456 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 08:46:40.039787 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 08:46:45.182762 >> Command sent successfully.
274 08:46:45.185890 Returned 0 in 5 seconds
275 08:46:45.286281 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 08:46:45.286627 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 08:46:45.286738 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 08:46:45.286839 Setting prompt string to 'Starting depthcharge on Helios...'
280 08:46:45.286914 Changing prompt to 'Starting depthcharge on Helios...'
281 08:46:45.286999 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 08:46:45.287291 [Enter `^Ec?' for help]
283 08:46:45.907500
284 08:46:45.907656
285 08:46:45.917544 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 08:46:45.920781 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 08:46:45.927656 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 08:46:45.930967 CPU: AES supported, TXT NOT supported, VT supported
289 08:46:45.938371 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 08:46:45.941514 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 08:46:45.948084 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 08:46:45.951564 VBOOT: Loading verstage.
293 08:46:45.954941 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 08:46:45.961469 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 08:46:45.964585 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 08:46:45.968027 CBFS @ c08000 size 3f8000
297 08:46:45.974856 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 08:46:45.977803 CBFS: Locating 'fallback/verstage'
299 08:46:45.981054 CBFS: Found @ offset 10fb80 size 1072c
300 08:46:45.981152
301 08:46:45.984525
302 08:46:45.994449 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 08:46:46.008391 Probing TPM: . done!
304 08:46:46.011693 TPM ready after 0 ms
305 08:46:46.015260 Connected to device vid:did:rid of 1ae0:0028:00
306 08:46:46.025189 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 08:46:46.029129 Initialized TPM device CR50 revision 0
308 08:46:46.074765 tlcl_send_startup: Startup return code is 0
309 08:46:46.074877 TPM: setup succeeded
310 08:46:46.087243 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 08:46:46.091477 Chrome EC: UHEPI supported
312 08:46:46.094634 Phase 1
313 08:46:46.098193 FMAP: area GBB found @ c05000 (12288 bytes)
314 08:46:46.104562 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 08:46:46.104663 Phase 2
316 08:46:46.107840 Phase 3
317 08:46:46.111146 FMAP: area GBB found @ c05000 (12288 bytes)
318 08:46:46.117597 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 08:46:46.124287 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 08:46:46.127927 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 08:46:46.134344 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 08:46:46.149920 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 08:46:46.153162 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 08:46:46.159615 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 08:46:46.164216 Phase 4
326 08:46:46.167467 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 08:46:46.174102 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 08:46:46.353570 VB2:vb2_rsa_verify_digest() Digest check failed!
329 08:46:46.360254 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 08:46:46.360354 Saving nvdata
331 08:46:46.363440 Reboot requested (10020007)
332 08:46:46.366572 board_reset() called!
333 08:46:46.366693 full_reset() called!
334 08:46:50.874749
335 08:46:50.874915
336 08:46:50.884734 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 08:46:50.888729 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 08:46:50.894444 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 08:46:50.898568 CPU: AES supported, TXT NOT supported, VT supported
340 08:46:50.904607 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 08:46:50.907773 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 08:46:50.915022 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 08:46:50.918106 VBOOT: Loading verstage.
344 08:46:50.921613 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 08:46:50.928217 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 08:46:50.931017 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 08:46:50.934981 CBFS @ c08000 size 3f8000
348 08:46:50.941324 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 08:46:50.944459 CBFS: Locating 'fallback/verstage'
350 08:46:50.948199 CBFS: Found @ offset 10fb80 size 1072c
351 08:46:50.951582
352 08:46:50.951679
353 08:46:50.961294 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 08:46:50.975607 Probing TPM: . done!
355 08:46:50.979479 TPM ready after 0 ms
356 08:46:50.982569 Connected to device vid:did:rid of 1ae0:0028:00
357 08:46:50.992794 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 08:46:50.996445 Initialized TPM device CR50 revision 0
359 08:46:51.042049 tlcl_send_startup: Startup return code is 0
360 08:46:51.042164 TPM: setup succeeded
361 08:46:51.054958 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 08:46:51.058388 Chrome EC: UHEPI supported
363 08:46:51.061661 Phase 1
364 08:46:51.065217 FMAP: area GBB found @ c05000 (12288 bytes)
365 08:46:51.071569 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 08:46:51.078543 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 08:46:51.081968 Recovery requested (1009000e)
368 08:46:51.087045 Saving nvdata
369 08:46:51.093538 tlcl_extend: response is 0
370 08:46:51.102723 tlcl_extend: response is 0
371 08:46:51.109221 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 08:46:51.112453 CBFS @ c08000 size 3f8000
373 08:46:51.119664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 08:46:51.122784 CBFS: Locating 'fallback/romstage'
375 08:46:51.125749 CBFS: Found @ offset 80 size 145fc
376 08:46:51.129498 Accumulated console time in verstage 98 ms
377 08:46:51.129619
378 08:46:51.129728
379 08:46:51.142554 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 08:46:51.145850 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 08:46:51.153307 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 08:46:51.156146 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 08:46:51.159976 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 08:46:51.166481 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 08:46:51.169497 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 08:46:51.173151 TCO_STS: 0000 0000
387 08:46:51.176314 GEN_PMCON: e0015238 00000200
388 08:46:51.179465 GBLRST_CAUSE: 00000000 00000000
389 08:46:51.179573 prev_sleep_state 5
390 08:46:51.183479 Boot Count incremented to 66882
391 08:46:51.189357 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 08:46:51.192984 CBFS @ c08000 size 3f8000
393 08:46:51.196647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 08:46:51.200004 CBFS: Locating 'fspm.bin'
395 08:46:51.202587 CBFS: Found @ offset 5ffc0 size 71000
396 08:46:51.206593 Chrome EC: UHEPI supported
397 08:46:51.213823 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 08:46:51.219243 Probing TPM: done!
399 08:46:51.225812 Connected to device vid:did:rid of 1ae0:0028:00
400 08:46:51.235915 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 08:46:51.241448 Initialized TPM device CR50 revision 0
402 08:46:51.250319 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 08:46:51.256808 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 08:46:51.260549 MRC cache found, size 1948
405 08:46:51.263602 bootmode is set to: 2
406 08:46:51.267343 PRMRR disabled by config.
407 08:46:51.267460 SPD INDEX = 1
408 08:46:51.273679 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 08:46:51.277021 CBFS @ c08000 size 3f8000
410 08:46:51.283866 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 08:46:51.283985 CBFS: Locating 'spd.bin'
412 08:46:51.286950 CBFS: Found @ offset 5fb80 size 400
413 08:46:51.290380 SPD: module type is LPDDR3
414 08:46:51.293814 SPD: module part is
415 08:46:51.300051 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 08:46:51.303685 SPD: device width 4 bits, bus width 8 bits
417 08:46:51.306812 SPD: module size is 4096 MB (per channel)
418 08:46:51.310073 memory slot: 0 configuration done.
419 08:46:51.313446 memory slot: 2 configuration done.
420 08:46:51.364513 CBMEM:
421 08:46:51.367639 IMD: root @ 99fff000 254 entries.
422 08:46:51.371314 IMD: root @ 99ffec00 62 entries.
423 08:46:51.374333 External stage cache:
424 08:46:51.377503 IMD: root @ 9abff000 254 entries.
425 08:46:51.380810 IMD: root @ 9abfec00 62 entries.
426 08:46:51.384067 Chrome EC: clear events_b mask to 0x0000000020004000
427 08:46:51.400838 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 08:46:51.413892 tlcl_write: response is 0
429 08:46:51.422647 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 08:46:51.429305 MRC: TPM MRC hash updated successfully.
431 08:46:51.429423 2 DIMMs found
432 08:46:51.433103 SMM Memory Map
433 08:46:51.436332 SMRAM : 0x9a000000 0x1000000
434 08:46:51.439635 Subregion 0: 0x9a000000 0xa00000
435 08:46:51.442916 Subregion 1: 0x9aa00000 0x200000
436 08:46:51.446112 Subregion 2: 0x9ac00000 0x400000
437 08:46:51.449801 top_of_ram = 0x9a000000
438 08:46:51.452432 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 08:46:51.459154 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 08:46:51.462807 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 08:46:51.469348 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 08:46:51.472321 CBFS @ c08000 size 3f8000
443 08:46:51.476004 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 08:46:51.478918 CBFS: Locating 'fallback/postcar'
445 08:46:51.485679 CBFS: Found @ offset 107000 size 4b44
446 08:46:51.488982 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 08:46:51.501218 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 08:46:51.504457 Processing 180 relocs. Offset value of 0x97c0c000
449 08:46:51.513244 Accumulated console time in romstage 286 ms
450 08:46:51.513338
451 08:46:51.513428
452 08:46:51.523453 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 08:46:51.529818 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 08:46:51.532963 CBFS @ c08000 size 3f8000
455 08:46:51.536367 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 08:46:51.542835 CBFS: Locating 'fallback/ramstage'
457 08:46:51.546138 CBFS: Found @ offset 43380 size 1b9e8
458 08:46:51.552574 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 08:46:51.585044 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 08:46:51.588124 Processing 3976 relocs. Offset value of 0x98db0000
461 08:46:51.594600 Accumulated console time in postcar 52 ms
462 08:46:51.594718
463 08:46:51.594830
464 08:46:51.604834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 08:46:51.612064 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 08:46:51.615103 WARNING: RO_VPD is uninitialized or empty.
467 08:46:51.617926 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 08:46:51.625004 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 08:46:51.625125 Normal boot.
470 08:46:51.631325 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 08:46:51.634909 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 08:46:51.638452 CBFS @ c08000 size 3f8000
473 08:46:51.644672 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 08:46:51.648695 CBFS: Locating 'cpu_microcode_blob.bin'
475 08:46:51.651815 CBFS: Found @ offset 14700 size 2ec00
476 08:46:51.655032 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 08:46:51.658458 Skip microcode update
478 08:46:51.661354 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 08:46:51.665030 CBFS @ c08000 size 3f8000
480 08:46:51.671499 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 08:46:51.674627 CBFS: Locating 'fsps.bin'
482 08:46:51.678016 CBFS: Found @ offset d1fc0 size 35000
483 08:46:51.703169 Detected 4 core, 8 thread CPU.
484 08:46:51.706195 Setting up SMI for CPU
485 08:46:51.709955 IED base = 0x9ac00000
486 08:46:51.710079 IED size = 0x00400000
487 08:46:51.713060 Will perform SMM setup.
488 08:46:51.719681 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 08:46:51.726648 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 08:46:51.729500 Processing 16 relocs. Offset value of 0x00030000
491 08:46:51.733352 Attempting to start 7 APs
492 08:46:51.736677 Waiting for 10ms after sending INIT.
493 08:46:51.753064 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 08:46:51.753188 done.
495 08:46:51.756028 AP: slot 5 apic_id 6.
496 08:46:51.759364 AP: slot 2 apic_id 7.
497 08:46:51.759461 AP: slot 1 apic_id 3.
498 08:46:51.762581 AP: slot 4 apic_id 2.
499 08:46:51.765891 Waiting for 2nd SIPI to complete...done.
500 08:46:51.769558 AP: slot 7 apic_id 4.
501 08:46:51.772854 AP: slot 6 apic_id 5.
502 08:46:51.779322 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 08:46:51.785639 Processing 13 relocs. Offset value of 0x00038000
504 08:46:51.788850 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 08:46:51.795996 Installing SMM handler to 0x9a000000
506 08:46:51.802096 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 08:46:51.805362 Processing 658 relocs. Offset value of 0x9a010000
508 08:46:51.815789 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 08:46:51.819092 Processing 13 relocs. Offset value of 0x9a008000
510 08:46:51.825502 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 08:46:51.832753 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 08:46:51.835813 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 08:46:51.842360 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 08:46:51.848809 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 08:46:51.855362 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 08:46:51.858995 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 08:46:51.865942 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 08:46:51.869298 Clearing SMI status registers
519 08:46:51.872413 SMI_STS: PM1
520 08:46:51.872502 PM1_STS: PWRBTN
521 08:46:51.875629 TCO_STS: SECOND_TO
522 08:46:51.878620 New SMBASE 0x9a000000
523 08:46:51.882329 In relocation handler: CPU 0
524 08:46:51.885350 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 08:46:51.888824 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 08:46:51.891988 Relocation complete.
527 08:46:51.895987 New SMBASE 0x99fff400
528 08:46:51.896104 In relocation handler: CPU 3
529 08:46:51.902312 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 08:46:51.905283 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 08:46:51.909087 Relocation complete.
532 08:46:51.909209 New SMBASE 0x99ffe800
533 08:46:51.911863 In relocation handler: CPU 6
534 08:46:51.919048 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 08:46:51.922057 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 08:46:51.925518 Relocation complete.
537 08:46:51.925641 New SMBASE 0x99ffe400
538 08:46:51.928674 In relocation handler: CPU 7
539 08:46:51.932548 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
540 08:46:51.939170 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 08:46:51.942344 Relocation complete.
542 08:46:51.942442 New SMBASE 0x99fff000
543 08:46:51.945826 In relocation handler: CPU 4
544 08:46:51.949045 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
545 08:46:51.955501 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 08:46:51.955626 Relocation complete.
547 08:46:51.958880 New SMBASE 0x99fffc00
548 08:46:51.962192 In relocation handler: CPU 1
549 08:46:51.965487 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
550 08:46:51.972849 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 08:46:51.972940 Relocation complete.
552 08:46:51.975624 New SMBASE 0x99fff800
553 08:46:51.978915 In relocation handler: CPU 2
554 08:46:51.981990 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
555 08:46:51.988877 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 08:46:51.988966 Relocation complete.
557 08:46:51.991699 New SMBASE 0x99ffec00
558 08:46:51.995459 In relocation handler: CPU 5
559 08:46:51.998971 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 08:46:52.005071 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 08:46:52.005159 Relocation complete.
562 08:46:52.008383 Initializing CPU #0
563 08:46:52.012188 CPU: vendor Intel device 806ec
564 08:46:52.015151 CPU: family 06, model 8e, stepping 0c
565 08:46:52.018593 Clearing out pending MCEs
566 08:46:52.021581 Setting up local APIC...
567 08:46:52.021699 apic_id: 0x00 done.
568 08:46:52.025019 Turbo is available but hidden
569 08:46:52.028253 Turbo is available and visible
570 08:46:52.031987 VMX status: enabled
571 08:46:52.035001 IA32_FEATURE_CONTROL status: locked
572 08:46:52.038452 Skip microcode update
573 08:46:52.038542 CPU #0 initialized
574 08:46:52.041688 Initializing CPU #3
575 08:46:52.041774 Initializing CPU #5
576 08:46:52.044934 Initializing CPU #2
577 08:46:52.048341 CPU: vendor Intel device 806ec
578 08:46:52.051666 CPU: family 06, model 8e, stepping 0c
579 08:46:52.054951 CPU: vendor Intel device 806ec
580 08:46:52.058001 CPU: family 06, model 8e, stepping 0c
581 08:46:52.061367 Initializing CPU #4
582 08:46:52.061451 Initializing CPU #1
583 08:46:52.065285 CPU: vendor Intel device 806ec
584 08:46:52.071879 CPU: family 06, model 8e, stepping 0c
585 08:46:52.071972 CPU: vendor Intel device 806ec
586 08:46:52.078193 CPU: family 06, model 8e, stepping 0c
587 08:46:52.078282 Clearing out pending MCEs
588 08:46:52.081314 Clearing out pending MCEs
589 08:46:52.084446 Setting up local APIC...
590 08:46:52.088166 Initializing CPU #6
591 08:46:52.088285 Initializing CPU #7
592 08:46:52.090987 CPU: vendor Intel device 806ec
593 08:46:52.094973 CPU: family 06, model 8e, stepping 0c
594 08:46:52.098024 CPU: vendor Intel device 806ec
595 08:46:52.101083 CPU: family 06, model 8e, stepping 0c
596 08:46:52.104535 Clearing out pending MCEs
597 08:46:52.108066 Clearing out pending MCEs
598 08:46:52.111170 Setting up local APIC...
599 08:46:52.111288 Setting up local APIC...
600 08:46:52.114374 Setting up local APIC...
601 08:46:52.117738 CPU: vendor Intel device 806ec
602 08:46:52.121320 CPU: family 06, model 8e, stepping 0c
603 08:46:52.124121 Clearing out pending MCEs
604 08:46:52.127911 apic_id: 0x02 done.
605 08:46:52.128028 apic_id: 0x03 done.
606 08:46:52.131044 VMX status: enabled
607 08:46:52.134063 VMX status: enabled
608 08:46:52.137913 IA32_FEATURE_CONTROL status: locked
609 08:46:52.141236 IA32_FEATURE_CONTROL status: locked
610 08:46:52.141322 Skip microcode update
611 08:46:52.144147 Setting up local APIC...
612 08:46:52.147355 CPU #4 initialized
613 08:46:52.150646 Skip microcode update
614 08:46:52.150761 apic_id: 0x01 done.
615 08:46:52.153949 CPU #1 initialized
616 08:46:52.157905 Clearing out pending MCEs
617 08:46:52.158018 Clearing out pending MCEs
618 08:46:52.160940 Setting up local APIC...
619 08:46:52.164258 VMX status: enabled
620 08:46:52.164342 apic_id: 0x06 done.
621 08:46:52.167366 apic_id: 0x07 done.
622 08:46:52.170715 VMX status: enabled
623 08:46:52.170799 VMX status: enabled
624 08:46:52.173957 IA32_FEATURE_CONTROL status: locked
625 08:46:52.177892 IA32_FEATURE_CONTROL status: locked
626 08:46:52.181199 Skip microcode update
627 08:46:52.184275 Skip microcode update
628 08:46:52.187544 IA32_FEATURE_CONTROL status: locked
629 08:46:52.187631 CPU #5 initialized
630 08:46:52.190822 CPU #2 initialized
631 08:46:52.194175 Skip microcode update
632 08:46:52.194291 Setting up local APIC...
633 08:46:52.197237 CPU #3 initialized
634 08:46:52.200876 apic_id: 0x04 done.
635 08:46:52.200962 apic_id: 0x05 done.
636 08:46:52.203651 VMX status: enabled
637 08:46:52.207133 VMX status: enabled
638 08:46:52.210308 IA32_FEATURE_CONTROL status: locked
639 08:46:52.213944 IA32_FEATURE_CONTROL status: locked
640 08:46:52.214074 Skip microcode update
641 08:46:52.217552 Skip microcode update
642 08:46:52.220647 CPU #7 initialized
643 08:46:52.220765 CPU #6 initialized
644 08:46:52.227116 bsp_do_flight_plan done after 456 msecs.
645 08:46:52.227236 CPU: frequency set to 4200 MHz
646 08:46:52.230144 Enabling SMIs.
647 08:46:52.230238 Locking SMM.
648 08:46:52.246700 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 08:46:52.249851 CBFS @ c08000 size 3f8000
650 08:46:52.256389 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 08:46:52.256483 CBFS: Locating 'vbt.bin'
652 08:46:52.259738 CBFS: Found @ offset 5f5c0 size 499
653 08:46:52.266761 Found a VBT of 4608 bytes after decompression
654 08:46:52.449690 Display FSP Version Info HOB
655 08:46:52.452938 Reference Code - CPU = 9.0.1e.30
656 08:46:52.456539 uCode Version = 0.0.0.ca
657 08:46:52.459473 TXT ACM version = ff.ff.ff.ffff
658 08:46:52.463219 Display FSP Version Info HOB
659 08:46:52.465912 Reference Code - ME = 9.0.1e.30
660 08:46:52.469395 MEBx version = 0.0.0.0
661 08:46:52.472791 ME Firmware Version = Consumer SKU
662 08:46:52.476058 Display FSP Version Info HOB
663 08:46:52.479748 Reference Code - CML PCH = 9.0.1e.30
664 08:46:52.479868 PCH-CRID Status = Disabled
665 08:46:52.486177 PCH-CRID Original Value = ff.ff.ff.ffff
666 08:46:52.489949 PCH-CRID New Value = ff.ff.ff.ffff
667 08:46:52.492624 OPROM - RST - RAID = ff.ff.ff.ffff
668 08:46:52.495958 ChipsetInit Base Version = ff.ff.ff.ffff
669 08:46:52.499696 ChipsetInit Oem Version = ff.ff.ff.ffff
670 08:46:52.502947 Display FSP Version Info HOB
671 08:46:52.506109 Reference Code - SA - System Agent = 9.0.1e.30
672 08:46:52.509302 Reference Code - MRC = 0.7.1.6c
673 08:46:52.513321 SA - PCIe Version = 9.0.1e.30
674 08:46:52.516727 SA-CRID Status = Disabled
675 08:46:52.519927 SA-CRID Original Value = 0.0.0.c
676 08:46:52.522937 SA-CRID New Value = 0.0.0.c
677 08:46:52.526080 OPROM - VBIOS = ff.ff.ff.ffff
678 08:46:52.526195 RTC Init
679 08:46:52.532861 Set power on after power failure.
680 08:46:52.532950 Disabling Deep S3
681 08:46:52.536155 Disabling Deep S3
682 08:46:52.536274 Disabling Deep S4
683 08:46:52.539225 Disabling Deep S4
684 08:46:52.539325 Disabling Deep S5
685 08:46:52.542737 Disabling Deep S5
686 08:46:52.549313 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
687 08:46:52.549437 Enumerating buses...
688 08:46:52.555960 Show all devs... Before device enumeration.
689 08:46:52.556053 Root Device: enabled 1
690 08:46:52.559559 CPU_CLUSTER: 0: enabled 1
691 08:46:52.562633 DOMAIN: 0000: enabled 1
692 08:46:52.562759 APIC: 00: enabled 1
693 08:46:52.566192 PCI: 00:00.0: enabled 1
694 08:46:52.569439 PCI: 00:02.0: enabled 1
695 08:46:52.572636 PCI: 00:04.0: enabled 0
696 08:46:52.572760 PCI: 00:05.0: enabled 0
697 08:46:52.576221 PCI: 00:12.0: enabled 1
698 08:46:52.579011 PCI: 00:12.5: enabled 0
699 08:46:52.582687 PCI: 00:12.6: enabled 0
700 08:46:52.582807 PCI: 00:14.0: enabled 1
701 08:46:52.586200 PCI: 00:14.1: enabled 0
702 08:46:52.589389 PCI: 00:14.3: enabled 1
703 08:46:52.592422 PCI: 00:14.5: enabled 0
704 08:46:52.592508 PCI: 00:15.0: enabled 1
705 08:46:52.595826 PCI: 00:15.1: enabled 1
706 08:46:52.598930 PCI: 00:15.2: enabled 0
707 08:46:52.599051 PCI: 00:15.3: enabled 0
708 08:46:52.602413 PCI: 00:16.0: enabled 1
709 08:46:52.606114 PCI: 00:16.1: enabled 0
710 08:46:52.609362 PCI: 00:16.2: enabled 0
711 08:46:52.609479 PCI: 00:16.3: enabled 0
712 08:46:52.612637 PCI: 00:16.4: enabled 0
713 08:46:52.615904 PCI: 00:16.5: enabled 0
714 08:46:52.619035 PCI: 00:17.0: enabled 1
715 08:46:52.619156 PCI: 00:19.0: enabled 1
716 08:46:52.622345 PCI: 00:19.1: enabled 0
717 08:46:52.625556 PCI: 00:19.2: enabled 0
718 08:46:52.628799 PCI: 00:1a.0: enabled 0
719 08:46:52.628887 PCI: 00:1c.0: enabled 0
720 08:46:52.632581 PCI: 00:1c.1: enabled 0
721 08:46:52.635626 PCI: 00:1c.2: enabled 0
722 08:46:52.635745 PCI: 00:1c.3: enabled 0
723 08:46:52.638806 PCI: 00:1c.4: enabled 0
724 08:46:52.642088 PCI: 00:1c.5: enabled 0
725 08:46:52.646009 PCI: 00:1c.6: enabled 0
726 08:46:52.646127 PCI: 00:1c.7: enabled 0
727 08:46:52.649126 PCI: 00:1d.0: enabled 1
728 08:46:52.652414 PCI: 00:1d.1: enabled 0
729 08:46:52.655626 PCI: 00:1d.2: enabled 0
730 08:46:52.655752 PCI: 00:1d.3: enabled 0
731 08:46:52.659218 PCI: 00:1d.4: enabled 0
732 08:46:52.662045 PCI: 00:1d.5: enabled 1
733 08:46:52.665704 PCI: 00:1e.0: enabled 1
734 08:46:52.665798 PCI: 00:1e.1: enabled 0
735 08:46:52.668768 PCI: 00:1e.2: enabled 1
736 08:46:52.672207 PCI: 00:1e.3: enabled 1
737 08:46:52.672313 PCI: 00:1f.0: enabled 1
738 08:46:52.675756 PCI: 00:1f.1: enabled 1
739 08:46:52.678559 PCI: 00:1f.2: enabled 1
740 08:46:52.681873 PCI: 00:1f.3: enabled 1
741 08:46:52.681996 PCI: 00:1f.4: enabled 1
742 08:46:52.685465 PCI: 00:1f.5: enabled 1
743 08:46:52.688830 PCI: 00:1f.6: enabled 0
744 08:46:52.692319 USB0 port 0: enabled 1
745 08:46:52.692434 I2C: 00:15: enabled 1
746 08:46:52.695648 I2C: 00:5d: enabled 1
747 08:46:52.698989 GENERIC: 0.0: enabled 1
748 08:46:52.699105 I2C: 00:1a: enabled 1
749 08:46:52.701841 I2C: 00:38: enabled 1
750 08:46:52.705086 I2C: 00:39: enabled 1
751 08:46:52.705197 I2C: 00:3a: enabled 1
752 08:46:52.708566 I2C: 00:3b: enabled 1
753 08:46:52.711763 PCI: 00:00.0: enabled 1
754 08:46:52.711881 SPI: 00: enabled 1
755 08:46:52.715723 SPI: 01: enabled 1
756 08:46:52.718807 PNP: 0c09.0: enabled 1
757 08:46:52.718921 USB2 port 0: enabled 1
758 08:46:52.722049 USB2 port 1: enabled 1
759 08:46:52.725352 USB2 port 2: enabled 0
760 08:46:52.725464 USB2 port 3: enabled 0
761 08:46:52.728503 USB2 port 5: enabled 0
762 08:46:52.731871 USB2 port 6: enabled 1
763 08:46:52.735079 USB2 port 9: enabled 1
764 08:46:52.735194 USB3 port 0: enabled 1
765 08:46:52.738427 USB3 port 1: enabled 1
766 08:46:52.742111 USB3 port 2: enabled 1
767 08:46:52.742231 USB3 port 3: enabled 1
768 08:46:52.745484 USB3 port 4: enabled 0
769 08:46:52.748590 APIC: 03: enabled 1
770 08:46:52.748704 APIC: 07: enabled 1
771 08:46:52.751702 APIC: 01: enabled 1
772 08:46:52.755164 APIC: 02: enabled 1
773 08:46:52.755282 APIC: 06: enabled 1
774 08:46:52.758367 APIC: 05: enabled 1
775 08:46:52.758487 APIC: 04: enabled 1
776 08:46:52.761591 Compare with tree...
777 08:46:52.764928 Root Device: enabled 1
778 08:46:52.768648 CPU_CLUSTER: 0: enabled 1
779 08:46:52.768768 APIC: 00: enabled 1
780 08:46:52.772321 APIC: 03: enabled 1
781 08:46:52.774899 APIC: 07: enabled 1
782 08:46:52.775013 APIC: 01: enabled 1
783 08:46:52.778606 APIC: 02: enabled 1
784 08:46:52.781896 APIC: 06: enabled 1
785 08:46:52.781994 APIC: 05: enabled 1
786 08:46:52.784805 APIC: 04: enabled 1
787 08:46:52.788476 DOMAIN: 0000: enabled 1
788 08:46:52.791373 PCI: 00:00.0: enabled 1
789 08:46:52.791493 PCI: 00:02.0: enabled 1
790 08:46:52.795103 PCI: 00:04.0: enabled 0
791 08:46:52.798597 PCI: 00:05.0: enabled 0
792 08:46:52.802001 PCI: 00:12.0: enabled 1
793 08:46:52.802129 PCI: 00:12.5: enabled 0
794 08:46:52.804999 PCI: 00:12.6: enabled 0
795 08:46:52.808237 PCI: 00:14.0: enabled 1
796 08:46:52.811662 USB0 port 0: enabled 1
797 08:46:52.815123 USB2 port 0: enabled 1
798 08:46:52.815243 USB2 port 1: enabled 1
799 08:46:52.818337 USB2 port 2: enabled 0
800 08:46:52.821859 USB2 port 3: enabled 0
801 08:46:52.825259 USB2 port 5: enabled 0
802 08:46:52.828513 USB2 port 6: enabled 1
803 08:46:52.831580 USB2 port 9: enabled 1
804 08:46:52.831700 USB3 port 0: enabled 1
805 08:46:52.834970 USB3 port 1: enabled 1
806 08:46:52.838410 USB3 port 2: enabled 1
807 08:46:52.841577 USB3 port 3: enabled 1
808 08:46:52.845205 USB3 port 4: enabled 0
809 08:46:52.845294 PCI: 00:14.1: enabled 0
810 08:46:52.848270 PCI: 00:14.3: enabled 1
811 08:46:52.851486 PCI: 00:14.5: enabled 0
812 08:46:52.854764 PCI: 00:15.0: enabled 1
813 08:46:52.858727 I2C: 00:15: enabled 1
814 08:46:52.858845 PCI: 00:15.1: enabled 1
815 08:46:52.862039 I2C: 00:5d: enabled 1
816 08:46:52.865093 GENERIC: 0.0: enabled 1
817 08:46:52.868494 PCI: 00:15.2: enabled 0
818 08:46:52.868580 PCI: 00:15.3: enabled 0
819 08:46:52.871530 PCI: 00:16.0: enabled 1
820 08:46:52.875318 PCI: 00:16.1: enabled 0
821 08:46:52.878533 PCI: 00:16.2: enabled 0
822 08:46:52.881687 PCI: 00:16.3: enabled 0
823 08:46:52.881802 PCI: 00:16.4: enabled 0
824 08:46:52.885029 PCI: 00:16.5: enabled 0
825 08:46:52.888331 PCI: 00:17.0: enabled 1
826 08:46:52.891638 PCI: 00:19.0: enabled 1
827 08:46:52.894738 I2C: 00:1a: enabled 1
828 08:46:52.894849 I2C: 00:38: enabled 1
829 08:46:52.898540 I2C: 00:39: enabled 1
830 08:46:52.901559 I2C: 00:3a: enabled 1
831 08:46:52.904792 I2C: 00:3b: enabled 1
832 08:46:52.904883 PCI: 00:19.1: enabled 0
833 08:46:52.908111 PCI: 00:19.2: enabled 0
834 08:46:52.911873 PCI: 00:1a.0: enabled 0
835 08:46:52.915058 PCI: 00:1c.0: enabled 0
836 08:46:52.918178 PCI: 00:1c.1: enabled 0
837 08:46:52.918297 PCI: 00:1c.2: enabled 0
838 08:46:52.921230 PCI: 00:1c.3: enabled 0
839 08:46:52.924737 PCI: 00:1c.4: enabled 0
840 08:46:52.927983 PCI: 00:1c.5: enabled 0
841 08:46:52.931400 PCI: 00:1c.6: enabled 0
842 08:46:52.931510 PCI: 00:1c.7: enabled 0
843 08:46:52.934825 PCI: 00:1d.0: enabled 1
844 08:46:52.938221 PCI: 00:1d.1: enabled 0
845 08:46:52.941504 PCI: 00:1d.2: enabled 0
846 08:46:52.944609 PCI: 00:1d.3: enabled 0
847 08:46:52.944724 PCI: 00:1d.4: enabled 0
848 08:46:52.948103 PCI: 00:1d.5: enabled 1
849 08:46:52.951053 PCI: 00:00.0: enabled 1
850 08:46:52.954298 PCI: 00:1e.0: enabled 1
851 08:46:52.958239 PCI: 00:1e.1: enabled 0
852 08:46:52.958325 PCI: 00:1e.2: enabled 1
853 08:46:52.961208 SPI: 00: enabled 1
854 08:46:52.964463 PCI: 00:1e.3: enabled 1
855 08:46:52.964546 SPI: 01: enabled 1
856 08:46:52.967890 PCI: 00:1f.0: enabled 1
857 08:46:52.971226 PNP: 0c09.0: enabled 1
858 08:46:52.974573 PCI: 00:1f.1: enabled 1
859 08:46:52.977938 PCI: 00:1f.2: enabled 1
860 08:46:52.978053 PCI: 00:1f.3: enabled 1
861 08:46:52.980940 PCI: 00:1f.4: enabled 1
862 08:46:52.984313 PCI: 00:1f.5: enabled 1
863 08:46:52.987632 PCI: 00:1f.6: enabled 0
864 08:46:52.991152 Root Device scanning...
865 08:46:52.994316 scan_static_bus for Root Device
866 08:46:52.994436 CPU_CLUSTER: 0 enabled
867 08:46:52.997380 DOMAIN: 0000 enabled
868 08:46:53.000626 DOMAIN: 0000 scanning...
869 08:46:53.004105 PCI: pci_scan_bus for bus 00
870 08:46:53.007229 PCI: 00:00.0 [8086/0000] ops
871 08:46:53.011196 PCI: 00:00.0 [8086/9b61] enabled
872 08:46:53.014272 PCI: 00:02.0 [8086/0000] bus ops
873 08:46:53.017514 PCI: 00:02.0 [8086/9b41] enabled
874 08:46:53.020842 PCI: 00:04.0 [8086/1903] disabled
875 08:46:53.024286 PCI: 00:08.0 [8086/1911] enabled
876 08:46:53.027445 PCI: 00:12.0 [8086/02f9] enabled
877 08:46:53.030590 PCI: 00:14.0 [8086/0000] bus ops
878 08:46:53.033730 PCI: 00:14.0 [8086/02ed] enabled
879 08:46:53.037178 PCI: 00:14.2 [8086/02ef] enabled
880 08:46:53.040516 PCI: 00:14.3 [8086/02f0] enabled
881 08:46:53.044010 PCI: 00:15.0 [8086/0000] bus ops
882 08:46:53.047629 PCI: 00:15.0 [8086/02e8] enabled
883 08:46:53.050626 PCI: 00:15.1 [8086/0000] bus ops
884 08:46:53.053963 PCI: 00:15.1 [8086/02e9] enabled
885 08:46:53.057044 PCI: 00:16.0 [8086/0000] ops
886 08:46:53.060603 PCI: 00:16.0 [8086/02e0] enabled
887 08:46:53.060691 PCI: 00:17.0 [8086/0000] ops
888 08:46:53.063709 PCI: 00:17.0 [8086/02d3] enabled
889 08:46:53.066953 PCI: 00:19.0 [8086/0000] bus ops
890 08:46:53.070984 PCI: 00:19.0 [8086/02c5] enabled
891 08:46:53.074393 PCI: 00:1d.0 [8086/0000] bus ops
892 08:46:53.077620 PCI: 00:1d.0 [8086/02b0] enabled
893 08:46:53.084052 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 08:46:53.087151 PCI: 00:1e.0 [8086/0000] ops
895 08:46:53.090921 PCI: 00:1e.0 [8086/02a8] enabled
896 08:46:53.094042 PCI: 00:1e.2 [8086/0000] bus ops
897 08:46:53.097253 PCI: 00:1e.2 [8086/02aa] enabled
898 08:46:53.100427 PCI: 00:1e.3 [8086/0000] bus ops
899 08:46:53.104164 PCI: 00:1e.3 [8086/02ab] enabled
900 08:46:53.107294 PCI: 00:1f.0 [8086/0000] bus ops
901 08:46:53.110433 PCI: 00:1f.0 [8086/0284] enabled
902 08:46:53.117337 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 08:46:53.120481 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 08:46:53.123779 PCI: 00:1f.3 [8086/0000] bus ops
905 08:46:53.126878 PCI: 00:1f.3 [8086/02c8] enabled
906 08:46:53.130864 PCI: 00:1f.4 [8086/0000] bus ops
907 08:46:53.133636 PCI: 00:1f.4 [8086/02a3] enabled
908 08:46:53.136948 PCI: 00:1f.5 [8086/0000] bus ops
909 08:46:53.140198 PCI: 00:1f.5 [8086/02a4] enabled
910 08:46:53.143763 PCI: Leftover static devices:
911 08:46:53.146943 PCI: 00:05.0
912 08:46:53.147057 PCI: 00:12.5
913 08:46:53.150134 PCI: 00:12.6
914 08:46:53.150250 PCI: 00:14.1
915 08:46:53.150353 PCI: 00:14.5
916 08:46:53.153597 PCI: 00:15.2
917 08:46:53.153710 PCI: 00:15.3
918 08:46:53.156959 PCI: 00:16.1
919 08:46:53.157049 PCI: 00:16.2
920 08:46:53.157128 PCI: 00:16.3
921 08:46:53.160267 PCI: 00:16.4
922 08:46:53.160386 PCI: 00:16.5
923 08:46:53.163998 PCI: 00:19.1
924 08:46:53.164115 PCI: 00:19.2
925 08:46:53.164222 PCI: 00:1a.0
926 08:46:53.166925 PCI: 00:1c.0
927 08:46:53.167038 PCI: 00:1c.1
928 08:46:53.170158 PCI: 00:1c.2
929 08:46:53.170271 PCI: 00:1c.3
930 08:46:53.174071 PCI: 00:1c.4
931 08:46:53.174192 PCI: 00:1c.5
932 08:46:53.174304 PCI: 00:1c.6
933 08:46:53.177204 PCI: 00:1c.7
934 08:46:53.177291 PCI: 00:1d.1
935 08:46:53.180542 PCI: 00:1d.2
936 08:46:53.180625 PCI: 00:1d.3
937 08:46:53.180701 PCI: 00:1d.4
938 08:46:53.183654 PCI: 00:1d.5
939 08:46:53.183768 PCI: 00:1e.1
940 08:46:53.186984 PCI: 00:1f.1
941 08:46:53.187095 PCI: 00:1f.2
942 08:46:53.187203 PCI: 00:1f.6
943 08:46:53.190113 PCI: Check your devicetree.cb.
944 08:46:53.193458 PCI: 00:02.0 scanning...
945 08:46:53.196908 scan_generic_bus for PCI: 00:02.0
946 08:46:53.200161 scan_generic_bus for PCI: 00:02.0 done
947 08:46:53.207081 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
948 08:46:53.210389 PCI: 00:14.0 scanning...
949 08:46:53.213447 scan_static_bus for PCI: 00:14.0
950 08:46:53.216717 USB0 port 0 enabled
951 08:46:53.216834 USB0 port 0 scanning...
952 08:46:53.220266 scan_static_bus for USB0 port 0
953 08:46:53.223418 USB2 port 0 enabled
954 08:46:53.227202 USB2 port 1 enabled
955 08:46:53.227328 USB2 port 2 disabled
956 08:46:53.230247 USB2 port 3 disabled
957 08:46:53.233443 USB2 port 5 disabled
958 08:46:53.233530 USB2 port 6 enabled
959 08:46:53.236652 USB2 port 9 enabled
960 08:46:53.236740 USB3 port 0 enabled
961 08:46:53.239931 USB3 port 1 enabled
962 08:46:53.243300 USB3 port 2 enabled
963 08:46:53.243384 USB3 port 3 enabled
964 08:46:53.247246 USB3 port 4 disabled
965 08:46:53.250374 USB2 port 0 scanning...
966 08:46:53.253621 scan_static_bus for USB2 port 0
967 08:46:53.256992 scan_static_bus for USB2 port 0 done
968 08:46:53.260238 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
969 08:46:53.263341 USB2 port 1 scanning...
970 08:46:53.266880 scan_static_bus for USB2 port 1
971 08:46:53.269929 scan_static_bus for USB2 port 1 done
972 08:46:53.276433 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
973 08:46:53.280013 USB2 port 6 scanning...
974 08:46:53.283372 scan_static_bus for USB2 port 6
975 08:46:53.286730 scan_static_bus for USB2 port 6 done
976 08:46:53.289926 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
977 08:46:53.293037 USB2 port 9 scanning...
978 08:46:53.297098 scan_static_bus for USB2 port 9
979 08:46:53.300411 scan_static_bus for USB2 port 9 done
980 08:46:53.306380 scan_bus: scanning of bus USB2 port 9 took 9693 usecs
981 08:46:53.310020 USB3 port 0 scanning...
982 08:46:53.313027 scan_static_bus for USB3 port 0
983 08:46:53.316277 scan_static_bus for USB3 port 0 done
984 08:46:53.320137 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
985 08:46:53.323328 USB3 port 1 scanning...
986 08:46:53.326446 scan_static_bus for USB3 port 1
987 08:46:53.329604 scan_static_bus for USB3 port 1 done
988 08:46:53.336416 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
989 08:46:53.340127 USB3 port 2 scanning...
990 08:46:53.342909 scan_static_bus for USB3 port 2
991 08:46:53.346857 scan_static_bus for USB3 port 2 done
992 08:46:53.349522 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
993 08:46:53.353352 USB3 port 3 scanning...
994 08:46:53.356552 scan_static_bus for USB3 port 3
995 08:46:53.359899 scan_static_bus for USB3 port 3 done
996 08:46:53.366419 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
997 08:46:53.369757 scan_static_bus for USB0 port 0 done
998 08:46:53.376876 scan_bus: scanning of bus USB0 port 0 took 155374 usecs
999 08:46:53.379886 scan_static_bus for PCI: 00:14.0 done
1000 08:46:53.386751 scan_bus: scanning of bus PCI: 00:14.0 took 172985 usecs
1001 08:46:53.386874 PCI: 00:15.0 scanning...
1002 08:46:53.389888 scan_generic_bus for PCI: 00:15.0
1003 08:46:53.396611 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 08:46:53.399532 scan_generic_bus for PCI: 00:15.0 done
1005 08:46:53.406552 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
1006 08:46:53.406675 PCI: 00:15.1 scanning...
1007 08:46:53.409916 scan_generic_bus for PCI: 00:15.1
1008 08:46:53.416288 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 08:46:53.419414 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 08:46:53.422945 scan_generic_bus for PCI: 00:15.1 done
1011 08:46:53.429387 scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
1012 08:46:53.433186 PCI: 00:19.0 scanning...
1013 08:46:53.436321 scan_generic_bus for PCI: 00:19.0
1014 08:46:53.439499 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 08:46:53.442964 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 08:46:53.446484 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 08:46:53.453183 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 08:46:53.456412 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 08:46:53.459776 scan_generic_bus for PCI: 00:19.0 done
1020 08:46:53.466272 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1021 08:46:53.466368 PCI: 00:1d.0 scanning...
1022 08:46:53.473044 do_pci_scan_bridge for PCI: 00:1d.0
1023 08:46:53.473135 PCI: pci_scan_bus for bus 01
1024 08:46:53.476433 PCI: 01:00.0 [1c5c/1327] enabled
1025 08:46:53.483124 Enabling Common Clock Configuration
1026 08:46:53.486246 L1 Sub-State supported from root port 29
1027 08:46:53.489397 L1 Sub-State Support = 0xf
1028 08:46:53.493165 CommonModeRestoreTime = 0x28
1029 08:46:53.496386 Power On Value = 0x16, Power On Scale = 0x0
1030 08:46:53.496474 ASPM: Enabled L1
1031 08:46:53.502776 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
1032 08:46:53.506635 PCI: 00:1e.2 scanning...
1033 08:46:53.510065 scan_generic_bus for PCI: 00:1e.2
1034 08:46:53.512837 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 08:46:53.516444 scan_generic_bus for PCI: 00:1e.2 done
1036 08:46:53.522776 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1037 08:46:53.526133 PCI: 00:1e.3 scanning...
1038 08:46:53.529503 scan_generic_bus for PCI: 00:1e.3
1039 08:46:53.532581 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 08:46:53.536353 scan_generic_bus for PCI: 00:1e.3 done
1041 08:46:53.543025 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1042 08:46:53.546286 PCI: 00:1f.0 scanning...
1043 08:46:53.549241 scan_static_bus for PCI: 00:1f.0
1044 08:46:53.549332 PNP: 0c09.0 enabled
1045 08:46:53.553021 scan_static_bus for PCI: 00:1f.0 done
1046 08:46:53.559324 scan_bus: scanning of bus PCI: 00:1f.0 took 12077 usecs
1047 08:46:53.563050 PCI: 00:1f.3 scanning...
1048 08:46:53.569155 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 08:46:53.569244 PCI: 00:1f.4 scanning...
1050 08:46:53.573058 scan_generic_bus for PCI: 00:1f.4
1051 08:46:53.579820 scan_generic_bus for PCI: 00:1f.4 done
1052 08:46:53.583165 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1053 08:46:53.586453 PCI: 00:1f.5 scanning...
1054 08:46:53.589558 scan_generic_bus for PCI: 00:1f.5
1055 08:46:53.592851 scan_generic_bus for PCI: 00:1f.5 done
1056 08:46:53.599311 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1057 08:46:53.605916 scan_bus: scanning of bus DOMAIN: 0000 took 605160 usecs
1058 08:46:53.609493 scan_static_bus for Root Device done
1059 08:46:53.612877 scan_bus: scanning of bus Root Device took 625013 usecs
1060 08:46:53.615939 done
1061 08:46:53.619661 Chrome EC: UHEPI supported
1062 08:46:53.625920 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 08:46:53.629532 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 08:46:53.636551 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 08:46:53.643040 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 08:46:53.645822 SPI flash protection: WPSW=0 SRP0=0
1067 08:46:53.652546 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 08:46:53.655946 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1069 08:46:53.659120 found VGA at PCI: 00:02.0
1070 08:46:53.662512 Setting up VGA for PCI: 00:02.0
1071 08:46:53.668984 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 08:46:53.672595 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 08:46:53.675669 Allocating resources...
1074 08:46:53.678974 Reading resources...
1075 08:46:53.682349 Root Device read_resources bus 0 link: 0
1076 08:46:53.685615 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 08:46:53.692217 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 08:46:53.695372 DOMAIN: 0000 read_resources bus 0 link: 0
1079 08:46:53.703227 PCI: 00:14.0 read_resources bus 0 link: 0
1080 08:46:53.706406 USB0 port 0 read_resources bus 0 link: 0
1081 08:46:53.714401 USB0 port 0 read_resources bus 0 link: 0 done
1082 08:46:53.718205 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 08:46:53.724966 PCI: 00:15.0 read_resources bus 1 link: 0
1084 08:46:53.728407 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 08:46:53.734859 PCI: 00:15.1 read_resources bus 2 link: 0
1086 08:46:53.738509 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 08:46:53.746029 PCI: 00:19.0 read_resources bus 3 link: 0
1088 08:46:53.752559 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 08:46:53.755758 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 08:46:53.762487 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 08:46:53.766252 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 08:46:53.772067 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 08:46:53.775899 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 08:46:53.782484 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 08:46:53.786315 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 08:46:53.792212 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 08:46:53.799668 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 08:46:53.802282 Root Device read_resources bus 0 link: 0 done
1099 08:46:53.805582 Done reading resources.
1100 08:46:53.808841 Show resources in subtree (Root Device)...After reading.
1101 08:46:53.815513 Root Device child on link 0 CPU_CLUSTER: 0
1102 08:46:53.818975 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 08:46:53.819094 APIC: 00
1104 08:46:53.822184 APIC: 03
1105 08:46:53.822303 APIC: 07
1106 08:46:53.825489 APIC: 01
1107 08:46:53.825575 APIC: 02
1108 08:46:53.825645 APIC: 06
1109 08:46:53.828723 APIC: 05
1110 08:46:53.828807 APIC: 04
1111 08:46:53.832430 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 08:46:53.842245 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 08:46:53.894793 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 08:46:53.895150 PCI: 00:00.0
1115 08:46:53.895256 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 08:46:53.896167 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 08:46:53.896461 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 08:46:53.896558 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 08:46:53.900240 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 08:46:53.909937 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 08:46:53.919749 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 08:46:53.929626 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 08:46:53.940090 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 08:46:53.946293 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 08:46:53.956781 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 08:46:53.966325 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 08:46:53.976327 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 08:46:53.986407 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 08:46:53.996085 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 08:46:54.003297 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 08:46:54.006334 PCI: 00:02.0
1132 08:46:54.016693 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 08:46:54.026585 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 08:46:54.036173 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 08:46:54.036290 PCI: 00:04.0
1136 08:46:54.039292 PCI: 00:08.0
1137 08:46:54.049530 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 08:46:54.049627 PCI: 00:12.0
1139 08:46:54.059252 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 08:46:54.063232 PCI: 00:14.0 child on link 0 USB0 port 0
1141 08:46:54.072723 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 08:46:54.079211 USB0 port 0 child on link 0 USB2 port 0
1143 08:46:54.079305 USB2 port 0
1144 08:46:54.082707 USB2 port 1
1145 08:46:54.082804 USB2 port 2
1146 08:46:54.085945 USB2 port 3
1147 08:46:54.086029 USB2 port 5
1148 08:46:54.089306 USB2 port 6
1149 08:46:54.089392 USB2 port 9
1150 08:46:54.092384 USB3 port 0
1151 08:46:54.092474 USB3 port 1
1152 08:46:54.096170 USB3 port 2
1153 08:46:54.096297 USB3 port 3
1154 08:46:54.099073 USB3 port 4
1155 08:46:54.103006 PCI: 00:14.2
1156 08:46:54.109383 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 08:46:54.119026 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 08:46:54.122759 PCI: 00:14.3
1159 08:46:54.132431 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 08:46:54.135637 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 08:46:54.145981 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 08:46:54.149377 I2C: 01:15
1163 08:46:54.152547 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 08:46:54.162038 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 08:46:54.162142 I2C: 02:5d
1166 08:46:54.166058 GENERIC: 0.0
1167 08:46:54.169235 PCI: 00:16.0
1168 08:46:54.175719 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 08:46:54.179397 PCI: 00:17.0
1170 08:46:54.189359 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 08:46:54.195427 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 08:46:54.205563 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 08:46:54.212589 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 08:46:54.222284 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 08:46:54.232323 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 08:46:54.235412 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 08:46:54.245350 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 08:46:54.245448 I2C: 03:1a
1179 08:46:54.248577 I2C: 03:38
1180 08:46:54.248698 I2C: 03:39
1181 08:46:54.251967 I2C: 03:3a
1182 08:46:54.252056 I2C: 03:3b
1183 08:46:54.258367 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 08:46:54.265380 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 08:46:54.275499 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 08:46:54.285287 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 08:46:54.285381 PCI: 01:00.0
1188 08:46:54.295199 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 08:46:54.298403 PCI: 00:1e.0
1190 08:46:54.308373 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 08:46:54.318443 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 08:46:54.321786 PCI: 00:1e.2 child on link 0 SPI: 00
1193 08:46:54.331839 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 08:46:54.335073 SPI: 00
1195 08:46:54.338498 PCI: 00:1e.3 child on link 0 SPI: 01
1196 08:46:54.348590 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 08:46:54.348684 SPI: 01
1198 08:46:54.354665 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 08:46:54.362077 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 08:46:54.371659 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 08:46:54.371751 PNP: 0c09.0
1202 08:46:54.381773 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 08:46:54.385013 PCI: 00:1f.3
1204 08:46:54.394612 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 08:46:54.405152 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 08:46:54.405248 PCI: 00:1f.4
1207 08:46:54.414592 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 08:46:54.425184 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 08:46:54.425281 PCI: 00:1f.5
1210 08:46:54.434440 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 08:46:54.440991 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 08:46:54.448122 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 08:46:54.454314 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 08:46:54.457814 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 08:46:54.461515 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 08:46:54.464650 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 08:46:54.468059 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 08:46:54.474547 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 08:46:54.481291 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 08:46:54.490731 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 08:46:54.497318 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 08:46:54.503963 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 08:46:54.511347 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 08:46:54.517622 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 08:46:54.520693 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 08:46:54.527050 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 08:46:54.531011 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 08:46:54.536988 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 08:46:54.540340 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 08:46:54.547027 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 08:46:54.551161 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 08:46:54.556807 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 08:46:54.560343 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 08:46:54.567419 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 08:46:54.570425 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 08:46:54.573749 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 08:46:54.580090 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 08:46:54.583601 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 08:46:54.590295 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 08:46:54.593445 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 08:46:54.600389 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 08:46:54.603789 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 08:46:54.610145 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 08:46:54.613546 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 08:46:54.620060 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 08:46:54.623312 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 08:46:54.629770 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 08:46:54.636943 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 08:46:54.639869 avoid_fixed_resources: DOMAIN: 0000
1250 08:46:54.646927 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 08:46:54.653269 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 08:46:54.660029 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 08:46:54.669452 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 08:46:54.676390 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 08:46:54.682832 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 08:46:54.692670 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 08:46:54.699208 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 08:46:54.706058 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 08:46:54.712937 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 08:46:54.722269 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 08:46:54.729497 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 08:46:54.729601 Setting resources...
1263 08:46:54.736306 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 08:46:54.742730 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 08:46:54.745881 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 08:46:54.749136 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 08:46:54.752627 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 08:46:54.759317 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 08:46:54.766305 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 08:46:54.772983 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 08:46:54.779427 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 08:46:54.785888 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 08:46:54.789780 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 08:46:54.795777 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 08:46:54.799593 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 08:46:54.802897 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 08:46:54.809526 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 08:46:54.812635 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 08:46:54.819320 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 08:46:54.822978 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 08:46:54.829671 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 08:46:54.832754 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 08:46:54.839069 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 08:46:54.843032 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 08:46:54.849375 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 08:46:54.852631 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 08:46:54.859557 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 08:46:54.862288 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 08:46:54.866199 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 08:46:54.872805 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 08:46:54.876132 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 08:46:54.882691 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 08:46:54.886022 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 08:46:54.892197 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 08:46:54.899300 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 08:46:54.905647 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 08:46:54.912222 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 08:46:54.922329 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 08:46:54.926013 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 08:46:54.932647 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 08:46:54.939039 Root Device assign_resources, bus 0 link: 0
1302 08:46:54.942172 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 08:46:54.952379 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 08:46:54.959235 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 08:46:54.968684 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 08:46:54.976085 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 08:46:54.985278 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 08:46:54.991952 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 08:46:54.995254 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 08:46:55.001886 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 08:46:55.008757 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 08:46:55.018977 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 08:46:55.025432 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 08:46:55.035284 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 08:46:55.038474 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 08:46:55.045727 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 08:46:55.052107 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 08:46:55.055032 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 08:46:55.061871 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 08:46:55.068589 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 08:46:55.078162 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 08:46:55.084812 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 08:46:55.091451 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 08:46:55.101287 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 08:46:55.108455 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 08:46:55.114932 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 08:46:55.124613 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 08:46:55.127936 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 08:46:55.134545 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 08:46:55.141710 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 08:46:55.151516 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 08:46:55.161165 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 08:46:55.164645 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 08:46:55.170937 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 08:46:55.177723 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 08:46:55.184192 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 08:46:55.194646 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 08:46:55.197433 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 08:46:55.204612 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 08:46:55.211053 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 08:46:55.214235 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 08:46:55.221284 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 08:46:55.224493 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 08:46:55.231149 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 08:46:55.234507 LPC: Trying to open IO window from 800 size 1ff
1346 08:46:55.244537 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 08:46:55.250969 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 08:46:55.261125 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 08:46:55.267351 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 08:46:55.274451 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 08:46:55.277757 Root Device assign_resources, bus 0 link: 0
1352 08:46:55.281063 Done setting resources.
1353 08:46:55.287625 Show resources in subtree (Root Device)...After assigning values.
1354 08:46:55.290709 Root Device child on link 0 CPU_CLUSTER: 0
1355 08:46:55.294200 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 08:46:55.297358 APIC: 00
1357 08:46:55.297445 APIC: 03
1358 08:46:55.297516 APIC: 07
1359 08:46:55.300792 APIC: 01
1360 08:46:55.300870 APIC: 02
1361 08:46:55.304434 APIC: 06
1362 08:46:55.304525 APIC: 05
1363 08:46:55.304598 APIC: 04
1364 08:46:55.310772 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 08:46:55.320683 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 08:46:55.330632 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 08:46:55.330737 PCI: 00:00.0
1368 08:46:55.340619 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 08:46:55.350492 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 08:46:55.360293 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 08:46:55.370487 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 08:46:55.380468 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 08:46:55.387001 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 08:46:55.396692 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 08:46:55.407046 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 08:46:55.416232 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 08:46:55.426732 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 08:46:55.432779 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 08:46:55.443304 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 08:46:55.452844 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 08:46:55.462711 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 08:46:55.472492 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 08:46:55.482990 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 08:46:55.483116 PCI: 00:02.0
1385 08:46:55.492816 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 08:46:55.505867 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 08:46:55.512569 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 08:46:55.515872 PCI: 00:04.0
1389 08:46:55.516010 PCI: 00:08.0
1390 08:46:55.529352 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 08:46:55.529490 PCI: 00:12.0
1392 08:46:55.539146 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 08:46:55.542553 PCI: 00:14.0 child on link 0 USB0 port 0
1394 08:46:55.555873 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 08:46:55.558876 USB0 port 0 child on link 0 USB2 port 0
1396 08:46:55.562098 USB2 port 0
1397 08:46:55.562194 USB2 port 1
1398 08:46:55.565424 USB2 port 2
1399 08:46:55.565520 USB2 port 3
1400 08:46:55.568776 USB2 port 5
1401 08:46:55.568869 USB2 port 6
1402 08:46:55.572048 USB2 port 9
1403 08:46:55.572142 USB3 port 0
1404 08:46:55.575950 USB3 port 1
1405 08:46:55.576077 USB3 port 2
1406 08:46:55.578827 USB3 port 3
1407 08:46:55.578946 USB3 port 4
1408 08:46:55.581842 PCI: 00:14.2
1409 08:46:55.591978 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 08:46:55.601928 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 08:46:55.605403 PCI: 00:14.3
1412 08:46:55.614987 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 08:46:55.618296 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 08:46:55.628923 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 08:46:55.631998 I2C: 01:15
1416 08:46:55.635422 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 08:46:55.644975 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 08:46:55.645111 I2C: 02:5d
1419 08:46:55.648208 GENERIC: 0.0
1420 08:46:55.651714 PCI: 00:16.0
1421 08:46:55.661135 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 08:46:55.661230 PCI: 00:17.0
1423 08:46:55.671188 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 08:46:55.680959 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 08:46:55.691032 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 08:46:55.701061 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 08:46:55.711310 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 08:46:55.721231 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 08:46:55.724287 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 08:46:55.734345 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 08:46:55.734493 I2C: 03:1a
1432 08:46:55.737665 I2C: 03:38
1433 08:46:55.737749 I2C: 03:39
1434 08:46:55.740730 I2C: 03:3a
1435 08:46:55.740811 I2C: 03:3b
1436 08:46:55.747668 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 08:46:55.757563 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 08:46:55.767341 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 08:46:55.777050 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 08:46:55.777196 PCI: 01:00.0
1441 08:46:55.786935 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 08:46:55.790209 PCI: 00:1e.0
1443 08:46:55.800259 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 08:46:55.810081 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 08:46:55.817389 PCI: 00:1e.2 child on link 0 SPI: 00
1446 08:46:55.826722 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 08:46:55.826850 SPI: 00
1448 08:46:55.830560 PCI: 00:1e.3 child on link 0 SPI: 01
1449 08:46:55.840353 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 08:46:55.843583 SPI: 01
1451 08:46:55.846539 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 08:46:55.857033 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 08:46:55.863383 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 08:46:55.866569 PNP: 0c09.0
1455 08:46:55.876342 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 08:46:55.876435 PCI: 00:1f.3
1457 08:46:55.886530 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 08:46:55.896163 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 08:46:55.900106 PCI: 00:1f.4
1460 08:46:55.909768 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 08:46:55.919463 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 08:46:55.919555 PCI: 00:1f.5
1463 08:46:55.929509 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 08:46:55.932587 Done allocating resources.
1465 08:46:55.939535 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 08:46:55.942596 Enabling resources...
1467 08:46:55.945695 PCI: 00:00.0 subsystem <- 8086/9b61
1468 08:46:55.949017 PCI: 00:00.0 cmd <- 06
1469 08:46:55.952790 PCI: 00:02.0 subsystem <- 8086/9b41
1470 08:46:55.955977 PCI: 00:02.0 cmd <- 03
1471 08:46:55.956087 PCI: 00:08.0 cmd <- 06
1472 08:46:55.962288 PCI: 00:12.0 subsystem <- 8086/02f9
1473 08:46:55.962374 PCI: 00:12.0 cmd <- 02
1474 08:46:55.965548 PCI: 00:14.0 subsystem <- 8086/02ed
1475 08:46:55.968956 PCI: 00:14.0 cmd <- 02
1476 08:46:55.972763 PCI: 00:14.2 cmd <- 02
1477 08:46:55.975796 PCI: 00:14.3 subsystem <- 8086/02f0
1478 08:46:55.978861 PCI: 00:14.3 cmd <- 02
1479 08:46:55.982203 PCI: 00:15.0 subsystem <- 8086/02e8
1480 08:46:55.986055 PCI: 00:15.0 cmd <- 02
1481 08:46:55.989200 PCI: 00:15.1 subsystem <- 8086/02e9
1482 08:46:55.992537 PCI: 00:15.1 cmd <- 02
1483 08:46:55.995715 PCI: 00:16.0 subsystem <- 8086/02e0
1484 08:46:55.998894 PCI: 00:16.0 cmd <- 02
1485 08:46:56.002048 PCI: 00:17.0 subsystem <- 8086/02d3
1486 08:46:56.002136 PCI: 00:17.0 cmd <- 03
1487 08:46:56.008772 PCI: 00:19.0 subsystem <- 8086/02c5
1488 08:46:56.008861 PCI: 00:19.0 cmd <- 02
1489 08:46:56.012662 PCI: 00:1d.0 bridge ctrl <- 0013
1490 08:46:56.015836 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 08:46:56.019036 PCI: 00:1d.0 cmd <- 06
1492 08:46:56.022480 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 08:46:56.025715 PCI: 00:1e.0 cmd <- 06
1494 08:46:56.028938 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 08:46:56.032256 PCI: 00:1e.2 cmd <- 06
1496 08:46:56.035597 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 08:46:56.038991 PCI: 00:1e.3 cmd <- 02
1498 08:46:56.042248 PCI: 00:1f.0 subsystem <- 8086/0284
1499 08:46:56.045364 PCI: 00:1f.0 cmd <- 407
1500 08:46:56.048359 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 08:46:56.051787 PCI: 00:1f.3 cmd <- 02
1502 08:46:56.055517 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 08:46:56.058270 PCI: 00:1f.4 cmd <- 03
1504 08:46:56.061741 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 08:46:56.065233 PCI: 00:1f.5 cmd <- 406
1506 08:46:56.072334 PCI: 01:00.0 cmd <- 02
1507 08:46:56.077594 done.
1508 08:46:56.087664 ME: Version: 14.0.39.1367
1509 08:46:56.094499 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1510 08:46:56.097408 Initializing devices...
1511 08:46:56.097499 Root Device init ...
1512 08:46:56.104572 Chrome EC: Set SMI mask to 0x0000000000000000
1513 08:46:56.107810 Chrome EC: clear events_b mask to 0x0000000000000000
1514 08:46:56.114437 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 08:46:56.120648 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 08:46:56.127298 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 08:46:56.130587 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 08:46:56.133719 Root Device init finished in 35174 usecs
1519 08:46:56.137591 CPU_CLUSTER: 0 init ...
1520 08:46:56.144001 CPU_CLUSTER: 0 init finished in 2448 usecs
1521 08:46:56.148509 PCI: 00:00.0 init ...
1522 08:46:56.151885 CPU TDP: 15 Watts
1523 08:46:56.154843 CPU PL2 = 64 Watts
1524 08:46:56.158077 PCI: 00:00.0 init finished in 7072 usecs
1525 08:46:56.161384 PCI: 00:02.0 init ...
1526 08:46:56.165236 PCI: 00:02.0 init finished in 2253 usecs
1527 08:46:56.168426 PCI: 00:08.0 init ...
1528 08:46:56.171560 PCI: 00:08.0 init finished in 2253 usecs
1529 08:46:56.174486 PCI: 00:12.0 init ...
1530 08:46:56.178095 PCI: 00:12.0 init finished in 2251 usecs
1531 08:46:56.181698 PCI: 00:14.0 init ...
1532 08:46:56.184447 PCI: 00:14.0 init finished in 2253 usecs
1533 08:46:56.188226 PCI: 00:14.2 init ...
1534 08:46:56.191356 PCI: 00:14.2 init finished in 2243 usecs
1535 08:46:56.194457 PCI: 00:14.3 init ...
1536 08:46:56.198117 PCI: 00:14.3 init finished in 2271 usecs
1537 08:46:56.201277 PCI: 00:15.0 init ...
1538 08:46:56.204509 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 08:46:56.208229 PCI: 00:15.0 init finished in 5977 usecs
1540 08:46:56.211367 PCI: 00:15.1 init ...
1541 08:46:56.214654 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 08:46:56.218011 PCI: 00:15.1 init finished in 5978 usecs
1543 08:46:56.221640 PCI: 00:16.0 init ...
1544 08:46:56.224993 PCI: 00:16.0 init finished in 2253 usecs
1545 08:46:56.228759 PCI: 00:19.0 init ...
1546 08:46:56.232024 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 08:46:56.238685 PCI: 00:19.0 init finished in 5979 usecs
1548 08:46:56.238778 PCI: 00:1d.0 init ...
1549 08:46:56.242055 Initializing PCH PCIe bridge.
1550 08:46:56.245281 PCI: 00:1d.0 init finished in 5287 usecs
1551 08:46:56.250582 PCI: 00:1f.0 init ...
1552 08:46:56.253342 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 08:46:56.260276 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 08:46:56.260367 IOAPIC: ID = 0x02
1555 08:46:56.263445 IOAPIC: Dumping registers
1556 08:46:56.266558 reg 0x0000: 0x02000000
1557 08:46:56.270007 reg 0x0001: 0x00770020
1558 08:46:56.270097 reg 0x0002: 0x00000000
1559 08:46:56.277414 PCI: 00:1f.0 init finished in 23540 usecs
1560 08:46:56.280648 PCI: 00:1f.4 init ...
1561 08:46:56.283759 PCI: 00:1f.4 init finished in 2262 usecs
1562 08:46:56.294372 PCI: 01:00.0 init ...
1563 08:46:56.297911 PCI: 01:00.0 init finished in 2253 usecs
1564 08:46:56.302094 PNP: 0c09.0 init ...
1565 08:46:56.305382 Google Chrome EC uptime: 11.062 seconds
1566 08:46:56.312025 Google Chrome AP resets since EC boot: 0
1567 08:46:56.315150 Google Chrome most recent AP reset causes:
1568 08:46:56.321733 Google Chrome EC reset flags at last EC boot: reset-pin
1569 08:46:56.325450 PNP: 0c09.0 init finished in 20575 usecs
1570 08:46:56.328545 Devices initialized
1571 08:46:56.328631 Show all devs... After init.
1572 08:46:56.331665 Root Device: enabled 1
1573 08:46:56.334868 CPU_CLUSTER: 0: enabled 1
1574 08:46:56.338647 DOMAIN: 0000: enabled 1
1575 08:46:56.338761 APIC: 00: enabled 1
1576 08:46:56.341656 PCI: 00:00.0: enabled 1
1577 08:46:56.345245 PCI: 00:02.0: enabled 1
1578 08:46:56.348508 PCI: 00:04.0: enabled 0
1579 08:46:56.348592 PCI: 00:05.0: enabled 0
1580 08:46:56.351628 PCI: 00:12.0: enabled 1
1581 08:46:56.354976 PCI: 00:12.5: enabled 0
1582 08:46:56.355057 PCI: 00:12.6: enabled 0
1583 08:46:56.358192 PCI: 00:14.0: enabled 1
1584 08:46:56.361662 PCI: 00:14.1: enabled 0
1585 08:46:56.364740 PCI: 00:14.3: enabled 1
1586 08:46:56.364824 PCI: 00:14.5: enabled 0
1587 08:46:56.367975 PCI: 00:15.0: enabled 1
1588 08:46:56.371862 PCI: 00:15.1: enabled 1
1589 08:46:56.375030 PCI: 00:15.2: enabled 0
1590 08:46:56.375138 PCI: 00:15.3: enabled 0
1591 08:46:56.378325 PCI: 00:16.0: enabled 1
1592 08:46:56.381722 PCI: 00:16.1: enabled 0
1593 08:46:56.385561 PCI: 00:16.2: enabled 0
1594 08:46:56.386011 PCI: 00:16.3: enabled 0
1595 08:46:56.388617 PCI: 00:16.4: enabled 0
1596 08:46:56.391838 PCI: 00:16.5: enabled 0
1597 08:46:56.395151 PCI: 00:17.0: enabled 1
1598 08:46:56.395581 PCI: 00:19.0: enabled 1
1599 08:46:56.398478 PCI: 00:19.1: enabled 0
1600 08:46:56.401980 PCI: 00:19.2: enabled 0
1601 08:46:56.402416 PCI: 00:1a.0: enabled 0
1602 08:46:56.404747 PCI: 00:1c.0: enabled 0
1603 08:46:56.408303 PCI: 00:1c.1: enabled 0
1604 08:46:56.411721 PCI: 00:1c.2: enabled 0
1605 08:46:56.412311 PCI: 00:1c.3: enabled 0
1606 08:46:56.414831 PCI: 00:1c.4: enabled 0
1607 08:46:56.418588 PCI: 00:1c.5: enabled 0
1608 08:46:56.421449 PCI: 00:1c.6: enabled 0
1609 08:46:56.421996 PCI: 00:1c.7: enabled 0
1610 08:46:56.425364 PCI: 00:1d.0: enabled 1
1611 08:46:56.428279 PCI: 00:1d.1: enabled 0
1612 08:46:56.431458 PCI: 00:1d.2: enabled 0
1613 08:46:56.431896 PCI: 00:1d.3: enabled 0
1614 08:46:56.435027 PCI: 00:1d.4: enabled 0
1615 08:46:56.438577 PCI: 00:1d.5: enabled 0
1616 08:46:56.438991 PCI: 00:1e.0: enabled 1
1617 08:46:56.441402 PCI: 00:1e.1: enabled 0
1618 08:46:56.444765 PCI: 00:1e.2: enabled 1
1619 08:46:56.447882 PCI: 00:1e.3: enabled 1
1620 08:46:56.448378 PCI: 00:1f.0: enabled 1
1621 08:46:56.451299 PCI: 00:1f.1: enabled 0
1622 08:46:56.454487 PCI: 00:1f.2: enabled 0
1623 08:46:56.457814 PCI: 00:1f.3: enabled 1
1624 08:46:56.458271 PCI: 00:1f.4: enabled 1
1625 08:46:56.461127 PCI: 00:1f.5: enabled 1
1626 08:46:56.464410 PCI: 00:1f.6: enabled 0
1627 08:46:56.467662 USB0 port 0: enabled 1
1628 08:46:56.468083 I2C: 01:15: enabled 1
1629 08:46:56.471636 I2C: 02:5d: enabled 1
1630 08:46:56.474660 GENERIC: 0.0: enabled 1
1631 08:46:56.475094 I2C: 03:1a: enabled 1
1632 08:46:56.477908 I2C: 03:38: enabled 1
1633 08:46:56.481141 I2C: 03:39: enabled 1
1634 08:46:56.481578 I2C: 03:3a: enabled 1
1635 08:46:56.484304 I2C: 03:3b: enabled 1
1636 08:46:56.487494 PCI: 00:00.0: enabled 1
1637 08:46:56.487924 SPI: 00: enabled 1
1638 08:46:56.491140 SPI: 01: enabled 1
1639 08:46:56.494177 PNP: 0c09.0: enabled 1
1640 08:46:56.494611 USB2 port 0: enabled 1
1641 08:46:56.497977 USB2 port 1: enabled 1
1642 08:46:56.501351 USB2 port 2: enabled 0
1643 08:46:56.501785 USB2 port 3: enabled 0
1644 08:46:56.504232 USB2 port 5: enabled 0
1645 08:46:56.507679 USB2 port 6: enabled 1
1646 08:46:56.508110 USB2 port 9: enabled 1
1647 08:46:56.511419 USB3 port 0: enabled 1
1648 08:46:56.514653 USB3 port 1: enabled 1
1649 08:46:56.517790 USB3 port 2: enabled 1
1650 08:46:56.518223 USB3 port 3: enabled 1
1651 08:46:56.521318 USB3 port 4: enabled 0
1652 08:46:56.524317 APIC: 03: enabled 1
1653 08:46:56.524757 APIC: 07: enabled 1
1654 08:46:56.527951 APIC: 01: enabled 1
1655 08:46:56.528438 APIC: 02: enabled 1
1656 08:46:56.530883 APIC: 06: enabled 1
1657 08:46:56.534459 APIC: 05: enabled 1
1658 08:46:56.535060 APIC: 04: enabled 1
1659 08:46:56.537869 PCI: 00:08.0: enabled 1
1660 08:46:56.540879 PCI: 00:14.2: enabled 1
1661 08:46:56.544373 PCI: 01:00.0: enabled 1
1662 08:46:56.548210 Disabling ACPI via APMC:
1663 08:46:56.548835 done.
1664 08:46:56.554757 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 08:46:56.557711 ELOG: NV offset 0xaf0000 size 0x4000
1666 08:46:56.564296 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 08:46:56.571383 ELOG: Event(17) added with size 13 at 2023-12-11 08:46:27 UTC
1668 08:46:56.577884 ELOG: Event(92) added with size 9 at 2023-12-11 08:46:27 UTC
1669 08:46:56.584527 ELOG: Event(93) added with size 9 at 2023-12-11 08:46:27 UTC
1670 08:46:56.591104 ELOG: Event(9A) added with size 9 at 2023-12-11 08:46:27 UTC
1671 08:46:56.597569 ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:27 UTC
1672 08:46:56.603996 ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:27 UTC
1673 08:46:56.606999 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 08:46:56.613735 ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:27 UTC
1675 08:46:56.624048 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 08:46:56.630470 ELOG: Event(A0) added with size 9 at 2023-12-11 08:46:27 UTC
1677 08:46:56.633664 elog_add_boot_reason: Logged dev mode boot
1678 08:46:56.633765 Finalize devices...
1679 08:46:56.637349 PCI: 00:17.0 final
1680 08:46:56.640497 Devices finalized
1681 08:46:56.644090 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 08:46:56.650839 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 08:46:56.654003 ME: HFSTS1 : 0x90000245
1684 08:46:56.657513 ME: HFSTS2 : 0x3B850126
1685 08:46:56.663550 ME: HFSTS3 : 0x00000020
1686 08:46:56.667038 ME: HFSTS4 : 0x00004800
1687 08:46:56.670629 ME: HFSTS5 : 0x00000000
1688 08:46:56.673931 ME: HFSTS6 : 0x40400006
1689 08:46:56.677245 ME: Manufacturing Mode : NO
1690 08:46:56.680595 ME: FW Partition Table : OK
1691 08:46:56.683868 ME: Bringup Loader Failure : NO
1692 08:46:56.687017 ME: Firmware Init Complete : YES
1693 08:46:56.690312 ME: Boot Options Present : NO
1694 08:46:56.694219 ME: Update In Progress : NO
1695 08:46:56.697040 ME: D0i3 Support : YES
1696 08:46:56.700696 ME: Low Power State Enabled : NO
1697 08:46:56.703907 ME: CPU Replaced : NO
1698 08:46:56.707221 ME: CPU Replacement Valid : YES
1699 08:46:56.710377 ME: Current Working State : 5
1700 08:46:56.713792 ME: Current Operation State : 1
1701 08:46:56.716944 ME: Current Operation Mode : 0
1702 08:46:56.720467 ME: Error Code : 0
1703 08:46:56.723470 ME: CPU Debug Disabled : YES
1704 08:46:56.726984 ME: TXT Support : NO
1705 08:46:56.733967 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 08:46:56.736544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 08:46:56.740650 CBFS @ c08000 size 3f8000
1708 08:46:56.746737 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 08:46:56.750524 CBFS: Locating 'fallback/dsdt.aml'
1710 08:46:56.753525 CBFS: Found @ offset 10bb80 size 3fa5
1711 08:46:56.759994 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 08:46:56.763440 CBFS @ c08000 size 3f8000
1713 08:46:56.766628 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 08:46:56.770064 CBFS: Locating 'fallback/slic'
1715 08:46:56.775095 CBFS: 'fallback/slic' not found.
1716 08:46:56.781507 ACPI: Writing ACPI tables at 99b3e000.
1717 08:46:56.781926 ACPI: * FACS
1718 08:46:56.784924 ACPI: * DSDT
1719 08:46:56.788162 Ramoops buffer: 0x100000@0x99a3d000.
1720 08:46:56.791625 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 08:46:56.798123 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 08:46:56.801177 Google Chrome EC: version:
1723 08:46:56.804715 ro: helios_v2.0.2659-56403530b
1724 08:46:56.808027 rw: helios_v2.0.2849-c41de27e7d
1725 08:46:56.808547 running image: 1
1726 08:46:56.811665 ACPI: * FADT
1727 08:46:56.812114 SCI is IRQ9
1728 08:46:56.818487 ACPI: added table 1/32, length now 40
1729 08:46:56.818927 ACPI: * SSDT
1730 08:46:56.822297 Found 1 CPU(s) with 8 core(s) each.
1731 08:46:56.824906 Error: Could not locate 'wifi_sar' in VPD.
1732 08:46:56.831503 Checking CBFS for default SAR values
1733 08:46:56.834949 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 08:46:56.838418 CBFS @ c08000 size 3f8000
1735 08:46:56.845178 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 08:46:56.848517 CBFS: Locating 'wifi_sar_defaults.hex'
1737 08:46:56.851438 CBFS: Found @ offset 5fac0 size 77
1738 08:46:56.855343 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 08:46:56.861650 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 08:46:56.864623 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 08:46:56.871446 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 08:46:56.875092 failed to find key in VPD: dsm_calib_r0_0
1743 08:46:56.884737 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 08:46:56.888060 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 08:46:56.891801 failed to find key in VPD: dsm_calib_r0_1
1746 08:46:56.901516 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 08:46:56.907839 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 08:46:56.911207 failed to find key in VPD: dsm_calib_r0_2
1749 08:46:56.921258 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 08:46:56.924332 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 08:46:56.931099 failed to find key in VPD: dsm_calib_r0_3
1752 08:46:56.939501 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 08:46:56.944623 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 08:46:56.947836 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 08:46:56.950621 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 08:46:56.955058 EC returned error result code 1
1757 08:46:56.958554 EC returned error result code 1
1758 08:46:56.962445 EC returned error result code 1
1759 08:46:56.969233 PS2K: Bad resp from EC. Vivaldi disabled!
1760 08:46:56.972124 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 08:46:56.979172 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 08:46:56.985819 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 08:46:56.988724 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 08:46:56.995357 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 08:46:57.001850 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 08:46:57.008644 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 08:46:57.012384 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 08:46:57.015430 ACPI: added table 2/32, length now 44
1769 08:46:57.018692 ACPI: * MCFG
1770 08:46:57.022321 ACPI: added table 3/32, length now 48
1771 08:46:57.025361 ACPI: * TPM2
1772 08:46:57.028672 TPM2 log created at 99a2d000
1773 08:46:57.031959 ACPI: added table 4/32, length now 52
1774 08:46:57.032426 ACPI: * MADT
1775 08:46:57.035434 SCI is IRQ9
1776 08:46:57.038788 ACPI: added table 5/32, length now 56
1777 08:46:57.039234 current = 99b43ac0
1778 08:46:57.041974 ACPI: * DMAR
1779 08:46:57.045287 ACPI: added table 6/32, length now 60
1780 08:46:57.048774 ACPI: * IGD OpRegion
1781 08:46:57.049191 GMA: Found VBT in CBFS
1782 08:46:57.052120 GMA: Found valid VBT in CBFS
1783 08:46:57.055365 ACPI: added table 7/32, length now 64
1784 08:46:57.058498 ACPI: * HPET
1785 08:46:57.061668 ACPI: added table 8/32, length now 68
1786 08:46:57.062154 ACPI: done.
1787 08:46:57.064927 ACPI tables: 31744 bytes.
1788 08:46:57.069100 smbios_write_tables: 99a2c000
1789 08:46:57.071729 EC returned error result code 3
1790 08:46:57.075237 Couldn't obtain OEM name from CBI
1791 08:46:57.078780 Create SMBIOS type 17
1792 08:46:57.082057 PCI: 00:00.0 (Intel Cannonlake)
1793 08:46:57.085292 PCI: 00:14.3 (Intel WiFi)
1794 08:46:57.088508 SMBIOS tables: 939 bytes.
1795 08:46:57.091439 Writing table forward entry at 0x00000500
1796 08:46:57.098308 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 08:46:57.101690 Writing coreboot table at 0x99b62000
1798 08:46:57.108368 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 08:46:57.111788 1. 0000000000001000-000000000009ffff: RAM
1800 08:46:57.114834 2. 00000000000a0000-00000000000fffff: RESERVED
1801 08:46:57.121571 3. 0000000000100000-0000000099a2bfff: RAM
1802 08:46:57.125129 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 08:46:57.131630 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 08:46:57.138018 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 08:46:57.141183 7. 000000009a000000-000000009f7fffff: RESERVED
1806 08:46:57.147890 8. 00000000e0000000-00000000efffffff: RESERVED
1807 08:46:57.151326 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 08:46:57.154490 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 08:46:57.161099 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 08:46:57.164633 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 08:46:57.171145 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 08:46:57.174346 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 08:46:57.177726 15. 0000000100000000-000000045e7fffff: RAM
1814 08:46:57.184637 Graphics framebuffer located at 0xc0000000
1815 08:46:57.187572 Passing 5 GPIOs to payload:
1816 08:46:57.190706 NAME | PORT | POLARITY | VALUE
1817 08:46:57.197467 write protect | undefined | high | low
1818 08:46:57.200621 lid | undefined | high | high
1819 08:46:57.207218 power | undefined | high | low
1820 08:46:57.214441 oprom | undefined | high | low
1821 08:46:57.217585 EC in RW | 0x000000cb | high | low
1822 08:46:57.221012 Board ID: 4
1823 08:46:57.224089 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 08:46:57.227108 CBFS @ c08000 size 3f8000
1825 08:46:57.234065 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 08:46:57.237488 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 08:46:57.240380 coreboot table: 1492 bytes.
1828 08:46:57.244034 IMD ROOT 0. 99fff000 00001000
1829 08:46:57.247661 IMD SMALL 1. 99ffe000 00001000
1830 08:46:57.250690 FSP MEMORY 2. 99c4e000 003b0000
1831 08:46:57.254353 CONSOLE 3. 99c2e000 00020000
1832 08:46:57.257538 FMAP 4. 99c2d000 0000054e
1833 08:46:57.260521 TIME STAMP 5. 99c2c000 00000910
1834 08:46:57.263878 VBOOT WORK 6. 99c18000 00014000
1835 08:46:57.267238 MRC DATA 7. 99c16000 00001958
1836 08:46:57.270717 ROMSTG STCK 8. 99c15000 00001000
1837 08:46:57.273763 AFTER CAR 9. 99c0b000 0000a000
1838 08:46:57.277004 RAMSTAGE 10. 99baf000 0005c000
1839 08:46:57.280551 REFCODE 11. 99b7a000 00035000
1840 08:46:57.283798 SMM BACKUP 12. 99b6a000 00010000
1841 08:46:57.287420 COREBOOT 13. 99b62000 00008000
1842 08:46:57.290299 ACPI 14. 99b3e000 00024000
1843 08:46:57.293757 ACPI GNVS 15. 99b3d000 00001000
1844 08:46:57.297005 RAMOOPS 16. 99a3d000 00100000
1845 08:46:57.300525 TPM2 TCGLOG17. 99a2d000 00010000
1846 08:46:57.303717 SMBIOS 18. 99a2c000 00000800
1847 08:46:57.306840 IMD small region:
1848 08:46:57.310631 IMD ROOT 0. 99ffec00 00000400
1849 08:46:57.313802 FSP RUNTIME 1. 99ffebe0 00000004
1850 08:46:57.316838 EC HOSTEVENT 2. 99ffebc0 00000008
1851 08:46:57.320514 POWER STATE 3. 99ffeb80 00000040
1852 08:46:57.323438 ROMSTAGE 4. 99ffeb60 00000004
1853 08:46:57.326837 MEM INFO 5. 99ffe9a0 000001b9
1854 08:46:57.330137 VPD 6. 99ffe920 0000006c
1855 08:46:57.333873 MTRR: Physical address space:
1856 08:46:57.340300 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 08:46:57.346841 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 08:46:57.353647 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 08:46:57.360119 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 08:46:57.366866 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 08:46:57.373476 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 08:46:57.376645 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 08:46:57.383301 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 08:46:57.386302 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 08:46:57.390092 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 08:46:57.393322 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 08:46:57.399652 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 08:46:57.403115 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 08:46:57.406089 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 08:46:57.409984 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 08:46:57.416551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 08:46:57.419626 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 08:46:57.422887 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 08:46:57.426104 call enable_fixed_mtrr()
1875 08:46:57.429372 CPU physical address size: 39 bits
1876 08:46:57.432578 MTRR: default type WB/UC MTRR counts: 6/8.
1877 08:46:57.436152 MTRR: WB selected as default type.
1878 08:46:57.442527 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 08:46:57.449234 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 08:46:57.455662 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 08:46:57.462823 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 08:46:57.469282 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 08:46:57.476062 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 08:46:57.479240 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 08:46:57.482166 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 08:46:57.488816 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 08:46:57.492111 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 08:46:57.495566 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 08:46:57.498690 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 08:46:57.505216 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 08:46:57.509036 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 08:46:57.512128 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 08:46:57.515360 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 08:46:57.521989 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 08:46:57.522095
1896 08:46:57.522179 MTRR check
1897 08:46:57.525316 Fixed MTRRs : Enabled
1898 08:46:57.528456 Variable MTRRs: Enabled
1899 08:46:57.528562
1900 08:46:57.528651 call enable_fixed_mtrr()
1901 08:46:57.535382 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 08:46:57.538680 CPU physical address size: 39 bits
1903 08:46:57.545588 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 08:46:57.548874 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 08:46:57.551910 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 08:46:57.555471 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 08:46:57.562056 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 08:46:57.565421 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 08:46:57.568802 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 08:46:57.571925 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 08:46:57.578954 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 08:46:57.582142 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 08:46:57.585233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 08:46:57.589024 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 08:46:57.591888 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 08:46:57.598773 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 08:46:57.602157 call enable_fixed_mtrr()
1918 08:46:57.605565 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 08:46:57.608397 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 08:46:57.612035 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 08:46:57.618285 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 08:46:57.622029 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 08:46:57.625085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 08:46:57.628136 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 08:46:57.631714 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 08:46:57.638430 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 08:46:57.641764 CPU physical address size: 39 bits
1928 08:46:57.644969 call enable_fixed_mtrr()
1929 08:46:57.647988 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 08:46:57.651437 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 08:46:57.654822 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 08:46:57.661581 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 08:46:57.664913 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 08:46:57.667924 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 08:46:57.671101 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 08:46:57.678069 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 08:46:57.681066 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 08:46:57.684506 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 08:46:57.687840 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 08:46:57.694594 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 08:46:57.698068 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 08:46:57.701035 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 08:46:57.704683 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 08:46:57.711422 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 08:46:57.714263 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 08:46:57.717573 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 08:46:57.720928 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 08:46:57.724462 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 08:46:57.731161 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 08:46:57.734037 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 08:46:57.737843 call enable_fixed_mtrr()
1952 08:46:57.740856 call enable_fixed_mtrr()
1953 08:46:57.744480 CPU physical address size: 39 bits
1954 08:46:57.747462 CPU physical address size: 39 bits
1955 08:46:57.750703 CPU physical address size: 39 bits
1956 08:46:57.753927 CBFS @ c08000 size 3f8000
1957 08:46:57.757207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1958 08:46:57.760748 CBFS: Locating 'fallback/payload'
1959 08:46:57.767383 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 08:46:57.770604 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 08:46:57.773749 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 08:46:57.777117 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 08:46:57.783564 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 08:46:57.787565 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 08:46:57.790640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 08:46:57.793958 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 08:46:57.799963 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 08:46:57.803807 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 08:46:57.806764 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 08:46:57.810281 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 08:46:57.817286 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 08:46:57.820762 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 08:46:57.823622 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 08:46:57.826743 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 08:46:57.833464 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 08:46:57.836849 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 08:46:57.839932 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 08:46:57.843584 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 08:46:57.846676 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 08:46:57.853614 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 08:46:57.856914 call enable_fixed_mtrr()
1982 08:46:57.857222 call enable_fixed_mtrr()
1983 08:46:57.863576 CBFS: Found @ offset 1c96c0 size 3f798
1984 08:46:57.866276 CPU physical address size: 39 bits
1985 08:46:57.869502 CPU physical address size: 39 bits
1986 08:46:57.872954 Checking segment from ROM address 0xffdd16f8
1987 08:46:57.879833 Checking segment from ROM address 0xffdd1714
1988 08:46:57.882994 Loading segment from ROM address 0xffdd16f8
1989 08:46:57.886317 code (compression=0)
1990 08:46:57.892797 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 08:46:57.902686 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 08:46:57.902993 it's not compressed!
1993 08:46:57.996527 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 08:46:58.003019 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 08:46:58.006387 Loading segment from ROM address 0xffdd1714
1996 08:46:58.009527 Entry Point 0x30000000
1997 08:46:58.012798 Loaded segments
1998 08:46:58.018863 Finalizing chipset.
1999 08:46:58.021927 Finalizing SMM.
2000 08:46:58.024820 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 08:46:58.028334 mp_park_aps done after 0 msecs.
2002 08:46:58.034880 Jumping to boot code at 30000000(99b62000)
2003 08:46:58.041960 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 08:46:58.042387
2005 08:46:58.042716
2006 08:46:58.043023
2007 08:46:58.044991 Starting depthcharge on Helios...
2008 08:46:58.045432
2009 08:46:58.046521 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 08:46:58.046997 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 08:46:58.047398 Setting prompt string to ['hatch:']
2012 08:46:58.047801 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 08:46:58.054803 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 08:46:58.055288
2015 08:46:58.061773 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 08:46:58.062329
2017 08:46:58.068219 board_setup: Info: eMMC controller not present; skipping
2018 08:46:58.068691
2019 08:46:58.071549 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 08:46:58.072102
2021 08:46:58.078037 board_setup: Info: SDHCI controller not present; skipping
2022 08:46:58.078460
2023 08:46:58.081421 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 08:46:58.084745
2025 08:46:58.085161 Wipe memory regions:
2026 08:46:58.085496
2027 08:46:58.087990 [0x00000000001000, 0x000000000a0000)
2028 08:46:58.088459
2029 08:46:58.091604 [0x00000000100000, 0x00000030000000)
2030 08:46:58.157728
2031 08:46:58.160720 [0x00000030657430, 0x00000099a2c000)
2032 08:46:58.307786
2033 08:46:58.310352 [0x00000100000000, 0x0000045e800000)
2034 08:46:59.766300
2035 08:46:59.766788 R8152: Initializing
2036 08:46:59.767128
2037 08:46:59.769602 Version 9 (ocp_data = 6010)
2038 08:46:59.774326
2039 08:46:59.774741 R8152: Done initializing
2040 08:46:59.775081
2041 08:46:59.777050 Adding net device
2042 08:47:00.259688
2043 08:47:00.259836 R8152: Initializing
2044 08:47:00.259911
2045 08:47:00.263178 Version 6 (ocp_data = 5c30)
2046 08:47:00.263272
2047 08:47:00.266024 R8152: Done initializing
2048 08:47:00.266116
2049 08:47:00.269630 net_add_device: Attemp to include the same device
2050 08:47:00.273449
2051 08:47:00.280368 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 08:47:00.280462
2053 08:47:00.280534
2054 08:47:00.280602
2055 08:47:00.280889 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 08:47:00.381299 hatch: tftpboot 192.168.201.1 12243849/tftp-deploy-ajjnj4zb/kernel/bzImage 12243849/tftp-deploy-ajjnj4zb/kernel/cmdline 12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
2058 08:47:00.381563 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 08:47:00.381754 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 08:47:00.386379 tftpboot 192.168.201.1 12243849/tftp-deploy-ajjnj4zb/kernel/bzIploy-ajjnj4zb/kernel/cmdline 12243849/tftp-deploy-ajjnj4zb/ramdisk/ramdisk.cpio.gz
2061 08:47:00.386578
2062 08:47:00.386729 Waiting for link
2063 08:47:00.586923
2064 08:47:00.587062 done.
2065 08:47:00.587138
2066 08:47:00.587206 MAC: 00:24:32:50:1a:59
2067 08:47:00.587272
2068 08:47:00.590069 Sending DHCP discover... done.
2069 08:47:00.590163
2070 08:47:00.593297 Waiting for reply... done.
2071 08:47:00.593391
2072 08:47:00.596727 Sending DHCP request... done.
2073 08:47:00.596820
2074 08:47:00.603491 Waiting for reply... done.
2075 08:47:00.603584
2076 08:47:00.603657 My ip is 192.168.201.14
2077 08:47:00.603725
2078 08:47:00.606938 The DHCP server ip is 192.168.201.1
2079 08:47:00.610124
2080 08:47:00.613154 TFTP server IP predefined by user: 192.168.201.1
2081 08:47:00.613280
2082 08:47:00.619938 Bootfile predefined by user: 12243849/tftp-deploy-ajjnj4zb/kernel/bzImage
2083 08:47:00.620086
2084 08:47:00.623583 Sending tftp read request... done.
2085 08:47:00.623694
2086 08:47:00.626604 Waiting for the transfer...
2087 08:47:00.626724
2088 08:47:01.182886 00000000 ################################################################
2089 08:47:01.183074
2090 08:47:01.714939 00080000 ################################################################
2091 08:47:01.715116
2092 08:47:02.244142 00100000 ################################################################
2093 08:47:02.244323
2094 08:47:02.759992 00180000 ################################################################
2095 08:47:02.760135
2096 08:47:03.275297 00200000 ################################################################
2097 08:47:03.275475
2098 08:47:03.789810 00280000 ################################################################
2099 08:47:03.789972
2100 08:47:04.304000 00300000 ################################################################
2101 08:47:04.304148
2102 08:47:04.853602 00380000 ################################################################
2103 08:47:04.853752
2104 08:47:05.410531 00400000 ################################################################
2105 08:47:05.410680
2106 08:47:05.956965 00480000 ################################################################
2107 08:47:05.957113
2108 08:47:06.493660 00500000 ################################################################
2109 08:47:06.493807
2110 08:47:07.029089 00580000 ################################################################
2111 08:47:07.029238
2112 08:47:07.573344 00600000 ################################################################
2113 08:47:07.573492
2114 08:47:08.131313 00680000 ################################################################
2115 08:47:08.131459
2116 08:47:08.694964 00700000 ################################################################
2117 08:47:08.695110
2118 08:47:09.231297 00780000 ################################################################
2119 08:47:09.231461
2120 08:47:09.414372 00800000 ####################### done.
2121 08:47:09.414530
2122 08:47:09.417258 The bootfile was 8572816 bytes long.
2123 08:47:09.417360
2124 08:47:09.421051 Sending tftp read request... done.
2125 08:47:09.421146
2126 08:47:09.424014 Waiting for the transfer...
2127 08:47:09.424107
2128 08:47:09.951316 00000000 ################################################################
2129 08:47:09.951477
2130 08:47:10.497666 00080000 ################################################################
2131 08:47:10.497809
2132 08:47:11.049582 00100000 ################################################################
2133 08:47:11.049759
2134 08:47:11.603939 00180000 ################################################################
2135 08:47:11.604081
2136 08:47:12.142319 00200000 ################################################################
2137 08:47:12.142504
2138 08:47:12.664661 00280000 ################################################################
2139 08:47:12.664834
2140 08:47:13.213993 00300000 ################################################################
2141 08:47:13.214181
2142 08:47:13.779684 00380000 ################################################################
2143 08:47:13.779826
2144 08:47:14.356888 00400000 ################################################################
2145 08:47:14.357413
2146 08:47:15.010613 00480000 ################################################################
2147 08:47:15.010785
2148 08:47:15.580748 00500000 ############################################################### done.
2149 08:47:15.580906
2150 08:47:15.583935 Sending tftp read request... done.
2151 08:47:15.584020
2152 08:47:15.587265 Waiting for the transfer...
2153 08:47:15.587351
2154 08:47:15.587422 00000000 # done.
2155 08:47:15.587490
2156 08:47:15.597122 Command line loaded dynamically from TFTP file: 12243849/tftp-deploy-ajjnj4zb/kernel/cmdline
2157 08:47:15.597213
2158 08:47:15.626893 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243849/extract-nfsrootfs-fdf3x9cw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 08:47:15.626994
2160 08:47:15.629851 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 08:47:15.636010
2162 08:47:15.639245 Shutting down all USB controllers.
2163 08:47:15.639336
2164 08:47:15.639409 Removing current net device
2165 08:47:15.643810
2166 08:47:15.643902 Finalizing coreboot
2167 08:47:15.643980
2168 08:47:15.650222 Exiting depthcharge with code 4 at timestamp: 24930088
2169 08:47:15.650309
2170 08:47:15.650382
2171 08:47:15.650452 Starting kernel ...
2172 08:47:15.650521
2173 08:47:15.650610
2174 08:47:15.651022 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2175 08:47:15.651144 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2176 08:47:15.651243 Setting prompt string to ['Linux version [0-9]']
2177 08:47:15.651338 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 08:47:15.651430 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 08:51:39.652166 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2182 08:51:39.653205 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2184 08:51:39.653658 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 08:51:39.653943 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 08:51:39.654187 Cleaning after the job
2190 08:51:39.654289 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/ramdisk
2191 08:51:39.655465 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/kernel
2192 08:51:39.656880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/nfsrootfs
2193 08:51:39.741081 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243849/tftp-deploy-ajjnj4zb/modules
2194 08:51:39.741569 start: 5.1 power-off (timeout 00:00:30) [common]
2195 08:51:39.741753 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2196 08:51:39.821178 >> Command sent successfully.
2197 08:51:39.823899 Returned 0 in 0 seconds
2198 08:51:39.924650 end: 5.1 power-off (duration 00:00:00) [common]
2200 08:51:39.925976 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 08:51:39.927128 Listened to connection for namespace 'common' for up to 1s
2203 08:51:39.928399 Listened to connection for namespace 'common' for up to 1s
2204 08:51:40.927821 Finalising connection for namespace 'common'
2205 08:51:40.928534 Disconnecting from shell: Finalise
2206 08:51:40.928986
2207 08:51:41.030183 end: 5.2 read-feedback (duration 00:00:01) [common]
2208 08:51:41.030801 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243849
2209 08:51:41.387363 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243849
2210 08:51:41.387583 JobError: Your job cannot terminate cleanly.