Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:45:39.048955 lava-dispatcher, installed at version: 2023.10
2 08:45:39.049172 start: 0 validate
3 08:45:39.049307 Start time: 2023-12-11 08:45:39.049299+00:00 (UTC)
4 08:45:39.049435 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:45:39.049559 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 08:45:39.323787 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:45:39.324562 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:45:39.595454 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:45:39.596330 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 08:45:42.296294 Using caching service: 'http://localhost/cache/?uri=%s'
11 08:45:42.297046 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 08:45:42.572953 validate duration: 3.52
14 08:45:42.573234 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:45:42.573335 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:45:42.573423 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:45:42.573545 Not decompressing ramdisk as can be used compressed.
18 08:45:42.573629 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 08:45:42.573692 saving as /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/ramdisk/initrd.cpio.gz
20 08:45:42.573755 total size: 5432690 (5 MB)
21 08:45:43.099585 progress 0 % (0 MB)
22 08:45:43.109397 progress 5 % (0 MB)
23 08:45:43.118262 progress 10 % (0 MB)
24 08:45:43.126674 progress 15 % (0 MB)
25 08:45:43.134148 progress 20 % (1 MB)
26 08:45:43.138780 progress 25 % (1 MB)
27 08:45:43.142410 progress 30 % (1 MB)
28 08:45:43.146009 progress 35 % (1 MB)
29 08:45:43.148686 progress 40 % (2 MB)
30 08:45:43.150215 progress 45 % (2 MB)
31 08:45:43.151682 progress 50 % (2 MB)
32 08:45:43.153455 progress 55 % (2 MB)
33 08:45:43.154972 progress 60 % (3 MB)
34 08:45:43.156513 progress 65 % (3 MB)
35 08:45:43.158254 progress 70 % (3 MB)
36 08:45:43.159737 progress 75 % (3 MB)
37 08:45:43.161275 progress 80 % (4 MB)
38 08:45:43.162813 progress 85 % (4 MB)
39 08:45:43.164499 progress 90 % (4 MB)
40 08:45:43.166030 progress 95 % (4 MB)
41 08:45:43.167544 progress 100 % (5 MB)
42 08:45:43.167806 5 MB downloaded in 0.59 s (8.72 MB/s)
43 08:45:43.167978 end: 1.1.1 http-download (duration 00:00:01) [common]
45 08:45:43.168284 end: 1.1 download-retry (duration 00:00:01) [common]
46 08:45:43.168418 start: 1.2 download-retry (timeout 00:09:59) [common]
47 08:45:43.168500 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 08:45:43.168701 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 08:45:43.168802 saving as /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/kernel/bzImage
50 08:45:43.168861 total size: 8572816 (8 MB)
51 08:45:43.168934 No compression specified
52 08:45:43.170135 progress 0 % (0 MB)
53 08:45:43.172616 progress 5 % (0 MB)
54 08:45:43.175058 progress 10 % (0 MB)
55 08:45:43.177537 progress 15 % (1 MB)
56 08:45:43.180002 progress 20 % (1 MB)
57 08:45:43.182706 progress 25 % (2 MB)
58 08:45:43.185136 progress 30 % (2 MB)
59 08:45:43.187503 progress 35 % (2 MB)
60 08:45:43.189800 progress 40 % (3 MB)
61 08:45:43.192048 progress 45 % (3 MB)
62 08:45:43.194368 progress 50 % (4 MB)
63 08:45:43.196713 progress 55 % (4 MB)
64 08:45:43.198916 progress 60 % (4 MB)
65 08:45:43.201343 progress 65 % (5 MB)
66 08:45:43.203556 progress 70 % (5 MB)
67 08:45:43.205795 progress 75 % (6 MB)
68 08:45:43.208014 progress 80 % (6 MB)
69 08:45:43.210388 progress 85 % (6 MB)
70 08:45:43.212801 progress 90 % (7 MB)
71 08:45:43.215135 progress 95 % (7 MB)
72 08:45:43.217370 progress 100 % (8 MB)
73 08:45:43.217556 8 MB downloaded in 0.05 s (167.91 MB/s)
74 08:45:43.217700 end: 1.2.1 http-download (duration 00:00:00) [common]
76 08:45:43.217934 end: 1.2 download-retry (duration 00:00:00) [common]
77 08:45:43.218019 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:45:43.218108 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:45:43.218284 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 08:45:43.218356 saving as /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/nfsrootfs/full.rootfs.tar
81 08:45:43.218418 total size: 133380384 (127 MB)
82 08:45:43.218485 Using unxz to decompress xz
83 08:45:43.222697 progress 0 % (0 MB)
84 08:45:43.561871 progress 5 % (6 MB)
85 08:45:43.913606 progress 10 % (12 MB)
86 08:45:44.199995 progress 15 % (19 MB)
87 08:45:44.384816 progress 20 % (25 MB)
88 08:45:44.626129 progress 25 % (31 MB)
89 08:45:44.972269 progress 30 % (38 MB)
90 08:45:45.315608 progress 35 % (44 MB)
91 08:45:45.718456 progress 40 % (50 MB)
92 08:45:46.103763 progress 45 % (57 MB)
93 08:45:46.462542 progress 50 % (63 MB)
94 08:45:46.837184 progress 55 % (69 MB)
95 08:45:47.199532 progress 60 % (76 MB)
96 08:45:47.566932 progress 65 % (82 MB)
97 08:45:47.928630 progress 70 % (89 MB)
98 08:45:48.292198 progress 75 % (95 MB)
99 08:45:48.726906 progress 80 % (101 MB)
100 08:45:49.186457 progress 85 % (108 MB)
101 08:45:49.453635 progress 90 % (114 MB)
102 08:45:49.799429 progress 95 % (120 MB)
103 08:45:50.189107 progress 100 % (127 MB)
104 08:45:50.194680 127 MB downloaded in 6.98 s (18.23 MB/s)
105 08:45:50.194942 end: 1.3.1 http-download (duration 00:00:07) [common]
107 08:45:50.195236 end: 1.3 download-retry (duration 00:00:07) [common]
108 08:45:50.195353 start: 1.4 download-retry (timeout 00:09:52) [common]
109 08:45:50.195457 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 08:45:50.195653 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 08:45:50.195756 saving as /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/modules/modules.tar
112 08:45:50.195855 total size: 251012 (0 MB)
113 08:45:50.195959 Using unxz to decompress xz
114 08:45:50.200683 progress 13 % (0 MB)
115 08:45:50.201152 progress 26 % (0 MB)
116 08:45:50.201396 progress 39 % (0 MB)
117 08:45:50.203011 progress 52 % (0 MB)
118 08:45:50.204944 progress 65 % (0 MB)
119 08:45:50.206841 progress 78 % (0 MB)
120 08:45:50.208613 progress 91 % (0 MB)
121 08:45:50.210548 progress 100 % (0 MB)
122 08:45:50.215960 0 MB downloaded in 0.02 s (11.91 MB/s)
123 08:45:50.216240 end: 1.4.1 http-download (duration 00:00:00) [common]
125 08:45:50.216537 end: 1.4 download-retry (duration 00:00:00) [common]
126 08:45:50.216676 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 08:45:50.216806 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 08:45:52.366572 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243795/extract-nfsrootfs-6vn3k53d
129 08:45:52.366785 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 08:45:52.366926 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 08:45:52.367128 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx
132 08:45:52.367266 makedir: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin
133 08:45:52.367370 makedir: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/tests
134 08:45:52.367472 makedir: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/results
135 08:45:52.367573 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-add-keys
136 08:45:52.367716 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-add-sources
137 08:45:52.367845 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-background-process-start
138 08:45:52.367973 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-background-process-stop
139 08:45:52.368154 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-common-functions
140 08:45:52.368279 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-echo-ipv4
141 08:45:52.368404 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-install-packages
142 08:45:52.368555 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-installed-packages
143 08:45:52.368679 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-os-build
144 08:45:52.368802 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-probe-channel
145 08:45:52.368927 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-probe-ip
146 08:45:52.369050 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-target-ip
147 08:45:52.369172 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-target-mac
148 08:45:52.369294 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-target-storage
149 08:45:52.369418 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-case
150 08:45:52.369542 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-event
151 08:45:52.369664 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-feedback
152 08:45:52.369788 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-raise
153 08:45:52.369910 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-reference
154 08:45:52.370032 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-runner
155 08:45:52.370154 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-set
156 08:45:52.370304 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-test-shell
157 08:45:52.370428 Updating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-install-packages (oe)
158 08:45:52.370580 Updating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/bin/lava-installed-packages (oe)
159 08:45:52.370720 Creating /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/environment
160 08:45:52.370830 LAVA metadata
161 08:45:52.370899 - LAVA_JOB_ID=12243795
162 08:45:52.370962 - LAVA_DISPATCHER_IP=192.168.201.1
163 08:45:52.371061 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 08:45:52.371127 skipped lava-vland-overlay
165 08:45:52.371201 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 08:45:52.371279 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 08:45:52.371340 skipped lava-multinode-overlay
168 08:45:52.371413 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 08:45:52.371490 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 08:45:52.371562 Loading test definitions
171 08:45:52.371654 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 08:45:52.371743 Using /lava-12243795 at stage 0
173 08:45:52.372395 uuid=12243795_1.5.2.3.1 testdef=None
174 08:45:52.372490 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 08:45:52.372608 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 08:45:52.373265 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 08:45:52.373540 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 08:45:52.374298 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 08:45:52.374564 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 08:45:52.375349 runner path: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/0/tests/0_dmesg test_uuid 12243795_1.5.2.3.1
183 08:45:52.375530 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 08:45:52.375764 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 08:45:52.375864 Using /lava-12243795 at stage 1
187 08:45:52.376229 uuid=12243795_1.5.2.3.5 testdef=None
188 08:45:52.376329 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 08:45:52.376437 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 08:45:52.376940 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 08:45:52.377189 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 08:45:52.377971 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 08:45:52.378258 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 08:45:52.378971 runner path: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/1/tests/1_bootrr test_uuid 12243795_1.5.2.3.5
197 08:45:52.379123 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 08:45:52.379321 Creating lava-test-runner.conf files
200 08:45:52.379382 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/0 for stage 0
201 08:45:52.379470 - 0_dmesg
202 08:45:52.379549 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243795/lava-overlay-xv7dv7yx/lava-12243795/1 for stage 1
203 08:45:52.379638 - 1_bootrr
204 08:45:52.379731 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 08:45:52.379813 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 08:45:52.387468 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 08:45:52.387572 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 08:45:52.387656 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 08:45:52.387740 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 08:45:52.387824 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 08:45:52.525600 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 08:45:52.526008 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 08:45:52.526128 extracting modules file /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243795/extract-nfsrootfs-6vn3k53d
214 08:45:52.539822 extracting modules file /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243795/extract-overlay-ramdisk-1l47c9np/ramdisk
215 08:45:52.553072 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 08:45:52.553190 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 08:45:52.553279 [common] Applying overlay to NFS
218 08:45:52.553353 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243795/compress-overlay-yhqez07h/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243795/extract-nfsrootfs-6vn3k53d
219 08:45:52.561483 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 08:45:52.561596 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 08:45:52.561684 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 08:45:52.561771 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 08:45:52.561848 Building ramdisk /var/lib/lava/dispatcher/tmp/12243795/extract-overlay-ramdisk-1l47c9np/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243795/extract-overlay-ramdisk-1l47c9np/ramdisk
224 08:45:52.632673 >> 26162 blocks
225 08:45:53.160316 rename /var/lib/lava/dispatcher/tmp/12243795/extract-overlay-ramdisk-1l47c9np/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
226 08:45:53.160789 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 08:45:53.160912 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 08:45:53.161010 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 08:45:53.161142 No mkimage arch provided, not using FIT.
230 08:45:53.161227 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 08:45:53.161311 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 08:45:53.161419 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 08:45:53.161515 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 08:45:53.161594 No LXC device requested
235 08:45:53.161669 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 08:45:53.161754 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 08:45:53.161832 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 08:45:53.161901 Checking files for TFTP limit of 4294967296 bytes.
239 08:45:53.162308 end: 1 tftp-deploy (duration 00:00:11) [common]
240 08:45:53.162410 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 08:45:53.162499 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 08:45:53.162614 substitutions:
243 08:45:53.162679 - {DTB}: None
244 08:45:53.162738 - {INITRD}: 12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
245 08:45:53.162797 - {KERNEL}: 12243795/tftp-deploy-i3w4oqwu/kernel/bzImage
246 08:45:53.162852 - {LAVA_MAC}: None
247 08:45:53.162907 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243795/extract-nfsrootfs-6vn3k53d
248 08:45:53.162960 - {NFS_SERVER_IP}: 192.168.201.1
249 08:45:53.163013 - {PRESEED_CONFIG}: None
250 08:45:53.163066 - {PRESEED_LOCAL}: None
251 08:45:53.163117 - {RAMDISK}: 12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
252 08:45:53.163170 - {ROOT_PART}: None
253 08:45:53.163221 - {ROOT}: None
254 08:45:53.163274 - {SERVER_IP}: 192.168.201.1
255 08:45:53.163326 - {TEE}: None
256 08:45:53.163377 Parsed boot commands:
257 08:45:53.163428 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 08:45:53.163604 Parsed boot commands: tftpboot 192.168.201.1 12243795/tftp-deploy-i3w4oqwu/kernel/bzImage 12243795/tftp-deploy-i3w4oqwu/kernel/cmdline 12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
259 08:45:53.163690 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 08:45:53.163776 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 08:45:53.163868 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 08:45:53.163950 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 08:45:53.164016 Not connected, no need to disconnect.
264 08:45:53.164111 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 08:45:53.164206 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 08:45:53.164272 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-7'
267 08:45:53.168364 Setting prompt string to ['lava-test: # ']
268 08:45:53.168712 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 08:45:53.168811 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 08:45:53.168906 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 08:45:53.168993 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 08:45:53.169231 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
273 08:45:58.322577 >> Command sent successfully.
274 08:45:58.334247 Returned 0 in 5 seconds
275 08:45:58.435757 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 08:45:58.437369 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 08:45:58.437923 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 08:45:58.438417 Setting prompt string to 'Starting depthcharge on Voema...'
280 08:45:58.438792 Changing prompt to 'Starting depthcharge on Voema...'
281 08:45:58.439164 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 08:45:58.440548 [Enter `^Ec?' for help]
283 08:46:00.028912
284 08:46:00.029518
285 08:46:00.038341 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 08:46:00.041924 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 08:46:00.048763 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 08:46:00.051724 CPU: AES supported, TXT NOT supported, VT supported
289 08:46:00.058488 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 08:46:00.065238 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 08:46:00.068793 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 08:46:00.071708 VBOOT: Loading verstage.
293 08:46:00.075104 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 08:46:00.082210 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 08:46:00.085247 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 08:46:00.095423 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 08:46:00.102253 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 08:46:00.102822
299 08:46:00.103198
300 08:46:00.115469 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 08:46:00.129844 Probing TPM: . done!
302 08:46:00.132866 TPM ready after 0 ms
303 08:46:00.136019 Connected to device vid:did:rid of 1ae0:0028:00
304 08:46:00.147370 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
305 08:46:00.153825 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 08:46:00.157102 Initialized TPM device CR50 revision 0
307 08:46:00.208417 tlcl_send_startup: Startup return code is 0
308 08:46:00.208566 TPM: setup succeeded
309 08:46:00.224048 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 08:46:00.238297 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 08:46:00.250778 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 08:46:00.260934 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 08:46:00.264391 Chrome EC: UHEPI supported
314 08:46:00.268631 Phase 1
315 08:46:00.271329 FMAP: area GBB found @ 1805000 (458752 bytes)
316 08:46:00.280902 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 08:46:00.287703 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 08:46:00.294467 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 08:46:00.300886 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 08:46:00.304529 Recovery requested (1009000e)
321 08:46:00.307618 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 08:46:00.319224 tlcl_extend: response is 0
323 08:46:00.326119 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 08:46:00.335711 tlcl_extend: response is 0
325 08:46:00.342118 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 08:46:00.349034 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 08:46:00.355526 BS: verstage times (exec / console): total (unknown) / 142 ms
328 08:46:00.355644
329 08:46:00.355738
330 08:46:00.368993 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 08:46:00.375370 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 08:46:00.378736 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 08:46:00.381725 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 08:46:00.389118 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 08:46:00.391994 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 08:46:00.396007 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 08:46:00.398560 TCO_STS: 0000 0000
338 08:46:00.402207 GEN_PMCON: d0015038 00002200
339 08:46:00.405238 GBLRST_CAUSE: 00000000 00000000
340 08:46:00.405359 HPR_CAUSE0: 00000000
341 08:46:00.408542 prev_sleep_state 5
342 08:46:00.411919 Boot Count incremented to 25584
343 08:46:00.418646 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 08:46:00.425091 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 08:46:00.432023 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 08:46:00.438450 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 08:46:00.442939 Chrome EC: UHEPI supported
348 08:46:00.449665 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 08:46:00.463035 Probing TPM: done!
350 08:46:00.469274 Connected to device vid:did:rid of 1ae0:0028:00
351 08:46:00.479393 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
352 08:46:00.490227 Initialized TPM device CR50 revision 0
353 08:46:00.500219 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 08:46:00.507787 MRC: Hash idx 0x100b comparison successful.
355 08:46:00.510039 MRC cache found, size faa8
356 08:46:00.510156 bootmode is set to: 2
357 08:46:00.513636 SPD index = 0
358 08:46:00.520992 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 08:46:00.523388 SPD: module type is LPDDR4X
360 08:46:00.526652 SPD: module part number is MT53E512M64D4NW-046
361 08:46:00.533464 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 08:46:00.536577 SPD: device width 16 bits, bus width 16 bits
363 08:46:00.543965 SPD: module size is 1024 MB (per channel)
364 08:46:00.976503 CBMEM:
365 08:46:00.979107 IMD: root @ 0x76fff000 254 entries.
366 08:46:00.982591 IMD: root @ 0x76ffec00 62 entries.
367 08:46:00.986148 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 08:46:00.992402 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 08:46:00.996037 External stage cache:
370 08:46:00.999171 IMD: root @ 0x7b3ff000 254 entries.
371 08:46:01.002977 IMD: root @ 0x7b3fec00 62 entries.
372 08:46:01.018005 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 08:46:01.024326 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 08:46:01.030935 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 08:46:01.045514 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 08:46:01.051446 cse_lite: Skip switching to RW in the recovery path
377 08:46:01.051540 8 DIMMs found
378 08:46:01.051609 SMM Memory Map
379 08:46:01.058318 SMRAM : 0x7b000000 0x800000
380 08:46:01.061580 Subregion 0: 0x7b000000 0x200000
381 08:46:01.065550 Subregion 1: 0x7b200000 0x200000
382 08:46:01.065636 Subregion 2: 0x7b400000 0x400000
383 08:46:01.068560 top_of_ram = 0x77000000
384 08:46:01.075934 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 08:46:01.079536 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 08:46:01.086187 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 08:46:01.089622 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 08:46:01.099325 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 08:46:01.105677 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 08:46:01.115883 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 08:46:01.118915 Processing 211 relocs. Offset value of 0x74c0b000
392 08:46:01.128074 BS: romstage times (exec / console): total (unknown) / 277 ms
393 08:46:01.133937
394 08:46:01.134037
395 08:46:01.144240 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 08:46:01.147828 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 08:46:01.157144 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 08:46:01.163815 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 08:46:01.170913 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 08:46:01.177625 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 08:46:01.224154 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 08:46:01.230887 Processing 5008 relocs. Offset value of 0x75d98000
403 08:46:01.233789 BS: postcar times (exec / console): total (unknown) / 59 ms
404 08:46:01.237567
405 08:46:01.237650
406 08:46:01.247134 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 08:46:01.247221 Normal boot
408 08:46:01.250628 FW_CONFIG value is 0x804c02
409 08:46:01.254593 PCI: 00:07.0 disabled by fw_config
410 08:46:01.257345 PCI: 00:07.1 disabled by fw_config
411 08:46:01.261564 PCI: 00:0d.2 disabled by fw_config
412 08:46:01.265326 PCI: 00:1c.7 disabled by fw_config
413 08:46:01.271269 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 08:46:01.278607 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 08:46:01.281260 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 08:46:01.285110 GENERIC: 0.0 disabled by fw_config
417 08:46:01.287793 GENERIC: 1.0 disabled by fw_config
418 08:46:01.294372 fw_config match found: DB_USB=USB3_ACTIVE
419 08:46:01.298168 fw_config match found: DB_USB=USB3_ACTIVE
420 08:46:01.300989 fw_config match found: DB_USB=USB3_ACTIVE
421 08:46:01.304421 fw_config match found: DB_USB=USB3_ACTIVE
422 08:46:01.311152 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 08:46:01.317681 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 08:46:01.324182 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 08:46:01.334305 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 08:46:01.337616 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 08:46:01.344311 microcode: Update skipped, already up-to-date
428 08:46:01.350638 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 08:46:01.377904 Detected 4 core, 8 thread CPU.
430 08:46:01.381113 Setting up SMI for CPU
431 08:46:01.384639 IED base = 0x7b400000
432 08:46:01.384724 IED size = 0x00400000
433 08:46:01.387680 Will perform SMM setup.
434 08:46:01.394306 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 08:46:01.401171 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 08:46:01.407418 Processing 16 relocs. Offset value of 0x00030000
437 08:46:01.411034 Attempting to start 7 APs
438 08:46:01.414317 Waiting for 10ms after sending INIT.
439 08:46:01.429740 Waiting for 1st SIPI to complete...done.
440 08:46:01.429833 AP: slot 1 apic_id 1.
441 08:46:01.433537 AP: slot 3 apic_id 6.
442 08:46:01.436645 AP: slot 7 apic_id 7.
443 08:46:01.439572 Waiting for 2nd SIPI to complete...done.
444 08:46:01.443099 AP: slot 2 apic_id 3.
445 08:46:01.443205 AP: slot 6 apic_id 2.
446 08:46:01.446407 AP: slot 5 apic_id 4.
447 08:46:01.449730 AP: slot 4 apic_id 5.
448 08:46:01.456527 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 08:46:01.463232 Processing 13 relocs. Offset value of 0x00038000
450 08:46:01.463319 Unable to locate Global NVS
451 08:46:01.473052 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 08:46:01.476048 Installing permanent SMM handler to 0x7b000000
453 08:46:01.486180 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 08:46:01.489537 Processing 794 relocs. Offset value of 0x7b010000
455 08:46:01.499552 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 08:46:01.502711 Processing 13 relocs. Offset value of 0x7b008000
457 08:46:01.509526 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 08:46:01.516615 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 08:46:01.519880 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 08:46:01.526361 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 08:46:01.532558 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 08:46:01.539684 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 08:46:01.545915 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 08:46:01.546004 Unable to locate Global NVS
465 08:46:01.555917 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 08:46:01.559421 Clearing SMI status registers
467 08:46:01.559509 SMI_STS: PM1
468 08:46:01.562679 PM1_STS: PWRBTN
469 08:46:01.569434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 08:46:01.573017 In relocation handler: CPU 0
471 08:46:01.576033 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 08:46:01.582668 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 08:46:01.582759 Relocation complete.
474 08:46:01.593221 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 08:46:01.593310 In relocation handler: CPU 1
476 08:46:01.599518 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 08:46:01.599605 Relocation complete.
478 08:46:01.605956 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 08:46:01.609004 In relocation handler: CPU 6
480 08:46:01.615611 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 08:46:01.618992 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 08:46:01.622865 Relocation complete.
483 08:46:01.629263 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 08:46:01.632274 In relocation handler: CPU 2
485 08:46:01.635611 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 08:46:01.638923 Relocation complete.
487 08:46:01.645884 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
488 08:46:01.649589 In relocation handler: CPU 7
489 08:46:01.652699 New SMBASE=0x7affe400 IEDBASE=0x7b400000
490 08:46:01.655569 Relocation complete.
491 08:46:01.662131 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
492 08:46:01.665522 In relocation handler: CPU 3
493 08:46:01.668859 New SMBASE=0x7afff400 IEDBASE=0x7b400000
494 08:46:01.673025 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 08:46:01.675526 Relocation complete.
496 08:46:01.682339 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 08:46:01.685532 In relocation handler: CPU 4
498 08:46:01.689091 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 08:46:01.692657 Relocation complete.
500 08:46:01.698818 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 08:46:01.702147 In relocation handler: CPU 5
502 08:46:01.705825 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 08:46:01.712372 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 08:46:01.712485 Relocation complete.
505 08:46:01.715452 Initializing CPU #0
506 08:46:01.718655 CPU: vendor Intel device 806c1
507 08:46:01.721677 CPU: family 06, model 8c, stepping 01
508 08:46:01.725191 Clearing out pending MCEs
509 08:46:01.728623 Setting up local APIC...
510 08:46:01.731907 apic_id: 0x00 done.
511 08:46:01.732016 Turbo is available but hidden
512 08:46:01.735152 Turbo is available and visible
513 08:46:01.742938 microcode: Update skipped, already up-to-date
514 08:46:01.743026 CPU #0 initialized
515 08:46:01.746489 Initializing CPU #6
516 08:46:01.746573 Initializing CPU #2
517 08:46:01.750035 CPU: vendor Intel device 806c1
518 08:46:01.753020 CPU: family 06, model 8c, stepping 01
519 08:46:01.756498 CPU: vendor Intel device 806c1
520 08:46:01.760298 CPU: family 06, model 8c, stepping 01
521 08:46:01.763288 Clearing out pending MCEs
522 08:46:01.766392 Clearing out pending MCEs
523 08:46:01.769893 Setting up local APIC...
524 08:46:01.769976 Initializing CPU #4
525 08:46:01.773633 Initializing CPU #5
526 08:46:01.776505 CPU: vendor Intel device 806c1
527 08:46:01.780313 CPU: family 06, model 8c, stepping 01
528 08:46:01.783378 CPU: vendor Intel device 806c1
529 08:46:01.786317 CPU: family 06, model 8c, stepping 01
530 08:46:01.789993 Clearing out pending MCEs
531 08:46:01.793180 Initializing CPU #3
532 08:46:01.793264 Initializing CPU #7
533 08:46:01.796153 CPU: vendor Intel device 806c1
534 08:46:01.799639 CPU: family 06, model 8c, stepping 01
535 08:46:01.802902 CPU: vendor Intel device 806c1
536 08:46:01.806514 CPU: family 06, model 8c, stepping 01
537 08:46:01.809840 Clearing out pending MCEs
538 08:46:01.812786 Clearing out pending MCEs
539 08:46:01.815931 Setting up local APIC...
540 08:46:01.819238 Clearing out pending MCEs
541 08:46:01.819323 Setting up local APIC...
542 08:46:01.823070 apic_id: 0x02 done.
543 08:46:01.826026 Setting up local APIC...
544 08:46:01.826136 apic_id: 0x06 done.
545 08:46:01.829391 Setting up local APIC...
546 08:46:01.835879 microcode: Update skipped, already up-to-date
547 08:46:01.835994 apic_id: 0x03 done.
548 08:46:01.839628 CPU #6 initialized
549 08:46:01.842496 microcode: Update skipped, already up-to-date
550 08:46:01.845925 apic_id: 0x05 done.
551 08:46:01.849128 Setting up local APIC...
552 08:46:01.852875 microcode: Update skipped, already up-to-date
553 08:46:01.855839 apic_id: 0x04 done.
554 08:46:01.855948 CPU #4 initialized
555 08:46:01.863814 microcode: Update skipped, already up-to-date
556 08:46:01.865892 microcode: Update skipped, already up-to-date
557 08:46:01.869175 apic_id: 0x07 done.
558 08:46:01.869259 CPU #3 initialized
559 08:46:01.875978 microcode: Update skipped, already up-to-date
560 08:46:01.876095 CPU #5 initialized
561 08:46:01.879049 CPU #7 initialized
562 08:46:01.879133 CPU #2 initialized
563 08:46:01.882416 Initializing CPU #1
564 08:46:01.886188 CPU: vendor Intel device 806c1
565 08:46:01.889243 CPU: family 06, model 8c, stepping 01
566 08:46:01.892797 Clearing out pending MCEs
567 08:46:01.895586 Setting up local APIC...
568 08:46:01.895670 apic_id: 0x01 done.
569 08:46:01.902352 microcode: Update skipped, already up-to-date
570 08:46:01.902439 CPU #1 initialized
571 08:46:01.908847 bsp_do_flight_plan done after 464 msecs.
572 08:46:01.912372 CPU: frequency set to 4000 MHz
573 08:46:01.912458 Enabling SMIs.
574 08:46:01.918837 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
575 08:46:01.935007 SATAXPCIE1 indicates PCIe NVMe is present
576 08:46:01.938832 Probing TPM: done!
577 08:46:01.942095 Connected to device vid:did:rid of 1ae0:0028:00
578 08:46:01.952280 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
579 08:46:01.955733 Initialized TPM device CR50 revision 0
580 08:46:01.959061 Enabling S0i3.4
581 08:46:01.966188 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 08:46:01.969136 Found a VBT of 8704 bytes after decompression
583 08:46:01.975914 cse_lite: CSE RO boot. HybridStorageMode disabled
584 08:46:01.982522 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 08:46:02.058923 FSPS returned 0
586 08:46:02.061904 Executing Phase 1 of FspMultiPhaseSiInit
587 08:46:02.072798 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 08:46:02.076415 port C0 DISC req: usage 1 usb3 1 usb2 5
589 08:46:02.078509 Raw Buffer output 0 00000511
590 08:46:02.081818 Raw Buffer output 1 00000000
591 08:46:02.085723 pmc_send_ipc_cmd succeeded
592 08:46:02.092449 port C1 DISC req: usage 1 usb3 2 usb2 3
593 08:46:02.092534 Raw Buffer output 0 00000321
594 08:46:02.095475 Raw Buffer output 1 00000000
595 08:46:02.099734 pmc_send_ipc_cmd succeeded
596 08:46:02.105070 Detected 4 core, 8 thread CPU.
597 08:46:02.108860 Detected 4 core, 8 thread CPU.
598 08:46:02.342564 Display FSP Version Info HOB
599 08:46:02.346037 Reference Code - CPU = a.0.4c.31
600 08:46:02.349015 uCode Version = 0.0.0.86
601 08:46:02.352391 TXT ACM version = ff.ff.ff.ffff
602 08:46:02.356071 Reference Code - ME = a.0.4c.31
603 08:46:02.359096 MEBx version = 0.0.0.0
604 08:46:02.362083 ME Firmware Version = Consumer SKU
605 08:46:02.365580 Reference Code - PCH = a.0.4c.31
606 08:46:02.369490 PCH-CRID Status = Disabled
607 08:46:02.372232 PCH-CRID Original Value = ff.ff.ff.ffff
608 08:46:02.375488 PCH-CRID New Value = ff.ff.ff.ffff
609 08:46:02.378791 OPROM - RST - RAID = ff.ff.ff.ffff
610 08:46:02.382487 PCH Hsio Version = 4.0.0.0
611 08:46:02.385804 Reference Code - SA - System Agent = a.0.4c.31
612 08:46:02.388709 Reference Code - MRC = 2.0.0.1
613 08:46:02.391992 SA - PCIe Version = a.0.4c.31
614 08:46:02.395446 SA-CRID Status = Disabled
615 08:46:02.398677 SA-CRID Original Value = 0.0.0.1
616 08:46:02.402233 SA-CRID New Value = 0.0.0.1
617 08:46:02.406104 OPROM - VBIOS = ff.ff.ff.ffff
618 08:46:02.408853 IO Manageability Engine FW Version = 11.1.4.0
619 08:46:02.412393 PHY Build Version = 0.0.0.e0
620 08:46:02.415894 Thunderbolt(TM) FW Version = 0.0.0.0
621 08:46:02.422101 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 08:46:02.425806 ITSS IRQ Polarities Before:
623 08:46:02.425891 IPC0: 0xffffffff
624 08:46:02.429535 IPC1: 0xffffffff
625 08:46:02.429618 IPC2: 0xffffffff
626 08:46:02.432231 IPC3: 0xffffffff
627 08:46:02.435230 ITSS IRQ Polarities After:
628 08:46:02.435312 IPC0: 0xffffffff
629 08:46:02.439895 IPC1: 0xffffffff
630 08:46:02.440005 IPC2: 0xffffffff
631 08:46:02.442036 IPC3: 0xffffffff
632 08:46:02.445009 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 08:46:02.458571 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 08:46:02.468665 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 08:46:02.481618 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 08:46:02.488767 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 08:46:02.488878 Enumerating buses...
638 08:46:02.495587 Show all devs... Before device enumeration.
639 08:46:02.498640 Root Device: enabled 1
640 08:46:02.498726 DOMAIN: 0000: enabled 1
641 08:46:02.502163 CPU_CLUSTER: 0: enabled 1
642 08:46:02.505119 PCI: 00:00.0: enabled 1
643 08:46:02.508855 PCI: 00:02.0: enabled 1
644 08:46:02.508945 PCI: 00:04.0: enabled 1
645 08:46:02.511755 PCI: 00:05.0: enabled 1
646 08:46:02.515191 PCI: 00:06.0: enabled 0
647 08:46:02.515268 PCI: 00:07.0: enabled 0
648 08:46:02.518689 PCI: 00:07.1: enabled 0
649 08:46:02.522048 PCI: 00:07.2: enabled 0
650 08:46:02.524845 PCI: 00:07.3: enabled 0
651 08:46:02.524953 PCI: 00:08.0: enabled 1
652 08:46:02.528395 PCI: 00:09.0: enabled 0
653 08:46:02.531619 PCI: 00:0a.0: enabled 0
654 08:46:02.534976 PCI: 00:0d.0: enabled 1
655 08:46:02.535086 PCI: 00:0d.1: enabled 0
656 08:46:02.538228 PCI: 00:0d.2: enabled 0
657 08:46:02.541876 PCI: 00:0d.3: enabled 0
658 08:46:02.545553 PCI: 00:0e.0: enabled 0
659 08:46:02.545696 PCI: 00:10.2: enabled 1
660 08:46:02.548970 PCI: 00:10.6: enabled 0
661 08:46:02.551612 PCI: 00:10.7: enabled 0
662 08:46:02.551696 PCI: 00:12.0: enabled 0
663 08:46:02.555027 PCI: 00:12.6: enabled 0
664 08:46:02.558152 PCI: 00:13.0: enabled 0
665 08:46:02.561739 PCI: 00:14.0: enabled 1
666 08:46:02.561850 PCI: 00:14.1: enabled 0
667 08:46:02.564698 PCI: 00:14.2: enabled 1
668 08:46:02.568063 PCI: 00:14.3: enabled 1
669 08:46:02.571750 PCI: 00:15.0: enabled 1
670 08:46:02.571860 PCI: 00:15.1: enabled 1
671 08:46:02.575066 PCI: 00:15.2: enabled 1
672 08:46:02.578091 PCI: 00:15.3: enabled 1
673 08:46:02.581496 PCI: 00:16.0: enabled 1
674 08:46:02.581598 PCI: 00:16.1: enabled 0
675 08:46:02.584667 PCI: 00:16.2: enabled 0
676 08:46:02.587979 PCI: 00:16.3: enabled 0
677 08:46:02.591612 PCI: 00:16.4: enabled 0
678 08:46:02.591697 PCI: 00:16.5: enabled 0
679 08:46:02.594648 PCI: 00:17.0: enabled 1
680 08:46:02.598247 PCI: 00:19.0: enabled 0
681 08:46:02.598331 PCI: 00:19.1: enabled 1
682 08:46:02.601718 PCI: 00:19.2: enabled 0
683 08:46:02.605038 PCI: 00:1c.0: enabled 1
684 08:46:02.607942 PCI: 00:1c.1: enabled 0
685 08:46:02.608074 PCI: 00:1c.2: enabled 0
686 08:46:02.611450 PCI: 00:1c.3: enabled 0
687 08:46:02.614632 PCI: 00:1c.4: enabled 0
688 08:46:02.618382 PCI: 00:1c.5: enabled 0
689 08:46:02.618493 PCI: 00:1c.6: enabled 1
690 08:46:02.621283 PCI: 00:1c.7: enabled 0
691 08:46:02.624673 PCI: 00:1d.0: enabled 1
692 08:46:02.628187 PCI: 00:1d.1: enabled 0
693 08:46:02.628271 PCI: 00:1d.2: enabled 1
694 08:46:02.632006 PCI: 00:1d.3: enabled 0
695 08:46:02.634696 PCI: 00:1e.0: enabled 1
696 08:46:02.634779 PCI: 00:1e.1: enabled 0
697 08:46:02.638745 PCI: 00:1e.2: enabled 1
698 08:46:02.641223 PCI: 00:1e.3: enabled 1
699 08:46:02.644512 PCI: 00:1f.0: enabled 1
700 08:46:02.644596 PCI: 00:1f.1: enabled 0
701 08:46:02.648669 PCI: 00:1f.2: enabled 1
702 08:46:02.651994 PCI: 00:1f.3: enabled 1
703 08:46:02.654747 PCI: 00:1f.4: enabled 0
704 08:46:02.654831 PCI: 00:1f.5: enabled 1
705 08:46:02.658270 PCI: 00:1f.6: enabled 0
706 08:46:02.661531 PCI: 00:1f.7: enabled 0
707 08:46:02.661614 APIC: 00: enabled 1
708 08:46:02.664819 GENERIC: 0.0: enabled 1
709 08:46:02.668101 GENERIC: 0.0: enabled 1
710 08:46:02.670948 GENERIC: 1.0: enabled 1
711 08:46:02.671031 GENERIC: 0.0: enabled 1
712 08:46:02.674447 GENERIC: 1.0: enabled 1
713 08:46:02.677613 USB0 port 0: enabled 1
714 08:46:02.681004 GENERIC: 0.0: enabled 1
715 08:46:02.681114 USB0 port 0: enabled 1
716 08:46:02.684571 GENERIC: 0.0: enabled 1
717 08:46:02.687981 I2C: 00:1a: enabled 1
718 08:46:02.688126 I2C: 00:31: enabled 1
719 08:46:02.691162 I2C: 00:32: enabled 1
720 08:46:02.694862 I2C: 00:10: enabled 1
721 08:46:02.694946 I2C: 00:15: enabled 1
722 08:46:02.699712 GENERIC: 0.0: enabled 0
723 08:46:02.701086 GENERIC: 1.0: enabled 0
724 08:46:02.704304 GENERIC: 0.0: enabled 1
725 08:46:02.704415 SPI: 00: enabled 1
726 08:46:02.707614 SPI: 00: enabled 1
727 08:46:02.707698 PNP: 0c09.0: enabled 1
728 08:46:02.711363 GENERIC: 0.0: enabled 1
729 08:46:02.714729 USB3 port 0: enabled 1
730 08:46:02.717610 USB3 port 1: enabled 1
731 08:46:02.717694 USB3 port 2: enabled 0
732 08:46:02.720855 USB3 port 3: enabled 0
733 08:46:02.724412 USB2 port 0: enabled 0
734 08:46:02.724495 USB2 port 1: enabled 1
735 08:46:02.728139 USB2 port 2: enabled 1
736 08:46:02.731296 USB2 port 3: enabled 0
737 08:46:02.734083 USB2 port 4: enabled 1
738 08:46:02.734166 USB2 port 5: enabled 0
739 08:46:02.737402 USB2 port 6: enabled 0
740 08:46:02.741093 USB2 port 7: enabled 0
741 08:46:02.741177 USB2 port 8: enabled 0
742 08:46:02.744217 USB2 port 9: enabled 0
743 08:46:02.747384 USB3 port 0: enabled 0
744 08:46:02.751000 USB3 port 1: enabled 1
745 08:46:02.751084 USB3 port 2: enabled 0
746 08:46:02.754742 USB3 port 3: enabled 0
747 08:46:02.757471 GENERIC: 0.0: enabled 1
748 08:46:02.757554 GENERIC: 1.0: enabled 1
749 08:46:02.760633 APIC: 01: enabled 1
750 08:46:02.764265 APIC: 03: enabled 1
751 08:46:02.764348 APIC: 06: enabled 1
752 08:46:02.767492 APIC: 05: enabled 1
753 08:46:02.767575 APIC: 04: enabled 1
754 08:46:02.770792 APIC: 02: enabled 1
755 08:46:02.774004 APIC: 07: enabled 1
756 08:46:02.774088 Compare with tree...
757 08:46:02.777380 Root Device: enabled 1
758 08:46:02.780835 DOMAIN: 0000: enabled 1
759 08:46:02.783991 PCI: 00:00.0: enabled 1
760 08:46:02.784129 PCI: 00:02.0: enabled 1
761 08:46:02.787261 PCI: 00:04.0: enabled 1
762 08:46:02.791031 GENERIC: 0.0: enabled 1
763 08:46:02.794210 PCI: 00:05.0: enabled 1
764 08:46:02.797670 PCI: 00:06.0: enabled 0
765 08:46:02.797753 PCI: 00:07.0: enabled 0
766 08:46:02.800698 GENERIC: 0.0: enabled 1
767 08:46:02.804382 PCI: 00:07.1: enabled 0
768 08:46:02.807333 GENERIC: 1.0: enabled 1
769 08:46:02.811240 PCI: 00:07.2: enabled 0
770 08:46:02.811323 GENERIC: 0.0: enabled 1
771 08:46:02.814100 PCI: 00:07.3: enabled 0
772 08:46:02.817483 GENERIC: 1.0: enabled 1
773 08:46:02.820872 PCI: 00:08.0: enabled 1
774 08:46:02.823903 PCI: 00:09.0: enabled 0
775 08:46:02.824013 PCI: 00:0a.0: enabled 0
776 08:46:02.827307 PCI: 00:0d.0: enabled 1
777 08:46:02.830819 USB0 port 0: enabled 1
778 08:46:02.833851 USB3 port 0: enabled 1
779 08:46:02.837350 USB3 port 1: enabled 1
780 08:46:02.840734 USB3 port 2: enabled 0
781 08:46:02.840817 USB3 port 3: enabled 0
782 08:46:02.843793 PCI: 00:0d.1: enabled 0
783 08:46:02.847092 PCI: 00:0d.2: enabled 0
784 08:46:02.850308 GENERIC: 0.0: enabled 1
785 08:46:02.854001 PCI: 00:0d.3: enabled 0
786 08:46:02.854084 PCI: 00:0e.0: enabled 0
787 08:46:02.857795 PCI: 00:10.2: enabled 1
788 08:46:02.860306 PCI: 00:10.6: enabled 0
789 08:46:02.863693 PCI: 00:10.7: enabled 0
790 08:46:02.867063 PCI: 00:12.0: enabled 0
791 08:46:02.867147 PCI: 00:12.6: enabled 0
792 08:46:02.870585 PCI: 00:13.0: enabled 0
793 08:46:02.874556 PCI: 00:14.0: enabled 1
794 08:46:02.877105 USB0 port 0: enabled 1
795 08:46:02.881497 USB2 port 0: enabled 0
796 08:46:02.881597 USB2 port 1: enabled 1
797 08:46:02.883830 USB2 port 2: enabled 1
798 08:46:02.887621 USB2 port 3: enabled 0
799 08:46:02.890451 USB2 port 4: enabled 1
800 08:46:02.893648 USB2 port 5: enabled 0
801 08:46:02.893731 USB2 port 6: enabled 0
802 08:46:02.897102 USB2 port 7: enabled 0
803 08:46:02.901437 USB2 port 8: enabled 0
804 08:46:02.904417 USB2 port 9: enabled 0
805 08:46:02.906879 USB3 port 0: enabled 0
806 08:46:02.910261 USB3 port 1: enabled 1
807 08:46:02.910344 USB3 port 2: enabled 0
808 08:46:02.913523 USB3 port 3: enabled 0
809 08:46:02.916891 PCI: 00:14.1: enabled 0
810 08:46:02.920376 PCI: 00:14.2: enabled 1
811 08:46:02.923806 PCI: 00:14.3: enabled 1
812 08:46:02.923917 GENERIC: 0.0: enabled 1
813 08:46:02.927078 PCI: 00:15.0: enabled 1
814 08:46:02.930136 I2C: 00:1a: enabled 1
815 08:46:02.933572 I2C: 00:31: enabled 1
816 08:46:02.936910 I2C: 00:32: enabled 1
817 08:46:02.937029 PCI: 00:15.1: enabled 1
818 08:46:02.940238 I2C: 00:10: enabled 1
819 08:46:02.943400 PCI: 00:15.2: enabled 1
820 08:46:02.946810 PCI: 00:15.3: enabled 1
821 08:46:02.946894 PCI: 00:16.0: enabled 1
822 08:46:02.950069 PCI: 00:16.1: enabled 0
823 08:46:02.953628 PCI: 00:16.2: enabled 0
824 08:46:02.956967 PCI: 00:16.3: enabled 0
825 08:46:02.960776 PCI: 00:16.4: enabled 0
826 08:46:02.960860 PCI: 00:16.5: enabled 0
827 08:46:02.963562 PCI: 00:17.0: enabled 1
828 08:46:02.966888 PCI: 00:19.0: enabled 0
829 08:46:02.971040 PCI: 00:19.1: enabled 1
830 08:46:02.973415 I2C: 00:15: enabled 1
831 08:46:02.973516 PCI: 00:19.2: enabled 0
832 08:46:02.976946 PCI: 00:1d.0: enabled 1
833 08:46:02.979883 GENERIC: 0.0: enabled 1
834 08:46:02.983426 PCI: 00:1e.0: enabled 1
835 08:46:02.986496 PCI: 00:1e.1: enabled 0
836 08:46:02.986580 PCI: 00:1e.2: enabled 1
837 08:46:02.989968 SPI: 00: enabled 1
838 08:46:02.993296 PCI: 00:1e.3: enabled 1
839 08:46:03.043506 SPI: 00: enabled 1
840 08:46:03.043666 PCI: 00:1f.0: enabled 1
841 08:46:03.043737 PNP: 0c09.0: enabled 1
842 08:46:03.043994 PCI: 00:1f.1: enabled 0
843 08:46:03.044120 PCI: 00:1f.2: enabled 1
844 08:46:03.044247 GENERIC: 0.0: enabled 1
845 08:46:03.044415 GENERIC: 0.0: enabled 1
846 08:46:03.044580 GENERIC: 1.0: enabled 1
847 08:46:03.044671 PCI: 00:1f.3: enabled 1
848 08:46:03.044758 PCI: 00:1f.4: enabled 0
849 08:46:03.044845 PCI: 00:1f.5: enabled 1
850 08:46:03.044930 PCI: 00:1f.6: enabled 0
851 08:46:03.045455 PCI: 00:1f.7: enabled 0
852 08:46:03.045548 CPU_CLUSTER: 0: enabled 1
853 08:46:03.045633 APIC: 00: enabled 1
854 08:46:03.045906 APIC: 01: enabled 1
855 08:46:03.045993 APIC: 03: enabled 1
856 08:46:03.046249 APIC: 06: enabled 1
857 08:46:03.046317 APIC: 05: enabled 1
858 08:46:03.046396 APIC: 04: enabled 1
859 08:46:03.049855 APIC: 02: enabled 1
860 08:46:03.049938 APIC: 07: enabled 1
861 08:46:03.051983 Root Device scanning...
862 08:46:03.055666 scan_static_bus for Root Device
863 08:46:03.058703 DOMAIN: 0000 enabled
864 08:46:03.058786 CPU_CLUSTER: 0 enabled
865 08:46:03.061905 DOMAIN: 0000 scanning...
866 08:46:03.065264 PCI: pci_scan_bus for bus 00
867 08:46:03.068664 PCI: 00:00.0 [8086/0000] ops
868 08:46:03.072175 PCI: 00:00.0 [8086/9a12] enabled
869 08:46:03.075200 PCI: 00:02.0 [8086/0000] bus ops
870 08:46:03.078588 PCI: 00:02.0 [8086/9a40] enabled
871 08:46:03.081964 PCI: 00:04.0 [8086/0000] bus ops
872 08:46:03.084872 PCI: 00:04.0 [8086/9a03] enabled
873 08:46:03.088423 PCI: 00:05.0 [8086/9a19] enabled
874 08:46:03.091605 PCI: 00:07.0 [0000/0000] hidden
875 08:46:03.095026 PCI: 00:08.0 [8086/9a11] enabled
876 08:46:03.098325 PCI: 00:0a.0 [8086/9a0d] disabled
877 08:46:03.101517 PCI: 00:0d.0 [8086/0000] bus ops
878 08:46:03.105096 PCI: 00:0d.0 [8086/9a13] enabled
879 08:46:03.108224 PCI: 00:14.0 [8086/0000] bus ops
880 08:46:03.112310 PCI: 00:14.0 [8086/a0ed] enabled
881 08:46:03.115450 PCI: 00:14.2 [8086/a0ef] enabled
882 08:46:03.118388 PCI: 00:14.3 [8086/0000] bus ops
883 08:46:03.121957 PCI: 00:14.3 [8086/a0f0] enabled
884 08:46:03.125010 PCI: 00:15.0 [8086/0000] bus ops
885 08:46:03.128830 PCI: 00:15.0 [8086/a0e8] enabled
886 08:46:03.131678 PCI: 00:15.1 [8086/0000] bus ops
887 08:46:03.134748 PCI: 00:15.1 [8086/a0e9] enabled
888 08:46:03.138144 PCI: 00:15.2 [8086/0000] bus ops
889 08:46:03.141705 PCI: 00:15.2 [8086/a0ea] enabled
890 08:46:03.144741 PCI: 00:15.3 [8086/0000] bus ops
891 08:46:03.148567 PCI: 00:15.3 [8086/a0eb] enabled
892 08:46:03.151788 PCI: 00:16.0 [8086/0000] ops
893 08:46:03.155484 PCI: 00:16.0 [8086/a0e0] enabled
894 08:46:03.161414 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 08:46:03.165013 PCI: 00:19.0 [8086/0000] bus ops
896 08:46:03.168289 PCI: 00:19.0 [8086/a0c5] disabled
897 08:46:03.171561 PCI: 00:19.1 [8086/0000] bus ops
898 08:46:03.175940 PCI: 00:19.1 [8086/a0c6] enabled
899 08:46:03.177630 PCI: 00:1d.0 [8086/0000] bus ops
900 08:46:03.181422 PCI: 00:1d.0 [8086/a0b0] enabled
901 08:46:03.184747 PCI: 00:1e.0 [8086/0000] ops
902 08:46:03.187737 PCI: 00:1e.0 [8086/a0a8] enabled
903 08:46:03.191474 PCI: 00:1e.2 [8086/0000] bus ops
904 08:46:03.194594 PCI: 00:1e.2 [8086/a0aa] enabled
905 08:46:03.198100 PCI: 00:1e.3 [8086/0000] bus ops
906 08:46:03.201042 PCI: 00:1e.3 [8086/a0ab] enabled
907 08:46:03.204295 PCI: 00:1f.0 [8086/0000] bus ops
908 08:46:03.207719 PCI: 00:1f.0 [8086/a087] enabled
909 08:46:03.207802 RTC Init
910 08:46:03.211135 Set power on after power failure.
911 08:46:03.214592 Disabling Deep S3
912 08:46:03.214701 Disabling Deep S3
913 08:46:03.217894 Disabling Deep S4
914 08:46:03.217976 Disabling Deep S4
915 08:46:03.220762 Disabling Deep S5
916 08:46:03.224380 Disabling Deep S5
917 08:46:03.228031 PCI: 00:1f.2 [0000/0000] hidden
918 08:46:03.230954 PCI: 00:1f.3 [8086/0000] bus ops
919 08:46:03.234288 PCI: 00:1f.3 [8086/a0c8] enabled
920 08:46:03.237629 PCI: 00:1f.5 [8086/0000] bus ops
921 08:46:03.241321 PCI: 00:1f.5 [8086/a0a4] enabled
922 08:46:03.244256 PCI: Leftover static devices:
923 08:46:03.244338 PCI: 00:10.2
924 08:46:03.244402 PCI: 00:10.6
925 08:46:03.247413 PCI: 00:10.7
926 08:46:03.247494 PCI: 00:06.0
927 08:46:03.251714 PCI: 00:07.1
928 08:46:03.251796 PCI: 00:07.2
929 08:46:03.251861 PCI: 00:07.3
930 08:46:03.253992 PCI: 00:09.0
931 08:46:03.254073 PCI: 00:0d.1
932 08:46:03.257396 PCI: 00:0d.2
933 08:46:03.257478 PCI: 00:0d.3
934 08:46:03.260825 PCI: 00:0e.0
935 08:46:03.260907 PCI: 00:12.0
936 08:46:03.260971 PCI: 00:12.6
937 08:46:03.264716 PCI: 00:13.0
938 08:46:03.264802 PCI: 00:14.1
939 08:46:03.267456 PCI: 00:16.1
940 08:46:03.267537 PCI: 00:16.2
941 08:46:03.267601 PCI: 00:16.3
942 08:46:03.270788 PCI: 00:16.4
943 08:46:03.270869 PCI: 00:16.5
944 08:46:03.274423 PCI: 00:17.0
945 08:46:03.274505 PCI: 00:19.2
946 08:46:03.274569 PCI: 00:1e.1
947 08:46:03.277705 PCI: 00:1f.1
948 08:46:03.277790 PCI: 00:1f.4
949 08:46:03.281651 PCI: 00:1f.6
950 08:46:03.281734 PCI: 00:1f.7
951 08:46:03.283802 PCI: Check your devicetree.cb.
952 08:46:03.287122 PCI: 00:02.0 scanning...
953 08:46:03.290588 scan_generic_bus for PCI: 00:02.0
954 08:46:03.293554 scan_generic_bus for PCI: 00:02.0 done
955 08:46:03.300174 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 08:46:03.300266 PCI: 00:04.0 scanning...
957 08:46:03.303661 scan_generic_bus for PCI: 00:04.0
958 08:46:03.307126 GENERIC: 0.0 enabled
959 08:46:03.313848 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 08:46:03.317239 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 08:46:03.320501 PCI: 00:0d.0 scanning...
962 08:46:03.323748 scan_static_bus for PCI: 00:0d.0
963 08:46:03.327035 USB0 port 0 enabled
964 08:46:03.330292 USB0 port 0 scanning...
965 08:46:03.333494 scan_static_bus for USB0 port 0
966 08:46:03.333579 USB3 port 0 enabled
967 08:46:03.336692 USB3 port 1 enabled
968 08:46:03.336824 USB3 port 2 disabled
969 08:46:03.340667 USB3 port 3 disabled
970 08:46:03.343599 USB3 port 0 scanning...
971 08:46:03.346888 scan_static_bus for USB3 port 0
972 08:46:03.350032 scan_static_bus for USB3 port 0 done
973 08:46:03.353553 scan_bus: bus USB3 port 0 finished in 6 msecs
974 08:46:03.356678 USB3 port 1 scanning...
975 08:46:03.360485 scan_static_bus for USB3 port 1
976 08:46:03.363483 scan_static_bus for USB3 port 1 done
977 08:46:03.370032 scan_bus: bus USB3 port 1 finished in 6 msecs
978 08:46:03.373146 scan_static_bus for USB0 port 0 done
979 08:46:03.376601 scan_bus: bus USB0 port 0 finished in 43 msecs
980 08:46:03.379757 scan_static_bus for PCI: 00:0d.0 done
981 08:46:03.386740 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 08:46:03.390231 PCI: 00:14.0 scanning...
983 08:46:03.393522 scan_static_bus for PCI: 00:14.0
984 08:46:03.393603 USB0 port 0 enabled
985 08:46:03.396357 USB0 port 0 scanning...
986 08:46:03.399527 scan_static_bus for USB0 port 0
987 08:46:03.402927 USB2 port 0 disabled
988 08:46:03.403005 USB2 port 1 enabled
989 08:46:03.406939 USB2 port 2 enabled
990 08:46:03.410126 USB2 port 3 disabled
991 08:46:03.410227 USB2 port 4 enabled
992 08:46:03.412949 USB2 port 5 disabled
993 08:46:03.416705 USB2 port 6 disabled
994 08:46:03.416831 USB2 port 7 disabled
995 08:46:03.419577 USB2 port 8 disabled
996 08:46:03.419649 USB2 port 9 disabled
997 08:46:03.422875 USB3 port 0 disabled
998 08:46:03.426228 USB3 port 1 enabled
999 08:46:03.426332 USB3 port 2 disabled
1000 08:46:03.429618 USB3 port 3 disabled
1001 08:46:03.433026 USB2 port 1 scanning...
1002 08:46:03.436460 scan_static_bus for USB2 port 1
1003 08:46:03.439685 scan_static_bus for USB2 port 1 done
1004 08:46:03.443262 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 08:46:03.447045 USB2 port 2 scanning...
1006 08:46:03.450354 scan_static_bus for USB2 port 2
1007 08:46:03.452662 scan_static_bus for USB2 port 2 done
1008 08:46:03.460215 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 08:46:03.460303 USB2 port 4 scanning...
1010 08:46:03.463336 scan_static_bus for USB2 port 4
1011 08:46:03.466208 scan_static_bus for USB2 port 4 done
1012 08:46:03.473125 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 08:46:03.476323 USB3 port 1 scanning...
1014 08:46:03.479254 scan_static_bus for USB3 port 1
1015 08:46:03.483479 scan_static_bus for USB3 port 1 done
1016 08:46:03.486139 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 08:46:03.489403 scan_static_bus for USB0 port 0 done
1018 08:46:03.496205 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 08:46:03.499858 scan_static_bus for PCI: 00:14.0 done
1020 08:46:03.503084 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 08:46:03.506328 PCI: 00:14.3 scanning...
1022 08:46:03.509262 scan_static_bus for PCI: 00:14.3
1023 08:46:03.512670 GENERIC: 0.0 enabled
1024 08:46:03.515932 scan_static_bus for PCI: 00:14.3 done
1025 08:46:03.519456 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 08:46:03.522814 PCI: 00:15.0 scanning...
1027 08:46:03.526331 scan_static_bus for PCI: 00:15.0
1028 08:46:03.529601 I2C: 00:1a enabled
1029 08:46:03.529683 I2C: 00:31 enabled
1030 08:46:03.533072 I2C: 00:32 enabled
1031 08:46:03.535774 scan_static_bus for PCI: 00:15.0 done
1032 08:46:03.542456 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1033 08:46:03.542571 PCI: 00:15.1 scanning...
1034 08:46:03.545683 scan_static_bus for PCI: 00:15.1
1035 08:46:03.549082 I2C: 00:10 enabled
1036 08:46:03.552314 scan_static_bus for PCI: 00:15.1 done
1037 08:46:03.559309 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 08:46:03.559392 PCI: 00:15.2 scanning...
1039 08:46:03.562467 scan_static_bus for PCI: 00:15.2
1040 08:46:03.568806 scan_static_bus for PCI: 00:15.2 done
1041 08:46:03.572261 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 08:46:03.575469 PCI: 00:15.3 scanning...
1043 08:46:03.579652 scan_static_bus for PCI: 00:15.3
1044 08:46:03.582681 scan_static_bus for PCI: 00:15.3 done
1045 08:46:03.586515 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 08:46:03.589584 PCI: 00:19.1 scanning...
1047 08:46:03.592639 scan_static_bus for PCI: 00:19.1
1048 08:46:03.596047 I2C: 00:15 enabled
1049 08:46:03.599880 scan_static_bus for PCI: 00:19.1 done
1050 08:46:03.602756 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 08:46:03.606010 PCI: 00:1d.0 scanning...
1052 08:46:03.609230 do_pci_scan_bridge for PCI: 00:1d.0
1053 08:46:03.613431 PCI: pci_scan_bus for bus 01
1054 08:46:03.615965 PCI: 01:00.0 [1c5c/174a] enabled
1055 08:46:03.619486 GENERIC: 0.0 enabled
1056 08:46:03.622694 Enabling Common Clock Configuration
1057 08:46:03.625919 L1 Sub-State supported from root port 29
1058 08:46:03.629329 L1 Sub-State Support = 0xf
1059 08:46:03.632579 CommonModeRestoreTime = 0x28
1060 08:46:03.635943 Power On Value = 0x16, Power On Scale = 0x0
1061 08:46:03.639618 ASPM: Enabled L1
1062 08:46:03.642426 PCIe: Max_Payload_Size adjusted to 128
1063 08:46:03.645862 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 08:46:03.649400 PCI: 00:1e.2 scanning...
1065 08:46:03.652434 scan_generic_bus for PCI: 00:1e.2
1066 08:46:03.655941 SPI: 00 enabled
1067 08:46:03.659289 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 08:46:03.666179 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 08:46:03.669661 PCI: 00:1e.3 scanning...
1070 08:46:03.672412 scan_generic_bus for PCI: 00:1e.3
1071 08:46:03.672493 SPI: 00 enabled
1072 08:46:03.678995 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 08:46:03.685578 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 08:46:03.685664 PCI: 00:1f.0 scanning...
1075 08:46:03.688855 scan_static_bus for PCI: 00:1f.0
1076 08:46:03.692525 PNP: 0c09.0 enabled
1077 08:46:03.695569 PNP: 0c09.0 scanning...
1078 08:46:03.699855 scan_static_bus for PNP: 0c09.0
1079 08:46:03.702689 scan_static_bus for PNP: 0c09.0 done
1080 08:46:03.705526 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 08:46:03.709114 scan_static_bus for PCI: 00:1f.0 done
1082 08:46:03.715349 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 08:46:03.718971 PCI: 00:1f.2 scanning...
1084 08:46:03.721911 scan_static_bus for PCI: 00:1f.2
1085 08:46:03.721993 GENERIC: 0.0 enabled
1086 08:46:03.725304 GENERIC: 0.0 scanning...
1087 08:46:03.728660 scan_static_bus for GENERIC: 0.0
1088 08:46:03.732013 GENERIC: 0.0 enabled
1089 08:46:03.735555 GENERIC: 1.0 enabled
1090 08:46:03.739625 scan_static_bus for GENERIC: 0.0 done
1091 08:46:03.742130 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 08:46:03.745531 scan_static_bus for PCI: 00:1f.2 done
1093 08:46:03.752246 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 08:46:03.752328 PCI: 00:1f.3 scanning...
1095 08:46:03.755467 scan_static_bus for PCI: 00:1f.3
1096 08:46:03.762209 scan_static_bus for PCI: 00:1f.3 done
1097 08:46:03.765249 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 08:46:03.769006 PCI: 00:1f.5 scanning...
1099 08:46:03.772493 scan_generic_bus for PCI: 00:1f.5
1100 08:46:03.775614 scan_generic_bus for PCI: 00:1f.5 done
1101 08:46:03.782034 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 08:46:03.785254 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 08:46:03.788806 scan_static_bus for Root Device done
1104 08:46:03.795534 scan_bus: bus Root Device finished in 737 msecs
1105 08:46:03.795617 done
1106 08:46:03.801729 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 08:46:03.805014 Chrome EC: UHEPI supported
1108 08:46:03.811896 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 08:46:03.819039 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 08:46:03.821700 SPI flash protection: WPSW=0 SRP0=0
1111 08:46:03.825169 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 08:46:03.831642 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 08:46:03.835428 found VGA at PCI: 00:02.0
1114 08:46:03.838501 Setting up VGA for PCI: 00:02.0
1115 08:46:03.841726 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 08:46:03.848284 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 08:46:03.848371 Allocating resources...
1118 08:46:03.851647 Reading resources...
1119 08:46:03.855546 Root Device read_resources bus 0 link: 0
1120 08:46:03.862115 DOMAIN: 0000 read_resources bus 0 link: 0
1121 08:46:03.864709 PCI: 00:04.0 read_resources bus 1 link: 0
1122 08:46:03.871249 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 08:46:03.874913 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 08:46:03.881629 USB0 port 0 read_resources bus 0 link: 0
1125 08:46:03.884858 USB0 port 0 read_resources bus 0 link: 0 done
1126 08:46:03.891606 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 08:46:03.895363 PCI: 00:14.0 read_resources bus 0 link: 0
1128 08:46:03.898120 USB0 port 0 read_resources bus 0 link: 0
1129 08:46:03.905489 USB0 port 0 read_resources bus 0 link: 0 done
1130 08:46:03.908240 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 08:46:03.915406 PCI: 00:14.3 read_resources bus 0 link: 0
1132 08:46:03.918717 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 08:46:03.925370 PCI: 00:15.0 read_resources bus 0 link: 0
1134 08:46:03.929245 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 08:46:03.935257 PCI: 00:15.1 read_resources bus 0 link: 0
1136 08:46:03.938281 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 08:46:03.945720 PCI: 00:19.1 read_resources bus 0 link: 0
1138 08:46:03.949468 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 08:46:03.955752 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 08:46:03.958825 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 08:46:03.965952 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 08:46:03.969742 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 08:46:03.975978 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 08:46:03.979140 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 08:46:03.985632 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 08:46:03.988833 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 08:46:03.992060 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 08:46:03.999560 GENERIC: 0.0 read_resources bus 0 link: 0
1149 08:46:04.002946 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 08:46:04.009091 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 08:46:04.015969 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 08:46:04.019336 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 08:46:04.025260 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 08:46:04.028979 Root Device read_resources bus 0 link: 0 done
1155 08:46:04.032056 Done reading resources.
1156 08:46:04.035360 Show resources in subtree (Root Device)...After reading.
1157 08:46:04.042037 Root Device child on link 0 DOMAIN: 0000
1158 08:46:04.045516 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 08:46:04.055918 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 08:46:04.065048 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 08:46:04.065134 PCI: 00:00.0
1162 08:46:04.074890 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 08:46:04.084980 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 08:46:04.095450 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 08:46:04.105055 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 08:46:04.115158 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 08:46:04.122084 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 08:46:04.131790 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 08:46:04.141873 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 08:46:04.151537 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 08:46:04.161366 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 08:46:04.171375 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 08:46:04.177933 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 08:46:04.187685 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 08:46:04.197680 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 08:46:04.207722 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 08:46:04.217975 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 08:46:04.227933 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 08:46:04.234554 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 08:46:04.244642 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 08:46:04.254672 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 08:46:04.257884 PCI: 00:02.0
1183 08:46:04.267472 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 08:46:04.277385 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 08:46:04.284432 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 08:46:04.290761 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 08:46:04.300932 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 08:46:04.301028 GENERIC: 0.0
1189 08:46:04.304180 PCI: 00:05.0
1190 08:46:04.314149 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 08:46:04.317739 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 08:46:04.320617 GENERIC: 0.0
1193 08:46:04.320700 PCI: 00:08.0
1194 08:46:04.330669 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 08:46:04.334178 PCI: 00:0a.0
1196 08:46:04.337112 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 08:46:04.347176 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 08:46:04.350439 USB0 port 0 child on link 0 USB3 port 0
1199 08:46:04.354023 USB3 port 0
1200 08:46:04.357393 USB3 port 1
1201 08:46:04.357478 USB3 port 2
1202 08:46:04.360493 USB3 port 3
1203 08:46:04.363811 PCI: 00:14.0 child on link 0 USB0 port 0
1204 08:46:04.373991 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 08:46:04.377102 USB0 port 0 child on link 0 USB2 port 0
1206 08:46:04.380240 USB2 port 0
1207 08:46:04.380323 USB2 port 1
1208 08:46:04.383685 USB2 port 2
1209 08:46:04.383766 USB2 port 3
1210 08:46:04.387488 USB2 port 4
1211 08:46:04.387571 USB2 port 5
1212 08:46:04.391017 USB2 port 6
1213 08:46:04.393599 USB2 port 7
1214 08:46:04.393682 USB2 port 8
1215 08:46:04.397096 USB2 port 9
1216 08:46:04.397193 USB3 port 0
1217 08:46:04.400440 USB3 port 1
1218 08:46:04.400547 USB3 port 2
1219 08:46:04.403763 USB3 port 3
1220 08:46:04.403849 PCI: 00:14.2
1221 08:46:04.413586 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 08:46:04.423452 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 08:46:04.430420 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 08:46:04.440187 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 08:46:04.440318 GENERIC: 0.0
1226 08:46:04.443524 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 08:46:04.453965 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 08:46:04.456929 I2C: 00:1a
1229 08:46:04.457020 I2C: 00:31
1230 08:46:04.460496 I2C: 00:32
1231 08:46:04.463455 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 08:46:04.473615 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 08:46:04.476833 I2C: 00:10
1234 08:46:04.476920 PCI: 00:15.2
1235 08:46:04.487721 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 08:46:04.490377 PCI: 00:15.3
1237 08:46:04.500151 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 08:46:04.500250 PCI: 00:16.0
1239 08:46:04.509877 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 08:46:04.513389 PCI: 00:19.0
1241 08:46:04.516671 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 08:46:04.526671 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 08:46:04.526789 I2C: 00:15
1244 08:46:04.533997 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 08:46:04.539729 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 08:46:04.549650 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 08:46:04.559491 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 08:46:04.562809 GENERIC: 0.0
1249 08:46:04.562903 PCI: 01:00.0
1250 08:46:04.573694 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 08:46:04.583135 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 08:46:04.592982 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 08:46:04.593083 PCI: 00:1e.0
1254 08:46:04.602707 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 08:46:04.609673 PCI: 00:1e.2 child on link 0 SPI: 00
1256 08:46:04.619436 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 08:46:04.619533 SPI: 00
1258 08:46:04.622675 PCI: 00:1e.3 child on link 0 SPI: 00
1259 08:46:04.633240 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 08:46:04.636324 SPI: 00
1261 08:46:04.639558 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 08:46:04.649590 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 08:46:04.649686 PNP: 0c09.0
1264 08:46:04.659473 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 08:46:04.662694 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 08:46:04.673205 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 08:46:04.682507 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 08:46:04.686234 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 08:46:04.689366 GENERIC: 0.0
1270 08:46:04.689453 GENERIC: 1.0
1271 08:46:04.692601 PCI: 00:1f.3
1272 08:46:04.702220 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 08:46:04.712600 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 08:46:04.712694 PCI: 00:1f.5
1275 08:46:04.723071 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 08:46:04.725548 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 08:46:04.729110 APIC: 00
1278 08:46:04.729196 APIC: 01
1279 08:46:04.729283 APIC: 03
1280 08:46:04.732799 APIC: 06
1281 08:46:04.732882 APIC: 05
1282 08:46:04.735837 APIC: 04
1283 08:46:04.735922 APIC: 02
1284 08:46:04.736022 APIC: 07
1285 08:46:04.745600 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 08:46:04.749205 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 08:46:04.755634 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 08:46:04.762219 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 08:46:04.765994 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 08:46:04.772095 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 08:46:04.775319 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 08:46:04.782307 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 08:46:04.788541 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 08:46:04.799512 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 08:46:04.806055 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 08:46:04.812186 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 08:46:04.820035 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 08:46:04.824979 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 08:46:04.835132 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 08:46:04.835230 DOMAIN: 0000: Resource ranges:
1301 08:46:04.841602 * Base: 1000, Size: 800, Tag: 100
1302 08:46:04.845230 * Base: 1900, Size: e700, Tag: 100
1303 08:46:04.848250 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 08:46:04.855392 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 08:46:04.861734 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 08:46:04.871820 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 08:46:04.878368 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 08:46:04.885019 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 08:46:04.895178 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 08:46:04.901601 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 08:46:04.908168 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 08:46:04.918504 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 08:46:04.924846 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 08:46:04.931444 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 08:46:04.941271 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 08:46:04.948377 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 08:46:04.954840 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 08:46:04.961512 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 08:46:04.971175 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 08:46:04.977895 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 08:46:04.985005 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 08:46:04.994473 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 08:46:05.001098 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 08:46:05.007893 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 08:46:05.017450 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 08:46:05.024190 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 08:46:05.031119 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 08:46:05.034462 DOMAIN: 0000: Resource ranges:
1329 08:46:05.040719 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 08:46:05.044035 * Base: d0000000, Size: 28000000, Tag: 200
1331 08:46:05.048193 * Base: fa000000, Size: 1000000, Tag: 200
1332 08:46:05.054704 * Base: fb001000, Size: 2fff000, Tag: 200
1333 08:46:05.057646 * Base: fe010000, Size: 2e000, Tag: 200
1334 08:46:05.060988 * Base: fe03f000, Size: d41000, Tag: 200
1335 08:46:05.065273 * Base: fed88000, Size: 8000, Tag: 200
1336 08:46:05.071182 * Base: fed93000, Size: d000, Tag: 200
1337 08:46:05.074187 * Base: feda2000, Size: 1e000, Tag: 200
1338 08:46:05.077973 * Base: fede0000, Size: 1220000, Tag: 200
1339 08:46:05.083916 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 08:46:05.090949 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 08:46:05.097326 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 08:46:05.103795 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 08:46:05.110950 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 08:46:05.117329 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 08:46:05.123852 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 08:46:05.130690 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 08:46:05.136909 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 08:46:05.144407 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 08:46:05.150514 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 08:46:05.157133 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 08:46:05.163706 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 08:46:05.170121 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 08:46:05.177036 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 08:46:05.183419 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 08:46:05.190301 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 08:46:05.196844 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 08:46:05.203629 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 08:46:05.210482 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 08:46:05.216686 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 08:46:05.223579 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 08:46:05.230115 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 08:46:05.236701 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 08:46:05.243208 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 08:46:05.246418 PCI: 00:1d.0: Resource ranges:
1365 08:46:05.253384 * Base: 7fc00000, Size: 100000, Tag: 200
1366 08:46:05.259986 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 08:46:05.266663 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 08:46:05.273118 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 08:46:05.279948 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 08:46:05.286283 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 08:46:05.292840 Root Device assign_resources, bus 0 link: 0
1372 08:46:05.297088 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 08:46:05.305968 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 08:46:05.312920 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 08:46:05.319560 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 08:46:05.329716 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 08:46:05.332955 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 08:46:05.339546 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 08:46:05.346261 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 08:46:05.355825 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 08:46:05.362890 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 08:46:05.366033 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 08:46:05.372838 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 08:46:05.379357 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 08:46:05.386175 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 08:46:05.389628 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 08:46:05.399285 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 08:46:05.405837 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 08:46:05.415709 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 08:46:05.419258 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 08:46:05.422036 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 08:46:05.432247 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 08:46:05.436201 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 08:46:05.441924 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 08:46:05.448934 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 08:46:05.452221 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 08:46:05.458886 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 08:46:05.465179 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 08:46:05.475445 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 08:46:05.481758 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 08:46:05.492073 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 08:46:05.495209 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 08:46:05.501856 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 08:46:05.509595 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 08:46:05.518587 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 08:46:05.528705 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 08:46:05.531569 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 08:46:05.541786 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 08:46:05.548048 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 08:46:05.556003 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 08:46:05.561755 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 08:46:05.568008 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 08:46:05.574881 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 08:46:05.578195 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 08:46:05.588061 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 08:46:05.591656 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 08:46:05.594450 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 08:46:05.601249 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 08:46:05.604724 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 08:46:05.611242 LPC: Trying to open IO window from 800 size 1ff
1421 08:46:05.618010 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 08:46:05.627671 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 08:46:05.634582 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 08:46:05.641119 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 08:46:05.644879 Root Device assign_resources, bus 0 link: 0
1426 08:46:05.647752 Done setting resources.
1427 08:46:05.654367 Show resources in subtree (Root Device)...After assigning values.
1428 08:46:05.658016 Root Device child on link 0 DOMAIN: 0000
1429 08:46:05.661347 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 08:46:05.671297 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 08:46:05.680803 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 08:46:05.684406 PCI: 00:00.0
1433 08:46:05.694615 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 08:46:05.700748 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 08:46:05.710621 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 08:46:05.720695 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 08:46:05.730656 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 08:46:05.740768 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 08:46:05.747403 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 08:46:05.757343 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 08:46:05.767247 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 08:46:05.776908 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 08:46:05.786873 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 08:46:05.796990 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 08:46:05.803970 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 08:46:05.813452 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 08:46:05.823639 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 08:46:05.834046 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 08:46:05.843376 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 08:46:05.853545 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 08:46:05.860068 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 08:46:05.869999 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 08:46:05.873492 PCI: 00:02.0
1454 08:46:05.883466 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 08:46:05.893078 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 08:46:05.902782 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 08:46:05.906161 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 08:46:05.919725 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 08:46:05.919833 GENERIC: 0.0
1460 08:46:05.922856 PCI: 00:05.0
1461 08:46:05.933682 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 08:46:05.936565 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 08:46:05.939401 GENERIC: 0.0
1464 08:46:05.939483 PCI: 00:08.0
1465 08:46:05.949811 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 08:46:05.953030 PCI: 00:0a.0
1467 08:46:05.956957 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 08:46:05.966362 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 08:46:05.973262 USB0 port 0 child on link 0 USB3 port 0
1470 08:46:05.973348 USB3 port 0
1471 08:46:05.975955 USB3 port 1
1472 08:46:05.976085 USB3 port 2
1473 08:46:05.979414 USB3 port 3
1474 08:46:05.983154 PCI: 00:14.0 child on link 0 USB0 port 0
1475 08:46:05.992867 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 08:46:05.999771 USB0 port 0 child on link 0 USB2 port 0
1477 08:46:05.999882 USB2 port 0
1478 08:46:06.003212 USB2 port 1
1479 08:46:06.003293 USB2 port 2
1480 08:46:06.006038 USB2 port 3
1481 08:46:06.006123 USB2 port 4
1482 08:46:06.009746 USB2 port 5
1483 08:46:06.009859 USB2 port 6
1484 08:46:06.012574 USB2 port 7
1485 08:46:06.012655 USB2 port 8
1486 08:46:06.015917 USB2 port 9
1487 08:46:06.016004 USB3 port 0
1488 08:46:06.019953 USB3 port 1
1489 08:46:06.020068 USB3 port 2
1490 08:46:06.023114 USB3 port 3
1491 08:46:06.023195 PCI: 00:14.2
1492 08:46:06.035784 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 08:46:06.045816 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 08:46:06.049217 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 08:46:06.059039 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 08:46:06.062391 GENERIC: 0.0
1497 08:46:06.065800 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 08:46:06.076232 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 08:46:06.078892 I2C: 00:1a
1500 08:46:06.078975 I2C: 00:31
1501 08:46:06.082351 I2C: 00:32
1502 08:46:06.085844 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 08:46:06.095460 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 08:46:06.095547 I2C: 00:10
1505 08:46:06.098924 PCI: 00:15.2
1506 08:46:06.109172 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 08:46:06.112639 PCI: 00:15.3
1508 08:46:06.122033 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 08:46:06.122120 PCI: 00:16.0
1510 08:46:06.131960 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 08:46:06.135532 PCI: 00:19.0
1512 08:46:06.138915 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 08:46:06.148727 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 08:46:06.152087 I2C: 00:15
1515 08:46:06.155852 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 08:46:06.165483 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 08:46:06.175296 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 08:46:06.185277 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 08:46:06.188770 GENERIC: 0.0
1520 08:46:06.191983 PCI: 01:00.0
1521 08:46:06.201831 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 08:46:06.211595 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 08:46:06.221778 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 08:46:06.221868 PCI: 00:1e.0
1525 08:46:06.235608 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 08:46:06.238576 PCI: 00:1e.2 child on link 0 SPI: 00
1527 08:46:06.248598 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 08:46:06.248690 SPI: 00
1529 08:46:06.255097 PCI: 00:1e.3 child on link 0 SPI: 00
1530 08:46:06.265195 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 08:46:06.265284 SPI: 00
1532 08:46:06.268267 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 08:46:06.278335 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 08:46:06.281599 PNP: 0c09.0
1535 08:46:06.288646 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 08:46:06.294950 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 08:46:06.301391 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 08:46:06.311890 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 08:46:06.318350 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 08:46:06.318436 GENERIC: 0.0
1541 08:46:06.321419 GENERIC: 1.0
1542 08:46:06.321502 PCI: 00:1f.3
1543 08:46:06.331435 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 08:46:06.341838 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 08:46:06.344751 PCI: 00:1f.5
1546 08:46:06.354797 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 08:46:06.358128 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 08:46:06.361634 APIC: 00
1549 08:46:06.361715 APIC: 01
1550 08:46:06.364933 APIC: 03
1551 08:46:06.365014 APIC: 06
1552 08:46:06.365079 APIC: 05
1553 08:46:06.368075 APIC: 04
1554 08:46:06.368174 APIC: 02
1555 08:46:06.368239 APIC: 07
1556 08:46:06.371643 Done allocating resources.
1557 08:46:06.378081 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 08:46:06.385326 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 08:46:06.387967 Configure GPIOs for I2S audio on UP4.
1560 08:46:06.394618 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 08:46:06.397921 Enabling resources...
1562 08:46:06.401334 PCI: 00:00.0 subsystem <- 8086/9a12
1563 08:46:06.404622 PCI: 00:00.0 cmd <- 06
1564 08:46:06.407902 PCI: 00:02.0 subsystem <- 8086/9a40
1565 08:46:06.411399 PCI: 00:02.0 cmd <- 03
1566 08:46:06.414517 PCI: 00:04.0 subsystem <- 8086/9a03
1567 08:46:06.414599 PCI: 00:04.0 cmd <- 02
1568 08:46:06.421319 PCI: 00:05.0 subsystem <- 8086/9a19
1569 08:46:06.421403 PCI: 00:05.0 cmd <- 02
1570 08:46:06.424790 PCI: 00:08.0 subsystem <- 8086/9a11
1571 08:46:06.428034 PCI: 00:08.0 cmd <- 06
1572 08:46:06.431223 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 08:46:06.434541 PCI: 00:0d.0 cmd <- 02
1574 08:46:06.438103 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 08:46:06.441387 PCI: 00:14.0 cmd <- 02
1576 08:46:06.444493 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 08:46:06.447966 PCI: 00:14.2 cmd <- 02
1578 08:46:06.451148 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 08:46:06.454418 PCI: 00:14.3 cmd <- 02
1580 08:46:06.457737 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 08:46:06.461361 PCI: 00:15.0 cmd <- 02
1582 08:46:06.464506 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 08:46:06.464588 PCI: 00:15.1 cmd <- 02
1584 08:46:06.471284 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 08:46:06.471371 PCI: 00:15.2 cmd <- 02
1586 08:46:06.474682 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 08:46:06.478056 PCI: 00:15.3 cmd <- 02
1588 08:46:06.481453 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 08:46:06.484607 PCI: 00:16.0 cmd <- 02
1590 08:46:06.487863 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 08:46:06.491039 PCI: 00:19.1 cmd <- 02
1592 08:46:06.494338 PCI: 00:1d.0 bridge ctrl <- 0013
1593 08:46:06.498126 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 08:46:06.500598 PCI: 00:1d.0 cmd <- 06
1595 08:46:06.503908 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 08:46:06.507305 PCI: 00:1e.0 cmd <- 06
1597 08:46:06.510761 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 08:46:06.514231 PCI: 00:1e.2 cmd <- 06
1599 08:46:06.517394 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 08:46:06.517478 PCI: 00:1e.3 cmd <- 02
1601 08:46:06.524194 PCI: 00:1f.0 subsystem <- 8086/a087
1602 08:46:06.524278 PCI: 00:1f.0 cmd <- 407
1603 08:46:06.527330 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 08:46:06.531027 PCI: 00:1f.3 cmd <- 02
1605 08:46:06.534471 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 08:46:06.537411 PCI: 00:1f.5 cmd <- 406
1607 08:46:06.542269 PCI: 01:00.0 cmd <- 02
1608 08:46:06.546338 done.
1609 08:46:06.550010 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 08:46:06.553503 Initializing devices...
1611 08:46:06.556607 Root Device init
1612 08:46:06.560028 Chrome EC: Set SMI mask to 0x0000000000000000
1613 08:46:06.566792 Chrome EC: clear events_b mask to 0x0000000000000000
1614 08:46:06.573571 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 08:46:06.580005 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 08:46:06.587031 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 08:46:06.590151 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 08:46:06.598437 fw_config match found: DB_USB=USB3_ACTIVE
1619 08:46:06.601760 Configure Right Type-C port orientation for retimer
1620 08:46:06.605226 Root Device init finished in 46 msecs
1621 08:46:06.609069 PCI: 00:00.0 init
1622 08:46:06.612338 CPU TDP = 9 Watts
1623 08:46:06.612420 CPU PL1 = 9 Watts
1624 08:46:06.615421 CPU PL2 = 40 Watts
1625 08:46:06.618670 CPU PL4 = 83 Watts
1626 08:46:06.622218 PCI: 00:00.0 init finished in 8 msecs
1627 08:46:06.622309 PCI: 00:02.0 init
1628 08:46:06.625259 GMA: Found VBT in CBFS
1629 08:46:06.628727 GMA: Found valid VBT in CBFS
1630 08:46:06.635259 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 08:46:06.642419 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 08:46:06.645697 PCI: 00:02.0 init finished in 18 msecs
1633 08:46:06.648741 PCI: 00:05.0 init
1634 08:46:06.651939 PCI: 00:05.0 init finished in 0 msecs
1635 08:46:06.655487 PCI: 00:08.0 init
1636 08:46:06.658768 PCI: 00:08.0 init finished in 0 msecs
1637 08:46:06.662012 PCI: 00:14.0 init
1638 08:46:06.665076 PCI: 00:14.0 init finished in 0 msecs
1639 08:46:06.668335 PCI: 00:14.2 init
1640 08:46:06.672461 PCI: 00:14.2 init finished in 0 msecs
1641 08:46:06.675052 PCI: 00:15.0 init
1642 08:46:06.675161 I2C bus 0 version 0x3230302a
1643 08:46:06.682134 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 08:46:06.685303 PCI: 00:15.0 init finished in 6 msecs
1645 08:46:06.685386 PCI: 00:15.1 init
1646 08:46:06.688331 I2C bus 1 version 0x3230302a
1647 08:46:06.692511 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 08:46:06.699132 PCI: 00:15.1 init finished in 6 msecs
1649 08:46:06.699217 PCI: 00:15.2 init
1650 08:46:06.701858 I2C bus 2 version 0x3230302a
1651 08:46:06.705072 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 08:46:06.709158 PCI: 00:15.2 init finished in 6 msecs
1653 08:46:06.711756 PCI: 00:15.3 init
1654 08:46:06.715184 I2C bus 3 version 0x3230302a
1655 08:46:06.718326 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 08:46:06.721525 PCI: 00:15.3 init finished in 6 msecs
1657 08:46:06.725378 PCI: 00:16.0 init
1658 08:46:06.728577 PCI: 00:16.0 init finished in 0 msecs
1659 08:46:06.731967 PCI: 00:19.1 init
1660 08:46:06.734898 I2C bus 5 version 0x3230302a
1661 08:46:06.739006 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 08:46:06.741826 PCI: 00:19.1 init finished in 6 msecs
1663 08:46:06.741915 PCI: 00:1d.0 init
1664 08:46:06.745068 Initializing PCH PCIe bridge.
1665 08:46:06.752383 PCI: 00:1d.0 init finished in 3 msecs
1666 08:46:06.754863 PCI: 00:1f.0 init
1667 08:46:06.758389 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 08:46:06.761434 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 08:46:06.765242 IOAPIC: ID = 0x02
1670 08:46:06.768257 IOAPIC: Dumping registers
1671 08:46:06.768345 reg 0x0000: 0x02000000
1672 08:46:06.771302 reg 0x0001: 0x00770020
1673 08:46:06.774587 reg 0x0002: 0x00000000
1674 08:46:06.778037 PCI: 00:1f.0 init finished in 21 msecs
1675 08:46:06.782148 PCI: 00:1f.2 init
1676 08:46:06.782234 Disabling ACPI via APMC.
1677 08:46:06.786550 APMC done.
1678 08:46:06.789560 PCI: 00:1f.2 init finished in 5 msecs
1679 08:46:06.802082 PCI: 01:00.0 init
1680 08:46:06.804829 PCI: 01:00.0 init finished in 0 msecs
1681 08:46:06.808237 PNP: 0c09.0 init
1682 08:46:06.812035 Google Chrome EC uptime: 8.340 seconds
1683 08:46:06.818214 Google Chrome AP resets since EC boot: 1
1684 08:46:06.821583 Google Chrome most recent AP reset causes:
1685 08:46:06.825415 0.346: 32775 shutdown: entering G3
1686 08:46:06.831530 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 08:46:06.834616 PNP: 0c09.0 init finished in 22 msecs
1688 08:46:06.840616 Devices initialized
1689 08:46:06.843543 Show all devs... After init.
1690 08:46:06.847071 Root Device: enabled 1
1691 08:46:06.847156 DOMAIN: 0000: enabled 1
1692 08:46:06.850062 CPU_CLUSTER: 0: enabled 1
1693 08:46:06.853486 PCI: 00:00.0: enabled 1
1694 08:46:06.857031 PCI: 00:02.0: enabled 1
1695 08:46:06.857115 PCI: 00:04.0: enabled 1
1696 08:46:06.860332 PCI: 00:05.0: enabled 1
1697 08:46:06.863853 PCI: 00:06.0: enabled 0
1698 08:46:06.867383 PCI: 00:07.0: enabled 0
1699 08:46:06.867467 PCI: 00:07.1: enabled 0
1700 08:46:06.870105 PCI: 00:07.2: enabled 0
1701 08:46:06.873706 PCI: 00:07.3: enabled 0
1702 08:46:06.876914 PCI: 00:08.0: enabled 1
1703 08:46:06.876997 PCI: 00:09.0: enabled 0
1704 08:46:06.880014 PCI: 00:0a.0: enabled 0
1705 08:46:06.883478 PCI: 00:0d.0: enabled 1
1706 08:46:06.886697 PCI: 00:0d.1: enabled 0
1707 08:46:06.886781 PCI: 00:0d.2: enabled 0
1708 08:46:06.890422 PCI: 00:0d.3: enabled 0
1709 08:46:06.893817 PCI: 00:0e.0: enabled 0
1710 08:46:06.893901 PCI: 00:10.2: enabled 1
1711 08:46:06.897189 PCI: 00:10.6: enabled 0
1712 08:46:06.900263 PCI: 00:10.7: enabled 0
1713 08:46:06.903533 PCI: 00:12.0: enabled 0
1714 08:46:06.903616 PCI: 00:12.6: enabled 0
1715 08:46:06.906580 PCI: 00:13.0: enabled 0
1716 08:46:06.910016 PCI: 00:14.0: enabled 1
1717 08:46:06.913407 PCI: 00:14.1: enabled 0
1718 08:46:06.913491 PCI: 00:14.2: enabled 1
1719 08:46:06.916586 PCI: 00:14.3: enabled 1
1720 08:46:06.919841 PCI: 00:15.0: enabled 1
1721 08:46:06.923928 PCI: 00:15.1: enabled 1
1722 08:46:06.924111 PCI: 00:15.2: enabled 1
1723 08:46:06.926463 PCI: 00:15.3: enabled 1
1724 08:46:06.930162 PCI: 00:16.0: enabled 1
1725 08:46:06.930246 PCI: 00:16.1: enabled 0
1726 08:46:06.933291 PCI: 00:16.2: enabled 0
1727 08:46:06.936589 PCI: 00:16.3: enabled 0
1728 08:46:06.940014 PCI: 00:16.4: enabled 0
1729 08:46:06.940136 PCI: 00:16.5: enabled 0
1730 08:46:06.945114 PCI: 00:17.0: enabled 0
1731 08:46:06.946379 PCI: 00:19.0: enabled 0
1732 08:46:06.949862 PCI: 00:19.1: enabled 1
1733 08:46:06.949944 PCI: 00:19.2: enabled 0
1734 08:46:06.953325 PCI: 00:1c.0: enabled 1
1735 08:46:06.956484 PCI: 00:1c.1: enabled 0
1736 08:46:06.959959 PCI: 00:1c.2: enabled 0
1737 08:46:06.960041 PCI: 00:1c.3: enabled 0
1738 08:46:06.962985 PCI: 00:1c.4: enabled 0
1739 08:46:06.966301 PCI: 00:1c.5: enabled 0
1740 08:46:06.969755 PCI: 00:1c.6: enabled 1
1741 08:46:06.969837 PCI: 00:1c.7: enabled 0
1742 08:46:06.972894 PCI: 00:1d.0: enabled 1
1743 08:46:06.976539 PCI: 00:1d.1: enabled 0
1744 08:46:06.976622 PCI: 00:1d.2: enabled 1
1745 08:46:06.980335 PCI: 00:1d.3: enabled 0
1746 08:46:06.982910 PCI: 00:1e.0: enabled 1
1747 08:46:06.987200 PCI: 00:1e.1: enabled 0
1748 08:46:06.987282 PCI: 00:1e.2: enabled 1
1749 08:46:06.989523 PCI: 00:1e.3: enabled 1
1750 08:46:06.993016 PCI: 00:1f.0: enabled 1
1751 08:46:06.996385 PCI: 00:1f.1: enabled 0
1752 08:46:06.996467 PCI: 00:1f.2: enabled 1
1753 08:46:07.000219 PCI: 00:1f.3: enabled 1
1754 08:46:07.002988 PCI: 00:1f.4: enabled 0
1755 08:46:07.006985 PCI: 00:1f.5: enabled 1
1756 08:46:07.007067 PCI: 00:1f.6: enabled 0
1757 08:46:07.009405 PCI: 00:1f.7: enabled 0
1758 08:46:07.012899 APIC: 00: enabled 1
1759 08:46:07.012980 GENERIC: 0.0: enabled 1
1760 08:46:07.016309 GENERIC: 0.0: enabled 1
1761 08:46:07.019976 GENERIC: 1.0: enabled 1
1762 08:46:07.022737 GENERIC: 0.0: enabled 1
1763 08:46:07.022817 GENERIC: 1.0: enabled 1
1764 08:46:07.026489 USB0 port 0: enabled 1
1765 08:46:07.029612 GENERIC: 0.0: enabled 1
1766 08:46:07.029699 USB0 port 0: enabled 1
1767 08:46:07.033258 GENERIC: 0.0: enabled 1
1768 08:46:07.036426 I2C: 00:1a: enabled 1
1769 08:46:07.039236 I2C: 00:31: enabled 1
1770 08:46:07.039317 I2C: 00:32: enabled 1
1771 08:46:07.043838 I2C: 00:10: enabled 1
1772 08:46:07.046129 I2C: 00:15: enabled 1
1773 08:46:07.046211 GENERIC: 0.0: enabled 0
1774 08:46:07.049933 GENERIC: 1.0: enabled 0
1775 08:46:07.052499 GENERIC: 0.0: enabled 1
1776 08:46:07.052580 SPI: 00: enabled 1
1777 08:46:07.055778 SPI: 00: enabled 1
1778 08:46:07.059279 PNP: 0c09.0: enabled 1
1779 08:46:07.059359 GENERIC: 0.0: enabled 1
1780 08:46:07.062708 USB3 port 0: enabled 1
1781 08:46:07.065903 USB3 port 1: enabled 1
1782 08:46:07.069478 USB3 port 2: enabled 0
1783 08:46:07.069586 USB3 port 3: enabled 0
1784 08:46:07.072544 USB2 port 0: enabled 0
1785 08:46:07.075680 USB2 port 1: enabled 1
1786 08:46:07.075761 USB2 port 2: enabled 1
1787 08:46:07.079372 USB2 port 3: enabled 0
1788 08:46:07.082623 USB2 port 4: enabled 1
1789 08:46:07.082703 USB2 port 5: enabled 0
1790 08:46:07.085966 USB2 port 6: enabled 0
1791 08:46:07.089179 USB2 port 7: enabled 0
1792 08:46:07.092311 USB2 port 8: enabled 0
1793 08:46:07.092392 USB2 port 9: enabled 0
1794 08:46:07.095975 USB3 port 0: enabled 0
1795 08:46:07.100017 USB3 port 1: enabled 1
1796 08:46:07.100130 USB3 port 2: enabled 0
1797 08:46:07.102343 USB3 port 3: enabled 0
1798 08:46:07.105995 GENERIC: 0.0: enabled 1
1799 08:46:07.109088 GENERIC: 1.0: enabled 1
1800 08:46:07.109169 APIC: 01: enabled 1
1801 08:46:07.112377 APIC: 03: enabled 1
1802 08:46:07.112458 APIC: 06: enabled 1
1803 08:46:07.115813 APIC: 05: enabled 1
1804 08:46:07.119009 APIC: 04: enabled 1
1805 08:46:07.119090 APIC: 02: enabled 1
1806 08:46:07.122730 APIC: 07: enabled 1
1807 08:46:07.125700 PCI: 01:00.0: enabled 1
1808 08:46:07.128894 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1809 08:46:07.135647 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 08:46:07.138830 ELOG: NV offset 0xf30000 size 0x1000
1811 08:46:07.145548 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 08:46:07.152458 ELOG: Event(17) added with size 13 at 2023-12-11 08:46:07 UTC
1813 08:46:07.159589 ELOG: Event(92) added with size 9 at 2023-12-11 08:46:07 UTC
1814 08:46:07.165662 ELOG: Event(93) added with size 9 at 2023-12-11 08:46:07 UTC
1815 08:46:07.172065 ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:07 UTC
1816 08:46:07.178770 ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:07 UTC
1817 08:46:07.186048 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 08:46:07.188703 ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:07 UTC
1819 08:46:07.198759 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1820 08:46:07.205481 ELOG: Event(A0) added with size 9 at 2023-12-11 08:46:07 UTC
1821 08:46:07.208677 elog_add_boot_reason: Logged dev mode boot
1822 08:46:07.215100 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1823 08:46:07.215185 Finalize devices...
1824 08:46:07.218469 Devices finalized
1825 08:46:07.225152 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 08:46:07.228389 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 08:46:07.235099 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 08:46:07.238352 ME: HFSTS1 : 0x80030055
1829 08:46:07.245398 ME: HFSTS2 : 0x30280116
1830 08:46:07.248303 ME: HFSTS3 : 0x00000050
1831 08:46:07.251508 ME: HFSTS4 : 0x00004000
1832 08:46:07.258794 ME: HFSTS5 : 0x00000000
1833 08:46:07.261510 ME: HFSTS6 : 0x00400006
1834 08:46:07.264923 ME: Manufacturing Mode : YES
1835 08:46:07.269520 ME: SPI Protection Mode Enabled : NO
1836 08:46:07.271380 ME: FW Partition Table : OK
1837 08:46:07.278281 ME: Bringup Loader Failure : NO
1838 08:46:07.281678 ME: Firmware Init Complete : NO
1839 08:46:07.284692 ME: Boot Options Present : NO
1840 08:46:07.288374 ME: Update In Progress : NO
1841 08:46:07.291317 ME: D0i3 Support : YES
1842 08:46:07.294757 ME: Low Power State Enabled : NO
1843 08:46:07.298191 ME: CPU Replaced : YES
1844 08:46:07.301778 ME: CPU Replacement Valid : YES
1845 08:46:07.307951 ME: Current Working State : 5
1846 08:46:07.311482 ME: Current Operation State : 1
1847 08:46:07.315611 ME: Current Operation Mode : 3
1848 08:46:07.318496 ME: Error Code : 0
1849 08:46:07.321522 ME: Enhanced Debug Mode : NO
1850 08:46:07.324638 ME: CPU Debug Disabled : YES
1851 08:46:07.328096 ME: TXT Support : NO
1852 08:46:07.334650 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 08:46:07.341414 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1854 08:46:07.344519 CBFS: 'fallback/slic' not found.
1855 08:46:07.351855 ACPI: Writing ACPI tables at 76b01000.
1856 08:46:07.351944 ACPI: * FACS
1857 08:46:07.354287 ACPI: * DSDT
1858 08:46:07.357694 Ramoops buffer: 0x100000@0x76a00000.
1859 08:46:07.360986 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1860 08:46:07.364450 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1861 08:46:07.369364 Google Chrome EC: version:
1862 08:46:07.372351 ro: voema_v2.0.7540-147f8d37d1
1863 08:46:07.375940 rw: voema_v2.0.7540-147f8d37d1
1864 08:46:07.379182 running image: 2
1865 08:46:07.386225 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1866 08:46:07.389249 ACPI: * FADT
1867 08:46:07.389333 SCI is IRQ9
1868 08:46:07.392157 ACPI: added table 1/32, length now 40
1869 08:46:07.395380 ACPI: * SSDT
1870 08:46:07.398917 Found 1 CPU(s) with 8 core(s) each.
1871 08:46:07.402191 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 08:46:07.408768 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 08:46:07.412287 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 08:46:07.415815 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 08:46:07.422287 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 08:46:07.428677 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 08:46:07.431922 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 08:46:07.438708 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 08:46:07.445535 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 08:46:07.448317 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 08:46:07.451871 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 08:46:07.458102 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 08:46:07.466181 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 08:46:07.469360 PS2K: Passing 80 keymaps to kernel
1885 08:46:07.476472 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 08:46:07.482423 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 08:46:07.488969 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 08:46:07.495373 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 08:46:07.502177 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 08:46:07.508576 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 08:46:07.515293 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 08:46:07.522243 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 08:46:07.525315 ACPI: added table 2/32, length now 44
1894 08:46:07.528554 ACPI: * MCFG
1895 08:46:07.532054 ACPI: added table 3/32, length now 48
1896 08:46:07.532172 ACPI: * TPM2
1897 08:46:07.535251 TPM2 log created at 0x769f0000
1898 08:46:07.538657 ACPI: added table 4/32, length now 52
1899 08:46:07.542293 ACPI: * MADT
1900 08:46:07.542405 SCI is IRQ9
1901 08:46:07.545216 ACPI: added table 5/32, length now 56
1902 08:46:07.548838 current = 76b09850
1903 08:46:07.548921 ACPI: * DMAR
1904 08:46:07.555220 ACPI: added table 6/32, length now 60
1905 08:46:07.558452 ACPI: added table 7/32, length now 64
1906 08:46:07.558537 ACPI: * HPET
1907 08:46:07.562164 ACPI: added table 8/32, length now 68
1908 08:46:07.564979 ACPI: done.
1909 08:46:07.565060 ACPI tables: 35216 bytes.
1910 08:46:07.569037 smbios_write_tables: 769ef000
1911 08:46:07.571749 EC returned error result code 3
1912 08:46:07.575391 Couldn't obtain OEM name from CBI
1913 08:46:07.578911 Create SMBIOS type 16
1914 08:46:07.582347 Create SMBIOS type 17
1915 08:46:07.585608 GENERIC: 0.0 (WIFI Device)
1916 08:46:07.585689 SMBIOS tables: 1750 bytes.
1917 08:46:07.592658 Writing table forward entry at 0x00000500
1918 08:46:07.598840 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1919 08:46:07.602194 Writing coreboot table at 0x76b25000
1920 08:46:07.608833 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1921 08:46:07.612070 1. 0000000000001000-000000000009ffff: RAM
1922 08:46:07.615410 2. 00000000000a0000-00000000000fffff: RESERVED
1923 08:46:07.622391 3. 0000000000100000-00000000769eefff: RAM
1924 08:46:07.625524 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1925 08:46:07.632371 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1926 08:46:07.638487 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1927 08:46:07.642195 7. 0000000077000000-000000007fbfffff: RESERVED
1928 08:46:07.645301 8. 00000000c0000000-00000000cfffffff: RESERVED
1929 08:46:07.652034 9. 00000000f8000000-00000000f9ffffff: RESERVED
1930 08:46:07.655303 10. 00000000fb000000-00000000fb000fff: RESERVED
1931 08:46:07.662511 11. 00000000fe000000-00000000fe00ffff: RESERVED
1932 08:46:07.665445 12. 00000000fed80000-00000000fed87fff: RESERVED
1933 08:46:07.671994 13. 00000000fed90000-00000000fed92fff: RESERVED
1934 08:46:07.675283 14. 00000000feda0000-00000000feda1fff: RESERVED
1935 08:46:07.681800 15. 00000000fedc0000-00000000feddffff: RESERVED
1936 08:46:07.685440 16. 0000000100000000-00000002803fffff: RAM
1937 08:46:07.688713 Passing 4 GPIOs to payload:
1938 08:46:07.691836 NAME | PORT | POLARITY | VALUE
1939 08:46:07.698772 lid | undefined | high | high
1940 08:46:07.702035 power | undefined | high | low
1941 08:46:07.708453 oprom | undefined | high | low
1942 08:46:07.714870 EC in RW | 0x000000e5 | high | high
1943 08:46:07.721831 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7b45
1944 08:46:07.721915 coreboot table: 1576 bytes.
1945 08:46:07.728318 IMD ROOT 0. 0x76fff000 0x00001000
1946 08:46:07.731626 IMD SMALL 1. 0x76ffe000 0x00001000
1947 08:46:07.735028 FSP MEMORY 2. 0x76c4e000 0x003b0000
1948 08:46:07.738364 VPD 3. 0x76c4d000 0x00000367
1949 08:46:07.741724 RO MCACHE 4. 0x76c4c000 0x00000fdc
1950 08:46:07.745098 CONSOLE 5. 0x76c2c000 0x00020000
1951 08:46:07.748266 FMAP 6. 0x76c2b000 0x00000578
1952 08:46:07.751946 TIME STAMP 7. 0x76c2a000 0x00000910
1953 08:46:07.755227 VBOOT WORK 8. 0x76c16000 0x00014000
1954 08:46:07.761811 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 08:46:07.765038 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 08:46:07.768273 RAMSTAGE 11. 0x76b97000 0x00073000
1957 08:46:07.771772 REFCODE 12. 0x76b42000 0x00055000
1958 08:46:07.775296 SMM BACKUP 13. 0x76b32000 0x00010000
1959 08:46:07.778322 4f444749 14. 0x76b30000 0x00002000
1960 08:46:07.781564 EXT VBT15. 0x76b2d000 0x0000219f
1961 08:46:07.784871 COREBOOT 16. 0x76b25000 0x00008000
1962 08:46:07.788325 ACPI 17. 0x76b01000 0x00024000
1963 08:46:07.795182 ACPI GNVS 18. 0x76b00000 0x00001000
1964 08:46:07.798781 RAMOOPS 19. 0x76a00000 0x00100000
1965 08:46:07.801763 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 08:46:07.805437 SMBIOS 21. 0x769ef000 0x00000800
1967 08:46:07.805521 IMD small region:
1968 08:46:07.811813 IMD ROOT 0. 0x76ffec00 0x00000400
1969 08:46:07.814788 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 08:46:07.818302 POWER STATE 2. 0x76ffeb80 0x00000044
1971 08:46:07.821407 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 08:46:07.825236 MEM INFO 4. 0x76ffe980 0x000001e0
1973 08:46:07.831869 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1974 08:46:07.835251 MTRR: Physical address space:
1975 08:46:07.842783 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 08:46:07.848173 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1977 08:46:07.854992 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1978 08:46:07.861294 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1979 08:46:07.864975 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1980 08:46:07.871454 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1981 08:46:07.878062 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1982 08:46:07.881232 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 08:46:07.889671 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 08:46:07.891284 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 08:46:07.894501 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 08:46:07.897828 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 08:46:07.904775 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 08:46:07.907940 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 08:46:07.911666 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 08:46:07.914546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 08:46:07.921188 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 08:46:07.924813 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 08:46:07.928155 call enable_fixed_mtrr()
1994 08:46:07.931239 CPU physical address size: 39 bits
1995 08:46:07.934591 MTRR: default type WB/UC MTRR counts: 6/6.
1996 08:46:07.937867 MTRR: UC selected as default type.
1997 08:46:07.944953 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 08:46:07.951170 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 08:46:07.957890 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 08:46:07.964335 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 08:46:07.971620 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 08:46:07.978043 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 08:46:07.978130
2004 08:46:07.978195 MTRR check
2005 08:46:07.981407 Fixed MTRRs : Enabled
2006 08:46:07.984359 Variable MTRRs: Enabled
2007 08:46:07.984441
2008 08:46:07.987652 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 08:46:07.991370 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 08:46:07.997811 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 08:46:08.001114 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 08:46:08.004015 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 08:46:08.008155 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 08:46:08.014429 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 08:46:08.017580 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 08:46:08.021018 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 08:46:08.024157 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 08:46:08.030968 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 08:46:08.037283 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2020 08:46:08.037376 call enable_fixed_mtrr()
2021 08:46:08.044969 Checking cr50 for pending updates
2022 08:46:08.045057 CPU physical address size: 39 bits
2023 08:46:08.051210 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 08:46:08.054632 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 08:46:08.057646 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 08:46:08.061162 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 08:46:08.067759 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 08:46:08.070911 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 08:46:08.074080 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 08:46:08.077668 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 08:46:08.084406 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 08:46:08.087365 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 08:46:08.090989 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 08:46:08.094122 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 08:46:08.101222 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 08:46:08.104561 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 08:46:08.108075 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 08:46:08.111202 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 08:46:08.117704 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 08:46:08.121014 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 08:46:08.124636 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 08:46:08.127815 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 08:46:08.134395 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 08:46:08.137784 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 08:46:08.140899 call enable_fixed_mtrr()
2046 08:46:08.144516 call enable_fixed_mtrr()
2047 08:46:08.147967 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 08:46:08.150792 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 08:46:08.154041 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 08:46:08.160897 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 08:46:08.164953 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 08:46:08.167292 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 08:46:08.171855 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 08:46:08.177377 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 08:46:08.181174 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 08:46:08.183853 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 08:46:08.187198 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 08:46:08.194683 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 08:46:08.197676 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 08:46:08.200362 call enable_fixed_mtrr()
2061 08:46:08.203687 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 08:46:08.207105 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 08:46:08.213578 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 08:46:08.217723 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 08:46:08.220271 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 08:46:08.223872 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 08:46:08.230379 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 08:46:08.233859 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 08:46:08.237115 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 08:46:08.240936 CPU physical address size: 39 bits
2071 08:46:08.244709 call enable_fixed_mtrr()
2072 08:46:08.247707 CPU physical address size: 39 bits
2073 08:46:08.251489 CPU physical address size: 39 bits
2074 08:46:08.258933 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 08:46:08.261469 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 08:46:08.265287 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 08:46:08.268489 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 08:46:08.274951 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 08:46:08.278358 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 08:46:08.281370 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 08:46:08.284984 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 08:46:08.291238 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 08:46:08.295500 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 08:46:08.298173 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 08:46:08.301506 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 08:46:08.308534 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 08:46:08.308619 call enable_fixed_mtrr()
2088 08:46:08.316439 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 08:46:08.318881 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 08:46:08.321983 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 08:46:08.325301 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 08:46:08.332225 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 08:46:08.335298 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 08:46:08.338555 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 08:46:08.341609 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 08:46:08.348759 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 08:46:08.351703 CPU physical address size: 39 bits
2098 08:46:08.355120 call enable_fixed_mtrr()
2099 08:46:08.359335 Reading cr50 TPM mode
2100 08:46:08.362901 CPU physical address size: 39 bits
2101 08:46:08.363000 CPU physical address size: 39 bits
2102 08:46:08.369609 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2103 08:46:08.379737 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2104 08:46:08.382977 Checking segment from ROM address 0xffc02b38
2105 08:46:08.386557 Checking segment from ROM address 0xffc02b54
2106 08:46:08.392859 Loading segment from ROM address 0xffc02b38
2107 08:46:08.392945 code (compression=0)
2108 08:46:08.402946 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 08:46:08.409696 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 08:46:08.412838 it's not compressed!
2111 08:46:08.552562 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 08:46:08.559294 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 08:46:08.565388 Loading segment from ROM address 0xffc02b54
2114 08:46:08.565490 Entry Point 0x30000000
2115 08:46:08.568746 Loaded segments
2116 08:46:08.575486 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 08:46:08.618410 Finalizing chipset.
2118 08:46:08.622050 Finalizing SMM.
2119 08:46:08.622144 APMC done.
2120 08:46:08.628346 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 08:46:08.631477 mp_park_aps done after 0 msecs.
2122 08:46:08.634948 Jumping to boot code at 0x30000000(0x76b25000)
2123 08:46:08.644790 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 08:46:08.644877
2125 08:46:08.644943
2126 08:46:08.645004
2127 08:46:08.648332 Starting depthcharge on Voema...
2128 08:46:08.648419
2129 08:46:08.648771 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 08:46:08.648870 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2131 08:46:08.648954 Setting prompt string to ['volteer:']
2132 08:46:08.649032 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2133 08:46:08.658473 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 08:46:08.658559
2135 08:46:08.665378 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 08:46:08.665463
2137 08:46:08.668009 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 08:46:08.671373
2139 08:46:08.674743 Failed to find eMMC card reader
2140 08:46:08.674827
2141 08:46:08.674929 Wipe memory regions:
2142 08:46:08.674990
2143 08:46:08.681369 [0x00000000001000, 0x000000000a0000)
2144 08:46:08.681500
2145 08:46:08.684578 [0x00000000100000, 0x00000030000000)
2146 08:46:08.710075
2147 08:46:08.713160 [0x00000032662db0, 0x000000769ef000)
2148 08:46:08.749193
2149 08:46:08.752567 [0x00000100000000, 0x00000280400000)
2150 08:46:08.955409
2151 08:46:08.957815 ec_init: CrosEC protocol v3 supported (256, 256)
2152 08:46:08.957904
2153 08:46:08.964544 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 08:46:08.964648
2155 08:46:08.974642 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 08:46:08.974758
2157 08:46:08.981495 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2158 08:46:08.981597
2159 08:46:08.984265 send_conn_disc_msg: pmc_send_cmd succeeded
2160 08:46:09.418475
2161 08:46:09.418631 R8152: Initializing
2162 08:46:09.418730
2163 08:46:09.421298 Version 9 (ocp_data = 6010)
2164 08:46:09.421385
2165 08:46:09.424690 R8152: Done initializing
2166 08:46:09.424776
2167 08:46:09.427733 Adding net device
2168 08:46:09.729580
2169 08:46:09.733425 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 08:46:09.733522
2171 08:46:09.733607
2172 08:46:09.733687
2173 08:46:09.736114 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 08:46:09.836558 volteer: tftpboot 192.168.201.1 12243795/tftp-deploy-i3w4oqwu/kernel/bzImage 12243795/tftp-deploy-i3w4oqwu/kernel/cmdline 12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
2176 08:46:09.836734 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 08:46:09.836846 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2178 08:46:09.840923 tftpboot 192.168.201.1 12243795/tftp-deploy-i3w4oqwu/kernel/bzImploy-i3w4oqwu/kernel/cmdline 12243795/tftp-deploy-i3w4oqwu/ramdisk/ramdisk.cpio.gz
2179 08:46:09.841014
2180 08:46:09.841099 Waiting for link
2181 08:46:10.044418
2182 08:46:10.044570 done.
2183 08:46:10.044664
2184 08:46:10.044746 MAC: 00:e0:4c:71:a6:42
2185 08:46:10.044825
2186 08:46:10.047612 Sending DHCP discover... done.
2187 08:46:10.047697
2188 08:46:10.051269 Waiting for reply... done.
2189 08:46:10.051353
2190 08:46:10.054251 Sending DHCP request... done.
2191 08:46:10.054336
2192 08:46:10.062371 Waiting for reply... done.
2193 08:46:10.062455
2194 08:46:10.062541 My ip is 192.168.201.18
2195 08:46:10.062621
2196 08:46:10.065750 The DHCP server ip is 192.168.201.1
2197 08:46:10.068898
2198 08:46:10.072276 TFTP server IP predefined by user: 192.168.201.1
2199 08:46:10.072360
2200 08:46:10.080033 Bootfile predefined by user: 12243795/tftp-deploy-i3w4oqwu/kernel/bzImage
2201 08:46:10.080146
2202 08:46:10.082276 Sending tftp read request... done.
2203 08:46:10.082361
2204 08:46:10.085664 Waiting for the transfer...
2205 08:46:10.085748
2206 08:46:10.358186 00000000 ################################################################
2207 08:46:10.358338
2208 08:46:10.638057 00080000 ################################################################
2209 08:46:10.638208
2210 08:46:10.919215 00100000 ################################################################
2211 08:46:10.919363
2212 08:46:11.197388 00180000 ################################################################
2213 08:46:11.197549
2214 08:46:11.484585 00200000 ################################################################
2215 08:46:11.484740
2216 08:46:11.757901 00280000 ################################################################
2217 08:46:11.758054
2218 08:46:12.011241 00300000 ################################################################
2219 08:46:12.011394
2220 08:46:12.283426 00380000 ################################################################
2221 08:46:12.283565
2222 08:46:12.567089 00400000 ################################################################
2223 08:46:12.567238
2224 08:46:12.848218 00480000 ################################################################
2225 08:46:12.848367
2226 08:46:13.124646 00500000 ################################################################
2227 08:46:13.124796
2228 08:46:13.392778 00580000 ################################################################
2229 08:46:13.392926
2230 08:46:13.667143 00600000 ################################################################
2231 08:46:13.667292
2232 08:46:13.943301 00680000 ################################################################
2233 08:46:13.943452
2234 08:46:14.226214 00700000 ################################################################
2235 08:46:14.226362
2236 08:46:14.505154 00780000 ################################################################
2237 08:46:14.505332
2238 08:46:14.611465 00800000 ####################### done.
2239 08:46:14.611591
2240 08:46:14.614438 The bootfile was 8572816 bytes long.
2241 08:46:14.617663
2242 08:46:14.621458 Sending tftp read request... done.
2243 08:46:14.621545
2244 08:46:14.621612 Waiting for the transfer...
2245 08:46:14.621674
2246 08:46:14.901367 00000000 ################################################################
2247 08:46:14.901515
2248 08:46:15.180319 00080000 ################################################################
2249 08:46:15.180479
2250 08:46:15.467987 00100000 ################################################################
2251 08:46:15.468160
2252 08:46:15.747677 00180000 ################################################################
2253 08:46:15.747835
2254 08:46:16.041843 00200000 ################################################################
2255 08:46:16.041999
2256 08:46:16.316943 00280000 ################################################################
2257 08:46:16.317104
2258 08:46:16.592169 00300000 ################################################################
2259 08:46:16.592326
2260 08:46:16.868647 00380000 ################################################################
2261 08:46:16.868783
2262 08:46:17.140043 00400000 ################################################################
2263 08:46:17.140226
2264 08:46:17.416080 00480000 ################################################################
2265 08:46:17.416227
2266 08:46:17.698562 00500000 ############################################################### done.
2267 08:46:17.698722
2268 08:46:17.701416 Sending tftp read request... done.
2269 08:46:17.701513
2270 08:46:17.705172 Waiting for the transfer...
2271 08:46:17.705276
2272 08:46:17.705350 00000000 # done.
2273 08:46:17.705421
2274 08:46:17.714838 Command line loaded dynamically from TFTP file: 12243795/tftp-deploy-i3w4oqwu/kernel/cmdline
2275 08:46:17.714989
2276 08:46:17.738435 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243795/extract-nfsrootfs-6vn3k53d,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 08:46:17.743951
2278 08:46:17.747331 Shutting down all USB controllers.
2279 08:46:17.747568
2280 08:46:17.747756 Removing current net device
2281 08:46:17.747932
2282 08:46:17.751064 Finalizing coreboot
2283 08:46:17.751276
2284 08:46:17.757093 Exiting depthcharge with code 4 at timestamp: 17763293
2285 08:46:17.757415
2286 08:46:17.757686
2287 08:46:17.757940 Starting kernel ...
2288 08:46:17.758117
2289 08:46:17.758372
2290 08:46:17.759195 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2291 08:46:17.759496 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2292 08:46:17.759723 Setting prompt string to ['Linux version [0-9]']
2293 08:46:17.759921 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2294 08:46:17.760147 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2296 08:50:52.760380 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2298 08:50:52.761364 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2300 08:50:52.762143 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 08:50:52.763456 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 08:50:52.764587 Cleaning after the job
2306 08:50:52.765061 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/ramdisk
2307 08:50:52.766232 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/kernel
2308 08:50:52.767531 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/nfsrootfs
2309 08:50:52.844208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243795/tftp-deploy-i3w4oqwu/modules
2310 08:50:52.844653 start: 5.1 power-off (timeout 00:00:30) [common]
2311 08:50:52.844818 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2312 08:50:52.923204 >> Command sent successfully.
2313 08:50:52.927794 Returned 0 in 0 seconds
2314 08:50:53.028771 end: 5.1 power-off (duration 00:00:00) [common]
2316 08:50:53.030151 start: 5.2 read-feedback (timeout 00:10:00) [common]
2317 08:50:53.031335 Listened to connection for namespace 'common' for up to 1s
2318 08:50:54.031903 Finalising connection for namespace 'common'
2319 08:50:54.032696 Disconnecting from shell: Finalise
2320 08:50:54.033217
2321 08:50:54.134209 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 08:50:54.134800 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243795
2323 08:50:54.489462 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243795
2324 08:50:54.489661 JobError: Your job cannot terminate cleanly.