Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:46:14.358038 lava-dispatcher, installed at version: 2023.10
2 08:46:14.358245 start: 0 validate
3 08:46:14.358382 Start time: 2023-12-11 08:46:14.358374+00:00 (UTC)
4 08:46:14.358571 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:46:14.358707 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 08:46:14.617321 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:46:14.617493 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:46:14.883350 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:46:14.883523 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 08:46:15.150553 validate duration: 0.79
12 08:46:15.150852 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:46:15.150965 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:46:15.151065 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:46:15.151194 Not decompressing ramdisk as can be used compressed.
16 08:46:15.151282 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 08:46:15.151350 saving as /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/ramdisk/rootfs.cpio.gz
18 08:46:15.151413 total size: 35760064 (34 MB)
19 08:46:15.152464 progress 0 % (0 MB)
20 08:46:15.162038 progress 5 % (1 MB)
21 08:46:15.171589 progress 10 % (3 MB)
22 08:46:15.181022 progress 15 % (5 MB)
23 08:46:15.190629 progress 20 % (6 MB)
24 08:46:15.199990 progress 25 % (8 MB)
25 08:46:15.209571 progress 30 % (10 MB)
26 08:46:15.219086 progress 35 % (11 MB)
27 08:46:15.228512 progress 40 % (13 MB)
28 08:46:15.238131 progress 45 % (15 MB)
29 08:46:15.247539 progress 50 % (17 MB)
30 08:46:15.257069 progress 55 % (18 MB)
31 08:46:15.266389 progress 60 % (20 MB)
32 08:46:15.276293 progress 65 % (22 MB)
33 08:46:15.285716 progress 70 % (23 MB)
34 08:46:15.295213 progress 75 % (25 MB)
35 08:46:15.304617 progress 80 % (27 MB)
36 08:46:15.313911 progress 85 % (29 MB)
37 08:46:15.323426 progress 90 % (30 MB)
38 08:46:15.332693 progress 95 % (32 MB)
39 08:46:15.342007 progress 100 % (34 MB)
40 08:46:15.342170 34 MB downloaded in 0.19 s (178.78 MB/s)
41 08:46:15.342337 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:46:15.342619 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:46:15.342706 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:46:15.342791 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:46:15.342931 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 08:46:15.343007 saving as /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/kernel/bzImage
48 08:46:15.343069 total size: 8572816 (8 MB)
49 08:46:15.343130 No compression specified
50 08:46:15.344223 progress 0 % (0 MB)
51 08:46:15.346603 progress 5 % (0 MB)
52 08:46:15.348900 progress 10 % (0 MB)
53 08:46:15.351201 progress 15 % (1 MB)
54 08:46:15.353521 progress 20 % (1 MB)
55 08:46:15.355856 progress 25 % (2 MB)
56 08:46:15.358161 progress 30 % (2 MB)
57 08:46:15.360521 progress 35 % (2 MB)
58 08:46:15.362812 progress 40 % (3 MB)
59 08:46:15.365195 progress 45 % (3 MB)
60 08:46:15.367544 progress 50 % (4 MB)
61 08:46:15.369794 progress 55 % (4 MB)
62 08:46:15.372159 progress 60 % (4 MB)
63 08:46:15.374599 progress 65 % (5 MB)
64 08:46:15.376835 progress 70 % (5 MB)
65 08:46:15.379083 progress 75 % (6 MB)
66 08:46:15.381312 progress 80 % (6 MB)
67 08:46:15.383565 progress 85 % (6 MB)
68 08:46:15.385778 progress 90 % (7 MB)
69 08:46:15.388016 progress 95 % (7 MB)
70 08:46:15.390246 progress 100 % (8 MB)
71 08:46:15.390457 8 MB downloaded in 0.05 s (172.54 MB/s)
72 08:46:15.390607 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:46:15.390837 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:46:15.390922 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:46:15.391010 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:46:15.391152 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 08:46:15.391225 saving as /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/modules/modules.tar
79 08:46:15.391287 total size: 251012 (0 MB)
80 08:46:15.391349 Using unxz to decompress xz
81 08:46:15.395733 progress 13 % (0 MB)
82 08:46:15.396151 progress 26 % (0 MB)
83 08:46:15.396387 progress 39 % (0 MB)
84 08:46:15.397985 progress 52 % (0 MB)
85 08:46:15.399944 progress 65 % (0 MB)
86 08:46:15.401806 progress 78 % (0 MB)
87 08:46:15.403632 progress 91 % (0 MB)
88 08:46:15.405582 progress 100 % (0 MB)
89 08:46:15.411036 0 MB downloaded in 0.02 s (12.13 MB/s)
90 08:46:15.411268 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:46:15.411575 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:46:15.411678 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 08:46:15.411779 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 08:46:15.411869 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:46:15.411959 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 08:46:15.412189 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_
98 08:46:15.412325 makedir: /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin
99 08:46:15.412432 makedir: /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/tests
100 08:46:15.412533 makedir: /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/results
101 08:46:15.412651 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-add-keys
102 08:46:15.412801 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-add-sources
103 08:46:15.412936 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-background-process-start
104 08:46:15.413071 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-background-process-stop
105 08:46:15.413201 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-common-functions
106 08:46:15.413328 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-echo-ipv4
107 08:46:15.413455 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-install-packages
108 08:46:15.413584 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-installed-packages
109 08:46:15.413710 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-os-build
110 08:46:15.413835 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-probe-channel
111 08:46:15.413987 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-probe-ip
112 08:46:15.414117 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-target-ip
113 08:46:15.414244 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-target-mac
114 08:46:15.414369 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-target-storage
115 08:46:15.414540 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-case
116 08:46:15.414667 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-event
117 08:46:15.414792 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-feedback
118 08:46:15.414919 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-raise
119 08:46:15.415047 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-reference
120 08:46:15.415175 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-runner
121 08:46:15.415303 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-set
122 08:46:15.415434 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-test-shell
123 08:46:15.415574 Updating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-install-packages (oe)
124 08:46:15.415729 Updating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/bin/lava-installed-packages (oe)
125 08:46:15.415855 Creating /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/environment
126 08:46:15.415960 LAVA metadata
127 08:46:15.416036 - LAVA_JOB_ID=12243823
128 08:46:15.416102 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:46:15.416205 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 08:46:15.416275 skipped lava-vland-overlay
131 08:46:15.416353 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:46:15.416440 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 08:46:15.416503 skipped lava-multinode-overlay
134 08:46:15.416576 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:46:15.416659 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 08:46:15.416737 Loading test definitions
137 08:46:15.416833 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 08:46:15.416915 Using /lava-12243823 at stage 0
139 08:46:15.417360 uuid=12243823_1.4.2.3.1 testdef=None
140 08:46:15.417452 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:46:15.417598 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 08:46:15.418139 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:46:15.418363 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 08:46:15.419010 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:46:15.419237 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 08:46:15.419832 runner path: /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/0/tests/0_cros-ec test_uuid 12243823_1.4.2.3.1
149 08:46:15.419987 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:46:15.420193 Creating lava-test-runner.conf files
152 08:46:15.420256 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243823/lava-overlay-as32jba_/lava-12243823/0 for stage 0
153 08:46:15.420361 - 0_cros-ec
154 08:46:15.420462 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 08:46:15.420549 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 08:46:15.427450 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 08:46:15.427558 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 08:46:15.427644 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 08:46:15.427730 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 08:46:15.427817 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 08:46:16.472489 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 08:46:16.472885 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 08:46:16.473004 extracting modules file /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243823/extract-overlay-ramdisk-jzxvt212/ramdisk
164 08:46:16.487623 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 08:46:16.487752 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 08:46:16.487851 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243823/compress-overlay-saz99zac/overlay-1.4.2.4.tar.gz to ramdisk
167 08:46:16.487948 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243823/compress-overlay-saz99zac/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243823/extract-overlay-ramdisk-jzxvt212/ramdisk
168 08:46:16.495394 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 08:46:16.495508 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 08:46:16.495601 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 08:46:16.495687 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 08:46:16.495764 Building ramdisk /var/lib/lava/dispatcher/tmp/12243823/extract-overlay-ramdisk-jzxvt212/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243823/extract-overlay-ramdisk-jzxvt212/ramdisk
173 08:46:17.018900 >> 184084 blocks
174 08:46:20.594752 rename /var/lib/lava/dispatcher/tmp/12243823/extract-overlay-ramdisk-jzxvt212/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
175 08:46:20.595216 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 08:46:20.595352 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 08:46:20.595457 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 08:46:20.595566 No mkimage arch provided, not using FIT.
179 08:46:20.595662 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 08:46:20.595748 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 08:46:20.595854 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 08:46:20.595949 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 08:46:20.596038 No LXC device requested
184 08:46:20.596119 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 08:46:20.596211 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 08:46:20.596295 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 08:46:20.596370 Checking files for TFTP limit of 4294967296 bytes.
188 08:46:20.596775 end: 1 tftp-deploy (duration 00:00:05) [common]
189 08:46:20.596876 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 08:46:20.596968 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 08:46:20.597088 substitutions:
192 08:46:20.597154 - {DTB}: None
193 08:46:20.597218 - {INITRD}: 12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
194 08:46:20.597277 - {KERNEL}: 12243823/tftp-deploy-1ca0qy7q/kernel/bzImage
195 08:46:20.597333 - {LAVA_MAC}: None
196 08:46:20.597389 - {PRESEED_CONFIG}: None
197 08:46:20.597443 - {PRESEED_LOCAL}: None
198 08:46:20.597498 - {RAMDISK}: 12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
199 08:46:20.597552 - {ROOT_PART}: None
200 08:46:20.597606 - {ROOT}: None
201 08:46:20.597660 - {SERVER_IP}: 192.168.201.1
202 08:46:20.597713 - {TEE}: None
203 08:46:20.597766 Parsed boot commands:
204 08:46:20.597819 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 08:46:20.598000 Parsed boot commands: tftpboot 192.168.201.1 12243823/tftp-deploy-1ca0qy7q/kernel/bzImage 12243823/tftp-deploy-1ca0qy7q/kernel/cmdline 12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
206 08:46:20.598087 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 08:46:20.598173 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 08:46:20.598267 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 08:46:20.598353 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 08:46:20.598464 Not connected, no need to disconnect.
211 08:46:20.598541 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 08:46:20.598663 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 08:46:20.598826 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
214 08:46:20.602957 Setting prompt string to ['lava-test: # ']
215 08:46:20.603356 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 08:46:20.603483 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 08:46:20.603646 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 08:46:20.603806 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 08:46:20.604086 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
220 08:46:25.739217 >> Command sent successfully.
221 08:46:25.742205 Returned 0 in 5 seconds
222 08:46:25.842550 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 08:46:25.842981 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 08:46:25.843077 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 08:46:25.843164 Setting prompt string to 'Starting depthcharge on Voema...'
227 08:46:25.843231 Changing prompt to 'Starting depthcharge on Voema...'
228 08:46:25.843303 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 08:46:25.843565 [Enter `^Ec?' for help]
230 08:46:27.443923
231 08:46:27.444072
232 08:46:27.453722 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 08:46:27.457371 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 08:46:27.463636 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 08:46:27.467364 CPU: AES supported, TXT NOT supported, VT supported
236 08:46:27.474014 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 08:46:27.480579 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 08:46:27.483806 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 08:46:27.487466 VBOOT: Loading verstage.
240 08:46:27.490216 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 08:46:27.496926 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 08:46:27.500711 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 08:46:27.511012 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 08:46:27.517873 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 08:46:27.517958
246 08:46:27.518039
247 08:46:27.530957 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 08:46:27.545039 Probing TPM: . done!
249 08:46:27.548125 TPM ready after 0 ms
250 08:46:27.551188 Connected to device vid:did:rid of 1ae0:0028:00
251 08:46:27.562947 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
252 08:46:27.568968 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 08:46:27.572428 Initialized TPM device CR50 revision 0
254 08:46:27.623365 tlcl_send_startup: Startup return code is 0
255 08:46:27.623462 TPM: setup succeeded
256 08:46:27.637457 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 08:46:27.651490 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 08:46:27.664065 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 08:46:27.674087 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 08:46:27.677816 Chrome EC: UHEPI supported
261 08:46:27.681196 Phase 1
262 08:46:27.684444 FMAP: area GBB found @ 1805000 (458752 bytes)
263 08:46:27.694368 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 08:46:27.701173 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 08:46:27.707449 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 08:46:27.714157 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 08:46:27.718208 Recovery requested (1009000e)
268 08:46:27.721158 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 08:46:27.732648 tlcl_extend: response is 0
270 08:46:27.739393 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 08:46:27.749670 tlcl_extend: response is 0
272 08:46:27.755980 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 08:46:27.762756 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 08:46:27.769504 BS: verstage times (exec / console): total (unknown) / 142 ms
275 08:46:27.769607
276 08:46:27.769699
277 08:46:27.782907 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 08:46:27.788968 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 08:46:27.792515 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 08:46:27.795702 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 08:46:27.802660 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 08:46:27.805844 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 08:46:27.809096 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 08:46:27.812636 TCO_STS: 0000 0000
285 08:46:27.815540 GEN_PMCON: d0015038 00002200
286 08:46:27.819369 GBLRST_CAUSE: 00000000 00000000
287 08:46:27.819451 HPR_CAUSE0: 00000000
288 08:46:27.822876 prev_sleep_state 5
289 08:46:27.825858 Boot Count incremented to 25773
290 08:46:27.832714 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 08:46:27.838860 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 08:46:27.845612 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 08:46:27.852386 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 08:46:27.856776 Chrome EC: UHEPI supported
295 08:46:27.863708 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 08:46:27.876407 Probing TPM: done!
297 08:46:27.883726 Connected to device vid:did:rid of 1ae0:0028:00
298 08:46:27.894353 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
299 08:46:27.900057 Initialized TPM device CR50 revision 0
300 08:46:27.910150 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 08:46:27.916667 MRC: Hash idx 0x100b comparison successful.
302 08:46:27.920319 MRC cache found, size faa8
303 08:46:27.920427 bootmode is set to: 2
304 08:46:27.923488 SPD index = 0
305 08:46:27.930273 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 08:46:27.933313 SPD: module type is LPDDR4X
307 08:46:27.936533 SPD: module part number is MT53E512M64D4NW-046
308 08:46:27.943207 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 08:46:27.946914 SPD: device width 16 bits, bus width 16 bits
310 08:46:27.953544 SPD: module size is 1024 MB (per channel)
311 08:46:28.385663 CBMEM:
312 08:46:28.389317 IMD: root @ 0x76fff000 254 entries.
313 08:46:28.392438 IMD: root @ 0x76ffec00 62 entries.
314 08:46:28.395706 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 08:46:28.402425 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 08:46:28.405460 External stage cache:
317 08:46:28.409040 IMD: root @ 0x7b3ff000 254 entries.
318 08:46:28.412410 IMD: root @ 0x7b3fec00 62 entries.
319 08:46:28.427760 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 08:46:28.434074 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 08:46:28.440610 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 08:46:28.454589 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 08:46:28.461494 cse_lite: Skip switching to RW in the recovery path
324 08:46:28.461586 8 DIMMs found
325 08:46:28.461675 SMM Memory Map
326 08:46:28.465379 SMRAM : 0x7b000000 0x800000
327 08:46:28.469075 Subregion 0: 0x7b000000 0x200000
328 08:46:28.472683 Subregion 1: 0x7b200000 0x200000
329 08:46:28.476175 Subregion 2: 0x7b400000 0x400000
330 08:46:28.478917 top_of_ram = 0x77000000
331 08:46:28.485980 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 08:46:28.489051 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 08:46:28.495599 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 08:46:28.499282 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 08:46:28.508730 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 08:46:28.512230 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 08:46:28.524499 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 08:46:28.530954 Processing 211 relocs. Offset value of 0x74c0b000
339 08:46:28.537546 BS: romstage times (exec / console): total (unknown) / 277 ms
340 08:46:28.543559
341 08:46:28.543652
342 08:46:28.553364 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 08:46:28.557055 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 08:46:28.567087 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 08:46:28.573521 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 08:46:28.579976 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 08:46:28.586740 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 08:46:28.633869 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 08:46:28.640448 Processing 5008 relocs. Offset value of 0x75d98000
350 08:46:28.643580 BS: postcar times (exec / console): total (unknown) / 59 ms
351 08:46:28.647078
352 08:46:28.647163
353 08:46:28.657127 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 08:46:28.657217 Normal boot
355 08:46:28.660399 FW_CONFIG value is 0x804c02
356 08:46:28.663982 PCI: 00:07.0 disabled by fw_config
357 08:46:28.667162 PCI: 00:07.1 disabled by fw_config
358 08:46:28.670691 PCI: 00:0d.2 disabled by fw_config
359 08:46:28.674041 PCI: 00:1c.7 disabled by fw_config
360 08:46:28.680681 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 08:46:28.687446 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 08:46:28.690636 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 08:46:28.693791 GENERIC: 0.0 disabled by fw_config
364 08:46:28.697203 GENERIC: 1.0 disabled by fw_config
365 08:46:28.703653 fw_config match found: DB_USB=USB3_ACTIVE
366 08:46:28.707442 fw_config match found: DB_USB=USB3_ACTIVE
367 08:46:28.710589 fw_config match found: DB_USB=USB3_ACTIVE
368 08:46:28.713722 fw_config match found: DB_USB=USB3_ACTIVE
369 08:46:28.720514 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 08:46:28.727175 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 08:46:28.737293 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 08:46:28.743884 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 08:46:28.747468 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 08:46:28.753455 microcode: Update skipped, already up-to-date
375 08:46:28.760294 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 08:46:28.787687 Detected 4 core, 8 thread CPU.
377 08:46:28.790721 Setting up SMI for CPU
378 08:46:28.793967 IED base = 0x7b400000
379 08:46:28.794044 IED size = 0x00400000
380 08:46:28.797590 Will perform SMM setup.
381 08:46:28.803889 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 08:46:28.810343 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 08:46:28.817497 Processing 16 relocs. Offset value of 0x00030000
384 08:46:28.820580 Attempting to start 7 APs
385 08:46:28.823576 Waiting for 10ms after sending INIT.
386 08:46:28.839297 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 08:46:28.843114 AP: slot 5 apic_id 6.
388 08:46:28.846063 AP: slot 4 apic_id 7.
389 08:46:28.846173 AP: slot 3 apic_id 5.
390 08:46:28.849655 AP: slot 7 apic_id 4.
391 08:46:28.852454 AP: slot 2 apic_id 3.
392 08:46:28.852564 AP: slot 6 apic_id 2.
393 08:46:28.852659 done.
394 08:46:28.859146 Waiting for 2nd SIPI to complete...done.
395 08:46:28.865894 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 08:46:28.872329 Processing 13 relocs. Offset value of 0x00038000
397 08:46:28.875815 Unable to locate Global NVS
398 08:46:28.882410 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 08:46:28.885818 Installing permanent SMM handler to 0x7b000000
400 08:46:28.895864 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 08:46:28.898874 Processing 794 relocs. Offset value of 0x7b010000
402 08:46:28.908837 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 08:46:28.912581 Processing 13 relocs. Offset value of 0x7b008000
404 08:46:28.918862 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 08:46:28.925261 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 08:46:28.928594 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 08:46:28.935299 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 08:46:28.942074 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 08:46:28.948998 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 08:46:28.955033 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 08:46:28.958848 Unable to locate Global NVS
412 08:46:28.965395 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 08:46:28.968875 Clearing SMI status registers
414 08:46:28.968983 SMI_STS: PM1
415 08:46:28.971980 PM1_STS: PWRBTN
416 08:46:28.978924 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 08:46:28.981817 In relocation handler: CPU 0
418 08:46:28.985060 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 08:46:28.991926 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 08:46:28.992032 Relocation complete.
421 08:46:29.002039 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 08:46:29.005028 In relocation handler: CPU 1
423 08:46:29.008306 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 08:46:29.008418 Relocation complete.
425 08:46:29.018246 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
426 08:46:29.018360 In relocation handler: CPU 7
427 08:46:29.025302 New SMBASE=0x7affe400 IEDBASE=0x7b400000
428 08:46:29.028178 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 08:46:29.031589 Relocation complete.
430 08:46:29.038501 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
431 08:46:29.041990 In relocation handler: CPU 3
432 08:46:29.044847 New SMBASE=0x7afff400 IEDBASE=0x7b400000
433 08:46:29.048422 Relocation complete.
434 08:46:29.055420 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 08:46:29.058554 In relocation handler: CPU 4
436 08:46:29.061621 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 08:46:29.065266 Relocation complete.
438 08:46:29.071815 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
439 08:46:29.075312 In relocation handler: CPU 2
440 08:46:29.078246 New SMBASE=0x7afff800 IEDBASE=0x7b400000
441 08:46:29.081877 Relocation complete.
442 08:46:29.088050 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
443 08:46:29.091862 In relocation handler: CPU 6
444 08:46:29.094741 New SMBASE=0x7affe800 IEDBASE=0x7b400000
445 08:46:29.098297 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 08:46:29.101915 Relocation complete.
447 08:46:29.108389 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
448 08:46:29.111777 In relocation handler: CPU 5
449 08:46:29.114977 New SMBASE=0x7affec00 IEDBASE=0x7b400000
450 08:46:29.121632 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 08:46:29.124919 Relocation complete.
452 08:46:29.125025 Initializing CPU #0
453 08:46:29.128397 CPU: vendor Intel device 806c1
454 08:46:29.131969 CPU: family 06, model 8c, stepping 01
455 08:46:29.135625 Clearing out pending MCEs
456 08:46:29.139106 Setting up local APIC...
457 08:46:29.139212 apic_id: 0x00 done.
458 08:46:29.142428 Turbo is available but hidden
459 08:46:29.145920 Turbo is available and visible
460 08:46:29.149406 microcode: Update skipped, already up-to-date
461 08:46:29.152841 CPU #0 initialized
462 08:46:29.156074 Initializing CPU #2
463 08:46:29.156193 Initializing CPU #6
464 08:46:29.159847 CPU: vendor Intel device 806c1
465 08:46:29.162903 CPU: family 06, model 8c, stepping 01
466 08:46:29.166482 CPU: vendor Intel device 806c1
467 08:46:29.169667 CPU: family 06, model 8c, stepping 01
468 08:46:29.172786 Clearing out pending MCEs
469 08:46:29.176385 Clearing out pending MCEs
470 08:46:29.179297 Setting up local APIC...
471 08:46:29.179403 Initializing CPU #5
472 08:46:29.182825 Initializing CPU #4
473 08:46:29.186074 CPU: vendor Intel device 806c1
474 08:46:29.189188 CPU: family 06, model 8c, stepping 01
475 08:46:29.192374 CPU: vendor Intel device 806c1
476 08:46:29.196217 CPU: family 06, model 8c, stepping 01
477 08:46:29.199056 Clearing out pending MCEs
478 08:46:29.202698 Clearing out pending MCEs
479 08:46:29.205747 Setting up local APIC...
480 08:46:29.205851 Initializing CPU #7
481 08:46:29.208928 apic_id: 0x06 done.
482 08:46:29.212393 Setting up local APIC...
483 08:46:29.212493 Initializing CPU #3
484 08:46:29.215852 CPU: vendor Intel device 806c1
485 08:46:29.219378 CPU: family 06, model 8c, stepping 01
486 08:46:29.225612 microcode: Update skipped, already up-to-date
487 08:46:29.225718 apic_id: 0x07 done.
488 08:46:29.229235 CPU #5 initialized
489 08:46:29.232530 Initializing CPU #1
490 08:46:29.232635 Setting up local APIC...
491 08:46:29.235984 Clearing out pending MCEs
492 08:46:29.239156 CPU: vendor Intel device 806c1
493 08:46:29.242382 CPU: family 06, model 8c, stepping 01
494 08:46:29.245902 Setting up local APIC...
495 08:46:29.248978 apic_id: 0x02 done.
496 08:46:29.249079 apic_id: 0x03 done.
497 08:46:29.255464 microcode: Update skipped, already up-to-date
498 08:46:29.258847 microcode: Update skipped, already up-to-date
499 08:46:29.262204 CPU #6 initialized
500 08:46:29.262314 CPU #2 initialized
501 08:46:29.268750 microcode: Update skipped, already up-to-date
502 08:46:29.268860 apic_id: 0x04 done.
503 08:46:29.272133 Clearing out pending MCEs
504 08:46:29.275401 microcode: Update skipped, already up-to-date
505 08:46:29.278965 Setting up local APIC...
506 08:46:29.282141 CPU #7 initialized
507 08:46:29.282240 apic_id: 0x05 done.
508 08:46:29.285834 CPU: vendor Intel device 806c1
509 08:46:29.292138 CPU: family 06, model 8c, stepping 01
510 08:46:29.292239 Clearing out pending MCEs
511 08:46:29.298531 microcode: Update skipped, already up-to-date
512 08:46:29.298634 CPU #4 initialized
513 08:46:29.302287 Setting up local APIC...
514 08:46:29.305152 CPU #3 initialized
515 08:46:29.305255 apic_id: 0x01 done.
516 08:46:29.312199 microcode: Update skipped, already up-to-date
517 08:46:29.312306 CPU #1 initialized
518 08:46:29.318574 bsp_do_flight_plan done after 455 msecs.
519 08:46:29.322023 CPU: frequency set to 4000 MHz
520 08:46:29.322127 Enabling SMIs.
521 08:46:29.328866 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 08:46:29.344632 SATAXPCIE1 indicates PCIe NVMe is present
523 08:46:29.347756 Probing TPM: done!
524 08:46:29.351380 Connected to device vid:did:rid of 1ae0:0028:00
525 08:46:29.361817 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
526 08:46:29.365044 Initialized TPM device CR50 revision 0
527 08:46:29.368644 Enabling S0i3.4
528 08:46:29.374926 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 08:46:29.378607 Found a VBT of 8704 bytes after decompression
530 08:46:29.385088 cse_lite: CSE RO boot. HybridStorageMode disabled
531 08:46:29.391669 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 08:46:29.467910 FSPS returned 0
533 08:46:29.471044 Executing Phase 1 of FspMultiPhaseSiInit
534 08:46:29.481559 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 08:46:29.484747 port C0 DISC req: usage 1 usb3 1 usb2 5
536 08:46:29.487510 Raw Buffer output 0 00000511
537 08:46:29.491275 Raw Buffer output 1 00000000
538 08:46:29.494873 pmc_send_ipc_cmd succeeded
539 08:46:29.501373 port C1 DISC req: usage 1 usb3 2 usb2 3
540 08:46:29.501482 Raw Buffer output 0 00000321
541 08:46:29.504968 Raw Buffer output 1 00000000
542 08:46:29.509319 pmc_send_ipc_cmd succeeded
543 08:46:29.514159 Detected 4 core, 8 thread CPU.
544 08:46:29.517218 Detected 4 core, 8 thread CPU.
545 08:46:29.751441 Display FSP Version Info HOB
546 08:46:29.754648 Reference Code - CPU = a.0.4c.31
547 08:46:29.758314 uCode Version = 0.0.0.86
548 08:46:29.761282 TXT ACM version = ff.ff.ff.ffff
549 08:46:29.764924 Reference Code - ME = a.0.4c.31
550 08:46:29.767989 MEBx version = 0.0.0.0
551 08:46:29.771544 ME Firmware Version = Consumer SKU
552 08:46:29.774536 Reference Code - PCH = a.0.4c.31
553 08:46:29.777946 PCH-CRID Status = Disabled
554 08:46:29.781817 PCH-CRID Original Value = ff.ff.ff.ffff
555 08:46:29.784701 PCH-CRID New Value = ff.ff.ff.ffff
556 08:46:29.787927 OPROM - RST - RAID = ff.ff.ff.ffff
557 08:46:29.791534 PCH Hsio Version = 4.0.0.0
558 08:46:29.794597 Reference Code - SA - System Agent = a.0.4c.31
559 08:46:29.797667 Reference Code - MRC = 2.0.0.1
560 08:46:29.801319 SA - PCIe Version = a.0.4c.31
561 08:46:29.804391 SA-CRID Status = Disabled
562 08:46:29.808048 SA-CRID Original Value = 0.0.0.1
563 08:46:29.811404 SA-CRID New Value = 0.0.0.1
564 08:46:29.814284 OPROM - VBIOS = ff.ff.ff.ffff
565 08:46:29.817965 IO Manageability Engine FW Version = 11.1.4.0
566 08:46:29.821104 PHY Build Version = 0.0.0.e0
567 08:46:29.824402 Thunderbolt(TM) FW Version = 0.0.0.0
568 08:46:29.831540 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 08:46:29.834504 ITSS IRQ Polarities Before:
570 08:46:29.834591 IPC0: 0xffffffff
571 08:46:29.838229 IPC1: 0xffffffff
572 08:46:29.838331 IPC2: 0xffffffff
573 08:46:29.841067 IPC3: 0xffffffff
574 08:46:29.844790 ITSS IRQ Polarities After:
575 08:46:29.844893 IPC0: 0xffffffff
576 08:46:29.848007 IPC1: 0xffffffff
577 08:46:29.848114 IPC2: 0xffffffff
578 08:46:29.851010 IPC3: 0xffffffff
579 08:46:29.854666 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 08:46:29.868448 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 08:46:29.877749 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 08:46:29.891155 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 08:46:29.897807 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
584 08:46:29.897924 Enumerating buses...
585 08:46:29.904493 Show all devs... Before device enumeration.
586 08:46:29.904597 Root Device: enabled 1
587 08:46:29.907610 DOMAIN: 0000: enabled 1
588 08:46:29.911127 CPU_CLUSTER: 0: enabled 1
589 08:46:29.914519 PCI: 00:00.0: enabled 1
590 08:46:29.914602 PCI: 00:02.0: enabled 1
591 08:46:29.918017 PCI: 00:04.0: enabled 1
592 08:46:29.921187 PCI: 00:05.0: enabled 1
593 08:46:29.924298 PCI: 00:06.0: enabled 0
594 08:46:29.924415 PCI: 00:07.0: enabled 0
595 08:46:29.927706 PCI: 00:07.1: enabled 0
596 08:46:29.931561 PCI: 00:07.2: enabled 0
597 08:46:29.934749 PCI: 00:07.3: enabled 0
598 08:46:29.934856 PCI: 00:08.0: enabled 1
599 08:46:29.937509 PCI: 00:09.0: enabled 0
600 08:46:29.940902 PCI: 00:0a.0: enabled 0
601 08:46:29.944507 PCI: 00:0d.0: enabled 1
602 08:46:29.944616 PCI: 00:0d.1: enabled 0
603 08:46:29.947681 PCI: 00:0d.2: enabled 0
604 08:46:29.951100 PCI: 00:0d.3: enabled 0
605 08:46:29.951204 PCI: 00:0e.0: enabled 0
606 08:46:29.954616 PCI: 00:10.2: enabled 1
607 08:46:29.957412 PCI: 00:10.6: enabled 0
608 08:46:29.961071 PCI: 00:10.7: enabled 0
609 08:46:29.961205 PCI: 00:12.0: enabled 0
610 08:46:29.964094 PCI: 00:12.6: enabled 0
611 08:46:29.968002 PCI: 00:13.0: enabled 0
612 08:46:29.970967 PCI: 00:14.0: enabled 1
613 08:46:29.971051 PCI: 00:14.1: enabled 0
614 08:46:29.974630 PCI: 00:14.2: enabled 1
615 08:46:29.977892 PCI: 00:14.3: enabled 1
616 08:46:29.980739 PCI: 00:15.0: enabled 1
617 08:46:29.980824 PCI: 00:15.1: enabled 1
618 08:46:29.984369 PCI: 00:15.2: enabled 1
619 08:46:29.988103 PCI: 00:15.3: enabled 1
620 08:46:29.988208 PCI: 00:16.0: enabled 1
621 08:46:29.990855 PCI: 00:16.1: enabled 0
622 08:46:29.994070 PCI: 00:16.2: enabled 0
623 08:46:29.997977 PCI: 00:16.3: enabled 0
624 08:46:29.998088 PCI: 00:16.4: enabled 0
625 08:46:30.000575 PCI: 00:16.5: enabled 0
626 08:46:30.004181 PCI: 00:17.0: enabled 1
627 08:46:30.007862 PCI: 00:19.0: enabled 0
628 08:46:30.007952 PCI: 00:19.1: enabled 1
629 08:46:30.010953 PCI: 00:19.2: enabled 0
630 08:46:30.014120 PCI: 00:1c.0: enabled 1
631 08:46:30.017684 PCI: 00:1c.1: enabled 0
632 08:46:30.017770 PCI: 00:1c.2: enabled 0
633 08:46:30.020835 PCI: 00:1c.3: enabled 0
634 08:46:30.024491 PCI: 00:1c.4: enabled 0
635 08:46:30.024564 PCI: 00:1c.5: enabled 0
636 08:46:30.027711 PCI: 00:1c.6: enabled 1
637 08:46:30.030681 PCI: 00:1c.7: enabled 0
638 08:46:30.034542 PCI: 00:1d.0: enabled 1
639 08:46:30.034613 PCI: 00:1d.1: enabled 0
640 08:46:30.037569 PCI: 00:1d.2: enabled 1
641 08:46:30.040585 PCI: 00:1d.3: enabled 0
642 08:46:30.044173 PCI: 00:1e.0: enabled 1
643 08:46:30.044282 PCI: 00:1e.1: enabled 0
644 08:46:30.047465 PCI: 00:1e.2: enabled 1
645 08:46:30.050934 PCI: 00:1e.3: enabled 1
646 08:46:30.054266 PCI: 00:1f.0: enabled 1
647 08:46:30.054378 PCI: 00:1f.1: enabled 0
648 08:46:30.057229 PCI: 00:1f.2: enabled 1
649 08:46:30.060886 PCI: 00:1f.3: enabled 1
650 08:46:30.064215 PCI: 00:1f.4: enabled 0
651 08:46:30.064315 PCI: 00:1f.5: enabled 1
652 08:46:30.067370 PCI: 00:1f.6: enabled 0
653 08:46:30.070446 PCI: 00:1f.7: enabled 0
654 08:46:30.070528 APIC: 00: enabled 1
655 08:46:30.074233 GENERIC: 0.0: enabled 1
656 08:46:30.077165 GENERIC: 0.0: enabled 1
657 08:46:30.081090 GENERIC: 1.0: enabled 1
658 08:46:30.081194 GENERIC: 0.0: enabled 1
659 08:46:30.084286 GENERIC: 1.0: enabled 1
660 08:46:30.087116 USB0 port 0: enabled 1
661 08:46:30.087199 GENERIC: 0.0: enabled 1
662 08:46:30.090877 USB0 port 0: enabled 1
663 08:46:30.093916 GENERIC: 0.0: enabled 1
664 08:46:30.097271 I2C: 00:1a: enabled 1
665 08:46:30.097354 I2C: 00:31: enabled 1
666 08:46:30.100660 I2C: 00:32: enabled 1
667 08:46:30.103807 I2C: 00:10: enabled 1
668 08:46:30.103890 I2C: 00:15: enabled 1
669 08:46:30.107333 GENERIC: 0.0: enabled 0
670 08:46:30.110549 GENERIC: 1.0: enabled 0
671 08:46:30.110648 GENERIC: 0.0: enabled 1
672 08:46:30.113985 SPI: 00: enabled 1
673 08:46:30.117676 SPI: 00: enabled 1
674 08:46:30.117758 PNP: 0c09.0: enabled 1
675 08:46:30.120768 GENERIC: 0.0: enabled 1
676 08:46:30.123752 USB3 port 0: enabled 1
677 08:46:30.123831 USB3 port 1: enabled 1
678 08:46:30.127586 USB3 port 2: enabled 0
679 08:46:30.130680 USB3 port 3: enabled 0
680 08:46:30.133733 USB2 port 0: enabled 0
681 08:46:30.133817 USB2 port 1: enabled 1
682 08:46:30.137428 USB2 port 2: enabled 1
683 08:46:30.140292 USB2 port 3: enabled 0
684 08:46:30.140376 USB2 port 4: enabled 1
685 08:46:30.143936 USB2 port 5: enabled 0
686 08:46:30.147281 USB2 port 6: enabled 0
687 08:46:30.150839 USB2 port 7: enabled 0
688 08:46:30.150940 USB2 port 8: enabled 0
689 08:46:30.154046 USB2 port 9: enabled 0
690 08:46:30.157287 USB3 port 0: enabled 0
691 08:46:30.157374 USB3 port 1: enabled 1
692 08:46:30.160481 USB3 port 2: enabled 0
693 08:46:30.164298 USB3 port 3: enabled 0
694 08:46:30.164477 GENERIC: 0.0: enabled 1
695 08:46:30.167022 GENERIC: 1.0: enabled 1
696 08:46:30.170926 APIC: 01: enabled 1
697 08:46:30.171009 APIC: 03: enabled 1
698 08:46:30.173958 APIC: 05: enabled 1
699 08:46:30.177168 APIC: 07: enabled 1
700 08:46:30.177259 APIC: 06: enabled 1
701 08:46:30.180105 APIC: 02: enabled 1
702 08:46:30.184065 APIC: 04: enabled 1
703 08:46:30.184147 Compare with tree...
704 08:46:30.187137 Root Device: enabled 1
705 08:46:30.190326 DOMAIN: 0000: enabled 1
706 08:46:30.190434 PCI: 00:00.0: enabled 1
707 08:46:30.194016 PCI: 00:02.0: enabled 1
708 08:46:30.197097 PCI: 00:04.0: enabled 1
709 08:46:30.200497 GENERIC: 0.0: enabled 1
710 08:46:30.203639 PCI: 00:05.0: enabled 1
711 08:46:30.203740 PCI: 00:06.0: enabled 0
712 08:46:30.207227 PCI: 00:07.0: enabled 0
713 08:46:30.210347 GENERIC: 0.0: enabled 1
714 08:46:30.213921 PCI: 00:07.1: enabled 0
715 08:46:30.216805 GENERIC: 1.0: enabled 1
716 08:46:30.219933 PCI: 00:07.2: enabled 0
717 08:46:30.220017 GENERIC: 0.0: enabled 1
718 08:46:30.223219 PCI: 00:07.3: enabled 0
719 08:46:30.226845 GENERIC: 1.0: enabled 1
720 08:46:30.230005 PCI: 00:08.0: enabled 1
721 08:46:30.233495 PCI: 00:09.0: enabled 0
722 08:46:30.233577 PCI: 00:0a.0: enabled 0
723 08:46:30.236577 PCI: 00:0d.0: enabled 1
724 08:46:30.240243 USB0 port 0: enabled 1
725 08:46:30.243312 USB3 port 0: enabled 1
726 08:46:30.247092 USB3 port 1: enabled 1
727 08:46:30.247177 USB3 port 2: enabled 0
728 08:46:30.250120 USB3 port 3: enabled 0
729 08:46:30.253308 PCI: 00:0d.1: enabled 0
730 08:46:30.257200 PCI: 00:0d.2: enabled 0
731 08:46:30.259765 GENERIC: 0.0: enabled 1
732 08:46:30.259846 PCI: 00:0d.3: enabled 0
733 08:46:30.263316 PCI: 00:0e.0: enabled 0
734 08:46:30.266424 PCI: 00:10.2: enabled 1
735 08:46:30.270174 PCI: 00:10.6: enabled 0
736 08:46:30.273182 PCI: 00:10.7: enabled 0
737 08:46:30.273295 PCI: 00:12.0: enabled 0
738 08:46:30.276740 PCI: 00:12.6: enabled 0
739 08:46:30.279984 PCI: 00:13.0: enabled 0
740 08:46:30.283138 PCI: 00:14.0: enabled 1
741 08:46:30.286261 USB0 port 0: enabled 1
742 08:46:30.286348 USB2 port 0: enabled 0
743 08:46:30.290075 USB2 port 1: enabled 1
744 08:46:30.293016 USB2 port 2: enabled 1
745 08:46:30.296558 USB2 port 3: enabled 0
746 08:46:30.299826 USB2 port 4: enabled 1
747 08:46:30.303354 USB2 port 5: enabled 0
748 08:46:30.303435 USB2 port 6: enabled 0
749 08:46:30.306548 USB2 port 7: enabled 0
750 08:46:30.309743 USB2 port 8: enabled 0
751 08:46:30.313205 USB2 port 9: enabled 0
752 08:46:30.316483 USB3 port 0: enabled 0
753 08:46:30.316562 USB3 port 1: enabled 1
754 08:46:30.319834 USB3 port 2: enabled 0
755 08:46:30.322867 USB3 port 3: enabled 0
756 08:46:30.326548 PCI: 00:14.1: enabled 0
757 08:46:30.329560 PCI: 00:14.2: enabled 1
758 08:46:30.333012 PCI: 00:14.3: enabled 1
759 08:46:30.333096 GENERIC: 0.0: enabled 1
760 08:46:30.336118 PCI: 00:15.0: enabled 1
761 08:46:30.339591 I2C: 00:1a: enabled 1
762 08:46:30.343292 I2C: 00:31: enabled 1
763 08:46:30.343393 I2C: 00:32: enabled 1
764 08:46:30.346125 PCI: 00:15.1: enabled 1
765 08:46:30.349684 I2C: 00:10: enabled 1
766 08:46:30.352984 PCI: 00:15.2: enabled 1
767 08:46:30.356548 PCI: 00:15.3: enabled 1
768 08:46:30.356690 PCI: 00:16.0: enabled 1
769 08:46:30.359788 PCI: 00:16.1: enabled 0
770 08:46:30.362752 PCI: 00:16.2: enabled 0
771 08:46:30.366602 PCI: 00:16.3: enabled 0
772 08:46:30.369634 PCI: 00:16.4: enabled 0
773 08:46:30.369711 PCI: 00:16.5: enabled 0
774 08:46:30.373447 PCI: 00:17.0: enabled 1
775 08:46:30.377450 PCI: 00:19.0: enabled 0
776 08:46:30.377549 PCI: 00:19.1: enabled 1
777 08:46:30.381022 I2C: 00:15: enabled 1
778 08:46:30.384757 PCI: 00:19.2: enabled 0
779 08:46:30.387902 PCI: 00:1d.0: enabled 1
780 08:46:30.388007 GENERIC: 0.0: enabled 1
781 08:46:30.391060 PCI: 00:1e.0: enabled 1
782 08:46:30.440903 PCI: 00:1e.1: enabled 0
783 08:46:30.441001 PCI: 00:1e.2: enabled 1
784 08:46:30.441370 SPI: 00: enabled 1
785 08:46:30.441467 PCI: 00:1e.3: enabled 1
786 08:46:30.441552 SPI: 00: enabled 1
787 08:46:30.441655 PCI: 00:1f.0: enabled 1
788 08:46:30.441714 PNP: 0c09.0: enabled 1
789 08:46:30.441802 PCI: 00:1f.1: enabled 0
790 08:46:30.441889 PCI: 00:1f.2: enabled 1
791 08:46:30.441978 GENERIC: 0.0: enabled 1
792 08:46:30.442066 GENERIC: 0.0: enabled 1
793 08:46:30.442151 GENERIC: 1.0: enabled 1
794 08:46:30.442226 PCI: 00:1f.3: enabled 1
795 08:46:30.442340 PCI: 00:1f.4: enabled 0
796 08:46:30.442453 PCI: 00:1f.5: enabled 1
797 08:46:30.442549 PCI: 00:1f.6: enabled 0
798 08:46:30.442631 PCI: 00:1f.7: enabled 0
799 08:46:30.442691 CPU_CLUSTER: 0: enabled 1
800 08:46:30.442757 APIC: 00: enabled 1
801 08:46:30.463115 APIC: 01: enabled 1
802 08:46:30.463213 APIC: 03: enabled 1
803 08:46:30.463291 APIC: 05: enabled 1
804 08:46:30.463538 APIC: 07: enabled 1
805 08:46:30.463602 APIC: 06: enabled 1
806 08:46:30.463661 APIC: 02: enabled 1
807 08:46:30.463718 APIC: 04: enabled 1
808 08:46:30.463773 Root Device scanning...
809 08:46:30.466630 scan_static_bus for Root Device
810 08:46:30.466713 DOMAIN: 0000 enabled
811 08:46:30.469807 CPU_CLUSTER: 0 enabled
812 08:46:30.469890 DOMAIN: 0000 scanning...
813 08:46:30.473742 PCI: pci_scan_bus for bus 00
814 08:46:30.476694 PCI: 00:00.0 [8086/0000] ops
815 08:46:30.479793 PCI: 00:00.0 [8086/9a12] enabled
816 08:46:30.483204 PCI: 00:02.0 [8086/0000] bus ops
817 08:46:30.486891 PCI: 00:02.0 [8086/9a40] enabled
818 08:46:30.490332 PCI: 00:04.0 [8086/0000] bus ops
819 08:46:30.493282 PCI: 00:04.0 [8086/9a03] enabled
820 08:46:30.496744 PCI: 00:05.0 [8086/9a19] enabled
821 08:46:30.499644 PCI: 00:07.0 [0000/0000] hidden
822 08:46:30.503355 PCI: 00:08.0 [8086/9a11] enabled
823 08:46:30.506374 PCI: 00:0a.0 [8086/9a0d] disabled
824 08:46:30.509948 PCI: 00:0d.0 [8086/0000] bus ops
825 08:46:30.513069 PCI: 00:0d.0 [8086/9a13] enabled
826 08:46:30.516769 PCI: 00:14.0 [8086/0000] bus ops
827 08:46:30.519995 PCI: 00:14.0 [8086/a0ed] enabled
828 08:46:30.523518 PCI: 00:14.2 [8086/a0ef] enabled
829 08:46:30.526519 PCI: 00:14.3 [8086/0000] bus ops
830 08:46:30.530063 PCI: 00:14.3 [8086/a0f0] enabled
831 08:46:30.533393 PCI: 00:15.0 [8086/0000] bus ops
832 08:46:30.537128 PCI: 00:15.0 [8086/a0e8] enabled
833 08:46:30.540029 PCI: 00:15.1 [8086/0000] bus ops
834 08:46:30.543269 PCI: 00:15.1 [8086/a0e9] enabled
835 08:46:30.546350 PCI: 00:15.2 [8086/0000] bus ops
836 08:46:30.550003 PCI: 00:15.2 [8086/a0ea] enabled
837 08:46:30.552985 PCI: 00:15.3 [8086/0000] bus ops
838 08:46:30.556729 PCI: 00:15.3 [8086/a0eb] enabled
839 08:46:30.559915 PCI: 00:16.0 [8086/0000] ops
840 08:46:30.563059 PCI: 00:16.0 [8086/a0e0] enabled
841 08:46:30.569765 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 08:46:30.572921 PCI: 00:19.0 [8086/0000] bus ops
843 08:46:30.576716 PCI: 00:19.0 [8086/a0c5] disabled
844 08:46:30.579900 PCI: 00:19.1 [8086/0000] bus ops
845 08:46:30.582971 PCI: 00:19.1 [8086/a0c6] enabled
846 08:46:30.586702 PCI: 00:1d.0 [8086/0000] bus ops
847 08:46:30.589750 PCI: 00:1d.0 [8086/a0b0] enabled
848 08:46:30.592983 PCI: 00:1e.0 [8086/0000] ops
849 08:46:30.596585 PCI: 00:1e.0 [8086/a0a8] enabled
850 08:46:30.599694 PCI: 00:1e.2 [8086/0000] bus ops
851 08:46:30.603407 PCI: 00:1e.2 [8086/a0aa] enabled
852 08:46:30.606349 PCI: 00:1e.3 [8086/0000] bus ops
853 08:46:30.609662 PCI: 00:1e.3 [8086/a0ab] enabled
854 08:46:30.612766 PCI: 00:1f.0 [8086/0000] bus ops
855 08:46:30.616089 PCI: 00:1f.0 [8086/a087] enabled
856 08:46:30.616189 RTC Init
857 08:46:30.619428 Set power on after power failure.
858 08:46:30.623156 Disabling Deep S3
859 08:46:30.623259 Disabling Deep S3
860 08:46:30.626382 Disabling Deep S4
861 08:46:30.629514 Disabling Deep S4
862 08:46:30.629616 Disabling Deep S5
863 08:46:30.633023 Disabling Deep S5
864 08:46:30.636039 PCI: 00:1f.2 [0000/0000] hidden
865 08:46:30.639596 PCI: 00:1f.3 [8086/0000] bus ops
866 08:46:30.643295 PCI: 00:1f.3 [8086/a0c8] enabled
867 08:46:30.646287 PCI: 00:1f.5 [8086/0000] bus ops
868 08:46:30.649430 PCI: 00:1f.5 [8086/a0a4] enabled
869 08:46:30.653238 PCI: Leftover static devices:
870 08:46:30.653323 PCI: 00:10.2
871 08:46:30.653405 PCI: 00:10.6
872 08:46:30.656312 PCI: 00:10.7
873 08:46:30.656420 PCI: 00:06.0
874 08:46:30.659542 PCI: 00:07.1
875 08:46:30.659624 PCI: 00:07.2
876 08:46:30.663196 PCI: 00:07.3
877 08:46:30.663278 PCI: 00:09.0
878 08:46:30.663355 PCI: 00:0d.1
879 08:46:30.666194 PCI: 00:0d.2
880 08:46:30.666301 PCI: 00:0d.3
881 08:46:30.669749 PCI: 00:0e.0
882 08:46:30.669830 PCI: 00:12.0
883 08:46:30.669895 PCI: 00:12.6
884 08:46:30.672810 PCI: 00:13.0
885 08:46:30.672893 PCI: 00:14.1
886 08:46:30.676430 PCI: 00:16.1
887 08:46:30.676512 PCI: 00:16.2
888 08:46:30.676578 PCI: 00:16.3
889 08:46:30.679430 PCI: 00:16.4
890 08:46:30.679511 PCI: 00:16.5
891 08:46:30.682672 PCI: 00:17.0
892 08:46:30.682754 PCI: 00:19.2
893 08:46:30.686238 PCI: 00:1e.1
894 08:46:30.686346 PCI: 00:1f.1
895 08:46:30.686468 PCI: 00:1f.4
896 08:46:30.689641 PCI: 00:1f.6
897 08:46:30.689723 PCI: 00:1f.7
898 08:46:30.692688 PCI: Check your devicetree.cb.
899 08:46:30.696202 PCI: 00:02.0 scanning...
900 08:46:30.699832 scan_generic_bus for PCI: 00:02.0
901 08:46:30.702746 scan_generic_bus for PCI: 00:02.0 done
902 08:46:30.709749 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 08:46:30.709832 PCI: 00:04.0 scanning...
904 08:46:30.712788 scan_generic_bus for PCI: 00:04.0
905 08:46:30.715951 GENERIC: 0.0 enabled
906 08:46:30.723025 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 08:46:30.726041 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 08:46:30.729940 PCI: 00:0d.0 scanning...
909 08:46:30.732858 scan_static_bus for PCI: 00:0d.0
910 08:46:30.736172 USB0 port 0 enabled
911 08:46:30.736252 USB0 port 0 scanning...
912 08:46:30.739742 scan_static_bus for USB0 port 0
913 08:46:30.743010 USB3 port 0 enabled
914 08:46:30.746546 USB3 port 1 enabled
915 08:46:30.746650 USB3 port 2 disabled
916 08:46:30.749391 USB3 port 3 disabled
917 08:46:30.753212 USB3 port 0 scanning...
918 08:46:30.756284 scan_static_bus for USB3 port 0
919 08:46:30.759552 scan_static_bus for USB3 port 0 done
920 08:46:30.763145 scan_bus: bus USB3 port 0 finished in 6 msecs
921 08:46:30.766267 USB3 port 1 scanning...
922 08:46:30.769829 scan_static_bus for USB3 port 1
923 08:46:30.773117 scan_static_bus for USB3 port 1 done
924 08:46:30.779422 scan_bus: bus USB3 port 1 finished in 6 msecs
925 08:46:30.783040 scan_static_bus for USB0 port 0 done
926 08:46:30.786511 scan_bus: bus USB0 port 0 finished in 43 msecs
927 08:46:30.789362 scan_static_bus for PCI: 00:0d.0 done
928 08:46:30.796290 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 08:46:30.796370 PCI: 00:14.0 scanning...
930 08:46:30.799299 scan_static_bus for PCI: 00:14.0
931 08:46:30.803221 USB0 port 0 enabled
932 08:46:30.806277 USB0 port 0 scanning...
933 08:46:30.809647 scan_static_bus for USB0 port 0
934 08:46:30.812962 USB2 port 0 disabled
935 08:46:30.813067 USB2 port 1 enabled
936 08:46:30.816204 USB2 port 2 enabled
937 08:46:30.816287 USB2 port 3 disabled
938 08:46:30.819328 USB2 port 4 enabled
939 08:46:30.822968 USB2 port 5 disabled
940 08:46:30.823049 USB2 port 6 disabled
941 08:46:30.826006 USB2 port 7 disabled
942 08:46:30.829725 USB2 port 8 disabled
943 08:46:30.829852 USB2 port 9 disabled
944 08:46:30.832673 USB3 port 0 disabled
945 08:46:30.836220 USB3 port 1 enabled
946 08:46:30.836328 USB3 port 2 disabled
947 08:46:30.839180 USB3 port 3 disabled
948 08:46:30.842717 USB2 port 1 scanning...
949 08:46:30.845644 scan_static_bus for USB2 port 1
950 08:46:30.849501 scan_static_bus for USB2 port 1 done
951 08:46:30.852874 scan_bus: bus USB2 port 1 finished in 6 msecs
952 08:46:30.856152 USB2 port 2 scanning...
953 08:46:30.859542 scan_static_bus for USB2 port 2
954 08:46:30.862503 scan_static_bus for USB2 port 2 done
955 08:46:30.865971 scan_bus: bus USB2 port 2 finished in 6 msecs
956 08:46:30.869211 USB2 port 4 scanning...
957 08:46:30.872765 scan_static_bus for USB2 port 4
958 08:46:30.875791 scan_static_bus for USB2 port 4 done
959 08:46:30.882724 scan_bus: bus USB2 port 4 finished in 6 msecs
960 08:46:30.882838 USB3 port 1 scanning...
961 08:46:30.885903 scan_static_bus for USB3 port 1
962 08:46:30.892285 scan_static_bus for USB3 port 1 done
963 08:46:30.895760 scan_bus: bus USB3 port 1 finished in 6 msecs
964 08:46:30.899302 scan_static_bus for USB0 port 0 done
965 08:46:30.902262 scan_bus: bus USB0 port 0 finished in 93 msecs
966 08:46:30.909016 scan_static_bus for PCI: 00:14.0 done
967 08:46:30.912150 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 08:46:30.915844 PCI: 00:14.3 scanning...
969 08:46:30.919130 scan_static_bus for PCI: 00:14.3
970 08:46:30.922273 GENERIC: 0.0 enabled
971 08:46:30.925837 scan_static_bus for PCI: 00:14.3 done
972 08:46:30.928788 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 08:46:30.932515 PCI: 00:15.0 scanning...
974 08:46:30.935586 scan_static_bus for PCI: 00:15.0
975 08:46:30.939295 I2C: 00:1a enabled
976 08:46:30.939371 I2C: 00:31 enabled
977 08:46:30.942505 I2C: 00:32 enabled
978 08:46:30.945377 scan_static_bus for PCI: 00:15.0 done
979 08:46:30.948992 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 08:46:30.952731 PCI: 00:15.1 scanning...
981 08:46:30.956470 scan_static_bus for PCI: 00:15.1
982 08:46:30.959512 I2C: 00:10 enabled
983 08:46:30.962557 scan_static_bus for PCI: 00:15.1 done
984 08:46:30.966055 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 08:46:30.969533 PCI: 00:15.2 scanning...
986 08:46:30.972763 scan_static_bus for PCI: 00:15.2
987 08:46:30.975775 scan_static_bus for PCI: 00:15.2 done
988 08:46:30.983042 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 08:46:30.983128 PCI: 00:15.3 scanning...
990 08:46:30.985895 scan_static_bus for PCI: 00:15.3
991 08:46:30.992554 scan_static_bus for PCI: 00:15.3 done
992 08:46:30.996238 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 08:46:30.999207 PCI: 00:19.1 scanning...
994 08:46:31.002846 scan_static_bus for PCI: 00:19.1
995 08:46:31.002930 I2C: 00:15 enabled
996 08:46:31.006013 scan_static_bus for PCI: 00:19.1 done
997 08:46:31.013065 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 08:46:31.016045 PCI: 00:1d.0 scanning...
999 08:46:31.019149 do_pci_scan_bridge for PCI: 00:1d.0
1000 08:46:31.023055 PCI: pci_scan_bus for bus 01
1001 08:46:31.025872 PCI: 01:00.0 [1c5c/174a] enabled
1002 08:46:31.025956 GENERIC: 0.0 enabled
1003 08:46:31.032976 Enabling Common Clock Configuration
1004 08:46:31.035866 L1 Sub-State supported from root port 29
1005 08:46:31.039671 L1 Sub-State Support = 0xf
1006 08:46:31.042813 CommonModeRestoreTime = 0x28
1007 08:46:31.045923 Power On Value = 0x16, Power On Scale = 0x0
1008 08:46:31.046006 ASPM: Enabled L1
1009 08:46:31.052538 PCIe: Max_Payload_Size adjusted to 128
1010 08:46:31.055869 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 08:46:31.058816 PCI: 00:1e.2 scanning...
1012 08:46:31.062034 scan_generic_bus for PCI: 00:1e.2
1013 08:46:31.062118 SPI: 00 enabled
1014 08:46:31.069288 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 08:46:31.075622 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 08:46:31.075706 PCI: 00:1e.3 scanning...
1017 08:46:31.082464 scan_generic_bus for PCI: 00:1e.3
1018 08:46:31.082550 SPI: 00 enabled
1019 08:46:31.088661 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 08:46:31.092003 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 08:46:31.095504 PCI: 00:1f.0 scanning...
1022 08:46:31.098782 scan_static_bus for PCI: 00:1f.0
1023 08:46:31.102324 PNP: 0c09.0 enabled
1024 08:46:31.102431 PNP: 0c09.0 scanning...
1025 08:46:31.105642 scan_static_bus for PNP: 0c09.0
1026 08:46:31.112687 scan_static_bus for PNP: 0c09.0 done
1027 08:46:31.115740 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 08:46:31.118763 scan_static_bus for PCI: 00:1f.0 done
1029 08:46:31.125740 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 08:46:31.125857 PCI: 00:1f.2 scanning...
1031 08:46:31.128780 scan_static_bus for PCI: 00:1f.2
1032 08:46:31.132535 GENERIC: 0.0 enabled
1033 08:46:31.135566 GENERIC: 0.0 scanning...
1034 08:46:31.138677 scan_static_bus for GENERIC: 0.0
1035 08:46:31.142421 GENERIC: 0.0 enabled
1036 08:46:31.142516 GENERIC: 1.0 enabled
1037 08:46:31.145572 scan_static_bus for GENERIC: 0.0 done
1038 08:46:31.152044 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 08:46:31.155727 scan_static_bus for PCI: 00:1f.2 done
1040 08:46:31.158827 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 08:46:31.162201 PCI: 00:1f.3 scanning...
1042 08:46:31.165690 scan_static_bus for PCI: 00:1f.3
1043 08:46:31.169012 scan_static_bus for PCI: 00:1f.3 done
1044 08:46:31.175563 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 08:46:31.178632 PCI: 00:1f.5 scanning...
1046 08:46:31.181748 scan_generic_bus for PCI: 00:1f.5
1047 08:46:31.185504 scan_generic_bus for PCI: 00:1f.5 done
1048 08:46:31.188583 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 08:46:31.195325 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 08:46:31.198369 scan_static_bus for Root Device done
1051 08:46:31.202158 scan_bus: bus Root Device finished in 737 msecs
1052 08:46:31.205085 done
1053 08:46:31.208756 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 08:46:31.212013 Chrome EC: UHEPI supported
1055 08:46:31.218552 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 08:46:31.224914 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 08:46:31.228577 SPI flash protection: WPSW=0 SRP0=0
1058 08:46:31.235068 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 08:46:31.238346 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 08:46:31.241988 found VGA at PCI: 00:02.0
1061 08:46:31.244971 Setting up VGA for PCI: 00:02.0
1062 08:46:31.252035 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 08:46:31.255273 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 08:46:31.258320 Allocating resources...
1065 08:46:31.261600 Reading resources...
1066 08:46:31.265099 Root Device read_resources bus 0 link: 0
1067 08:46:31.268087 DOMAIN: 0000 read_resources bus 0 link: 0
1068 08:46:31.274577 PCI: 00:04.0 read_resources bus 1 link: 0
1069 08:46:31.277901 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 08:46:31.284710 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 08:46:31.287965 USB0 port 0 read_resources bus 0 link: 0
1072 08:46:31.294738 USB0 port 0 read_resources bus 0 link: 0 done
1073 08:46:31.298568 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 08:46:31.301493 PCI: 00:14.0 read_resources bus 0 link: 0
1075 08:46:31.308273 USB0 port 0 read_resources bus 0 link: 0
1076 08:46:31.311416 USB0 port 0 read_resources bus 0 link: 0 done
1077 08:46:31.318218 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 08:46:31.321224 PCI: 00:14.3 read_resources bus 0 link: 0
1079 08:46:31.328318 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 08:46:31.331631 PCI: 00:15.0 read_resources bus 0 link: 0
1081 08:46:31.338659 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 08:46:31.341606 PCI: 00:15.1 read_resources bus 0 link: 0
1083 08:46:31.348311 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 08:46:31.351605 PCI: 00:19.1 read_resources bus 0 link: 0
1085 08:46:31.358770 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 08:46:31.361931 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 08:46:31.369037 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 08:46:31.371951 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 08:46:31.378739 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 08:46:31.381954 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 08:46:31.388227 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 08:46:31.392157 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 08:46:31.398429 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 08:46:31.401751 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 08:46:31.405202 GENERIC: 0.0 read_resources bus 0 link: 0
1096 08:46:31.412594 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 08:46:31.415562 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 08:46:31.422932 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 08:46:31.426050 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 08:46:31.432761 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 08:46:31.435893 Root Device read_resources bus 0 link: 0 done
1102 08:46:31.439594 Done reading resources.
1103 08:46:31.446191 Show resources in subtree (Root Device)...After reading.
1104 08:46:31.449894 Root Device child on link 0 DOMAIN: 0000
1105 08:46:31.452872 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 08:46:31.463021 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 08:46:31.472552 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 08:46:31.476136 PCI: 00:00.0
1109 08:46:31.486223 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 08:46:31.492346 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 08:46:31.502560 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 08:46:31.512778 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 08:46:31.522837 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 08:46:31.532665 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 08:46:31.538957 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 08:46:31.549032 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 08:46:31.558924 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 08:46:31.568837 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 08:46:31.578771 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 08:46:31.588669 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 08:46:31.595965 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 08:46:31.605447 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 08:46:31.615119 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 08:46:31.625795 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 08:46:31.635290 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 08:46:31.645005 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 08:46:31.651581 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 08:46:31.661426 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 08:46:31.665008 PCI: 00:02.0
1130 08:46:31.675029 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 08:46:31.684861 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 08:46:31.694948 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 08:46:31.698348 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 08:46:31.708495 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 08:46:31.711449 GENERIC: 0.0
1136 08:46:31.711558 PCI: 00:05.0
1137 08:46:31.721302 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 08:46:31.725056 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 08:46:31.728125 GENERIC: 0.0
1140 08:46:31.731922 PCI: 00:08.0
1141 08:46:31.741657 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 08:46:31.741749 PCI: 00:0a.0
1143 08:46:31.744850 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 08:46:31.754974 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 08:46:31.761866 USB0 port 0 child on link 0 USB3 port 0
1146 08:46:31.761990 USB3 port 0
1147 08:46:31.764942 USB3 port 1
1148 08:46:31.765050 USB3 port 2
1149 08:46:31.767949 USB3 port 3
1150 08:46:31.771105 PCI: 00:14.0 child on link 0 USB0 port 0
1151 08:46:31.781179 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 08:46:31.784794 USB0 port 0 child on link 0 USB2 port 0
1153 08:46:31.788342 USB2 port 0
1154 08:46:31.791333 USB2 port 1
1155 08:46:31.791404 USB2 port 2
1156 08:46:31.794552 USB2 port 3
1157 08:46:31.794641 USB2 port 4
1158 08:46:31.797957 USB2 port 5
1159 08:46:31.798057 USB2 port 6
1160 08:46:31.801214 USB2 port 7
1161 08:46:31.801316 USB2 port 8
1162 08:46:31.804411 USB2 port 9
1163 08:46:31.804513 USB3 port 0
1164 08:46:31.807883 USB3 port 1
1165 08:46:31.807956 USB3 port 2
1166 08:46:31.811338 USB3 port 3
1167 08:46:31.811435 PCI: 00:14.2
1168 08:46:31.820953 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 08:46:31.831303 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 08:46:31.837601 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 08:46:31.848092 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 08:46:31.848195 GENERIC: 0.0
1173 08:46:31.854248 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 08:46:31.864624 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 08:46:31.864739 I2C: 00:1a
1176 08:46:31.867826 I2C: 00:31
1177 08:46:31.867925 I2C: 00:32
1178 08:46:31.870944 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 08:46:31.880974 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 08:46:31.884215 I2C: 00:10
1181 08:46:31.884292 PCI: 00:15.2
1182 08:46:31.894212 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 08:46:31.897708 PCI: 00:15.3
1184 08:46:31.907119 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 08:46:31.907230 PCI: 00:16.0
1186 08:46:31.917124 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 08:46:31.920827 PCI: 00:19.0
1188 08:46:31.923834 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 08:46:31.933785 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 08:46:31.937117 I2C: 00:15
1191 08:46:31.940284 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 08:46:31.950553 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 08:46:31.960197 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 08:46:31.967306 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 08:46:31.970355 GENERIC: 0.0
1196 08:46:31.970505 PCI: 01:00.0
1197 08:46:31.980329 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 08:46:31.989978 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 08:46:32.000075 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 08:46:32.000188 PCI: 00:1e.0
1201 08:46:32.013171 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 08:46:32.016844 PCI: 00:1e.2 child on link 0 SPI: 00
1203 08:46:32.026683 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 08:46:32.026765 SPI: 00
1205 08:46:32.033503 PCI: 00:1e.3 child on link 0 SPI: 00
1206 08:46:32.043218 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 08:46:32.043329 SPI: 00
1208 08:46:32.046808 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 08:46:32.056732 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 08:46:32.056838 PNP: 0c09.0
1211 08:46:32.066267 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 08:46:32.069722 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 08:46:32.079545 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 08:46:32.089536 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 08:46:32.093224 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 08:46:32.096603 GENERIC: 0.0
1217 08:46:32.099568 GENERIC: 1.0
1218 08:46:32.099670 PCI: 00:1f.3
1219 08:46:32.109609 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 08:46:32.119712 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 08:46:32.122841 PCI: 00:1f.5
1222 08:46:32.129797 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 08:46:32.136101 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 08:46:32.136186 APIC: 00
1225 08:46:32.136272 APIC: 01
1226 08:46:32.139658 APIC: 03
1227 08:46:32.139736 APIC: 05
1228 08:46:32.142826 APIC: 07
1229 08:46:32.142927 APIC: 06
1230 08:46:32.143008 APIC: 02
1231 08:46:32.146604 APIC: 04
1232 08:46:32.153217 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 08:46:32.159601 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 08:46:32.166503 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 08:46:32.169177 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 08:46:32.175854 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 08:46:32.179418 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 08:46:32.182551 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 08:46:32.189388 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 08:46:32.199442 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 08:46:32.206211 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 08:46:32.212327 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 08:46:32.218932 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 08:46:32.225718 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 08:46:32.235646 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 08:46:32.242234 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 08:46:32.245460 DOMAIN: 0000: Resource ranges:
1248 08:46:32.248980 * Base: 1000, Size: 800, Tag: 100
1249 08:46:32.252184 * Base: 1900, Size: e700, Tag: 100
1250 08:46:32.259037 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 08:46:32.265831 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 08:46:32.272566 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 08:46:32.279441 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 08:46:32.285430 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 08:46:32.295451 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 08:46:32.302278 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 08:46:32.309238 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 08:46:32.318718 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 08:46:32.325298 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 08:46:32.332098 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 08:46:32.339159 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 08:46:32.349050 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 08:46:32.355253 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 08:46:32.362272 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 08:46:32.371737 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 08:46:32.378929 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 08:46:32.385415 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 08:46:32.395095 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 08:46:32.401460 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 08:46:32.408091 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 08:46:32.418445 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 08:46:32.425183 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 08:46:32.431573 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 08:46:32.441706 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 08:46:32.444717 DOMAIN: 0000: Resource ranges:
1276 08:46:32.448512 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 08:46:32.451648 * Base: d0000000, Size: 28000000, Tag: 200
1278 08:46:32.458561 * Base: fa000000, Size: 1000000, Tag: 200
1279 08:46:32.461726 * Base: fb001000, Size: 2fff000, Tag: 200
1280 08:46:32.464665 * Base: fe010000, Size: 2e000, Tag: 200
1281 08:46:32.468237 * Base: fe03f000, Size: d41000, Tag: 200
1282 08:46:32.474987 * Base: fed88000, Size: 8000, Tag: 200
1283 08:46:32.477973 * Base: fed93000, Size: d000, Tag: 200
1284 08:46:32.481817 * Base: feda2000, Size: 1e000, Tag: 200
1285 08:46:32.484616 * Base: fede0000, Size: 1220000, Tag: 200
1286 08:46:32.491551 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 08:46:32.498208 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 08:46:32.504528 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 08:46:32.511048 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 08:46:32.517655 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 08:46:32.524508 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 08:46:32.531317 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 08:46:32.537988 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 08:46:32.544876 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 08:46:32.550904 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 08:46:32.557775 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 08:46:32.564268 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 08:46:32.571055 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 08:46:32.577603 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 08:46:32.584573 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 08:46:32.591152 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 08:46:32.597917 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 08:46:32.604660 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 08:46:32.611182 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 08:46:32.617365 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 08:46:32.623953 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 08:46:32.630577 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 08:46:32.637269 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 08:46:32.644169 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 08:46:32.653938 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 08:46:32.657242 PCI: 00:1d.0: Resource ranges:
1312 08:46:32.660394 * Base: 7fc00000, Size: 100000, Tag: 200
1313 08:46:32.667016 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 08:46:32.673823 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 08:46:32.680557 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 08:46:32.687278 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 08:46:32.696826 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 08:46:32.700157 Root Device assign_resources, bus 0 link: 0
1319 08:46:32.703719 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 08:46:32.713218 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 08:46:32.719972 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 08:46:32.730000 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 08:46:32.736600 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 08:46:32.743208 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 08:46:32.746519 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 08:46:32.753311 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 08:46:32.763412 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 08:46:32.770252 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 08:46:32.776995 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 08:46:32.780055 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 08:46:32.789777 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 08:46:32.793747 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 08:46:32.796606 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 08:46:32.806388 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 08:46:32.813539 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 08:46:32.823103 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 08:46:32.826963 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 08:46:32.832849 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 08:46:32.839632 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 08:46:32.843088 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 08:46:32.849723 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 08:46:32.856630 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 08:46:32.862900 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 08:46:32.866076 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 08:46:32.876079 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 08:46:32.882759 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 08:46:32.892598 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 08:46:32.899336 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 08:46:32.902798 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 08:46:32.909437 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 08:46:32.916032 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 08:46:32.925957 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 08:46:32.936139 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 08:46:32.939203 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 08:46:32.949215 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 08:46:32.955615 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 08:46:32.965779 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 08:46:32.968868 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 08:46:32.979053 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 08:46:32.982163 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 08:46:32.985856 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 08:46:32.996022 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 08:46:32.999589 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 08:46:33.005601 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 08:46:33.009055 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 08:46:33.015693 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 08:46:33.018973 LPC: Trying to open IO window from 800 size 1ff
1368 08:46:33.028651 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 08:46:33.035385 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 08:46:33.041831 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 08:46:33.048510 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 08:46:33.052099 Root Device assign_resources, bus 0 link: 0
1373 08:46:33.055194 Done setting resources.
1374 08:46:33.062019 Show resources in subtree (Root Device)...After assigning values.
1375 08:46:33.064975 Root Device child on link 0 DOMAIN: 0000
1376 08:46:33.072091 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 08:46:33.078122 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 08:46:33.088386 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 08:46:33.091416 PCI: 00:00.0
1380 08:46:33.101878 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 08:46:33.111625 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 08:46:33.117907 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 08:46:33.128295 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 08:46:33.137992 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 08:46:33.147920 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 08:46:33.157930 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 08:46:33.167947 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 08:46:33.174539 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 08:46:33.184472 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 08:46:33.194528 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 08:46:33.204396 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 08:46:33.214305 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 08:46:33.220987 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 08:46:33.231158 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 08:46:33.241201 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 08:46:33.250744 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 08:46:33.260579 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 08:46:33.270935 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 08:46:33.280845 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 08:46:33.280934 PCI: 00:02.0
1401 08:46:33.290310 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 08:46:33.303774 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 08:46:33.310376 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 08:46:33.317358 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 08:46:33.327328 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 08:46:33.327423 GENERIC: 0.0
1407 08:46:33.330422 PCI: 00:05.0
1408 08:46:33.340345 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 08:46:33.343820 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 08:46:33.346783 GENERIC: 0.0
1411 08:46:33.346864 PCI: 00:08.0
1412 08:46:33.360433 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 08:46:33.360545 PCI: 00:0a.0
1414 08:46:33.363883 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 08:46:33.376603 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 08:46:33.380094 USB0 port 0 child on link 0 USB3 port 0
1417 08:46:33.380217 USB3 port 0
1418 08:46:33.383725 USB3 port 1
1419 08:46:33.383803 USB3 port 2
1420 08:46:33.386939 USB3 port 3
1421 08:46:33.389909 PCI: 00:14.0 child on link 0 USB0 port 0
1422 08:46:33.400321 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 08:46:33.407028 USB0 port 0 child on link 0 USB2 port 0
1424 08:46:33.407139 USB2 port 0
1425 08:46:33.410084 USB2 port 1
1426 08:46:33.410188 USB2 port 2
1427 08:46:33.413315 USB2 port 3
1428 08:46:33.413415 USB2 port 4
1429 08:46:33.417061 USB2 port 5
1430 08:46:33.419940 USB2 port 6
1431 08:46:33.420048 USB2 port 7
1432 08:46:33.423973 USB2 port 8
1433 08:46:33.424072 USB2 port 9
1434 08:46:33.426924 USB3 port 0
1435 08:46:33.427029 USB3 port 1
1436 08:46:33.430005 USB3 port 2
1437 08:46:33.430106 USB3 port 3
1438 08:46:33.433678 PCI: 00:14.2
1439 08:46:33.443552 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 08:46:33.453284 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 08:46:33.456674 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 08:46:33.466418 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 08:46:33.469963 GENERIC: 0.0
1444 08:46:33.473058 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 08:46:33.482860 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 08:46:33.486737 I2C: 00:1a
1447 08:46:33.486823 I2C: 00:31
1448 08:46:33.489632 I2C: 00:32
1449 08:46:33.492967 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 08:46:33.502715 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 08:46:33.506593 I2C: 00:10
1452 08:46:33.506694 PCI: 00:15.2
1453 08:46:33.516279 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 08:46:33.519506 PCI: 00:15.3
1455 08:46:33.529228 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 08:46:33.529350 PCI: 00:16.0
1457 08:46:33.542949 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 08:46:33.543030 PCI: 00:19.0
1459 08:46:33.546197 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 08:46:33.556092 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 08:46:33.559263 I2C: 00:15
1462 08:46:33.562514 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 08:46:33.572600 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 08:46:33.585733 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 08:46:33.596053 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 08:46:33.596140 GENERIC: 0.0
1467 08:46:33.599050 PCI: 01:00.0
1468 08:46:33.609245 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 08:46:33.618833 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 08:46:33.628917 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 08:46:33.632248 PCI: 00:1e.0
1472 08:46:33.642103 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 08:46:33.645839 PCI: 00:1e.2 child on link 0 SPI: 00
1474 08:46:33.655244 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 08:46:33.658637 SPI: 00
1476 08:46:33.662466 PCI: 00:1e.3 child on link 0 SPI: 00
1477 08:46:33.671895 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 08:46:33.675304 SPI: 00
1479 08:46:33.678924 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 08:46:33.685774 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 08:46:33.688721 PNP: 0c09.0
1482 08:46:33.698720 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 08:46:33.702016 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 08:46:33.712283 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 08:46:33.721890 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 08:46:33.725193 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 08:46:33.728812 GENERIC: 0.0
1488 08:46:33.728951 GENERIC: 1.0
1489 08:46:33.732136 PCI: 00:1f.3
1490 08:46:33.742022 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 08:46:33.752126 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 08:46:33.752207 PCI: 00:1f.5
1493 08:46:33.761595 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 08:46:33.768605 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 08:46:33.768686 APIC: 00
1496 08:46:33.772295 APIC: 01
1497 08:46:33.772382 APIC: 03
1498 08:46:33.772465 APIC: 05
1499 08:46:33.775157 APIC: 07
1500 08:46:33.775236 APIC: 06
1501 08:46:33.775325 APIC: 02
1502 08:46:33.778312 APIC: 04
1503 08:46:33.781865 Done allocating resources.
1504 08:46:33.788880 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 08:46:33.791694 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 08:46:33.794782 Configure GPIOs for I2S audio on UP4.
1507 08:46:33.803208 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 08:46:33.806685 Enabling resources...
1509 08:46:33.809949 PCI: 00:00.0 subsystem <- 8086/9a12
1510 08:46:33.813164 PCI: 00:00.0 cmd <- 06
1511 08:46:33.816548 PCI: 00:02.0 subsystem <- 8086/9a40
1512 08:46:33.819560 PCI: 00:02.0 cmd <- 03
1513 08:46:33.823099 PCI: 00:04.0 subsystem <- 8086/9a03
1514 08:46:33.823231 PCI: 00:04.0 cmd <- 02
1515 08:46:33.829735 PCI: 00:05.0 subsystem <- 8086/9a19
1516 08:46:33.829846 PCI: 00:05.0 cmd <- 02
1517 08:46:33.833070 PCI: 00:08.0 subsystem <- 8086/9a11
1518 08:46:33.836949 PCI: 00:08.0 cmd <- 06
1519 08:46:33.839753 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 08:46:33.843271 PCI: 00:0d.0 cmd <- 02
1521 08:46:33.846940 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 08:46:33.850004 PCI: 00:14.0 cmd <- 02
1523 08:46:33.853407 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 08:46:33.856622 PCI: 00:14.2 cmd <- 02
1525 08:46:33.859781 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 08:46:33.863564 PCI: 00:14.3 cmd <- 02
1527 08:46:33.866352 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 08:46:33.869564 PCI: 00:15.0 cmd <- 02
1529 08:46:33.872825 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 08:46:33.872907 PCI: 00:15.1 cmd <- 02
1531 08:46:33.879532 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 08:46:33.879615 PCI: 00:15.2 cmd <- 02
1533 08:46:33.883324 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 08:46:33.886147 PCI: 00:15.3 cmd <- 02
1535 08:46:33.889883 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 08:46:33.893030 PCI: 00:16.0 cmd <- 02
1537 08:46:33.896578 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 08:46:33.899841 PCI: 00:19.1 cmd <- 02
1539 08:46:33.903051 PCI: 00:1d.0 bridge ctrl <- 0013
1540 08:46:33.906674 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 08:46:33.909669 PCI: 00:1d.0 cmd <- 06
1542 08:46:33.913243 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 08:46:33.916499 PCI: 00:1e.0 cmd <- 06
1544 08:46:33.919723 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 08:46:33.919797 PCI: 00:1e.2 cmd <- 06
1546 08:46:33.926655 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 08:46:33.926755 PCI: 00:1e.3 cmd <- 02
1548 08:46:33.929709 PCI: 00:1f.0 subsystem <- 8086/a087
1549 08:46:33.933351 PCI: 00:1f.0 cmd <- 407
1550 08:46:33.936561 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 08:46:33.939865 PCI: 00:1f.3 cmd <- 02
1552 08:46:33.942790 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 08:46:33.945928 PCI: 00:1f.5 cmd <- 406
1554 08:46:33.950264 PCI: 01:00.0 cmd <- 02
1555 08:46:33.954848 done.
1556 08:46:33.958281 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 08:46:33.962079 Initializing devices...
1558 08:46:33.965129 Root Device init
1559 08:46:33.968237 Chrome EC: Set SMI mask to 0x0000000000000000
1560 08:46:33.975210 Chrome EC: clear events_b mask to 0x0000000000000000
1561 08:46:33.981579 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 08:46:33.988031 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 08:46:33.991236 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 08:46:33.998662 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 08:46:34.005257 fw_config match found: DB_USB=USB3_ACTIVE
1566 08:46:34.008415 Configure Right Type-C port orientation for retimer
1567 08:46:34.011554 Root Device init finished in 45 msecs
1568 08:46:34.015792 PCI: 00:00.0 init
1569 08:46:34.018960 CPU TDP = 9 Watts
1570 08:46:34.019042 CPU PL1 = 9 Watts
1571 08:46:34.022275 CPU PL2 = 40 Watts
1572 08:46:34.025581 CPU PL4 = 83 Watts
1573 08:46:34.029029 PCI: 00:00.0 init finished in 8 msecs
1574 08:46:34.029110 PCI: 00:02.0 init
1575 08:46:34.031991 GMA: Found VBT in CBFS
1576 08:46:34.035577 GMA: Found valid VBT in CBFS
1577 08:46:34.042300 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 08:46:34.048576 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 08:46:34.052139 PCI: 00:02.0 init finished in 18 msecs
1580 08:46:34.055514 PCI: 00:05.0 init
1581 08:46:34.058539 PCI: 00:05.0 init finished in 0 msecs
1582 08:46:34.061954 PCI: 00:08.0 init
1583 08:46:34.065189 PCI: 00:08.0 init finished in 0 msecs
1584 08:46:34.068693 PCI: 00:14.0 init
1585 08:46:34.072084 PCI: 00:14.0 init finished in 0 msecs
1586 08:46:34.075400 PCI: 00:14.2 init
1587 08:46:34.078407 PCI: 00:14.2 init finished in 0 msecs
1588 08:46:34.082229 PCI: 00:15.0 init
1589 08:46:34.082306 I2C bus 0 version 0x3230302a
1590 08:46:34.088388 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 08:46:34.092030 PCI: 00:15.0 init finished in 6 msecs
1592 08:46:34.092136 PCI: 00:15.1 init
1593 08:46:34.095141 I2C bus 1 version 0x3230302a
1594 08:46:34.098827 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 08:46:34.104893 PCI: 00:15.1 init finished in 6 msecs
1596 08:46:34.105022 PCI: 00:15.2 init
1597 08:46:34.108705 I2C bus 2 version 0x3230302a
1598 08:46:34.111701 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 08:46:34.114950 PCI: 00:15.2 init finished in 6 msecs
1600 08:46:34.118105 PCI: 00:15.3 init
1601 08:46:34.121522 I2C bus 3 version 0x3230302a
1602 08:46:34.124785 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 08:46:34.128312 PCI: 00:15.3 init finished in 6 msecs
1604 08:46:34.131466 PCI: 00:16.0 init
1605 08:46:34.135121 PCI: 00:16.0 init finished in 0 msecs
1606 08:46:34.138053 PCI: 00:19.1 init
1607 08:46:34.141690 I2C bus 5 version 0x3230302a
1608 08:46:34.144698 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 08:46:34.148330 PCI: 00:19.1 init finished in 6 msecs
1610 08:46:34.151404 PCI: 00:1d.0 init
1611 08:46:34.154641 Initializing PCH PCIe bridge.
1612 08:46:34.158197 PCI: 00:1d.0 init finished in 3 msecs
1613 08:46:34.161633 PCI: 00:1f.0 init
1614 08:46:34.164465 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 08:46:34.168170 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 08:46:34.171127 IOAPIC: ID = 0x02
1617 08:46:34.174606 IOAPIC: Dumping registers
1618 08:46:34.174700 reg 0x0000: 0x02000000
1619 08:46:34.177978 reg 0x0001: 0x00770020
1620 08:46:34.180999 reg 0x0002: 0x00000000
1621 08:46:34.184546 PCI: 00:1f.0 init finished in 21 msecs
1622 08:46:34.187811 PCI: 00:1f.2 init
1623 08:46:34.191528 Disabling ACPI via APMC.
1624 08:46:34.191631 APMC done.
1625 08:46:34.198147 PCI: 00:1f.2 init finished in 5 msecs
1626 08:46:34.208259 PCI: 01:00.0 init
1627 08:46:34.211857 PCI: 01:00.0 init finished in 0 msecs
1628 08:46:34.214886 PNP: 0c09.0 init
1629 08:46:34.218632 Google Chrome EC uptime: 8.399 seconds
1630 08:46:34.225534 Google Chrome AP resets since EC boot: 1
1631 08:46:34.228680 Google Chrome most recent AP reset causes:
1632 08:46:34.231882 0.348: 32775 shutdown: entering G3
1633 08:46:34.238264 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 08:46:34.241860 PNP: 0c09.0 init finished in 22 msecs
1635 08:46:34.247585 Devices initialized
1636 08:46:34.250856 Show all devs... After init.
1637 08:46:34.253839 Root Device: enabled 1
1638 08:46:34.253921 DOMAIN: 0000: enabled 1
1639 08:46:34.256993 CPU_CLUSTER: 0: enabled 1
1640 08:46:34.260504 PCI: 00:00.0: enabled 1
1641 08:46:34.263813 PCI: 00:02.0: enabled 1
1642 08:46:34.263896 PCI: 00:04.0: enabled 1
1643 08:46:34.267501 PCI: 00:05.0: enabled 1
1644 08:46:34.270569 PCI: 00:06.0: enabled 0
1645 08:46:34.274052 PCI: 00:07.0: enabled 0
1646 08:46:34.274134 PCI: 00:07.1: enabled 0
1647 08:46:34.277023 PCI: 00:07.2: enabled 0
1648 08:46:34.280726 PCI: 00:07.3: enabled 0
1649 08:46:34.283746 PCI: 00:08.0: enabled 1
1650 08:46:34.283835 PCI: 00:09.0: enabled 0
1651 08:46:34.287682 PCI: 00:0a.0: enabled 0
1652 08:46:34.290546 PCI: 00:0d.0: enabled 1
1653 08:46:34.293917 PCI: 00:0d.1: enabled 0
1654 08:46:34.294005 PCI: 00:0d.2: enabled 0
1655 08:46:34.297033 PCI: 00:0d.3: enabled 0
1656 08:46:34.300545 PCI: 00:0e.0: enabled 0
1657 08:46:34.300657 PCI: 00:10.2: enabled 1
1658 08:46:34.303677 PCI: 00:10.6: enabled 0
1659 08:46:34.306907 PCI: 00:10.7: enabled 0
1660 08:46:34.310535 PCI: 00:12.0: enabled 0
1661 08:46:34.310609 PCI: 00:12.6: enabled 0
1662 08:46:34.313946 PCI: 00:13.0: enabled 0
1663 08:46:34.316954 PCI: 00:14.0: enabled 1
1664 08:46:34.320498 PCI: 00:14.1: enabled 0
1665 08:46:34.320568 PCI: 00:14.2: enabled 1
1666 08:46:34.323744 PCI: 00:14.3: enabled 1
1667 08:46:34.327541 PCI: 00:15.0: enabled 1
1668 08:46:34.330409 PCI: 00:15.1: enabled 1
1669 08:46:34.330492 PCI: 00:15.2: enabled 1
1670 08:46:34.333598 PCI: 00:15.3: enabled 1
1671 08:46:34.336839 PCI: 00:16.0: enabled 1
1672 08:46:34.336909 PCI: 00:16.1: enabled 0
1673 08:46:34.340607 PCI: 00:16.2: enabled 0
1674 08:46:34.343493 PCI: 00:16.3: enabled 0
1675 08:46:34.346955 PCI: 00:16.4: enabled 0
1676 08:46:34.347035 PCI: 00:16.5: enabled 0
1677 08:46:34.350525 PCI: 00:17.0: enabled 0
1678 08:46:34.353539 PCI: 00:19.0: enabled 0
1679 08:46:34.356652 PCI: 00:19.1: enabled 1
1680 08:46:34.356721 PCI: 00:19.2: enabled 0
1681 08:46:34.360429 PCI: 00:1c.0: enabled 1
1682 08:46:34.363704 PCI: 00:1c.1: enabled 0
1683 08:46:34.366738 PCI: 00:1c.2: enabled 0
1684 08:46:34.366815 PCI: 00:1c.3: enabled 0
1685 08:46:34.370140 PCI: 00:1c.4: enabled 0
1686 08:46:34.373667 PCI: 00:1c.5: enabled 0
1687 08:46:34.376813 PCI: 00:1c.6: enabled 1
1688 08:46:34.376887 PCI: 00:1c.7: enabled 0
1689 08:46:34.380024 PCI: 00:1d.0: enabled 1
1690 08:46:34.383637 PCI: 00:1d.1: enabled 0
1691 08:46:34.383713 PCI: 00:1d.2: enabled 1
1692 08:46:34.387064 PCI: 00:1d.3: enabled 0
1693 08:46:34.389861 PCI: 00:1e.0: enabled 1
1694 08:46:34.393304 PCI: 00:1e.1: enabled 0
1695 08:46:34.393383 PCI: 00:1e.2: enabled 1
1696 08:46:34.396712 PCI: 00:1e.3: enabled 1
1697 08:46:34.400318 PCI: 00:1f.0: enabled 1
1698 08:46:34.403485 PCI: 00:1f.1: enabled 0
1699 08:46:34.403555 PCI: 00:1f.2: enabled 1
1700 08:46:34.406941 PCI: 00:1f.3: enabled 1
1701 08:46:34.410261 PCI: 00:1f.4: enabled 0
1702 08:46:34.413367 PCI: 00:1f.5: enabled 1
1703 08:46:34.413483 PCI: 00:1f.6: enabled 0
1704 08:46:34.416981 PCI: 00:1f.7: enabled 0
1705 08:46:34.419823 APIC: 00: enabled 1
1706 08:46:34.419905 GENERIC: 0.0: enabled 1
1707 08:46:34.423589 GENERIC: 0.0: enabled 1
1708 08:46:34.426814 GENERIC: 1.0: enabled 1
1709 08:46:34.429714 GENERIC: 0.0: enabled 1
1710 08:46:34.429790 GENERIC: 1.0: enabled 1
1711 08:46:34.433389 USB0 port 0: enabled 1
1712 08:46:34.436639 GENERIC: 0.0: enabled 1
1713 08:46:34.436706 USB0 port 0: enabled 1
1714 08:46:34.439628 GENERIC: 0.0: enabled 1
1715 08:46:34.443516 I2C: 00:1a: enabled 1
1716 08:46:34.446580 I2C: 00:31: enabled 1
1717 08:46:34.446654 I2C: 00:32: enabled 1
1718 08:46:34.450222 I2C: 00:10: enabled 1
1719 08:46:34.453170 I2C: 00:15: enabled 1
1720 08:46:34.453290 GENERIC: 0.0: enabled 0
1721 08:46:34.456345 GENERIC: 1.0: enabled 0
1722 08:46:34.459962 GENERIC: 0.0: enabled 1
1723 08:46:34.460061 SPI: 00: enabled 1
1724 08:46:34.463160 SPI: 00: enabled 1
1725 08:46:34.466354 PNP: 0c09.0: enabled 1
1726 08:46:34.466497 GENERIC: 0.0: enabled 1
1727 08:46:34.470044 USB3 port 0: enabled 1
1728 08:46:34.473170 USB3 port 1: enabled 1
1729 08:46:34.476180 USB3 port 2: enabled 0
1730 08:46:34.476277 USB3 port 3: enabled 0
1731 08:46:34.480011 USB2 port 0: enabled 0
1732 08:46:34.482966 USB2 port 1: enabled 1
1733 08:46:34.483065 USB2 port 2: enabled 1
1734 08:46:34.486199 USB2 port 3: enabled 0
1735 08:46:34.489759 USB2 port 4: enabled 1
1736 08:46:34.489841 USB2 port 5: enabled 0
1737 08:46:34.492977 USB2 port 6: enabled 0
1738 08:46:34.496472 USB2 port 7: enabled 0
1739 08:46:34.499613 USB2 port 8: enabled 0
1740 08:46:34.499695 USB2 port 9: enabled 0
1741 08:46:34.503116 USB3 port 0: enabled 0
1742 08:46:34.506600 USB3 port 1: enabled 1
1743 08:46:34.506686 USB3 port 2: enabled 0
1744 08:46:34.509382 USB3 port 3: enabled 0
1745 08:46:34.513110 GENERIC: 0.0: enabled 1
1746 08:46:34.516368 GENERIC: 1.0: enabled 1
1747 08:46:34.516454 APIC: 01: enabled 1
1748 08:46:34.519358 APIC: 03: enabled 1
1749 08:46:34.519444 APIC: 05: enabled 1
1750 08:46:34.522866 APIC: 07: enabled 1
1751 08:46:34.526496 APIC: 06: enabled 1
1752 08:46:34.526607 APIC: 02: enabled 1
1753 08:46:34.529880 APIC: 04: enabled 1
1754 08:46:34.532698 PCI: 01:00.0: enabled 1
1755 08:46:34.536237 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1756 08:46:34.543122 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 08:46:34.546174 ELOG: NV offset 0xf30000 size 0x1000
1758 08:46:34.552931 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 08:46:34.559423 ELOG: Event(17) added with size 13 at 2023-12-11 08:46:34 UTC
1760 08:46:34.565892 ELOG: Event(92) added with size 9 at 2023-12-11 08:46:34 UTC
1761 08:46:34.572742 ELOG: Event(93) added with size 9 at 2023-12-11 08:46:34 UTC
1762 08:46:34.579552 ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:34 UTC
1763 08:46:34.585835 ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:34 UTC
1764 08:46:34.592562 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 08:46:34.595464 ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:34 UTC
1766 08:46:34.602318 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1767 08:46:34.609025 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1768 08:46:34.612483 Finalize devices...
1769 08:46:34.612567 Devices finalized
1770 08:46:34.619151 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1771 08:46:34.622363 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1772 08:46:34.629588 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1773 08:46:34.635559 ME: HFSTS1 : 0x80030055
1774 08:46:34.638813 ME: HFSTS2 : 0x30280116
1775 08:46:34.642416 ME: HFSTS3 : 0x00000050
1776 08:46:34.649086 ME: HFSTS4 : 0x00004000
1777 08:46:34.652131 ME: HFSTS5 : 0x00000000
1778 08:46:34.655307 ME: HFSTS6 : 0x00400006
1779 08:46:34.659003 ME: Manufacturing Mode : YES
1780 08:46:34.665644 ME: SPI Protection Mode Enabled : NO
1781 08:46:34.669017 ME: FW Partition Table : OK
1782 08:46:34.672031 ME: Bringup Loader Failure : NO
1783 08:46:34.675679 ME: Firmware Init Complete : NO
1784 08:46:34.678853 ME: Boot Options Present : NO
1785 08:46:34.682331 ME: Update In Progress : NO
1786 08:46:34.685690 ME: D0i3 Support : YES
1787 08:46:34.688614 ME: Low Power State Enabled : NO
1788 08:46:34.695557 ME: CPU Replaced : YES
1789 08:46:34.698531 ME: CPU Replacement Valid : YES
1790 08:46:34.702345 ME: Current Working State : 5
1791 08:46:34.705180 ME: Current Operation State : 1
1792 08:46:34.708756 ME: Current Operation Mode : 3
1793 08:46:34.712033 ME: Error Code : 0
1794 08:46:34.715872 ME: Enhanced Debug Mode : NO
1795 08:46:34.718658 ME: CPU Debug Disabled : YES
1796 08:46:34.722046 ME: TXT Support : NO
1797 08:46:34.728730 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1798 08:46:34.738569 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1799 08:46:34.741626 CBFS: 'fallback/slic' not found.
1800 08:46:34.745055 ACPI: Writing ACPI tables at 76b01000.
1801 08:46:34.745167 ACPI: * FACS
1802 08:46:34.748499 ACPI: * DSDT
1803 08:46:34.751743 Ramoops buffer: 0x100000@0x76a00000.
1804 08:46:34.754956 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1805 08:46:34.761725 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1806 08:46:34.765373 Google Chrome EC: version:
1807 08:46:34.768216 ro: voema_v2.0.7540-147f8d37d1
1808 08:46:34.771925 rw: voema_v2.0.7540-147f8d37d1
1809 08:46:34.774839 running image: 2
1810 08:46:34.781834 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1811 08:46:34.785001 ACPI: * FADT
1812 08:46:34.785085 SCI is IRQ9
1813 08:46:34.788043 ACPI: added table 1/32, length now 40
1814 08:46:34.791328 ACPI: * SSDT
1815 08:46:34.794899 Found 1 CPU(s) with 8 core(s) each.
1816 08:46:34.797952 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1817 08:46:34.801163 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1818 08:46:34.808044 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1819 08:46:34.810960 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1820 08:46:34.817747 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1821 08:46:34.821267 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1822 08:46:34.827896 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1823 08:46:34.834361 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1824 08:46:34.840909 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1825 08:46:34.844391 \_SB.PCI0.RP09: Added StorageD3Enable property
1826 08:46:34.847495 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1827 08:46:34.854390 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1828 08:46:34.857617 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1829 08:46:34.864457 PS2K: Passing 80 keymaps to kernel
1830 08:46:34.870728 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1831 08:46:34.877339 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1832 08:46:34.880596 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1833 08:46:34.887883 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1834 08:46:34.893816 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1835 08:46:34.900703 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1836 08:46:34.907605 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1837 08:46:34.914029 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1838 08:46:34.920538 ACPI: added table 2/32, length now 44
1839 08:46:34.920621 ACPI: * MCFG
1840 08:46:34.924100 ACPI: added table 3/32, length now 48
1841 08:46:34.927365 ACPI: * TPM2
1842 08:46:34.930364 TPM2 log created at 0x769f0000
1843 08:46:34.934362 ACPI: added table 4/32, length now 52
1844 08:46:34.934462 ACPI: * MADT
1845 08:46:34.936909 SCI is IRQ9
1846 08:46:34.940809 ACPI: added table 5/32, length now 56
1847 08:46:34.940892 current = 76b09850
1848 08:46:34.943939 ACPI: * DMAR
1849 08:46:34.946995 ACPI: added table 6/32, length now 60
1850 08:46:34.950355 ACPI: added table 7/32, length now 64
1851 08:46:34.954057 ACPI: * HPET
1852 08:46:34.957220 ACPI: added table 8/32, length now 68
1853 08:46:34.957303 ACPI: done.
1854 08:46:34.960261 ACPI tables: 35216 bytes.
1855 08:46:34.964075 smbios_write_tables: 769ef000
1856 08:46:34.966845 EC returned error result code 3
1857 08:46:34.970748 Couldn't obtain OEM name from CBI
1858 08:46:34.973638 Create SMBIOS type 16
1859 08:46:34.976725 Create SMBIOS type 17
1860 08:46:34.976807 GENERIC: 0.0 (WIFI Device)
1861 08:46:34.980249 SMBIOS tables: 1750 bytes.
1862 08:46:34.984024 Writing table forward entry at 0x00000500
1863 08:46:34.990184 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1864 08:46:34.993639 Writing coreboot table at 0x76b25000
1865 08:46:35.000619 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1866 08:46:35.006919 1. 0000000000001000-000000000009ffff: RAM
1867 08:46:35.010608 2. 00000000000a0000-00000000000fffff: RESERVED
1868 08:46:35.013681 3. 0000000000100000-00000000769eefff: RAM
1869 08:46:35.020120 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1870 08:46:35.023820 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1871 08:46:35.029959 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1872 08:46:35.036884 7. 0000000077000000-000000007fbfffff: RESERVED
1873 08:46:35.040099 8. 00000000c0000000-00000000cfffffff: RESERVED
1874 08:46:35.046832 9. 00000000f8000000-00000000f9ffffff: RESERVED
1875 08:46:35.050104 10. 00000000fb000000-00000000fb000fff: RESERVED
1876 08:46:35.053667 11. 00000000fe000000-00000000fe00ffff: RESERVED
1877 08:46:35.060285 12. 00000000fed80000-00000000fed87fff: RESERVED
1878 08:46:35.063165 13. 00000000fed90000-00000000fed92fff: RESERVED
1879 08:46:35.069909 14. 00000000feda0000-00000000feda1fff: RESERVED
1880 08:46:35.073187 15. 00000000fedc0000-00000000feddffff: RESERVED
1881 08:46:35.079925 16. 0000000100000000-00000002803fffff: RAM
1882 08:46:35.080036 Passing 4 GPIOs to payload:
1883 08:46:35.086684 NAME | PORT | POLARITY | VALUE
1884 08:46:35.093410 lid | undefined | high | high
1885 08:46:35.096906 power | undefined | high | low
1886 08:46:35.103581 oprom | undefined | high | low
1887 08:46:35.106775 EC in RW | 0x000000e5 | high | high
1888 08:46:35.113409 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4680
1889 08:46:35.116531 coreboot table: 1576 bytes.
1890 08:46:35.119740 IMD ROOT 0. 0x76fff000 0x00001000
1891 08:46:35.123514 IMD SMALL 1. 0x76ffe000 0x00001000
1892 08:46:35.126332 FSP MEMORY 2. 0x76c4e000 0x003b0000
1893 08:46:35.133224 VPD 3. 0x76c4d000 0x00000367
1894 08:46:35.136222 RO MCACHE 4. 0x76c4c000 0x00000fdc
1895 08:46:35.139690 CONSOLE 5. 0x76c2c000 0x00020000
1896 08:46:35.143470 FMAP 6. 0x76c2b000 0x00000578
1897 08:46:35.146269 TIME STAMP 7. 0x76c2a000 0x00000910
1898 08:46:35.149872 VBOOT WORK 8. 0x76c16000 0x00014000
1899 08:46:35.153598 ROMSTG STCK 9. 0x76c15000 0x00001000
1900 08:46:35.156807 AFTER CAR 10. 0x76c0a000 0x0000b000
1901 08:46:35.163011 RAMSTAGE 11. 0x76b97000 0x00073000
1902 08:46:35.166266 REFCODE 12. 0x76b42000 0x00055000
1903 08:46:35.169769 SMM BACKUP 13. 0x76b32000 0x00010000
1904 08:46:35.173102 4f444749 14. 0x76b30000 0x00002000
1905 08:46:35.176602 EXT VBT15. 0x76b2d000 0x0000219f
1906 08:46:35.179995 COREBOOT 16. 0x76b25000 0x00008000
1907 08:46:35.183256 ACPI 17. 0x76b01000 0x00024000
1908 08:46:35.186812 ACPI GNVS 18. 0x76b00000 0x00001000
1909 08:46:35.190022 RAMOOPS 19. 0x76a00000 0x00100000
1910 08:46:35.193374 TPM2 TCGLOG20. 0x769f0000 0x00010000
1911 08:46:35.199666 SMBIOS 21. 0x769ef000 0x00000800
1912 08:46:35.199786 IMD small region:
1913 08:46:35.203326 IMD ROOT 0. 0x76ffec00 0x00000400
1914 08:46:35.206371 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1915 08:46:35.212938 POWER STATE 2. 0x76ffeb80 0x00000044
1916 08:46:35.216294 ROMSTAGE 3. 0x76ffeb60 0x00000004
1917 08:46:35.220063 MEM INFO 4. 0x76ffe980 0x000001e0
1918 08:46:35.226253 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1919 08:46:35.229848 MTRR: Physical address space:
1920 08:46:35.236756 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1921 08:46:35.239956 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1922 08:46:35.246227 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1923 08:46:35.253234 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1924 08:46:35.260017 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1925 08:46:35.266304 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1926 08:46:35.272757 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1927 08:46:35.276148 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 08:46:35.279726 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 08:46:35.286058 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 08:46:35.289341 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 08:46:35.292440 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 08:46:35.296394 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 08:46:35.302670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 08:46:35.306161 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 08:46:35.309418 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 08:46:35.312402 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 08:46:35.319051 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 08:46:35.322380 call enable_fixed_mtrr()
1939 08:46:35.325979 CPU physical address size: 39 bits
1940 08:46:35.329048 MTRR: default type WB/UC MTRR counts: 6/6.
1941 08:46:35.332781 MTRR: UC selected as default type.
1942 08:46:35.338848 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1943 08:46:35.345740 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1944 08:46:35.352670 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1945 08:46:35.358679 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1946 08:46:35.365439 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1947 08:46:35.368950 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1948 08:46:35.376954 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 08:46:35.380186 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 08:46:35.383069 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 08:46:35.386576 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 08:46:35.393345 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 08:46:35.396370 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 08:46:35.399930 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 08:46:35.402929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 08:46:35.410066 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 08:46:35.413081 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 08:46:35.416348 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 08:46:35.416428
1960 08:46:35.420190 MTRR check
1961 08:46:35.423285 call enable_fixed_mtrr()
1962 08:46:35.423364 Fixed MTRRs : Enabled
1963 08:46:35.426274 Variable MTRRs: Enabled
1964 08:46:35.426383
1965 08:46:35.429614 CPU physical address size: 39 bits
1966 08:46:35.436881 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1967 08:46:35.439888 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 08:46:35.446822 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 08:46:35.449857 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 08:46:35.452837 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 08:46:35.456672 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 08:46:35.463129 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 08:46:35.466457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 08:46:35.469615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 08:46:35.473145 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 08:46:35.479857 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 08:46:35.483074 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 08:46:35.486218 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 08:46:35.493189 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 08:46:35.493289 call enable_fixed_mtrr()
1981 08:46:35.499914 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 08:46:35.502892 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 08:46:35.506634 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 08:46:35.509430 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 08:46:35.516097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 08:46:35.519284 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 08:46:35.523043 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 08:46:35.525918 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 08:46:35.529200 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 08:46:35.535923 CPU physical address size: 39 bits
1991 08:46:35.539271 call enable_fixed_mtrr()
1992 08:46:35.543015 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 08:46:35.546193 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 08:46:35.553021 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 08:46:35.556149 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 08:46:35.559317 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 08:46:35.562337 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 08:46:35.569244 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 08:46:35.572631 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 08:46:35.575996 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 08:46:35.579560 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 08:46:35.586013 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 08:46:35.589357 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 08:46:35.592237 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 08:46:35.595812 call enable_fixed_mtrr()
2006 08:46:35.599110 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 08:46:35.605665 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 08:46:35.609078 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 08:46:35.612605 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 08:46:35.616122 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 08:46:35.622290 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 08:46:35.625417 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 08:46:35.629132 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 08:46:35.632271 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 08:46:35.635747 CPU physical address size: 39 bits
2016 08:46:35.642620 call enable_fixed_mtrr()
2017 08:46:35.645757 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 08:46:35.649246 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 08:46:35.652523 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 08:46:35.659054 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 08:46:35.662070 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 08:46:35.665954 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 08:46:35.669138 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 08:46:35.675976 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 08:46:35.678958 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 08:46:35.681961 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 08:46:35.685133 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 08:46:35.688873 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 08:46:35.695033 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 08:46:35.698673 call enable_fixed_mtrr()
2031 08:46:35.701992 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 08:46:35.705277 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 08:46:35.711845 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 08:46:35.715061 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 08:46:35.719004 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 08:46:35.721914 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 08:46:35.725132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 08:46:35.731481 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 08:46:35.735116 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 08:46:35.738279 CPU physical address size: 39 bits
2041 08:46:35.742427 call enable_fixed_mtrr()
2042 08:46:35.745537 CPU physical address size: 39 bits
2043 08:46:35.750041 Checking cr50 for pending updates
2044 08:46:35.754269 CPU physical address size: 39 bits
2045 08:46:35.757208 CPU physical address size: 39 bits
2046 08:46:35.760508 Reading cr50 TPM mode
2047 08:46:35.769361 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2048 08:46:35.779384 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2049 08:46:35.782703 Checking segment from ROM address 0xffc02b38
2050 08:46:35.785604 Checking segment from ROM address 0xffc02b54
2051 08:46:35.792284 Loading segment from ROM address 0xffc02b38
2052 08:46:35.792365 code (compression=0)
2053 08:46:35.802356 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2054 08:46:35.812372 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2055 08:46:35.812476 it's not compressed!
2056 08:46:35.952253 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2057 08:46:35.958710 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2058 08:46:35.965533 Loading segment from ROM address 0xffc02b54
2059 08:46:35.965674 Entry Point 0x30000000
2060 08:46:35.968460 Loaded segments
2061 08:46:35.975070 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2062 08:46:36.018314 Finalizing chipset.
2063 08:46:36.021821 Finalizing SMM.
2064 08:46:36.021897 APMC done.
2065 08:46:36.028692 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2066 08:46:36.031752 mp_park_aps done after 0 msecs.
2067 08:46:36.034896 Jumping to boot code at 0x30000000(0x76b25000)
2068 08:46:36.044627 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2069 08:46:36.044710
2070 08:46:36.044774
2071 08:46:36.044834
2072 08:46:36.047987 Starting depthcharge on Voema...
2073 08:46:36.048067
2074 08:46:36.048421 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2075 08:46:36.048535 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2076 08:46:36.048616 Setting prompt string to ['volteer:']
2077 08:46:36.048689 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2078 08:46:36.058298 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2079 08:46:36.058382
2080 08:46:36.064510 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2081 08:46:36.064593
2082 08:46:36.070967 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2083 08:46:36.071073
2084 08:46:36.074700 Failed to find eMMC card reader
2085 08:46:36.074790
2086 08:46:36.074855 Wipe memory regions:
2087 08:46:36.074914
2088 08:46:36.081272 [0x00000000001000, 0x000000000a0000)
2089 08:46:36.081354
2090 08:46:36.084410 [0x00000000100000, 0x00000030000000)
2091 08:46:36.109931
2092 08:46:36.113039 [0x00000032662db0, 0x000000769ef000)
2093 08:46:36.148879
2094 08:46:36.151752 [0x00000100000000, 0x00000280400000)
2095 08:46:36.351989
2096 08:46:36.355755 ec_init: CrosEC protocol v3 supported (256, 256)
2097 08:46:36.355838
2098 08:46:36.362294 update_port_state: port C0 state: usb enable 1 mux conn 0
2099 08:46:36.362373
2100 08:46:36.368929 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2101 08:46:36.373856
2102 08:46:36.376667 pmc_check_ipc_sts: STS_BUSY done after 1566 us
2103 08:46:36.376764
2104 08:46:36.380287 send_conn_disc_msg: pmc_send_cmd succeeded
2105 08:46:36.811900
2106 08:46:36.812043 R8152: Initializing
2107 08:46:36.812111
2108 08:46:36.815065 Version 6 (ocp_data = 5c30)
2109 08:46:36.815146
2110 08:46:36.818179 R8152: Done initializing
2111 08:46:36.818260
2112 08:46:36.821197 Adding net device
2113 08:46:37.123424
2114 08:46:37.126659 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2115 08:46:37.126746
2116 08:46:37.126810
2117 08:46:37.126870
2118 08:46:37.130159 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 08:46:37.230481 volteer: tftpboot 192.168.201.1 12243823/tftp-deploy-1ca0qy7q/kernel/bzImage 12243823/tftp-deploy-1ca0qy7q/kernel/cmdline 12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
2121 08:46:37.230628 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 08:46:37.230720 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2123 08:46:37.235099 tftpboot 192.168.201.1 12243823/tftp-deploy-1ca0qy7q/kernel/bzImploy-1ca0qy7q/kernel/cmdline 12243823/tftp-deploy-1ca0qy7q/ramdisk/ramdisk.cpio.gz
2124 08:46:37.235185
2125 08:46:37.235262 Waiting for link
2126 08:46:37.438057
2127 08:46:37.438186 done.
2128 08:46:37.438254
2129 08:46:37.438315 MAC: 00:24:32:30:7b:ec
2130 08:46:37.438374
2131 08:46:37.441149 Sending DHCP discover... done.
2132 08:46:37.441227
2133 08:46:37.444671 Waiting for reply... done.
2134 08:46:37.444747
2135 08:46:37.447972 Sending DHCP request... done.
2136 08:46:37.448048
2137 08:46:37.451645 Waiting for reply... done.
2138 08:46:37.451727
2139 08:46:37.454772 My ip is 192.168.201.11
2140 08:46:37.454853
2141 08:46:37.457824 The DHCP server ip is 192.168.201.1
2142 08:46:37.457905
2143 08:46:37.461114 TFTP server IP predefined by user: 192.168.201.1
2144 08:46:37.461201
2145 08:46:37.468099 Bootfile predefined by user: 12243823/tftp-deploy-1ca0qy7q/kernel/bzImage
2146 08:46:37.468183
2147 08:46:37.471210 Sending tftp read request... done.
2148 08:46:37.471291
2149 08:46:37.478319 Waiting for the transfer...
2150 08:46:37.478414
2151 08:46:38.016363 00000000 ################################################################
2152 08:46:38.016510
2153 08:46:38.543791 00080000 ################################################################
2154 08:46:38.543946
2155 08:46:39.069068 00100000 ################################################################
2156 08:46:39.069230
2157 08:46:39.598344 00180000 ################################################################
2158 08:46:39.598534
2159 08:46:40.128411 00200000 ################################################################
2160 08:46:40.128555
2161 08:46:40.658648 00280000 ################################################################
2162 08:46:40.658787
2163 08:46:41.181207 00300000 ################################################################
2164 08:46:41.181370
2165 08:46:41.706360 00380000 ################################################################
2166 08:46:41.706502
2167 08:46:42.224790 00400000 ################################################################
2168 08:46:42.224959
2169 08:46:42.751949 00480000 ################################################################
2170 08:46:42.752113
2171 08:46:43.278280 00500000 ################################################################
2172 08:46:43.278461
2173 08:46:43.798326 00580000 ################################################################
2174 08:46:43.798478
2175 08:46:44.316235 00600000 ################################################################
2176 08:46:44.316399
2177 08:46:44.836695 00680000 ################################################################
2178 08:46:44.836856
2179 08:46:45.365797 00700000 ################################################################
2180 08:46:45.365930
2181 08:46:45.885042 00780000 ################################################################
2182 08:46:45.885204
2183 08:46:46.067450 00800000 ####################### done.
2184 08:46:46.067584
2185 08:46:46.071051 The bootfile was 8572816 bytes long.
2186 08:46:46.071153
2187 08:46:46.074234 Sending tftp read request... done.
2188 08:46:46.074314
2189 08:46:46.077954 Waiting for the transfer...
2190 08:46:46.078068
2191 08:46:46.601000 00000000 ################################################################
2192 08:46:46.601165
2193 08:46:47.139746 00080000 ################################################################
2194 08:46:47.139909
2195 08:46:47.656031 00100000 ################################################################
2196 08:46:47.656230
2197 08:46:48.180243 00180000 ################################################################
2198 08:46:48.180376
2199 08:46:48.706229 00200000 ################################################################
2200 08:46:48.706400
2201 08:46:49.234846 00280000 ################################################################
2202 08:46:49.234979
2203 08:46:49.765229 00300000 ################################################################
2204 08:46:49.765358
2205 08:46:50.307192 00380000 ################################################################
2206 08:46:50.307331
2207 08:46:50.835442 00400000 ################################################################
2208 08:46:50.835597
2209 08:46:51.352235 00480000 ################################################################
2210 08:46:51.352383
2211 08:46:51.890610 00500000 ################################################################
2212 08:46:51.890779
2213 08:46:52.433054 00580000 ################################################################
2214 08:46:52.433183
2215 08:46:52.973879 00600000 ################################################################
2216 08:46:52.974042
2217 08:46:53.528129 00680000 ################################################################
2218 08:46:53.528264
2219 08:46:54.086109 00700000 ################################################################
2220 08:46:54.086274
2221 08:46:54.616104 00780000 ################################################################
2222 08:46:54.616239
2223 08:46:55.142256 00800000 ################################################################
2224 08:46:55.142391
2225 08:46:55.698073 00880000 ################################################################
2226 08:46:55.698240
2227 08:46:56.241126 00900000 ################################################################
2228 08:46:56.241308
2229 08:46:56.782683 00980000 ################################################################
2230 08:46:56.782847
2231 08:46:57.355334 00a00000 ################################################################
2232 08:46:57.355472
2233 08:46:57.893089 00a80000 ################################################################
2234 08:46:57.893226
2235 08:46:58.432365 00b00000 ################################################################
2236 08:46:58.432503
2237 08:46:58.964562 00b80000 ################################################################
2238 08:46:58.964698
2239 08:46:59.522683 00c00000 ################################################################
2240 08:46:59.522873
2241 08:47:00.093457 00c80000 ################################################################
2242 08:47:00.093613
2243 08:47:00.659251 00d00000 ################################################################
2244 08:47:00.659394
2245 08:47:01.236439 00d80000 ################################################################
2246 08:47:01.236603
2247 08:47:01.792264 00e00000 ################################################################
2248 08:47:01.792392
2249 08:47:02.344760 00e80000 ################################################################
2250 08:47:02.344897
2251 08:47:02.912060 00f00000 ################################################################
2252 08:47:02.912228
2253 08:47:03.459852 00f80000 ################################################################
2254 08:47:03.459983
2255 08:47:04.003919 01000000 ################################################################
2256 08:47:04.004055
2257 08:47:04.559013 01080000 ################################################################
2258 08:47:04.559146
2259 08:47:05.112514 01100000 ################################################################
2260 08:47:05.112649
2261 08:47:05.680542 01180000 ################################################################
2262 08:47:05.680740
2263 08:47:06.227336 01200000 ################################################################
2264 08:47:06.227495
2265 08:47:06.784939 01280000 ################################################################
2266 08:47:06.785069
2267 08:47:07.329624 01300000 ################################################################
2268 08:47:07.329762
2269 08:47:07.881483 01380000 ################################################################
2270 08:47:07.881616
2271 08:47:08.432948 01400000 ################################################################
2272 08:47:08.433140
2273 08:47:08.992787 01480000 ################################################################
2274 08:47:08.992945
2275 08:47:09.553810 01500000 ################################################################
2276 08:47:09.553967
2277 08:47:10.122318 01580000 ################################################################
2278 08:47:10.122502
2279 08:47:10.682046 01600000 ################################################################
2280 08:47:10.682181
2281 08:47:11.228440 01680000 ################################################################
2282 08:47:11.228599
2283 08:47:11.834643 01700000 ################################################################
2284 08:47:11.835190
2285 08:47:12.524842 01780000 ################################################################
2286 08:47:12.525342
2287 08:47:13.186895 01800000 ################################################################
2288 08:47:13.187392
2289 08:47:13.852494 01880000 ################################################################
2290 08:47:13.852993
2291 08:47:14.531416 01900000 ################################################################
2292 08:47:14.531909
2293 08:47:15.208315 01980000 ################################################################
2294 08:47:15.208822
2295 08:47:15.871766 01a00000 ################################################################
2296 08:47:15.872290
2297 08:47:16.544340 01a80000 ################################################################
2298 08:47:16.544857
2299 08:47:17.228296 01b00000 ################################################################
2300 08:47:17.228821
2301 08:47:17.892061 01b80000 ################################################################
2302 08:47:17.892231
2303 08:47:18.573032 01c00000 ################################################################
2304 08:47:18.573542
2305 08:47:19.252610 01c80000 ################################################################
2306 08:47:19.253117
2307 08:47:19.943623 01d00000 ################################################################
2308 08:47:19.944128
2309 08:47:20.612970 01d80000 ################################################################
2310 08:47:20.613490
2311 08:47:21.308986 01e00000 ################################################################
2312 08:47:21.309502
2313 08:47:21.990869 01e80000 ################################################################
2314 08:47:21.991444
2315 08:47:22.654039 01f00000 ################################################################
2316 08:47:22.654583
2317 08:47:23.255831 01f80000 ################################################################
2318 08:47:23.255980
2319 08:47:23.918531 02000000 ################################################################
2320 08:47:23.919120
2321 08:47:24.603380 02080000 ################################################################
2322 08:47:24.603883
2323 08:47:25.282780 02100000 ################################################################
2324 08:47:25.283335
2325 08:47:25.963951 02180000 ################################################################
2326 08:47:25.964463
2327 08:47:26.515099 02200000 #################################################### done.
2328 08:47:26.515631
2329 08:47:26.518542 Sending tftp read request... done.
2330 08:47:26.518975
2331 08:47:26.522116 Waiting for the transfer...
2332 08:47:26.522610
2333 08:47:26.523046 00000000 # done.
2334 08:47:26.523464
2335 08:47:26.531801 Command line loaded dynamically from TFTP file: 12243823/tftp-deploy-1ca0qy7q/kernel/cmdline
2336 08:47:26.532234
2337 08:47:26.548515 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 08:47:26.554499
2339 08:47:26.557866 Shutting down all USB controllers.
2340 08:47:26.558436
2341 08:47:26.558784 Removing current net device
2342 08:47:26.559094
2343 08:47:26.560936 Finalizing coreboot
2344 08:47:26.561353
2345 08:47:26.567397 Exiting depthcharge with code 4 at timestamp: 59176086
2346 08:47:26.567819
2347 08:47:26.568148
2348 08:47:26.568456 Starting kernel ...
2349 08:47:26.568752
2350 08:47:26.569039
2351 08:47:26.570985 end: 2.2.4 bootloader-commands (duration 00:00:51) [common]
2352 08:47:26.571481 start: 2.2.5 auto-login-action (timeout 00:03:54) [common]
2353 08:47:26.571868 Setting prompt string to ['Linux version [0-9]']
2354 08:47:26.572223 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 08:47:26.572574 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 08:51:20.572453 end: 2.2.5 auto-login-action (duration 00:03:54) [common]
2359 08:51:20.573536 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 234 seconds'
2361 08:51:20.574451 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 08:51:20.575867 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 08:51:20.577019 Cleaning after the job
2367 08:51:20.577343 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/ramdisk
2368 08:51:20.582352 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/kernel
2369 08:51:20.583610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243823/tftp-deploy-1ca0qy7q/modules
2370 08:51:20.584080 start: 4.1 power-off (timeout 00:00:30) [common]
2371 08:51:20.584232 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2372 08:51:20.663375 >> Command sent successfully.
2373 08:51:20.668977 Returned 0 in 0 seconds
2374 08:51:20.770073 end: 4.1 power-off (duration 00:00:00) [common]
2376 08:51:20.771724 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 08:51:20.773053 Listened to connection for namespace 'common' for up to 1s
2378 08:51:21.773675 Finalising connection for namespace 'common'
2379 08:51:21.774460 Disconnecting from shell: Finalise
2380 08:51:21.774906
2381 08:51:21.876055 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 08:51:21.876671 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243823
2383 08:51:22.006694 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243823
2384 08:51:22.006890 JobError: Your job cannot terminate cleanly.