Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:54:11.893111 lava-dispatcher, installed at version: 2023.10
2 08:54:11.893331 start: 0 validate
3 08:54:11.893474 Start time: 2023-12-11 08:54:11.893466+00:00 (UTC)
4 08:54:11.893600 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:54:11.893768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 08:54:12.152869 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:54:12.153043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:54:12.418263 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:54:12.418507 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 08:54:12.683838 Using caching service: 'http://localhost/cache/?uri=%s'
11 08:54:12.684022 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 08:54:12.951346 validate duration: 1.06
14 08:54:12.951654 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:54:12.951758 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:54:12.951869 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:54:12.952005 Not decompressing ramdisk as can be used compressed.
18 08:54:12.952094 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 08:54:12.952166 saving as /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/ramdisk/initrd.cpio.gz
20 08:54:12.952234 total size: 5432480 (5 MB)
21 08:54:12.953443 progress 0 % (0 MB)
22 08:54:12.956030 progress 5 % (0 MB)
23 08:54:12.958435 progress 10 % (0 MB)
24 08:54:12.960821 progress 15 % (0 MB)
25 08:54:12.963512 progress 20 % (1 MB)
26 08:54:12.965910 progress 25 % (1 MB)
27 08:54:12.968304 progress 30 % (1 MB)
28 08:54:12.970941 progress 35 % (1 MB)
29 08:54:12.973295 progress 40 % (2 MB)
30 08:54:12.975649 progress 45 % (2 MB)
31 08:54:12.978019 progress 50 % (2 MB)
32 08:54:12.980659 progress 55 % (2 MB)
33 08:54:12.983022 progress 60 % (3 MB)
34 08:54:12.985378 progress 65 % (3 MB)
35 08:54:12.987996 progress 70 % (3 MB)
36 08:54:12.990343 progress 75 % (3 MB)
37 08:54:12.992690 progress 80 % (4 MB)
38 08:54:12.995041 progress 85 % (4 MB)
39 08:54:12.997688 progress 90 % (4 MB)
40 08:54:13.000031 progress 95 % (4 MB)
41 08:54:13.002394 progress 100 % (5 MB)
42 08:54:13.002747 5 MB downloaded in 0.05 s (102.57 MB/s)
43 08:54:13.002989 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:54:13.003405 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:54:13.003554 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:54:13.003692 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:54:13.003899 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 08:54:13.004017 saving as /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/kernel/bzImage
50 08:54:13.004124 total size: 8572816 (8 MB)
51 08:54:13.004232 No compression specified
52 08:54:13.005907 progress 0 % (0 MB)
53 08:54:13.009771 progress 5 % (0 MB)
54 08:54:13.013632 progress 10 % (0 MB)
55 08:54:13.017422 progress 15 % (1 MB)
56 08:54:13.021241 progress 20 % (1 MB)
57 08:54:13.025076 progress 25 % (2 MB)
58 08:54:13.028974 progress 30 % (2 MB)
59 08:54:13.032750 progress 35 % (2 MB)
60 08:54:13.036519 progress 40 % (3 MB)
61 08:54:13.040245 progress 45 % (3 MB)
62 08:54:13.044083 progress 50 % (4 MB)
63 08:54:13.047851 progress 55 % (4 MB)
64 08:54:13.051607 progress 60 % (4 MB)
65 08:54:13.055642 progress 65 % (5 MB)
66 08:54:13.059433 progress 70 % (5 MB)
67 08:54:13.063225 progress 75 % (6 MB)
68 08:54:13.067001 progress 80 % (6 MB)
69 08:54:13.070787 progress 85 % (6 MB)
70 08:54:13.074497 progress 90 % (7 MB)
71 08:54:13.078241 progress 95 % (7 MB)
72 08:54:13.081975 progress 100 % (8 MB)
73 08:54:13.082283 8 MB downloaded in 0.08 s (104.61 MB/s)
74 08:54:13.082517 end: 1.2.1 http-download (duration 00:00:00) [common]
76 08:54:13.082952 end: 1.2 download-retry (duration 00:00:00) [common]
77 08:54:13.083087 start: 1.3 download-retry (timeout 00:10:00) [common]
78 08:54:13.083229 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 08:54:13.083470 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 08:54:13.083587 saving as /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/nfsrootfs/full.rootfs.tar
81 08:54:13.083699 total size: 207157356 (197 MB)
82 08:54:13.083807 Using unxz to decompress xz
83 08:54:13.088997 progress 0 % (0 MB)
84 08:54:13.663272 progress 5 % (9 MB)
85 08:54:14.207362 progress 10 % (19 MB)
86 08:54:14.846199 progress 15 % (29 MB)
87 08:54:15.224372 progress 20 % (39 MB)
88 08:54:15.607184 progress 25 % (49 MB)
89 08:54:16.269982 progress 30 % (59 MB)
90 08:54:16.868025 progress 35 % (69 MB)
91 08:54:17.525677 progress 40 % (79 MB)
92 08:54:18.113826 progress 45 % (88 MB)
93 08:54:18.717402 progress 50 % (98 MB)
94 08:54:19.372302 progress 55 % (108 MB)
95 08:54:20.081575 progress 60 % (118 MB)
96 08:54:20.223239 progress 65 % (128 MB)
97 08:54:20.364180 progress 70 % (138 MB)
98 08:54:20.459677 progress 75 % (148 MB)
99 08:54:20.531042 progress 80 % (158 MB)
100 08:54:20.603190 progress 85 % (167 MB)
101 08:54:20.707830 progress 90 % (177 MB)
102 08:54:20.994299 progress 95 % (187 MB)
103 08:54:21.604188 progress 100 % (197 MB)
104 08:54:21.610664 197 MB downloaded in 8.53 s (23.17 MB/s)
105 08:54:21.610951 end: 1.3.1 http-download (duration 00:00:09) [common]
107 08:54:21.611227 end: 1.3 download-retry (duration 00:00:09) [common]
108 08:54:21.611320 start: 1.4 download-retry (timeout 00:09:51) [common]
109 08:54:21.611411 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 08:54:21.611571 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 08:54:21.611644 saving as /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/modules/modules.tar
112 08:54:21.611707 total size: 251012 (0 MB)
113 08:54:21.611796 Using unxz to decompress xz
114 08:54:21.616092 progress 13 % (0 MB)
115 08:54:21.616573 progress 26 % (0 MB)
116 08:54:21.616856 progress 39 % (0 MB)
117 08:54:21.618520 progress 52 % (0 MB)
118 08:54:21.620477 progress 65 % (0 MB)
119 08:54:21.622334 progress 78 % (0 MB)
120 08:54:21.624094 progress 91 % (0 MB)
121 08:54:21.626092 progress 100 % (0 MB)
122 08:54:21.631497 0 MB downloaded in 0.02 s (12.10 MB/s)
123 08:54:21.631855 end: 1.4.1 http-download (duration 00:00:00) [common]
125 08:54:21.632194 end: 1.4 download-retry (duration 00:00:00) [common]
126 08:54:21.632320 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 08:54:21.632441 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 08:54:25.314411 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243867/extract-nfsrootfs-tmcn811l
129 08:54:25.314636 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 08:54:25.314748 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 08:54:25.314933 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu
132 08:54:25.315077 makedir: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin
133 08:54:25.315185 makedir: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/tests
134 08:54:25.315291 makedir: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/results
135 08:54:25.315400 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-add-keys
136 08:54:25.315552 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-add-sources
137 08:54:25.315688 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-background-process-start
138 08:54:25.315822 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-background-process-stop
139 08:54:25.315955 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-common-functions
140 08:54:25.316087 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-echo-ipv4
141 08:54:25.316223 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-install-packages
142 08:54:25.316364 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-installed-packages
143 08:54:25.316500 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-os-build
144 08:54:25.316634 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-probe-channel
145 08:54:25.316772 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-probe-ip
146 08:54:25.316908 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-target-ip
147 08:54:25.317039 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-target-mac
148 08:54:25.317171 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-target-storage
149 08:54:25.317310 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-case
150 08:54:25.317451 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-event
151 08:54:25.317583 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-feedback
152 08:54:25.317718 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-raise
153 08:54:25.317850 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-reference
154 08:54:25.317987 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-runner
155 08:54:25.318122 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-set
156 08:54:25.318254 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-test-shell
157 08:54:25.318387 Updating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-add-keys (debian)
158 08:54:25.318548 Updating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-add-sources (debian)
159 08:54:25.318696 Updating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-install-packages (debian)
160 08:54:25.318842 Updating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-installed-packages (debian)
161 08:54:25.318987 Updating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/bin/lava-os-build (debian)
162 08:54:25.319114 Creating /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/environment
163 08:54:25.319216 LAVA metadata
164 08:54:25.319289 - LAVA_JOB_ID=12243867
165 08:54:25.319355 - LAVA_DISPATCHER_IP=192.168.201.1
166 08:54:25.319477 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 08:54:25.319552 skipped lava-vland-overlay
168 08:54:25.319632 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 08:54:25.319715 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 08:54:25.319782 skipped lava-multinode-overlay
171 08:54:25.319857 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 08:54:25.319937 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 08:54:25.320018 Loading test definitions
174 08:54:25.320112 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 08:54:25.320184 Using /lava-12243867 at stage 0
176 08:54:25.320504 uuid=12243867_1.5.2.3.1 testdef=None
177 08:54:25.320604 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 08:54:25.320693 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 08:54:25.321180 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 08:54:25.321410 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 08:54:25.322005 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 08:54:25.322251 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 08:54:25.322815 runner path: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/0/tests/0_timesync-off test_uuid 12243867_1.5.2.3.1
186 08:54:25.322979 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 08:54:25.323217 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 08:54:25.323296 Using /lava-12243867 at stage 0
190 08:54:25.323399 Fetching tests from https://github.com/kernelci/test-definitions.git
191 08:54:25.323481 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/0/tests/1_kselftest-futex'
192 08:54:32.015373 Running '/usr/bin/git checkout kernelci.org
193 08:54:32.027284 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 08:54:32.028248 uuid=12243867_1.5.2.3.5 testdef=None
195 08:54:32.028486 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
197 08:54:32.028857 start: 1.5.2.3.6 test-overlay (timeout 00:09:41) [common]
198 08:54:32.030212 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 08:54:32.030624 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:41) [common]
201 08:54:32.032373 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 08:54:32.032637 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
204 08:54:32.033671 runner path: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/0/tests/1_kselftest-futex test_uuid 12243867_1.5.2.3.5
205 08:54:32.033769 BOARD='asus-C436FA-Flip-hatch'
206 08:54:32.033846 BRANCH='cip'
207 08:54:32.033910 SKIPFILE='/dev/null'
208 08:54:32.033972 SKIP_INSTALL='True'
209 08:54:32.034040 TESTPROG_URL='None'
210 08:54:32.034099 TST_CASENAME=''
211 08:54:32.034158 TST_CMDFILES='futex'
212 08:54:32.034317 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 08:54:32.034542 Creating lava-test-runner.conf files
215 08:54:32.034620 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243867/lava-overlay-kht4vbgu/lava-12243867/0 for stage 0
216 08:54:32.034726 - 0_timesync-off
217 08:54:32.034807 - 1_kselftest-futex
218 08:54:32.034915 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
219 08:54:32.035026 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
220 08:54:39.896636 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 08:54:39.896789 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
222 08:54:39.896892 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 08:54:39.896998 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
224 08:54:39.897100 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
225 08:54:40.038995 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 08:54:40.039389 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
227 08:54:40.039593 extracting modules file /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243867/extract-nfsrootfs-tmcn811l
228 08:54:40.053966 extracting modules file /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243867/extract-overlay-ramdisk-s7ieploo/ramdisk
229 08:54:40.069925 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 08:54:40.070080 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
231 08:54:40.070183 [common] Applying overlay to NFS
232 08:54:40.070256 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243867/compress-overlay-u5k4pma7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243867/extract-nfsrootfs-tmcn811l
233 08:54:41.132689 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 08:54:41.132912 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
235 08:54:41.133109 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 08:54:41.133214 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
237 08:54:41.133324 Building ramdisk /var/lib/lava/dispatcher/tmp/12243867/extract-overlay-ramdisk-s7ieploo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243867/extract-overlay-ramdisk-s7ieploo/ramdisk
238 08:54:41.209466 >> 26162 blocks
239 08:54:41.757643 rename /var/lib/lava/dispatcher/tmp/12243867/extract-overlay-ramdisk-s7ieploo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
240 08:54:41.758124 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 08:54:41.758284 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
242 08:54:41.758422 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
243 08:54:41.758528 No mkimage arch provided, not using FIT.
244 08:54:41.758625 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 08:54:41.758713 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 08:54:41.758828 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
247 08:54:41.758924 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
248 08:54:41.759011 No LXC device requested
249 08:54:41.759099 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 08:54:41.759188 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
251 08:54:41.759280 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 08:54:41.759364 Checking files for TFTP limit of 4294967296 bytes.
253 08:54:41.759797 end: 1 tftp-deploy (duration 00:00:29) [common]
254 08:54:41.759933 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 08:54:41.760059 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 08:54:41.760236 substitutions:
257 08:54:41.760365 - {DTB}: None
258 08:54:41.760436 - {INITRD}: 12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
259 08:54:41.760502 - {KERNEL}: 12243867/tftp-deploy-x7ts75p0/kernel/bzImage
260 08:54:41.760561 - {LAVA_MAC}: None
261 08:54:41.760617 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243867/extract-nfsrootfs-tmcn811l
262 08:54:41.760681 - {NFS_SERVER_IP}: 192.168.201.1
263 08:54:41.760743 - {PRESEED_CONFIG}: None
264 08:54:41.760798 - {PRESEED_LOCAL}: None
265 08:54:41.760853 - {RAMDISK}: 12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
266 08:54:41.760914 - {ROOT_PART}: None
267 08:54:41.760972 - {ROOT}: None
268 08:54:41.761026 - {SERVER_IP}: 192.168.201.1
269 08:54:41.761080 - {TEE}: None
270 08:54:41.761141 Parsed boot commands:
271 08:54:41.761199 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 08:54:41.761379 Parsed boot commands: tftpboot 192.168.201.1 12243867/tftp-deploy-x7ts75p0/kernel/bzImage 12243867/tftp-deploy-x7ts75p0/kernel/cmdline 12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
273 08:54:41.761470 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 08:54:41.761575 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 08:54:41.761709 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 08:54:41.761839 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 08:54:41.761925 Not connected, no need to disconnect.
278 08:54:41.762002 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 08:54:41.762100 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 08:54:41.762170 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
281 08:54:41.766215 Setting prompt string to ['lava-test: # ']
282 08:54:41.766596 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 08:54:41.766708 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 08:54:41.766810 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 08:54:41.766920 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 08:54:41.767198 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
287 08:54:46.891215 >> Command sent successfully.
288 08:54:46.893798 Returned 0 in 5 seconds
289 08:54:46.994253 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 08:54:46.994608 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 08:54:46.994715 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 08:54:46.994804 Setting prompt string to 'Starting depthcharge on Helios...'
294 08:54:46.994881 Changing prompt to 'Starting depthcharge on Helios...'
295 08:54:46.994957 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 08:54:46.995230 [Enter `^Ec?' for help]
297 08:54:47.615572
298 08:54:47.615749
299 08:54:47.625559 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 08:54:47.628978 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 08:54:47.635598 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 08:54:47.638955 CPU: AES supported, TXT NOT supported, VT supported
303 08:54:47.645916 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 08:54:47.649451 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 08:54:47.655637 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 08:54:47.659104 VBOOT: Loading verstage.
307 08:54:47.662196 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 08:54:47.669114 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 08:54:47.672432 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 08:54:47.675426 CBFS @ c08000 size 3f8000
311 08:54:47.682175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 08:54:47.685383 CBFS: Locating 'fallback/verstage'
313 08:54:47.688916 CBFS: Found @ offset 10fb80 size 1072c
314 08:54:47.692139
315 08:54:47.692250
316 08:54:47.702454 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 08:54:47.717015 Probing TPM: . done!
318 08:54:47.719709 TPM ready after 0 ms
319 08:54:47.723326 Connected to device vid:did:rid of 1ae0:0028:00
320 08:54:47.733626 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 08:54:47.737130 Initialized TPM device CR50 revision 0
322 08:54:47.781339 tlcl_send_startup: Startup return code is 0
323 08:54:47.781460 TPM: setup succeeded
324 08:54:47.793880 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 08:54:47.798016 Chrome EC: UHEPI supported
326 08:54:47.801183 Phase 1
327 08:54:47.804552 FMAP: area GBB found @ c05000 (12288 bytes)
328 08:54:47.811116 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 08:54:47.811261 Phase 2
330 08:54:47.814545 Phase 3
331 08:54:47.817837 FMAP: area GBB found @ c05000 (12288 bytes)
332 08:54:47.824649 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 08:54:47.831100 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 08:54:47.834187 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 08:54:47.840819 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 08:54:47.856420 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 08:54:47.859994 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 08:54:47.866289 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 08:54:47.871076 Phase 4
340 08:54:47.873793 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 08:54:47.880530 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 08:54:48.060669 VB2:vb2_rsa_verify_digest() Digest check failed!
343 08:54:48.066902 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 08:54:48.067014 Saving nvdata
345 08:54:48.070127 Reboot requested (10020007)
346 08:54:48.073280 board_reset() called!
347 08:54:48.073380 full_reset() called!
348 08:54:52.583127
349 08:54:52.583287
350 08:54:52.593091 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 08:54:52.596602 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 08:54:52.602740 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 08:54:52.606900 CPU: AES supported, TXT NOT supported, VT supported
354 08:54:52.612978 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 08:54:52.616297 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 08:54:52.623270 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 08:54:52.626048 VBOOT: Loading verstage.
358 08:54:52.629553 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 08:54:52.636441 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 08:54:52.639509 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 08:54:52.642862 CBFS @ c08000 size 3f8000
362 08:54:52.649624 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 08:54:52.652985 CBFS: Locating 'fallback/verstage'
364 08:54:52.656620 CBFS: Found @ offset 10fb80 size 1072c
365 08:54:52.659934
366 08:54:52.660020
367 08:54:52.669723 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 08:54:52.683914 Probing TPM: . done!
369 08:54:52.687222 TPM ready after 0 ms
370 08:54:52.690586 Connected to device vid:did:rid of 1ae0:0028:00
371 08:54:52.701170 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 08:54:52.704014 Initialized TPM device CR50 revision 0
373 08:54:52.748977 tlcl_send_startup: Startup return code is 0
374 08:54:52.749127 TPM: setup succeeded
375 08:54:52.761782 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 08:54:52.765252 Chrome EC: UHEPI supported
377 08:54:52.768720 Phase 1
378 08:54:52.772032 FMAP: area GBB found @ c05000 (12288 bytes)
379 08:54:52.778762 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 08:54:52.784935 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 08:54:52.788207 Recovery requested (1009000e)
382 08:54:52.793983 Saving nvdata
383 08:54:52.800100 tlcl_extend: response is 0
384 08:54:52.809104 tlcl_extend: response is 0
385 08:54:52.816506 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 08:54:52.819778 CBFS @ c08000 size 3f8000
387 08:54:52.826224 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 08:54:52.829428 CBFS: Locating 'fallback/romstage'
389 08:54:52.833106 CBFS: Found @ offset 80 size 145fc
390 08:54:52.836176 Accumulated console time in verstage 98 ms
391 08:54:52.836314
392 08:54:52.836417
393 08:54:52.849441 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 08:54:52.855646 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 08:54:52.858994 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 08:54:52.862414 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 08:54:52.868996 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 08:54:52.872448 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 08:54:52.875894 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 08:54:52.879202 TCO_STS: 0000 0000
401 08:54:52.882638 GEN_PMCON: e0015238 00000200
402 08:54:52.886077 GBLRST_CAUSE: 00000000 00000000
403 08:54:52.886167 prev_sleep_state 5
404 08:54:52.889305 Boot Count incremented to 1920
405 08:54:52.895533 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 08:54:52.899557 CBFS @ c08000 size 3f8000
407 08:54:52.905802 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 08:54:52.905890 CBFS: Locating 'fspm.bin'
409 08:54:52.912599 CBFS: Found @ offset 5ffc0 size 71000
410 08:54:52.915374 Chrome EC: UHEPI supported
411 08:54:52.922284 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 08:54:52.925720 Probing TPM: done!
413 08:54:52.932393 Connected to device vid:did:rid of 1ae0:0028:00
414 08:54:52.942303 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 08:54:52.947870 Initialized TPM device CR50 revision 0
416 08:54:52.957137 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 08:54:52.964066 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 08:54:52.967218 MRC cache found, size 1948
419 08:54:52.970758 bootmode is set to: 2
420 08:54:52.974075 PRMRR disabled by config.
421 08:54:52.976929 SPD INDEX = 1
422 08:54:52.980320 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 08:54:52.983575 CBFS @ c08000 size 3f8000
424 08:54:52.990309 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 08:54:52.990399 CBFS: Locating 'spd.bin'
426 08:54:52.993725 CBFS: Found @ offset 5fb80 size 400
427 08:54:52.997083 SPD: module type is LPDDR3
428 08:54:52.999931 SPD: module part is
429 08:54:53.006895 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 08:54:53.010246 SPD: device width 4 bits, bus width 8 bits
431 08:54:53.013498 SPD: module size is 4096 MB (per channel)
432 08:54:53.016813 memory slot: 0 configuration done.
433 08:54:53.020485 memory slot: 2 configuration done.
434 08:54:53.072136 CBMEM:
435 08:54:53.075443 IMD: root @ 99fff000 254 entries.
436 08:54:53.079340 IMD: root @ 99ffec00 62 entries.
437 08:54:53.081929 External stage cache:
438 08:54:53.085260 IMD: root @ 9abff000 254 entries.
439 08:54:53.089133 IMD: root @ 9abfec00 62 entries.
440 08:54:53.092238 Chrome EC: clear events_b mask to 0x0000000020004000
441 08:54:53.108063 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 08:54:53.121100 tlcl_write: response is 0
443 08:54:53.130561 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 08:54:53.137423 MRC: TPM MRC hash updated successfully.
445 08:54:53.137510 2 DIMMs found
446 08:54:53.140786 SMM Memory Map
447 08:54:53.143931 SMRAM : 0x9a000000 0x1000000
448 08:54:53.147306 Subregion 0: 0x9a000000 0xa00000
449 08:54:53.150702 Subregion 1: 0x9aa00000 0x200000
450 08:54:53.153663 Subregion 2: 0x9ac00000 0x400000
451 08:54:53.156916 top_of_ram = 0x9a000000
452 08:54:53.160344 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 08:54:53.166773 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 08:54:53.170041 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 08:54:53.176713 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 08:54:53.179903 CBFS @ c08000 size 3f8000
457 08:54:53.183626 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 08:54:53.186776 CBFS: Locating 'fallback/postcar'
459 08:54:53.193182 CBFS: Found @ offset 107000 size 4b44
460 08:54:53.196903 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 08:54:53.209271 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 08:54:53.212159 Processing 180 relocs. Offset value of 0x97c0c000
463 08:54:53.220746 Accumulated console time in romstage 286 ms
464 08:54:53.220864
465 08:54:53.220961
466 08:54:53.230543 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 08:54:53.237346 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 08:54:53.240747 CBFS @ c08000 size 3f8000
469 08:54:53.244475 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 08:54:53.250426 CBFS: Locating 'fallback/ramstage'
471 08:54:53.253719 CBFS: Found @ offset 43380 size 1b9e8
472 08:54:53.260660 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 08:54:53.292679 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 08:54:53.295782 Processing 3976 relocs. Offset value of 0x98db0000
475 08:54:53.302682 Accumulated console time in postcar 52 ms
476 08:54:53.302770
477 08:54:53.302838
478 08:54:53.312568 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 08:54:53.319292 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 08:54:53.322565 WARNING: RO_VPD is uninitialized or empty.
481 08:54:53.325920 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 08:54:53.332742 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 08:54:53.332835 Normal boot.
484 08:54:53.339146 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 08:54:53.342907 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 08:54:53.345789 CBFS @ c08000 size 3f8000
487 08:54:53.352766 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 08:54:53.356043 CBFS: Locating 'cpu_microcode_blob.bin'
489 08:54:53.359332 CBFS: Found @ offset 14700 size 2ec00
490 08:54:53.362878 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 08:54:53.366079 Skip microcode update
492 08:54:53.372277 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 08:54:53.372402 CBFS @ c08000 size 3f8000
494 08:54:53.379151 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 08:54:53.381951 CBFS: Locating 'fsps.bin'
496 08:54:53.385499 CBFS: Found @ offset d1fc0 size 35000
497 08:54:53.410991 Detected 4 core, 8 thread CPU.
498 08:54:53.414240 Setting up SMI for CPU
499 08:54:53.417772 IED base = 0x9ac00000
500 08:54:53.417859 IED size = 0x00400000
501 08:54:53.421058 Will perform SMM setup.
502 08:54:53.427488 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 08:54:53.434289 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 08:54:53.437279 Processing 16 relocs. Offset value of 0x00030000
505 08:54:53.440870 Attempting to start 7 APs
506 08:54:53.444668 Waiting for 10ms after sending INIT.
507 08:54:53.461182 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
508 08:54:53.461274 done.
509 08:54:53.464227 AP: slot 2 apic_id 6.
510 08:54:53.467090 AP: slot 7 apic_id 7.
511 08:54:53.470983 Waiting for 2nd SIPI to complete...done.
512 08:54:53.473803 AP: slot 5 apic_id 4.
513 08:54:53.473890 AP: slot 6 apic_id 5.
514 08:54:53.477183 AP: slot 4 apic_id 3.
515 08:54:53.480478 AP: slot 1 apic_id 2.
516 08:54:53.487333 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 08:54:53.493477 Processing 13 relocs. Offset value of 0x00038000
518 08:54:53.496846 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 08:54:53.503654 Installing SMM handler to 0x9a000000
520 08:54:53.510632 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 08:54:53.517209 Processing 658 relocs. Offset value of 0x9a010000
522 08:54:53.523827 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 08:54:53.526774 Processing 13 relocs. Offset value of 0x9a008000
524 08:54:53.533596 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 08:54:53.540278 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 08:54:53.546765 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 08:54:53.550070 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 08:54:53.556869 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 08:54:53.562990 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 08:54:53.566180 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 08:54:53.572994 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 08:54:53.576653 Clearing SMI status registers
533 08:54:53.579900 SMI_STS: PM1
534 08:54:53.579978 PM1_STS: PWRBTN
535 08:54:53.583513 TCO_STS: SECOND_TO
536 08:54:53.586739 New SMBASE 0x9a000000
537 08:54:53.590191 In relocation handler: CPU 0
538 08:54:53.593242 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 08:54:53.596622 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 08:54:53.600077 Relocation complete.
541 08:54:53.603385 New SMBASE 0x99fff400
542 08:54:53.603460 In relocation handler: CPU 3
543 08:54:53.610321 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 08:54:53.613697 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 08:54:53.616504 Relocation complete.
546 08:54:53.619869 New SMBASE 0x99fff800
547 08:54:53.619946 In relocation handler: CPU 2
548 08:54:53.626404 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 08:54:53.629807 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 08:54:53.633306 Relocation complete.
551 08:54:53.633387 New SMBASE 0x99ffe400
552 08:54:53.636783 In relocation handler: CPU 7
553 08:54:53.643144 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 08:54:53.646410 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 08:54:53.649894 Relocation complete.
556 08:54:53.649967 New SMBASE 0x99fff000
557 08:54:53.653614 In relocation handler: CPU 4
558 08:54:53.656792 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 08:54:53.663356 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 08:54:53.666741 Relocation complete.
561 08:54:53.666821 New SMBASE 0x99fffc00
562 08:54:53.670076 In relocation handler: CPU 1
563 08:54:53.673372 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
564 08:54:53.680202 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 08:54:53.683179 Relocation complete.
566 08:54:53.683263 New SMBASE 0x99ffec00
567 08:54:53.686761 In relocation handler: CPU 5
568 08:54:53.689728 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
569 08:54:53.696612 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 08:54:53.696714 Relocation complete.
571 08:54:53.700178 New SMBASE 0x99ffe800
572 08:54:53.702731 In relocation handler: CPU 6
573 08:54:53.706540 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
574 08:54:53.713221 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 08:54:53.713308 Relocation complete.
576 08:54:53.716530 Initializing CPU #0
577 08:54:53.719363 CPU: vendor Intel device 806ec
578 08:54:53.722942 CPU: family 06, model 8e, stepping 0c
579 08:54:53.726379 Clearing out pending MCEs
580 08:54:53.729617 Setting up local APIC...
581 08:54:53.729697 apic_id: 0x00 done.
582 08:54:53.732910 Turbo is available but hidden
583 08:54:53.736022 Turbo is available and visible
584 08:54:53.739271 VMX status: enabled
585 08:54:53.742756 IA32_FEATURE_CONTROL status: locked
586 08:54:53.746136 Skip microcode update
587 08:54:53.746218 CPU #0 initialized
588 08:54:53.749612 Initializing CPU #3
589 08:54:53.749686 Initializing CPU #1
590 08:54:53.753316 Initializing CPU #4
591 08:54:53.755986 CPU: vendor Intel device 806ec
592 08:54:53.759469 CPU: family 06, model 8e, stepping 0c
593 08:54:53.762901 CPU: vendor Intel device 806ec
594 08:54:53.766173 CPU: family 06, model 8e, stepping 0c
595 08:54:53.769508 Clearing out pending MCEs
596 08:54:53.772413 Clearing out pending MCEs
597 08:54:53.775757 Setting up local APIC...
598 08:54:53.775842 Initializing CPU #5
599 08:54:53.779281 Initializing CPU #6
600 08:54:53.782944 CPU: vendor Intel device 806ec
601 08:54:53.785619 CPU: family 06, model 8e, stepping 0c
602 08:54:53.789035 CPU: vendor Intel device 806ec
603 08:54:53.792486 CPU: family 06, model 8e, stepping 0c
604 08:54:53.795638 Clearing out pending MCEs
605 08:54:53.799036 Clearing out pending MCEs
606 08:54:53.799122 Setting up local APIC...
607 08:54:53.802353 apic_id: 0x03 done.
608 08:54:53.805476 Setting up local APIC...
609 08:54:53.805561 Initializing CPU #2
610 08:54:53.809235 Initializing CPU #7
611 08:54:53.812057 CPU: vendor Intel device 806ec
612 08:54:53.815605 CPU: family 06, model 8e, stepping 0c
613 08:54:53.818913 CPU: vendor Intel device 806ec
614 08:54:53.822480 CPU: family 06, model 8e, stepping 0c
615 08:54:53.825444 Clearing out pending MCEs
616 08:54:53.828654 Clearing out pending MCEs
617 08:54:53.832121 Setting up local APIC...
618 08:54:53.835556 CPU: vendor Intel device 806ec
619 08:54:53.838979 CPU: family 06, model 8e, stepping 0c
620 08:54:53.842223 Clearing out pending MCEs
621 08:54:53.842302 Setting up local APIC...
622 08:54:53.845498 VMX status: enabled
623 08:54:53.848605 apic_id: 0x02 done.
624 08:54:53.851855 IA32_FEATURE_CONTROL status: locked
625 08:54:53.851935 VMX status: enabled
626 08:54:53.855352 Skip microcode update
627 08:54:53.858840 IA32_FEATURE_CONTROL status: locked
628 08:54:53.861901 CPU #4 initialized
629 08:54:53.861977 Skip microcode update
630 08:54:53.865373 apic_id: 0x05 done.
631 08:54:53.868804 apic_id: 0x06 done.
632 08:54:53.868891 Setting up local APIC...
633 08:54:53.871491 Setting up local APIC...
634 08:54:53.875327 CPU #1 initialized
635 08:54:53.875413 apic_id: 0x01 done.
636 08:54:53.878171 apic_id: 0x04 done.
637 08:54:53.881837 VMX status: enabled
638 08:54:53.881923 VMX status: enabled
639 08:54:53.885177 IA32_FEATURE_CONTROL status: locked
640 08:54:53.888027 IA32_FEATURE_CONTROL status: locked
641 08:54:53.891373 Skip microcode update
642 08:54:53.895018 VMX status: enabled
643 08:54:53.895103 Skip microcode update
644 08:54:53.898207 CPU #6 initialized
645 08:54:53.901570 CPU #5 initialized
646 08:54:53.905019 IA32_FEATURE_CONTROL status: locked
647 08:54:53.905109 apic_id: 0x07 done.
648 08:54:53.907619 VMX status: enabled
649 08:54:53.911085 VMX status: enabled
650 08:54:53.914547 IA32_FEATURE_CONTROL status: locked
651 08:54:53.917953 IA32_FEATURE_CONTROL status: locked
652 08:54:53.918074 Skip microcode update
653 08:54:53.921255 Skip microcode update
654 08:54:53.924295 CPU #2 initialized
655 08:54:53.924425 CPU #7 initialized
656 08:54:53.927575 Skip microcode update
657 08:54:53.930859 CPU #3 initialized
658 08:54:53.934619 bsp_do_flight_plan done after 461 msecs.
659 08:54:53.938063 CPU: frequency set to 4200 MHz
660 08:54:53.938152 Enabling SMIs.
661 08:54:53.940889 Locking SMM.
662 08:54:53.955111 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 08:54:53.958296 CBFS @ c08000 size 3f8000
664 08:54:53.965050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 08:54:53.965138 CBFS: Locating 'vbt.bin'
666 08:54:53.968575 CBFS: Found @ offset 5f5c0 size 499
667 08:54:53.974853 Found a VBT of 4608 bytes after decompression
668 08:54:54.156412 Display FSP Version Info HOB
669 08:54:54.159320 Reference Code - CPU = 9.0.1e.30
670 08:54:54.162674 uCode Version = 0.0.0.ca
671 08:54:54.166012 TXT ACM version = ff.ff.ff.ffff
672 08:54:54.169479 Display FSP Version Info HOB
673 08:54:54.173214 Reference Code - ME = 9.0.1e.30
674 08:54:54.175824 MEBx version = 0.0.0.0
675 08:54:54.179187 ME Firmware Version = Consumer SKU
676 08:54:54.182966 Display FSP Version Info HOB
677 08:54:54.186189 Reference Code - CML PCH = 9.0.1e.30
678 08:54:54.189243 PCH-CRID Status = Disabled
679 08:54:54.192508 PCH-CRID Original Value = ff.ff.ff.ffff
680 08:54:54.195805 PCH-CRID New Value = ff.ff.ff.ffff
681 08:54:54.199407 OPROM - RST - RAID = ff.ff.ff.ffff
682 08:54:54.202819 ChipsetInit Base Version = ff.ff.ff.ffff
683 08:54:54.205614 ChipsetInit Oem Version = ff.ff.ff.ffff
684 08:54:54.208997 Display FSP Version Info HOB
685 08:54:54.215715 Reference Code - SA - System Agent = 9.0.1e.30
686 08:54:54.219198 Reference Code - MRC = 0.7.1.6c
687 08:54:54.219304 SA - PCIe Version = 9.0.1e.30
688 08:54:54.222604 SA-CRID Status = Disabled
689 08:54:54.225513 SA-CRID Original Value = 0.0.0.c
690 08:54:54.229309 SA-CRID New Value = 0.0.0.c
691 08:54:54.232712 OPROM - VBIOS = ff.ff.ff.ffff
692 08:54:54.235409 RTC Init
693 08:54:54.238721 Set power on after power failure.
694 08:54:54.238807 Disabling Deep S3
695 08:54:54.242255 Disabling Deep S3
696 08:54:54.242341 Disabling Deep S4
697 08:54:54.245670 Disabling Deep S4
698 08:54:54.245754 Disabling Deep S5
699 08:54:54.249289 Disabling Deep S5
700 08:54:54.255238 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
701 08:54:54.255326 Enumerating buses...
702 08:54:54.262186 Show all devs... Before device enumeration.
703 08:54:54.262274 Root Device: enabled 1
704 08:54:54.265759 CPU_CLUSTER: 0: enabled 1
705 08:54:54.268511 DOMAIN: 0000: enabled 1
706 08:54:54.271980 APIC: 00: enabled 1
707 08:54:54.272085 PCI: 00:00.0: enabled 1
708 08:54:54.275343 PCI: 00:02.0: enabled 1
709 08:54:54.278824 PCI: 00:04.0: enabled 0
710 08:54:54.281822 PCI: 00:05.0: enabled 0
711 08:54:54.281895 PCI: 00:12.0: enabled 1
712 08:54:54.285188 PCI: 00:12.5: enabled 0
713 08:54:54.288763 PCI: 00:12.6: enabled 0
714 08:54:54.291957 PCI: 00:14.0: enabled 1
715 08:54:54.292044 PCI: 00:14.1: enabled 0
716 08:54:54.295121 PCI: 00:14.3: enabled 1
717 08:54:54.298455 PCI: 00:14.5: enabled 0
718 08:54:54.298564 PCI: 00:15.0: enabled 1
719 08:54:54.302173 PCI: 00:15.1: enabled 1
720 08:54:54.305579 PCI: 00:15.2: enabled 0
721 08:54:54.308328 PCI: 00:15.3: enabled 0
722 08:54:54.308417 PCI: 00:16.0: enabled 1
723 08:54:54.311636 PCI: 00:16.1: enabled 0
724 08:54:54.315005 PCI: 00:16.2: enabled 0
725 08:54:54.318653 PCI: 00:16.3: enabled 0
726 08:54:54.318737 PCI: 00:16.4: enabled 0
727 08:54:54.321665 PCI: 00:16.5: enabled 0
728 08:54:54.325308 PCI: 00:17.0: enabled 1
729 08:54:54.328378 PCI: 00:19.0: enabled 1
730 08:54:54.328462 PCI: 00:19.1: enabled 0
731 08:54:54.331512 PCI: 00:19.2: enabled 0
732 08:54:54.335214 PCI: 00:1a.0: enabled 0
733 08:54:54.335320 PCI: 00:1c.0: enabled 0
734 08:54:54.338130 PCI: 00:1c.1: enabled 0
735 08:54:54.341893 PCI: 00:1c.2: enabled 0
736 08:54:54.344925 PCI: 00:1c.3: enabled 0
737 08:54:54.345001 PCI: 00:1c.4: enabled 0
738 08:54:54.348295 PCI: 00:1c.5: enabled 0
739 08:54:54.351910 PCI: 00:1c.6: enabled 0
740 08:54:54.355172 PCI: 00:1c.7: enabled 0
741 08:54:54.355251 PCI: 00:1d.0: enabled 1
742 08:54:54.358000 PCI: 00:1d.1: enabled 0
743 08:54:54.361606 PCI: 00:1d.2: enabled 0
744 08:54:54.364681 PCI: 00:1d.3: enabled 0
745 08:54:54.364768 PCI: 00:1d.4: enabled 0
746 08:54:54.367821 PCI: 00:1d.5: enabled 1
747 08:54:54.371897 PCI: 00:1e.0: enabled 1
748 08:54:54.371982 PCI: 00:1e.1: enabled 0
749 08:54:54.374860 PCI: 00:1e.2: enabled 1
750 08:54:54.378106 PCI: 00:1e.3: enabled 1
751 08:54:54.381612 PCI: 00:1f.0: enabled 1
752 08:54:54.381698 PCI: 00:1f.1: enabled 1
753 08:54:54.384997 PCI: 00:1f.2: enabled 1
754 08:54:54.387842 PCI: 00:1f.3: enabled 1
755 08:54:54.391537 PCI: 00:1f.4: enabled 1
756 08:54:54.391661 PCI: 00:1f.5: enabled 1
757 08:54:54.394758 PCI: 00:1f.6: enabled 0
758 08:54:54.398227 USB0 port 0: enabled 1
759 08:54:54.398340 I2C: 00:15: enabled 1
760 08:54:54.400880 I2C: 00:5d: enabled 1
761 08:54:54.404215 GENERIC: 0.0: enabled 1
762 08:54:54.408085 I2C: 00:1a: enabled 1
763 08:54:54.408170 I2C: 00:38: enabled 1
764 08:54:54.411476 I2C: 00:39: enabled 1
765 08:54:54.414130 I2C: 00:3a: enabled 1
766 08:54:54.414216 I2C: 00:3b: enabled 1
767 08:54:54.417639 PCI: 00:00.0: enabled 1
768 08:54:54.420970 SPI: 00: enabled 1
769 08:54:54.421063 SPI: 01: enabled 1
770 08:54:54.424504 PNP: 0c09.0: enabled 1
771 08:54:54.427776 USB2 port 0: enabled 1
772 08:54:54.427862 USB2 port 1: enabled 1
773 08:54:54.431395 USB2 port 2: enabled 0
774 08:54:54.434074 USB2 port 3: enabled 0
775 08:54:54.434159 USB2 port 5: enabled 0
776 08:54:54.438051 USB2 port 6: enabled 1
777 08:54:54.441009 USB2 port 9: enabled 1
778 08:54:54.444073 USB3 port 0: enabled 1
779 08:54:54.444158 USB3 port 1: enabled 1
780 08:54:54.447355 USB3 port 2: enabled 1
781 08:54:54.451101 USB3 port 3: enabled 1
782 08:54:54.451192 USB3 port 4: enabled 0
783 08:54:54.454494 APIC: 02: enabled 1
784 08:54:54.457137 APIC: 06: enabled 1
785 08:54:54.457223 APIC: 01: enabled 1
786 08:54:54.460694 APIC: 03: enabled 1
787 08:54:54.460780 APIC: 04: enabled 1
788 08:54:54.463902 APIC: 05: enabled 1
789 08:54:54.467344 APIC: 07: enabled 1
790 08:54:54.467430 Compare with tree...
791 08:54:54.470669 Root Device: enabled 1
792 08:54:54.473912 CPU_CLUSTER: 0: enabled 1
793 08:54:54.477208 APIC: 00: enabled 1
794 08:54:54.477350 APIC: 02: enabled 1
795 08:54:54.480592 APIC: 06: enabled 1
796 08:54:54.484093 APIC: 01: enabled 1
797 08:54:54.484206 APIC: 03: enabled 1
798 08:54:54.487557 APIC: 04: enabled 1
799 08:54:54.490253 APIC: 05: enabled 1
800 08:54:54.490340 APIC: 07: enabled 1
801 08:54:54.493769 DOMAIN: 0000: enabled 1
802 08:54:54.497162 PCI: 00:00.0: enabled 1
803 08:54:54.500588 PCI: 00:02.0: enabled 1
804 08:54:54.500674 PCI: 00:04.0: enabled 0
805 08:54:54.504041 PCI: 00:05.0: enabled 0
806 08:54:54.506938 PCI: 00:12.0: enabled 1
807 08:54:54.510490 PCI: 00:12.5: enabled 0
808 08:54:54.513658 PCI: 00:12.6: enabled 0
809 08:54:54.513743 PCI: 00:14.0: enabled 1
810 08:54:54.516924 USB0 port 0: enabled 1
811 08:54:54.519949 USB2 port 0: enabled 1
812 08:54:54.523591 USB2 port 1: enabled 1
813 08:54:54.526741 USB2 port 2: enabled 0
814 08:54:54.526823 USB2 port 3: enabled 0
815 08:54:54.530209 USB2 port 5: enabled 0
816 08:54:54.533610 USB2 port 6: enabled 1
817 08:54:54.536945 USB2 port 9: enabled 1
818 08:54:54.539918 USB3 port 0: enabled 1
819 08:54:54.543188 USB3 port 1: enabled 1
820 08:54:54.543265 USB3 port 2: enabled 1
821 08:54:54.546631 USB3 port 3: enabled 1
822 08:54:54.549909 USB3 port 4: enabled 0
823 08:54:54.553299 PCI: 00:14.1: enabled 0
824 08:54:54.556639 PCI: 00:14.3: enabled 1
825 08:54:54.556716 PCI: 00:14.5: enabled 0
826 08:54:54.560148 PCI: 00:15.0: enabled 1
827 08:54:54.563681 I2C: 00:15: enabled 1
828 08:54:54.567014 PCI: 00:15.1: enabled 1
829 08:54:54.570111 I2C: 00:5d: enabled 1
830 08:54:54.570189 GENERIC: 0.0: enabled 1
831 08:54:54.573083 PCI: 00:15.2: enabled 0
832 08:54:54.576509 PCI: 00:15.3: enabled 0
833 08:54:54.579636 PCI: 00:16.0: enabled 1
834 08:54:54.583713 PCI: 00:16.1: enabled 0
835 08:54:54.583800 PCI: 00:16.2: enabled 0
836 08:54:54.586326 PCI: 00:16.3: enabled 0
837 08:54:54.590157 PCI: 00:16.4: enabled 0
838 08:54:54.593852 PCI: 00:16.5: enabled 0
839 08:54:54.594004 PCI: 00:17.0: enabled 1
840 08:54:54.596616 PCI: 00:19.0: enabled 1
841 08:54:54.599973 I2C: 00:1a: enabled 1
842 08:54:54.603447 I2C: 00:38: enabled 1
843 08:54:54.606259 I2C: 00:39: enabled 1
844 08:54:54.606345 I2C: 00:3a: enabled 1
845 08:54:54.609772 I2C: 00:3b: enabled 1
846 08:54:54.613317 PCI: 00:19.1: enabled 0
847 08:54:54.616727 PCI: 00:19.2: enabled 0
848 08:54:54.616806 PCI: 00:1a.0: enabled 0
849 08:54:54.619661 PCI: 00:1c.0: enabled 0
850 08:54:54.623285 PCI: 00:1c.1: enabled 0
851 08:54:54.626687 PCI: 00:1c.2: enabled 0
852 08:54:54.630067 PCI: 00:1c.3: enabled 0
853 08:54:54.630154 PCI: 00:1c.4: enabled 0
854 08:54:54.633512 PCI: 00:1c.5: enabled 0
855 08:54:54.636178 PCI: 00:1c.6: enabled 0
856 08:54:54.639962 PCI: 00:1c.7: enabled 0
857 08:54:54.642877 PCI: 00:1d.0: enabled 1
858 08:54:54.642963 PCI: 00:1d.1: enabled 0
859 08:54:54.646027 PCI: 00:1d.2: enabled 0
860 08:54:54.649278 PCI: 00:1d.3: enabled 0
861 08:54:54.652843 PCI: 00:1d.4: enabled 0
862 08:54:54.656028 PCI: 00:1d.5: enabled 1
863 08:54:54.656110 PCI: 00:00.0: enabled 1
864 08:54:54.659367 PCI: 00:1e.0: enabled 1
865 08:54:54.662717 PCI: 00:1e.1: enabled 0
866 08:54:54.665903 PCI: 00:1e.2: enabled 1
867 08:54:54.665982 SPI: 00: enabled 1
868 08:54:54.669305 PCI: 00:1e.3: enabled 1
869 08:54:54.672799 SPI: 01: enabled 1
870 08:54:54.676051 PCI: 00:1f.0: enabled 1
871 08:54:54.678950 PNP: 0c09.0: enabled 1
872 08:54:54.679028 PCI: 00:1f.1: enabled 1
873 08:54:54.682635 PCI: 00:1f.2: enabled 1
874 08:54:54.685780 PCI: 00:1f.3: enabled 1
875 08:54:54.688891 PCI: 00:1f.4: enabled 1
876 08:54:54.691977 PCI: 00:1f.5: enabled 1
877 08:54:54.692054 PCI: 00:1f.6: enabled 0
878 08:54:54.695708 Root Device scanning...
879 08:54:54.699203 scan_static_bus for Root Device
880 08:54:54.702315 CPU_CLUSTER: 0 enabled
881 08:54:54.702393 DOMAIN: 0000 enabled
882 08:54:54.705701 DOMAIN: 0000 scanning...
883 08:54:54.708578 PCI: pci_scan_bus for bus 00
884 08:54:54.711990 PCI: 00:00.0 [8086/0000] ops
885 08:54:54.715578 PCI: 00:00.0 [8086/9b61] enabled
886 08:54:54.719002 PCI: 00:02.0 [8086/0000] bus ops
887 08:54:54.721806 PCI: 00:02.0 [8086/9b41] enabled
888 08:54:54.725298 PCI: 00:04.0 [8086/1903] disabled
889 08:54:54.728711 PCI: 00:08.0 [8086/1911] enabled
890 08:54:54.732401 PCI: 00:12.0 [8086/02f9] enabled
891 08:54:54.734936 PCI: 00:14.0 [8086/0000] bus ops
892 08:54:54.738480 PCI: 00:14.0 [8086/02ed] enabled
893 08:54:54.741991 PCI: 00:14.2 [8086/02ef] enabled
894 08:54:54.745220 PCI: 00:14.3 [8086/02f0] enabled
895 08:54:54.748514 PCI: 00:15.0 [8086/0000] bus ops
896 08:54:54.751564 PCI: 00:15.0 [8086/02e8] enabled
897 08:54:54.755384 PCI: 00:15.1 [8086/0000] bus ops
898 08:54:54.758403 PCI: 00:15.1 [8086/02e9] enabled
899 08:54:54.761828 PCI: 00:16.0 [8086/0000] ops
900 08:54:54.764871 PCI: 00:16.0 [8086/02e0] enabled
901 08:54:54.768786 PCI: 00:17.0 [8086/0000] ops
902 08:54:54.771763 PCI: 00:17.0 [8086/02d3] enabled
903 08:54:54.775241 PCI: 00:19.0 [8086/0000] bus ops
904 08:54:54.778392 PCI: 00:19.0 [8086/02c5] enabled
905 08:54:54.781668 PCI: 00:1d.0 [8086/0000] bus ops
906 08:54:54.785042 PCI: 00:1d.0 [8086/02b0] enabled
907 08:54:54.791840 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 08:54:54.795135 PCI: 00:1e.0 [8086/0000] ops
909 08:54:54.798320 PCI: 00:1e.0 [8086/02a8] enabled
910 08:54:54.801649 PCI: 00:1e.2 [8086/0000] bus ops
911 08:54:54.804773 PCI: 00:1e.2 [8086/02aa] enabled
912 08:54:54.808478 PCI: 00:1e.3 [8086/0000] bus ops
913 08:54:54.811767 PCI: 00:1e.3 [8086/02ab] enabled
914 08:54:54.814917 PCI: 00:1f.0 [8086/0000] bus ops
915 08:54:54.818597 PCI: 00:1f.0 [8086/0284] enabled
916 08:54:54.821159 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 08:54:54.828065 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 08:54:54.831614 PCI: 00:1f.3 [8086/0000] bus ops
919 08:54:54.834374 PCI: 00:1f.3 [8086/02c8] enabled
920 08:54:54.837933 PCI: 00:1f.4 [8086/0000] bus ops
921 08:54:54.841406 PCI: 00:1f.4 [8086/02a3] enabled
922 08:54:54.844896 PCI: 00:1f.5 [8086/0000] bus ops
923 08:54:54.847658 PCI: 00:1f.5 [8086/02a4] enabled
924 08:54:54.851371 PCI: Leftover static devices:
925 08:54:54.851459 PCI: 00:05.0
926 08:54:54.854782 PCI: 00:12.5
927 08:54:54.854869 PCI: 00:12.6
928 08:54:54.858001 PCI: 00:14.1
929 08:54:54.858087 PCI: 00:14.5
930 08:54:54.858156 PCI: 00:15.2
931 08:54:54.861352 PCI: 00:15.3
932 08:54:54.861466 PCI: 00:16.1
933 08:54:54.864835 PCI: 00:16.2
934 08:54:54.864922 PCI: 00:16.3
935 08:54:54.864991 PCI: 00:16.4
936 08:54:54.868013 PCI: 00:16.5
937 08:54:54.868099 PCI: 00:19.1
938 08:54:54.871284 PCI: 00:19.2
939 08:54:54.871370 PCI: 00:1a.0
940 08:54:54.874465 PCI: 00:1c.0
941 08:54:54.874579 PCI: 00:1c.1
942 08:54:54.874678 PCI: 00:1c.2
943 08:54:54.877683 PCI: 00:1c.3
944 08:54:54.877758 PCI: 00:1c.4
945 08:54:54.880979 PCI: 00:1c.5
946 08:54:54.881066 PCI: 00:1c.6
947 08:54:54.881135 PCI: 00:1c.7
948 08:54:54.884137 PCI: 00:1d.1
949 08:54:54.884223 PCI: 00:1d.2
950 08:54:54.887737 PCI: 00:1d.3
951 08:54:54.887824 PCI: 00:1d.4
952 08:54:54.887893 PCI: 00:1d.5
953 08:54:54.890770 PCI: 00:1e.1
954 08:54:54.890856 PCI: 00:1f.1
955 08:54:54.894221 PCI: 00:1f.2
956 08:54:54.894309 PCI: 00:1f.6
957 08:54:54.897615 PCI: Check your devicetree.cb.
958 08:54:54.900945 PCI: 00:02.0 scanning...
959 08:54:54.904337 scan_generic_bus for PCI: 00:02.0
960 08:54:54.907237 scan_generic_bus for PCI: 00:02.0 done
961 08:54:54.914162 scan_bus: scanning of bus PCI: 00:02.0 took 10176 usecs
962 08:54:54.917520 PCI: 00:14.0 scanning...
963 08:54:54.921035 scan_static_bus for PCI: 00:14.0
964 08:54:54.921124 USB0 port 0 enabled
965 08:54:54.924166 USB0 port 0 scanning...
966 08:54:54.927744 scan_static_bus for USB0 port 0
967 08:54:54.931133 USB2 port 0 enabled
968 08:54:54.931258 USB2 port 1 enabled
969 08:54:54.933867 USB2 port 2 disabled
970 08:54:54.937554 USB2 port 3 disabled
971 08:54:54.937709 USB2 port 5 disabled
972 08:54:54.940996 USB2 port 6 enabled
973 08:54:54.941125 USB2 port 9 enabled
974 08:54:54.943842 USB3 port 0 enabled
975 08:54:54.947366 USB3 port 1 enabled
976 08:54:54.947446 USB3 port 2 enabled
977 08:54:54.950937 USB3 port 3 enabled
978 08:54:54.953938 USB3 port 4 disabled
979 08:54:54.954043 USB2 port 0 scanning...
980 08:54:54.957333 scan_static_bus for USB2 port 0
981 08:54:54.960780 scan_static_bus for USB2 port 0 done
982 08:54:54.967040 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
983 08:54:54.970605 USB2 port 1 scanning...
984 08:54:54.973484 scan_static_bus for USB2 port 1
985 08:54:54.976921 scan_static_bus for USB2 port 1 done
986 08:54:54.983968 scan_bus: scanning of bus USB2 port 1 took 9678 usecs
987 08:54:54.984071 USB2 port 6 scanning...
988 08:54:54.986747 scan_static_bus for USB2 port 6
989 08:54:54.993560 scan_static_bus for USB2 port 6 done
990 08:54:54.996944 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
991 08:54:55.000467 USB2 port 9 scanning...
992 08:54:55.003424 scan_static_bus for USB2 port 9
993 08:54:55.006617 scan_static_bus for USB2 port 9 done
994 08:54:55.013107 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
995 08:54:55.013202 USB3 port 0 scanning...
996 08:54:55.016783 scan_static_bus for USB3 port 0
997 08:54:55.023910 scan_static_bus for USB3 port 0 done
998 08:54:55.026838 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
999 08:54:55.029924 USB3 port 1 scanning...
1000 08:54:55.033860 scan_static_bus for USB3 port 1
1001 08:54:55.036971 scan_static_bus for USB3 port 1 done
1002 08:54:55.043325 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
1003 08:54:55.043412 USB3 port 2 scanning...
1004 08:54:55.046889 scan_static_bus for USB3 port 2
1005 08:54:55.053591 scan_static_bus for USB3 port 2 done
1006 08:54:55.057010 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1007 08:54:55.059814 USB3 port 3 scanning...
1008 08:54:55.063377 scan_static_bus for USB3 port 3
1009 08:54:55.066937 scan_static_bus for USB3 port 3 done
1010 08:54:55.073553 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
1011 08:54:55.077028 scan_static_bus for USB0 port 0 done
1012 08:54:55.083051 scan_bus: scanning of bus USB0 port 0 took 155299 usecs
1013 08:54:55.087004 scan_static_bus for PCI: 00:14.0 done
1014 08:54:55.090287 scan_bus: scanning of bus PCI: 00:14.0 took 172913 usecs
1015 08:54:55.093387 PCI: 00:15.0 scanning...
1016 08:54:55.096900 scan_generic_bus for PCI: 00:15.0
1017 08:54:55.099674 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 08:54:55.106808 scan_generic_bus for PCI: 00:15.0 done
1019 08:54:55.110337 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1020 08:54:55.112974 PCI: 00:15.1 scanning...
1021 08:54:55.116242 scan_generic_bus for PCI: 00:15.1
1022 08:54:55.120143 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 08:54:55.126246 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 08:54:55.129466 scan_generic_bus for PCI: 00:15.1 done
1025 08:54:55.136640 scan_bus: scanning of bus PCI: 00:15.1 took 18594 usecs
1026 08:54:55.136724 PCI: 00:19.0 scanning...
1027 08:54:55.139558 scan_generic_bus for PCI: 00:19.0
1028 08:54:55.146723 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 08:54:55.149989 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 08:54:55.153250 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 08:54:55.156385 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 08:54:55.163086 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 08:54:55.166840 scan_generic_bus for PCI: 00:19.0 done
1034 08:54:55.169669 scan_bus: scanning of bus PCI: 00:19.0 took 30715 usecs
1035 08:54:55.173083 PCI: 00:1d.0 scanning...
1036 08:54:55.176645 do_pci_scan_bridge for PCI: 00:1d.0
1037 08:54:55.179396 PCI: pci_scan_bus for bus 01
1038 08:54:55.182801 PCI: 01:00.0 [1c5c/1327] enabled
1039 08:54:55.185994 Enabling Common Clock Configuration
1040 08:54:55.192743 L1 Sub-State supported from root port 29
1041 08:54:55.195950 L1 Sub-State Support = 0xf
1042 08:54:55.196037 CommonModeRestoreTime = 0x28
1043 08:54:55.202966 Power On Value = 0x16, Power On Scale = 0x0
1044 08:54:55.203050 ASPM: Enabled L1
1045 08:54:55.209434 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1046 08:54:55.212968 PCI: 00:1e.2 scanning...
1047 08:54:55.216202 scan_generic_bus for PCI: 00:1e.2
1048 08:54:55.219052 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 08:54:55.222498 scan_generic_bus for PCI: 00:1e.2 done
1050 08:54:55.229413 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1051 08:54:55.232273 PCI: 00:1e.3 scanning...
1052 08:54:55.236087 scan_generic_bus for PCI: 00:1e.3
1053 08:54:55.239421 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 08:54:55.242977 scan_generic_bus for PCI: 00:1e.3 done
1055 08:54:55.248855 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1056 08:54:55.248939 PCI: 00:1f.0 scanning...
1057 08:54:55.252633 scan_static_bus for PCI: 00:1f.0
1058 08:54:55.256034 PNP: 0c09.0 enabled
1059 08:54:55.259095 scan_static_bus for PCI: 00:1f.0 done
1060 08:54:55.266038 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1061 08:54:55.269237 PCI: 00:1f.3 scanning...
1062 08:54:55.272824 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1063 08:54:55.276078 PCI: 00:1f.4 scanning...
1064 08:54:55.279481 scan_generic_bus for PCI: 00:1f.4
1065 08:54:55.282322 scan_generic_bus for PCI: 00:1f.4 done
1066 08:54:55.289155 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1067 08:54:55.292490 PCI: 00:1f.5 scanning...
1068 08:54:55.295651 scan_generic_bus for PCI: 00:1f.5
1069 08:54:55.298955 scan_generic_bus for PCI: 00:1f.5 done
1070 08:54:55.305964 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1071 08:54:55.312242 scan_bus: scanning of bus DOMAIN: 0000 took 604777 usecs
1072 08:54:55.315777 scan_static_bus for Root Device done
1073 08:54:55.319309 scan_bus: scanning of bus Root Device took 624643 usecs
1074 08:54:55.322478 done
1075 08:54:55.325652 Chrome EC: UHEPI supported
1076 08:54:55.329098 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 08:54:55.335974 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 08:54:55.342543 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 08:54:55.348858 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 08:54:55.352222 SPI flash protection: WPSW=0 SRP0=0
1081 08:54:55.358722 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 08:54:55.362034 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 08:54:55.365399 found VGA at PCI: 00:02.0
1084 08:54:55.368862 Setting up VGA for PCI: 00:02.0
1085 08:54:55.375639 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 08:54:55.378977 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 08:54:55.382150 Allocating resources...
1088 08:54:55.385401 Reading resources...
1089 08:54:55.388528 Root Device read_resources bus 0 link: 0
1090 08:54:55.391594 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 08:54:55.398409 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 08:54:55.401714 DOMAIN: 0000 read_resources bus 0 link: 0
1093 08:54:55.408884 PCI: 00:14.0 read_resources bus 0 link: 0
1094 08:54:55.412172 USB0 port 0 read_resources bus 0 link: 0
1095 08:54:55.420170 USB0 port 0 read_resources bus 0 link: 0 done
1096 08:54:55.423386 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 08:54:55.430910 PCI: 00:15.0 read_resources bus 1 link: 0
1098 08:54:55.434471 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 08:54:55.440916 PCI: 00:15.1 read_resources bus 2 link: 0
1100 08:54:55.444504 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 08:54:55.451636 PCI: 00:19.0 read_resources bus 3 link: 0
1102 08:54:55.458786 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 08:54:55.462006 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 08:54:55.468682 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 08:54:55.471975 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 08:54:55.478157 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 08:54:55.481771 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 08:54:55.488568 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 08:54:55.491362 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 08:54:55.498644 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 08:54:55.504735 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 08:54:55.507941 Root Device read_resources bus 0 link: 0 done
1113 08:54:55.511333 Done reading resources.
1114 08:54:55.514876 Show resources in subtree (Root Device)...After reading.
1115 08:54:55.521425 Root Device child on link 0 CPU_CLUSTER: 0
1116 08:54:55.524834 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 08:54:55.524919 APIC: 00
1118 08:54:55.528174 APIC: 02
1119 08:54:55.528252 APIC: 06
1120 08:54:55.531754 APIC: 01
1121 08:54:55.531845 APIC: 03
1122 08:54:55.531920 APIC: 04
1123 08:54:55.535043 APIC: 05
1124 08:54:55.535124 APIC: 07
1125 08:54:55.537731 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 08:54:55.594710 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 08:54:55.595032 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 08:54:55.595162 PCI: 00:00.0
1129 08:54:55.595249 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 08:54:55.595361 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 08:54:55.595680 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 08:54:55.621715 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 08:54:55.622411 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 08:54:55.622683 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 08:54:55.626143 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 08:54:55.636217 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 08:54:55.645882 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 08:54:55.652137 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 08:54:55.662446 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 08:54:55.672609 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 08:54:55.682000 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 08:54:55.692523 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 08:54:55.701772 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 08:54:55.708591 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 08:54:55.712035 PCI: 00:02.0
1146 08:54:55.721590 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 08:54:55.732086 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 08:54:55.741519 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 08:54:55.741616 PCI: 00:04.0
1150 08:54:55.745270 PCI: 00:08.0
1151 08:54:55.754844 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 08:54:55.754927 PCI: 00:12.0
1153 08:54:55.764627 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 08:54:55.768038 PCI: 00:14.0 child on link 0 USB0 port 0
1155 08:54:55.778513 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 08:54:55.784525 USB0 port 0 child on link 0 USB2 port 0
1157 08:54:55.784615 USB2 port 0
1158 08:54:55.788260 USB2 port 1
1159 08:54:55.788391 USB2 port 2
1160 08:54:55.791662 USB2 port 3
1161 08:54:55.791744 USB2 port 5
1162 08:54:55.795208 USB2 port 6
1163 08:54:55.798312 USB2 port 9
1164 08:54:55.798485 USB3 port 0
1165 08:54:55.801536 USB3 port 1
1166 08:54:55.801611 USB3 port 2
1167 08:54:55.804313 USB3 port 3
1168 08:54:55.804384 USB3 port 4
1169 08:54:55.807889 PCI: 00:14.2
1170 08:54:55.818461 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 08:54:55.827937 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 08:54:55.828022 PCI: 00:14.3
1173 08:54:55.837942 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 08:54:55.841267 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 08:54:55.851372 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 08:54:55.854710 I2C: 01:15
1177 08:54:55.858005 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 08:54:55.867696 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 08:54:55.871325 I2C: 02:5d
1180 08:54:55.871409 GENERIC: 0.0
1181 08:54:55.874119 PCI: 00:16.0
1182 08:54:55.883961 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 08:54:55.884046 PCI: 00:17.0
1184 08:54:55.893804 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 08:54:55.903840 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 08:54:55.910399 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 08:54:55.920114 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 08:54:55.926963 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 08:54:55.936628 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 08:54:55.939903 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 08:54:55.949912 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 08:54:55.953161 I2C: 03:1a
1193 08:54:55.953243 I2C: 03:38
1194 08:54:55.957060 I2C: 03:39
1195 08:54:55.957142 I2C: 03:3a
1196 08:54:55.959626 I2C: 03:3b
1197 08:54:55.963492 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 08:54:55.973364 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 08:54:55.983471 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 08:54:55.989635 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 08:54:55.993056 PCI: 01:00.0
1202 08:54:56.002882 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 08:54:56.002967 PCI: 00:1e.0
1204 08:54:56.016154 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 08:54:56.026146 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 08:54:56.029655 PCI: 00:1e.2 child on link 0 SPI: 00
1207 08:54:56.039501 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 08:54:56.039585 SPI: 00
1209 08:54:56.043029 PCI: 00:1e.3 child on link 0 SPI: 01
1210 08:54:56.052606 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 08:54:56.055824 SPI: 01
1212 08:54:56.059184 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 08:54:56.069511 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 08:54:56.075951 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 08:54:56.079137 PNP: 0c09.0
1216 08:54:56.088988 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 08:54:56.089072 PCI: 00:1f.3
1218 08:54:56.099150 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 08:54:56.108933 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 08:54:56.112168 PCI: 00:1f.4
1221 08:54:56.118792 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 08:54:56.128695 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 08:54:56.131983 PCI: 00:1f.5
1224 08:54:56.141804 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 08:54:56.148238 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 08:54:56.154808 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 08:54:56.161789 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 08:54:56.165011 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 08:54:56.168539 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 08:54:56.171496 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 08:54:56.174720 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 08:54:56.181308 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 08:54:56.188463 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 08:54:56.194621 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 08:54:56.204481 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 08:54:56.211301 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 08:54:56.214775 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 08:54:56.224419 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 08:54:56.227838 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 08:54:56.231037 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 08:54:56.237868 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 08:54:56.241114 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 08:54:56.247906 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 08:54:56.250903 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 08:54:56.257728 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 08:54:56.261189 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 08:54:56.267236 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 08:54:56.270758 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 08:54:56.277467 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 08:54:56.280865 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 08:54:56.287388 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 08:54:56.290795 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 08:54:56.294006 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 08:54:56.300698 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 08:54:56.303908 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 08:54:56.310380 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 08:54:56.313435 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 08:54:56.320202 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 08:54:56.323691 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 08:54:56.330603 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 08:54:56.333303 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 08:54:56.343507 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 08:54:56.346775 avoid_fixed_resources: DOMAIN: 0000
1264 08:54:56.353436 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 08:54:56.360458 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 08:54:56.366457 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 08:54:56.373200 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 08:54:56.380106 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 08:54:56.389818 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 08:54:56.396319 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 08:54:56.402867 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 08:54:56.413028 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 08:54:56.419778 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 08:54:56.425928 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 08:54:56.433037 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 08:54:56.435777 Setting resources...
1277 08:54:56.442884 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 08:54:56.445714 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 08:54:56.449072 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 08:54:56.455924 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 08:54:56.459296 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 08:54:56.466067 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 08:54:56.472224 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 08:54:56.479212 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 08:54:56.485531 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 08:54:56.488934 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 08:54:56.495280 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 08:54:56.498530 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 08:54:56.505313 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 08:54:56.508432 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 08:54:56.515056 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 08:54:56.518279 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 08:54:56.525237 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 08:54:56.528588 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 08:54:56.535265 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 08:54:56.538477 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 08:54:56.545473 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 08:54:56.548305 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 08:54:56.551692 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 08:54:56.558512 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 08:54:56.561797 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 08:54:56.568321 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 08:54:56.571683 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 08:54:56.578178 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 08:54:56.581565 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 08:54:56.588416 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 08:54:56.591686 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 08:54:56.598179 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 08:54:56.604735 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 08:54:56.611506 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 08:54:56.618190 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 08:54:56.627683 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 08:54:56.631098 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 08:54:56.638098 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 08:54:56.644205 Root Device assign_resources, bus 0 link: 0
1316 08:54:56.647492 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 08:54:56.657424 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 08:54:56.664256 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 08:54:56.674130 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 08:54:56.681032 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 08:54:56.691095 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 08:54:56.697481 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 08:54:56.700244 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 08:54:56.707151 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 08:54:56.713949 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 08:54:56.723630 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 08:54:56.730281 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 08:54:56.740617 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 08:54:56.743988 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 08:54:56.750328 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 08:54:56.757116 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 08:54:56.760550 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 08:54:56.766958 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 08:54:56.773526 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 08:54:56.783657 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 08:54:56.789797 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 08:54:56.797036 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 08:54:56.806478 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 08:54:56.812986 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 08:54:56.819737 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 08:54:56.830225 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 08:54:56.833452 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 08:54:56.840325 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 08:54:56.846727 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 08:54:56.856176 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 08:54:56.866561 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 08:54:56.869931 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 08:54:56.876104 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 08:54:56.883412 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 08:54:56.889981 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 08:54:56.899664 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 08:54:56.903008 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 08:54:56.909122 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 08:54:56.915781 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 08:54:56.919573 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 08:54:56.926499 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 08:54:56.929412 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 08:54:56.936172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 08:54:56.939576 LPC: Trying to open IO window from 800 size 1ff
1360 08:54:56.949587 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 08:54:56.956171 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 08:54:56.966098 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 08:54:56.972651 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 08:54:56.979487 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 08:54:56.982187 Root Device assign_resources, bus 0 link: 0
1366 08:54:56.985799 Done setting resources.
1367 08:54:56.992439 Show resources in subtree (Root Device)...After assigning values.
1368 08:54:56.995510 Root Device child on link 0 CPU_CLUSTER: 0
1369 08:54:56.999070 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 08:54:57.002247 APIC: 00
1371 08:54:57.002332 APIC: 02
1372 08:54:57.002403 APIC: 06
1373 08:54:57.005465 APIC: 01
1374 08:54:57.005549 APIC: 03
1375 08:54:57.009128 APIC: 04
1376 08:54:57.009211 APIC: 05
1377 08:54:57.009276 APIC: 07
1378 08:54:57.015450 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 08:54:57.025700 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 08:54:57.035219 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 08:54:57.035304 PCI: 00:00.0
1382 08:54:57.045089 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 08:54:57.055064 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 08:54:57.065008 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 08:54:57.074492 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 08:54:57.084991 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 08:54:57.094670 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 08:54:57.101553 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 08:54:57.111139 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 08:54:57.120800 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 08:54:57.130680 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 08:54:57.140507 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 08:54:57.150986 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 08:54:57.156936 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 08:54:57.167066 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 08:54:57.176839 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 08:54:57.186849 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 08:54:57.186944 PCI: 00:02.0
1399 08:54:57.200329 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 08:54:57.209726 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 08:54:57.220026 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 08:54:57.220145 PCI: 00:04.0
1403 08:54:57.222842 PCI: 00:08.0
1404 08:54:57.233046 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 08:54:57.233160 PCI: 00:12.0
1406 08:54:57.243014 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 08:54:57.249622 PCI: 00:14.0 child on link 0 USB0 port 0
1408 08:54:57.259245 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 08:54:57.262903 USB0 port 0 child on link 0 USB2 port 0
1410 08:54:57.266447 USB2 port 0
1411 08:54:57.266533 USB2 port 1
1412 08:54:57.269515 USB2 port 2
1413 08:54:57.269600 USB2 port 3
1414 08:54:57.272858 USB2 port 5
1415 08:54:57.272974 USB2 port 6
1416 08:54:57.276197 USB2 port 9
1417 08:54:57.276316 USB3 port 0
1418 08:54:57.279751 USB3 port 1
1419 08:54:57.282790 USB3 port 2
1420 08:54:57.282909 USB3 port 3
1421 08:54:57.285956 USB3 port 4
1422 08:54:57.286037 PCI: 00:14.2
1423 08:54:57.296063 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 08:54:57.305640 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 08:54:57.309352 PCI: 00:14.3
1426 08:54:57.319087 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 08:54:57.322289 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 08:54:57.332470 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 08:54:57.335946 I2C: 01:15
1430 08:54:57.338692 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 08:54:57.348968 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 08:54:57.352219 I2C: 02:5d
1433 08:54:57.352343 GENERIC: 0.0
1434 08:54:57.355731 PCI: 00:16.0
1435 08:54:57.365425 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 08:54:57.365513 PCI: 00:17.0
1437 08:54:57.378748 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 08:54:57.388587 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 08:54:57.395029 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 08:54:57.404874 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 08:54:57.414703 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 08:54:57.424377 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 08:54:57.428108 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 08:54:57.437684 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 08:54:57.441106 I2C: 03:1a
1446 08:54:57.441193 I2C: 03:38
1447 08:54:57.444794 I2C: 03:39
1448 08:54:57.444879 I2C: 03:3a
1449 08:54:57.447552 I2C: 03:3b
1450 08:54:57.451132 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 08:54:57.461023 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 08:54:57.470534 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 08:54:57.480707 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 08:54:57.484200 PCI: 01:00.0
1455 08:54:57.494222 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 08:54:57.494308 PCI: 00:1e.0
1457 08:54:57.506663 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 08:54:57.516634 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 08:54:57.519940 PCI: 00:1e.2 child on link 0 SPI: 00
1460 08:54:57.530149 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 08:54:57.533267 SPI: 00
1462 08:54:57.537006 PCI: 00:1e.3 child on link 0 SPI: 01
1463 08:54:57.547051 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 08:54:57.547192 SPI: 01
1465 08:54:57.553479 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 08:54:57.559790 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 08:54:57.569796 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 08:54:57.569886 PNP: 0c09.0
1469 08:54:57.579878 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 08:54:57.582808 PCI: 00:1f.3
1471 08:54:57.593123 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 08:54:57.603032 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 08:54:57.603133 PCI: 00:1f.4
1474 08:54:57.613003 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 08:54:57.623204 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 08:54:57.625860 PCI: 00:1f.5
1477 08:54:57.635787 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 08:54:57.639088 Done allocating resources.
1479 08:54:57.642417 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 08:54:57.645982 Enabling resources...
1481 08:54:57.648847 PCI: 00:00.0 subsystem <- 8086/9b61
1482 08:54:57.652438 PCI: 00:00.0 cmd <- 06
1483 08:54:57.656009 PCI: 00:02.0 subsystem <- 8086/9b41
1484 08:54:57.658835 PCI: 00:02.0 cmd <- 03
1485 08:54:57.662373 PCI: 00:08.0 cmd <- 06
1486 08:54:57.665912 PCI: 00:12.0 subsystem <- 8086/02f9
1487 08:54:57.669205 PCI: 00:12.0 cmd <- 02
1488 08:54:57.672570 PCI: 00:14.0 subsystem <- 8086/02ed
1489 08:54:57.675534 PCI: 00:14.0 cmd <- 02
1490 08:54:57.675619 PCI: 00:14.2 cmd <- 02
1491 08:54:57.682075 PCI: 00:14.3 subsystem <- 8086/02f0
1492 08:54:57.682161 PCI: 00:14.3 cmd <- 02
1493 08:54:57.685664 PCI: 00:15.0 subsystem <- 8086/02e8
1494 08:54:57.688782 PCI: 00:15.0 cmd <- 02
1495 08:54:57.692489 PCI: 00:15.1 subsystem <- 8086/02e9
1496 08:54:57.695622 PCI: 00:15.1 cmd <- 02
1497 08:54:57.699011 PCI: 00:16.0 subsystem <- 8086/02e0
1498 08:54:57.701946 PCI: 00:16.0 cmd <- 02
1499 08:54:57.705583 PCI: 00:17.0 subsystem <- 8086/02d3
1500 08:54:57.708665 PCI: 00:17.0 cmd <- 03
1501 08:54:57.712447 PCI: 00:19.0 subsystem <- 8086/02c5
1502 08:54:57.715685 PCI: 00:19.0 cmd <- 02
1503 08:54:57.718632 PCI: 00:1d.0 bridge ctrl <- 0013
1504 08:54:57.722124 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 08:54:57.725817 PCI: 00:1d.0 cmd <- 06
1506 08:54:57.728325 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 08:54:57.731748 PCI: 00:1e.0 cmd <- 06
1508 08:54:57.735299 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 08:54:57.735386 PCI: 00:1e.2 cmd <- 06
1510 08:54:57.741987 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 08:54:57.742102 PCI: 00:1e.3 cmd <- 02
1512 08:54:57.745095 PCI: 00:1f.0 subsystem <- 8086/0284
1513 08:54:57.748667 PCI: 00:1f.0 cmd <- 407
1514 08:54:57.751823 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 08:54:57.755151 PCI: 00:1f.3 cmd <- 02
1516 08:54:57.758650 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 08:54:57.762274 PCI: 00:1f.4 cmd <- 03
1518 08:54:57.764923 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 08:54:57.768467 PCI: 00:1f.5 cmd <- 406
1520 08:54:57.777492 PCI: 01:00.0 cmd <- 02
1521 08:54:57.782086 done.
1522 08:54:57.795653 ME: Version: 14.0.39.1367
1523 08:54:57.801770 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1524 08:54:57.804966 Initializing devices...
1525 08:54:57.805105 Root Device init ...
1526 08:54:57.811968 Chrome EC: Set SMI mask to 0x0000000000000000
1527 08:54:57.815190 Chrome EC: clear events_b mask to 0x0000000000000000
1528 08:54:57.821806 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 08:54:57.828438 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 08:54:57.835299 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 08:54:57.838557 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 08:54:57.841825 Root Device init finished in 35217 usecs
1533 08:54:57.845075 CPU_CLUSTER: 0 init ...
1534 08:54:57.851966 CPU_CLUSTER: 0 init finished in 2447 usecs
1535 08:54:57.856029 PCI: 00:00.0 init ...
1536 08:54:57.859768 CPU TDP: 15 Watts
1537 08:54:57.862806 CPU PL2 = 64 Watts
1538 08:54:57.866016 PCI: 00:00.0 init finished in 7084 usecs
1539 08:54:57.869639 PCI: 00:02.0 init ...
1540 08:54:57.872402 PCI: 00:02.0 init finished in 2254 usecs
1541 08:54:57.876156 PCI: 00:08.0 init ...
1542 08:54:57.879447 PCI: 00:08.0 init finished in 2253 usecs
1543 08:54:57.882956 PCI: 00:12.0 init ...
1544 08:54:57.886387 PCI: 00:12.0 init finished in 2252 usecs
1545 08:54:57.889240 PCI: 00:14.0 init ...
1546 08:54:57.892766 PCI: 00:14.0 init finished in 2244 usecs
1547 08:54:57.896151 PCI: 00:14.2 init ...
1548 08:54:57.898847 PCI: 00:14.2 init finished in 2252 usecs
1549 08:54:57.902424 PCI: 00:14.3 init ...
1550 08:54:57.905652 PCI: 00:14.3 init finished in 2270 usecs
1551 08:54:57.909329 PCI: 00:15.0 init ...
1552 08:54:57.912966 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 08:54:57.915695 PCI: 00:15.0 init finished in 5980 usecs
1554 08:54:57.919023 PCI: 00:15.1 init ...
1555 08:54:57.922724 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 08:54:57.928698 PCI: 00:15.1 init finished in 5978 usecs
1557 08:54:57.928799 PCI: 00:16.0 init ...
1558 08:54:57.935273 PCI: 00:16.0 init finished in 2254 usecs
1559 08:54:57.938932 PCI: 00:19.0 init ...
1560 08:54:57.942257 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 08:54:57.945503 PCI: 00:19.0 init finished in 5977 usecs
1562 08:54:57.948705 PCI: 00:1d.0 init ...
1563 08:54:57.951933 Initializing PCH PCIe bridge.
1564 08:54:57.954990 PCI: 00:1d.0 init finished in 5287 usecs
1565 08:54:57.958576 PCI: 00:1f.0 init ...
1566 08:54:57.962043 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 08:54:57.968764 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 08:54:57.968917 IOAPIC: ID = 0x02
1569 08:54:57.971765 IOAPIC: Dumping registers
1570 08:54:57.975106 reg 0x0000: 0x02000000
1571 08:54:57.978236 reg 0x0001: 0x00770020
1572 08:54:57.978355 reg 0x0002: 0x00000000
1573 08:54:57.985025 PCI: 00:1f.0 init finished in 23552 usecs
1574 08:54:57.988611 PCI: 00:1f.4 init ...
1575 08:54:57.991274 PCI: 00:1f.4 init finished in 2263 usecs
1576 08:54:58.002414 PCI: 01:00.0 init ...
1577 08:54:58.005819 PCI: 01:00.0 init finished in 2254 usecs
1578 08:54:58.010004 PNP: 0c09.0 init ...
1579 08:54:58.012800 Google Chrome EC uptime: 11.082 seconds
1580 08:54:58.019937 Google Chrome AP resets since EC boot: 0
1581 08:54:58.022827 Google Chrome most recent AP reset causes:
1582 08:54:58.029804 Google Chrome EC reset flags at last EC boot: reset-pin
1583 08:54:58.032713 PNP: 0c09.0 init finished in 20573 usecs
1584 08:54:58.036161 Devices initialized
1585 08:54:58.036244 Show all devs... After init.
1586 08:54:58.039683 Root Device: enabled 1
1587 08:54:58.042920 CPU_CLUSTER: 0: enabled 1
1588 08:54:58.046154 DOMAIN: 0000: enabled 1
1589 08:54:58.046277 APIC: 00: enabled 1
1590 08:54:58.049419 PCI: 00:00.0: enabled 1
1591 08:54:58.052952 PCI: 00:02.0: enabled 1
1592 08:54:58.056011 PCI: 00:04.0: enabled 0
1593 08:54:58.056122 PCI: 00:05.0: enabled 0
1594 08:54:58.059422 PCI: 00:12.0: enabled 1
1595 08:54:58.062644 PCI: 00:12.5: enabled 0
1596 08:54:58.062745 PCI: 00:12.6: enabled 0
1597 08:54:58.065992 PCI: 00:14.0: enabled 1
1598 08:54:58.069697 PCI: 00:14.1: enabled 0
1599 08:54:58.072433 PCI: 00:14.3: enabled 1
1600 08:54:58.072545 PCI: 00:14.5: enabled 0
1601 08:54:58.076052 PCI: 00:15.0: enabled 1
1602 08:54:58.079020 PCI: 00:15.1: enabled 1
1603 08:54:58.082408 PCI: 00:15.2: enabled 0
1604 08:54:58.082565 PCI: 00:15.3: enabled 0
1605 08:54:58.086094 PCI: 00:16.0: enabled 1
1606 08:54:58.089033 PCI: 00:16.1: enabled 0
1607 08:54:58.092608 PCI: 00:16.2: enabled 0
1608 08:54:58.092744 PCI: 00:16.3: enabled 0
1609 08:54:58.095937 PCI: 00:16.4: enabled 0
1610 08:54:58.099031 PCI: 00:16.5: enabled 0
1611 08:54:58.102864 PCI: 00:17.0: enabled 1
1612 08:54:58.103034 PCI: 00:19.0: enabled 1
1613 08:54:58.105506 PCI: 00:19.1: enabled 0
1614 08:54:58.108981 PCI: 00:19.2: enabled 0
1615 08:54:58.109123 PCI: 00:1a.0: enabled 0
1616 08:54:58.112588 PCI: 00:1c.0: enabled 0
1617 08:54:58.115929 PCI: 00:1c.1: enabled 0
1618 08:54:58.118845 PCI: 00:1c.2: enabled 0
1619 08:54:58.118999 PCI: 00:1c.3: enabled 0
1620 08:54:58.122278 PCI: 00:1c.4: enabled 0
1621 08:54:58.125792 PCI: 00:1c.5: enabled 0
1622 08:54:58.129214 PCI: 00:1c.6: enabled 0
1623 08:54:58.129305 PCI: 00:1c.7: enabled 0
1624 08:54:58.132794 PCI: 00:1d.0: enabled 1
1625 08:54:58.135258 PCI: 00:1d.1: enabled 0
1626 08:54:58.138903 PCI: 00:1d.2: enabled 0
1627 08:54:58.139002 PCI: 00:1d.3: enabled 0
1628 08:54:58.142513 PCI: 00:1d.4: enabled 0
1629 08:54:58.145970 PCI: 00:1d.5: enabled 0
1630 08:54:58.146084 PCI: 00:1e.0: enabled 1
1631 08:54:58.148649 PCI: 00:1e.1: enabled 0
1632 08:54:58.151968 PCI: 00:1e.2: enabled 1
1633 08:54:58.155699 PCI: 00:1e.3: enabled 1
1634 08:54:58.155810 PCI: 00:1f.0: enabled 1
1635 08:54:58.159019 PCI: 00:1f.1: enabled 0
1636 08:54:58.161889 PCI: 00:1f.2: enabled 0
1637 08:54:58.165449 PCI: 00:1f.3: enabled 1
1638 08:54:58.165572 PCI: 00:1f.4: enabled 1
1639 08:54:58.168800 PCI: 00:1f.5: enabled 1
1640 08:54:58.171922 PCI: 00:1f.6: enabled 0
1641 08:54:58.175417 USB0 port 0: enabled 1
1642 08:54:58.175495 I2C: 01:15: enabled 1
1643 08:54:58.178556 I2C: 02:5d: enabled 1
1644 08:54:58.181827 GENERIC: 0.0: enabled 1
1645 08:54:58.181933 I2C: 03:1a: enabled 1
1646 08:54:58.185059 I2C: 03:38: enabled 1
1647 08:54:58.188262 I2C: 03:39: enabled 1
1648 08:54:58.188384 I2C: 03:3a: enabled 1
1649 08:54:58.191602 I2C: 03:3b: enabled 1
1650 08:54:58.195003 PCI: 00:00.0: enabled 1
1651 08:54:58.195112 SPI: 00: enabled 1
1652 08:54:58.198274 SPI: 01: enabled 1
1653 08:54:58.201713 PNP: 0c09.0: enabled 1
1654 08:54:58.201847 USB2 port 0: enabled 1
1655 08:54:58.204989 USB2 port 1: enabled 1
1656 08:54:58.208679 USB2 port 2: enabled 0
1657 08:54:58.208808 USB2 port 3: enabled 0
1658 08:54:58.211870 USB2 port 5: enabled 0
1659 08:54:58.214818 USB2 port 6: enabled 1
1660 08:54:58.218268 USB2 port 9: enabled 1
1661 08:54:58.218415 USB3 port 0: enabled 1
1662 08:54:58.221633 USB3 port 1: enabled 1
1663 08:54:58.224794 USB3 port 2: enabled 1
1664 08:54:58.224915 USB3 port 3: enabled 1
1665 08:54:58.228017 USB3 port 4: enabled 0
1666 08:54:58.231962 APIC: 02: enabled 1
1667 08:54:58.232101 APIC: 06: enabled 1
1668 08:54:58.234588 APIC: 01: enabled 1
1669 08:54:58.237835 APIC: 03: enabled 1
1670 08:54:58.237951 APIC: 04: enabled 1
1671 08:54:58.241537 APIC: 05: enabled 1
1672 08:54:58.241644 APIC: 07: enabled 1
1673 08:54:58.244900 PCI: 00:08.0: enabled 1
1674 08:54:58.248306 PCI: 00:14.2: enabled 1
1675 08:54:58.251062 PCI: 01:00.0: enabled 1
1676 08:54:58.255363 Disabling ACPI via APMC:
1677 08:54:58.255475 done.
1678 08:54:58.261417 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 08:54:58.265185 ELOG: NV offset 0xaf0000 size 0x4000
1680 08:54:58.271469 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 08:54:58.278497 ELOG: Event(17) added with size 13 at 2023-12-11 08:52:26 UTC
1682 08:54:58.284644 ELOG: Event(92) added with size 9 at 2023-12-11 08:52:26 UTC
1683 08:54:58.291499 ELOG: Event(93) added with size 9 at 2023-12-11 08:52:26 UTC
1684 08:54:58.298153 ELOG: Event(9A) added with size 9 at 2023-12-11 08:52:26 UTC
1685 08:54:58.304659 ELOG: Event(9E) added with size 10 at 2023-12-11 08:52:26 UTC
1686 08:54:58.311715 ELOG: Event(9F) added with size 14 at 2023-12-11 08:52:26 UTC
1687 08:54:58.314336 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 08:54:58.321944 ELOG: Event(A1) added with size 10 at 2023-12-11 08:52:26 UTC
1689 08:54:58.331643 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 08:54:58.337885 ELOG: Event(A0) added with size 9 at 2023-12-11 08:52:26 UTC
1691 08:54:58.341450 elog_add_boot_reason: Logged dev mode boot
1692 08:54:58.344842 Finalize devices...
1693 08:54:58.344963 PCI: 00:17.0 final
1694 08:54:58.348211 Devices finalized
1695 08:54:58.351590 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 08:54:58.358342 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 08:54:58.361529 ME: HFSTS1 : 0x90000245
1698 08:54:58.364871 ME: HFSTS2 : 0x3B850126
1699 08:54:58.371269 ME: HFSTS3 : 0x00000020
1700 08:54:58.374861 ME: HFSTS4 : 0x00004800
1701 08:54:58.377585 ME: HFSTS5 : 0x00000000
1702 08:54:58.381316 ME: HFSTS6 : 0x40400006
1703 08:54:58.384641 ME: Manufacturing Mode : NO
1704 08:54:58.387686 ME: FW Partition Table : OK
1705 08:54:58.391106 ME: Bringup Loader Failure : NO
1706 08:54:58.394553 ME: Firmware Init Complete : YES
1707 08:54:58.397476 ME: Boot Options Present : NO
1708 08:54:58.400933 ME: Update In Progress : NO
1709 08:54:58.404609 ME: D0i3 Support : YES
1710 08:54:58.407802 ME: Low Power State Enabled : NO
1711 08:54:58.411140 ME: CPU Replaced : NO
1712 08:54:58.414419 ME: CPU Replacement Valid : YES
1713 08:54:58.417263 ME: Current Working State : 5
1714 08:54:58.420593 ME: Current Operation State : 1
1715 08:54:58.424023 ME: Current Operation Mode : 0
1716 08:54:58.427558 ME: Error Code : 0
1717 08:54:58.431009 ME: CPU Debug Disabled : YES
1718 08:54:58.434662 ME: TXT Support : NO
1719 08:54:58.440951 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 08:54:58.447399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 08:54:58.447489 CBFS @ c08000 size 3f8000
1722 08:54:58.454143 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 08:54:58.456979 CBFS: Locating 'fallback/dsdt.aml'
1724 08:54:58.460206 CBFS: Found @ offset 10bb80 size 3fa5
1725 08:54:58.467046 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 08:54:58.470061 CBFS @ c08000 size 3f8000
1727 08:54:58.476678 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 08:54:58.476763 CBFS: Locating 'fallback/slic'
1729 08:54:58.482658 CBFS: 'fallback/slic' not found.
1730 08:54:58.489322 ACPI: Writing ACPI tables at 99b3e000.
1731 08:54:58.489413 ACPI: * FACS
1732 08:54:58.492113 ACPI: * DSDT
1733 08:54:58.495416 Ramoops buffer: 0x100000@0x99a3d000.
1734 08:54:58.498814 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 08:54:58.505656 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 08:54:58.509248 Google Chrome EC: version:
1737 08:54:58.512661 ro: helios_v2.0.2659-56403530b
1738 08:54:58.515838 rw: helios_v2.0.2849-c41de27e7d
1739 08:54:58.515956 running image: 1
1740 08:54:58.519901 ACPI: * FADT
1741 08:54:58.520015 SCI is IRQ9
1742 08:54:58.526417 ACPI: added table 1/32, length now 40
1743 08:54:58.526539 ACPI: * SSDT
1744 08:54:58.529933 Found 1 CPU(s) with 8 core(s) each.
1745 08:54:58.532887 Error: Could not locate 'wifi_sar' in VPD.
1746 08:54:58.539930 Checking CBFS for default SAR values
1747 08:54:58.542716 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 08:54:58.546267 CBFS @ c08000 size 3f8000
1749 08:54:58.552516 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 08:54:58.556084 CBFS: Locating 'wifi_sar_defaults.hex'
1751 08:54:58.559458 CBFS: Found @ offset 5fac0 size 77
1752 08:54:58.563272 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 08:54:58.569437 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 08:54:58.572863 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 08:54:58.579136 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 08:54:58.582625 failed to find key in VPD: dsm_calib_r0_0
1757 08:54:58.592564 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 08:54:58.595775 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 08:54:58.599259 failed to find key in VPD: dsm_calib_r0_1
1760 08:54:58.608723 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 08:54:58.615806 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 08:54:58.619210 failed to find key in VPD: dsm_calib_r0_2
1763 08:54:58.629183 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 08:54:58.632363 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 08:54:58.638665 failed to find key in VPD: dsm_calib_r0_3
1766 08:54:58.645338 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 08:54:58.651702 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 08:54:58.655266 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 08:54:58.658617 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 08:54:58.663032 EC returned error result code 1
1771 08:54:58.666446 EC returned error result code 1
1772 08:54:58.669875 EC returned error result code 1
1773 08:54:58.676799 PS2K: Bad resp from EC. Vivaldi disabled!
1774 08:54:58.679764 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 08:54:58.686210 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 08:54:58.693208 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 08:54:58.696614 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 08:54:58.703215 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 08:54:58.709589 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 08:54:58.716061 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 08:54:58.719598 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 08:54:58.726089 ACPI: added table 2/32, length now 44
1783 08:54:58.726212 ACPI: * MCFG
1784 08:54:58.729585 ACPI: added table 3/32, length now 48
1785 08:54:58.732895 ACPI: * TPM2
1786 08:54:58.736469 TPM2 log created at 99a2d000
1787 08:54:58.739629 ACPI: added table 4/32, length now 52
1788 08:54:58.739710 ACPI: * MADT
1789 08:54:58.742898 SCI is IRQ9
1790 08:54:58.746061 ACPI: added table 5/32, length now 56
1791 08:54:58.746170 current = 99b43ac0
1792 08:54:58.749302 ACPI: * DMAR
1793 08:54:58.752690 ACPI: added table 6/32, length now 60
1794 08:54:58.756601 ACPI: * IGD OpRegion
1795 08:54:58.756717 GMA: Found VBT in CBFS
1796 08:54:58.759506 GMA: Found valid VBT in CBFS
1797 08:54:58.762646 ACPI: added table 7/32, length now 64
1798 08:54:58.766530 ACPI: * HPET
1799 08:54:58.769365 ACPI: added table 8/32, length now 68
1800 08:54:58.769446 ACPI: done.
1801 08:54:58.772870 ACPI tables: 31744 bytes.
1802 08:54:58.776447 smbios_write_tables: 99a2c000
1803 08:54:58.779415 EC returned error result code 3
1804 08:54:58.782964 Couldn't obtain OEM name from CBI
1805 08:54:58.786510 Create SMBIOS type 17
1806 08:54:58.789411 PCI: 00:00.0 (Intel Cannonlake)
1807 08:54:58.792906 PCI: 00:14.3 (Intel WiFi)
1808 08:54:58.796427 SMBIOS tables: 939 bytes.
1809 08:54:58.799390 Writing table forward entry at 0x00000500
1810 08:54:58.805816 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 08:54:58.809187 Writing coreboot table at 0x99b62000
1812 08:54:58.816123 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 08:54:58.819795 1. 0000000000001000-000000000009ffff: RAM
1814 08:54:58.822525 2. 00000000000a0000-00000000000fffff: RESERVED
1815 08:54:58.829291 3. 0000000000100000-0000000099a2bfff: RAM
1816 08:54:58.832473 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 08:54:58.839643 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 08:54:58.845714 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 08:54:58.849104 7. 000000009a000000-000000009f7fffff: RESERVED
1820 08:54:58.855904 8. 00000000e0000000-00000000efffffff: RESERVED
1821 08:54:58.859213 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 08:54:58.862536 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 08:54:58.868852 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 08:54:58.872180 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 08:54:58.878964 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 08:54:58.882200 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 08:54:58.888602 15. 0000000100000000-000000045e7fffff: RAM
1828 08:54:58.892071 Graphics framebuffer located at 0xc0000000
1829 08:54:58.895718 Passing 5 GPIOs to payload:
1830 08:54:58.898762 NAME | PORT | POLARITY | VALUE
1831 08:54:58.905029 write protect | undefined | high | low
1832 08:54:58.908703 lid | undefined | high | high
1833 08:54:58.915033 power | undefined | high | low
1834 08:54:58.922143 oprom | undefined | high | low
1835 08:54:58.925582 EC in RW | 0x000000cb | high | low
1836 08:54:58.928984 Board ID: 4
1837 08:54:58.931654 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 08:54:58.935059 CBFS @ c08000 size 3f8000
1839 08:54:58.941868 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 08:54:58.948770 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1841 08:54:58.948882 coreboot table: 1492 bytes.
1842 08:54:58.951494 IMD ROOT 0. 99fff000 00001000
1843 08:54:58.955030 IMD SMALL 1. 99ffe000 00001000
1844 08:54:58.958701 FSP MEMORY 2. 99c4e000 003b0000
1845 08:54:58.961971 CONSOLE 3. 99c2e000 00020000
1846 08:54:58.964901 FMAP 4. 99c2d000 0000054e
1847 08:54:58.968699 TIME STAMP 5. 99c2c000 00000910
1848 08:54:58.971909 VBOOT WORK 6. 99c18000 00014000
1849 08:54:58.975437 MRC DATA 7. 99c16000 00001958
1850 08:54:58.978150 ROMSTG STCK 8. 99c15000 00001000
1851 08:54:58.981597 AFTER CAR 9. 99c0b000 0000a000
1852 08:54:58.984958 RAMSTAGE 10. 99baf000 0005c000
1853 08:54:58.988167 REFCODE 11. 99b7a000 00035000
1854 08:54:58.991854 SMM BACKUP 12. 99b6a000 00010000
1855 08:54:58.995025 COREBOOT 13. 99b62000 00008000
1856 08:54:58.998075 ACPI 14. 99b3e000 00024000
1857 08:54:59.001410 ACPI GNVS 15. 99b3d000 00001000
1858 08:54:59.004804 RAMOOPS 16. 99a3d000 00100000
1859 08:54:59.008270 TPM2 TCGLOG17. 99a2d000 00010000
1860 08:54:59.012028 SMBIOS 18. 99a2c000 00000800
1861 08:54:59.014743 IMD small region:
1862 08:54:59.018319 IMD ROOT 0. 99ffec00 00000400
1863 08:54:59.021927 FSP RUNTIME 1. 99ffebe0 00000004
1864 08:54:59.024697 EC HOSTEVENT 2. 99ffebc0 00000008
1865 08:54:59.028125 POWER STATE 3. 99ffeb80 00000040
1866 08:54:59.031387 ROMSTAGE 4. 99ffeb60 00000004
1867 08:54:59.035111 MEM INFO 5. 99ffe9a0 000001b9
1868 08:54:59.038448 VPD 6. 99ffe920 0000006c
1869 08:54:59.041339 MTRR: Physical address space:
1870 08:54:59.048296 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 08:54:59.055097 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 08:54:59.062077 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 08:54:59.067937 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 08:54:59.075043 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 08:54:59.081684 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 08:54:59.085136 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 08:54:59.091586 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 08:54:59.094668 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 08:54:59.098127 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 08:54:59.101764 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 08:54:59.107844 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 08:54:59.111128 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 08:54:59.114177 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 08:54:59.117718 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 08:54:59.124205 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 08:54:59.127891 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 08:54:59.130692 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 08:54:59.134250 call enable_fixed_mtrr()
1889 08:54:59.137835 CPU physical address size: 39 bits
1890 08:54:59.141056 MTRR: default type WB/UC MTRR counts: 6/8.
1891 08:54:59.144215 MTRR: WB selected as default type.
1892 08:54:59.150731 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 08:54:59.157744 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 08:54:59.163886 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 08:54:59.170849 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 08:54:59.177368 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 08:54:59.183884 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 08:54:59.187087 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 08:54:59.194080 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 08:54:59.196903 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 08:54:59.200185 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 08:54:59.203622 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 08:54:59.207237 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 08:54:59.213913 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 08:54:59.217423 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 08:54:59.220484 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 08:54:59.223593 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 08:54:59.230582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 08:54:59.230669
1910 08:54:59.230736 MTRR check
1911 08:54:59.233336 Fixed MTRRs : Enabled
1912 08:54:59.236968 Variable MTRRs: Enabled
1913 08:54:59.237053
1914 08:54:59.237119 call enable_fixed_mtrr()
1915 08:54:59.243821 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1916 08:54:59.246911 CPU physical address size: 39 bits
1917 08:54:59.253800 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 08:54:59.256949 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 08:54:59.260116 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 08:54:59.267066 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 08:54:59.269662 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 08:54:59.272970 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 08:54:59.276481 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 08:54:59.279657 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 08:54:59.286659 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 08:54:59.289708 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 08:54:59.292904 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 08:54:59.296364 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 08:54:59.302975 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 08:54:59.306376 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 08:54:59.309576 call enable_fixed_mtrr()
1932 08:54:59.313186 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 08:54:59.316522 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 08:54:59.319889 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 08:54:59.326104 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 08:54:59.329528 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 08:54:59.332709 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 08:54:59.335942 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 08:54:59.343001 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 08:54:59.345852 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 08:54:59.349310 CPU physical address size: 39 bits
1942 08:54:59.352516 call enable_fixed_mtrr()
1943 08:54:59.356036 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 08:54:59.359535 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 08:54:59.365737 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 08:54:59.369072 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 08:54:59.372410 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 08:54:59.375923 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 08:54:59.382291 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 08:54:59.385824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 08:54:59.389199 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 08:54:59.392437 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 08:54:59.395744 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 08:54:59.402435 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 08:54:59.405157 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 08:54:59.408510 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 08:54:59.415342 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 08:54:59.418575 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 08:54:59.421624 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 08:54:59.425119 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 08:54:59.428768 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 08:54:59.435216 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 08:54:59.438609 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 08:54:59.441961 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 08:54:59.444954 call enable_fixed_mtrr()
1966 08:54:59.448592 call enable_fixed_mtrr()
1967 08:54:59.451251 CPU physical address size: 39 bits
1968 08:54:59.454683 CPU physical address size: 39 bits
1969 08:54:59.458065 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 08:54:59.464390 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 08:54:59.467901 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 08:54:59.471524 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 08:54:59.474257 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 08:54:59.477824 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 08:54:59.484459 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 08:54:59.487953 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 08:54:59.491549 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 08:54:59.494330 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 08:54:59.501489 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 08:54:59.504755 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 08:54:59.507451 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 08:54:59.510548 call enable_fixed_mtrr()
1983 08:54:59.514122 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 08:54:59.517602 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 08:54:59.524172 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 08:54:59.527418 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 08:54:59.530838 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 08:54:59.534443 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 08:54:59.540645 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 08:54:59.544106 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 08:54:59.547545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 08:54:59.550290 CPU physical address size: 39 bits
1993 08:54:59.554460 call enable_fixed_mtrr()
1994 08:54:59.557584 CBFS @ c08000 size 3f8000
1995 08:54:59.564372 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1996 08:54:59.567084 CPU physical address size: 39 bits
1997 08:54:59.570662 CBFS: Locating 'fallback/payload'
1998 08:54:59.574043 CPU physical address size: 39 bits
1999 08:54:59.577545 CBFS: Found @ offset 1c96c0 size 3f798
2000 08:54:59.580372 Checking segment from ROM address 0xffdd16f8
2001 08:54:59.587490 Checking segment from ROM address 0xffdd1714
2002 08:54:59.590501 Loading segment from ROM address 0xffdd16f8
2003 08:54:59.593753 code (compression=0)
2004 08:54:59.600243 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 08:54:59.610525 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 08:54:59.610640 it's not compressed!
2007 08:54:59.704501 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 08:54:59.710518 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 08:54:59.714528 Loading segment from ROM address 0xffdd1714
2010 08:54:59.717566 Entry Point 0x30000000
2011 08:54:59.720770 Loaded segments
2012 08:54:59.726296 Finalizing chipset.
2013 08:54:59.729579 Finalizing SMM.
2014 08:54:59.733137 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 08:54:59.736065 mp_park_aps done after 0 msecs.
2016 08:54:59.743092 Jumping to boot code at 30000000(99b62000)
2017 08:54:59.749523 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 08:54:59.749635
2019 08:54:59.749705
2020 08:54:59.749768
2021 08:54:59.752931 Starting depthcharge on Helios...
2022 08:54:59.753006
2023 08:54:59.753360 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 08:54:59.753522 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 08:54:59.753650 Setting prompt string to ['hatch:']
2026 08:54:59.753798 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 08:54:59.762753 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 08:54:59.762866
2029 08:54:59.769590 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 08:54:59.769697
2031 08:54:59.775871 board_setup: Info: eMMC controller not present; skipping
2032 08:54:59.775978
2033 08:54:59.779234 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 08:54:59.779325
2035 08:54:59.785674 board_setup: Info: SDHCI controller not present; skipping
2036 08:54:59.785757
2037 08:54:59.792558 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 08:54:59.792644
2039 08:54:59.792713 Wipe memory regions:
2040 08:54:59.792775
2041 08:54:59.795680 [0x00000000001000, 0x000000000a0000)
2042 08:54:59.795763
2043 08:54:59.799239 [0x00000000100000, 0x00000030000000)
2044 08:54:59.865556
2045 08:54:59.869006 [0x00000030657430, 0x00000099a2c000)
2046 08:55:00.005932
2047 08:55:00.009258 [0x00000100000000, 0x0000045e800000)
2048 08:55:01.391950
2049 08:55:01.392132 R8152: Initializing
2050 08:55:01.392204
2051 08:55:01.395024 Version 9 (ocp_data = 6010)
2052 08:55:01.399235
2053 08:55:01.399314 R8152: Done initializing
2054 08:55:01.399379
2055 08:55:01.402737 Adding net device
2056 08:55:01.885446
2057 08:55:01.885589 R8152: Initializing
2058 08:55:01.885661
2059 08:55:01.888940 Version 6 (ocp_data = 5c30)
2060 08:55:01.889015
2061 08:55:01.891707 R8152: Done initializing
2062 08:55:01.891780
2063 08:55:01.895238 net_add_device: Attemp to include the same device
2064 08:55:01.898567
2065 08:55:01.906031 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 08:55:01.906116
2067 08:55:01.906181
2068 08:55:01.906243
2069 08:55:01.906521 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 08:55:02.006820 hatch: tftpboot 192.168.201.1 12243867/tftp-deploy-x7ts75p0/kernel/bzImage 12243867/tftp-deploy-x7ts75p0/kernel/cmdline 12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
2072 08:55:02.007005 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 08:55:02.007170 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 08:55:02.011505 tftpboot 192.168.201.1 12243867/tftp-deploy-x7ts75p0/kernel/bzImploy-x7ts75p0/kernel/cmdline 12243867/tftp-deploy-x7ts75p0/ramdisk/ramdisk.cpio.gz
2075 08:55:02.011621
2076 08:55:02.011720 Waiting for link
2077 08:55:02.212473
2078 08:55:02.212623 done.
2079 08:55:02.212794
2080 08:55:02.212870 MAC: 00:24:32:50:19:be
2081 08:55:02.212971
2082 08:55:02.215279 Sending DHCP discover... done.
2083 08:55:02.215395
2084 08:55:02.218595 Waiting for reply... done.
2085 08:55:02.218702
2086 08:55:02.221946 Sending DHCP request... done.
2087 08:55:02.222055
2088 08:55:02.225389 Waiting for reply... done.
2089 08:55:02.225491
2090 08:55:02.228594 My ip is 192.168.201.15
2091 08:55:02.228695
2092 08:55:02.231862 The DHCP server ip is 192.168.201.1
2093 08:55:02.231966
2094 08:55:02.235054 TFTP server IP predefined by user: 192.168.201.1
2095 08:55:02.235159
2096 08:55:02.241699 Bootfile predefined by user: 12243867/tftp-deploy-x7ts75p0/kernel/bzImage
2097 08:55:02.241809
2098 08:55:02.245237 Sending tftp read request... done.
2099 08:55:02.245342
2100 08:55:02.252163 Waiting for the transfer...
2101 08:55:02.252293
2102 08:55:02.774295 00000000 ################################################################
2103 08:55:02.774445
2104 08:55:03.293289 00080000 ################################################################
2105 08:55:03.293447
2106 08:55:03.825084 00100000 ################################################################
2107 08:55:03.825273
2108 08:55:04.372432 00180000 ################################################################
2109 08:55:04.372571
2110 08:55:04.905564 00200000 ################################################################
2111 08:55:04.905701
2112 08:55:05.440052 00280000 ################################################################
2113 08:55:05.440195
2114 08:55:05.988007 00300000 ################################################################
2115 08:55:05.988149
2116 08:55:06.534329 00380000 ################################################################
2117 08:55:06.534495
2118 08:55:07.067126 00400000 ################################################################
2119 08:55:07.067278
2120 08:55:07.601567 00480000 ################################################################
2121 08:55:07.601720
2122 08:55:08.140818 00500000 ################################################################
2123 08:55:08.141013
2124 08:55:08.677947 00580000 ################################################################
2125 08:55:08.678082
2126 08:55:09.198287 00600000 ################################################################
2127 08:55:09.198420
2128 08:55:09.729722 00680000 ################################################################
2129 08:55:09.729865
2130 08:55:10.273706 00700000 ################################################################
2131 08:55:10.273850
2132 08:55:10.799995 00780000 ################################################################
2133 08:55:10.800142
2134 08:55:10.980737 00800000 ####################### done.
2135 08:55:10.980868
2136 08:55:10.984215 The bootfile was 8572816 bytes long.
2137 08:55:10.984326
2138 08:55:10.987583 Sending tftp read request... done.
2139 08:55:10.987667
2140 08:55:10.991001 Waiting for the transfer...
2141 08:55:10.991088
2142 08:55:11.557780 00000000 ################################################################
2143 08:55:11.557934
2144 08:55:12.115782 00080000 ################################################################
2145 08:55:12.115930
2146 08:55:12.723958 00100000 ################################################################
2147 08:55:12.724525
2148 08:55:13.433424 00180000 ################################################################
2149 08:55:13.434236
2150 08:55:14.069420 00200000 ################################################################
2151 08:55:14.069557
2152 08:55:14.679923 00280000 ################################################################
2153 08:55:14.680062
2154 08:55:15.242465 00300000 ################################################################
2155 08:55:15.242876
2156 08:55:15.937408 00380000 ################################################################
2157 08:55:15.937919
2158 08:55:16.664746 00400000 ################################################################
2159 08:55:16.665294
2160 08:55:17.384788 00480000 ################################################################
2161 08:55:17.385319
2162 08:55:18.046004 00500000 ############################################################### done.
2163 08:55:18.046506
2164 08:55:18.049378 Sending tftp read request... done.
2165 08:55:18.049804
2166 08:55:18.052824 Waiting for the transfer...
2167 08:55:18.053267
2168 08:55:18.053711 00000000 # done.
2169 08:55:18.054240
2170 08:55:18.062840 Command line loaded dynamically from TFTP file: 12243867/tftp-deploy-x7ts75p0/kernel/cmdline
2171 08:55:18.063287
2172 08:55:18.092646 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243867/extract-nfsrootfs-tmcn811l,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 08:55:18.093109
2174 08:55:18.098696 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 08:55:18.102520
2176 08:55:18.105803 Shutting down all USB controllers.
2177 08:55:18.106233
2178 08:55:18.106573 Removing current net device
2179 08:55:18.109893
2180 08:55:18.110318 Finalizing coreboot
2181 08:55:18.110658
2182 08:55:18.116410 Exiting depthcharge with code 4 at timestamp: 25692385
2183 08:55:18.116838
2184 08:55:18.117177
2185 08:55:18.117489 Starting kernel ...
2186 08:55:18.117790
2187 08:55:18.118082
2188 08:55:18.119198 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2189 08:55:18.119680 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2190 08:55:18.120071 Setting prompt string to ['Linux version [0-9]']
2191 08:55:18.120548 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 08:55:18.120994 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 08:59:42.120643 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2196 08:59:42.121777 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2198 08:59:42.122663 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 08:59:42.123811 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 08:59:42.124065 Cleaning after the job
2204 08:59:42.124156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/ramdisk
2205 08:59:42.125084 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/kernel
2206 08:59:42.126331 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/nfsrootfs
2207 08:59:42.216940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243867/tftp-deploy-x7ts75p0/modules
2208 08:59:42.217397 start: 4.1 power-off (timeout 00:00:30) [common]
2209 08:59:42.217570 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2210 08:59:42.295832 >> Command sent successfully.
2211 08:59:42.301094 Returned 0 in 0 seconds
2212 08:59:42.402144 end: 4.1 power-off (duration 00:00:00) [common]
2214 08:59:42.403818 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 08:59:42.405435 Listened to connection for namespace 'common' for up to 1s
2217 08:59:42.406878 Listened to connection for namespace 'common' for up to 1s
2218 08:59:43.406053 Finalising connection for namespace 'common'
2219 08:59:43.406764 Disconnecting from shell: Finalise
2220 08:59:43.407194