Boot log: asus-C436FA-Flip-hatch

    1 08:48:12.406842  lava-dispatcher, installed at version: 2023.10
    2 08:48:12.407068  start: 0 validate
    3 08:48:12.407199  Start time: 2023-12-11 08:48:12.407191+00:00 (UTC)
    4 08:48:12.407326  Using caching service: 'http://localhost/cache/?uri=%s'
    5 08:48:12.407455  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 08:48:12.677649  Using caching service: 'http://localhost/cache/?uri=%s'
    7 08:48:12.677866  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 08:48:15.177475  Using caching service: 'http://localhost/cache/?uri=%s'
    9 08:48:15.177652  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 08:48:15.442112  Using caching service: 'http://localhost/cache/?uri=%s'
   11 08:48:15.442293  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 08:48:15.945476  validate duration: 3.54
   14 08:48:15.945766  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 08:48:15.945864  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 08:48:15.945949  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 08:48:15.946074  Not decompressing ramdisk as can be used compressed.
   18 08:48:15.946158  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 08:48:15.946225  saving as /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/ramdisk/initrd.cpio.gz
   20 08:48:15.946291  total size: 5432480 (5 MB)
   21 08:48:15.947378  progress   0 % (0 MB)
   22 08:48:15.948960  progress   5 % (0 MB)
   23 08:48:15.950410  progress  10 % (0 MB)
   24 08:48:15.951829  progress  15 % (0 MB)
   25 08:48:15.953449  progress  20 % (1 MB)
   26 08:48:15.954880  progress  25 % (1 MB)
   27 08:48:15.956279  progress  30 % (1 MB)
   28 08:48:15.957874  progress  35 % (1 MB)
   29 08:48:15.959266  progress  40 % (2 MB)
   30 08:48:15.960718  progress  45 % (2 MB)
   31 08:48:15.962113  progress  50 % (2 MB)
   32 08:48:15.963656  progress  55 % (2 MB)
   33 08:48:15.965121  progress  60 % (3 MB)
   34 08:48:15.966517  progress  65 % (3 MB)
   35 08:48:15.968073  progress  70 % (3 MB)
   36 08:48:15.969495  progress  75 % (3 MB)
   37 08:48:15.970876  progress  80 % (4 MB)
   38 08:48:15.972270  progress  85 % (4 MB)
   39 08:48:15.973866  progress  90 % (4 MB)
   40 08:48:15.975279  progress  95 % (4 MB)
   41 08:48:15.976721  progress 100 % (5 MB)
   42 08:48:15.977035  5 MB downloaded in 0.03 s (168.52 MB/s)
   43 08:48:15.977205  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 08:48:15.977452  end: 1.1 download-retry (duration 00:00:00) [common]
   46 08:48:15.977535  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 08:48:15.977618  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 08:48:15.977754  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 08:48:15.977826  saving as /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/kernel/bzImage
   50 08:48:15.977886  total size: 8572816 (8 MB)
   51 08:48:15.977946  No compression specified
   52 08:48:15.979032  progress   0 % (0 MB)
   53 08:48:15.981474  progress   5 % (0 MB)
   54 08:48:15.983747  progress  10 % (0 MB)
   55 08:48:15.986040  progress  15 % (1 MB)
   56 08:48:15.988278  progress  20 % (1 MB)
   57 08:48:15.990787  progress  25 % (2 MB)
   58 08:48:15.993161  progress  30 % (2 MB)
   59 08:48:15.995442  progress  35 % (2 MB)
   60 08:48:15.997737  progress  40 % (3 MB)
   61 08:48:15.999984  progress  45 % (3 MB)
   62 08:48:16.002264  progress  50 % (4 MB)
   63 08:48:16.004638  progress  55 % (4 MB)
   64 08:48:16.006903  progress  60 % (4 MB)
   65 08:48:16.009394  progress  65 % (5 MB)
   66 08:48:16.011658  progress  70 % (5 MB)
   67 08:48:16.013961  progress  75 % (6 MB)
   68 08:48:16.016204  progress  80 % (6 MB)
   69 08:48:16.018506  progress  85 % (6 MB)
   70 08:48:16.020824  progress  90 % (7 MB)
   71 08:48:16.023306  progress  95 % (7 MB)
   72 08:48:16.025601  progress 100 % (8 MB)
   73 08:48:16.025789  8 MB downloaded in 0.05 s (170.68 MB/s)
   74 08:48:16.025934  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 08:48:16.026168  end: 1.2 download-retry (duration 00:00:00) [common]
   77 08:48:16.026257  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 08:48:16.026344  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 08:48:16.026480  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 08:48:16.026548  saving as /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/nfsrootfs/full.rootfs.tar
   81 08:48:16.026608  total size: 207157356 (197 MB)
   82 08:48:16.026670  Using unxz to decompress xz
   83 08:48:16.031201  progress   0 % (0 MB)
   84 08:48:16.624890  progress   5 % (9 MB)
   85 08:48:17.184530  progress  10 % (19 MB)
   86 08:48:17.838056  progress  15 % (29 MB)
   87 08:48:18.250095  progress  20 % (39 MB)
   88 08:48:18.705183  progress  25 % (49 MB)
   89 08:48:19.381947  progress  30 % (59 MB)
   90 08:48:19.992774  progress  35 % (69 MB)
   91 08:48:20.642129  progress  40 % (79 MB)
   92 08:48:21.250500  progress  45 % (88 MB)
   93 08:48:21.886265  progress  50 % (98 MB)
   94 08:48:22.581301  progress  55 % (108 MB)
   95 08:48:23.324883  progress  60 % (118 MB)
   96 08:48:23.496972  progress  65 % (128 MB)
   97 08:48:23.667635  progress  70 % (138 MB)
   98 08:48:23.765711  progress  75 % (148 MB)
   99 08:48:23.854361  progress  80 % (158 MB)
  100 08:48:23.934320  progress  85 % (167 MB)
  101 08:48:24.059767  progress  90 % (177 MB)
  102 08:48:24.350934  progress  95 % (187 MB)
  103 08:48:24.969033  progress 100 % (197 MB)
  104 08:48:24.975741  197 MB downloaded in 8.95 s (22.08 MB/s)
  105 08:48:24.976055  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 08:48:24.976350  end: 1.3 download-retry (duration 00:00:09) [common]
  108 08:48:24.976447  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 08:48:24.976539  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 08:48:24.976683  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 08:48:24.976757  saving as /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/modules/modules.tar
  112 08:48:24.976821  total size: 251012 (0 MB)
  113 08:48:24.976888  Using unxz to decompress xz
  114 08:48:24.981755  progress  13 % (0 MB)
  115 08:48:24.982237  progress  26 % (0 MB)
  116 08:48:24.982638  progress  39 % (0 MB)
  117 08:48:24.984255  progress  52 % (0 MB)
  118 08:48:24.986331  progress  65 % (0 MB)
  119 08:48:24.988389  progress  78 % (0 MB)
  120 08:48:24.990320  progress  91 % (0 MB)
  121 08:48:24.992459  progress 100 % (0 MB)
  122 08:48:24.998114  0 MB downloaded in 0.02 s (11.25 MB/s)
  123 08:48:24.998419  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 08:48:24.998697  end: 1.4 download-retry (duration 00:00:00) [common]
  126 08:48:24.998797  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  127 08:48:24.998899  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  128 08:48:28.774343  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243785/extract-nfsrootfs-cy3zqq00
  129 08:48:28.774563  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  130 08:48:28.774665  start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
  131 08:48:28.774837  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3
  132 08:48:28.774981  makedir: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin
  133 08:48:28.775089  makedir: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/tests
  134 08:48:28.775193  makedir: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/results
  135 08:48:28.775297  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-add-keys
  136 08:48:28.775484  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-add-sources
  137 08:48:28.775663  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-background-process-start
  138 08:48:28.775802  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-background-process-stop
  139 08:48:28.775948  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-common-functions
  140 08:48:28.776082  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-echo-ipv4
  141 08:48:28.776216  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-install-packages
  142 08:48:28.776356  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-installed-packages
  143 08:48:28.776488  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-os-build
  144 08:48:28.776621  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-probe-channel
  145 08:48:28.776755  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-probe-ip
  146 08:48:28.776886  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-target-ip
  147 08:48:28.777017  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-target-mac
  148 08:48:28.777150  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-target-storage
  149 08:48:28.777287  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-case
  150 08:48:28.777419  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-event
  151 08:48:28.777549  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-feedback
  152 08:48:28.777680  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-raise
  153 08:48:28.777808  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-reference
  154 08:48:28.777938  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-runner
  155 08:48:28.778071  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-set
  156 08:48:28.778201  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-test-shell
  157 08:48:28.778333  Updating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-add-keys (debian)
  158 08:48:28.778874  Updating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-add-sources (debian)
  159 08:48:28.779033  Updating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-install-packages (debian)
  160 08:48:28.779178  Updating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-installed-packages (debian)
  161 08:48:28.779324  Updating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/bin/lava-os-build (debian)
  162 08:48:28.779455  Creating /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/environment
  163 08:48:28.779557  LAVA metadata
  164 08:48:28.779632  - LAVA_JOB_ID=12243785
  165 08:48:28.779699  - LAVA_DISPATCHER_IP=192.168.201.1
  166 08:48:28.779822  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
  167 08:48:28.779893  skipped lava-vland-overlay
  168 08:48:28.779973  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  169 08:48:28.780056  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
  170 08:48:28.780119  skipped lava-multinode-overlay
  171 08:48:28.780202  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  172 08:48:28.780298  start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
  173 08:48:28.780380  Loading test definitions
  174 08:48:28.780475  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
  175 08:48:28.780549  Using /lava-12243785 at stage 0
  176 08:48:28.780865  uuid=12243785_1.5.2.3.1 testdef=None
  177 08:48:28.780955  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  178 08:48:28.781043  start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
  179 08:48:28.781513  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  181 08:48:28.781738  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
  182 08:48:28.784946  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  184 08:48:28.785222  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
  185 08:48:28.785772  runner path: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/0/tests/0_timesync-off test_uuid 12243785_1.5.2.3.1
  186 08:48:28.785938  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  188 08:48:28.786174  start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
  189 08:48:28.786252  Using /lava-12243785 at stage 0
  190 08:48:28.786356  Fetching tests from https://github.com/kernelci/test-definitions.git
  191 08:48:28.786439  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/0/tests/1_kselftest-rtc'
  192 08:48:36.617645  Running '/usr/bin/git checkout kernelci.org
  193 08:48:36.782971  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  194 08:48:36.783740  uuid=12243785_1.5.2.3.5 testdef=None
  195 08:48:36.783907  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  197 08:48:36.784166  start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
  198 08:48:36.785095  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  200 08:48:36.785352  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
  201 08:48:36.786390  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  203 08:48:36.786642  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
  204 08:48:36.787736  runner path: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/0/tests/1_kselftest-rtc test_uuid 12243785_1.5.2.3.5
  205 08:48:36.787830  BOARD='asus-C436FA-Flip-hatch'
  206 08:48:36.787897  BRANCH='cip'
  207 08:48:36.787971  SKIPFILE='/dev/null'
  208 08:48:36.788062  SKIP_INSTALL='True'
  209 08:48:36.788151  TESTPROG_URL='None'
  210 08:48:36.788238  TST_CASENAME=''
  211 08:48:36.788339  TST_CMDFILES='rtc'
  212 08:48:36.788566  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  214 08:48:36.788828  Creating lava-test-runner.conf files
  215 08:48:36.788897  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243785/lava-overlay-1kargmc3/lava-12243785/0 for stage 0
  216 08:48:36.788997  - 0_timesync-off
  217 08:48:36.789071  - 1_kselftest-rtc
  218 08:48:36.789175  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  219 08:48:36.789268  start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
  220 08:48:44.833463  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  221 08:48:44.833626  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
  222 08:48:44.833730  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  223 08:48:44.833832  end: 1.5.2 lava-overlay (duration 00:00:16) [common]
  224 08:48:44.833944  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
  225 08:48:44.985439  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  226 08:48:44.985862  start: 1.5.4 extract-modules (timeout 00:09:31) [common]
  227 08:48:44.985982  extracting modules file /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243785/extract-nfsrootfs-cy3zqq00
  228 08:48:44.999946  extracting modules file /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243785/extract-overlay-ramdisk-6wnvfv_u/ramdisk
  229 08:48:45.013966  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  230 08:48:45.014121  start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
  231 08:48:45.014228  [common] Applying overlay to NFS
  232 08:48:45.014313  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243785/compress-overlay-f69yw6lg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243785/extract-nfsrootfs-cy3zqq00
  233 08:48:45.980952  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  234 08:48:45.981124  start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
  235 08:48:45.981220  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  236 08:48:45.981315  start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
  237 08:48:45.981399  Building ramdisk /var/lib/lava/dispatcher/tmp/12243785/extract-overlay-ramdisk-6wnvfv_u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243785/extract-overlay-ramdisk-6wnvfv_u/ramdisk
  238 08:48:46.058294  >> 26162 blocks

  239 08:48:46.625178  rename /var/lib/lava/dispatcher/tmp/12243785/extract-overlay-ramdisk-6wnvfv_u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz
  240 08:48:46.625675  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  241 08:48:46.625842  start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
  242 08:48:46.625981  start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
  243 08:48:46.626118  No mkimage arch provided, not using FIT.
  244 08:48:46.626245  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  245 08:48:46.626369  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  246 08:48:46.626518  end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
  247 08:48:46.626654  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
  248 08:48:46.626769  No LXC device requested
  249 08:48:46.626904  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  250 08:48:46.627038  start: 1.7 deploy-device-env (timeout 00:09:29) [common]
  251 08:48:46.627167  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  252 08:48:46.627280  Checking files for TFTP limit of 4294967296 bytes.
  253 08:48:46.627841  end: 1 tftp-deploy (duration 00:00:31) [common]
  254 08:48:46.627998  start: 2 depthcharge-action (timeout 00:05:00) [common]
  255 08:48:46.628134  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  256 08:48:46.628326  substitutions:
  257 08:48:46.628440  - {DTB}: None
  258 08:48:46.628537  - {INITRD}: 12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz
  259 08:48:46.628639  - {KERNEL}: 12243785/tftp-deploy-p2nw9b_z/kernel/bzImage
  260 08:48:46.628731  - {LAVA_MAC}: None
  261 08:48:46.628821  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243785/extract-nfsrootfs-cy3zqq00
  262 08:48:46.628923  - {NFS_SERVER_IP}: 192.168.201.1
  263 08:48:46.629011  - {PRESEED_CONFIG}: None
  264 08:48:46.629103  - {PRESEED_LOCAL}: None
  265 08:48:46.629198  - {RAMDISK}: 12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz
  266 08:48:46.629286  - {ROOT_PART}: None
  267 08:48:46.629381  - {ROOT}: None
  268 08:48:46.629468  - {SERVER_IP}: 192.168.201.1
  269 08:48:46.629556  - {TEE}: None
  270 08:48:46.629651  Parsed boot commands:
  271 08:48:46.629736  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  272 08:48:46.629983  Parsed boot commands: tftpboot 192.168.201.1 12243785/tftp-deploy-p2nw9b_z/kernel/bzImage 12243785/tftp-deploy-p2nw9b_z/kernel/cmdline 12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz
  273 08:48:46.630115  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  274 08:48:46.630234  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  275 08:48:46.630372  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  276 08:48:46.630494  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  277 08:48:46.630604  Not connected, no need to disconnect.
  278 08:48:46.630716  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  279 08:48:46.630833  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  280 08:48:46.630956  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  281 08:48:46.635455  Setting prompt string to ['lava-test: # ']
  282 08:48:46.635913  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  283 08:48:46.636071  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  284 08:48:46.636217  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  285 08:48:46.636355  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  286 08:48:46.636586  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  287 08:48:51.763286  >> Command sent successfully.

  288 08:48:51.765841  Returned 0 in 5 seconds
  289 08:48:51.866260  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  291 08:48:51.866622  end: 2.2.2 reset-device (duration 00:00:05) [common]
  292 08:48:51.866757  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  293 08:48:51.866883  Setting prompt string to 'Starting depthcharge on Helios...'
  294 08:48:51.866983  Changing prompt to 'Starting depthcharge on Helios...'
  295 08:48:51.867061  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  296 08:48:51.867332  [Enter `^Ec?' for help]

  297 08:48:52.488191  

  298 08:48:52.488375  

  299 08:48:52.498918  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 08:48:52.502411  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 08:48:52.506027  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 08:48:52.512272  CPU: AES supported, TXT NOT supported, VT supported

  303 08:48:52.519366  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 08:48:52.522460  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 08:48:52.529489  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 08:48:52.532425  VBOOT: Loading verstage.

  307 08:48:52.535834  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 08:48:52.542683  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 08:48:52.546088  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 08:48:52.549628  CBFS @ c08000 size 3f8000

  311 08:48:52.555622  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 08:48:52.559009  CBFS: Locating 'fallback/verstage'

  313 08:48:52.562250  CBFS: Found @ offset 10fb80 size 1072c

  314 08:48:52.562336  

  315 08:48:52.562411  

  316 08:48:52.575423  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 08:48:52.589050  Probing TPM: . done!

  318 08:48:52.592328  TPM ready after 0 ms

  319 08:48:52.595815  Connected to device vid:did:rid of 1ae0:0028:00

  320 08:48:52.606213  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  321 08:48:52.609208  Initialized TPM device CR50 revision 0

  322 08:48:52.654025  tlcl_send_startup: Startup return code is 0

  323 08:48:52.654134  TPM: setup succeeded

  324 08:48:52.666424  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 08:48:52.670533  Chrome EC: UHEPI supported

  326 08:48:52.673870  Phase 1

  327 08:48:52.677004  FMAP: area GBB found @ c05000 (12288 bytes)

  328 08:48:52.684096  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  329 08:48:52.684199  Phase 2

  330 08:48:52.687280  Phase 3

  331 08:48:52.690276  FMAP: area GBB found @ c05000 (12288 bytes)

  332 08:48:52.696757  VB2:vb2_report_dev_firmware() This is developer signed firmware

  333 08:48:52.703563  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  334 08:48:52.706948  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  335 08:48:52.713705  VB2:vb2_verify_keyblock() Checking keyblock signature...

  336 08:48:52.729585  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  337 08:48:52.732831  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  338 08:48:52.739286  VB2:vb2_verify_fw_preamble() Verifying preamble.

  339 08:48:52.743728  Phase 4

  340 08:48:52.746548  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  341 08:48:52.753656  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  342 08:48:52.933088  VB2:vb2_rsa_verify_digest() Digest check failed!

  343 08:48:52.939866  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  344 08:48:52.939956  Saving nvdata

  345 08:48:52.942931  Reboot requested (10020007)

  346 08:48:52.946047  board_reset() called!

  347 08:48:52.946160  full_reset() called!

  348 08:48:57.454824  

  349 08:48:57.454960  

  350 08:48:57.465054  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  351 08:48:57.468474  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  352 08:48:57.474914  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  353 08:48:57.478044  CPU: AES supported, TXT NOT supported, VT supported

  354 08:48:57.485064  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  355 08:48:57.488191  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  356 08:48:57.494828  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  357 08:48:57.498135  VBOOT: Loading verstage.

  358 08:48:57.501722  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  359 08:48:57.508159  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  360 08:48:57.511578  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  361 08:48:57.514979  CBFS @ c08000 size 3f8000

  362 08:48:57.521486  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  363 08:48:57.524322  CBFS: Locating 'fallback/verstage'

  364 08:48:57.528042  CBFS: Found @ offset 10fb80 size 1072c

  365 08:48:57.531931  

  366 08:48:57.532016  

  367 08:48:57.542106  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  368 08:48:57.555616  Probing TPM: . done!

  369 08:48:57.559148  TPM ready after 0 ms

  370 08:48:57.562595  Connected to device vid:did:rid of 1ae0:0028:00

  371 08:48:57.572537  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  372 08:48:57.576343  Initialized TPM device CR50 revision 0

  373 08:48:57.620669  tlcl_send_startup: Startup return code is 0

  374 08:48:57.620791  TPM: setup succeeded

  375 08:48:57.633277  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  376 08:48:57.636982  Chrome EC: UHEPI supported

  377 08:48:57.640578  Phase 1

  378 08:48:57.644122  FMAP: area GBB found @ c05000 (12288 bytes)

  379 08:48:57.650801  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  380 08:48:57.657169  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  381 08:48:57.660822  Recovery requested (1009000e)

  382 08:48:57.665811  Saving nvdata

  383 08:48:57.672432  tlcl_extend: response is 0

  384 08:48:57.681696  tlcl_extend: response is 0

  385 08:48:57.687960  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  386 08:48:57.691307  CBFS @ c08000 size 3f8000

  387 08:48:57.698159  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  388 08:48:57.701535  CBFS: Locating 'fallback/romstage'

  389 08:48:57.704719  CBFS: Found @ offset 80 size 145fc

  390 08:48:57.707914  Accumulated console time in verstage 98 ms

  391 08:48:57.708036  

  392 08:48:57.708139  

  393 08:48:57.721607  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  394 08:48:57.727999  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  395 08:48:57.731409  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  396 08:48:57.734597  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  397 08:48:57.741073  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  398 08:48:57.744713  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  399 08:48:57.748173  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  400 08:48:57.751125  TCO_STS:   0000 0000

  401 08:48:57.754866  GEN_PMCON: e0015238 00000200

  402 08:48:57.757768  GBLRST_CAUSE: 00000000 00000000

  403 08:48:57.757855  prev_sleep_state 5

  404 08:48:57.761418  Boot Count incremented to 1919

  405 08:48:57.767649  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  406 08:48:57.771451  CBFS @ c08000 size 3f8000

  407 08:48:57.777997  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  408 08:48:57.778089  CBFS: Locating 'fspm.bin'

  409 08:48:57.780954  CBFS: Found @ offset 5ffc0 size 71000

  410 08:48:57.785109  Chrome EC: UHEPI supported

  411 08:48:57.792414  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  412 08:48:57.797990  Probing TPM:  done!

  413 08:48:57.804168  Connected to device vid:did:rid of 1ae0:0028:00

  414 08:48:57.814409  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  415 08:48:57.819859  Initialized TPM device CR50 revision 0

  416 08:48:57.829400  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  417 08:48:57.835638  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  418 08:48:57.838931  MRC cache found, size 1948

  419 08:48:57.842496  bootmode is set to: 2

  420 08:48:57.845485  PRMRR disabled by config.

  421 08:48:57.845571  SPD INDEX = 1

  422 08:48:57.852766  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  423 08:48:57.855963  CBFS @ c08000 size 3f8000

  424 08:48:57.862078  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  425 08:48:57.862165  CBFS: Locating 'spd.bin'

  426 08:48:57.865612  CBFS: Found @ offset 5fb80 size 400

  427 08:48:57.869156  SPD: module type is LPDDR3

  428 08:48:57.872302  SPD: module part is 

  429 08:48:57.878666  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  430 08:48:57.882255  SPD: device width 4 bits, bus width 8 bits

  431 08:48:57.885734  SPD: module size is 4096 MB (per channel)

  432 08:48:57.888833  memory slot: 0 configuration done.

  433 08:48:57.892128  memory slot: 2 configuration done.

  434 08:48:57.943900  CBMEM:

  435 08:48:57.947073  IMD: root @ 99fff000 254 entries.

  436 08:48:57.950389  IMD: root @ 99ffec00 62 entries.

  437 08:48:57.953524  External stage cache:

  438 08:48:57.956973  IMD: root @ 9abff000 254 entries.

  439 08:48:57.960070  IMD: root @ 9abfec00 62 entries.

  440 08:48:57.963762  Chrome EC: clear events_b mask to 0x0000000020004000

  441 08:48:57.979504  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  442 08:48:57.992861  tlcl_write: response is 0

  443 08:48:58.001587  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  444 08:48:58.008143  MRC: TPM MRC hash updated successfully.

  445 08:48:58.008233  2 DIMMs found

  446 08:48:58.011827  SMM Memory Map

  447 08:48:58.014815  SMRAM       : 0x9a000000 0x1000000

  448 08:48:58.018150   Subregion 0: 0x9a000000 0xa00000

  449 08:48:58.021932   Subregion 1: 0x9aa00000 0x200000

  450 08:48:58.024740   Subregion 2: 0x9ac00000 0x400000

  451 08:48:58.028312  top_of_ram = 0x9a000000

  452 08:48:58.031535  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  453 08:48:58.038633  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  454 08:48:58.041399  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  455 08:48:58.048544  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  456 08:48:58.051211  CBFS @ c08000 size 3f8000

  457 08:48:58.054863  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  458 08:48:58.058379  CBFS: Locating 'fallback/postcar'

  459 08:48:58.064993  CBFS: Found @ offset 107000 size 4b44

  460 08:48:58.068362  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  461 08:48:58.080721  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  462 08:48:58.083735  Processing 180 relocs. Offset value of 0x97c0c000

  463 08:48:58.092529  Accumulated console time in romstage 285 ms

  464 08:48:58.092673  

  465 08:48:58.092747  

  466 08:48:58.101858  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  467 08:48:58.108892  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  468 08:48:58.112161  CBFS @ c08000 size 3f8000

  469 08:48:58.115540  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  470 08:48:58.118676  CBFS: Locating 'fallback/ramstage'

  471 08:48:58.125615  CBFS: Found @ offset 43380 size 1b9e8

  472 08:48:58.132062  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  473 08:48:58.163886  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  474 08:48:58.167470  Processing 3976 relocs. Offset value of 0x98db0000

  475 08:48:58.173677  Accumulated console time in postcar 52 ms

  476 08:48:58.173766  

  477 08:48:58.173835  

  478 08:48:58.183539  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  479 08:48:58.190552  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  480 08:48:58.193347  WARNING: RO_VPD is uninitialized or empty.

  481 08:48:58.196706  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  482 08:48:58.203332  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  483 08:48:58.203424  Normal boot.

  484 08:48:58.210285  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  485 08:48:58.213130  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  486 08:48:58.216573  CBFS @ c08000 size 3f8000

  487 08:48:58.223588  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  488 08:48:58.227192  CBFS: Locating 'cpu_microcode_blob.bin'

  489 08:48:58.230324  CBFS: Found @ offset 14700 size 2ec00

  490 08:48:58.233561  microcode: sig=0x806ec pf=0x4 revision=0xc9

  491 08:48:58.236253  Skip microcode update

  492 08:48:58.243077  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 08:48:58.243166  CBFS @ c08000 size 3f8000

  494 08:48:58.249586  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 08:48:58.253155  CBFS: Locating 'fsps.bin'

  496 08:48:58.256575  CBFS: Found @ offset d1fc0 size 35000

  497 08:48:58.281473  Detected 4 core, 8 thread CPU.

  498 08:48:58.284926  Setting up SMI for CPU

  499 08:48:58.288469  IED base = 0x9ac00000

  500 08:48:58.288554  IED size = 0x00400000

  501 08:48:58.291766  Will perform SMM setup.

  502 08:48:58.298281  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  503 08:48:58.305312  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  504 08:48:58.308309  Processing 16 relocs. Offset value of 0x00030000

  505 08:48:58.311976  Attempting to start 7 APs

  506 08:48:58.315236  Waiting for 10ms after sending INIT.

  507 08:48:58.331745  Waiting for 1st SIPI to complete...done.

  508 08:48:58.331871  AP: slot 4 apic_id 1.

  509 08:48:58.338440  Waiting for 2nd SIPI to complete...done.

  510 08:48:58.338522  AP: slot 3 apic_id 7.

  511 08:48:58.341617  AP: slot 5 apic_id 6.

  512 08:48:58.344509  AP: slot 2 apic_id 4.

  513 08:48:58.344617  AP: slot 1 apic_id 5.

  514 08:48:58.348069  AP: slot 6 apic_id 2.

  515 08:48:58.351272  AP: slot 7 apic_id 3.

  516 08:48:58.357694  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  517 08:48:58.364714  Processing 13 relocs. Offset value of 0x00038000

  518 08:48:58.367654  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  519 08:48:58.374753  Installing SMM handler to 0x9a000000

  520 08:48:58.380978  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  521 08:48:58.384637  Processing 658 relocs. Offset value of 0x9a010000

  522 08:48:58.394564  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  523 08:48:58.397785  Processing 13 relocs. Offset value of 0x9a008000

  524 08:48:58.404095  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  525 08:48:58.411067  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  526 08:48:58.417553  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  527 08:48:58.421072  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  528 08:48:58.427456  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  529 08:48:58.434097  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  530 08:48:58.437475  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  531 08:48:58.443708  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  532 08:48:58.447489  Clearing SMI status registers

  533 08:48:58.451302  SMI_STS: PM1 

  534 08:48:58.451389  PM1_STS: PWRBTN 

  535 08:48:58.454530  TCO_STS: SECOND_TO 

  536 08:48:58.457621  New SMBASE 0x9a000000

  537 08:48:58.461103  In relocation handler: CPU 0

  538 08:48:58.464258  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  539 08:48:58.467711  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 08:48:58.471094  Relocation complete.

  541 08:48:58.474431  New SMBASE 0x99fff000

  542 08:48:58.474521  In relocation handler: CPU 4

  543 08:48:58.480731  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  544 08:48:58.484168  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 08:48:58.487236  Relocation complete.

  546 08:48:58.487322  New SMBASE 0x99ffe400

  547 08:48:58.490678  In relocation handler: CPU 7

  548 08:48:58.497576  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  549 08:48:58.501279  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 08:48:58.504223  Relocation complete.

  551 08:48:58.504319  New SMBASE 0x99ffe800

  552 08:48:58.507594  In relocation handler: CPU 6

  553 08:48:58.514447  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  554 08:48:58.517305  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 08:48:58.520769  Relocation complete.

  556 08:48:58.520868  New SMBASE 0x99ffec00

  557 08:48:58.524226  In relocation handler: CPU 5

  558 08:48:58.527978  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  559 08:48:58.534408  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 08:48:58.537247  Relocation complete.

  561 08:48:58.537337  New SMBASE 0x99fff400

  562 08:48:58.540868  In relocation handler: CPU 3

  563 08:48:58.544034  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  564 08:48:58.550616  Writing SMRR. base = 0x9a000006, mask=0xff000800

  565 08:48:58.550728  Relocation complete.

  566 08:48:58.553874  New SMBASE 0x99fff800

  567 08:48:58.557361  In relocation handler: CPU 2

  568 08:48:58.560573  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  569 08:48:58.567601  Writing SMRR. base = 0x9a000006, mask=0xff000800

  570 08:48:58.567711  Relocation complete.

  571 08:48:58.570943  New SMBASE 0x99fffc00

  572 08:48:58.574409  In relocation handler: CPU 1

  573 08:48:58.577069  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  574 08:48:58.584387  Writing SMRR. base = 0x9a000006, mask=0xff000800

  575 08:48:58.584486  Relocation complete.

  576 08:48:58.586976  Initializing CPU #0

  577 08:48:58.590314  CPU: vendor Intel device 806ec

  578 08:48:58.593682  CPU: family 06, model 8e, stepping 0c

  579 08:48:58.597211  Clearing out pending MCEs

  580 08:48:58.600317  Setting up local APIC...

  581 08:48:58.600408   apic_id: 0x00 done.

  582 08:48:58.603866  Turbo is available but hidden

  583 08:48:58.606940  Turbo is available and visible

  584 08:48:58.610296  VMX status: enabled

  585 08:48:58.613820  IA32_FEATURE_CONTROL status: locked

  586 08:48:58.617439  Skip microcode update

  587 08:48:58.617555  CPU #0 initialized

  588 08:48:58.620152  Initializing CPU #4

  589 08:48:58.620266  Initializing CPU #1

  590 08:48:58.624004  Initializing CPU #2

  591 08:48:58.627669  Initializing CPU #3

  592 08:48:58.627754  Initializing CPU #5

  593 08:48:58.630465  CPU: vendor Intel device 806ec

  594 08:48:58.633470  CPU: family 06, model 8e, stepping 0c

  595 08:48:58.637235  CPU: vendor Intel device 806ec

  596 08:48:58.640672  CPU: family 06, model 8e, stepping 0c

  597 08:48:58.643497  CPU: vendor Intel device 806ec

  598 08:48:58.650048  CPU: family 06, model 8e, stepping 0c

  599 08:48:58.650138  Clearing out pending MCEs

  600 08:48:58.653511  Clearing out pending MCEs

  601 08:48:58.656759  Setting up local APIC...

  602 08:48:58.660502  CPU: vendor Intel device 806ec

  603 08:48:58.663315  CPU: family 06, model 8e, stepping 0c

  604 08:48:58.667019  Clearing out pending MCEs

  605 08:48:58.670369  Clearing out pending MCEs

  606 08:48:58.670456  CPU: vendor Intel device 806ec

  607 08:48:58.676460  CPU: family 06, model 8e, stepping 0c

  608 08:48:58.676547  Setting up local APIC...

  609 08:48:58.680276  Initializing CPU #7

  610 08:48:58.683084  Initializing CPU #6

  611 08:48:58.686537  CPU: vendor Intel device 806ec

  612 08:48:58.690289  CPU: family 06, model 8e, stepping 0c

  613 08:48:58.693678  CPU: vendor Intel device 806ec

  614 08:48:58.696996  CPU: family 06, model 8e, stepping 0c

  615 08:48:58.700161  Clearing out pending MCEs

  616 08:48:58.700275  Clearing out pending MCEs

  617 08:48:58.703395  Setting up local APIC...

  618 08:48:58.706649  Setting up local APIC...

  619 08:48:58.710639  Setting up local APIC...

  620 08:48:58.710730   apic_id: 0x05 done.

  621 08:48:58.713351   apic_id: 0x04 done.

  622 08:48:58.716993  VMX status: enabled

  623 08:48:58.717080  VMX status: enabled

  624 08:48:58.720409  IA32_FEATURE_CONTROL status: locked

  625 08:48:58.723170  IA32_FEATURE_CONTROL status: locked

  626 08:48:58.726768  Skip microcode update

  627 08:48:58.730231  Skip microcode update

  628 08:48:58.730318   apic_id: 0x01 done.

  629 08:48:58.733031   apic_id: 0x03 done.

  630 08:48:58.736412  Setting up local APIC...

  631 08:48:58.740194  Clearing out pending MCEs

  632 08:48:58.740330   apic_id: 0x07 done.

  633 08:48:58.743009  Setting up local APIC...

  634 08:48:58.746476  CPU #2 initialized

  635 08:48:58.746595  CPU #1 initialized

  636 08:48:58.750092  VMX status: enabled

  637 08:48:58.750208   apic_id: 0x06 done.

  638 08:48:58.753535  VMX status: enabled

  639 08:48:58.756401  VMX status: enabled

  640 08:48:58.759925  IA32_FEATURE_CONTROL status: locked

  641 08:48:58.760033  VMX status: enabled

  642 08:48:58.763380   apic_id: 0x02 done.

  643 08:48:58.766183  IA32_FEATURE_CONTROL status: locked

  644 08:48:58.769385  VMX status: enabled

  645 08:48:58.769471  Skip microcode update

  646 08:48:58.772913  IA32_FEATURE_CONTROL status: locked

  647 08:48:58.776262  CPU #7 initialized

  648 08:48:58.779769  Skip microcode update

  649 08:48:58.783414  IA32_FEATURE_CONTROL status: locked

  650 08:48:58.786126  IA32_FEATURE_CONTROL status: locked

  651 08:48:58.789369  Skip microcode update

  652 08:48:58.789455  Skip microcode update

  653 08:48:58.793350  CPU #5 initialized

  654 08:48:58.793436  Skip microcode update

  655 08:48:58.796545  CPU #3 initialized

  656 08:48:58.799167  CPU #4 initialized

  657 08:48:58.799253  CPU #6 initialized

  658 08:48:58.806261  bsp_do_flight_plan done after 465 msecs.

  659 08:48:58.806382  CPU: frequency set to 4200 MHz

  660 08:48:58.809427  Enabling SMIs.

  661 08:48:58.809517  Locking SMM.

  662 08:48:58.825005  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  663 08:48:58.828579  CBFS @ c08000 size 3f8000

  664 08:48:58.835488  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  665 08:48:58.835579  CBFS: Locating 'vbt.bin'

  666 08:48:58.838640  CBFS: Found @ offset 5f5c0 size 499

  667 08:48:58.845074  Found a VBT of 4608 bytes after decompression

  668 08:48:59.027390  Display FSP Version Info HOB

  669 08:48:59.030320  Reference Code - CPU = 9.0.1e.30

  670 08:48:59.033884  uCode Version = 0.0.0.ca

  671 08:48:59.036877  TXT ACM version = ff.ff.ff.ffff

  672 08:48:59.040348  Display FSP Version Info HOB

  673 08:48:59.043748  Reference Code - ME = 9.0.1e.30

  674 08:48:59.047135  MEBx version = 0.0.0.0

  675 08:48:59.049956  ME Firmware Version = Consumer SKU

  676 08:48:59.053773  Display FSP Version Info HOB

  677 08:48:59.056919  Reference Code - CML PCH = 9.0.1e.30

  678 08:48:59.060181  PCH-CRID Status = Disabled

  679 08:48:59.063425  PCH-CRID Original Value = ff.ff.ff.ffff

  680 08:48:59.067316  PCH-CRID New Value = ff.ff.ff.ffff

  681 08:48:59.069931  OPROM - RST - RAID = ff.ff.ff.ffff

  682 08:48:59.073479  ChipsetInit Base Version = ff.ff.ff.ffff

  683 08:48:59.077001  ChipsetInit Oem Version = ff.ff.ff.ffff

  684 08:48:59.079822  Display FSP Version Info HOB

  685 08:48:59.087010  Reference Code - SA - System Agent = 9.0.1e.30

  686 08:48:59.090548  Reference Code - MRC = 0.7.1.6c

  687 08:48:59.090636  SA - PCIe Version = 9.0.1e.30

  688 08:48:59.093290  SA-CRID Status = Disabled

  689 08:48:59.096676  SA-CRID Original Value = 0.0.0.c

  690 08:48:59.100197  SA-CRID New Value = 0.0.0.c

  691 08:48:59.103599  OPROM - VBIOS = ff.ff.ff.ffff

  692 08:48:59.107226  RTC Init

  693 08:48:59.110509  Set power on after power failure.

  694 08:48:59.110596  Disabling Deep S3

  695 08:48:59.113715  Disabling Deep S3

  696 08:48:59.113801  Disabling Deep S4

  697 08:48:59.116621  Disabling Deep S4

  698 08:48:59.116708  Disabling Deep S5

  699 08:48:59.119831  Disabling Deep S5

  700 08:48:59.126677  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1

  701 08:48:59.126765  Enumerating buses...

  702 08:48:59.133526  Show all devs... Before device enumeration.

  703 08:48:59.133620  Root Device: enabled 1

  704 08:48:59.136410  CPU_CLUSTER: 0: enabled 1

  705 08:48:59.140103  DOMAIN: 0000: enabled 1

  706 08:48:59.142955  APIC: 00: enabled 1

  707 08:48:59.143070  PCI: 00:00.0: enabled 1

  708 08:48:59.146852  PCI: 00:02.0: enabled 1

  709 08:48:59.149670  PCI: 00:04.0: enabled 0

  710 08:48:59.153154  PCI: 00:05.0: enabled 0

  711 08:48:59.153245  PCI: 00:12.0: enabled 1

  712 08:48:59.156853  PCI: 00:12.5: enabled 0

  713 08:48:59.159699  PCI: 00:12.6: enabled 0

  714 08:48:59.159786  PCI: 00:14.0: enabled 1

  715 08:48:59.163159  PCI: 00:14.1: enabled 0

  716 08:48:59.166456  PCI: 00:14.3: enabled 1

  717 08:48:59.169840  PCI: 00:14.5: enabled 0

  718 08:48:59.169930  PCI: 00:15.0: enabled 1

  719 08:48:59.173078  PCI: 00:15.1: enabled 1

  720 08:48:59.176391  PCI: 00:15.2: enabled 0

  721 08:48:59.179742  PCI: 00:15.3: enabled 0

  722 08:48:59.179828  PCI: 00:16.0: enabled 1

  723 08:48:59.183018  PCI: 00:16.1: enabled 0

  724 08:48:59.186148  PCI: 00:16.2: enabled 0

  725 08:48:59.189819  PCI: 00:16.3: enabled 0

  726 08:48:59.189904  PCI: 00:16.4: enabled 0

  727 08:48:59.192587  PCI: 00:16.5: enabled 0

  728 08:48:59.196165  PCI: 00:17.0: enabled 1

  729 08:48:59.196252  PCI: 00:19.0: enabled 1

  730 08:48:59.199740  PCI: 00:19.1: enabled 0

  731 08:48:59.202647  PCI: 00:19.2: enabled 0

  732 08:48:59.206207  PCI: 00:1a.0: enabled 0

  733 08:48:59.206296  PCI: 00:1c.0: enabled 0

  734 08:48:59.209104  PCI: 00:1c.1: enabled 0

  735 08:48:59.212578  PCI: 00:1c.2: enabled 0

  736 08:48:59.216032  PCI: 00:1c.3: enabled 0

  737 08:48:59.216122  PCI: 00:1c.4: enabled 0

  738 08:48:59.219360  PCI: 00:1c.5: enabled 0

  739 08:48:59.222755  PCI: 00:1c.6: enabled 0

  740 08:48:59.225704  PCI: 00:1c.7: enabled 0

  741 08:48:59.225835  PCI: 00:1d.0: enabled 1

  742 08:48:59.229113  PCI: 00:1d.1: enabled 0

  743 08:48:59.232094  PCI: 00:1d.2: enabled 0

  744 08:48:59.235432  PCI: 00:1d.3: enabled 0

  745 08:48:59.235520  PCI: 00:1d.4: enabled 0

  746 08:48:59.239357  PCI: 00:1d.5: enabled 1

  747 08:48:59.242507  PCI: 00:1e.0: enabled 1

  748 08:48:59.242659  PCI: 00:1e.1: enabled 0

  749 08:48:59.245345  PCI: 00:1e.2: enabled 1

  750 08:48:59.248974  PCI: 00:1e.3: enabled 1

  751 08:48:59.251993  PCI: 00:1f.0: enabled 1

  752 08:48:59.252078  PCI: 00:1f.1: enabled 1

  753 08:48:59.255515  PCI: 00:1f.2: enabled 1

  754 08:48:59.259068  PCI: 00:1f.3: enabled 1

  755 08:48:59.261951  PCI: 00:1f.4: enabled 1

  756 08:48:59.262037  PCI: 00:1f.5: enabled 1

  757 08:48:59.265693  PCI: 00:1f.6: enabled 0

  758 08:48:59.268461  USB0 port 0: enabled 1

  759 08:48:59.271686  I2C: 00:15: enabled 1

  760 08:48:59.271771  I2C: 00:5d: enabled 1

  761 08:48:59.275373  GENERIC: 0.0: enabled 1

  762 08:48:59.278762  I2C: 00:1a: enabled 1

  763 08:48:59.278848  I2C: 00:38: enabled 1

  764 08:48:59.282181  I2C: 00:39: enabled 1

  765 08:48:59.285287  I2C: 00:3a: enabled 1

  766 08:48:59.285402  I2C: 00:3b: enabled 1

  767 08:48:59.289006  PCI: 00:00.0: enabled 1

  768 08:48:59.292237  SPI: 00: enabled 1

  769 08:48:59.292375  SPI: 01: enabled 1

  770 08:48:59.295397  PNP: 0c09.0: enabled 1

  771 08:48:59.298480  USB2 port 0: enabled 1

  772 08:48:59.298566  USB2 port 1: enabled 1

  773 08:48:59.301757  USB2 port 2: enabled 0

  774 08:48:59.304764  USB2 port 3: enabled 0

  775 08:48:59.308179  USB2 port 5: enabled 0

  776 08:48:59.308323  USB2 port 6: enabled 1

  777 08:48:59.311538  USB2 port 9: enabled 1

  778 08:48:59.314988  USB3 port 0: enabled 1

  779 08:48:59.315083  USB3 port 1: enabled 1

  780 08:48:59.318602  USB3 port 2: enabled 1

  781 08:48:59.321292  USB3 port 3: enabled 1

  782 08:48:59.321436  USB3 port 4: enabled 0

  783 08:48:59.324891  APIC: 05: enabled 1

  784 08:48:59.328109  APIC: 04: enabled 1

  785 08:48:59.328224  APIC: 07: enabled 1

  786 08:48:59.331450  APIC: 01: enabled 1

  787 08:48:59.334978  APIC: 06: enabled 1

  788 08:48:59.335093  APIC: 02: enabled 1

  789 08:48:59.337948  APIC: 03: enabled 1

  790 08:48:59.338061  Compare with tree...

  791 08:48:59.341256  Root Device: enabled 1

  792 08:48:59.344648   CPU_CLUSTER: 0: enabled 1

  793 08:48:59.347983    APIC: 00: enabled 1

  794 08:48:59.348166    APIC: 05: enabled 1

  795 08:48:59.351482    APIC: 04: enabled 1

  796 08:48:59.354969    APIC: 07: enabled 1

  797 08:48:59.355052    APIC: 01: enabled 1

  798 08:48:59.357762    APIC: 06: enabled 1

  799 08:48:59.361353    APIC: 02: enabled 1

  800 08:48:59.361438    APIC: 03: enabled 1

  801 08:48:59.364253   DOMAIN: 0000: enabled 1

  802 08:48:59.367748    PCI: 00:00.0: enabled 1

  803 08:48:59.371287    PCI: 00:02.0: enabled 1

  804 08:48:59.374322    PCI: 00:04.0: enabled 0

  805 08:48:59.374409    PCI: 00:05.0: enabled 0

  806 08:48:59.377947    PCI: 00:12.0: enabled 1

  807 08:48:59.380599    PCI: 00:12.5: enabled 0

  808 08:48:59.384088    PCI: 00:12.6: enabled 0

  809 08:48:59.387741    PCI: 00:14.0: enabled 1

  810 08:48:59.387857     USB0 port 0: enabled 1

  811 08:48:59.390558      USB2 port 0: enabled 1

  812 08:48:59.393954      USB2 port 1: enabled 1

  813 08:48:59.397677      USB2 port 2: enabled 0

  814 08:48:59.400456      USB2 port 3: enabled 0

  815 08:48:59.400533      USB2 port 5: enabled 0

  816 08:48:59.403978      USB2 port 6: enabled 1

  817 08:48:59.407612      USB2 port 9: enabled 1

  818 08:48:59.410617      USB3 port 0: enabled 1

  819 08:48:59.413935      USB3 port 1: enabled 1

  820 08:48:59.417306      USB3 port 2: enabled 1

  821 08:48:59.417394      USB3 port 3: enabled 1

  822 08:48:59.420440      USB3 port 4: enabled 0

  823 08:48:59.423627    PCI: 00:14.1: enabled 0

  824 08:48:59.427284    PCI: 00:14.3: enabled 1

  825 08:48:59.430366    PCI: 00:14.5: enabled 0

  826 08:48:59.430456    PCI: 00:15.0: enabled 1

  827 08:48:59.433782     I2C: 00:15: enabled 1

  828 08:48:59.437176    PCI: 00:15.1: enabled 1

  829 08:48:59.440610     I2C: 00:5d: enabled 1

  830 08:48:59.444398     GENERIC: 0.0: enabled 1

  831 08:48:59.444490    PCI: 00:15.2: enabled 0

  832 08:48:59.447027    PCI: 00:15.3: enabled 0

  833 08:48:59.450644    PCI: 00:16.0: enabled 1

  834 08:48:59.453975    PCI: 00:16.1: enabled 0

  835 08:48:59.454059    PCI: 00:16.2: enabled 0

  836 08:48:59.457337    PCI: 00:16.3: enabled 0

  837 08:48:59.460585    PCI: 00:16.4: enabled 0

  838 08:48:59.463927    PCI: 00:16.5: enabled 0

  839 08:48:59.466809    PCI: 00:17.0: enabled 1

  840 08:48:59.466898    PCI: 00:19.0: enabled 1

  841 08:48:59.470144     I2C: 00:1a: enabled 1

  842 08:48:59.473583     I2C: 00:38: enabled 1

  843 08:48:59.477192     I2C: 00:39: enabled 1

  844 08:48:59.477274     I2C: 00:3a: enabled 1

  845 08:48:59.480542     I2C: 00:3b: enabled 1

  846 08:48:59.483566    PCI: 00:19.1: enabled 0

  847 08:48:59.487233    PCI: 00:19.2: enabled 0

  848 08:48:59.490227    PCI: 00:1a.0: enabled 0

  849 08:48:59.490314    PCI: 00:1c.0: enabled 0

  850 08:48:59.493594    PCI: 00:1c.1: enabled 0

  851 08:48:59.497287    PCI: 00:1c.2: enabled 0

  852 08:48:59.500126    PCI: 00:1c.3: enabled 0

  853 08:48:59.503579    PCI: 00:1c.4: enabled 0

  854 08:48:59.503667    PCI: 00:1c.5: enabled 0

  855 08:48:59.506417    PCI: 00:1c.6: enabled 0

  856 08:48:59.509883    PCI: 00:1c.7: enabled 0

  857 08:48:59.513457    PCI: 00:1d.0: enabled 1

  858 08:48:59.517162    PCI: 00:1d.1: enabled 0

  859 08:48:59.517275    PCI: 00:1d.2: enabled 0

  860 08:48:59.519798    PCI: 00:1d.3: enabled 0

  861 08:48:59.523566    PCI: 00:1d.4: enabled 0

  862 08:48:59.526451    PCI: 00:1d.5: enabled 1

  863 08:48:59.529968     PCI: 00:00.0: enabled 1

  864 08:48:59.530082    PCI: 00:1e.0: enabled 1

  865 08:48:59.533119    PCI: 00:1e.1: enabled 0

  866 08:48:59.537141    PCI: 00:1e.2: enabled 1

  867 08:48:59.540161     SPI: 00: enabled 1

  868 08:48:59.540272    PCI: 00:1e.3: enabled 1

  869 08:48:59.543173     SPI: 01: enabled 1

  870 08:48:59.546613    PCI: 00:1f.0: enabled 1

  871 08:48:59.549789     PNP: 0c09.0: enabled 1

  872 08:48:59.549907    PCI: 00:1f.1: enabled 1

  873 08:48:59.552938    PCI: 00:1f.2: enabled 1

  874 08:48:59.556146    PCI: 00:1f.3: enabled 1

  875 08:48:59.559522    PCI: 00:1f.4: enabled 1

  876 08:48:59.562845    PCI: 00:1f.5: enabled 1

  877 08:48:59.562960    PCI: 00:1f.6: enabled 0

  878 08:48:59.566665  Root Device scanning...

  879 08:48:59.569298  scan_static_bus for Root Device

  880 08:48:59.572765  CPU_CLUSTER: 0 enabled

  881 08:48:59.575966  DOMAIN: 0000 enabled

  882 08:48:59.576054  DOMAIN: 0000 scanning...

  883 08:48:59.579474  PCI: pci_scan_bus for bus 00

  884 08:48:59.582830  PCI: 00:00.0 [8086/0000] ops

  885 08:48:59.586243  PCI: 00:00.0 [8086/9b61] enabled

  886 08:48:59.589653  PCI: 00:02.0 [8086/0000] bus ops

  887 08:48:59.593164  PCI: 00:02.0 [8086/9b41] enabled

  888 08:48:59.596144  PCI: 00:04.0 [8086/1903] disabled

  889 08:48:59.599475  PCI: 00:08.0 [8086/1911] enabled

  890 08:48:59.603040  PCI: 00:12.0 [8086/02f9] enabled

  891 08:48:59.605878  PCI: 00:14.0 [8086/0000] bus ops

  892 08:48:59.609427  PCI: 00:14.0 [8086/02ed] enabled

  893 08:48:59.613056  PCI: 00:14.2 [8086/02ef] enabled

  894 08:48:59.616491  PCI: 00:14.3 [8086/02f0] enabled

  895 08:48:59.619458  PCI: 00:15.0 [8086/0000] bus ops

  896 08:48:59.622552  PCI: 00:15.0 [8086/02e8] enabled

  897 08:48:59.625953  PCI: 00:15.1 [8086/0000] bus ops

  898 08:48:59.629290  PCI: 00:15.1 [8086/02e9] enabled

  899 08:48:59.632910  PCI: 00:16.0 [8086/0000] ops

  900 08:48:59.635809  PCI: 00:16.0 [8086/02e0] enabled

  901 08:48:59.639311  PCI: 00:17.0 [8086/0000] ops

  902 08:48:59.642980  PCI: 00:17.0 [8086/02d3] enabled

  903 08:48:59.645744  PCI: 00:19.0 [8086/0000] bus ops

  904 08:48:59.649032  PCI: 00:19.0 [8086/02c5] enabled

  905 08:48:59.652513  PCI: 00:1d.0 [8086/0000] bus ops

  906 08:48:59.655821  PCI: 00:1d.0 [8086/02b0] enabled

  907 08:48:59.662401  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  908 08:48:59.665791  PCI: 00:1e.0 [8086/0000] ops

  909 08:48:59.669479  PCI: 00:1e.0 [8086/02a8] enabled

  910 08:48:59.672420  PCI: 00:1e.2 [8086/0000] bus ops

  911 08:48:59.676085  PCI: 00:1e.2 [8086/02aa] enabled

  912 08:48:59.679172  PCI: 00:1e.3 [8086/0000] bus ops

  913 08:48:59.682462  PCI: 00:1e.3 [8086/02ab] enabled

  914 08:48:59.686088  PCI: 00:1f.0 [8086/0000] bus ops

  915 08:48:59.689035  PCI: 00:1f.0 [8086/0284] enabled

  916 08:48:59.692261  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  917 08:48:59.699170  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  918 08:48:59.702289  PCI: 00:1f.3 [8086/0000] bus ops

  919 08:48:59.705897  PCI: 00:1f.3 [8086/02c8] enabled

  920 08:48:59.709157  PCI: 00:1f.4 [8086/0000] bus ops

  921 08:48:59.712884  PCI: 00:1f.4 [8086/02a3] enabled

  922 08:48:59.715666  PCI: 00:1f.5 [8086/0000] bus ops

  923 08:48:59.719200  PCI: 00:1f.5 [8086/02a4] enabled

  924 08:48:59.722139  PCI: Leftover static devices:

  925 08:48:59.722250  PCI: 00:05.0

  926 08:48:59.725732  PCI: 00:12.5

  927 08:48:59.725846  PCI: 00:12.6

  928 08:48:59.729303  PCI: 00:14.1

  929 08:48:59.729411  PCI: 00:14.5

  930 08:48:59.729504  PCI: 00:15.2

  931 08:48:59.732015  PCI: 00:15.3

  932 08:48:59.732126  PCI: 00:16.1

  933 08:48:59.735419  PCI: 00:16.2

  934 08:48:59.735535  PCI: 00:16.3

  935 08:48:59.739146  PCI: 00:16.4

  936 08:48:59.739256  PCI: 00:16.5

  937 08:48:59.739363  PCI: 00:19.1

  938 08:48:59.742601  PCI: 00:19.2

  939 08:48:59.742715  PCI: 00:1a.0

  940 08:48:59.745415  PCI: 00:1c.0

  941 08:48:59.745524  PCI: 00:1c.1

  942 08:48:59.745628  PCI: 00:1c.2

  943 08:48:59.748958  PCI: 00:1c.3

  944 08:48:59.749065  PCI: 00:1c.4

  945 08:48:59.751910  PCI: 00:1c.5

  946 08:48:59.752023  PCI: 00:1c.6

  947 08:48:59.752120  PCI: 00:1c.7

  948 08:48:59.755365  PCI: 00:1d.1

  949 08:48:59.755443  PCI: 00:1d.2

  950 08:48:59.758641  PCI: 00:1d.3

  951 08:48:59.758721  PCI: 00:1d.4

  952 08:48:59.762133  PCI: 00:1d.5

  953 08:48:59.762219  PCI: 00:1e.1

  954 08:48:59.762287  PCI: 00:1f.1

  955 08:48:59.765682  PCI: 00:1f.2

  956 08:48:59.765766  PCI: 00:1f.6

  957 08:48:59.768633  PCI: Check your devicetree.cb.

  958 08:48:59.772161  PCI: 00:02.0 scanning...

  959 08:48:59.775131  scan_generic_bus for PCI: 00:02.0

  960 08:48:59.778601  scan_generic_bus for PCI: 00:02.0 done

  961 08:48:59.784971  scan_bus: scanning of bus PCI: 00:02.0 took 10179 usecs

  962 08:48:59.788363  PCI: 00:14.0 scanning...

  963 08:48:59.791761  scan_static_bus for PCI: 00:14.0

  964 08:48:59.791868  USB0 port 0 enabled

  965 08:48:59.794996  USB0 port 0 scanning...

  966 08:48:59.798257  scan_static_bus for USB0 port 0

  967 08:48:59.802157  USB2 port 0 enabled

  968 08:48:59.802266  USB2 port 1 enabled

  969 08:48:59.805405  USB2 port 2 disabled

  970 08:48:59.808377  USB2 port 3 disabled

  971 08:48:59.808489  USB2 port 5 disabled

  972 08:48:59.812019  USB2 port 6 enabled

  973 08:48:59.815074  USB2 port 9 enabled

  974 08:48:59.815179  USB3 port 0 enabled

  975 08:48:59.818690  USB3 port 1 enabled

  976 08:48:59.818800  USB3 port 2 enabled

  977 08:48:59.821898  USB3 port 3 enabled

  978 08:48:59.825116  USB3 port 4 disabled

  979 08:48:59.825225  USB2 port 0 scanning...

  980 08:48:59.828307  scan_static_bus for USB2 port 0

  981 08:48:59.834697  scan_static_bus for USB2 port 0 done

  982 08:48:59.838011  scan_bus: scanning of bus USB2 port 0 took 9697 usecs

  983 08:48:59.841685  USB2 port 1 scanning...

  984 08:48:59.844615  scan_static_bus for USB2 port 1

  985 08:48:59.848149  scan_static_bus for USB2 port 1 done

  986 08:48:59.854483  scan_bus: scanning of bus USB2 port 1 took 9707 usecs

  987 08:48:59.854589  USB2 port 6 scanning...

  988 08:48:59.858127  scan_static_bus for USB2 port 6

  989 08:48:59.864722  scan_static_bus for USB2 port 6 done

  990 08:48:59.868404  scan_bus: scanning of bus USB2 port 6 took 9707 usecs

  991 08:48:59.871911  USB2 port 9 scanning...

  992 08:48:59.874974  scan_static_bus for USB2 port 9

  993 08:48:59.878398  scan_static_bus for USB2 port 9 done

  994 08:48:59.885196  scan_bus: scanning of bus USB2 port 9 took 9709 usecs

  995 08:48:59.885284  USB3 port 0 scanning...

  996 08:48:59.888090  scan_static_bus for USB3 port 0

  997 08:48:59.895131  scan_static_bus for USB3 port 0 done

  998 08:48:59.898169  scan_bus: scanning of bus USB3 port 0 took 9696 usecs

  999 08:48:59.901789  USB3 port 1 scanning...

 1000 08:48:59.905140  scan_static_bus for USB3 port 1

 1001 08:48:59.907944  scan_static_bus for USB3 port 1 done

 1002 08:48:59.914669  scan_bus: scanning of bus USB3 port 1 took 9708 usecs

 1003 08:48:59.914783  USB3 port 2 scanning...

 1004 08:48:59.918295  scan_static_bus for USB3 port 2

 1005 08:48:59.924776  scan_static_bus for USB3 port 2 done

 1006 08:48:59.927938  scan_bus: scanning of bus USB3 port 2 took 9697 usecs

 1007 08:48:59.931901  USB3 port 3 scanning...

 1008 08:48:59.935153  scan_static_bus for USB3 port 3

 1009 08:48:59.937927  scan_static_bus for USB3 port 3 done

 1010 08:48:59.945078  scan_bus: scanning of bus USB3 port 3 took 9707 usecs

 1011 08:48:59.948321  scan_static_bus for USB0 port 0 done

 1012 08:48:59.954942  scan_bus: scanning of bus USB0 port 0 took 155369 usecs

 1013 08:48:59.958369  scan_static_bus for PCI: 00:14.0 done

 1014 08:48:59.961122  scan_bus: scanning of bus PCI: 00:14.0 took 172988 usecs

 1015 08:48:59.964785  PCI: 00:15.0 scanning...

 1016 08:48:59.967714  scan_generic_bus for PCI: 00:15.0

 1017 08:48:59.971832  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1018 08:48:59.977943  scan_generic_bus for PCI: 00:15.0 done

 1019 08:48:59.980927  scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs

 1020 08:48:59.984242  PCI: 00:15.1 scanning...

 1021 08:48:59.987826  scan_generic_bus for PCI: 00:15.1

 1022 08:48:59.991495  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1023 08:48:59.998103  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1024 08:49:00.001485  scan_generic_bus for PCI: 00:15.1 done

 1025 08:49:00.007963  scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs

 1026 08:49:00.008052  PCI: 00:19.0 scanning...

 1027 08:49:00.011448  scan_generic_bus for PCI: 00:19.0

 1028 08:49:00.017576  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1029 08:49:00.021236  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1030 08:49:00.024601  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1031 08:49:00.027577  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1032 08:49:00.034248  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1033 08:49:00.037696  scan_generic_bus for PCI: 00:19.0 done

 1034 08:49:00.041499  scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs

 1035 08:49:00.044079  PCI: 00:1d.0 scanning...

 1036 08:49:00.047505  do_pci_scan_bridge for PCI: 00:1d.0

 1037 08:49:00.050855  PCI: pci_scan_bus for bus 01

 1038 08:49:00.054392  PCI: 01:00.0 [1c5c/1327] enabled

 1039 08:49:00.057233  Enabling Common Clock Configuration

 1040 08:49:00.064223  L1 Sub-State supported from root port 29

 1041 08:49:00.067545  L1 Sub-State Support = 0xf

 1042 08:49:00.067635  CommonModeRestoreTime = 0x28

 1043 08:49:00.074222  Power On Value = 0x16, Power On Scale = 0x0

 1044 08:49:00.074308  ASPM: Enabled L1

 1045 08:49:00.081092  scan_bus: scanning of bus PCI: 00:1d.0 took 32786 usecs

 1046 08:49:00.083949  PCI: 00:1e.2 scanning...

 1047 08:49:00.087368  scan_generic_bus for PCI: 00:1e.2

 1048 08:49:00.091000  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1049 08:49:00.093764  scan_generic_bus for PCI: 00:1e.2 done

 1050 08:49:00.100273  scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs

 1051 08:49:00.104111  PCI: 00:1e.3 scanning...

 1052 08:49:00.106910  scan_generic_bus for PCI: 00:1e.3

 1053 08:49:00.110681  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1054 08:49:00.113785  scan_generic_bus for PCI: 00:1e.3 done

 1055 08:49:00.120043  scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs

 1056 08:49:00.123532  PCI: 00:1f.0 scanning...

 1057 08:49:00.127341  scan_static_bus for PCI: 00:1f.0

 1058 08:49:00.127426  PNP: 0c09.0 enabled

 1059 08:49:00.130245  scan_static_bus for PCI: 00:1f.0 done

 1060 08:49:00.137001  scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs

 1061 08:49:00.140468  PCI: 00:1f.3 scanning...

 1062 08:49:00.146631  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1063 08:49:00.146717  PCI: 00:1f.4 scanning...

 1064 08:49:00.150394  scan_generic_bus for PCI: 00:1f.4

 1065 08:49:00.156640  scan_generic_bus for PCI: 00:1f.4 done

 1066 08:49:00.160095  scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs

 1067 08:49:00.163255  PCI: 00:1f.5 scanning...

 1068 08:49:00.166714  scan_generic_bus for PCI: 00:1f.5

 1069 08:49:00.170182  scan_generic_bus for PCI: 00:1f.5 done

 1070 08:49:00.176312  scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs

 1071 08:49:00.182946  scan_bus: scanning of bus DOMAIN: 0000 took 605062 usecs

 1072 08:49:00.186560  scan_static_bus for Root Device done

 1073 08:49:00.193252  scan_bus: scanning of bus Root Device took 624926 usecs

 1074 08:49:00.193344  done

 1075 08:49:00.196144  Chrome EC: UHEPI supported

 1076 08:49:00.202713  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1077 08:49:00.206365  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1078 08:49:00.212866  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1079 08:49:00.219969  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1080 08:49:00.223448  SPI flash protection: WPSW=0 SRP0=0

 1081 08:49:00.229995  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1082 08:49:00.233535  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1083 08:49:00.236423  found VGA at PCI: 00:02.0

 1084 08:49:00.239986  Setting up VGA for PCI: 00:02.0

 1085 08:49:00.246433  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1086 08:49:00.249978  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1087 08:49:00.253020  Allocating resources...

 1088 08:49:00.256546  Reading resources...

 1089 08:49:00.260032  Root Device read_resources bus 0 link: 0

 1090 08:49:00.262767  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1091 08:49:00.269633  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1092 08:49:00.272995  DOMAIN: 0000 read_resources bus 0 link: 0

 1093 08:49:00.280297  PCI: 00:14.0 read_resources bus 0 link: 0

 1094 08:49:00.283193  USB0 port 0 read_resources bus 0 link: 0

 1095 08:49:00.291311  USB0 port 0 read_resources bus 0 link: 0 done

 1096 08:49:00.294793  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1097 08:49:00.302290  PCI: 00:15.0 read_resources bus 1 link: 0

 1098 08:49:00.305397  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1099 08:49:00.312480  PCI: 00:15.1 read_resources bus 2 link: 0

 1100 08:49:00.315447  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1101 08:49:00.323314  PCI: 00:19.0 read_resources bus 3 link: 0

 1102 08:49:00.329745  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1103 08:49:00.332980  PCI: 00:1d.0 read_resources bus 1 link: 0

 1104 08:49:00.339512  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1105 08:49:00.342865  PCI: 00:1e.2 read_resources bus 4 link: 0

 1106 08:49:00.349826  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1107 08:49:00.352724  PCI: 00:1e.3 read_resources bus 5 link: 0

 1108 08:49:00.359145  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1109 08:49:00.362657  PCI: 00:1f.0 read_resources bus 0 link: 0

 1110 08:49:00.369524  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1111 08:49:00.375921  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1112 08:49:00.379312  Root Device read_resources bus 0 link: 0 done

 1113 08:49:00.382817  Done reading resources.

 1114 08:49:00.386366  Show resources in subtree (Root Device)...After reading.

 1115 08:49:00.392206   Root Device child on link 0 CPU_CLUSTER: 0

 1116 08:49:00.396085    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1117 08:49:00.396219     APIC: 00

 1118 08:49:00.399081     APIC: 05

 1119 08:49:00.399191     APIC: 04

 1120 08:49:00.402621     APIC: 07

 1121 08:49:00.402735     APIC: 01

 1122 08:49:00.402831     APIC: 06

 1123 08:49:00.405520     APIC: 02

 1124 08:49:00.405655     APIC: 03

 1125 08:49:00.409263    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1126 08:49:00.419132    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1127 08:49:00.471999    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1128 08:49:00.472334     PCI: 00:00.0

 1129 08:49:00.472412     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1130 08:49:00.472477     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1131 08:49:00.472553     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1132 08:49:00.472627     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1133 08:49:00.494536     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1134 08:49:00.494819     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1135 08:49:00.498094     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1136 08:49:00.504670     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1137 08:49:00.514975     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1138 08:49:00.524815     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1139 08:49:00.534826     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1140 08:49:00.544779     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1141 08:49:00.554375     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1142 08:49:00.564477     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1143 08:49:00.570838     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1144 08:49:00.581127     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1145 08:49:00.583917     PCI: 00:02.0

 1146 08:49:00.593817     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1147 08:49:00.603789     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1148 08:49:00.610613     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1149 08:49:00.614208     PCI: 00:04.0

 1150 08:49:00.614295     PCI: 00:08.0

 1151 08:49:00.623570     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1152 08:49:00.627312     PCI: 00:12.0

 1153 08:49:00.637229     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1154 08:49:00.640125     PCI: 00:14.0 child on link 0 USB0 port 0

 1155 08:49:00.650050     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1156 08:49:00.657478      USB0 port 0 child on link 0 USB2 port 0

 1157 08:49:00.657602       USB2 port 0

 1158 08:49:00.660313       USB2 port 1

 1159 08:49:00.660405       USB2 port 2

 1160 08:49:00.663328       USB2 port 3

 1161 08:49:00.663428       USB2 port 5

 1162 08:49:00.666709       USB2 port 6

 1163 08:49:00.666825       USB2 port 9

 1164 08:49:00.670125       USB3 port 0

 1165 08:49:00.670222       USB3 port 1

 1166 08:49:00.673445       USB3 port 2

 1167 08:49:00.673539       USB3 port 3

 1168 08:49:00.676576       USB3 port 4

 1169 08:49:00.676675     PCI: 00:14.2

 1170 08:49:00.686599     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1171 08:49:00.696421     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1172 08:49:00.699904     PCI: 00:14.3

 1173 08:49:00.710310     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1174 08:49:00.713075     PCI: 00:15.0 child on link 0 I2C: 01:15

 1175 08:49:00.723151     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1176 08:49:00.726724      I2C: 01:15

 1177 08:49:00.729643     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1178 08:49:00.739623     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1179 08:49:00.739711      I2C: 02:5d

 1180 08:49:00.743179      GENERIC: 0.0

 1181 08:49:00.743261     PCI: 00:16.0

 1182 08:49:00.752792     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 08:49:00.756481     PCI: 00:17.0

 1184 08:49:00.766409     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1185 08:49:00.772811     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1186 08:49:00.782849     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1187 08:49:00.789158     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1188 08:49:00.799808     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1189 08:49:00.808941     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1190 08:49:00.812483     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1191 08:49:00.822577     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 08:49:00.822693      I2C: 03:1a

 1193 08:49:00.825928      I2C: 03:38

 1194 08:49:00.826031      I2C: 03:39

 1195 08:49:00.828839      I2C: 03:3a

 1196 08:49:00.828943      I2C: 03:3b

 1197 08:49:00.835461     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1198 08:49:00.841940     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1199 08:49:00.852039     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1200 08:49:00.862013     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1201 08:49:00.865490      PCI: 01:00.0

 1202 08:49:00.875576      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1203 08:49:00.875681     PCI: 00:1e.0

 1204 08:49:00.885543     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1205 08:49:00.895627     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1206 08:49:00.902068     PCI: 00:1e.2 child on link 0 SPI: 00

 1207 08:49:00.911572     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1208 08:49:00.911680      SPI: 00

 1209 08:49:00.914668     PCI: 00:1e.3 child on link 0 SPI: 01

 1210 08:49:00.925065     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 08:49:00.928373      SPI: 01

 1212 08:49:00.931504     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1213 08:49:00.938113     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1214 08:49:00.947767     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1215 08:49:00.951156      PNP: 0c09.0

 1216 08:49:00.958190      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1217 08:49:00.961013     PCI: 00:1f.3

 1218 08:49:00.971149     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1219 08:49:00.981223     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1220 08:49:00.981306     PCI: 00:1f.4

 1221 08:49:00.991223     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1222 08:49:01.000645     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1223 08:49:01.004476     PCI: 00:1f.5

 1224 08:49:01.010943     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1225 08:49:01.017494  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1226 08:49:01.024015  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1227 08:49:01.030693  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1228 08:49:01.034292  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1229 08:49:01.037325  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1230 08:49:01.044145  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1231 08:49:01.047011  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1232 08:49:01.053706  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1233 08:49:01.060268  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1234 08:49:01.067326  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1235 08:49:01.076964  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1236 08:49:01.083431  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1237 08:49:01.086880  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1238 08:49:01.094139  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1239 08:49:01.100619  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1240 08:49:01.103471  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1241 08:49:01.110127  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1242 08:49:01.113887  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1243 08:49:01.116718  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1244 08:49:01.123252  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1245 08:49:01.126940  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1246 08:49:01.133566  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1247 08:49:01.136443  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1248 08:49:01.143282  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1249 08:49:01.146723  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1250 08:49:01.153070  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1251 08:49:01.156551  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1252 08:49:01.163078  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1253 08:49:01.166724  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1254 08:49:01.172806  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1255 08:49:01.176121  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1256 08:49:01.182871  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1257 08:49:01.186255  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1258 08:49:01.190003  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1259 08:49:01.196010  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1260 08:49:01.199608  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1261 08:49:01.205941  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1262 08:49:01.213165  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1263 08:49:01.219209  avoid_fixed_resources: DOMAIN: 0000

 1264 08:49:01.222908  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1265 08:49:01.229346  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1266 08:49:01.236021  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1267 08:49:01.245551  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1268 08:49:01.252428  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1269 08:49:01.259288  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1270 08:49:01.269086  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1271 08:49:01.275566  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1272 08:49:01.282438  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1273 08:49:01.292245  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1274 08:49:01.298767  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1275 08:49:01.305201  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1276 08:49:01.308362  Setting resources...

 1277 08:49:01.315418  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1278 08:49:01.318765  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1279 08:49:01.321625  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1280 08:49:01.325011  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1281 08:49:01.328283  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1282 08:49:01.335220  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1283 08:49:01.341563  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1284 08:49:01.348020  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1285 08:49:01.355182  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1286 08:49:01.361822  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1287 08:49:01.364683  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1288 08:49:01.371695  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1289 08:49:01.374996  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1290 08:49:01.381356  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1291 08:49:01.384754  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1292 08:49:01.391114  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1293 08:49:01.394764  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1294 08:49:01.401246  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1295 08:49:01.404918  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1296 08:49:01.411336  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1297 08:49:01.414740  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1298 08:49:01.421027  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1299 08:49:01.424486  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1300 08:49:01.431088  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1301 08:49:01.434472  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1302 08:49:01.440622  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1303 08:49:01.443950  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1304 08:49:01.447868  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1305 08:49:01.453942  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1306 08:49:01.457724  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1307 08:49:01.463988  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1308 08:49:01.467848  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1309 08:49:01.477162  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1310 08:49:01.484095  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1311 08:49:01.490531  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1312 08:49:01.496856  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1313 08:49:01.503976  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1314 08:49:01.510218  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1315 08:49:01.513971  Root Device assign_resources, bus 0 link: 0

 1316 08:49:01.520376  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1317 08:49:01.526638  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1318 08:49:01.536777  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1319 08:49:01.543341  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1320 08:49:01.553311  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1321 08:49:01.560309  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1322 08:49:01.570051  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1323 08:49:01.573542  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1324 08:49:01.579732  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1325 08:49:01.586244  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1326 08:49:01.596579  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1327 08:49:01.602744  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1328 08:49:01.612777  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1329 08:49:01.615981  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1330 08:49:01.619498  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1331 08:49:01.629226  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1332 08:49:01.632805  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1333 08:49:01.639306  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1334 08:49:01.645588  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1335 08:49:01.655930  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1336 08:49:01.662178  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1337 08:49:01.669319  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1338 08:49:01.678970  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1339 08:49:01.685413  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1340 08:49:01.691783  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1341 08:49:01.701680  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1342 08:49:01.705407  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1343 08:49:01.711760  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1344 08:49:01.718554  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1345 08:49:01.728398  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1346 08:49:01.738292  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1347 08:49:01.741702  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1348 08:49:01.747569  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1349 08:49:01.755044  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1350 08:49:01.761551  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1351 08:49:01.771210  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1352 08:49:01.774745  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1353 08:49:01.781236  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1354 08:49:01.787244  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1355 08:49:01.794054  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1356 08:49:01.797610  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1357 08:49:01.800428  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1358 08:49:01.808018  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1359 08:49:01.811462  LPC: Trying to open IO window from 800 size 1ff

 1360 08:49:01.821262  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1361 08:49:01.827758  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1362 08:49:01.837623  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1363 08:49:01.844038  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1364 08:49:01.851206  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1365 08:49:01.854649  Root Device assign_resources, bus 0 link: 0

 1366 08:49:01.857437  Done setting resources.

 1367 08:49:01.864053  Show resources in subtree (Root Device)...After assigning values.

 1368 08:49:01.867575   Root Device child on link 0 CPU_CLUSTER: 0

 1369 08:49:01.870466    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1370 08:49:01.874071     APIC: 00

 1371 08:49:01.874159     APIC: 05

 1372 08:49:01.874221     APIC: 04

 1373 08:49:01.877567     APIC: 07

 1374 08:49:01.877651     APIC: 01

 1375 08:49:01.881209     APIC: 06

 1376 08:49:01.881284     APIC: 02

 1377 08:49:01.881343     APIC: 03

 1378 08:49:01.887732    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1379 08:49:01.897356    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1380 08:49:01.907105    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1381 08:49:01.907188     PCI: 00:00.0

 1382 08:49:01.917020     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1383 08:49:01.926714     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1384 08:49:01.936773     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1385 08:49:01.946626     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1386 08:49:01.956656     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1387 08:49:01.966334     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1388 08:49:01.972838     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1389 08:49:01.982866     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1390 08:49:01.993323     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1391 08:49:02.002678     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1392 08:49:02.012978     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1393 08:49:02.019789     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1394 08:49:02.028990     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1395 08:49:02.039630     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1396 08:49:02.049310     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1397 08:49:02.059270     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1398 08:49:02.059412     PCI: 00:02.0

 1399 08:49:02.072172     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1400 08:49:02.082462     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1401 08:49:02.092142     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1402 08:49:02.092266     PCI: 00:04.0

 1403 08:49:02.095588     PCI: 00:08.0

 1404 08:49:02.105125     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1405 08:49:02.105242     PCI: 00:12.0

 1406 08:49:02.115048     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1407 08:49:02.121691     PCI: 00:14.0 child on link 0 USB0 port 0

 1408 08:49:02.131578     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1409 08:49:02.134707      USB0 port 0 child on link 0 USB2 port 0

 1410 08:49:02.138141       USB2 port 0

 1411 08:49:02.138240       USB2 port 1

 1412 08:49:02.141696       USB2 port 2

 1413 08:49:02.141783       USB2 port 3

 1414 08:49:02.145295       USB2 port 5

 1415 08:49:02.145381       USB2 port 6

 1416 08:49:02.148047       USB2 port 9

 1417 08:49:02.148160       USB3 port 0

 1418 08:49:02.151604       USB3 port 1

 1419 08:49:02.151716       USB3 port 2

 1420 08:49:02.155025       USB3 port 3

 1421 08:49:02.155161       USB3 port 4

 1422 08:49:02.157914     PCI: 00:14.2

 1423 08:49:02.167957     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1424 08:49:02.178063     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1425 08:49:02.181598     PCI: 00:14.3

 1426 08:49:02.190997     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1427 08:49:02.194542     PCI: 00:15.0 child on link 0 I2C: 01:15

 1428 08:49:02.204563     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1429 08:49:02.208103      I2C: 01:15

 1430 08:49:02.210899     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1431 08:49:02.220949     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1432 08:49:02.224397      I2C: 02:5d

 1433 08:49:02.224479      GENERIC: 0.0

 1434 08:49:02.227785     PCI: 00:16.0

 1435 08:49:02.237842     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1436 08:49:02.237963     PCI: 00:17.0

 1437 08:49:02.247539     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1438 08:49:02.257548     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1439 08:49:02.267463     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1440 08:49:02.277500     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1441 08:49:02.286989     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1442 08:49:02.297158     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1443 08:49:02.300740     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1444 08:49:02.310296     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1445 08:49:02.313829      I2C: 03:1a

 1446 08:49:02.313913      I2C: 03:38

 1447 08:49:02.316816      I2C: 03:39

 1448 08:49:02.316921      I2C: 03:3a

 1449 08:49:02.317020      I2C: 03:3b

 1450 08:49:02.323883     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1451 08:49:02.333946     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1452 08:49:02.343536     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1453 08:49:02.352998     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1454 08:49:02.353101      PCI: 01:00.0

 1455 08:49:02.366210      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1456 08:49:02.366370     PCI: 00:1e.0

 1457 08:49:02.376212     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1458 08:49:02.386528     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1459 08:49:02.392595     PCI: 00:1e.2 child on link 0 SPI: 00

 1460 08:49:02.403053     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1461 08:49:02.403168      SPI: 00

 1462 08:49:02.405997     PCI: 00:1e.3 child on link 0 SPI: 01

 1463 08:49:02.419568     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1464 08:49:02.419706      SPI: 01

 1465 08:49:02.422934     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1466 08:49:02.432940     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1467 08:49:02.442427     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1468 08:49:02.442552      PNP: 0c09.0

 1469 08:49:02.452190      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1470 08:49:02.452329     PCI: 00:1f.3

 1471 08:49:02.462496     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1472 08:49:02.472342     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1473 08:49:02.475686     PCI: 00:1f.4

 1474 08:49:02.485166     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1475 08:49:02.495282     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1476 08:49:02.495394     PCI: 00:1f.5

 1477 08:49:02.505140     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1478 08:49:02.508587  Done allocating resources.

 1479 08:49:02.515101  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1480 08:49:02.518659  Enabling resources...

 1481 08:49:02.521505  PCI: 00:00.0 subsystem <- 8086/9b61

 1482 08:49:02.525054  PCI: 00:00.0 cmd <- 06

 1483 08:49:02.528447  PCI: 00:02.0 subsystem <- 8086/9b41

 1484 08:49:02.532008  PCI: 00:02.0 cmd <- 03

 1485 08:49:02.532119  PCI: 00:08.0 cmd <- 06

 1486 08:49:02.538674  PCI: 00:12.0 subsystem <- 8086/02f9

 1487 08:49:02.538791  PCI: 00:12.0 cmd <- 02

 1488 08:49:02.542093  PCI: 00:14.0 subsystem <- 8086/02ed

 1489 08:49:02.545602  PCI: 00:14.0 cmd <- 02

 1490 08:49:02.548639  PCI: 00:14.2 cmd <- 02

 1491 08:49:02.552407  PCI: 00:14.3 subsystem <- 8086/02f0

 1492 08:49:02.555183  PCI: 00:14.3 cmd <- 02

 1493 08:49:02.558660  PCI: 00:15.0 subsystem <- 8086/02e8

 1494 08:49:02.562097  PCI: 00:15.0 cmd <- 02

 1495 08:49:02.565440  PCI: 00:15.1 subsystem <- 8086/02e9

 1496 08:49:02.568258  PCI: 00:15.1 cmd <- 02

 1497 08:49:02.571961  PCI: 00:16.0 subsystem <- 8086/02e0

 1498 08:49:02.575381  PCI: 00:16.0 cmd <- 02

 1499 08:49:02.578373  PCI: 00:17.0 subsystem <- 8086/02d3

 1500 08:49:02.578486  PCI: 00:17.0 cmd <- 03

 1501 08:49:02.585261  PCI: 00:19.0 subsystem <- 8086/02c5

 1502 08:49:02.585405  PCI: 00:19.0 cmd <- 02

 1503 08:49:02.588569  PCI: 00:1d.0 bridge ctrl <- 0013

 1504 08:49:02.592186  PCI: 00:1d.0 subsystem <- 8086/02b0

 1505 08:49:02.594853  PCI: 00:1d.0 cmd <- 06

 1506 08:49:02.598705  PCI: 00:1e.0 subsystem <- 8086/02a8

 1507 08:49:02.602152  PCI: 00:1e.0 cmd <- 06

 1508 08:49:02.605137  PCI: 00:1e.2 subsystem <- 8086/02aa

 1509 08:49:02.608549  PCI: 00:1e.2 cmd <- 06

 1510 08:49:02.611545  PCI: 00:1e.3 subsystem <- 8086/02ab

 1511 08:49:02.614804  PCI: 00:1e.3 cmd <- 02

 1512 08:49:02.618400  PCI: 00:1f.0 subsystem <- 8086/0284

 1513 08:49:02.621333  PCI: 00:1f.0 cmd <- 407

 1514 08:49:02.624624  PCI: 00:1f.3 subsystem <- 8086/02c8

 1515 08:49:02.628095  PCI: 00:1f.3 cmd <- 02

 1516 08:49:02.631802  PCI: 00:1f.4 subsystem <- 8086/02a3

 1517 08:49:02.634896  PCI: 00:1f.4 cmd <- 03

 1518 08:49:02.638489  PCI: 00:1f.5 subsystem <- 8086/02a4

 1519 08:49:02.638589  PCI: 00:1f.5 cmd <- 406

 1520 08:49:02.648610  PCI: 01:00.0 cmd <- 02

 1521 08:49:02.653955  done.

 1522 08:49:02.667682  ME: Version: 14.0.39.1367

 1523 08:49:02.674352  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1524 08:49:02.677242  Initializing devices...

 1525 08:49:02.677328  Root Device init ...

 1526 08:49:02.684441  Chrome EC: Set SMI mask to 0x0000000000000000

 1527 08:49:02.687118  Chrome EC: clear events_b mask to 0x0000000000000000

 1528 08:49:02.694393  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1529 08:49:02.700952  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1530 08:49:02.707358  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1531 08:49:02.710816  Chrome EC: Set WAKE mask to 0x0000000000000000

 1532 08:49:02.713668  Root Device init finished in 35186 usecs

 1533 08:49:02.717297  CPU_CLUSTER: 0 init ...

 1534 08:49:02.723799  CPU_CLUSTER: 0 init finished in 2447 usecs

 1535 08:49:02.728117  PCI: 00:00.0 init ...

 1536 08:49:02.731774  CPU TDP: 15 Watts

 1537 08:49:02.735107  CPU PL2 = 64 Watts

 1538 08:49:02.737843  PCI: 00:00.0 init finished in 7079 usecs

 1539 08:49:02.741363  PCI: 00:02.0 init ...

 1540 08:49:02.745080  PCI: 00:02.0 init finished in 2252 usecs

 1541 08:49:02.748034  PCI: 00:08.0 init ...

 1542 08:49:02.751525  PCI: 00:08.0 init finished in 2251 usecs

 1543 08:49:02.754464  PCI: 00:12.0 init ...

 1544 08:49:02.758095  PCI: 00:12.0 init finished in 2243 usecs

 1545 08:49:02.761538  PCI: 00:14.0 init ...

 1546 08:49:02.764766  PCI: 00:14.0 init finished in 2252 usecs

 1547 08:49:02.767601  PCI: 00:14.2 init ...

 1548 08:49:02.771516  PCI: 00:14.2 init finished in 2252 usecs

 1549 08:49:02.774820  PCI: 00:14.3 init ...

 1550 08:49:02.778122  PCI: 00:14.3 init finished in 2270 usecs

 1551 08:49:02.781526  PCI: 00:15.0 init ...

 1552 08:49:02.784784  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1553 08:49:02.788025  PCI: 00:15.0 init finished in 5975 usecs

 1554 08:49:02.790861  PCI: 00:15.1 init ...

 1555 08:49:02.794452  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1556 08:49:02.800840  PCI: 00:15.1 init finished in 5974 usecs

 1557 08:49:02.800928  PCI: 00:16.0 init ...

 1558 08:49:02.807806  PCI: 00:16.0 init finished in 2243 usecs

 1559 08:49:02.810965  PCI: 00:19.0 init ...

 1560 08:49:02.814346  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1561 08:49:02.817773  PCI: 00:19.0 init finished in 5975 usecs

 1562 08:49:02.820768  PCI: 00:1d.0 init ...

 1563 08:49:02.824197  Initializing PCH PCIe bridge.

 1564 08:49:02.827227  PCI: 00:1d.0 init finished in 5283 usecs

 1565 08:49:02.830760  PCI: 00:1f.0 init ...

 1566 08:49:02.833580  IOAPIC: Initializing IOAPIC at 0xfec00000

 1567 08:49:02.840593  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1568 08:49:02.840678  IOAPIC: ID = 0x02

 1569 08:49:02.844095  IOAPIC: Dumping registers

 1570 08:49:02.847599    reg 0x0000: 0x02000000

 1571 08:49:02.850472    reg 0x0001: 0x00770020

 1572 08:49:02.850554    reg 0x0002: 0x00000000

 1573 08:49:02.856771  PCI: 00:1f.0 init finished in 23532 usecs

 1574 08:49:02.860462  PCI: 00:1f.4 init ...

 1575 08:49:02.863361  PCI: 00:1f.4 init finished in 2261 usecs

 1576 08:49:02.873957  PCI: 01:00.0 init ...

 1577 08:49:02.877561  PCI: 01:00.0 init finished in 2244 usecs

 1578 08:49:02.881602  PNP: 0c09.0 init ...

 1579 08:49:02.885095  Google Chrome EC uptime: 11.097 seconds

 1580 08:49:02.891770  Google Chrome AP resets since EC boot: 0

 1581 08:49:02.895001  Google Chrome most recent AP reset causes:

 1582 08:49:02.901642  Google Chrome EC reset flags at last EC boot: reset-pin

 1583 08:49:02.905198  PNP: 0c09.0 init finished in 20611 usecs

 1584 08:49:02.908015  Devices initialized

 1585 08:49:02.911688  Show all devs... After init.

 1586 08:49:02.911775  Root Device: enabled 1

 1587 08:49:02.915192  CPU_CLUSTER: 0: enabled 1

 1588 08:49:02.918090  DOMAIN: 0000: enabled 1

 1589 08:49:02.918178  APIC: 00: enabled 1

 1590 08:49:02.921366  PCI: 00:00.0: enabled 1

 1591 08:49:02.924701  PCI: 00:02.0: enabled 1

 1592 08:49:02.927783  PCI: 00:04.0: enabled 0

 1593 08:49:02.927871  PCI: 00:05.0: enabled 0

 1594 08:49:02.931416  PCI: 00:12.0: enabled 1

 1595 08:49:02.934401  PCI: 00:12.5: enabled 0

 1596 08:49:02.937947  PCI: 00:12.6: enabled 0

 1597 08:49:02.938027  PCI: 00:14.0: enabled 1

 1598 08:49:02.941644  PCI: 00:14.1: enabled 0

 1599 08:49:02.944708  PCI: 00:14.3: enabled 1

 1600 08:49:02.944792  PCI: 00:14.5: enabled 0

 1601 08:49:02.948070  PCI: 00:15.0: enabled 1

 1602 08:49:02.951359  PCI: 00:15.1: enabled 1

 1603 08:49:02.954876  PCI: 00:15.2: enabled 0

 1604 08:49:02.954956  PCI: 00:15.3: enabled 0

 1605 08:49:02.957848  PCI: 00:16.0: enabled 1

 1606 08:49:02.961468  PCI: 00:16.1: enabled 0

 1607 08:49:02.964226  PCI: 00:16.2: enabled 0

 1608 08:49:02.964329  PCI: 00:16.3: enabled 0

 1609 08:49:02.967864  PCI: 00:16.4: enabled 0

 1610 08:49:02.970746  PCI: 00:16.5: enabled 0

 1611 08:49:02.974015  PCI: 00:17.0: enabled 1

 1612 08:49:02.974100  PCI: 00:19.0: enabled 1

 1613 08:49:02.977532  PCI: 00:19.1: enabled 0

 1614 08:49:02.981208  PCI: 00:19.2: enabled 0

 1615 08:49:02.984101  PCI: 00:1a.0: enabled 0

 1616 08:49:02.984185  PCI: 00:1c.0: enabled 0

 1617 08:49:02.987544  PCI: 00:1c.1: enabled 0

 1618 08:49:02.991075  PCI: 00:1c.2: enabled 0

 1619 08:49:02.991160  PCI: 00:1c.3: enabled 0

 1620 08:49:02.994647  PCI: 00:1c.4: enabled 0

 1621 08:49:02.997324  PCI: 00:1c.5: enabled 0

 1622 08:49:03.000876  PCI: 00:1c.6: enabled 0

 1623 08:49:03.000960  PCI: 00:1c.7: enabled 0

 1624 08:49:03.004326  PCI: 00:1d.0: enabled 1

 1625 08:49:03.007271  PCI: 00:1d.1: enabled 0

 1626 08:49:03.010540  PCI: 00:1d.2: enabled 0

 1627 08:49:03.010624  PCI: 00:1d.3: enabled 0

 1628 08:49:03.014105  PCI: 00:1d.4: enabled 0

 1629 08:49:03.017490  PCI: 00:1d.5: enabled 0

 1630 08:49:03.020424  PCI: 00:1e.0: enabled 1

 1631 08:49:03.020537  PCI: 00:1e.1: enabled 0

 1632 08:49:03.024228  PCI: 00:1e.2: enabled 1

 1633 08:49:03.027356  PCI: 00:1e.3: enabled 1

 1634 08:49:03.027440  PCI: 00:1f.0: enabled 1

 1635 08:49:03.031197  PCI: 00:1f.1: enabled 0

 1636 08:49:03.033833  PCI: 00:1f.2: enabled 0

 1637 08:49:03.037218  PCI: 00:1f.3: enabled 1

 1638 08:49:03.037302  PCI: 00:1f.4: enabled 1

 1639 08:49:03.040427  PCI: 00:1f.5: enabled 1

 1640 08:49:03.043533  PCI: 00:1f.6: enabled 0

 1641 08:49:03.047084  USB0 port 0: enabled 1

 1642 08:49:03.047168  I2C: 01:15: enabled 1

 1643 08:49:03.050256  I2C: 02:5d: enabled 1

 1644 08:49:03.053578  GENERIC: 0.0: enabled 1

 1645 08:49:03.053663  I2C: 03:1a: enabled 1

 1646 08:49:03.057105  I2C: 03:38: enabled 1

 1647 08:49:03.060482  I2C: 03:39: enabled 1

 1648 08:49:03.060568  I2C: 03:3a: enabled 1

 1649 08:49:03.063733  I2C: 03:3b: enabled 1

 1650 08:49:03.067286  PCI: 00:00.0: enabled 1

 1651 08:49:03.067398  SPI: 00: enabled 1

 1652 08:49:03.070261  SPI: 01: enabled 1

 1653 08:49:03.073370  PNP: 0c09.0: enabled 1

 1654 08:49:03.073458  USB2 port 0: enabled 1

 1655 08:49:03.077003  USB2 port 1: enabled 1

 1656 08:49:03.080578  USB2 port 2: enabled 0

 1657 08:49:03.083369  USB2 port 3: enabled 0

 1658 08:49:03.083454  USB2 port 5: enabled 0

 1659 08:49:03.087216  USB2 port 6: enabled 1

 1660 08:49:03.089958  USB2 port 9: enabled 1

 1661 08:49:03.090044  USB3 port 0: enabled 1

 1662 08:49:03.093500  USB3 port 1: enabled 1

 1663 08:49:03.096567  USB3 port 2: enabled 1

 1664 08:49:03.096652  USB3 port 3: enabled 1

 1665 08:49:03.100064  USB3 port 4: enabled 0

 1666 08:49:03.103404  APIC: 05: enabled 1

 1667 08:49:03.103542  APIC: 04: enabled 1

 1668 08:49:03.106804  APIC: 07: enabled 1

 1669 08:49:03.110196  APIC: 01: enabled 1

 1670 08:49:03.110283  APIC: 06: enabled 1

 1671 08:49:03.112947  APIC: 02: enabled 1

 1672 08:49:03.113034  APIC: 03: enabled 1

 1673 08:49:03.116460  PCI: 00:08.0: enabled 1

 1674 08:49:03.119871  PCI: 00:14.2: enabled 1

 1675 08:49:03.123149  PCI: 01:00.0: enabled 1

 1676 08:49:03.126612  Disabling ACPI via APMC:

 1677 08:49:03.130248  done.

 1678 08:49:03.133088  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1679 08:49:03.136813  ELOG: NV offset 0xaf0000 size 0x4000

 1680 08:49:03.143539  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1681 08:49:03.150162  ELOG: Event(17) added with size 13 at 2023-12-11 08:46:31 UTC

 1682 08:49:03.156936  ELOG: Event(92) added with size 9 at 2023-12-11 08:46:31 UTC

 1683 08:49:03.163460  ELOG: Event(93) added with size 9 at 2023-12-11 08:46:31 UTC

 1684 08:49:03.170437  ELOG: Event(9A) added with size 9 at 2023-12-11 08:46:31 UTC

 1685 08:49:03.176607  ELOG: Event(16) added with size 11 at 2023-12-11 08:46:31 UTC

 1686 08:49:03.180150  Erasing flash addr af0000 + 4 KiB

 1687 08:49:03.249498  ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:31 UTC

 1688 08:49:03.256058  ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:31 UTC

 1689 08:49:03.262753  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 61

 1690 08:49:03.269051  ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:31 UTC

 1691 08:49:03.275923  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1692 08:49:03.282660  ELOG: Event(A0) added with size 9 at 2023-12-11 08:46:31 UTC

 1693 08:49:03.286010  elog_add_boot_reason: Logged dev mode boot

 1694 08:49:03.289317  Finalize devices...

 1695 08:49:03.292305  PCI: 00:17.0 final

 1696 08:49:03.292420  Devices finalized

 1697 08:49:03.298606  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1698 08:49:03.302359  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1699 08:49:03.308707  ME: HFSTS1                  : 0x90000245

 1700 08:49:03.312380  ME: HFSTS2                  : 0x3B850126

 1701 08:49:03.315220  ME: HFSTS3                  : 0x00000020

 1702 08:49:03.318880  ME: HFSTS4                  : 0x00004800

 1703 08:49:03.325279  ME: HFSTS5                  : 0x00000000

 1704 08:49:03.328528  ME: HFSTS6                  : 0x40400006

 1705 08:49:03.332092  ME: Manufacturing Mode      : NO

 1706 08:49:03.335514  ME: FW Partition Table      : OK

 1707 08:49:03.338249  ME: Bringup Loader Failure  : NO

 1708 08:49:03.341506  ME: Firmware Init Complete  : YES

 1709 08:49:03.345155  ME: Boot Options Present    : NO

 1710 08:49:03.348663  ME: Update In Progress      : NO

 1711 08:49:03.351514  ME: D0i3 Support            : YES

 1712 08:49:03.355039  ME: Low Power State Enabled : NO

 1713 08:49:03.358051  ME: CPU Replaced            : NO

 1714 08:49:03.361690  ME: CPU Replacement Valid   : YES

 1715 08:49:03.364599  ME: Current Working State   : 5

 1716 08:49:03.368332  ME: Current Operation State : 1

 1717 08:49:03.371847  ME: Current Operation Mode  : 0

 1718 08:49:03.374556  ME: Error Code              : 0

 1719 08:49:03.378213  ME: CPU Debug Disabled      : YES

 1720 08:49:03.381724  ME: TXT Support             : NO

 1721 08:49:03.388088  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1722 08:49:03.391593  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1723 08:49:03.394471  CBFS @ c08000 size 3f8000

 1724 08:49:03.400908  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1725 08:49:03.404422  CBFS: Locating 'fallback/dsdt.aml'

 1726 08:49:03.407727  CBFS: Found @ offset 10bb80 size 3fa5

 1727 08:49:03.414798  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 08:49:03.414887  CBFS @ c08000 size 3f8000

 1729 08:49:03.420786  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 08:49:03.424457  CBFS: Locating 'fallback/slic'

 1731 08:49:03.428772  CBFS: 'fallback/slic' not found.

 1732 08:49:03.434929  ACPI: Writing ACPI tables at 99b3e000.

 1733 08:49:03.435019  ACPI:    * FACS

 1734 08:49:03.438605  ACPI:    * DSDT

 1735 08:49:03.441649  Ramoops buffer: 0x100000@0x99a3d000.

 1736 08:49:03.445079  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1737 08:49:03.451489  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1738 08:49:03.455041  Google Chrome EC: version:

 1739 08:49:03.458445  	ro: helios_v2.0.2659-56403530b

 1740 08:49:03.461241  	rw: helios_v2.0.2849-c41de27e7d

 1741 08:49:03.461324    running image: 1

 1742 08:49:03.466206  ACPI:    * FADT

 1743 08:49:03.466289  SCI is IRQ9

 1744 08:49:03.472770  ACPI: added table 1/32, length now 40

 1745 08:49:03.472863  ACPI:     * SSDT

 1746 08:49:03.475580  Found 1 CPU(s) with 8 core(s) each.

 1747 08:49:03.479140  Error: Could not locate 'wifi_sar' in VPD.

 1748 08:49:03.486046  Checking CBFS for default SAR values

 1749 08:49:03.489494  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1750 08:49:03.492122  CBFS @ c08000 size 3f8000

 1751 08:49:03.499393  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1752 08:49:03.502113  CBFS: Locating 'wifi_sar_defaults.hex'

 1753 08:49:03.505784  CBFS: Found @ offset 5fac0 size 77

 1754 08:49:03.508713  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1755 08:49:03.515845  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1756 08:49:03.519287  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1757 08:49:03.525451  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1758 08:49:03.528754  failed to find key in VPD: dsm_calib_r0_0

 1759 08:49:03.538996  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1760 08:49:03.542330  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1761 08:49:03.545169  failed to find key in VPD: dsm_calib_r0_1

 1762 08:49:03.555404  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1763 08:49:03.561621  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1764 08:49:03.565103  failed to find key in VPD: dsm_calib_r0_2

 1765 08:49:03.575121  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1766 08:49:03.578597  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1767 08:49:03.584901  failed to find key in VPD: dsm_calib_r0_3

 1768 08:49:03.591852  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1769 08:49:03.598177  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1770 08:49:03.601692  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1771 08:49:03.605331  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1772 08:49:03.608851  EC returned error result code 1

 1773 08:49:03.612492  EC returned error result code 1

 1774 08:49:03.616115  EC returned error result code 1

 1775 08:49:03.623231  PS2K: Bad resp from EC. Vivaldi disabled!

 1776 08:49:03.626206  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1777 08:49:03.632923  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1778 08:49:03.639231  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1779 08:49:03.642528  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1780 08:49:03.649272  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1781 08:49:03.656235  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1782 08:49:03.662606  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1783 08:49:03.666158  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1784 08:49:03.672571  ACPI: added table 2/32, length now 44

 1785 08:49:03.672669  ACPI:    * MCFG

 1786 08:49:03.675898  ACPI: added table 3/32, length now 48

 1787 08:49:03.679515  ACPI:    * TPM2

 1788 08:49:03.682388  TPM2 log created at 99a2d000

 1789 08:49:03.685961  ACPI: added table 4/32, length now 52

 1790 08:49:03.686045  ACPI:    * MADT

 1791 08:49:03.688805  SCI is IRQ9

 1792 08:49:03.692564  ACPI: added table 5/32, length now 56

 1793 08:49:03.692646  current = 99b43ac0

 1794 08:49:03.695381  ACPI:    * DMAR

 1795 08:49:03.699387  ACPI: added table 6/32, length now 60

 1796 08:49:03.702085  ACPI:    * IGD OpRegion

 1797 08:49:03.702194  GMA: Found VBT in CBFS

 1798 08:49:03.705585  GMA: Found valid VBT in CBFS

 1799 08:49:03.709032  ACPI: added table 7/32, length now 64

 1800 08:49:03.711939  ACPI:    * HPET

 1801 08:49:03.715671  ACPI: added table 8/32, length now 68

 1802 08:49:03.715753  ACPI: done.

 1803 08:49:03.719088  ACPI tables: 31744 bytes.

 1804 08:49:03.722631  smbios_write_tables: 99a2c000

 1805 08:49:03.725525  EC returned error result code 3

 1806 08:49:03.729141  Couldn't obtain OEM name from CBI

 1807 08:49:03.732755  Create SMBIOS type 17

 1808 08:49:03.735473  PCI: 00:00.0 (Intel Cannonlake)

 1809 08:49:03.738976  PCI: 00:14.3 (Intel WiFi)

 1810 08:49:03.742463  SMBIOS tables: 939 bytes.

 1811 08:49:03.745964  Writing table forward entry at 0x00000500

 1812 08:49:03.752397  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1813 08:49:03.755911  Writing coreboot table at 0x99b62000

 1814 08:49:03.762125   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1815 08:49:03.765700   1. 0000000000001000-000000000009ffff: RAM

 1816 08:49:03.768960   2. 00000000000a0000-00000000000fffff: RESERVED

 1817 08:49:03.775404   3. 0000000000100000-0000000099a2bfff: RAM

 1818 08:49:03.778799   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1819 08:49:03.785088   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1820 08:49:03.792160   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1821 08:49:03.795078   7. 000000009a000000-000000009f7fffff: RESERVED

 1822 08:49:03.801518   8. 00000000e0000000-00000000efffffff: RESERVED

 1823 08:49:03.805066   9. 00000000fc000000-00000000fc000fff: RESERVED

 1824 08:49:03.808468  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1825 08:49:03.814783  11. 00000000fed10000-00000000fed17fff: RESERVED

 1826 08:49:03.818216  12. 00000000fed80000-00000000fed83fff: RESERVED

 1827 08:49:03.824721  13. 00000000fed90000-00000000fed91fff: RESERVED

 1828 08:49:03.828426  14. 00000000feda0000-00000000feda1fff: RESERVED

 1829 08:49:03.834810  15. 0000000100000000-000000045e7fffff: RAM

 1830 08:49:03.838476  Graphics framebuffer located at 0xc0000000

 1831 08:49:03.841269  Passing 5 GPIOs to payload:

 1832 08:49:03.844635              NAME |       PORT | POLARITY |     VALUE

 1833 08:49:03.851784     write protect |  undefined |     high |       low

 1834 08:49:03.854561               lid |  undefined |     high |      high

 1835 08:49:03.861205             power |  undefined |     high |       low

 1836 08:49:03.868462             oprom |  undefined |     high |       low

 1837 08:49:03.871364          EC in RW | 0x000000cb |     high |       low

 1838 08:49:03.874709  Board ID: 4

 1839 08:49:03.878104  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1840 08:49:03.881378  CBFS @ c08000 size 3f8000

 1841 08:49:03.887930  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1842 08:49:03.894285  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1843 08:49:03.894387  coreboot table: 1492 bytes.

 1844 08:49:03.897664  IMD ROOT    0. 99fff000 00001000

 1845 08:49:03.901010  IMD SMALL   1. 99ffe000 00001000

 1846 08:49:03.904504  FSP MEMORY  2. 99c4e000 003b0000

 1847 08:49:03.908171  CONSOLE     3. 99c2e000 00020000

 1848 08:49:03.910960  FMAP        4. 99c2d000 0000054e

 1849 08:49:03.914516  TIME STAMP  5. 99c2c000 00000910

 1850 08:49:03.918034  VBOOT WORK  6. 99c18000 00014000

 1851 08:49:03.920939  MRC DATA    7. 99c16000 00001958

 1852 08:49:03.924304  ROMSTG STCK 8. 99c15000 00001000

 1853 08:49:03.927467  AFTER CAR   9. 99c0b000 0000a000

 1854 08:49:03.930957  RAMSTAGE   10. 99baf000 0005c000

 1855 08:49:03.934566  REFCODE    11. 99b7a000 00035000

 1856 08:49:03.937474  SMM BACKUP 12. 99b6a000 00010000

 1857 08:49:03.941206  COREBOOT   13. 99b62000 00008000

 1858 08:49:03.944710  ACPI       14. 99b3e000 00024000

 1859 08:49:03.947468  ACPI GNVS  15. 99b3d000 00001000

 1860 08:49:03.950867  RAMOOPS    16. 99a3d000 00100000

 1861 08:49:03.954394  TPM2 TCGLOG17. 99a2d000 00010000

 1862 08:49:03.957979  SMBIOS     18. 99a2c000 00000800

 1863 08:49:03.961480  IMD small region:

 1864 08:49:03.964145    IMD ROOT    0. 99ffec00 00000400

 1865 08:49:03.967861    FSP RUNTIME 1. 99ffebe0 00000004

 1866 08:49:03.970756    EC HOSTEVENT 2. 99ffebc0 00000008

 1867 08:49:03.974507    POWER STATE 3. 99ffeb80 00000040

 1868 08:49:03.978119    ROMSTAGE    4. 99ffeb60 00000004

 1869 08:49:03.980992    MEM INFO    5. 99ffe9a0 000001b9

 1870 08:49:03.984527    VPD         6. 99ffe920 0000006c

 1871 08:49:03.987487  MTRR: Physical address space:

 1872 08:49:03.994703  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1873 08:49:04.000653  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1874 08:49:04.007625  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1875 08:49:04.013973  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1876 08:49:04.020727  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1877 08:49:04.027347  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1878 08:49:04.033646  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1879 08:49:04.037146  MTRR: Fixed MSR 0x250 0x0606060606060606

 1880 08:49:04.040830  MTRR: Fixed MSR 0x258 0x0606060606060606

 1881 08:49:04.043722  MTRR: Fixed MSR 0x259 0x0000000000000000

 1882 08:49:04.047461  MTRR: Fixed MSR 0x268 0x0606060606060606

 1883 08:49:04.053660  MTRR: Fixed MSR 0x269 0x0606060606060606

 1884 08:49:04.057084  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1885 08:49:04.060597  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1886 08:49:04.063477  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1887 08:49:04.070502  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1888 08:49:04.073432  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1889 08:49:04.077016  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1890 08:49:04.080609  call enable_fixed_mtrr()

 1891 08:49:04.083660  CPU physical address size: 39 bits

 1892 08:49:04.087101  MTRR: default type WB/UC MTRR counts: 6/8.

 1893 08:49:04.093560  MTRR: WB selected as default type.

 1894 08:49:04.096546  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1895 08:49:04.103079  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1896 08:49:04.109701  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1897 08:49:04.116749  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1898 08:49:04.123149  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1899 08:49:04.130063  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1900 08:49:04.132755  MTRR: Fixed MSR 0x250 0x0606060606060606

 1901 08:49:04.139384  MTRR: Fixed MSR 0x258 0x0606060606060606

 1902 08:49:04.143344  MTRR: Fixed MSR 0x259 0x0000000000000000

 1903 08:49:04.146033  MTRR: Fixed MSR 0x268 0x0606060606060606

 1904 08:49:04.149442  MTRR: Fixed MSR 0x269 0x0606060606060606

 1905 08:49:04.155847  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1906 08:49:04.159440  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1907 08:49:04.162856  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1908 08:49:04.166225  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1909 08:49:04.169594  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1910 08:49:04.175911  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1911 08:49:04.175995  

 1912 08:49:04.176060  MTRR check

 1913 08:49:04.179581  Fixed MTRRs   : Enabled

 1914 08:49:04.182596  Variable MTRRs: Enabled

 1915 08:49:04.182678  

 1916 08:49:04.186356  call enable_fixed_mtrr()

 1917 08:49:04.189187  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1918 08:49:04.192722  CPU physical address size: 39 bits

 1919 08:49:04.199178  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1920 08:49:04.202843  MTRR: Fixed MSR 0x250 0x0606060606060606

 1921 08:49:04.205776  MTRR: Fixed MSR 0x250 0x0606060606060606

 1922 08:49:04.212404  MTRR: Fixed MSR 0x258 0x0606060606060606

 1923 08:49:04.215834  MTRR: Fixed MSR 0x259 0x0000000000000000

 1924 08:49:04.218774  MTRR: Fixed MSR 0x268 0x0606060606060606

 1925 08:49:04.222600  MTRR: Fixed MSR 0x269 0x0606060606060606

 1926 08:49:04.225949  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1927 08:49:04.232246  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1928 08:49:04.235668  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1929 08:49:04.239376  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1930 08:49:04.241980  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1931 08:49:04.249189  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1932 08:49:04.252120  MTRR: Fixed MSR 0x258 0x0606060606060606

 1933 08:49:04.255561  MTRR: Fixed MSR 0x259 0x0000000000000000

 1934 08:49:04.258982  MTRR: Fixed MSR 0x268 0x0606060606060606

 1935 08:49:04.265545  MTRR: Fixed MSR 0x269 0x0606060606060606

 1936 08:49:04.268659  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1937 08:49:04.272298  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1938 08:49:04.275496  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1939 08:49:04.281908  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1940 08:49:04.285456  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1941 08:49:04.288424  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1942 08:49:04.291946  call enable_fixed_mtrr()

 1943 08:49:04.295605  call enable_fixed_mtrr()

 1944 08:49:04.298305  CPU physical address size: 39 bits

 1945 08:49:04.301978  MTRR: Fixed MSR 0x250 0x0606060606060606

 1946 08:49:04.304844  MTRR: Fixed MSR 0x250 0x0606060606060606

 1947 08:49:04.311981  MTRR: Fixed MSR 0x258 0x0606060606060606

 1948 08:49:04.314961  MTRR: Fixed MSR 0x259 0x0000000000000000

 1949 08:49:04.318612  MTRR: Fixed MSR 0x268 0x0606060606060606

 1950 08:49:04.321509  MTRR: Fixed MSR 0x269 0x0606060606060606

 1951 08:49:04.325001  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1952 08:49:04.331924  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1953 08:49:04.334717  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1954 08:49:04.338200  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1955 08:49:04.341755  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1956 08:49:04.348002  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1957 08:49:04.351437  MTRR: Fixed MSR 0x258 0x0606060606060606

 1958 08:49:04.354881  call enable_fixed_mtrr()

 1959 08:49:04.357658  MTRR: Fixed MSR 0x259 0x0000000000000000

 1960 08:49:04.361386  MTRR: Fixed MSR 0x268 0x0606060606060606

 1961 08:49:04.364990  MTRR: Fixed MSR 0x269 0x0606060606060606

 1962 08:49:04.371375  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1963 08:49:04.374298  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1964 08:49:04.377761  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1965 08:49:04.381220  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1966 08:49:04.387755  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1967 08:49:04.391063  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1968 08:49:04.394639  CPU physical address size: 39 bits

 1969 08:49:04.397990  call enable_fixed_mtrr()

 1970 08:49:04.401358  CPU physical address size: 39 bits

 1971 08:49:04.404165  MTRR: Fixed MSR 0x250 0x0606060606060606

 1972 08:49:04.407859  MTRR: Fixed MSR 0x250 0x0606060606060606

 1973 08:49:04.414376  MTRR: Fixed MSR 0x258 0x0606060606060606

 1974 08:49:04.417264  MTRR: Fixed MSR 0x259 0x0000000000000000

 1975 08:49:04.420921  MTRR: Fixed MSR 0x268 0x0606060606060606

 1976 08:49:04.423797  MTRR: Fixed MSR 0x269 0x0606060606060606

 1977 08:49:04.431015  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1978 08:49:04.433736  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1979 08:49:04.437260  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1980 08:49:04.440761  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1981 08:49:04.447285  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1982 08:49:04.450580  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1983 08:49:04.453574  MTRR: Fixed MSR 0x258 0x0606060606060606

 1984 08:49:04.457179  call enable_fixed_mtrr()

 1985 08:49:04.460541  MTRR: Fixed MSR 0x259 0x0000000000000000

 1986 08:49:04.463979  MTRR: Fixed MSR 0x268 0x0606060606060606

 1987 08:49:04.470263  MTRR: Fixed MSR 0x269 0x0606060606060606

 1988 08:49:04.473820  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1989 08:49:04.476568  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1990 08:49:04.480218  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1991 08:49:04.486576  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1992 08:49:04.490199  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1993 08:49:04.493185  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1994 08:49:04.496673  CPU physical address size: 39 bits

 1995 08:49:04.500055  call enable_fixed_mtrr()

 1996 08:49:04.503287  CPU physical address size: 39 bits

 1997 08:49:04.506561  CPU physical address size: 39 bits

 1998 08:49:04.509931  CBFS @ c08000 size 3f8000

 1999 08:49:04.516262  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 2000 08:49:04.519701  CBFS: Locating 'fallback/payload'

 2001 08:49:04.523299  CBFS: Found @ offset 1c96c0 size 3f798

 2002 08:49:04.529716  Checking segment from ROM address 0xffdd16f8

 2003 08:49:04.533346  Checking segment from ROM address 0xffdd1714

 2004 08:49:04.536110  Loading segment from ROM address 0xffdd16f8

 2005 08:49:04.539692    code (compression=0)

 2006 08:49:04.549505    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2007 08:49:04.555852  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2008 08:49:04.559250  it's not compressed!

 2009 08:49:04.650950  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2010 08:49:04.657426  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2011 08:49:04.661097  Loading segment from ROM address 0xffdd1714

 2012 08:49:04.664493    Entry Point 0x30000000

 2013 08:49:04.667906  Loaded segments

 2014 08:49:04.673613  Finalizing chipset.

 2015 08:49:04.676434  Finalizing SMM.

 2016 08:49:04.679820  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2017 08:49:04.683052  mp_park_aps done after 0 msecs.

 2018 08:49:04.689574  Jumping to boot code at 30000000(99b62000)

 2019 08:49:04.696663  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2020 08:49:04.696744  

 2021 08:49:04.696807  

 2022 08:49:04.696866  

 2023 08:49:04.700070  Starting depthcharge on Helios...

 2024 08:49:04.700154  

 2025 08:49:04.700509  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2026 08:49:04.700608  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2027 08:49:04.700689  Setting prompt string to ['hatch:']
 2028 08:49:04.700769  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2029 08:49:04.709483  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2030 08:49:04.709566  

 2031 08:49:04.716249  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2032 08:49:04.716371  

 2033 08:49:04.722657  board_setup: Info: eMMC controller not present; skipping

 2034 08:49:04.722740  

 2035 08:49:04.726197  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2036 08:49:04.726280  

 2037 08:49:04.733113  board_setup: Info: SDHCI controller not present; skipping

 2038 08:49:04.733195  

 2039 08:49:04.739177  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2040 08:49:04.739263  

 2041 08:49:04.739327  Wipe memory regions:

 2042 08:49:04.739388  

 2043 08:49:04.742585  	[0x00000000001000, 0x000000000a0000)

 2044 08:49:04.742667  

 2045 08:49:04.745743  	[0x00000000100000, 0x00000030000000)

 2046 08:49:04.812700  

 2047 08:49:04.815584  	[0x00000030657430, 0x00000099a2c000)

 2048 08:49:04.953241  

 2049 08:49:04.956068  	[0x00000100000000, 0x0000045e800000)

 2050 08:49:06.338547  

 2051 08:49:06.338729  R8152: Initializing

 2052 08:49:06.338851  

 2053 08:49:06.342196  Version 9 (ocp_data = 6010)

 2054 08:49:06.345862  

 2055 08:49:06.345942  R8152: Done initializing

 2056 08:49:06.346009  

 2057 08:49:06.349434  Adding net device

 2058 08:49:06.831949  

 2059 08:49:06.832084  R8152: Initializing

 2060 08:49:06.832154  

 2061 08:49:06.835577  Version 6 (ocp_data = 5c30)

 2062 08:49:06.835684  

 2063 08:49:06.838435  R8152: Done initializing

 2064 08:49:06.838543  

 2065 08:49:06.842120  net_add_device: Attemp to include the same device

 2066 08:49:06.846043  

 2067 08:49:06.852960  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2068 08:49:06.853078  

 2069 08:49:06.853182  

 2070 08:49:06.853276  

 2071 08:49:06.853604  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2073 08:49:06.954013  hatch: tftpboot 192.168.201.1 12243785/tftp-deploy-p2nw9b_z/kernel/bzImage 12243785/tftp-deploy-p2nw9b_z/kernel/cmdline 12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz

 2074 08:49:06.954214  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2075 08:49:06.954333  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2076 08:49:06.958942  tftpboot 192.168.201.1 12243785/tftp-deploy-p2nw9b_z/kernel/bzImploy-p2nw9b_z/kernel/cmdline 12243785/tftp-deploy-p2nw9b_z/ramdisk/ramdisk.cpio.gz

 2077 08:49:06.959039  

 2078 08:49:06.959106  Waiting for link

 2079 08:49:07.159424  

 2080 08:49:07.159565  done.

 2081 08:49:07.159634  

 2082 08:49:07.159697  MAC: 00:24:32:50:19:be

 2083 08:49:07.159757  

 2084 08:49:07.162936  Sending DHCP discover... done.

 2085 08:49:07.163022  

 2086 08:49:07.166361  Waiting for reply... done.

 2087 08:49:07.166446  

 2088 08:49:07.169463  Sending DHCP request... done.

 2089 08:49:07.169548  

 2090 08:49:07.177555  Waiting for reply... done.

 2091 08:49:07.177646  

 2092 08:49:07.177714  My ip is 192.168.201.15

 2093 08:49:07.177777  

 2094 08:49:07.181112  The DHCP server ip is 192.168.201.1

 2095 08:49:07.184354  

 2096 08:49:07.187597  TFTP server IP predefined by user: 192.168.201.1

 2097 08:49:07.187707  

 2098 08:49:07.194261  Bootfile predefined by user: 12243785/tftp-deploy-p2nw9b_z/kernel/bzImage

 2099 08:49:07.194346  

 2100 08:49:07.197537  Sending tftp read request... done.

 2101 08:49:07.197655  

 2102 08:49:07.200942  Waiting for the transfer... 

 2103 08:49:07.204009  

 2104 08:49:07.716368  00000000 ################################################################

 2105 08:49:07.716506  

 2106 08:49:08.243547  00080000 ################################################################

 2107 08:49:08.243708  

 2108 08:49:08.756057  00100000 ################################################################

 2109 08:49:08.756208  

 2110 08:49:09.265114  00180000 ################################################################

 2111 08:49:09.265244  

 2112 08:49:09.780323  00200000 ################################################################

 2113 08:49:09.780493  

 2114 08:49:10.299649  00280000 ################################################################

 2115 08:49:10.299818  

 2116 08:49:10.817626  00300000 ################################################################

 2117 08:49:10.817794  

 2118 08:49:11.331857  00380000 ################################################################

 2119 08:49:11.332026  

 2120 08:49:11.853328  00400000 ################################################################

 2121 08:49:11.853497  

 2122 08:49:12.385117  00480000 ################################################################

 2123 08:49:12.385255  

 2124 08:49:12.930746  00500000 ################################################################

 2125 08:49:12.930879  

 2126 08:49:13.475721  00580000 ################################################################

 2127 08:49:13.475855  

 2128 08:49:13.994289  00600000 ################################################################

 2129 08:49:13.994469  

 2130 08:49:14.498384  00680000 ################################################################

 2131 08:49:14.498527  

 2132 08:49:15.012912  00700000 ################################################################

 2133 08:49:15.013055  

 2134 08:49:15.533976  00780000 ################################################################

 2135 08:49:15.534140  

 2136 08:49:15.716658  00800000 ####################### done.

 2137 08:49:15.716796  

 2138 08:49:15.720038  The bootfile was 8572816 bytes long.

 2139 08:49:15.720123  

 2140 08:49:15.723380  Sending tftp read request... done.

 2141 08:49:15.723467  

 2142 08:49:15.726810  Waiting for the transfer... 

 2143 08:49:15.726903  

 2144 08:49:16.239854  00000000 ################################################################

 2145 08:49:16.240017  

 2146 08:49:16.755801  00080000 ################################################################

 2147 08:49:16.755966  

 2148 08:49:17.276964  00100000 ################################################################

 2149 08:49:17.277106  

 2150 08:49:17.808397  00180000 ################################################################

 2151 08:49:17.808531  

 2152 08:49:18.342081  00200000 ################################################################

 2153 08:49:18.342220  

 2154 08:49:18.871407  00280000 ################################################################

 2155 08:49:18.871580  

 2156 08:49:19.401333  00300000 ################################################################

 2157 08:49:19.401471  

 2158 08:49:19.914867  00380000 ################################################################

 2159 08:49:19.915014  

 2160 08:49:20.425316  00400000 ################################################################

 2161 08:49:20.425458  

 2162 08:49:20.967990  00480000 ################################################################

 2163 08:49:20.968122  

 2164 08:49:21.491289  00500000 ############################################################### done.

 2165 08:49:21.491426  

 2166 08:49:21.494985  Sending tftp read request... done.

 2167 08:49:21.495070  

 2168 08:49:21.498075  Waiting for the transfer... 

 2169 08:49:21.498159  

 2170 08:49:21.498225  00000000 # done.

 2171 08:49:21.498288  

 2172 08:49:21.508185  Command line loaded dynamically from TFTP file: 12243785/tftp-deploy-p2nw9b_z/kernel/cmdline

 2173 08:49:21.508270  

 2174 08:49:21.537449  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243785/extract-nfsrootfs-cy3zqq00,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2175 08:49:21.537553  

 2176 08:49:21.541097  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2177 08:49:21.547032  

 2178 08:49:21.550279  Shutting down all USB controllers.

 2179 08:49:21.550362  

 2180 08:49:21.550434  Removing current net device

 2181 08:49:21.554079  

 2182 08:49:21.554162  Finalizing coreboot

 2183 08:49:21.554228  

 2184 08:49:21.560516  Exiting depthcharge with code 4 at timestamp: 24256777

 2185 08:49:21.560599  

 2186 08:49:21.560664  

 2187 08:49:21.560725  Starting kernel ...

 2188 08:49:21.560785  

 2189 08:49:21.560841  

 2190 08:49:21.561198  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2191 08:49:21.561293  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2192 08:49:21.561367  Setting prompt string to ['Linux version [0-9]']
 2193 08:49:21.561434  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2194 08:49:21.561499  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2196 08:53:46.561541  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2198 08:53:46.561772  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2200 08:53:46.561966  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2203 08:53:46.562253  end: 2 depthcharge-action (duration 00:05:00) [common]
 2205 08:53:46.562487  Cleaning after the job
 2206 08:53:46.562580  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/ramdisk
 2207 08:53:46.563529  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/kernel
 2208 08:53:46.565094  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/nfsrootfs
 2209 08:53:46.658482  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243785/tftp-deploy-p2nw9b_z/modules
 2210 08:53:46.658979  start: 4.1 power-off (timeout 00:00:30) [common]
 2211 08:53:46.659161  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2212 08:53:46.729110  >> Command sent successfully.

 2213 08:53:46.731631  Returned 0 in 0 seconds
 2214 08:53:46.832020  end: 4.1 power-off (duration 00:00:00) [common]
 2216 08:53:46.832387  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2217 08:53:46.832655  Listened to connection for namespace 'common' for up to 1s
 2219 08:53:46.833038  Listened to connection for namespace 'common' for up to 1s
 2220 08:53:47.833587  Finalising connection for namespace 'common'
 2221 08:53:47.833774  Disconnecting from shell: Finalise
 2222 08:53:47.833855  
 2223 08:53:47.934164  end: 4.2 read-feedback (duration 00:00:01) [common]
 2224 08:53:47.934316  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243785
 2225 08:53:48.533843  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243785
 2226 08:53:48.534027  JobError: Your job cannot terminate cleanly.