Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 08:45:59.245713 lava-dispatcher, installed at version: 2023.10
2 08:45:59.245941 start: 0 validate
3 08:45:59.246079 Start time: 2023-12-11 08:45:59.246071+00:00 (UTC)
4 08:45:59.246206 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:45:59.246338 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 08:45:59.509520 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:45:59.510314 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:45:59.778894 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:45:59.779121 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 08:46:00.048453 Using caching service: 'http://localhost/cache/?uri=%s'
11 08:46:00.049171 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1187-g657481329b53c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 08:46:00.323946 validate duration: 1.08
14 08:46:00.324335 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:46:00.324475 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:46:00.324614 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:46:00.324791 Not decompressing ramdisk as can be used compressed.
18 08:46:00.324919 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 08:46:00.325023 saving as /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/ramdisk/initrd.cpio.gz
20 08:46:00.325126 total size: 5671549 (5 MB)
21 08:46:00.326591 progress 0 % (0 MB)
22 08:46:00.328273 progress 5 % (0 MB)
23 08:46:00.330037 progress 10 % (0 MB)
24 08:46:00.331675 progress 15 % (0 MB)
25 08:46:00.333330 progress 20 % (1 MB)
26 08:46:00.334965 progress 25 % (1 MB)
27 08:46:00.336434 progress 30 % (1 MB)
28 08:46:00.338039 progress 35 % (1 MB)
29 08:46:00.339601 progress 40 % (2 MB)
30 08:46:00.341063 progress 45 % (2 MB)
31 08:46:00.342715 progress 50 % (2 MB)
32 08:46:00.344325 progress 55 % (3 MB)
33 08:46:00.345724 progress 60 % (3 MB)
34 08:46:00.347325 progress 65 % (3 MB)
35 08:46:00.348931 progress 70 % (3 MB)
36 08:46:00.350323 progress 75 % (4 MB)
37 08:46:00.351937 progress 80 % (4 MB)
38 08:46:00.353491 progress 85 % (4 MB)
39 08:46:00.354919 progress 90 % (4 MB)
40 08:46:00.356603 progress 95 % (5 MB)
41 08:46:00.358185 progress 100 % (5 MB)
42 08:46:00.358295 5 MB downloaded in 0.03 s (163.06 MB/s)
43 08:46:00.358449 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:46:00.358689 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:46:00.358775 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:46:00.358857 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:46:00.358984 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 08:46:00.359060 saving as /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/kernel/bzImage
50 08:46:00.359122 total size: 8572816 (8 MB)
51 08:46:00.359182 No compression specified
52 08:46:00.360368 progress 0 % (0 MB)
53 08:46:00.362864 progress 5 % (0 MB)
54 08:46:00.365253 progress 10 % (0 MB)
55 08:46:00.367510 progress 15 % (1 MB)
56 08:46:00.369810 progress 20 % (1 MB)
57 08:46:00.372116 progress 25 % (2 MB)
58 08:46:00.374385 progress 30 % (2 MB)
59 08:46:00.376769 progress 35 % (2 MB)
60 08:46:00.379119 progress 40 % (3 MB)
61 08:46:00.381457 progress 45 % (3 MB)
62 08:46:00.383756 progress 50 % (4 MB)
63 08:46:00.386003 progress 55 % (4 MB)
64 08:46:00.388259 progress 60 % (4 MB)
65 08:46:00.390689 progress 65 % (5 MB)
66 08:46:00.393138 progress 70 % (5 MB)
67 08:46:00.395483 progress 75 % (6 MB)
68 08:46:00.397805 progress 80 % (6 MB)
69 08:46:00.400097 progress 85 % (6 MB)
70 08:46:00.402319 progress 90 % (7 MB)
71 08:46:00.404573 progress 95 % (7 MB)
72 08:46:00.406948 progress 100 % (8 MB)
73 08:46:00.407139 8 MB downloaded in 0.05 s (170.28 MB/s)
74 08:46:00.407283 end: 1.2.1 http-download (duration 00:00:00) [common]
76 08:46:00.407515 end: 1.2 download-retry (duration 00:00:00) [common]
77 08:46:00.407603 start: 1.3 download-retry (timeout 00:10:00) [common]
78 08:46:00.407731 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 08:46:00.407874 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 08:46:00.407941 saving as /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/nfsrootfs/full.rootfs.tar
81 08:46:00.408001 total size: 126031368 (120 MB)
82 08:46:00.408063 Using unxz to decompress xz
83 08:46:00.412172 progress 0 % (0 MB)
84 08:46:00.903394 progress 5 % (6 MB)
85 08:46:01.408250 progress 10 % (12 MB)
86 08:46:01.921508 progress 15 % (18 MB)
87 08:46:02.447098 progress 20 % (24 MB)
88 08:46:02.797097 progress 25 % (30 MB)
89 08:46:03.135790 progress 30 % (36 MB)
90 08:46:03.400467 progress 35 % (42 MB)
91 08:46:03.580239 progress 40 % (48 MB)
92 08:46:03.943077 progress 45 % (54 MB)
93 08:46:04.312631 progress 50 % (60 MB)
94 08:46:04.651286 progress 55 % (66 MB)
95 08:46:05.005863 progress 60 % (72 MB)
96 08:46:05.340461 progress 65 % (78 MB)
97 08:46:05.726970 progress 70 % (84 MB)
98 08:46:06.138918 progress 75 % (90 MB)
99 08:46:06.553159 progress 80 % (96 MB)
100 08:46:06.653608 progress 85 % (102 MB)
101 08:46:06.808331 progress 90 % (108 MB)
102 08:46:07.143382 progress 95 % (114 MB)
103 08:46:07.513924 progress 100 % (120 MB)
104 08:46:07.518804 120 MB downloaded in 7.11 s (16.90 MB/s)
105 08:46:07.519070 end: 1.3.1 http-download (duration 00:00:07) [common]
107 08:46:07.519332 end: 1.3 download-retry (duration 00:00:07) [common]
108 08:46:07.519422 start: 1.4 download-retry (timeout 00:09:53) [common]
109 08:46:07.519509 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 08:46:07.519745 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1187-g657481329b53c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 08:46:07.519821 saving as /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/modules/modules.tar
112 08:46:07.519885 total size: 251012 (0 MB)
113 08:46:07.519950 Using unxz to decompress xz
114 08:46:07.524060 progress 13 % (0 MB)
115 08:46:07.524478 progress 26 % (0 MB)
116 08:46:07.524717 progress 39 % (0 MB)
117 08:46:07.526353 progress 52 % (0 MB)
118 08:46:07.528442 progress 65 % (0 MB)
119 08:46:07.530412 progress 78 % (0 MB)
120 08:46:07.532339 progress 91 % (0 MB)
121 08:46:07.534360 progress 100 % (0 MB)
122 08:46:07.539787 0 MB downloaded in 0.02 s (12.03 MB/s)
123 08:46:07.540024 end: 1.4.1 http-download (duration 00:00:00) [common]
125 08:46:07.540284 end: 1.4 download-retry (duration 00:00:00) [common]
126 08:46:07.540380 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 08:46:07.540476 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 08:46:10.565202 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243818/extract-nfsrootfs-mpv96gp8
129 08:46:10.565386 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 08:46:10.565486 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 08:46:10.565647 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv
132 08:46:10.565777 makedir: /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin
133 08:46:10.565880 makedir: /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/tests
134 08:46:10.565977 makedir: /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/results
135 08:46:10.566074 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-add-keys
136 08:46:10.566216 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-add-sources
137 08:46:10.566356 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-background-process-start
138 08:46:10.566491 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-background-process-stop
139 08:46:10.566619 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-common-functions
140 08:46:10.566743 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-echo-ipv4
141 08:46:10.566868 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-install-packages
142 08:46:10.566992 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-installed-packages
143 08:46:10.567116 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-os-build
144 08:46:10.567240 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-probe-channel
145 08:46:10.567403 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-probe-ip
146 08:46:10.567526 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-target-ip
147 08:46:10.567666 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-target-mac
148 08:46:10.567805 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-target-storage
149 08:46:10.567930 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-case
150 08:46:10.568055 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-event
151 08:46:10.568177 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-feedback
152 08:46:10.568299 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-raise
153 08:46:10.568421 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-reference
154 08:46:10.568544 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-runner
155 08:46:10.568665 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-set
156 08:46:10.568787 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-test-shell
157 08:46:10.568912 Updating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-install-packages (oe)
158 08:46:10.569064 Updating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/bin/lava-installed-packages (oe)
159 08:46:10.569184 Creating /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/environment
160 08:46:10.569278 LAVA metadata
161 08:46:10.569348 - LAVA_JOB_ID=12243818
162 08:46:10.569410 - LAVA_DISPATCHER_IP=192.168.201.1
163 08:46:10.569509 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 08:46:10.569575 skipped lava-vland-overlay
165 08:46:10.569648 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 08:46:10.569727 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 08:46:10.569787 skipped lava-multinode-overlay
168 08:46:10.569858 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 08:46:10.569935 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 08:46:10.570006 Loading test definitions
171 08:46:10.570091 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 08:46:10.570160 Using /lava-12243818 at stage 0
173 08:46:10.570255 Fetching tests from https://github.com/kernelci/test-definitions
174 08:46:10.570340 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/0/tests/0_ltp-ipc'
175 08:46:17.595698 Running '/usr/bin/git checkout kernelci.org
176 08:46:17.746983 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 08:46:17.747882 uuid=12243818_1.5.2.3.1 testdef=None
178 08:46:17.748050 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
180 08:46:17.748306 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
181 08:46:17.749127 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 08:46:17.749369 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
184 08:46:17.750656 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 08:46:17.751040 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
187 08:46:17.752570 runner path: /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/0/tests/0_ltp-ipc test_uuid 12243818_1.5.2.3.1
188 08:46:17.752663 SKIPFILE='skipfile-lkft.yaml'
189 08:46:17.752727 SKIP_INSTALL='true'
190 08:46:17.752785 TST_CMDFILES='ipc'
191 08:46:17.752936 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 08:46:17.753242 Creating lava-test-runner.conf files
194 08:46:17.753334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243818/lava-overlay-rlou8rmv/lava-12243818/0 for stage 0
195 08:46:17.753458 - 0_ltp-ipc
196 08:46:17.753596 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
197 08:46:17.753715 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
198 08:46:25.453269 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 08:46:25.453461 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
200 08:46:25.453572 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 08:46:25.453674 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
202 08:46:25.453767 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
203 08:46:25.600789 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 08:46:25.601198 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
205 08:46:25.601318 extracting modules file /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243818/extract-nfsrootfs-mpv96gp8
206 08:46:25.615183 extracting modules file /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243818/extract-overlay-ramdisk-ixfqc7sz/ramdisk
207 08:46:25.628924 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 08:46:25.629055 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
209 08:46:25.629147 [common] Applying overlay to NFS
210 08:46:25.629217 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243818/compress-overlay-bsxcukf1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243818/extract-nfsrootfs-mpv96gp8
211 08:46:26.565752 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 08:46:26.565910 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
213 08:46:26.566010 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 08:46:26.566100 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
215 08:46:26.566183 Building ramdisk /var/lib/lava/dispatcher/tmp/12243818/extract-overlay-ramdisk-ixfqc7sz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243818/extract-overlay-ramdisk-ixfqc7sz/ramdisk
216 08:46:26.648762 >> 27180 blocks
217 08:46:27.225188 rename /var/lib/lava/dispatcher/tmp/12243818/extract-overlay-ramdisk-ixfqc7sz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
218 08:46:27.225694 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 08:46:27.225870 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
220 08:46:27.225997 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
221 08:46:27.226129 No mkimage arch provided, not using FIT.
222 08:46:27.226257 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 08:46:27.226358 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 08:46:27.226463 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
225 08:46:27.226568 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
226 08:46:27.226682 No LXC device requested
227 08:46:27.226799 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 08:46:27.226895 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
229 08:46:27.226984 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 08:46:27.227080 Checking files for TFTP limit of 4294967296 bytes.
231 08:46:27.227539 end: 1 tftp-deploy (duration 00:00:27) [common]
232 08:46:27.227648 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 08:46:27.227784 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 08:46:27.227909 substitutions:
235 08:46:27.227977 - {DTB}: None
236 08:46:27.228039 - {INITRD}: 12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
237 08:46:27.228101 - {KERNEL}: 12243818/tftp-deploy-656fpziu/kernel/bzImage
238 08:46:27.228160 - {LAVA_MAC}: None
239 08:46:27.228218 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243818/extract-nfsrootfs-mpv96gp8
240 08:46:27.228277 - {NFS_SERVER_IP}: 192.168.201.1
241 08:46:27.228332 - {PRESEED_CONFIG}: None
242 08:46:27.228386 - {PRESEED_LOCAL}: None
243 08:46:27.228441 - {RAMDISK}: 12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
244 08:46:27.228496 - {ROOT_PART}: None
245 08:46:27.228560 - {ROOT}: None
246 08:46:27.228649 - {SERVER_IP}: 192.168.201.1
247 08:46:27.228739 - {TEE}: None
248 08:46:27.228808 Parsed boot commands:
249 08:46:27.228864 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 08:46:27.229070 Parsed boot commands: tftpboot 192.168.201.1 12243818/tftp-deploy-656fpziu/kernel/bzImage 12243818/tftp-deploy-656fpziu/kernel/cmdline 12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
251 08:46:27.229189 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 08:46:27.229282 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 08:46:27.229375 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 08:46:27.229462 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 08:46:27.229532 Not connected, no need to disconnect.
256 08:46:27.229608 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 08:46:27.229692 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 08:46:27.229797 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-13'
259 08:46:27.234358 Setting prompt string to ['lava-test: # ']
260 08:46:27.234901 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 08:46:27.235057 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 08:46:27.235184 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 08:46:27.235293 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 08:46:27.235695 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
265 08:46:32.367379 >> Command sent successfully.
266 08:46:32.369887 Returned 0 in 5 seconds
267 08:46:32.470281 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 08:46:32.470665 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 08:46:32.470791 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 08:46:32.470903 Setting prompt string to 'Starting depthcharge on Voema...'
272 08:46:32.470985 Changing prompt to 'Starting depthcharge on Voema...'
273 08:46:32.471071 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 08:46:32.471381 [Enter `^Ec?' for help]
275 08:46:34.063866
276 08:46:34.064032
277 08:46:34.073240 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 08:46:34.080176 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
279 08:46:34.083271 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 08:46:34.086509 CPU: AES supported, TXT NOT supported, VT supported
281 08:46:34.093221 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 08:46:34.097370 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 08:46:34.104098 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 08:46:34.107348 VBOOT: Loading verstage.
285 08:46:34.111179 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 08:46:34.117191 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 08:46:34.120188 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 08:46:34.130481 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 08:46:34.137034 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 08:46:34.137119
291 08:46:34.137184
292 08:46:34.150909 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 08:46:34.164191 Probing TPM: . done!
294 08:46:34.167512 TPM ready after 0 ms
295 08:46:34.171122 Connected to device vid:did:rid of 1ae0:0028:00
296 08:46:34.181995 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
297 08:46:34.188637 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 08:46:34.192467 Initialized TPM device CR50 revision 0
299 08:46:34.249680 tlcl_send_startup: Startup return code is 0
300 08:46:34.249773 TPM: setup succeeded
301 08:46:34.263945 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 08:46:34.278251 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 08:46:34.290992 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 08:46:34.300630 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 08:46:34.304475 Chrome EC: UHEPI supported
306 08:46:34.307821 Phase 1
307 08:46:34.311186 FMAP: area GBB found @ 1805000 (458752 bytes)
308 08:46:34.320705 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 08:46:34.327887 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 08:46:34.334355 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 08:46:34.340749 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 08:46:34.344065 Recovery requested (1009000e)
313 08:46:34.347145 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 08:46:34.359258 tlcl_extend: response is 0
315 08:46:34.365691 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 08:46:34.375474 tlcl_extend: response is 0
317 08:46:34.381861 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 08:46:34.388474 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 08:46:34.395110 BS: verstage times (exec / console): total (unknown) / 142 ms
320 08:46:34.395195
321 08:46:34.395261
322 08:46:34.408474 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 08:46:34.415176 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 08:46:34.418178 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 08:46:34.424579 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 08:46:34.428608 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 08:46:34.431862 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 08:46:34.434739 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
329 08:46:34.437992 TCO_STS: 0000 0000
330 08:46:34.441033 GEN_PMCON: d0015038 00002200
331 08:46:34.444364 GBLRST_CAUSE: 00000000 00000000
332 08:46:34.447524 HPR_CAUSE0: 00000000
333 08:46:34.447609 prev_sleep_state 5
334 08:46:34.450912 Boot Count incremented to 23746
335 08:46:34.458068 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 08:46:34.465064 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 08:46:34.474481 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 08:46:34.481316 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 08:46:34.484527 Chrome EC: UHEPI supported
340 08:46:34.491274 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 08:46:34.502540 Probing TPM: done!
342 08:46:34.508980 Connected to device vid:did:rid of 1ae0:0028:00
343 08:46:34.519145 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
344 08:46:34.522719 Initialized TPM device CR50 revision 0
345 08:46:34.537718 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 08:46:34.544104 MRC: Hash idx 0x100b comparison successful.
347 08:46:34.547433 MRC cache found, size faa8
348 08:46:34.547518 bootmode is set to: 2
349 08:46:34.550815 SPD index = 2
350 08:46:34.557686 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 08:46:34.560767 SPD: module type is LPDDR4X
352 08:46:34.563706 SPD: module part number is MT53D1G64D4NW-046
353 08:46:34.570797 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
354 08:46:34.573768 SPD: device width 16 bits, bus width 16 bits
355 08:46:34.580408 SPD: module size is 2048 MB (per channel)
356 08:46:35.010483 CBMEM:
357 08:46:35.013348 IMD: root @ 0x76fff000 254 entries.
358 08:46:35.016732 IMD: root @ 0x76ffec00 62 entries.
359 08:46:35.019869 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 08:46:35.026179 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 08:46:35.029910 External stage cache:
362 08:46:35.032840 IMD: root @ 0x7b3ff000 254 entries.
363 08:46:35.036710 IMD: root @ 0x7b3fec00 62 entries.
364 08:46:35.051335 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 08:46:35.057897 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 08:46:35.064713 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 08:46:35.078185 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 08:46:35.084677 cse_lite: Skip switching to RW in the recovery path
369 08:46:35.084755 8 DIMMs found
370 08:46:35.084827 SMM Memory Map
371 08:46:35.091212 SMRAM : 0x7b000000 0x800000
372 08:46:35.094519 Subregion 0: 0x7b000000 0x200000
373 08:46:35.097900 Subregion 1: 0x7b200000 0x200000
374 08:46:35.101096 Subregion 2: 0x7b400000 0x400000
375 08:46:35.101186 top_of_ram = 0x77000000
376 08:46:35.107818 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 08:46:35.114640 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 08:46:35.118087 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 08:46:35.124926 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 08:46:35.131169 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 08:46:35.137590 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 08:46:35.147981 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 08:46:35.154199 Processing 211 relocs. Offset value of 0x74c0b000
384 08:46:35.161437 BS: romstage times (exec / console): total (unknown) / 277 ms
385 08:46:35.167418
386 08:46:35.167490
387 08:46:35.174772 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 08:46:35.181020 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 08:46:35.187508 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 08:46:35.197740 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 08:46:35.204053 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 08:46:35.210618 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 08:46:35.253251 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 08:46:35.259976 Processing 5008 relocs. Offset value of 0x75d98000
395 08:46:35.263490 BS: postcar times (exec / console): total (unknown) / 59 ms
396 08:46:35.266454
397 08:46:35.266525
398 08:46:35.276571 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 08:46:35.276652 Normal boot
400 08:46:35.280109 FW_CONFIG value is 0x804c02
401 08:46:35.282881 PCI: 00:07.0 disabled by fw_config
402 08:46:35.286277 PCI: 00:07.1 disabled by fw_config
403 08:46:35.289585 PCI: 00:0d.2 disabled by fw_config
404 08:46:35.296455 PCI: 00:1c.7 disabled by fw_config
405 08:46:35.299927 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 08:46:35.306234 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 08:46:35.309675 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 08:46:35.316175 GENERIC: 0.0 disabled by fw_config
409 08:46:35.319543 GENERIC: 1.0 disabled by fw_config
410 08:46:35.323128 fw_config match found: DB_USB=USB3_ACTIVE
411 08:46:35.326089 fw_config match found: DB_USB=USB3_ACTIVE
412 08:46:35.329516 fw_config match found: DB_USB=USB3_ACTIVE
413 08:46:35.336253 fw_config match found: DB_USB=USB3_ACTIVE
414 08:46:35.339339 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 08:46:35.349648 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 08:46:35.355809 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 08:46:35.362617 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 08:46:35.366139 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 08:46:35.372366 microcode: Update skipped, already up-to-date
420 08:46:35.379173 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 08:46:35.407020 Detected 4 core, 8 thread CPU.
422 08:46:35.410703 Setting up SMI for CPU
423 08:46:35.413292 IED base = 0x7b400000
424 08:46:35.416972 IED size = 0x00400000
425 08:46:35.417057 Will perform SMM setup.
426 08:46:35.423145 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
427 08:46:35.430039 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 08:46:35.436752 Processing 16 relocs. Offset value of 0x00030000
429 08:46:35.439970 Attempting to start 7 APs
430 08:46:35.443108 Waiting for 10ms after sending INIT.
431 08:46:35.458515 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
432 08:46:35.462155 AP: slot 5 apic_id 6.
433 08:46:35.465140 AP: slot 2 apic_id 7.
434 08:46:35.465214 done.
435 08:46:35.465282 AP: slot 6 apic_id 2.
436 08:46:35.468670 AP: slot 3 apic_id 3.
437 08:46:35.472441 AP: slot 4 apic_id 4.
438 08:46:35.475154 AP: slot 7 apic_id 5.
439 08:46:35.478629 Waiting for 2nd SIPI to complete...done.
440 08:46:35.485130 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 08:46:35.491929 Processing 13 relocs. Offset value of 0x00038000
442 08:46:35.494715 Unable to locate Global NVS
443 08:46:35.501740 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 08:46:35.504903 Installing permanent SMM handler to 0x7b000000
445 08:46:35.515124 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 08:46:35.518312 Processing 794 relocs. Offset value of 0x7b010000
447 08:46:35.528312 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 08:46:35.531305 Processing 13 relocs. Offset value of 0x7b008000
449 08:46:35.538186 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 08:46:35.544640 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 08:46:35.550944 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 08:46:35.554433 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 08:46:35.560727 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 08:46:35.567525 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 08:46:35.574226 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 08:46:35.577681 Unable to locate Global NVS
457 08:46:35.584223 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 08:46:35.587855 Clearing SMI status registers
459 08:46:35.590605 SMI_STS: PM1
460 08:46:35.590691 PM1_STS: PWRBTN
461 08:46:35.596979 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 08:46:35.600458 In relocation handler: CPU 0
463 08:46:35.603982 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 08:46:35.610529 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 08:46:35.614135 Relocation complete.
466 08:46:35.620492 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 08:46:35.623592 In relocation handler: CPU 1
468 08:46:35.627174 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 08:46:35.630491 Relocation complete.
470 08:46:35.636744 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
471 08:46:35.639886 In relocation handler: CPU 5
472 08:46:35.643378 New SMBASE=0x7affec00 IEDBASE=0x7b400000
473 08:46:35.646440 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 08:46:35.649721 Relocation complete.
475 08:46:35.657066 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
476 08:46:35.660188 In relocation handler: CPU 2
477 08:46:35.663708 New SMBASE=0x7afff800 IEDBASE=0x7b400000
478 08:46:35.666202 Relocation complete.
479 08:46:35.673194 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
480 08:46:35.676188 In relocation handler: CPU 4
481 08:46:35.679898 New SMBASE=0x7afff000 IEDBASE=0x7b400000
482 08:46:35.686383 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 08:46:35.689709 Relocation complete.
484 08:46:35.696418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
485 08:46:35.699652 In relocation handler: CPU 7
486 08:46:35.702811 New SMBASE=0x7affe400 IEDBASE=0x7b400000
487 08:46:35.705817 Relocation complete.
488 08:46:35.712563 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
489 08:46:35.715950 In relocation handler: CPU 3
490 08:46:35.718973 New SMBASE=0x7afff400 IEDBASE=0x7b400000
491 08:46:35.722368 Relocation complete.
492 08:46:35.729001 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
493 08:46:35.732520 In relocation handler: CPU 6
494 08:46:35.735807 New SMBASE=0x7affe800 IEDBASE=0x7b400000
495 08:46:35.738603 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 08:46:35.742135 Relocation complete.
497 08:46:35.745586 Initializing CPU #0
498 08:46:35.749359 CPU: vendor Intel device 806c1
499 08:46:35.752058 CPU: family 06, model 8c, stepping 01
500 08:46:35.756176 Clearing out pending MCEs
501 08:46:35.758933 Setting up local APIC...
502 08:46:35.759010 apic_id: 0x00 done.
503 08:46:35.762131 Turbo is available but hidden
504 08:46:35.765229 Turbo is available and visible
505 08:46:35.768393 microcode: Update skipped, already up-to-date
506 08:46:35.772219 CPU #0 initialized
507 08:46:35.775481 Initializing CPU #5
508 08:46:35.775551 Initializing CPU #2
509 08:46:35.778396 CPU: vendor Intel device 806c1
510 08:46:35.782003 CPU: family 06, model 8c, stepping 01
511 08:46:35.785214 CPU: vendor Intel device 806c1
512 08:46:35.792162 CPU: family 06, model 8c, stepping 01
513 08:46:35.792244 Clearing out pending MCEs
514 08:46:35.795231 Clearing out pending MCEs
515 08:46:35.798290 Setting up local APIC...
516 08:46:35.801706 Initializing CPU #3
517 08:46:35.801780 Initializing CPU #6
518 08:46:35.804931 CPU: vendor Intel device 806c1
519 08:46:35.808132 CPU: family 06, model 8c, stepping 01
520 08:46:35.811513 Initializing CPU #1
521 08:46:35.814782 Setting up local APIC...
522 08:46:35.814857 Initializing CPU #7
523 08:46:35.818230 Initializing CPU #4
524 08:46:35.821395 CPU: vendor Intel device 806c1
525 08:46:35.824723 CPU: family 06, model 8c, stepping 01
526 08:46:35.828038 CPU: vendor Intel device 806c1
527 08:46:35.831482 CPU: family 06, model 8c, stepping 01
528 08:46:35.834836 Clearing out pending MCEs
529 08:46:35.838420 Clearing out pending MCEs
530 08:46:35.838499 Setting up local APIC...
531 08:46:35.841954 CPU: vendor Intel device 806c1
532 08:46:35.845625 CPU: family 06, model 8c, stepping 01
533 08:46:35.849066 Clearing out pending MCEs
534 08:46:35.852662 Clearing out pending MCEs
535 08:46:35.855500 Setting up local APIC...
536 08:46:35.855606 apic_id: 0x05 done.
537 08:46:35.858732 Setting up local APIC...
538 08:46:35.861905 apic_id: 0x06 done.
539 08:46:35.865831 CPU: vendor Intel device 806c1
540 08:46:35.868506 CPU: family 06, model 8c, stepping 01
541 08:46:35.872220 microcode: Update skipped, already up-to-date
542 08:46:35.875448 apic_id: 0x07 done.
543 08:46:35.875526 CPU #5 initialized
544 08:46:35.882303 microcode: Update skipped, already up-to-date
545 08:46:35.885172 Clearing out pending MCEs
546 08:46:35.885257 apic_id: 0x03 done.
547 08:46:35.888704 Setting up local APIC...
548 08:46:35.891810 Setting up local APIC...
549 08:46:35.891895 apic_id: 0x02 done.
550 08:46:35.898195 microcode: Update skipped, already up-to-date
551 08:46:35.901848 microcode: Update skipped, already up-to-date
552 08:46:35.905660 CPU #3 initialized
553 08:46:35.905745 CPU #6 initialized
554 08:46:35.908760 apic_id: 0x01 done.
555 08:46:35.911419 apic_id: 0x04 done.
556 08:46:35.915104 microcode: Update skipped, already up-to-date
557 08:46:35.918367 microcode: Update skipped, already up-to-date
558 08:46:35.921674 CPU #7 initialized
559 08:46:35.925223 CPU #4 initialized
560 08:46:35.928355 microcode: Update skipped, already up-to-date
561 08:46:35.931626 CPU #2 initialized
562 08:46:35.931733 CPU #1 initialized
563 08:46:35.935278 bsp_do_flight_plan done after 454 msecs.
564 08:46:35.937867 CPU: frequency set to 4400 MHz
565 08:46:35.941264 Enabling SMIs.
566 08:46:35.947918 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
567 08:46:35.963380 SATAXPCIE1 indicates PCIe NVMe is present
568 08:46:35.966396 Probing TPM: done!
569 08:46:35.969675 Connected to device vid:did:rid of 1ae0:0028:00
570 08:46:35.980491 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
571 08:46:35.984112 Initialized TPM device CR50 revision 0
572 08:46:35.987061 Enabling S0i3.4
573 08:46:35.993872 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 08:46:35.997490 Found a VBT of 8704 bytes after decompression
575 08:46:36.003596 cse_lite: CSE RO boot. HybridStorageMode disabled
576 08:46:36.010393 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 08:46:36.085604 FSPS returned 0
578 08:46:36.088995 Executing Phase 1 of FspMultiPhaseSiInit
579 08:46:36.098829 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 08:46:36.102675 port C0 DISC req: usage 1 usb3 1 usb2 5
581 08:46:36.105489 Raw Buffer output 0 00000511
582 08:46:36.109089 Raw Buffer output 1 00000000
583 08:46:36.112691 pmc_send_ipc_cmd succeeded
584 08:46:36.119132 port C1 DISC req: usage 1 usb3 2 usb2 3
585 08:46:36.119217 Raw Buffer output 0 00000321
586 08:46:36.122757 Raw Buffer output 1 00000000
587 08:46:36.126662 pmc_send_ipc_cmd succeeded
588 08:46:36.131535 Detected 4 core, 8 thread CPU.
589 08:46:36.134965 Detected 4 core, 8 thread CPU.
590 08:46:36.335204 Display FSP Version Info HOB
591 08:46:36.338469 Reference Code - CPU = a.0.4c.31
592 08:46:36.341638 uCode Version = 0.0.0.86
593 08:46:36.345136 TXT ACM version = ff.ff.ff.ffff
594 08:46:36.348179 Reference Code - ME = a.0.4c.31
595 08:46:36.351520 MEBx version = 0.0.0.0
596 08:46:36.354900 ME Firmware Version = Consumer SKU
597 08:46:36.357874 Reference Code - PCH = a.0.4c.31
598 08:46:36.361115 PCH-CRID Status = Disabled
599 08:46:36.364449 PCH-CRID Original Value = ff.ff.ff.ffff
600 08:46:36.367875 PCH-CRID New Value = ff.ff.ff.ffff
601 08:46:36.371186 OPROM - RST - RAID = ff.ff.ff.ffff
602 08:46:36.374680 PCH Hsio Version = 4.0.0.0
603 08:46:36.377447 Reference Code - SA - System Agent = a.0.4c.31
604 08:46:36.381097 Reference Code - MRC = 2.0.0.1
605 08:46:36.384748 SA - PCIe Version = a.0.4c.31
606 08:46:36.387871 SA-CRID Status = Disabled
607 08:46:36.390983 SA-CRID Original Value = 0.0.0.1
608 08:46:36.393951 SA-CRID New Value = 0.0.0.1
609 08:46:36.397281 OPROM - VBIOS = ff.ff.ff.ffff
610 08:46:36.400830 IO Manageability Engine FW Version = 11.1.4.0
611 08:46:36.404168 PHY Build Version = 0.0.0.e0
612 08:46:36.407282 Thunderbolt(TM) FW Version = 0.0.0.0
613 08:46:36.413863 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 08:46:36.418577 ITSS IRQ Polarities Before:
615 08:46:36.418661 IPC0: 0xffffffff
616 08:46:36.420882 IPC1: 0xffffffff
617 08:46:36.420966 IPC2: 0xffffffff
618 08:46:36.424458 IPC3: 0xffffffff
619 08:46:36.428162 ITSS IRQ Polarities After:
620 08:46:36.428247 IPC0: 0xffffffff
621 08:46:36.431308 IPC1: 0xffffffff
622 08:46:36.431392 IPC2: 0xffffffff
623 08:46:36.434579 IPC3: 0xffffffff
624 08:46:36.437935 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 08:46:36.451041 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 08:46:36.460959 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 08:46:36.474204 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 08:46:36.480760 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
629 08:46:36.480845 Enumerating buses...
630 08:46:36.487366 Show all devs... Before device enumeration.
631 08:46:36.491095 Root Device: enabled 1
632 08:46:36.491180 DOMAIN: 0000: enabled 1
633 08:46:36.494314 CPU_CLUSTER: 0: enabled 1
634 08:46:36.497745 PCI: 00:00.0: enabled 1
635 08:46:36.500597 PCI: 00:02.0: enabled 1
636 08:46:36.500681 PCI: 00:04.0: enabled 1
637 08:46:36.504191 PCI: 00:05.0: enabled 1
638 08:46:36.507572 PCI: 00:06.0: enabled 0
639 08:46:36.507708 PCI: 00:07.0: enabled 0
640 08:46:36.511025 PCI: 00:07.1: enabled 0
641 08:46:36.514132 PCI: 00:07.2: enabled 0
642 08:46:36.517269 PCI: 00:07.3: enabled 0
643 08:46:36.517353 PCI: 00:08.0: enabled 1
644 08:46:36.520630 PCI: 00:09.0: enabled 0
645 08:46:36.524209 PCI: 00:0a.0: enabled 0
646 08:46:36.527427 PCI: 00:0d.0: enabled 1
647 08:46:36.527516 PCI: 00:0d.1: enabled 0
648 08:46:36.530678 PCI: 00:0d.2: enabled 0
649 08:46:36.534040 PCI: 00:0d.3: enabled 0
650 08:46:36.537245 PCI: 00:0e.0: enabled 0
651 08:46:36.537329 PCI: 00:10.2: enabled 1
652 08:46:36.540773 PCI: 00:10.6: enabled 0
653 08:46:36.543962 PCI: 00:10.7: enabled 0
654 08:46:36.547291 PCI: 00:12.0: enabled 0
655 08:46:36.547375 PCI: 00:12.6: enabled 0
656 08:46:36.550569 PCI: 00:13.0: enabled 0
657 08:46:36.554003 PCI: 00:14.0: enabled 1
658 08:46:36.554087 PCI: 00:14.1: enabled 0
659 08:46:36.556774 PCI: 00:14.2: enabled 1
660 08:46:36.560256 PCI: 00:14.3: enabled 1
661 08:46:36.563575 PCI: 00:15.0: enabled 1
662 08:46:36.563659 PCI: 00:15.1: enabled 1
663 08:46:36.566981 PCI: 00:15.2: enabled 1
664 08:46:36.570431 PCI: 00:15.3: enabled 1
665 08:46:36.573847 PCI: 00:16.0: enabled 1
666 08:46:36.573932 PCI: 00:16.1: enabled 0
667 08:46:36.576908 PCI: 00:16.2: enabled 0
668 08:46:36.580309 PCI: 00:16.3: enabled 0
669 08:46:36.583391 PCI: 00:16.4: enabled 0
670 08:46:36.583475 PCI: 00:16.5: enabled 0
671 08:46:36.586843 PCI: 00:17.0: enabled 1
672 08:46:36.590009 PCI: 00:19.0: enabled 0
673 08:46:36.593277 PCI: 00:19.1: enabled 1
674 08:46:36.593364 PCI: 00:19.2: enabled 0
675 08:46:36.596907 PCI: 00:1c.0: enabled 1
676 08:46:36.599912 PCI: 00:1c.1: enabled 0
677 08:46:36.599997 PCI: 00:1c.2: enabled 0
678 08:46:36.603527 PCI: 00:1c.3: enabled 0
679 08:46:36.607088 PCI: 00:1c.4: enabled 0
680 08:46:36.610401 PCI: 00:1c.5: enabled 0
681 08:46:36.610486 PCI: 00:1c.6: enabled 1
682 08:46:36.613324 PCI: 00:1c.7: enabled 0
683 08:46:36.616604 PCI: 00:1d.0: enabled 1
684 08:46:36.620212 PCI: 00:1d.1: enabled 0
685 08:46:36.620296 PCI: 00:1d.2: enabled 1
686 08:46:36.623393 PCI: 00:1d.3: enabled 0
687 08:46:36.626708 PCI: 00:1e.0: enabled 1
688 08:46:36.629834 PCI: 00:1e.1: enabled 0
689 08:46:36.629918 PCI: 00:1e.2: enabled 1
690 08:46:36.632952 PCI: 00:1e.3: enabled 1
691 08:46:36.636412 PCI: 00:1f.0: enabled 1
692 08:46:36.640083 PCI: 00:1f.1: enabled 0
693 08:46:36.640167 PCI: 00:1f.2: enabled 1
694 08:46:36.643204 PCI: 00:1f.3: enabled 1
695 08:46:36.646108 PCI: 00:1f.4: enabled 0
696 08:46:36.649543 PCI: 00:1f.5: enabled 1
697 08:46:36.649627 PCI: 00:1f.6: enabled 0
698 08:46:36.653417 PCI: 00:1f.7: enabled 0
699 08:46:36.655939 APIC: 00: enabled 1
700 08:46:36.656027 GENERIC: 0.0: enabled 1
701 08:46:36.659528 GENERIC: 0.0: enabled 1
702 08:46:36.663212 GENERIC: 1.0: enabled 1
703 08:46:36.666477 GENERIC: 0.0: enabled 1
704 08:46:36.666561 GENERIC: 1.0: enabled 1
705 08:46:36.669716 USB0 port 0: enabled 1
706 08:46:36.672920 GENERIC: 0.0: enabled 1
707 08:46:36.675706 USB0 port 0: enabled 1
708 08:46:36.675795 GENERIC: 0.0: enabled 1
709 08:46:36.679529 I2C: 00:1a: enabled 1
710 08:46:36.682856 I2C: 00:31: enabled 1
711 08:46:36.682940 I2C: 00:32: enabled 1
712 08:46:36.685711 I2C: 00:10: enabled 1
713 08:46:36.689128 I2C: 00:15: enabled 1
714 08:46:36.689213 GENERIC: 0.0: enabled 0
715 08:46:36.692509 GENERIC: 1.0: enabled 0
716 08:46:36.695503 GENERIC: 0.0: enabled 1
717 08:46:36.695587 SPI: 00: enabled 1
718 08:46:36.699186 SPI: 00: enabled 1
719 08:46:36.702747 PNP: 0c09.0: enabled 1
720 08:46:36.702860 GENERIC: 0.0: enabled 1
721 08:46:36.705261 USB3 port 0: enabled 1
722 08:46:36.708716 USB3 port 1: enabled 1
723 08:46:36.712407 USB3 port 2: enabled 0
724 08:46:36.712491 USB3 port 3: enabled 0
725 08:46:36.715599 USB2 port 0: enabled 0
726 08:46:36.718635 USB2 port 1: enabled 1
727 08:46:36.722202 USB2 port 2: enabled 1
728 08:46:36.722332 USB2 port 3: enabled 0
729 08:46:36.725497 USB2 port 4: enabled 1
730 08:46:36.728539 USB2 port 5: enabled 0
731 08:46:36.728623 USB2 port 6: enabled 0
732 08:46:36.731951 USB2 port 7: enabled 0
733 08:46:36.735069 USB2 port 8: enabled 0
734 08:46:36.735153 USB2 port 9: enabled 0
735 08:46:36.739036 USB3 port 0: enabled 0
736 08:46:36.741903 USB3 port 1: enabled 1
737 08:46:36.745338 USB3 port 2: enabled 0
738 08:46:36.745423 USB3 port 3: enabled 0
739 08:46:36.748458 GENERIC: 0.0: enabled 1
740 08:46:36.751712 GENERIC: 1.0: enabled 1
741 08:46:36.751796 APIC: 01: enabled 1
742 08:46:36.755007 APIC: 07: enabled 1
743 08:46:36.758435 APIC: 03: enabled 1
744 08:46:36.758519 APIC: 04: enabled 1
745 08:46:36.761868 APIC: 06: enabled 1
746 08:46:36.764703 APIC: 02: enabled 1
747 08:46:36.764787 APIC: 05: enabled 1
748 08:46:36.768804 Compare with tree...
749 08:46:36.771479 Root Device: enabled 1
750 08:46:36.771564 DOMAIN: 0000: enabled 1
751 08:46:36.774799 PCI: 00:00.0: enabled 1
752 08:46:36.778900 PCI: 00:02.0: enabled 1
753 08:46:36.781755 PCI: 00:04.0: enabled 1
754 08:46:36.781840 GENERIC: 0.0: enabled 1
755 08:46:36.784667 PCI: 00:05.0: enabled 1
756 08:46:36.787970 PCI: 00:06.0: enabled 0
757 08:46:36.791424 PCI: 00:07.0: enabled 0
758 08:46:36.794654 GENERIC: 0.0: enabled 1
759 08:46:36.797995 PCI: 00:07.1: enabled 0
760 08:46:36.798079 GENERIC: 1.0: enabled 1
761 08:46:36.801105 PCI: 00:07.2: enabled 0
762 08:46:36.804272 GENERIC: 0.0: enabled 1
763 08:46:36.808153 PCI: 00:07.3: enabled 0
764 08:46:36.811145 GENERIC: 1.0: enabled 1
765 08:46:36.811230 PCI: 00:08.0: enabled 1
766 08:46:36.814681 PCI: 00:09.0: enabled 0
767 08:46:36.817635 PCI: 00:0a.0: enabled 0
768 08:46:36.821048 PCI: 00:0d.0: enabled 1
769 08:46:36.824614 USB0 port 0: enabled 1
770 08:46:36.824699 USB3 port 0: enabled 1
771 08:46:36.827907 USB3 port 1: enabled 1
772 08:46:36.830814 USB3 port 2: enabled 0
773 08:46:36.834193 USB3 port 3: enabled 0
774 08:46:36.837733 PCI: 00:0d.1: enabled 0
775 08:46:36.840736 PCI: 00:0d.2: enabled 0
776 08:46:36.840824 GENERIC: 0.0: enabled 1
777 08:46:36.844157 PCI: 00:0d.3: enabled 0
778 08:46:36.847918 PCI: 00:0e.0: enabled 0
779 08:46:36.850517 PCI: 00:10.2: enabled 1
780 08:46:36.854283 PCI: 00:10.6: enabled 0
781 08:46:36.854368 PCI: 00:10.7: enabled 0
782 08:46:36.857387 PCI: 00:12.0: enabled 0
783 08:46:36.860768 PCI: 00:12.6: enabled 0
784 08:46:36.864047 PCI: 00:13.0: enabled 0
785 08:46:36.864132 PCI: 00:14.0: enabled 1
786 08:46:36.867774 USB0 port 0: enabled 1
787 08:46:36.870523 USB2 port 0: enabled 0
788 08:46:36.874163 USB2 port 1: enabled 1
789 08:46:36.876986 USB2 port 2: enabled 1
790 08:46:36.880563 USB2 port 3: enabled 0
791 08:46:36.880648 USB2 port 4: enabled 1
792 08:46:36.883815 USB2 port 5: enabled 0
793 08:46:36.886933 USB2 port 6: enabled 0
794 08:46:36.890286 USB2 port 7: enabled 0
795 08:46:36.893873 USB2 port 8: enabled 0
796 08:46:36.896959 USB2 port 9: enabled 0
797 08:46:36.897043 USB3 port 0: enabled 0
798 08:46:36.900827 USB3 port 1: enabled 1
799 08:46:36.903352 USB3 port 2: enabled 0
800 08:46:36.907032 USB3 port 3: enabled 0
801 08:46:36.910282 PCI: 00:14.1: enabled 0
802 08:46:36.913196 PCI: 00:14.2: enabled 1
803 08:46:36.913281 PCI: 00:14.3: enabled 1
804 08:46:36.916508 GENERIC: 0.0: enabled 1
805 08:46:36.919870 PCI: 00:15.0: enabled 1
806 08:46:36.923849 I2C: 00:1a: enabled 1
807 08:46:36.923933 I2C: 00:31: enabled 1
808 08:46:36.926607 I2C: 00:32: enabled 1
809 08:46:36.930068 PCI: 00:15.1: enabled 1
810 08:46:36.933314 I2C: 00:10: enabled 1
811 08:46:36.936472 PCI: 00:15.2: enabled 1
812 08:46:36.936556 PCI: 00:15.3: enabled 1
813 08:46:36.939610 PCI: 00:16.0: enabled 1
814 08:46:36.943015 PCI: 00:16.1: enabled 0
815 08:46:36.946791 PCI: 00:16.2: enabled 0
816 08:46:36.950007 PCI: 00:16.3: enabled 0
817 08:46:36.950092 PCI: 00:16.4: enabled 0
818 08:46:36.952898 PCI: 00:16.5: enabled 0
819 08:46:36.957055 PCI: 00:17.0: enabled 1
820 08:46:36.960482 PCI: 00:19.0: enabled 0
821 08:46:36.963055 PCI: 00:19.1: enabled 1
822 08:46:36.963140 I2C: 00:15: enabled 1
823 08:46:36.966470 PCI: 00:19.2: enabled 0
824 08:46:36.969586 PCI: 00:1d.0: enabled 1
825 08:46:36.972904 GENERIC: 0.0: enabled 1
826 08:46:36.976315 PCI: 00:1e.0: enabled 1
827 08:46:36.976400 PCI: 00:1e.1: enabled 0
828 08:46:36.979632 PCI: 00:1e.2: enabled 1
829 08:46:36.983091 SPI: 00: enabled 1
830 08:46:36.986056 PCI: 00:1e.3: enabled 1
831 08:46:36.986140 SPI: 00: enabled 1
832 08:46:36.989594 PCI: 00:1f.0: enabled 1
833 08:46:36.993161 PNP: 0c09.0: enabled 1
834 08:46:36.995948 PCI: 00:1f.1: enabled 0
835 08:46:36.999611 PCI: 00:1f.2: enabled 1
836 08:46:36.999735 GENERIC: 0.0: enabled 1
837 08:46:37.002799 GENERIC: 0.0: enabled 1
838 08:46:37.005901 GENERIC: 1.0: enabled 1
839 08:46:37.009501 PCI: 00:1f.3: enabled 1
840 08:46:37.012476 PCI: 00:1f.4: enabled 0
841 08:46:37.012560 PCI: 00:1f.5: enabled 1
842 08:46:37.059266 PCI: 00:1f.6: enabled 0
843 08:46:37.059368 PCI: 00:1f.7: enabled 0
844 08:46:37.059622 CPU_CLUSTER: 0: enabled 1
845 08:46:37.059755 APIC: 00: enabled 1
846 08:46:37.059822 APIC: 01: enabled 1
847 08:46:37.059882 APIC: 07: enabled 1
848 08:46:37.059941 APIC: 03: enabled 1
849 08:46:37.060186 APIC: 04: enabled 1
850 08:46:37.060249 APIC: 06: enabled 1
851 08:46:37.060308 APIC: 02: enabled 1
852 08:46:37.060760 APIC: 05: enabled 1
853 08:46:37.060845 Root Device scanning...
854 08:46:37.061096 scan_static_bus for Root Device
855 08:46:37.061168 DOMAIN: 0000 enabled
856 08:46:37.061229 CPU_CLUSTER: 0 enabled
857 08:46:37.061299 DOMAIN: 0000 scanning...
858 08:46:37.061360 PCI: pci_scan_bus for bus 00
859 08:46:37.064233 PCI: 00:00.0 [8086/0000] ops
860 08:46:37.064317 PCI: 00:00.0 [8086/9a12] enabled
861 08:46:37.067374 PCI: 00:02.0 [8086/0000] bus ops
862 08:46:37.070812 PCI: 00:02.0 [8086/9a40] enabled
863 08:46:37.073968 PCI: 00:04.0 [8086/0000] bus ops
864 08:46:37.077386 PCI: 00:04.0 [8086/9a03] enabled
865 08:46:37.080844 PCI: 00:05.0 [8086/9a19] enabled
866 08:46:37.084553 PCI: 00:07.0 [0000/0000] hidden
867 08:46:37.088065 PCI: 00:08.0 [8086/9a11] enabled
868 08:46:37.091517 PCI: 00:0a.0 [8086/9a0d] disabled
869 08:46:37.094866 PCI: 00:0d.0 [8086/0000] bus ops
870 08:46:37.098044 PCI: 00:0d.0 [8086/9a13] enabled
871 08:46:37.102104 PCI: 00:14.0 [8086/0000] bus ops
872 08:46:37.105145 PCI: 00:14.0 [8086/a0ed] enabled
873 08:46:37.107939 PCI: 00:14.2 [8086/a0ef] enabled
874 08:46:37.111252 PCI: 00:14.3 [8086/0000] bus ops
875 08:46:37.114410 PCI: 00:14.3 [8086/a0f0] enabled
876 08:46:37.117837 PCI: 00:15.0 [8086/0000] bus ops
877 08:46:37.121257 PCI: 00:15.0 [8086/a0e8] enabled
878 08:46:37.124617 PCI: 00:15.1 [8086/0000] bus ops
879 08:46:37.128439 PCI: 00:15.1 [8086/a0e9] enabled
880 08:46:37.131144 PCI: 00:15.2 [8086/0000] bus ops
881 08:46:37.134311 PCI: 00:15.2 [8086/a0ea] enabled
882 08:46:37.137869 PCI: 00:15.3 [8086/0000] bus ops
883 08:46:37.141447 PCI: 00:15.3 [8086/a0eb] enabled
884 08:46:37.144341 PCI: 00:16.0 [8086/0000] ops
885 08:46:37.147943 PCI: 00:16.0 [8086/a0e0] enabled
886 08:46:37.151405 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 08:46:37.154185 PCI: 00:19.0 [8086/0000] bus ops
888 08:46:37.161154 PCI: 00:19.0 [8086/a0c5] disabled
889 08:46:37.164597 PCI: 00:19.1 [8086/0000] bus ops
890 08:46:37.167177 PCI: 00:19.1 [8086/a0c6] enabled
891 08:46:37.170669 PCI: 00:1d.0 [8086/0000] bus ops
892 08:46:37.173941 PCI: 00:1d.0 [8086/a0b0] enabled
893 08:46:37.174025 PCI: 00:1e.0 [8086/0000] ops
894 08:46:37.177274 PCI: 00:1e.0 [8086/a0a8] enabled
895 08:46:37.180528 PCI: 00:1e.2 [8086/0000] bus ops
896 08:46:37.183850 PCI: 00:1e.2 [8086/a0aa] enabled
897 08:46:37.186888 PCI: 00:1e.3 [8086/0000] bus ops
898 08:46:37.190330 PCI: 00:1e.3 [8086/a0ab] enabled
899 08:46:37.193921 PCI: 00:1f.0 [8086/0000] bus ops
900 08:46:37.196912 PCI: 00:1f.0 [8086/a087] enabled
901 08:46:37.200639 RTC Init
902 08:46:37.204405 Set power on after power failure.
903 08:46:37.204536 Disabling Deep S3
904 08:46:37.208406 Disabling Deep S3
905 08:46:37.210851 Disabling Deep S4
906 08:46:37.210973 Disabling Deep S4
907 08:46:37.214332 Disabling Deep S5
908 08:46:37.214417 Disabling Deep S5
909 08:46:37.216982 PCI: 00:1f.2 [0000/0000] hidden
910 08:46:37.220497 PCI: 00:1f.3 [8086/0000] bus ops
911 08:46:37.224044 PCI: 00:1f.3 [8086/a0c8] enabled
912 08:46:37.227130 PCI: 00:1f.5 [8086/0000] bus ops
913 08:46:37.230773 PCI: 00:1f.5 [8086/a0a4] enabled
914 08:46:37.233673 PCI: Leftover static devices:
915 08:46:37.237178 PCI: 00:10.2
916 08:46:37.237261 PCI: 00:10.6
917 08:46:37.237328 PCI: 00:10.7
918 08:46:37.240532 PCI: 00:06.0
919 08:46:37.240617 PCI: 00:07.1
920 08:46:37.243490 PCI: 00:07.2
921 08:46:37.243573 PCI: 00:07.3
922 08:46:37.247371 PCI: 00:09.0
923 08:46:37.247455 PCI: 00:0d.1
924 08:46:37.247521 PCI: 00:0d.2
925 08:46:37.250234 PCI: 00:0d.3
926 08:46:37.250332 PCI: 00:0e.0
927 08:46:37.253607 PCI: 00:12.0
928 08:46:37.253691 PCI: 00:12.6
929 08:46:37.253756 PCI: 00:13.0
930 08:46:37.257015 PCI: 00:14.1
931 08:46:37.257098 PCI: 00:16.1
932 08:46:37.259922 PCI: 00:16.2
933 08:46:37.260005 PCI: 00:16.3
934 08:46:37.263412 PCI: 00:16.4
935 08:46:37.263495 PCI: 00:16.5
936 08:46:37.263561 PCI: 00:17.0
937 08:46:37.266394 PCI: 00:19.2
938 08:46:37.266478 PCI: 00:1e.1
939 08:46:37.270474 PCI: 00:1f.1
940 08:46:37.270557 PCI: 00:1f.4
941 08:46:37.270623 PCI: 00:1f.6
942 08:46:37.273015 PCI: 00:1f.7
943 08:46:37.276474 PCI: Check your devicetree.cb.
944 08:46:37.279909 PCI: 00:02.0 scanning...
945 08:46:37.283534 scan_generic_bus for PCI: 00:02.0
946 08:46:37.286452 scan_generic_bus for PCI: 00:02.0 done
947 08:46:37.289567 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 08:46:37.293698 PCI: 00:04.0 scanning...
949 08:46:37.296671 scan_generic_bus for PCI: 00:04.0
950 08:46:37.299497 GENERIC: 0.0 enabled
951 08:46:37.305973 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 08:46:37.309477 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 08:46:37.313108 PCI: 00:0d.0 scanning...
954 08:46:37.316549 scan_static_bus for PCI: 00:0d.0
955 08:46:37.319720 USB0 port 0 enabled
956 08:46:37.319803 USB0 port 0 scanning...
957 08:46:37.322477 scan_static_bus for USB0 port 0
958 08:46:37.325970 USB3 port 0 enabled
959 08:46:37.329286 USB3 port 1 enabled
960 08:46:37.329369 USB3 port 2 disabled
961 08:46:37.332698 USB3 port 3 disabled
962 08:46:37.336306 USB3 port 0 scanning...
963 08:46:37.339289 scan_static_bus for USB3 port 0
964 08:46:37.343097 scan_static_bus for USB3 port 0 done
965 08:46:37.345722 scan_bus: bus USB3 port 0 finished in 6 msecs
966 08:46:37.349706 USB3 port 1 scanning...
967 08:46:37.352355 scan_static_bus for USB3 port 1
968 08:46:37.355689 scan_static_bus for USB3 port 1 done
969 08:46:37.358998 scan_bus: bus USB3 port 1 finished in 6 msecs
970 08:46:37.365605 scan_static_bus for USB0 port 0 done
971 08:46:37.369525 scan_bus: bus USB0 port 0 finished in 43 msecs
972 08:46:37.372465 scan_static_bus for PCI: 00:0d.0 done
973 08:46:37.379193 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 08:46:37.379277 PCI: 00:14.0 scanning...
975 08:46:37.382392 scan_static_bus for PCI: 00:14.0
976 08:46:37.386116 USB0 port 0 enabled
977 08:46:37.388892 USB0 port 0 scanning...
978 08:46:37.392697 scan_static_bus for USB0 port 0
979 08:46:37.392798 USB2 port 0 disabled
980 08:46:37.395429 USB2 port 1 enabled
981 08:46:37.399287 USB2 port 2 enabled
982 08:46:37.399371 USB2 port 3 disabled
983 08:46:37.402453 USB2 port 4 enabled
984 08:46:37.405374 USB2 port 5 disabled
985 08:46:37.405458 USB2 port 6 disabled
986 08:46:37.409718 USB2 port 7 disabled
987 08:46:37.411944 USB2 port 8 disabled
988 08:46:37.412028 USB2 port 9 disabled
989 08:46:37.415241 USB3 port 0 disabled
990 08:46:37.418593 USB3 port 1 enabled
991 08:46:37.418677 USB3 port 2 disabled
992 08:46:37.422473 USB3 port 3 disabled
993 08:46:37.424954 USB2 port 1 scanning...
994 08:46:37.428616 scan_static_bus for USB2 port 1
995 08:46:37.431729 scan_static_bus for USB2 port 1 done
996 08:46:37.435159 scan_bus: bus USB2 port 1 finished in 6 msecs
997 08:46:37.438355 USB2 port 2 scanning...
998 08:46:37.441552 scan_static_bus for USB2 port 2
999 08:46:37.444883 scan_static_bus for USB2 port 2 done
1000 08:46:37.448316 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 08:46:37.452081 USB2 port 4 scanning...
1002 08:46:37.454780 scan_static_bus for USB2 port 4
1003 08:46:37.458317 scan_static_bus for USB2 port 4 done
1004 08:46:37.464919 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 08:46:37.465004 USB3 port 1 scanning...
1006 08:46:37.468470 scan_static_bus for USB3 port 1
1007 08:46:37.475119 scan_static_bus for USB3 port 1 done
1008 08:46:37.478385 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 08:46:37.481591 scan_static_bus for USB0 port 0 done
1010 08:46:37.488146 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 08:46:37.491734 scan_static_bus for PCI: 00:14.0 done
1012 08:46:37.495088 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1013 08:46:37.498437 PCI: 00:14.3 scanning...
1014 08:46:37.501212 scan_static_bus for PCI: 00:14.3
1015 08:46:37.505054 GENERIC: 0.0 enabled
1016 08:46:37.507748 scan_static_bus for PCI: 00:14.3 done
1017 08:46:37.511379 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 08:46:37.514337 PCI: 00:15.0 scanning...
1019 08:46:37.517693 scan_static_bus for PCI: 00:15.0
1020 08:46:37.521473 I2C: 00:1a enabled
1021 08:46:37.521557 I2C: 00:31 enabled
1022 08:46:37.524605 I2C: 00:32 enabled
1023 08:46:37.527754 scan_static_bus for PCI: 00:15.0 done
1024 08:46:37.531150 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 08:46:37.534403 PCI: 00:15.1 scanning...
1026 08:46:37.537597 scan_static_bus for PCI: 00:15.1
1027 08:46:37.540829 I2C: 00:10 enabled
1028 08:46:37.544519 scan_static_bus for PCI: 00:15.1 done
1029 08:46:37.547236 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 08:46:37.551091 PCI: 00:15.2 scanning...
1031 08:46:37.554091 scan_static_bus for PCI: 00:15.2
1032 08:46:37.557409 scan_static_bus for PCI: 00:15.2 done
1033 08:46:37.564083 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 08:46:37.567038 PCI: 00:15.3 scanning...
1035 08:46:37.570416 scan_static_bus for PCI: 00:15.3
1036 08:46:37.574015 scan_static_bus for PCI: 00:15.3 done
1037 08:46:37.577244 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 08:46:37.580406 PCI: 00:19.1 scanning...
1039 08:46:37.584200 scan_static_bus for PCI: 00:19.1
1040 08:46:37.587023 I2C: 00:15 enabled
1041 08:46:37.590454 scan_static_bus for PCI: 00:19.1 done
1042 08:46:37.594096 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 08:46:37.596951 PCI: 00:1d.0 scanning...
1044 08:46:37.600352 do_pci_scan_bridge for PCI: 00:1d.0
1045 08:46:37.603587 PCI: pci_scan_bus for bus 01
1046 08:46:37.606763 PCI: 01:00.0 [15b7/5009] enabled
1047 08:46:37.610461 GENERIC: 0.0 enabled
1048 08:46:37.613481 Enabling Common Clock Configuration
1049 08:46:37.616873 L1 Sub-State supported from root port 29
1050 08:46:37.620278 L1 Sub-State Support = 0x5
1051 08:46:37.623705 CommonModeRestoreTime = 0x28
1052 08:46:37.627291 Power On Value = 0x16, Power On Scale = 0x0
1053 08:46:37.629996 ASPM: Enabled L1
1054 08:46:37.633139 PCIe: Max_Payload_Size adjusted to 128
1055 08:46:37.637120 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 08:46:37.639872 PCI: 00:1e.2 scanning...
1057 08:46:37.643120 scan_generic_bus for PCI: 00:1e.2
1058 08:46:37.646570 SPI: 00 enabled
1059 08:46:37.653309 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 08:46:37.656637 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 08:46:37.659485 PCI: 00:1e.3 scanning...
1062 08:46:37.663545 scan_generic_bus for PCI: 00:1e.3
1063 08:46:37.663628 SPI: 00 enabled
1064 08:46:37.670489 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 08:46:37.677064 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 08:46:37.677148 PCI: 00:1f.0 scanning...
1067 08:46:37.680224 scan_static_bus for PCI: 00:1f.0
1068 08:46:37.683791 PNP: 0c09.0 enabled
1069 08:46:37.686969 PNP: 0c09.0 scanning...
1070 08:46:37.690310 scan_static_bus for PNP: 0c09.0
1071 08:46:37.693489 scan_static_bus for PNP: 0c09.0 done
1072 08:46:37.696873 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 08:46:37.699845 scan_static_bus for PCI: 00:1f.0 done
1074 08:46:37.706932 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 08:46:37.709942 PCI: 00:1f.2 scanning...
1076 08:46:37.713708 scan_static_bus for PCI: 00:1f.2
1077 08:46:37.713791 GENERIC: 0.0 enabled
1078 08:46:37.716746 GENERIC: 0.0 scanning...
1079 08:46:37.719846 scan_static_bus for GENERIC: 0.0
1080 08:46:37.723316 GENERIC: 0.0 enabled
1081 08:46:37.726395 GENERIC: 1.0 enabled
1082 08:46:37.729866 scan_static_bus for GENERIC: 0.0 done
1083 08:46:37.733095 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 08:46:37.736124 scan_static_bus for PCI: 00:1f.2 done
1085 08:46:37.743504 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 08:46:37.746332 PCI: 00:1f.3 scanning...
1087 08:46:37.749780 scan_static_bus for PCI: 00:1f.3
1088 08:46:37.752888 scan_static_bus for PCI: 00:1f.3 done
1089 08:46:37.756294 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 08:46:37.759395 PCI: 00:1f.5 scanning...
1091 08:46:37.762790 scan_generic_bus for PCI: 00:1f.5
1092 08:46:37.765988 scan_generic_bus for PCI: 00:1f.5 done
1093 08:46:37.772931 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 08:46:37.775900 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1095 08:46:37.779440 scan_static_bus for Root Device done
1096 08:46:37.786202 scan_bus: bus Root Device finished in 736 msecs
1097 08:46:37.786284 done
1098 08:46:37.792768 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1099 08:46:37.795558 Chrome EC: UHEPI supported
1100 08:46:37.802391 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 08:46:37.808759 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 08:46:37.812344 SPI flash protection: WPSW=0 SRP0=1
1103 08:46:37.815523 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 08:46:37.821936 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1105 08:46:37.825632 found VGA at PCI: 00:02.0
1106 08:46:37.828863 Setting up VGA for PCI: 00:02.0
1107 08:46:37.832205 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 08:46:37.839134 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 08:46:37.839317 Allocating resources...
1110 08:46:37.842246 Reading resources...
1111 08:46:37.845656 Root Device read_resources bus 0 link: 0
1112 08:46:37.852270 DOMAIN: 0000 read_resources bus 0 link: 0
1113 08:46:37.855167 PCI: 00:04.0 read_resources bus 1 link: 0
1114 08:46:37.862293 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 08:46:37.865207 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 08:46:37.872563 USB0 port 0 read_resources bus 0 link: 0
1117 08:46:37.875302 USB0 port 0 read_resources bus 0 link: 0 done
1118 08:46:37.882126 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 08:46:37.885120 PCI: 00:14.0 read_resources bus 0 link: 0
1120 08:46:37.888424 USB0 port 0 read_resources bus 0 link: 0
1121 08:46:37.895924 USB0 port 0 read_resources bus 0 link: 0 done
1122 08:46:37.898951 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 08:46:37.906101 PCI: 00:14.3 read_resources bus 0 link: 0
1124 08:46:37.909372 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 08:46:37.916376 PCI: 00:15.0 read_resources bus 0 link: 0
1126 08:46:37.918923 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 08:46:37.925780 PCI: 00:15.1 read_resources bus 0 link: 0
1128 08:46:37.929408 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 08:46:37.936370 PCI: 00:19.1 read_resources bus 0 link: 0
1130 08:46:37.939913 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 08:46:37.946397 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 08:46:37.949361 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 08:46:37.956483 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 08:46:37.959494 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 08:46:37.965941 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 08:46:37.969180 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 08:46:37.975739 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 08:46:37.978951 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 08:46:37.986123 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 08:46:37.989010 GENERIC: 0.0 read_resources bus 0 link: 0
1141 08:46:37.995458 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 08:46:37.999237 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 08:46:38.005429 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 08:46:38.008610 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 08:46:38.015269 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 08:46:38.019114 Root Device read_resources bus 0 link: 0 done
1147 08:46:38.022510 Done reading resources.
1148 08:46:38.029286 Show resources in subtree (Root Device)...After reading.
1149 08:46:38.032243 Root Device child on link 0 DOMAIN: 0000
1150 08:46:38.035021 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 08:46:38.045417 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 08:46:38.054895 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 08:46:38.055458 PCI: 00:00.0
1154 08:46:38.065525 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 08:46:38.075086 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 08:46:38.085138 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 08:46:38.094517 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 08:46:38.104800 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 08:46:38.114860 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 08:46:38.120851 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 08:46:38.131334 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 08:46:38.141175 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 08:46:38.150700 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 08:46:38.160765 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 08:46:38.170290 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 08:46:38.177643 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 08:46:38.187718 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 08:46:38.197418 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 08:46:38.207003 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 08:46:38.216983 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 08:46:38.226794 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 08:46:38.236935 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 08:46:38.243517 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 08:46:38.246560 PCI: 00:02.0
1175 08:46:38.256504 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 08:46:38.266559 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 08:46:38.276316 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 08:46:38.280123 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 08:46:38.289567 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 08:46:38.292923 GENERIC: 0.0
1181 08:46:38.293400 PCI: 00:05.0
1182 08:46:38.302586 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 08:46:38.309037 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 08:46:38.309514 GENERIC: 0.0
1185 08:46:38.312336 PCI: 00:08.0
1186 08:46:38.322320 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 08:46:38.322890 PCI: 00:0a.0
1188 08:46:38.329119 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 08:46:38.339035 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 08:46:38.342625 USB0 port 0 child on link 0 USB3 port 0
1191 08:46:38.345781 USB3 port 0
1192 08:46:38.346247 USB3 port 1
1193 08:46:38.348835 USB3 port 2
1194 08:46:38.349306 USB3 port 3
1195 08:46:38.351810 PCI: 00:14.0 child on link 0 USB0 port 0
1196 08:46:38.365729 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 08:46:38.368764 USB0 port 0 child on link 0 USB2 port 0
1198 08:46:38.369252 USB2 port 0
1199 08:46:38.371802 USB2 port 1
1200 08:46:38.372271 USB2 port 2
1201 08:46:38.375499 USB2 port 3
1202 08:46:38.378535 USB2 port 4
1203 08:46:38.379102 USB2 port 5
1204 08:46:38.382010 USB2 port 6
1205 08:46:38.382478 USB2 port 7
1206 08:46:38.385104 USB2 port 8
1207 08:46:38.385576 USB2 port 9
1208 08:46:38.388316 USB3 port 0
1209 08:46:38.388743 USB3 port 1
1210 08:46:38.392358 USB3 port 2
1211 08:46:38.392931 USB3 port 3
1212 08:46:38.394943 PCI: 00:14.2
1213 08:46:38.404966 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 08:46:38.414976 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 08:46:38.417989 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 08:46:38.428069 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 08:46:38.431112 GENERIC: 0.0
1218 08:46:38.434974 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 08:46:38.444059 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 08:46:38.448585 I2C: 00:1a
1221 08:46:38.449125 I2C: 00:31
1222 08:46:38.450921 I2C: 00:32
1223 08:46:38.454027 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 08:46:38.464333 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 08:46:38.465087 I2C: 00:10
1226 08:46:38.467610 PCI: 00:15.2
1227 08:46:38.477771 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 08:46:38.478461 PCI: 00:15.3
1229 08:46:38.487454 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 08:46:38.490737 PCI: 00:16.0
1231 08:46:38.500857 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 08:46:38.501395 PCI: 00:19.0
1233 08:46:38.506964 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 08:46:38.516782 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 08:46:38.517305 I2C: 00:15
1236 08:46:38.523548 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 08:46:38.531035 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 08:46:38.540016 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 08:46:38.550262 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 08:46:38.550799 GENERIC: 0.0
1241 08:46:38.553991 PCI: 01:00.0
1242 08:46:38.563017 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 08:46:38.572788 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1244 08:46:38.576477 PCI: 00:1e.0
1245 08:46:38.586062 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1246 08:46:38.589916 PCI: 00:1e.2 child on link 0 SPI: 00
1247 08:46:38.599421 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 08:46:38.602678 SPI: 00
1249 08:46:38.605889 PCI: 00:1e.3 child on link 0 SPI: 00
1250 08:46:38.616635 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 08:46:38.617201 SPI: 00
1252 08:46:38.619117 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1253 08:46:38.629328 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1254 08:46:38.632673 PNP: 0c09.0
1255 08:46:38.639386 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1256 08:46:38.646059 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1257 08:46:38.652347 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1258 08:46:38.662136 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1259 08:46:38.668754 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1260 08:46:38.669227 GENERIC: 0.0
1261 08:46:38.672707 GENERIC: 1.0
1262 08:46:38.673172 PCI: 00:1f.3
1263 08:46:38.682226 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1264 08:46:38.692007 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1265 08:46:38.695332 PCI: 00:1f.5
1266 08:46:38.705113 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1267 08:46:38.708412 CPU_CLUSTER: 0 child on link 0 APIC: 00
1268 08:46:38.708882 APIC: 00
1269 08:46:38.712087 APIC: 01
1270 08:46:38.712556 APIC: 07
1271 08:46:38.714864 APIC: 03
1272 08:46:38.715557 APIC: 04
1273 08:46:38.716028 APIC: 06
1274 08:46:38.718650 APIC: 02
1275 08:46:38.719219 APIC: 05
1276 08:46:38.724692 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1277 08:46:38.731527 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1278 08:46:38.738085 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1279 08:46:38.745019 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1280 08:46:38.748075 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1281 08:46:38.751107 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1282 08:46:38.760849 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1283 08:46:38.767904 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1284 08:46:38.773964 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1285 08:46:38.781254 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1286 08:46:38.787483 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1287 08:46:38.794668 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1288 08:46:38.803574 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1289 08:46:38.810682 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1290 08:46:38.813632 DOMAIN: 0000: Resource ranges:
1291 08:46:38.817404 * Base: 1000, Size: 800, Tag: 100
1292 08:46:38.820212 * Base: 1900, Size: e700, Tag: 100
1293 08:46:38.826998 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1294 08:46:38.833965 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1295 08:46:38.840037 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1296 08:46:38.846740 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1297 08:46:38.856273 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 08:46:38.863089 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 08:46:38.869503 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 08:46:38.879351 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 08:46:38.886464 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 08:46:38.892710 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 08:46:38.902879 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 08:46:38.909111 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 08:46:38.916087 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 08:46:38.925534 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 08:46:38.932288 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 08:46:38.938827 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 08:46:38.949181 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 08:46:38.955211 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 08:46:38.962173 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 08:46:38.971858 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1313 08:46:38.978581 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 08:46:38.985370 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 08:46:38.995138 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 08:46:39.001444 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 08:46:39.008124 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 08:46:39.011437 DOMAIN: 0000: Resource ranges:
1319 08:46:39.018055 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 08:46:39.021865 * Base: d0000000, Size: 28000000, Tag: 200
1321 08:46:39.025173 * Base: fa000000, Size: 1000000, Tag: 200
1322 08:46:39.031532 * Base: fb001000, Size: 2fff000, Tag: 200
1323 08:46:39.034497 * Base: fe010000, Size: 2e000, Tag: 200
1324 08:46:39.037808 * Base: fe03f000, Size: d41000, Tag: 200
1325 08:46:39.041075 * Base: fed88000, Size: 8000, Tag: 200
1326 08:46:39.047917 * Base: fed93000, Size: d000, Tag: 200
1327 08:46:39.051139 * Base: feda2000, Size: 1e000, Tag: 200
1328 08:46:39.054558 * Base: fede0000, Size: 1220000, Tag: 200
1329 08:46:39.061565 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1330 08:46:39.067871 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 08:46:39.073813 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 08:46:39.080849 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 08:46:39.087511 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 08:46:39.094059 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 08:46:39.100380 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1336 08:46:39.107425 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1337 08:46:39.113511 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1338 08:46:39.120629 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1339 08:46:39.127026 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1340 08:46:39.133667 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1341 08:46:39.139988 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1342 08:46:39.146608 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 08:46:39.154329 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1344 08:46:39.159799 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1345 08:46:39.166706 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1346 08:46:39.172706 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1347 08:46:39.179312 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1348 08:46:39.186416 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1349 08:46:39.192739 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1350 08:46:39.199211 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1351 08:46:39.206058 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1352 08:46:39.212195 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1353 08:46:39.222543 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1354 08:46:39.222664 PCI: 00:1d.0: Resource ranges:
1355 08:46:39.228826 * Base: 7fc00000, Size: 100000, Tag: 200
1356 08:46:39.235462 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1357 08:46:39.242119 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1358 08:46:39.248948 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1359 08:46:39.255464 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1360 08:46:39.261848 Root Device assign_resources, bus 0 link: 0
1361 08:46:39.265188 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 08:46:39.275353 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1363 08:46:39.281992 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1364 08:46:39.291724 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1365 08:46:39.297912 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1366 08:46:39.304803 PCI: 00:04.0 assign_resources, bus 1 link: 0
1367 08:46:39.307859 PCI: 00:04.0 assign_resources, bus 1 link: 0
1368 08:46:39.317947 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1369 08:46:39.324229 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1370 08:46:39.334304 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1371 08:46:39.337406 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1372 08:46:39.340944 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1373 08:46:39.350758 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1374 08:46:39.353829 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 08:46:39.360486 PCI: 00:14.0 assign_resources, bus 0 link: 0
1376 08:46:39.367246 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1377 08:46:39.377503 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1378 08:46:39.383602 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1379 08:46:39.387122 PCI: 00:14.3 assign_resources, bus 0 link: 0
1380 08:46:39.393714 PCI: 00:14.3 assign_resources, bus 0 link: 0
1381 08:46:39.400586 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1382 08:46:39.406523 PCI: 00:15.0 assign_resources, bus 0 link: 0
1383 08:46:39.410527 PCI: 00:15.0 assign_resources, bus 0 link: 0
1384 08:46:39.420689 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1385 08:46:39.422939 PCI: 00:15.1 assign_resources, bus 0 link: 0
1386 08:46:39.426436 PCI: 00:15.1 assign_resources, bus 0 link: 0
1387 08:46:39.436718 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1388 08:46:39.442770 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1389 08:46:39.453082 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1390 08:46:39.460426 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1391 08:46:39.466352 PCI: 00:19.1 assign_resources, bus 0 link: 0
1392 08:46:39.469663 PCI: 00:19.1 assign_resources, bus 0 link: 0
1393 08:46:39.479776 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1394 08:46:39.489925 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1395 08:46:39.496473 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1396 08:46:39.502993 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 08:46:39.509314 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1398 08:46:39.519050 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1399 08:46:39.522841 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 08:46:39.532565 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1401 08:46:39.535903 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 08:46:39.538752 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1403 08:46:39.548946 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1404 08:46:39.552182 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 08:46:39.558943 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 08:46:39.562370 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 08:46:39.568648 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 08:46:39.571767 LPC: Trying to open IO window from 800 size 1ff
1409 08:46:39.582273 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 08:46:39.589280 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 08:46:39.598125 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 08:46:39.602007 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 08:46:39.604885 Root Device assign_resources, bus 0 link: 0
1414 08:46:39.608506 Done setting resources.
1415 08:46:39.614760 Show resources in subtree (Root Device)...After assigning values.
1416 08:46:39.618361 Root Device child on link 0 DOMAIN: 0000
1417 08:46:39.624341 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 08:46:39.634514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 08:46:39.644950 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 08:46:39.645256 PCI: 00:00.0
1421 08:46:39.654685 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 08:46:39.664107 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 08:46:39.673680 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 08:46:39.683761 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 08:46:39.690563 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 08:46:39.700540 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 08:46:39.710253 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 08:46:39.720317 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 08:46:39.730462 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 08:46:39.740243 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 08:46:39.746713 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 08:46:39.756438 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 08:46:39.766702 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 08:46:39.776480 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 08:46:39.786128 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 08:46:39.792666 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 08:46:39.806143 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 08:46:39.813316 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 08:46:39.822494 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 08:46:39.832288 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 08:46:39.835708 PCI: 00:02.0
1442 08:46:39.845985 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 08:46:39.856128 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 08:46:39.865574 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 08:46:39.868950 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 08:46:39.878776 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 08:46:39.881846 GENERIC: 0.0
1448 08:46:39.882135 PCI: 00:05.0
1449 08:46:39.894999 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 08:46:39.898837 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 08:46:39.901980 GENERIC: 0.0
1452 08:46:39.902374 PCI: 00:08.0
1453 08:46:39.911823 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 08:46:39.915118 PCI: 00:0a.0
1455 08:46:39.917990 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 08:46:39.927890 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 08:46:39.934482 USB0 port 0 child on link 0 USB3 port 0
1458 08:46:39.934786 USB3 port 0
1459 08:46:39.937672 USB3 port 1
1460 08:46:39.937968 USB3 port 2
1461 08:46:39.941466 USB3 port 3
1462 08:46:39.944806 PCI: 00:14.0 child on link 0 USB0 port 0
1463 08:46:39.954953 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 08:46:39.957880 USB0 port 0 child on link 0 USB2 port 0
1465 08:46:39.960814 USB2 port 0
1466 08:46:39.964406 USB2 port 1
1467 08:46:39.964704 USB2 port 2
1468 08:46:39.967646 USB2 port 3
1469 08:46:39.967974 USB2 port 4
1470 08:46:39.970817 USB2 port 5
1471 08:46:39.971300 USB2 port 6
1472 08:46:39.974213 USB2 port 7
1473 08:46:39.974634 USB2 port 8
1474 08:46:39.977624 USB2 port 9
1475 08:46:39.977925 USB3 port 0
1476 08:46:39.981087 USB3 port 1
1477 08:46:39.981383 USB3 port 2
1478 08:46:39.984196 USB3 port 3
1479 08:46:39.984493 PCI: 00:14.2
1480 08:46:39.997279 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 08:46:40.007306 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 08:46:40.010797 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 08:46:40.020497 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 08:46:40.023527 GENERIC: 0.0
1485 08:46:40.027259 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 08:46:40.037609 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 08:46:40.040114 I2C: 00:1a
1488 08:46:40.040560 I2C: 00:31
1489 08:46:40.043709 I2C: 00:32
1490 08:46:40.047531 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 08:46:40.057352 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 08:46:40.060147 I2C: 00:10
1493 08:46:40.060453 PCI: 00:15.2
1494 08:46:40.069632 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 08:46:40.073437 PCI: 00:15.3
1496 08:46:40.083532 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 08:46:40.083968 PCI: 00:16.0
1498 08:46:40.092814 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 08:46:40.096042 PCI: 00:19.0
1500 08:46:40.099499 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 08:46:40.109501 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 08:46:40.113078 I2C: 00:15
1503 08:46:40.116986 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 08:46:40.125886 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 08:46:40.139302 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 08:46:40.149086 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 08:46:40.149464 GENERIC: 0.0
1508 08:46:40.152609 PCI: 01:00.0
1509 08:46:40.162400 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 08:46:40.171978 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1511 08:46:40.175050 PCI: 00:1e.0
1512 08:46:40.185241 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 08:46:40.188855 PCI: 00:1e.2 child on link 0 SPI: 00
1514 08:46:40.198729 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 08:46:40.202347 SPI: 00
1516 08:46:40.205784 PCI: 00:1e.3 child on link 0 SPI: 00
1517 08:46:40.214946 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 08:46:40.215266 SPI: 00
1519 08:46:40.221603 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 08:46:40.228296 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 08:46:40.232271 PNP: 0c09.0
1522 08:46:40.241279 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1523 08:46:40.244677 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1524 08:46:40.254329 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1525 08:46:40.264567 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1526 08:46:40.268296 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1527 08:46:40.271310 GENERIC: 0.0
1528 08:46:40.271617 GENERIC: 1.0
1529 08:46:40.274500 PCI: 00:1f.3
1530 08:46:40.284387 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1531 08:46:40.294266 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1532 08:46:40.294567 PCI: 00:1f.5
1533 08:46:40.307167 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1534 08:46:40.310817 CPU_CLUSTER: 0 child on link 0 APIC: 00
1535 08:46:40.311121 APIC: 00
1536 08:46:40.313769 APIC: 01
1537 08:46:40.314069 APIC: 07
1538 08:46:40.314305 APIC: 03
1539 08:46:40.317124 APIC: 04
1540 08:46:40.317423 APIC: 06
1541 08:46:40.320207 APIC: 02
1542 08:46:40.320508 APIC: 05
1543 08:46:40.323878 Done allocating resources.
1544 08:46:40.330159 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1545 08:46:40.333890 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1546 08:46:40.340398 Configure GPIOs for I2S audio on UP4.
1547 08:46:40.346996 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1548 08:46:40.347294 Enabling resources...
1549 08:46:40.353440 PCI: 00:00.0 subsystem <- 8086/9a12
1550 08:46:40.353738 PCI: 00:00.0 cmd <- 06
1551 08:46:40.356621 PCI: 00:02.0 subsystem <- 8086/9a40
1552 08:46:40.360122 PCI: 00:02.0 cmd <- 03
1553 08:46:40.363168 PCI: 00:04.0 subsystem <- 8086/9a03
1554 08:46:40.366598 PCI: 00:04.0 cmd <- 02
1555 08:46:40.370660 PCI: 00:05.0 subsystem <- 8086/9a19
1556 08:46:40.373729 PCI: 00:05.0 cmd <- 02
1557 08:46:40.376289 PCI: 00:08.0 subsystem <- 8086/9a11
1558 08:46:40.379630 PCI: 00:08.0 cmd <- 06
1559 08:46:40.383056 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 08:46:40.386388 PCI: 00:0d.0 cmd <- 02
1561 08:46:40.389935 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 08:46:40.392999 PCI: 00:14.0 cmd <- 02
1563 08:46:40.395845 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 08:46:40.395999 PCI: 00:14.2 cmd <- 02
1565 08:46:40.403437 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 08:46:40.403909 PCI: 00:14.3 cmd <- 02
1567 08:46:40.406287 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 08:46:40.410666 PCI: 00:15.0 cmd <- 02
1569 08:46:40.412872 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 08:46:40.416154 PCI: 00:15.1 cmd <- 02
1571 08:46:40.419490 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 08:46:40.422840 PCI: 00:15.2 cmd <- 02
1573 08:46:40.426009 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 08:46:40.429374 PCI: 00:15.3 cmd <- 02
1575 08:46:40.432528 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 08:46:40.436045 PCI: 00:16.0 cmd <- 02
1577 08:46:40.439605 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 08:46:40.442991 PCI: 00:19.1 cmd <- 02
1579 08:46:40.445589 PCI: 00:1d.0 bridge ctrl <- 0013
1580 08:46:40.449050 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 08:46:40.453064 PCI: 00:1d.0 cmd <- 06
1582 08:46:40.455605 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 08:46:40.456112 PCI: 00:1e.0 cmd <- 06
1584 08:46:40.462145 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 08:46:40.462539 PCI: 00:1e.2 cmd <- 06
1586 08:46:40.465514 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 08:46:40.468962 PCI: 00:1e.3 cmd <- 02
1588 08:46:40.472067 PCI: 00:1f.0 subsystem <- 8086/a087
1589 08:46:40.475279 PCI: 00:1f.0 cmd <- 407
1590 08:46:40.478907 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 08:46:40.482091 PCI: 00:1f.3 cmd <- 02
1592 08:46:40.485456 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 08:46:40.488481 PCI: 00:1f.5 cmd <- 406
1594 08:46:40.492286 PCI: 01:00.0 cmd <- 02
1595 08:46:40.496813 done.
1596 08:46:40.500518 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 08:46:40.503405 Initializing devices...
1598 08:46:40.506987 Root Device init
1599 08:46:40.509784 Chrome EC: Set SMI mask to 0x0000000000000000
1600 08:46:40.516263 Chrome EC: clear events_b mask to 0x0000000000000000
1601 08:46:40.522825 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 08:46:40.526672 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 08:46:40.533941 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 08:46:40.540529 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 08:46:40.546759 fw_config match found: DB_USB=USB3_ACTIVE
1606 08:46:40.550417 Configure Right Type-C port orientation for retimer
1607 08:46:40.553434 Root Device init finished in 44 msecs
1608 08:46:40.557577 PCI: 00:00.0 init
1609 08:46:40.560242 CPU TDP = 9 Watts
1610 08:46:40.560318 CPU PL1 = 9 Watts
1611 08:46:40.563805 CPU PL2 = 40 Watts
1612 08:46:40.567250 CPU PL4 = 83 Watts
1613 08:46:40.570481 PCI: 00:00.0 init finished in 8 msecs
1614 08:46:40.570593 PCI: 00:02.0 init
1615 08:46:40.573326 GMA: Found VBT in CBFS
1616 08:46:40.577386 GMA: Found valid VBT in CBFS
1617 08:46:40.583889 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 08:46:40.590094 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 08:46:40.593524 PCI: 00:02.0 init finished in 18 msecs
1620 08:46:40.597078 PCI: 00:05.0 init
1621 08:46:40.599742 PCI: 00:05.0 init finished in 0 msecs
1622 08:46:40.603027 PCI: 00:08.0 init
1623 08:46:40.606548 PCI: 00:08.0 init finished in 0 msecs
1624 08:46:40.610231 PCI: 00:14.0 init
1625 08:46:40.613306 PCI: 00:14.0 init finished in 0 msecs
1626 08:46:40.616172 PCI: 00:14.2 init
1627 08:46:40.619494 PCI: 00:14.2 init finished in 0 msecs
1628 08:46:40.622825 PCI: 00:15.0 init
1629 08:46:40.626375 I2C bus 0 version 0x3230302a
1630 08:46:40.629450 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 08:46:40.632953 PCI: 00:15.0 init finished in 6 msecs
1632 08:46:40.633027 PCI: 00:15.1 init
1633 08:46:40.636380 I2C bus 1 version 0x3230302a
1634 08:46:40.639280 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 08:46:40.646274 PCI: 00:15.1 init finished in 6 msecs
1636 08:46:40.646362 PCI: 00:15.2 init
1637 08:46:40.649211 I2C bus 2 version 0x3230302a
1638 08:46:40.652570 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 08:46:40.655805 PCI: 00:15.2 init finished in 6 msecs
1640 08:46:40.659463 PCI: 00:15.3 init
1641 08:46:40.663332 I2C bus 3 version 0x3230302a
1642 08:46:40.665778 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 08:46:40.669576 PCI: 00:15.3 init finished in 6 msecs
1644 08:46:40.672553 PCI: 00:16.0 init
1645 08:46:40.676203 PCI: 00:16.0 init finished in 0 msecs
1646 08:46:40.679009 PCI: 00:19.1 init
1647 08:46:40.682474 I2C bus 5 version 0x3230302a
1648 08:46:40.685767 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 08:46:40.688971 PCI: 00:19.1 init finished in 6 msecs
1650 08:46:40.692228 PCI: 00:1d.0 init
1651 08:46:40.695659 Initializing PCH PCIe bridge.
1652 08:46:40.698838 PCI: 00:1d.0 init finished in 3 msecs
1653 08:46:40.701919 PCI: 00:1f.0 init
1654 08:46:40.705193 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 08:46:40.708525 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 08:46:40.712230 IOAPIC: ID = 0x02
1657 08:46:40.715437 IOAPIC: Dumping registers
1658 08:46:40.718866 reg 0x0000: 0x02000000
1659 08:46:40.718946 reg 0x0001: 0x00770020
1660 08:46:40.721798 reg 0x0002: 0x00000000
1661 08:46:40.724936 PCI: 00:1f.0 init finished in 21 msecs
1662 08:46:40.728619 PCI: 00:1f.2 init
1663 08:46:40.731667 Disabling ACPI via APMC.
1664 08:46:40.735194 APMC done.
1665 08:46:40.738449 PCI: 00:1f.2 init finished in 5 msecs
1666 08:46:40.749419 PCI: 01:00.0 init
1667 08:46:40.752462 PCI: 01:00.0 init finished in 0 msecs
1668 08:46:40.756149 PNP: 0c09.0 init
1669 08:46:40.759372 Google Chrome EC uptime: 8.286 seconds
1670 08:46:40.765660 Google Chrome AP resets since EC boot: 1
1671 08:46:40.769262 Google Chrome most recent AP reset causes:
1672 08:46:40.772334 0.482: 32775 shutdown: entering G3
1673 08:46:40.778744 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 08:46:40.782006 PNP: 0c09.0 init finished in 22 msecs
1675 08:46:40.788460 Devices initialized
1676 08:46:40.791193 Show all devs... After init.
1677 08:46:40.794650 Root Device: enabled 1
1678 08:46:40.794763 DOMAIN: 0000: enabled 1
1679 08:46:40.798117 CPU_CLUSTER: 0: enabled 1
1680 08:46:40.801385 PCI: 00:00.0: enabled 1
1681 08:46:40.805215 PCI: 00:02.0: enabled 1
1682 08:46:40.805301 PCI: 00:04.0: enabled 1
1683 08:46:40.807989 PCI: 00:05.0: enabled 1
1684 08:46:40.811139 PCI: 00:06.0: enabled 0
1685 08:46:40.814338 PCI: 00:07.0: enabled 0
1686 08:46:40.814423 PCI: 00:07.1: enabled 0
1687 08:46:40.817764 PCI: 00:07.2: enabled 0
1688 08:46:40.820923 PCI: 00:07.3: enabled 0
1689 08:46:40.824210 PCI: 00:08.0: enabled 1
1690 08:46:40.824337 PCI: 00:09.0: enabled 0
1691 08:46:40.827568 PCI: 00:0a.0: enabled 0
1692 08:46:40.831477 PCI: 00:0d.0: enabled 1
1693 08:46:40.834310 PCI: 00:0d.1: enabled 0
1694 08:46:40.834397 PCI: 00:0d.2: enabled 0
1695 08:46:40.837433 PCI: 00:0d.3: enabled 0
1696 08:46:40.840902 PCI: 00:0e.0: enabled 0
1697 08:46:40.844481 PCI: 00:10.2: enabled 1
1698 08:46:40.844564 PCI: 00:10.6: enabled 0
1699 08:46:40.847551 PCI: 00:10.7: enabled 0
1700 08:46:40.850537 PCI: 00:12.0: enabled 0
1701 08:46:40.854176 PCI: 00:12.6: enabled 0
1702 08:46:40.854258 PCI: 00:13.0: enabled 0
1703 08:46:40.857586 PCI: 00:14.0: enabled 1
1704 08:46:40.861115 PCI: 00:14.1: enabled 0
1705 08:46:40.864079 PCI: 00:14.2: enabled 1
1706 08:46:40.864162 PCI: 00:14.3: enabled 1
1707 08:46:40.866968 PCI: 00:15.0: enabled 1
1708 08:46:40.870523 PCI: 00:15.1: enabled 1
1709 08:46:40.870607 PCI: 00:15.2: enabled 1
1710 08:46:40.873648 PCI: 00:15.3: enabled 1
1711 08:46:40.877078 PCI: 00:16.0: enabled 1
1712 08:46:40.880600 PCI: 00:16.1: enabled 0
1713 08:46:40.880685 PCI: 00:16.2: enabled 0
1714 08:46:40.883621 PCI: 00:16.3: enabled 0
1715 08:46:40.887158 PCI: 00:16.4: enabled 0
1716 08:46:40.890164 PCI: 00:16.5: enabled 0
1717 08:46:40.890275 PCI: 00:17.0: enabled 0
1718 08:46:40.893368 PCI: 00:19.0: enabled 0
1719 08:46:40.896520 PCI: 00:19.1: enabled 1
1720 08:46:40.900003 PCI: 00:19.2: enabled 0
1721 08:46:40.900108 PCI: 00:1c.0: enabled 1
1722 08:46:40.903531 PCI: 00:1c.1: enabled 0
1723 08:46:40.906666 PCI: 00:1c.2: enabled 0
1724 08:46:40.910050 PCI: 00:1c.3: enabled 0
1725 08:46:40.910136 PCI: 00:1c.4: enabled 0
1726 08:46:40.913225 PCI: 00:1c.5: enabled 0
1727 08:46:40.916541 PCI: 00:1c.6: enabled 1
1728 08:46:40.920157 PCI: 00:1c.7: enabled 0
1729 08:46:40.920245 PCI: 00:1d.0: enabled 1
1730 08:46:40.922792 PCI: 00:1d.1: enabled 0
1731 08:46:40.926544 PCI: 00:1d.2: enabled 1
1732 08:46:40.929625 PCI: 00:1d.3: enabled 0
1733 08:46:40.929722 PCI: 00:1e.0: enabled 1
1734 08:46:40.932962 PCI: 00:1e.1: enabled 0
1735 08:46:40.936131 PCI: 00:1e.2: enabled 1
1736 08:46:40.940255 PCI: 00:1e.3: enabled 1
1737 08:46:40.940340 PCI: 00:1f.0: enabled 1
1738 08:46:40.942619 PCI: 00:1f.1: enabled 0
1739 08:46:40.945827 PCI: 00:1f.2: enabled 1
1740 08:46:40.945910 PCI: 00:1f.3: enabled 1
1741 08:46:40.949667 PCI: 00:1f.4: enabled 0
1742 08:46:40.952366 PCI: 00:1f.5: enabled 1
1743 08:46:40.955839 PCI: 00:1f.6: enabled 0
1744 08:46:40.955924 PCI: 00:1f.7: enabled 0
1745 08:46:40.959158 APIC: 00: enabled 1
1746 08:46:40.962587 GENERIC: 0.0: enabled 1
1747 08:46:40.965767 GENERIC: 0.0: enabled 1
1748 08:46:40.965850 GENERIC: 1.0: enabled 1
1749 08:46:40.969519 GENERIC: 0.0: enabled 1
1750 08:46:40.972496 GENERIC: 1.0: enabled 1
1751 08:46:40.972607 USB0 port 0: enabled 1
1752 08:46:40.975394 GENERIC: 0.0: enabled 1
1753 08:46:40.979247 USB0 port 0: enabled 1
1754 08:46:40.982197 GENERIC: 0.0: enabled 1
1755 08:46:40.982274 I2C: 00:1a: enabled 1
1756 08:46:40.985916 I2C: 00:31: enabled 1
1757 08:46:40.988794 I2C: 00:32: enabled 1
1758 08:46:40.988878 I2C: 00:10: enabled 1
1759 08:46:40.992545 I2C: 00:15: enabled 1
1760 08:46:40.995455 GENERIC: 0.0: enabled 0
1761 08:46:40.998615 GENERIC: 1.0: enabled 0
1762 08:46:40.998728 GENERIC: 0.0: enabled 1
1763 08:46:41.001771 SPI: 00: enabled 1
1764 08:46:41.005661 SPI: 00: enabled 1
1765 08:46:41.005786 PNP: 0c09.0: enabled 1
1766 08:46:41.009345 GENERIC: 0.0: enabled 1
1767 08:46:41.011963 USB3 port 0: enabled 1
1768 08:46:41.012047 USB3 port 1: enabled 1
1769 08:46:41.014891 USB3 port 2: enabled 0
1770 08:46:41.018930 USB3 port 3: enabled 0
1771 08:46:41.022307 USB2 port 0: enabled 0
1772 08:46:41.022419 USB2 port 1: enabled 1
1773 08:46:41.025012 USB2 port 2: enabled 1
1774 08:46:41.028578 USB2 port 3: enabled 0
1775 08:46:41.028664 USB2 port 4: enabled 1
1776 08:46:41.031563 USB2 port 5: enabled 0
1777 08:46:41.034646 USB2 port 6: enabled 0
1778 08:46:41.038080 USB2 port 7: enabled 0
1779 08:46:41.038164 USB2 port 8: enabled 0
1780 08:46:41.041586 USB2 port 9: enabled 0
1781 08:46:41.045075 USB3 port 0: enabled 0
1782 08:46:41.045159 USB3 port 1: enabled 1
1783 08:46:41.048062 USB3 port 2: enabled 0
1784 08:46:41.051651 USB3 port 3: enabled 0
1785 08:46:41.054462 GENERIC: 0.0: enabled 1
1786 08:46:41.054573 GENERIC: 1.0: enabled 1
1787 08:46:41.058091 APIC: 01: enabled 1
1788 08:46:41.061604 APIC: 07: enabled 1
1789 08:46:41.061737 APIC: 03: enabled 1
1790 08:46:41.064220 APIC: 04: enabled 1
1791 08:46:41.064304 APIC: 06: enabled 1
1792 08:46:41.067908 APIC: 02: enabled 1
1793 08:46:41.071035 APIC: 05: enabled 1
1794 08:46:41.071119 PCI: 01:00.0: enabled 1
1795 08:46:41.077446 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1796 08:46:41.080723 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1797 08:46:41.088079 ELOG: NV offset 0xf30000 size 0x1000
1798 08:46:41.093915 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1799 08:46:41.100561 ELOG: Event(17) added with size 13 at 2023-12-11 08:46:41 UTC
1800 08:46:41.107628 ELOG: Event(92) added with size 9 at 2023-12-11 08:46:41 UTC
1801 08:46:41.113934 ELOG: Event(93) added with size 9 at 2023-12-11 08:46:41 UTC
1802 08:46:41.121016 ELOG: Event(9E) added with size 10 at 2023-12-11 08:46:41 UTC
1803 08:46:41.126803 ELOG: Event(9F) added with size 14 at 2023-12-11 08:46:41 UTC
1804 08:46:41.130486 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1805 08:46:41.137356 ELOG: Event(A1) added with size 10 at 2023-12-11 08:46:41 UTC
1806 08:46:41.146827 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1807 08:46:41.153179 ELOG: Event(A0) added with size 9 at 2023-12-11 08:46:41 UTC
1808 08:46:41.156860 elog_add_boot_reason: Logged dev mode boot
1809 08:46:41.163039 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1810 08:46:41.163129 Finalize devices...
1811 08:46:41.166304 Devices finalized
1812 08:46:41.173425 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1813 08:46:41.176634 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1814 08:46:41.183117 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1815 08:46:41.186167 ME: HFSTS1 : 0x80030055
1816 08:46:41.192653 ME: HFSTS2 : 0x30280116
1817 08:46:41.196020 ME: HFSTS3 : 0x00000050
1818 08:46:41.199074 ME: HFSTS4 : 0x00004000
1819 08:46:41.205969 ME: HFSTS5 : 0x00000000
1820 08:46:41.209256 ME: HFSTS6 : 0x40400006
1821 08:46:41.212011 ME: Manufacturing Mode : YES
1822 08:46:41.215698 ME: SPI Protection Mode Enabled : NO
1823 08:46:41.222395 ME: FW Partition Table : OK
1824 08:46:41.225658 ME: Bringup Loader Failure : NO
1825 08:46:41.228834 ME: Firmware Init Complete : NO
1826 08:46:41.232280 ME: Boot Options Present : NO
1827 08:46:41.235543 ME: Update In Progress : NO
1828 08:46:41.238951 ME: D0i3 Support : YES
1829 08:46:41.241876 ME: Low Power State Enabled : NO
1830 08:46:41.245343 ME: CPU Replaced : YES
1831 08:46:41.251712 ME: CPU Replacement Valid : YES
1832 08:46:41.255400 ME: Current Working State : 5
1833 08:46:41.258878 ME: Current Operation State : 1
1834 08:46:41.261567 ME: Current Operation Mode : 3
1835 08:46:41.265763 ME: Error Code : 0
1836 08:46:41.268379 ME: Enhanced Debug Mode : NO
1837 08:46:41.271645 ME: CPU Debug Disabled : YES
1838 08:46:41.275205 ME: TXT Support : NO
1839 08:46:41.281546 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1840 08:46:41.291801 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1841 08:46:41.294900 CBFS: 'fallback/slic' not found.
1842 08:46:41.298053 ACPI: Writing ACPI tables at 76b01000.
1843 08:46:41.298148 ACPI: * FACS
1844 08:46:41.301508 ACPI: * DSDT
1845 08:46:41.304943 Ramoops buffer: 0x100000@0x76a00000.
1846 08:46:41.308184 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1847 08:46:41.314777 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1848 08:46:41.318159 Google Chrome EC: version:
1849 08:46:41.321249 ro: voema_v2.0.10114-a447f03e46
1850 08:46:41.324464 rw: voema_v2.0.10114-a447f03e46
1851 08:46:41.324549 running image: 2
1852 08:46:41.330962 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1853 08:46:41.336078 ACPI: * FADT
1854 08:46:41.336167 SCI is IRQ9
1855 08:46:41.343142 ACPI: added table 1/32, length now 40
1856 08:46:41.343229 ACPI: * SSDT
1857 08:46:41.346208 Found 1 CPU(s) with 8 core(s) each.
1858 08:46:41.352388 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1859 08:46:41.355821 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1860 08:46:41.359804 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1861 08:46:41.365436 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1862 08:46:41.369256 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1863 08:46:41.375175 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1864 08:46:41.378587 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1865 08:46:41.385438 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1866 08:46:41.392218 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1867 08:46:41.395276 \_SB.PCI0.RP09: Added StorageD3Enable property
1868 08:46:41.402212 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1869 08:46:41.405010 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1870 08:46:41.411994 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1871 08:46:41.415042 PS2K: Passing 80 keymaps to kernel
1872 08:46:41.421734 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1873 08:46:41.428372 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1874 08:46:41.435310 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1875 08:46:41.441420 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1876 08:46:41.448245 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1877 08:46:41.454792 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1878 08:46:41.461125 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1879 08:46:41.467935 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1880 08:46:41.471369 ACPI: added table 2/32, length now 44
1881 08:46:41.471456 ACPI: * MCFG
1882 08:46:41.478159 ACPI: added table 3/32, length now 48
1883 08:46:41.478247 ACPI: * TPM2
1884 08:46:41.481136 TPM2 log created at 0x769f0000
1885 08:46:41.484838 ACPI: added table 4/32, length now 52
1886 08:46:41.487779 ACPI: * MADT
1887 08:46:41.487862 SCI is IRQ9
1888 08:46:41.491194 ACPI: added table 5/32, length now 56
1889 08:46:41.494575 current = 76b09850
1890 08:46:41.494661 ACPI: * DMAR
1891 08:46:41.501185 ACPI: added table 6/32, length now 60
1892 08:46:41.504340 ACPI: added table 7/32, length now 64
1893 08:46:41.504453 ACPI: * HPET
1894 08:46:41.507269 ACPI: added table 8/32, length now 68
1895 08:46:41.511065 ACPI: done.
1896 08:46:41.513997 ACPI tables: 35216 bytes.
1897 08:46:41.514080 smbios_write_tables: 769ef000
1898 08:46:41.518944 EC returned error result code 3
1899 08:46:41.522225 Couldn't obtain OEM name from CBI
1900 08:46:41.526515 Create SMBIOS type 16
1901 08:46:41.529597 Create SMBIOS type 17
1902 08:46:41.532955 GENERIC: 0.0 (WIFI Device)
1903 08:46:41.536650 SMBIOS tables: 1734 bytes.
1904 08:46:41.539443 Writing table forward entry at 0x00000500
1905 08:46:41.545783 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1906 08:46:41.549256 Writing coreboot table at 0x76b25000
1907 08:46:41.555883 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1908 08:46:41.559024 1. 0000000000001000-000000000009ffff: RAM
1909 08:46:41.562716 2. 00000000000a0000-00000000000fffff: RESERVED
1910 08:46:41.568852 3. 0000000000100000-00000000769eefff: RAM
1911 08:46:41.572510 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1912 08:46:41.579221 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1913 08:46:41.586033 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1914 08:46:41.588663 7. 0000000077000000-000000007fbfffff: RESERVED
1915 08:46:41.595346 8. 00000000c0000000-00000000cfffffff: RESERVED
1916 08:46:41.598627 9. 00000000f8000000-00000000f9ffffff: RESERVED
1917 08:46:41.602431 10. 00000000fb000000-00000000fb000fff: RESERVED
1918 08:46:41.608603 11. 00000000fe000000-00000000fe00ffff: RESERVED
1919 08:46:41.612059 12. 00000000fed80000-00000000fed87fff: RESERVED
1920 08:46:41.618575 13. 00000000fed90000-00000000fed92fff: RESERVED
1921 08:46:41.622400 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 08:46:41.628962 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 08:46:41.631825 16. 0000000100000000-00000004803fffff: RAM
1924 08:46:41.635207 Passing 4 GPIOs to payload:
1925 08:46:41.638525 NAME | PORT | POLARITY | VALUE
1926 08:46:41.645136 lid | undefined | high | high
1927 08:46:41.651662 power | undefined | high | low
1928 08:46:41.654655 oprom | undefined | high | low
1929 08:46:41.661324 EC in RW | 0x000000e5 | high | high
1930 08:46:41.668225 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1931 08:46:41.671581 coreboot table: 1576 bytes.
1932 08:46:41.674941 IMD ROOT 0. 0x76fff000 0x00001000
1933 08:46:41.678275 IMD SMALL 1. 0x76ffe000 0x00001000
1934 08:46:41.681442 FSP MEMORY 2. 0x76c4e000 0x003b0000
1935 08:46:41.684903 VPD 3. 0x76c4d000 0x00000367
1936 08:46:41.687909 RO MCACHE 4. 0x76c4c000 0x00000fdc
1937 08:46:41.691022 CONSOLE 5. 0x76c2c000 0x00020000
1938 08:46:41.697937 FMAP 6. 0x76c2b000 0x00000578
1939 08:46:41.701070 TIME STAMP 7. 0x76c2a000 0x00000910
1940 08:46:41.704558 VBOOT WORK 8. 0x76c16000 0x00014000
1941 08:46:41.707935 ROMSTG STCK 9. 0x76c15000 0x00001000
1942 08:46:41.711002 AFTER CAR 10. 0x76c0a000 0x0000b000
1943 08:46:41.714025 RAMSTAGE 11. 0x76b97000 0x00073000
1944 08:46:41.717661 REFCODE 12. 0x76b42000 0x00055000
1945 08:46:41.724414 SMM BACKUP 13. 0x76b32000 0x00010000
1946 08:46:41.727564 4f444749 14. 0x76b30000 0x00002000
1947 08:46:41.731034 EXT VBT15. 0x76b2d000 0x0000219f
1948 08:46:41.733975 COREBOOT 16. 0x76b25000 0x00008000
1949 08:46:41.737539 ACPI 17. 0x76b01000 0x00024000
1950 08:46:41.741162 ACPI GNVS 18. 0x76b00000 0x00001000
1951 08:46:41.744023 RAMOOPS 19. 0x76a00000 0x00100000
1952 08:46:41.747034 TPM2 TCGLOG20. 0x769f0000 0x00010000
1953 08:46:41.750349 SMBIOS 21. 0x769ef000 0x00000800
1954 08:46:41.753689 IMD small region:
1955 08:46:41.756982 IMD ROOT 0. 0x76ffec00 0x00000400
1956 08:46:41.760762 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1957 08:46:41.766857 POWER STATE 2. 0x76ffeb80 0x00000044
1958 08:46:41.770281 ROMSTAGE 3. 0x76ffeb60 0x00000004
1959 08:46:41.773664 MEM INFO 4. 0x76ffe980 0x000001e0
1960 08:46:41.779959 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1961 08:46:41.783115 MTRR: Physical address space:
1962 08:46:41.790362 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1963 08:46:41.793345 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1964 08:46:41.799790 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1965 08:46:41.806644 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1966 08:46:41.812943 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1967 08:46:41.819620 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1968 08:46:41.826263 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1969 08:46:41.829500 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 08:46:41.832798 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 08:46:41.839369 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 08:46:41.843073 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 08:46:41.846633 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 08:46:41.849502 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 08:46:41.856422 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 08:46:41.859108 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 08:46:41.862681 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 08:46:41.865636 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 08:46:41.872299 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 08:46:41.875487 call enable_fixed_mtrr()
1981 08:46:41.879143 CPU physical address size: 39 bits
1982 08:46:41.882404 MTRR: default type WB/UC MTRR counts: 6/7.
1983 08:46:41.885395 MTRR: WB selected as default type.
1984 08:46:41.892056 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 08:46:41.899147 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 08:46:41.906140 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 08:46:41.912682 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1988 08:46:41.919571 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1989 08:46:41.925593 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1990 08:46:41.931656 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 08:46:41.935337 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 08:46:41.938620 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 08:46:41.941951 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 08:46:41.948362 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 08:46:41.951825 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 08:46:41.955618 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 08:46:41.958813 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 08:46:41.961834 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 08:46:41.968257 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 08:46:41.972053 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 08:46:41.972141
2002 08:46:41.975167 MTRR check
2003 08:46:41.979493 call enable_fixed_mtrr()
2004 08:46:41.979577 Fixed MTRRs : Enabled
2005 08:46:41.981980 Variable MTRRs: Enabled
2006 08:46:41.982062
2007 08:46:41.984844 CPU physical address size: 39 bits
2008 08:46:41.992729 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2009 08:46:41.996661 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 08:46:42.002929 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 08:46:42.006265 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 08:46:42.009413 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 08:46:42.013122 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 08:46:42.019204 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 08:46:42.022481 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 08:46:42.025910 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 08:46:42.029096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 08:46:42.035959 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 08:46:42.040106 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 08:46:42.042186 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 08:46:42.049981 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 08:46:42.050070 call enable_fixed_mtrr()
2023 08:46:42.056312 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 08:46:42.059791 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 08:46:42.062756 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 08:46:42.066205 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 08:46:42.072725 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 08:46:42.075930 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 08:46:42.080085 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 08:46:42.083172 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 08:46:42.089219 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 08:46:42.092549 CPU physical address size: 39 bits
2033 08:46:42.096848 call enable_fixed_mtrr()
2034 08:46:42.100174 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 08:46:42.106574 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 08:46:42.110437 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 08:46:42.113804 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 08:46:42.116837 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 08:46:42.123160 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 08:46:42.126697 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 08:46:42.129786 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 08:46:42.133001 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 08:46:42.139656 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 08:46:42.143285 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 08:46:42.146094 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 08:46:42.153675 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 08:46:42.153832 call enable_fixed_mtrr()
2048 08:46:42.160322 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 08:46:42.163564 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 08:46:42.166588 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 08:46:42.169736 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 08:46:42.176764 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 08:46:42.179639 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 08:46:42.183244 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 08:46:42.186824 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 08:46:42.192973 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 08:46:42.196159 CPU physical address size: 39 bits
2058 08:46:42.201297 call enable_fixed_mtrr()
2059 08:46:42.204598 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 08:46:42.210716 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 08:46:42.214186 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 08:46:42.217346 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 08:46:42.220835 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 08:46:42.227348 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 08:46:42.230708 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 08:46:42.233593 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 08:46:42.237483 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 08:46:42.243970 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 08:46:42.246886 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 08:46:42.250295 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 08:46:42.257558 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 08:46:42.257641 call enable_fixed_mtrr()
2073 08:46:42.264118 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 08:46:42.267627 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 08:46:42.270395 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 08:46:42.274033 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 08:46:42.280656 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 08:46:42.283886 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 08:46:42.286765 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 08:46:42.290183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 08:46:42.297055 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 08:46:42.299981 CPU physical address size: 39 bits
2083 08:46:42.304727 call enable_fixed_mtrr()
2084 08:46:42.308135 CPU physical address size: 39 bits
2085 08:46:42.311869 CPU physical address size: 39 bits
2086 08:46:42.314916 CPU physical address size: 39 bits
2087 08:46:42.318113 Checking cr50 for pending updates
2088 08:46:42.326850 Reading cr50 TPM mode
2089 08:46:42.336597 BS: BS_PAYLOAD_LOAD entry times (exec / console): 331 / 6 ms
2090 08:46:42.346553 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2091 08:46:42.349824 Checking segment from ROM address 0xffc02b38
2092 08:46:42.353237 Checking segment from ROM address 0xffc02b54
2093 08:46:42.359826 Loading segment from ROM address 0xffc02b38
2094 08:46:42.359911 code (compression=0)
2095 08:46:42.369882 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 08:46:42.380380 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 08:46:42.380471 it's not compressed!
2098 08:46:42.520474 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 08:46:42.527021 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 08:46:42.533456 Loading segment from ROM address 0xffc02b54
2101 08:46:42.537154 Entry Point 0x30000000
2102 08:46:42.537291 Loaded segments
2103 08:46:42.543363 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2104 08:46:42.588804 Finalizing chipset.
2105 08:46:42.591604 Finalizing SMM.
2106 08:46:42.591727 APMC done.
2107 08:46:42.598262 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2108 08:46:42.601601 mp_park_aps done after 0 msecs.
2109 08:46:42.605110 Jumping to boot code at 0x30000000(0x76b25000)
2110 08:46:42.615002 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 08:46:42.615100
2112 08:46:42.615167
2113 08:46:42.618326
2114 08:46:42.618409 Starting depthcharge on Voema...
2115 08:46:42.618762 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2116 08:46:42.618864 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2117 08:46:42.618950 Setting prompt string to ['volteer:']
2118 08:46:42.619032 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2119 08:46:42.622041
2120 08:46:42.628324 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 08:46:42.628409
2122 08:46:42.634724 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 08:46:42.634808
2124 08:46:42.641142 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 08:46:42.641226
2126 08:46:42.644638 Failed to find eMMC card reader
2127 08:46:42.644721
2128 08:46:42.648046 Wipe memory regions:
2129 08:46:42.648129
2130 08:46:42.651002 [0x00000000001000, 0x000000000a0000)
2131 08:46:42.651084
2132 08:46:42.654318 [0x00000000100000, 0x00000030000000)
2133 08:46:42.689264
2134 08:46:42.692276 [0x00000032662db0, 0x000000769ef000)
2135 08:46:42.740830
2136 08:46:42.744125 [0x00000100000000, 0x00000480400000)
2137 08:46:43.387956
2138 08:46:43.392073 ec_init: CrosEC protocol v3 supported (256, 256)
2139 08:46:43.823356
2140 08:46:43.823514 R8152: Initializing
2141 08:46:43.823581
2142 08:46:43.826741 Version 6 (ocp_data = 5c30)
2143 08:46:43.826828
2144 08:46:43.829933 R8152: Done initializing
2145 08:46:43.830016
2146 08:46:43.833145 Adding net device
2147 08:46:44.135921
2148 08:46:44.139466 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 08:46:44.139550
2150 08:46:44.139615
2151 08:46:44.139679
2152 08:46:44.142733 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 08:46:44.243114 volteer: tftpboot 192.168.201.1 12243818/tftp-deploy-656fpziu/kernel/bzImage 12243818/tftp-deploy-656fpziu/kernel/cmdline 12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
2155 08:46:44.243290 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 08:46:44.243394 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2157 08:46:44.248426 tftpboot 192.168.201.1 12243818/tftp-deploy-656fpziu/kernel/bzIploy-656fpziu/kernel/cmdline 12243818/tftp-deploy-656fpziu/ramdisk/ramdisk.cpio.gz
2158 08:46:44.248514
2159 08:46:44.248578 Waiting for link
2160 08:46:44.451432
2161 08:46:44.451586 done.
2162 08:46:44.451653
2163 08:46:44.451752 MAC: 00:24:32:30:7d:ab
2164 08:46:44.451811
2165 08:46:44.454270 Sending DHCP discover... done.
2166 08:46:44.454352
2167 08:46:44.457743 Waiting for reply... done.
2168 08:46:44.457824
2169 08:46:44.460979 Sending DHCP request... done.
2170 08:46:44.461061
2171 08:46:44.464389 Waiting for reply... done.
2172 08:46:44.464470
2173 08:46:44.467598 My ip is 192.168.201.20
2174 08:46:44.467707
2175 08:46:44.470876 The DHCP server ip is 192.168.201.1
2176 08:46:44.470957
2177 08:46:44.477530 TFTP server IP predefined by user: 192.168.201.1
2178 08:46:44.477612
2179 08:46:44.483711 Bootfile predefined by user: 12243818/tftp-deploy-656fpziu/kernel/bzImage
2180 08:46:44.483807
2181 08:46:44.487493 Sending tftp read request... done.
2182 08:46:44.487574
2183 08:46:44.490616 Waiting for the transfer...
2184 08:46:44.490698
2185 08:46:45.069427 00000000 ################################################################
2186 08:46:45.069579
2187 08:46:45.643528 00080000 ################################################################
2188 08:46:45.643762
2189 08:46:46.201979 00100000 ################################################################
2190 08:46:46.202130
2191 08:46:46.763063 00180000 ################################################################
2192 08:46:46.763217
2193 08:46:47.340054 00200000 ################################################################
2194 08:46:47.340203
2195 08:46:47.894879 00280000 ################################################################
2196 08:46:47.895030
2197 08:46:48.470502 00300000 ################################################################
2198 08:46:48.470671
2199 08:46:49.021635 00380000 ################################################################
2200 08:46:49.021791
2201 08:46:49.611515 00400000 ################################################################
2202 08:46:49.611736
2203 08:46:50.174894 00480000 ################################################################
2204 08:46:50.175065
2205 08:46:50.746028 00500000 ################################################################
2206 08:46:50.746215
2207 08:46:51.330479 00580000 ################################################################
2208 08:46:51.330639
2209 08:46:51.889278 00600000 ################################################################
2210 08:46:51.889439
2211 08:46:52.460007 00680000 ################################################################
2212 08:46:52.460167
2213 08:46:53.027388 00700000 ################################################################
2214 08:46:53.027546
2215 08:46:53.617934 00780000 ################################################################
2216 08:46:53.618086
2217 08:46:53.823565 00800000 ####################### done.
2218 08:46:53.823762
2219 08:46:53.827502 The bootfile was 8572816 bytes long.
2220 08:46:53.827611
2221 08:46:53.830298 Sending tftp read request... done.
2222 08:46:53.830388
2223 08:46:53.833548 Waiting for the transfer...
2224 08:46:53.833637
2225 08:46:54.392007 00000000 ################################################################
2226 08:46:54.392163
2227 08:46:54.935591 00080000 ################################################################
2228 08:46:54.935793
2229 08:46:55.499663 00100000 ################################################################
2230 08:46:55.499856
2231 08:46:56.062498 00180000 ################################################################
2232 08:46:56.062657
2233 08:46:56.614115 00200000 ################################################################
2234 08:46:56.614270
2235 08:46:57.172135 00280000 ################################################################
2236 08:46:57.172290
2237 08:46:57.735633 00300000 ################################################################
2238 08:46:57.735830
2239 08:46:58.302358 00380000 ################################################################
2240 08:46:58.302512
2241 08:46:58.853597 00400000 ################################################################
2242 08:46:58.853753
2243 08:46:59.435347 00480000 ################################################################
2244 08:46:59.435495
2245 08:47:00.021159 00500000 ################################################################
2246 08:47:00.021311
2247 08:47:00.299233 00580000 ############################# done.
2248 08:47:00.299389
2249 08:47:00.302922 Sending tftp read request... done.
2250 08:47:00.303011
2251 08:47:00.306477 Waiting for the transfer...
2252 08:47:00.306565
2253 08:47:00.306634 00000000 # done.
2254 08:47:00.306702
2255 08:47:00.315662 Command line loaded dynamically from TFTP file: 12243818/tftp-deploy-656fpziu/kernel/cmdline
2256 08:47:00.315851
2257 08:47:00.342448 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243818/extract-nfsrootfs-mpv96gp8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2258 08:47:00.342764
2259 08:47:00.345862 Shutting down all USB controllers.
2260 08:47:00.346065
2261 08:47:00.348810 Removing current net device
2262 08:47:00.349138
2263 08:47:00.352799 Finalizing coreboot
2264 08:47:00.353182
2265 08:47:00.359040 Exiting depthcharge with code 4 at timestamp: 26321034
2266 08:47:00.359411
2267 08:47:00.359738
2268 08:47:00.360039 Starting kernel ...
2269 08:47:00.360310
2270 08:47:00.360753
2271 08:47:00.361967 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2272 08:47:00.362415 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2273 08:47:00.362768 Setting prompt string to ['Linux version [0-9]']
2274 08:47:00.363089 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2275 08:47:00.363407 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2277 08:51:27.362655 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2279 08:51:27.362861 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2281 08:51:27.363030 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2284 08:51:27.363287 end: 2 depthcharge-action (duration 00:05:00) [common]
2286 08:51:27.363510 Cleaning after the job
2287 08:51:27.363600 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/ramdisk
2288 08:51:27.364574 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/kernel
2289 08:51:27.365889 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/nfsrootfs
2290 08:51:27.482756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243818/tftp-deploy-656fpziu/modules
2291 08:51:27.483231 start: 4.1 power-off (timeout 00:00:30) [common]
2292 08:51:27.483407 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2293 08:51:27.560159 >> Command sent successfully.
2294 08:51:27.563222 Returned 0 in 0 seconds
2295 08:51:27.664049 end: 4.1 power-off (duration 00:00:00) [common]
2297 08:51:27.665412 start: 4.2 read-feedback (timeout 00:10:00) [common]
2298 08:51:27.666610 Listened to connection for namespace 'common' for up to 1s
2299 08:51:28.667260 Finalising connection for namespace 'common'
2300 08:51:28.667894 Disconnecting from shell: Finalise
2301 08:51:28.668287
2302 08:51:28.769198 end: 4.2 read-feedback (duration 00:00:01) [common]
2303 08:51:28.769730 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243818
2304 08:51:29.314468 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243818
2305 08:51:29.314720 JobError: Your job cannot terminate cleanly.