Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:41:04.096706 lava-dispatcher, installed at version: 2023.10
2 07:41:04.096936 start: 0 validate
3 07:41:04.097068 Start time: 2024-01-03 07:41:04.097061+00:00 (UTC)
4 07:41:04.097190 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:41:04.097322 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:41:04.365409 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:41:04.365597 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:41:04.633873 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:41:04.634060 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:41:04.904486 validate duration: 0.81
12 07:41:04.904796 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:41:04.904913 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:41:04.905012 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:41:04.905151 Not decompressing ramdisk as can be used compressed.
16 07:41:04.905242 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:41:04.905311 saving as /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/ramdisk/rootfs.cpio.gz
18 07:41:04.905377 total size: 8418130 (8 MB)
19 07:41:04.906464 progress 0 % (0 MB)
20 07:41:04.908817 progress 5 % (0 MB)
21 07:41:04.911166 progress 10 % (0 MB)
22 07:41:04.913586 progress 15 % (1 MB)
23 07:41:04.915960 progress 20 % (1 MB)
24 07:41:04.918309 progress 25 % (2 MB)
25 07:41:04.920644 progress 30 % (2 MB)
26 07:41:04.922788 progress 35 % (2 MB)
27 07:41:04.925092 progress 40 % (3 MB)
28 07:41:04.927422 progress 45 % (3 MB)
29 07:41:04.929739 progress 50 % (4 MB)
30 07:41:04.932034 progress 55 % (4 MB)
31 07:41:04.934307 progress 60 % (4 MB)
32 07:41:04.936547 progress 65 % (5 MB)
33 07:41:04.938928 progress 70 % (5 MB)
34 07:41:04.941234 progress 75 % (6 MB)
35 07:41:04.943510 progress 80 % (6 MB)
36 07:41:04.945786 progress 85 % (6 MB)
37 07:41:04.948116 progress 90 % (7 MB)
38 07:41:04.950381 progress 95 % (7 MB)
39 07:41:04.952511 progress 100 % (8 MB)
40 07:41:04.952753 8 MB downloaded in 0.05 s (169.46 MB/s)
41 07:41:04.952917 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:41:04.953164 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:41:04.953257 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:41:04.953345 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:41:04.953490 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:41:04.953567 saving as /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/kernel/bzImage
48 07:41:04.953630 total size: 8572816 (8 MB)
49 07:41:04.953693 No compression specified
50 07:41:04.954795 progress 0 % (0 MB)
51 07:41:04.957222 progress 5 % (0 MB)
52 07:41:04.959679 progress 10 % (0 MB)
53 07:41:04.961984 progress 15 % (1 MB)
54 07:41:04.964316 progress 20 % (1 MB)
55 07:41:04.966634 progress 25 % (2 MB)
56 07:41:04.968953 progress 30 % (2 MB)
57 07:41:04.971255 progress 35 % (2 MB)
58 07:41:04.973559 progress 40 % (3 MB)
59 07:41:04.975901 progress 45 % (3 MB)
60 07:41:04.978207 progress 50 % (4 MB)
61 07:41:04.980502 progress 55 % (4 MB)
62 07:41:04.982920 progress 60 % (4 MB)
63 07:41:04.985343 progress 65 % (5 MB)
64 07:41:04.987621 progress 70 % (5 MB)
65 07:41:04.989897 progress 75 % (6 MB)
66 07:41:04.992170 progress 80 % (6 MB)
67 07:41:04.994437 progress 85 % (6 MB)
68 07:41:04.996729 progress 90 % (7 MB)
69 07:41:04.998998 progress 95 % (7 MB)
70 07:41:05.001289 progress 100 % (8 MB)
71 07:41:05.001480 8 MB downloaded in 0.05 s (170.88 MB/s)
72 07:41:05.001629 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:41:05.001863 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:41:05.001956 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:41:05.002044 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:41:05.002200 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:41:05.002276 saving as /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/modules/modules.tar
79 07:41:05.002340 total size: 251144 (0 MB)
80 07:41:05.002404 Using unxz to decompress xz
81 07:41:05.006285 progress 13 % (0 MB)
82 07:41:05.006719 progress 26 % (0 MB)
83 07:41:05.006966 progress 39 % (0 MB)
84 07:41:05.008644 progress 52 % (0 MB)
85 07:41:05.010639 progress 65 % (0 MB)
86 07:41:05.012752 progress 78 % (0 MB)
87 07:41:05.014693 progress 91 % (0 MB)
88 07:41:05.016766 progress 100 % (0 MB)
89 07:41:05.022409 0 MB downloaded in 0.02 s (11.94 MB/s)
90 07:41:05.022673 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:41:05.022948 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:41:05.023052 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 07:41:05.023155 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 07:41:05.023240 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:41:05.023328 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 07:41:05.023570 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw
98 07:41:05.023730 makedir: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin
99 07:41:05.023841 makedir: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/tests
100 07:41:05.023946 makedir: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/results
101 07:41:05.024063 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-add-keys
102 07:41:05.024214 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-add-sources
103 07:41:05.024349 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-background-process-start
104 07:41:05.024487 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-background-process-stop
105 07:41:05.024623 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-common-functions
106 07:41:05.024755 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-echo-ipv4
107 07:41:05.024885 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-install-packages
108 07:41:05.025013 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-installed-packages
109 07:41:05.025142 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-os-build
110 07:41:05.025271 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-probe-channel
111 07:41:05.025408 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-probe-ip
112 07:41:05.025538 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-target-ip
113 07:41:05.025667 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-target-mac
114 07:41:05.025853 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-target-storage
115 07:41:05.025986 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-case
116 07:41:05.026114 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-event
117 07:41:05.026241 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-feedback
118 07:41:05.026368 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-raise
119 07:41:05.026496 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-reference
120 07:41:05.026687 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-runner
121 07:41:05.026865 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-set
122 07:41:05.027008 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-test-shell
123 07:41:05.027145 Updating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-install-packages (oe)
124 07:41:05.027303 Updating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/bin/lava-installed-packages (oe)
125 07:41:05.027440 Creating /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/environment
126 07:41:05.027551 LAVA metadata
127 07:41:05.027628 - LAVA_JOB_ID=12435208
128 07:41:05.027695 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:41:05.027798 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 07:41:05.027869 skipped lava-vland-overlay
131 07:41:05.027944 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:41:05.028025 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 07:41:05.028088 skipped lava-multinode-overlay
134 07:41:05.028163 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:41:05.028249 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 07:41:05.028325 Loading test definitions
137 07:41:05.028428 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 07:41:05.028507 Using /lava-12435208 at stage 0
139 07:41:05.028835 uuid=12435208_1.4.2.3.1 testdef=None
140 07:41:05.028924 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:41:05.029017 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 07:41:05.029553 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:41:05.029780 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 07:41:05.030436 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:41:05.030720 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 07:41:05.031469 runner path: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/0/tests/0_dmesg test_uuid 12435208_1.4.2.3.1
149 07:41:05.031627 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:41:05.031859 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 07:41:05.031933 Using /lava-12435208 at stage 1
153 07:41:05.032253 uuid=12435208_1.4.2.3.5 testdef=None
154 07:41:05.032342 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 07:41:05.032427 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 07:41:05.032914 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 07:41:05.033150 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 07:41:05.033952 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 07:41:05.034339 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 07:41:05.035142 runner path: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/1/tests/1_bootrr test_uuid 12435208_1.4.2.3.5
163 07:41:05.035301 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 07:41:05.035513 Creating lava-test-runner.conf files
166 07:41:05.035579 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/0 for stage 0
167 07:41:05.035699 - 0_dmesg
168 07:41:05.035780 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435208/lava-overlay-yckzx_gw/lava-12435208/1 for stage 1
169 07:41:05.035873 - 1_bootrr
170 07:41:05.035969 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 07:41:05.036056 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 07:41:05.044878 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 07:41:05.044988 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 07:41:05.045076 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 07:41:05.045164 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 07:41:05.045254 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 07:41:05.314574 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 07:41:05.314962 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 07:41:05.315083 extracting modules file /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435208/extract-overlay-ramdisk-xicbf_yh/ramdisk
180 07:41:05.328556 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 07:41:05.328694 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 07:41:05.328791 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435208/compress-overlay-pg4beiwx/overlay-1.4.2.4.tar.gz to ramdisk
183 07:41:05.328867 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435208/compress-overlay-pg4beiwx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435208/extract-overlay-ramdisk-xicbf_yh/ramdisk
184 07:41:05.337907 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 07:41:05.338030 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 07:41:05.338123 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 07:41:05.338213 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 07:41:05.338294 Building ramdisk /var/lib/lava/dispatcher/tmp/12435208/extract-overlay-ramdisk-xicbf_yh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435208/extract-overlay-ramdisk-xicbf_yh/ramdisk
189 07:41:05.508675 >> 49790 blocks
190 07:41:06.433191 rename /var/lib/lava/dispatcher/tmp/12435208/extract-overlay-ramdisk-xicbf_yh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
191 07:41:06.433694 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 07:41:06.433831 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 07:41:06.433979 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 07:41:06.434121 No mkimage arch provided, not using FIT.
195 07:41:06.434249 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 07:41:06.434394 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 07:41:06.434539 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 07:41:06.434680 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 07:41:06.434788 No LXC device requested
200 07:41:06.434902 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 07:41:06.435040 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 07:41:06.435166 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 07:41:06.435290 Checking files for TFTP limit of 4294967296 bytes.
204 07:41:06.435842 end: 1 tftp-deploy (duration 00:00:02) [common]
205 07:41:06.435997 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 07:41:06.436126 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 07:41:06.436296 substitutions:
208 07:41:06.436406 - {DTB}: None
209 07:41:06.436502 - {INITRD}: 12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
210 07:41:06.436607 - {KERNEL}: 12435208/tftp-deploy-hjty0v4c/kernel/bzImage
211 07:41:06.436705 - {LAVA_MAC}: None
212 07:41:06.436803 - {PRESEED_CONFIG}: None
213 07:41:06.436896 - {PRESEED_LOCAL}: None
214 07:41:06.437002 - {RAMDISK}: 12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
215 07:41:06.437092 - {ROOT_PART}: None
216 07:41:06.437184 - {ROOT}: None
217 07:41:06.437275 - {SERVER_IP}: 192.168.201.1
218 07:41:06.437362 - {TEE}: None
219 07:41:06.437460 Parsed boot commands:
220 07:41:06.437554 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 07:41:06.437788 Parsed boot commands: tftpboot 192.168.201.1 12435208/tftp-deploy-hjty0v4c/kernel/bzImage 12435208/tftp-deploy-hjty0v4c/kernel/cmdline 12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
222 07:41:06.437923 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 07:41:06.438047 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 07:41:06.438188 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 07:41:06.438312 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 07:41:06.438428 Not connected, no need to disconnect.
227 07:41:06.438557 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 07:41:06.438694 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 07:41:06.438794 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-9'
230 07:41:06.442671 Setting prompt string to ['lava-test: # ']
231 07:41:06.443046 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 07:41:06.443196 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 07:41:06.443336 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 07:41:06.443470 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 07:41:06.443817 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
236 07:41:11.580632 >> Command sent successfully.
237 07:41:11.583414 Returned 0 in 5 seconds
238 07:41:11.683796 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 07:41:11.684129 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 07:41:11.684230 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 07:41:11.684321 Setting prompt string to 'Starting depthcharge on Magolor...'
243 07:41:11.684391 Changing prompt to 'Starting depthcharge on Magolor...'
244 07:41:11.684463 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 07:41:11.684731 [Enter `^Ec?' for help]
246 07:41:12.829015
247 07:41:12.829193
248 07:41:12.839800 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 07:41:12.842938 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 07:41:12.846149 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 07:41:12.852977 CPU: AES supported, TXT NOT supported, VT supported
252 07:41:12.856005 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 07:41:12.862857 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 07:41:12.865997 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 07:41:12.869447 VBOOT: Loading verstage.
256 07:41:12.876242 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 07:41:12.879669 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 07:41:12.886613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 07:41:12.889871 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 07:41:12.893471
261 07:41:12.893574
262 07:41:12.903412 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 07:41:12.917545 Probing TPM: . done!
264 07:41:12.921016 TPM ready after 0 ms
265 07:41:12.924165 Connected to device vid:did:rid of 1ae0:0028:00
266 07:41:12.935810 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 07:41:12.942056 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 07:41:12.945827 Initialized TPM device CR50 revision 0
269 07:41:13.000380 tlcl_send_startup: Startup return code is 0
270 07:41:13.000524 TPM: setup succeeded
271 07:41:13.015698 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 07:41:13.029608 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 07:41:13.044485 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 07:41:13.055336 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 07:41:13.058909 Chrome EC: UHEPI supported
276 07:41:13.062970 Phase 1
277 07:41:13.066800 FMAP: area GBB found @ c05000 (12288 bytes)
278 07:41:13.073013 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 07:41:13.079620 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 07:41:13.083602 Recovery requested (1009000e)
281 07:41:13.088340 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 07:41:13.097584 tlcl_extend: response is 0
283 07:41:13.104289 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 07:41:13.113399 tlcl_extend: response is 0
285 07:41:13.120011 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 07:41:13.123752 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 07:41:13.130395 BS: verstage times (exec / console): total (unknown) / 124 ms
288 07:41:13.130509
289 07:41:13.133451
290 07:41:13.144390 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 07:41:13.147436 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 07:41:13.154366 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 07:41:13.157560 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 07:41:13.160564 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 07:41:13.167201 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 07:41:13.170850 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 07:41:13.174033 TCO_STS: 0000 0001
298 07:41:13.177280 GEN_PMCON: d0015038 00002200
299 07:41:13.180754 GBLRST_CAUSE: 00000000 00000000
300 07:41:13.180862 prev_sleep_state 5
301 07:41:13.183934 Boot Count incremented to 7769
302 07:41:13.190635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 07:41:13.193855 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 07:41:13.197875 Chrome EC: UHEPI supported
305 07:41:13.204235 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 07:41:13.210555 Probing TPM: done!
307 07:41:13.217284 Connected to device vid:did:rid of 1ae0:0028:00
308 07:41:13.227190 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 07:41:13.231035 Initialized TPM device CR50 revision 0
310 07:41:13.246430 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 07:41:13.249756 MRC: Hash idx 0x100b comparison successful.
312 07:41:13.252915 MRC cache found, size 5458
313 07:41:13.256944 bootmode is set to: 2
314 07:41:13.257051 SPD INDEX = 0
315 07:41:13.263846 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 07:41:13.263967 SPD: module type is LPDDR4X
317 07:41:13.270608 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 07:41:13.277579 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 07:41:13.280773 SPD: device width 16 bits, bus width 32 bits
320 07:41:13.283896 SPD: module size is 4096 MB (per channel)
321 07:41:13.290722 meminit_channels: DRAM half-populated
322 07:41:13.371818 CBMEM:
323 07:41:13.374816 IMD: root @ 0x76fff000 254 entries.
324 07:41:13.378349 IMD: root @ 0x76ffec00 62 entries.
325 07:41:13.381458 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 07:41:13.388261 WARNING: RO_VPD is uninitialized or empty.
327 07:41:13.391402 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 07:41:13.395006 External stage cache:
329 07:41:13.398544 IMD: root @ 0x7b3ff000 254 entries.
330 07:41:13.401650 IMD: root @ 0x7b3fec00 62 entries.
331 07:41:13.411444 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 07:41:13.418135 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 07:41:13.424851 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 07:41:13.433282 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 07:41:13.436439 cse_lite: Skip switching to RW in the recovery path
336 07:41:13.440012 1 DIMMs found
337 07:41:13.440121 SMM Memory Map
338 07:41:13.443134 SMRAM : 0x7b000000 0x800000
339 07:41:13.446241 Subregion 0: 0x7b000000 0x200000
340 07:41:13.449962 Subregion 1: 0x7b200000 0x200000
341 07:41:13.456336 Subregion 2: 0x7b400000 0x400000
342 07:41:13.456448 top_of_ram = 0x77000000
343 07:41:13.463266 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 07:41:13.469671 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 07:41:13.472851 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 07:41:13.479490 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 07:41:13.482526 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 07:41:13.495062 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 07:41:13.501259 Processing 188 relocs. Offset value of 0x74c0e000
350 07:41:13.508434 BS: romstage times (exec / console): total (unknown) / 255 ms
351 07:41:13.512803
352 07:41:13.512908
353 07:41:13.522902 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 07:41:13.529505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 07:41:13.532721 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 07:41:13.539194 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 07:41:13.595415 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 07:41:13.602306 Processing 4805 relocs. Offset value of 0x75da8000
359 07:41:13.608591 BS: postcar times (exec / console): total (unknown) / 42 ms
360 07:41:13.608729
361 07:41:13.608830
362 07:41:13.618752 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 07:41:13.618851 Normal boot
364 07:41:13.622445 EC returned error result code 3
365 07:41:13.626115 FW_CONFIG value is 0x204
366 07:41:13.629043 GENERIC: 0.0 disabled by fw_config
367 07:41:13.635606 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 07:41:13.639404 I2C: 00:10 disabled by fw_config
369 07:41:13.642500 I2C: 00:10 disabled by fw_config
370 07:41:13.645783 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 07:41:13.652388 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 07:41:13.655483 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 07:41:13.662211 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 07:41:13.665645 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 07:41:13.668803 I2C: 00:10 disabled by fw_config
376 07:41:13.675425 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 07:41:13.681792 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 07:41:13.685485 I2C: 00:1a disabled by fw_config
379 07:41:13.688406 I2C: 00:1a disabled by fw_config
380 07:41:13.695154 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 07:41:13.698816 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 07:41:13.701995 GENERIC: 0.0 disabled by fw_config
383 07:41:13.708243 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 07:41:13.711668 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 07:41:13.718463 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 07:41:13.721698 microcode: Update skipped, already up-to-date
387 07:41:13.728362 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 07:41:13.754735 Detected 2 core, 2 thread CPU.
389 07:41:13.757745 Setting up SMI for CPU
390 07:41:13.761191 IED base = 0x7b400000
391 07:41:13.761305 IED size = 0x00400000
392 07:41:13.764045 Will perform SMM setup.
393 07:41:13.767678 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 07:41:13.777456 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 07:41:13.780947 Processing 16 relocs. Offset value of 0x00030000
396 07:41:13.784395 Attempting to start 1 APs
397 07:41:13.787709 Waiting for 10ms after sending INIT.
398 07:41:13.804110 Waiting for 1st SIPI to complete...done.
399 07:41:13.804239 AP: slot 1 apic_id 2.
400 07:41:13.810765 Waiting for 2nd SIPI to complete...done.
401 07:41:13.817279 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 07:41:13.824142 Processing 13 relocs. Offset value of 0x00038000
403 07:41:13.824328 Unable to locate Global NVS
404 07:41:13.833996 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 07:41:13.837092 Installing permanent SMM handler to 0x7b000000
406 07:41:13.846996 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 07:41:13.850632 Processing 704 relocs. Offset value of 0x7b010000
408 07:41:13.857069 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 07:41:13.863920 Processing 13 relocs. Offset value of 0x7b008000
410 07:41:13.870639 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 07:41:13.873789 Unable to locate Global NVS
412 07:41:13.880515 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 07:41:13.883547 Clearing SMI status registers
414 07:41:13.883660 SMI_STS: PM1
415 07:41:13.886894 PM1_STS: PWRBTN
416 07:41:13.887003 TCO_STS: INTRD_DET
417 07:41:13.890140 GPE0 STD STS:
418 07:41:13.896835 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 07:41:13.900402 In relocation handler: CPU 0
420 07:41:13.903441 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 07:41:13.910376 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 07:41:13.910488 Relocation complete.
423 07:41:13.917310 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 07:41:13.920210 In relocation handler: CPU 1
425 07:41:13.924200 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 07:41:13.931537 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 07:41:13.931652 Relocation complete.
428 07:41:13.935267 Initializing CPU #0
429 07:41:13.938282 CPU: vendor Intel device 906c0
430 07:41:13.941994 CPU: family 06, model 9c, stepping 00
431 07:41:13.944997 Clearing out pending MCEs
432 07:41:13.948091 Setting up local APIC...
433 07:41:13.948199 apic_id: 0x00 done.
434 07:41:13.951686 Turbo is available but hidden
435 07:41:13.954710 Turbo is available and visible
436 07:41:13.958234 microcode: Update skipped, already up-to-date
437 07:41:13.961588 CPU #0 initialized
438 07:41:13.964594 Initializing CPU #1
439 07:41:13.968158 CPU: vendor Intel device 906c0
440 07:41:13.971441 CPU: family 06, model 9c, stepping 00
441 07:41:13.974834 Clearing out pending MCEs
442 07:41:13.974956 Setting up local APIC...
443 07:41:13.978160 apic_id: 0x02 done.
444 07:41:13.981367 microcode: Update skipped, already up-to-date
445 07:41:13.984884 CPU #1 initialized
446 07:41:13.987993 bsp_do_flight_plan done after 175 msecs.
447 07:41:13.991511 CPU: frequency set to 2800 MHz
448 07:41:13.994659 Enabling SMIs.
449 07:41:14.000901 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 289 ms
450 07:41:14.009851 Probing TPM: done!
451 07:41:14.016766 Connected to device vid:did:rid of 1ae0:0028:00
452 07:41:14.026742 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 07:41:14.029947 Initialized TPM device CR50 revision 0
454 07:41:14.033562 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 07:41:14.040422 Found a VBT of 7680 bytes after decompression
456 07:41:14.047171 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 07:41:14.082203 Detected 2 core, 2 thread CPU.
458 07:41:14.085434 Detected 2 core, 2 thread CPU.
459 07:41:14.447228 Display FSP Version Info HOB
460 07:41:14.450362 Reference Code - CPU = 8.7.22.30
461 07:41:14.453713 uCode Version = 24.0.0.1f
462 07:41:14.456700 TXT ACM version = ff.ff.ff.ffff
463 07:41:14.460611 Reference Code - ME = 8.7.22.30
464 07:41:14.463462 MEBx version = 0.0.0.0
465 07:41:14.466558 ME Firmware Version = Consumer SKU
466 07:41:14.470141 Reference Code - PCH = 8.7.22.30
467 07:41:14.473251 PCH-CRID Status = Disabled
468 07:41:14.476606 PCH-CRID Original Value = ff.ff.ff.ffff
469 07:41:14.480183 PCH-CRID New Value = ff.ff.ff.ffff
470 07:41:14.483269 OPROM - RST - RAID = ff.ff.ff.ffff
471 07:41:14.486884 PCH Hsio Version = 4.0.0.0
472 07:41:14.490054 Reference Code - SA - System Agent = 8.7.22.30
473 07:41:14.493242 Reference Code - MRC = 0.0.4.68
474 07:41:14.496526 SA - PCIe Version = 8.7.22.30
475 07:41:14.499975 SA-CRID Status = Disabled
476 07:41:14.503111 SA-CRID Original Value = 0.0.0.0
477 07:41:14.507137 SA-CRID New Value = 0.0.0.0
478 07:41:14.510848 OPROM - VBIOS = ff.ff.ff.ffff
479 07:41:14.514407 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 07:41:14.517915 PHY Build Version = ff.ff.ff.ffff
481 07:41:14.521016 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 07:41:14.528373 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 07:41:14.531668 ITSS IRQ Polarities Before:
484 07:41:14.531788 IPC0: 0xffffffff
485 07:41:14.534793 IPC1: 0xffffffff
486 07:41:14.534897 IPC2: 0xffffffff
487 07:41:14.538289 IPC3: 0xffffffff
488 07:41:14.541598 ITSS IRQ Polarities After:
489 07:41:14.541692 IPC0: 0xffffffff
490 07:41:14.544970 IPC1: 0xffffffff
491 07:41:14.545080 IPC2: 0xffffffff
492 07:41:14.548415 IPC3: 0xffffffff
493 07:41:14.558078 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 07:41:14.565081 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
495 07:41:14.567984 Enumerating buses...
496 07:41:14.571707 Show all devs... Before device enumeration.
497 07:41:14.574740 Root Device: enabled 1
498 07:41:14.578061 CPU_CLUSTER: 0: enabled 1
499 07:41:14.578229 DOMAIN: 0000: enabled 1
500 07:41:14.581086 PCI: 00:00.0: enabled 1
501 07:41:14.584643 PCI: 00:02.0: enabled 1
502 07:41:14.587678 PCI: 00:04.0: enabled 1
503 07:41:14.587818 PCI: 00:05.0: enabled 1
504 07:41:14.591433 PCI: 00:09.0: enabled 0
505 07:41:14.594655 PCI: 00:12.6: enabled 0
506 07:41:14.597657 PCI: 00:14.0: enabled 1
507 07:41:14.597776 PCI: 00:14.1: enabled 0
508 07:41:14.601266 PCI: 00:14.2: enabled 0
509 07:41:14.604390 PCI: 00:14.3: enabled 1
510 07:41:14.607484 PCI: 00:14.5: enabled 1
511 07:41:14.607601 PCI: 00:15.0: enabled 1
512 07:41:14.610956 PCI: 00:15.1: enabled 1
513 07:41:14.614549 PCI: 00:15.2: enabled 1
514 07:41:14.617602 PCI: 00:15.3: enabled 1
515 07:41:14.617747 PCI: 00:16.0: enabled 1
516 07:41:14.620761 PCI: 00:16.1: enabled 0
517 07:41:14.624380 PCI: 00:16.4: enabled 0
518 07:41:14.624505 PCI: 00:16.5: enabled 0
519 07:41:14.627633 PCI: 00:17.0: enabled 0
520 07:41:14.630692 PCI: 00:19.0: enabled 1
521 07:41:14.634102 PCI: 00:19.1: enabled 0
522 07:41:14.634220 PCI: 00:19.2: enabled 1
523 07:41:14.637627 PCI: 00:1a.0: enabled 1
524 07:41:14.640658 PCI: 00:1c.0: enabled 0
525 07:41:14.644067 PCI: 00:1c.1: enabled 0
526 07:41:14.644176 PCI: 00:1c.2: enabled 0
527 07:41:14.647480 PCI: 00:1c.3: enabled 0
528 07:41:14.650697 PCI: 00:1c.4: enabled 0
529 07:41:14.654333 PCI: 00:1c.5: enabled 0
530 07:41:14.654440 PCI: 00:1c.6: enabled 0
531 07:41:14.657274 PCI: 00:1c.7: enabled 1
532 07:41:14.660827 PCI: 00:1e.0: enabled 0
533 07:41:14.664135 PCI: 00:1e.1: enabled 0
534 07:41:14.664251 PCI: 00:1e.2: enabled 1
535 07:41:14.667422 PCI: 00:1e.3: enabled 0
536 07:41:14.670466 PCI: 00:1f.0: enabled 1
537 07:41:14.670576 PCI: 00:1f.1: enabled 1
538 07:41:14.674007 PCI: 00:1f.2: enabled 1
539 07:41:14.676974 PCI: 00:1f.3: enabled 1
540 07:41:14.680716 PCI: 00:1f.4: enabled 0
541 07:41:14.680827 PCI: 00:1f.5: enabled 1
542 07:41:14.683903 PCI: 00:1f.7: enabled 0
543 07:41:14.687172 GENERIC: 0.0: enabled 1
544 07:41:14.690845 GENERIC: 0.0: enabled 1
545 07:41:14.690948 USB0 port 0: enabled 1
546 07:41:14.693954 GENERIC: 0.0: enabled 1
547 07:41:14.696940 I2C: 00:2c: enabled 1
548 07:41:14.697046 I2C: 00:15: enabled 1
549 07:41:14.700598 GENERIC: 0.0: enabled 0
550 07:41:14.703690 I2C: 00:15: enabled 1
551 07:41:14.703797 I2C: 00:10: enabled 0
552 07:41:14.707172 I2C: 00:10: enabled 0
553 07:41:14.710251 I2C: 00:2c: enabled 1
554 07:41:14.710362 I2C: 00:40: enabled 1
555 07:41:14.713896 I2C: 00:10: enabled 1
556 07:41:14.717279 I2C: 00:39: enabled 1
557 07:41:14.717389 I2C: 00:36: enabled 1
558 07:41:14.720370 I2C: 00:10: enabled 0
559 07:41:14.723903 I2C: 00:0c: enabled 1
560 07:41:14.726931 I2C: 00:50: enabled 1
561 07:41:14.727039 I2C: 00:1a: enabled 1
562 07:41:14.730690 I2C: 00:1a: enabled 0
563 07:41:14.733776 I2C: 00:1a: enabled 0
564 07:41:14.733883 I2C: 00:28: enabled 1
565 07:41:14.736882 I2C: 00:29: enabled 1
566 07:41:14.740163 PCI: 00:00.0: enabled 1
567 07:41:14.740270 SPI: 00: enabled 1
568 07:41:14.743613 PNP: 0c09.0: enabled 1
569 07:41:14.747248 GENERIC: 0.0: enabled 0
570 07:41:14.747358 USB2 port 0: enabled 1
571 07:41:14.750208 USB2 port 1: enabled 1
572 07:41:14.753662 USB2 port 2: enabled 1
573 07:41:14.753787 USB2 port 3: enabled 1
574 07:41:14.756677 USB2 port 4: enabled 0
575 07:41:14.760174 USB2 port 5: enabled 1
576 07:41:14.763177 USB2 port 6: enabled 0
577 07:41:14.763281 USB2 port 7: enabled 1
578 07:41:14.766893 USB3 port 0: enabled 1
579 07:41:14.770041 USB3 port 1: enabled 1
580 07:41:14.770143 USB3 port 2: enabled 1
581 07:41:14.773161 USB3 port 3: enabled 1
582 07:41:14.776626 APIC: 00: enabled 1
583 07:41:14.776780 APIC: 02: enabled 1
584 07:41:14.779710 Compare with tree...
585 07:41:14.783387 Root Device: enabled 1
586 07:41:14.786380 CPU_CLUSTER: 0: enabled 1
587 07:41:14.786503 APIC: 00: enabled 1
588 07:41:14.789968 APIC: 02: enabled 1
589 07:41:14.793034 DOMAIN: 0000: enabled 1
590 07:41:14.793153 PCI: 00:00.0: enabled 1
591 07:41:14.796629 PCI: 00:02.0: enabled 1
592 07:41:14.799856 PCI: 00:04.0: enabled 1
593 07:41:14.803369 GENERIC: 0.0: enabled 1
594 07:41:14.806627 PCI: 00:05.0: enabled 1
595 07:41:14.806790 GENERIC: 0.0: enabled 1
596 07:41:14.809721 PCI: 00:09.0: enabled 0
597 07:41:14.813314 PCI: 00:12.6: enabled 0
598 07:41:14.816345 PCI: 00:14.0: enabled 1
599 07:41:14.819807 USB0 port 0: enabled 1
600 07:41:14.819921 USB2 port 0: enabled 1
601 07:41:14.823242 USB2 port 1: enabled 1
602 07:41:14.826354 USB2 port 2: enabled 1
603 07:41:14.829862 USB2 port 3: enabled 1
604 07:41:14.833030 USB2 port 4: enabled 0
605 07:41:14.836114 USB2 port 5: enabled 1
606 07:41:14.836219 USB2 port 6: enabled 0
607 07:41:14.839298 USB2 port 7: enabled 1
608 07:41:14.843016 USB3 port 0: enabled 1
609 07:41:14.846127 USB3 port 1: enabled 1
610 07:41:14.849468 USB3 port 2: enabled 1
611 07:41:14.852735 USB3 port 3: enabled 1
612 07:41:14.852845 PCI: 00:14.1: enabled 0
613 07:41:14.856228 PCI: 00:14.2: enabled 0
614 07:41:14.859116 PCI: 00:14.3: enabled 1
615 07:41:14.862419 GENERIC: 0.0: enabled 1
616 07:41:14.866034 PCI: 00:14.5: enabled 1
617 07:41:14.866149 PCI: 00:15.0: enabled 1
618 07:41:14.869113 I2C: 00:2c: enabled 1
619 07:41:14.872400 I2C: 00:15: enabled 1
620 07:41:14.875592 PCI: 00:15.1: enabled 1
621 07:41:14.875705 PCI: 00:15.2: enabled 1
622 07:41:14.879159 GENERIC: 0.0: enabled 0
623 07:41:14.882181 I2C: 00:15: enabled 1
624 07:41:14.885701 I2C: 00:10: enabled 0
625 07:41:14.888813 I2C: 00:10: enabled 0
626 07:41:14.888924 I2C: 00:2c: enabled 1
627 07:41:14.892402 I2C: 00:40: enabled 1
628 07:41:14.895468 I2C: 00:10: enabled 1
629 07:41:14.898859 I2C: 00:39: enabled 1
630 07:41:14.898980 PCI: 00:15.3: enabled 1
631 07:41:14.902107 I2C: 00:36: enabled 1
632 07:41:14.905765 I2C: 00:10: enabled 0
633 07:41:14.909057 I2C: 00:0c: enabled 1
634 07:41:14.909169 I2C: 00:50: enabled 1
635 07:41:14.912167 PCI: 00:16.0: enabled 1
636 07:41:14.915617 PCI: 00:16.1: enabled 0
637 07:41:14.918673 PCI: 00:16.4: enabled 0
638 07:41:14.921915 PCI: 00:16.5: enabled 0
639 07:41:14.921997 PCI: 00:17.0: enabled 0
640 07:41:14.925421 PCI: 00:19.0: enabled 1
641 07:41:14.928727 I2C: 00:1a: enabled 1
642 07:41:14.932144 I2C: 00:1a: enabled 0
643 07:41:14.935211 I2C: 00:1a: enabled 0
644 07:41:14.935330 I2C: 00:28: enabled 1
645 07:41:14.938923 I2C: 00:29: enabled 1
646 07:41:14.941942 PCI: 00:19.1: enabled 0
647 07:41:14.945208 PCI: 00:19.2: enabled 1
648 07:41:14.945325 PCI: 00:1a.0: enabled 1
649 07:41:14.948826 PCI: 00:1e.0: enabled 0
650 07:41:14.951819 PCI: 00:1e.1: enabled 0
651 07:41:14.955387 PCI: 00:1e.2: enabled 1
652 07:41:14.955505 SPI: 00: enabled 1
653 07:41:14.958480 PCI: 00:1e.3: enabled 0
654 07:41:14.961893 PCI: 00:1f.0: enabled 1
655 07:41:14.965186 PNP: 0c09.0: enabled 1
656 07:41:14.968699 PCI: 00:1f.1: enabled 1
657 07:41:14.968817 PCI: 00:1f.2: enabled 1
658 07:41:14.972104 PCI: 00:1f.3: enabled 1
659 07:41:14.975014 GENERIC: 0.0: enabled 0
660 07:41:14.978635 PCI: 00:1f.4: enabled 0
661 07:41:14.981694 PCI: 00:1f.5: enabled 1
662 07:41:14.981775 PCI: 00:1f.7: enabled 0
663 07:41:14.984770 Root Device scanning...
664 07:41:14.988347 scan_static_bus for Root Device
665 07:41:14.991472 CPU_CLUSTER: 0 enabled
666 07:41:14.994736 DOMAIN: 0000 enabled
667 07:41:14.994845 DOMAIN: 0000 scanning...
668 07:41:14.998407 PCI: pci_scan_bus for bus 00
669 07:41:15.001450 PCI: 00:00.0 [8086/0000] ops
670 07:41:15.004876 PCI: 00:00.0 [8086/4e22] enabled
671 07:41:15.008099 PCI: 00:02.0 [8086/0000] bus ops
672 07:41:15.011474 PCI: 00:02.0 [8086/4e55] enabled
673 07:41:15.015048 PCI: 00:04.0 [8086/0000] bus ops
674 07:41:15.018236 PCI: 00:04.0 [8086/4e03] enabled
675 07:41:15.021802 PCI: 00:05.0 [8086/0000] bus ops
676 07:41:15.025020 PCI: 00:05.0 [8086/4e19] enabled
677 07:41:15.028250 PCI: 00:08.0 [8086/4e11] enabled
678 07:41:15.031750 PCI: 00:14.0 [8086/0000] bus ops
679 07:41:15.034608 PCI: 00:14.0 [8086/4ded] enabled
680 07:41:15.038199 PCI: 00:14.2 [8086/4def] disabled
681 07:41:15.041654 PCI: 00:14.3 [8086/0000] bus ops
682 07:41:15.044857 PCI: 00:14.3 [8086/4df0] enabled
683 07:41:15.047907 PCI: 00:14.5 [8086/0000] ops
684 07:41:15.051508 PCI: 00:14.5 [8086/4df8] enabled
685 07:41:15.054720 PCI: 00:15.0 [8086/0000] bus ops
686 07:41:15.057776 PCI: 00:15.0 [8086/4de8] enabled
687 07:41:15.061234 PCI: 00:15.1 [8086/0000] bus ops
688 07:41:15.064897 PCI: 00:15.1 [8086/4de9] enabled
689 07:41:15.067966 PCI: 00:15.2 [8086/0000] bus ops
690 07:41:15.071093 PCI: 00:15.2 [8086/4dea] enabled
691 07:41:15.074885 PCI: 00:15.3 [8086/0000] bus ops
692 07:41:15.078032 PCI: 00:15.3 [8086/4deb] enabled
693 07:41:15.081427 PCI: 00:16.0 [8086/0000] ops
694 07:41:15.084553 PCI: 00:16.0 [8086/4de0] enabled
695 07:41:15.087755 PCI: 00:19.0 [8086/0000] bus ops
696 07:41:15.091249 PCI: 00:19.0 [8086/4dc5] enabled
697 07:41:15.094239 PCI: 00:19.2 [8086/0000] ops
698 07:41:15.097887 PCI: 00:19.2 [8086/4dc7] enabled
699 07:41:15.101032 PCI: 00:1a.0 [8086/0000] ops
700 07:41:15.104499 PCI: 00:1a.0 [8086/4dc4] enabled
701 07:41:15.107619 PCI: 00:1e.0 [8086/0000] ops
702 07:41:15.110836 PCI: 00:1e.0 [8086/4da8] disabled
703 07:41:15.114439 PCI: 00:1e.2 [8086/0000] bus ops
704 07:41:15.117481 PCI: 00:1e.2 [8086/4daa] enabled
705 07:41:15.121061 PCI: 00:1f.0 [8086/0000] bus ops
706 07:41:15.124474 PCI: 00:1f.0 [8086/4d87] enabled
707 07:41:15.127653 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 07:41:15.130854 RTC Init
709 07:41:15.134011 Set power on after power failure.
710 07:41:15.134119 Disabling Deep S3
711 07:41:15.137672 Disabling Deep S3
712 07:41:15.137779 Disabling Deep S4
713 07:41:15.141029 Disabling Deep S4
714 07:41:15.144087 Disabling Deep S5
715 07:41:15.144200 Disabling Deep S5
716 07:41:15.147767 PCI: 00:1f.2 [0000/0000] hidden
717 07:41:15.150852 PCI: 00:1f.3 [8086/0000] bus ops
718 07:41:15.153944 PCI: 00:1f.3 [8086/4dc8] enabled
719 07:41:15.157485 PCI: 00:1f.5 [8086/0000] bus ops
720 07:41:15.160576 PCI: 00:1f.5 [8086/4da4] enabled
721 07:41:15.164269 PCI: Leftover static devices:
722 07:41:15.164387 PCI: 00:12.6
723 07:41:15.167495 PCI: 00:09.0
724 07:41:15.167607 PCI: 00:14.1
725 07:41:15.170503 PCI: 00:16.1
726 07:41:15.170614 PCI: 00:16.4
727 07:41:15.170736 PCI: 00:16.5
728 07:41:15.174120 PCI: 00:17.0
729 07:41:15.174227 PCI: 00:19.1
730 07:41:15.177433 PCI: 00:1e.1
731 07:41:15.177538 PCI: 00:1e.3
732 07:41:15.180493 PCI: 00:1f.1
733 07:41:15.180605 PCI: 00:1f.4
734 07:41:15.180707 PCI: 00:1f.7
735 07:41:15.184060 PCI: Check your devicetree.cb.
736 07:41:15.186997 PCI: 00:02.0 scanning...
737 07:41:15.190865 scan_generic_bus for PCI: 00:02.0
738 07:41:15.195387 scan_generic_bus for PCI: 00:02.0 done
739 07:41:15.198726 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 07:41:15.201733 PCI: 00:04.0 scanning...
741 07:41:15.205214 scan_generic_bus for PCI: 00:04.0
742 07:41:15.208235 GENERIC: 0.0 enabled
743 07:41:15.214945 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 07:41:15.218163 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 07:41:15.221692 PCI: 00:05.0 scanning...
746 07:41:15.224893 scan_generic_bus for PCI: 00:05.0
747 07:41:15.228227 GENERIC: 0.0 enabled
748 07:41:15.231413 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 07:41:15.238252 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 07:41:15.241389 PCI: 00:14.0 scanning...
751 07:41:15.244810 scan_static_bus for PCI: 00:14.0
752 07:41:15.244918 USB0 port 0 enabled
753 07:41:15.248057 USB0 port 0 scanning...
754 07:41:15.251678 scan_static_bus for USB0 port 0
755 07:41:15.254841 USB2 port 0 enabled
756 07:41:15.254964 USB2 port 1 enabled
757 07:41:15.258014 USB2 port 2 enabled
758 07:41:15.261227 USB2 port 3 enabled
759 07:41:15.261350 USB2 port 4 disabled
760 07:41:15.264793 USB2 port 5 enabled
761 07:41:15.264877 USB2 port 6 disabled
762 07:41:15.267928 USB2 port 7 enabled
763 07:41:15.271462 USB3 port 0 enabled
764 07:41:15.271542 USB3 port 1 enabled
765 07:41:15.274423 USB3 port 2 enabled
766 07:41:15.277596 USB3 port 3 enabled
767 07:41:15.277703 USB2 port 0 scanning...
768 07:41:15.281233 scan_static_bus for USB2 port 0
769 07:41:15.284380 scan_static_bus for USB2 port 0 done
770 07:41:15.291175 scan_bus: bus USB2 port 0 finished in 6 msecs
771 07:41:15.294203 USB2 port 1 scanning...
772 07:41:15.297698 scan_static_bus for USB2 port 1
773 07:41:15.300937 scan_static_bus for USB2 port 1 done
774 07:41:15.304296 scan_bus: bus USB2 port 1 finished in 6 msecs
775 07:41:15.307773 USB2 port 2 scanning...
776 07:41:15.311117 scan_static_bus for USB2 port 2
777 07:41:15.314415 scan_static_bus for USB2 port 2 done
778 07:41:15.317567 scan_bus: bus USB2 port 2 finished in 6 msecs
779 07:41:15.320770 USB2 port 3 scanning...
780 07:41:15.324580 scan_static_bus for USB2 port 3
781 07:41:15.327690 scan_static_bus for USB2 port 3 done
782 07:41:15.334196 scan_bus: bus USB2 port 3 finished in 6 msecs
783 07:41:15.334314 USB2 port 5 scanning...
784 07:41:15.337319 scan_static_bus for USB2 port 5
785 07:41:15.340481 scan_static_bus for USB2 port 5 done
786 07:41:15.347139 scan_bus: bus USB2 port 5 finished in 6 msecs
787 07:41:15.350347 USB2 port 7 scanning...
788 07:41:15.353738 scan_static_bus for USB2 port 7
789 07:41:15.357007 scan_static_bus for USB2 port 7 done
790 07:41:15.360731 scan_bus: bus USB2 port 7 finished in 6 msecs
791 07:41:15.363940 USB3 port 0 scanning...
792 07:41:15.366893 scan_static_bus for USB3 port 0
793 07:41:15.370431 scan_static_bus for USB3 port 0 done
794 07:41:15.373538 scan_bus: bus USB3 port 0 finished in 6 msecs
795 07:41:15.376897 USB3 port 1 scanning...
796 07:41:15.380083 scan_static_bus for USB3 port 1
797 07:41:15.383729 scan_static_bus for USB3 port 1 done
798 07:41:15.389926 scan_bus: bus USB3 port 1 finished in 6 msecs
799 07:41:15.390038 USB3 port 2 scanning...
800 07:41:15.393644 scan_static_bus for USB3 port 2
801 07:41:15.400212 scan_static_bus for USB3 port 2 done
802 07:41:15.403314 scan_bus: bus USB3 port 2 finished in 6 msecs
803 07:41:15.406413 USB3 port 3 scanning...
804 07:41:15.409857 scan_static_bus for USB3 port 3
805 07:41:15.413415 scan_static_bus for USB3 port 3 done
806 07:41:15.416457 scan_bus: bus USB3 port 3 finished in 6 msecs
807 07:41:15.419635 scan_static_bus for USB0 port 0 done
808 07:41:15.426517 scan_bus: bus USB0 port 0 finished in 172 msecs
809 07:41:15.429752 scan_static_bus for PCI: 00:14.0 done
810 07:41:15.433219 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
811 07:41:15.436268 PCI: 00:14.3 scanning...
812 07:41:15.439900 scan_static_bus for PCI: 00:14.3
813 07:41:15.442752 GENERIC: 0.0 enabled
814 07:41:15.446436 scan_static_bus for PCI: 00:14.3 done
815 07:41:15.449556 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 07:41:15.453027 PCI: 00:15.0 scanning...
817 07:41:15.456194 scan_static_bus for PCI: 00:15.0
818 07:41:15.459852 I2C: 00:2c enabled
819 07:41:15.459964 I2C: 00:15 enabled
820 07:41:15.466130 scan_static_bus for PCI: 00:15.0 done
821 07:41:15.469443 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
822 07:41:15.472738 PCI: 00:15.1 scanning...
823 07:41:15.475934 scan_static_bus for PCI: 00:15.1
824 07:41:15.479014 scan_static_bus for PCI: 00:15.1 done
825 07:41:15.482607 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 07:41:15.485787 PCI: 00:15.2 scanning...
827 07:41:15.488928 scan_static_bus for PCI: 00:15.2
828 07:41:15.492199 GENERIC: 0.0 disabled
829 07:41:15.492316 I2C: 00:15 enabled
830 07:41:15.495804 I2C: 00:10 disabled
831 07:41:15.498838 I2C: 00:10 disabled
832 07:41:15.498957 I2C: 00:2c enabled
833 07:41:15.502242 I2C: 00:40 enabled
834 07:41:15.502349 I2C: 00:10 enabled
835 07:41:15.505397 I2C: 00:39 enabled
836 07:41:15.508613 scan_static_bus for PCI: 00:15.2 done
837 07:41:15.515384 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 07:41:15.515509 PCI: 00:15.3 scanning...
839 07:41:15.518922 scan_static_bus for PCI: 00:15.3
840 07:41:15.522214 I2C: 00:36 enabled
841 07:41:15.525200 I2C: 00:10 disabled
842 07:41:15.525318 I2C: 00:0c enabled
843 07:41:15.528865 I2C: 00:50 enabled
844 07:41:15.532215 scan_static_bus for PCI: 00:15.3 done
845 07:41:15.535103 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 07:41:15.538512 PCI: 00:19.0 scanning...
847 07:41:15.542175 scan_static_bus for PCI: 00:19.0
848 07:41:15.545075 I2C: 00:1a enabled
849 07:41:15.545195 I2C: 00:1a disabled
850 07:41:15.548670 I2C: 00:1a disabled
851 07:41:15.551678 I2C: 00:28 enabled
852 07:41:15.551793 I2C: 00:29 enabled
853 07:41:15.555260 scan_static_bus for PCI: 00:19.0 done
854 07:41:15.561684 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 07:41:15.564934 PCI: 00:1e.2 scanning...
856 07:41:15.568124 scan_generic_bus for PCI: 00:1e.2
857 07:41:15.568237 SPI: 00 enabled
858 07:41:15.574910 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 07:41:15.578109 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 07:41:15.581781 PCI: 00:1f.0 scanning...
861 07:41:15.584787 scan_static_bus for PCI: 00:1f.0
862 07:41:15.588306 PNP: 0c09.0 enabled
863 07:41:15.591561 PNP: 0c09.0 scanning...
864 07:41:15.594611 scan_static_bus for PNP: 0c09.0
865 07:41:15.598094 scan_static_bus for PNP: 0c09.0 done
866 07:41:15.601378 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 07:41:15.604351 scan_static_bus for PCI: 00:1f.0 done
868 07:41:15.611229 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 07:41:15.614177 PCI: 00:1f.3 scanning...
870 07:41:15.617617 scan_static_bus for PCI: 00:1f.3
871 07:41:15.617738 GENERIC: 0.0 disabled
872 07:41:15.620874 scan_static_bus for PCI: 00:1f.3 done
873 07:41:15.627444 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 07:41:15.631161 PCI: 00:1f.5 scanning...
875 07:41:15.634280 scan_generic_bus for PCI: 00:1f.5
876 07:41:15.637390 scan_generic_bus for PCI: 00:1f.5 done
877 07:41:15.640948 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 07:41:15.647585 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
879 07:41:15.650829 scan_static_bus for Root Device done
880 07:41:15.653812 scan_bus: bus Root Device finished in 664 msecs
881 07:41:15.657434 done
882 07:41:15.660464 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1085 ms
883 07:41:15.664156 Chrome EC: UHEPI supported
884 07:41:15.670862 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 07:41:15.677704 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 07:41:15.681421 SPI flash protection: WPSW=0 SRP0=0
887 07:41:15.687653 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 07:41:15.690825 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 07:41:15.694318 found VGA at PCI: 00:02.0
890 07:41:15.697858 Setting up VGA for PCI: 00:02.0
891 07:41:15.704684 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 07:41:15.707794 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 07:41:15.710937 Allocating resources...
894 07:41:15.714161 Reading resources...
895 07:41:15.717374 Root Device read_resources bus 0 link: 0
896 07:41:15.720964 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 07:41:15.727560 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 07:41:15.730572 DOMAIN: 0000 read_resources bus 0 link: 0
899 07:41:15.737491 PCI: 00:04.0 read_resources bus 1 link: 0
900 07:41:15.740550 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 07:41:15.743986 PCI: 00:05.0 read_resources bus 2 link: 0
902 07:41:15.750763 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 07:41:15.754085 PCI: 00:14.0 read_resources bus 0 link: 0
904 07:41:15.760375 USB0 port 0 read_resources bus 0 link: 0
905 07:41:15.767221 USB0 port 0 read_resources bus 0 link: 0 done
906 07:41:15.771095 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 07:41:15.774867 PCI: 00:14.3 read_resources bus 0 link: 0
908 07:41:15.778532 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 07:41:15.837661 PCI: 00:15.0 read_resources bus 0 link: 0
910 07:41:15.837820 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 07:41:15.838249 PCI: 00:15.2 read_resources bus 0 link: 0
912 07:41:15.838538 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 07:41:15.838643 PCI: 00:15.3 read_resources bus 0 link: 0
914 07:41:15.838724 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 07:41:15.838790 PCI: 00:19.0 read_resources bus 0 link: 0
916 07:41:15.839320 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 07:41:15.839418 PCI: 00:1e.2 read_resources bus 3 link: 0
918 07:41:15.839697 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 07:41:15.839793 PCI: 00:1f.0 read_resources bus 0 link: 0
920 07:41:15.839889 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 07:41:15.858606 PCI: 00:1f.3 read_resources bus 0 link: 0
922 07:41:15.858921 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 07:41:15.859025 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 07:41:15.859122 Root Device read_resources bus 0 link: 0 done
925 07:41:15.862238 Done reading resources.
926 07:41:15.865692 Show resources in subtree (Root Device)...After reading.
927 07:41:15.871950 Root Device child on link 0 CPU_CLUSTER: 0
928 07:41:15.875710 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 07:41:15.875850 APIC: 00
930 07:41:15.878723 APIC: 02
931 07:41:15.881914 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 07:41:15.891906 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 07:41:15.902043 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 07:41:15.902158 PCI: 00:00.0
935 07:41:15.912034 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 07:41:15.921553 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 07:41:15.931722 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 07:41:15.941472 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 07:41:15.951393 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 07:41:15.958244 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 07:41:15.967967 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 07:41:15.977747 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 07:41:15.987859 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 07:41:15.997897 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 07:41:16.004621 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 07:41:16.014452 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 07:41:16.024432 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 07:41:16.034169 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 07:41:16.043981 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 07:41:16.053882 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 07:41:16.063643 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 07:41:16.070250 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 07:41:16.080365 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 07:41:16.083520 PCI: 00:02.0
955 07:41:16.093156 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 07:41:16.103585 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 07:41:16.109847 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 07:41:16.116479 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 07:41:16.126289 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 07:41:16.126407 GENERIC: 0.0
961 07:41:16.133047 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 07:41:16.143384 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 07:41:16.143504 GENERIC: 0.0
964 07:41:16.146444 PCI: 00:08.0
965 07:41:16.156218 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 07:41:16.159777 PCI: 00:14.0 child on link 0 USB0 port 0
967 07:41:16.169768 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 07:41:16.172770 USB0 port 0 child on link 0 USB2 port 0
969 07:41:16.176350 USB2 port 0
970 07:41:16.176467 USB2 port 1
971 07:41:16.179512 USB2 port 2
972 07:41:16.179595 USB2 port 3
973 07:41:16.182881 USB2 port 4
974 07:41:16.186397 USB2 port 5
975 07:41:16.186492 USB2 port 6
976 07:41:16.189492 USB2 port 7
977 07:41:16.189574 USB3 port 0
978 07:41:16.192784 USB3 port 1
979 07:41:16.192867 USB3 port 2
980 07:41:16.196209 USB3 port 3
981 07:41:16.196290 PCI: 00:14.2
982 07:41:16.202939 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 07:41:16.212582 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 07:41:16.212678 GENERIC: 0.0
985 07:41:16.216248 PCI: 00:14.5
986 07:41:16.225967 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 07:41:16.229215 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 07:41:16.239108 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 07:41:16.239206 I2C: 00:2c
990 07:41:16.242669 I2C: 00:15
991 07:41:16.242789 PCI: 00:15.1
992 07:41:16.252345 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 07:41:16.258715 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 07:41:16.268886 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 07:41:16.269024 GENERIC: 0.0
996 07:41:16.272324 I2C: 00:15
997 07:41:16.272418 I2C: 00:10
998 07:41:16.275207 I2C: 00:10
999 07:41:16.275320 I2C: 00:2c
1000 07:41:16.278700 I2C: 00:40
1001 07:41:16.278800 I2C: 00:10
1002 07:41:16.278881 I2C: 00:39
1003 07:41:16.285558 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 07:41:16.295575 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 07:41:16.295704 I2C: 00:36
1006 07:41:16.298860 I2C: 00:10
1007 07:41:16.298952 I2C: 00:0c
1008 07:41:16.301856 I2C: 00:50
1009 07:41:16.301976 PCI: 00:16.0
1010 07:41:16.312184 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 07:41:16.315043 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 07:41:16.324805 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 07:41:16.328462 I2C: 00:1a
1014 07:41:16.328549 I2C: 00:1a
1015 07:41:16.331789 I2C: 00:1a
1016 07:41:16.331877 I2C: 00:28
1017 07:41:16.335125 I2C: 00:29
1018 07:41:16.335219 PCI: 00:19.2
1019 07:41:16.348137 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 07:41:16.358147 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 07:41:16.358246 PCI: 00:1a.0
1022 07:41:16.368243 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 07:41:16.371324 PCI: 00:1e.0
1024 07:41:16.374510 PCI: 00:1e.2 child on link 0 SPI: 00
1025 07:41:16.384984 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 07:41:16.385115 SPI: 00
1027 07:41:16.388129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 07:41:16.398044 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 07:41:16.401232 PNP: 0c09.0
1030 07:41:16.408159 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 07:41:16.411362 PCI: 00:1f.2
1032 07:41:16.421000 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 07:41:16.427719 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 07:41:16.434550 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 07:41:16.444668 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 07:41:16.454402 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 07:41:16.454488 GENERIC: 0.0
1038 07:41:16.458556 PCI: 00:1f.5
1039 07:41:16.465760 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 07:41:16.472048 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 07:41:16.482030 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 07:41:16.485728 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 07:41:16.495600 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 07:41:16.501937 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 07:41:16.508680 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 07:41:16.511711 DOMAIN: 0000: Resource ranges:
1047 07:41:16.515377 * Base: 1000, Size: 800, Tag: 100
1048 07:41:16.518545 * Base: 1900, Size: e700, Tag: 100
1049 07:41:16.525273 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 07:41:16.531601 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 07:41:16.538493 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 07:41:16.545138 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 07:41:16.555086 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 07:41:16.561615 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 07:41:16.568365 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 07:41:16.578147 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 07:41:16.584467 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 07:41:16.591391 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 07:41:16.601079 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 07:41:16.607658 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 07:41:16.614040 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 07:41:16.624243 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 07:41:16.630594 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 07:41:16.637498 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 07:41:16.647460 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 07:41:16.654144 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 07:41:16.660600 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 07:41:16.670474 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 07:41:16.677258 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 07:41:16.684103 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 07:41:16.693625 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 07:41:16.700465 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 07:41:16.703465 DOMAIN: 0000: Resource ranges:
1074 07:41:16.707230 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 07:41:16.710285 * Base: d0000000, Size: 2b000000, Tag: 200
1076 07:41:16.716999 * Base: fb001000, Size: 2fff000, Tag: 200
1077 07:41:16.720255 * Base: fe010000, Size: 22000, Tag: 200
1078 07:41:16.723449 * Base: fe033000, Size: a4d000, Tag: 200
1079 07:41:16.726666 * Base: fea88000, Size: 2f8000, Tag: 200
1080 07:41:16.733455 * Base: fed88000, Size: 8000, Tag: 200
1081 07:41:16.736687 * Base: fed93000, Size: d000, Tag: 200
1082 07:41:16.739810 * Base: feda2000, Size: 125e000, Tag: 200
1083 07:41:16.746319 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 07:41:16.752956 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 07:41:16.759981 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 07:41:16.766542 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 07:41:16.773079 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 07:41:16.779852 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 07:41:16.786033 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 07:41:16.793031 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 07:41:16.799313 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 07:41:16.806164 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 07:41:16.812559 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 07:41:16.819163 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 07:41:16.826047 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 07:41:16.832254 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 07:41:16.839229 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 07:41:16.845794 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 07:41:16.852499 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 07:41:16.858911 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 07:41:16.865581 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 07:41:16.872218 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 07:41:16.878819 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 07:41:16.885593 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 07:41:16.892037 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 07:41:16.895190 Root Device assign_resources, bus 0 link: 0
1107 07:41:16.901895 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 07:41:16.908730 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 07:41:16.918537 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 07:41:16.925296 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 07:41:16.934985 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 07:41:16.938107 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 07:41:16.941883 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 07:41:16.951304 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 07:41:16.954862 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 07:41:16.961344 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 07:41:16.968005 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 07:41:16.977888 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 07:41:16.981365 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 07:41:16.984349 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 07:41:16.994761 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 07:41:16.997944 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 07:41:17.004306 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 07:41:17.011102 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 07:41:17.017788 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 07:41:17.024555 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 07:41:17.027706 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 07:41:17.037864 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 07:41:17.044764 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 07:41:17.048278 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 07:41:17.054750 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 07:41:17.061176 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 07:41:17.067789 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 07:41:17.070824 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 07:41:17.077769 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 07:41:17.088036 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 07:41:17.091437 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 07:41:17.097813 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 07:41:17.104488 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 07:41:17.114073 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 07:41:17.120659 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 07:41:17.124217 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 07:41:17.130978 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 07:41:17.134138 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 07:41:17.140412 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 07:41:17.143589 LPC: Trying to open IO window from 800 size 1ff
1147 07:41:17.153863 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 07:41:17.160178 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 07:41:17.163797 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 07:41:17.170493 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 07:41:17.176703 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 07:41:17.183749 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 07:41:17.186941 Root Device assign_resources, bus 0 link: 0
1154 07:41:17.190106 Done setting resources.
1155 07:41:17.196953 Show resources in subtree (Root Device)...After assigning values.
1156 07:41:17.200002 Root Device child on link 0 CPU_CLUSTER: 0
1157 07:41:17.203571 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 07:41:17.206604 APIC: 00
1159 07:41:17.206713 APIC: 02
1160 07:41:17.209952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 07:41:17.219762 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 07:41:17.229833 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 07:41:17.232772 PCI: 00:00.0
1164 07:41:17.242815 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 07:41:17.249412 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 07:41:17.259211 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 07:41:17.269154 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 07:41:17.279599 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 07:41:17.289511 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 07:41:17.298992 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 07:41:17.305531 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 07:41:17.315481 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 07:41:17.325521 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 07:41:17.335626 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 07:41:17.345156 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 07:41:17.355111 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 07:41:17.361889 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 07:41:17.371945 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 07:41:17.381928 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 07:41:17.391613 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 07:41:17.401813 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 07:41:17.411224 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 07:41:17.411325 PCI: 00:02.0
1184 07:41:17.421192 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 07:41:17.431230 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 07:41:17.440850 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 07:41:17.447557 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 07:41:17.457245 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 07:41:17.457338 GENERIC: 0.0
1190 07:41:17.464250 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 07:41:17.473794 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 07:41:17.473888 GENERIC: 0.0
1193 07:41:17.477469 PCI: 00:08.0
1194 07:41:17.487568 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 07:41:17.490611 PCI: 00:14.0 child on link 0 USB0 port 0
1196 07:41:17.500305 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 07:41:17.506673 USB0 port 0 child on link 0 USB2 port 0
1198 07:41:17.506759 USB2 port 0
1199 07:41:17.510361 USB2 port 1
1200 07:41:17.510445 USB2 port 2
1201 07:41:17.513522 USB2 port 3
1202 07:41:17.513607 USB2 port 4
1203 07:41:17.516695 USB2 port 5
1204 07:41:17.519945 USB2 port 6
1205 07:41:17.520032 USB2 port 7
1206 07:41:17.523856 USB3 port 0
1207 07:41:17.523941 USB3 port 1
1208 07:41:17.526984 USB3 port 2
1209 07:41:17.527069 USB3 port 3
1210 07:41:17.529894 PCI: 00:14.2
1211 07:41:17.533360 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 07:41:17.543377 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 07:41:17.546480 GENERIC: 0.0
1214 07:41:17.546567 PCI: 00:14.5
1215 07:41:17.556299 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 07:41:17.563140 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 07:41:17.573172 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 07:41:17.573269 I2C: 00:2c
1219 07:41:17.576293 I2C: 00:15
1220 07:41:17.576378 PCI: 00:15.1
1221 07:41:17.586485 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 07:41:17.592773 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 07:41:17.603005 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 07:41:17.603097 GENERIC: 0.0
1225 07:41:17.606063 I2C: 00:15
1226 07:41:17.606174 I2C: 00:10
1227 07:41:17.609850 I2C: 00:10
1228 07:41:17.609935 I2C: 00:2c
1229 07:41:17.613083 I2C: 00:40
1230 07:41:17.613167 I2C: 00:10
1231 07:41:17.616492 I2C: 00:39
1232 07:41:17.619547 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 07:41:17.629619 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 07:41:17.629708 I2C: 00:36
1235 07:41:17.632755 I2C: 00:10
1236 07:41:17.632839 I2C: 00:0c
1237 07:41:17.635925 I2C: 00:50
1238 07:41:17.636019 PCI: 00:16.0
1239 07:41:17.645865 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 07:41:17.652586 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 07:41:17.662223 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 07:41:17.662339 I2C: 00:1a
1243 07:41:17.665850 I2C: 00:1a
1244 07:41:17.665942 I2C: 00:1a
1245 07:41:17.668878 I2C: 00:28
1246 07:41:17.668966 I2C: 00:29
1247 07:41:17.672431 PCI: 00:19.2
1248 07:41:17.682095 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 07:41:17.691808 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 07:41:17.695758 PCI: 00:1a.0
1251 07:41:17.705278 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 07:41:17.705366 PCI: 00:1e.0
1253 07:41:17.711951 PCI: 00:1e.2 child on link 0 SPI: 00
1254 07:41:17.721554 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 07:41:17.721639 SPI: 00
1256 07:41:17.725220 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 07:41:17.735148 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 07:41:17.738143 PNP: 0c09.0
1259 07:41:17.744602 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 07:41:17.748193 PCI: 00:1f.2
1261 07:41:17.757795 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 07:41:17.764678 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 07:41:17.771251 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 07:41:17.781100 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 07:41:17.791138 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 07:41:17.791256 GENERIC: 0.0
1267 07:41:17.794434 PCI: 00:1f.5
1268 07:41:17.804125 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 07:41:17.807949 Done allocating resources.
1270 07:41:17.814237 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2095 ms
1271 07:41:17.817432 Enabling resources...
1272 07:41:17.821231 PCI: 00:00.0 subsystem <- 8086/4e22
1273 07:41:17.821339 PCI: 00:00.0 cmd <- 06
1274 07:41:17.827692 PCI: 00:02.0 subsystem <- 8086/4e55
1275 07:41:17.827774 PCI: 00:02.0 cmd <- 03
1276 07:41:17.831162 PCI: 00:04.0 subsystem <- 8086/4e03
1277 07:41:17.834363 PCI: 00:04.0 cmd <- 02
1278 07:41:17.837519 PCI: 00:05.0 bridge ctrl <- 0003
1279 07:41:17.840762 PCI: 00:05.0 subsystem <- 8086/4e19
1280 07:41:17.843944 PCI: 00:05.0 cmd <- 02
1281 07:41:17.847245 PCI: 00:08.0 cmd <- 06
1282 07:41:17.850770 PCI: 00:14.0 subsystem <- 8086/4ded
1283 07:41:17.853837 PCI: 00:14.0 cmd <- 02
1284 07:41:17.857124 PCI: 00:14.3 subsystem <- 8086/4df0
1285 07:41:17.860678 PCI: 00:14.3 cmd <- 02
1286 07:41:17.863770 PCI: 00:14.5 subsystem <- 8086/4df8
1287 07:41:17.863854 PCI: 00:14.5 cmd <- 06
1288 07:41:17.870447 PCI: 00:15.0 subsystem <- 8086/4de8
1289 07:41:17.870547 PCI: 00:15.0 cmd <- 02
1290 07:41:17.873665 PCI: 00:15.1 subsystem <- 8086/4de9
1291 07:41:17.876820 PCI: 00:15.1 cmd <- 02
1292 07:41:17.880504 PCI: 00:15.2 subsystem <- 8086/4dea
1293 07:41:17.883566 PCI: 00:15.2 cmd <- 02
1294 07:41:17.886927 PCI: 00:15.3 subsystem <- 8086/4deb
1295 07:41:17.890004 PCI: 00:15.3 cmd <- 02
1296 07:41:17.893320 PCI: 00:16.0 subsystem <- 8086/4de0
1297 07:41:17.896737 PCI: 00:16.0 cmd <- 02
1298 07:41:17.900125 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 07:41:17.903031 PCI: 00:19.0 cmd <- 02
1300 07:41:17.906557 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 07:41:17.906696 PCI: 00:19.2 cmd <- 06
1302 07:41:17.913171 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 07:41:17.913261 PCI: 00:1a.0 cmd <- 06
1304 07:41:17.916664 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 07:41:17.919564 PCI: 00:1e.2 cmd <- 06
1306 07:41:17.923415 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 07:41:17.926158 PCI: 00:1f.0 cmd <- 407
1308 07:41:17.929789 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 07:41:17.932768 PCI: 00:1f.3 cmd <- 02
1310 07:41:17.936456 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 07:41:17.939533 PCI: 00:1f.5 cmd <- 406
1312 07:41:17.942778 done.
1313 07:41:17.946442 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 07:41:17.949734 Initializing devices...
1315 07:41:17.953105 Root Device init
1316 07:41:17.953214 mainboard: EC init
1317 07:41:17.959548 Chrome EC: Set SMI mask to 0x0000000000000000
1318 07:41:17.962858 Chrome EC: clear events_b mask to 0x0000000000000000
1319 07:41:17.969134 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 07:41:17.976202 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 07:41:17.982587 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 07:41:17.986246 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 07:41:17.989392 Root Device init finished in 35 msecs
1324 07:41:17.993721 PCI: 00:00.0 init
1325 07:41:17.997040 CPU TDP = 6 Watts
1326 07:41:17.997137 CPU PL1 = 7 Watts
1327 07:41:18.000109 CPU PL2 = 12 Watts
1328 07:41:18.003811 PCI: 00:00.0 init finished in 6 msecs
1329 07:41:18.007063 PCI: 00:02.0 init
1330 07:41:18.010007 GMA: Found VBT in CBFS
1331 07:41:18.010088 GMA: Found valid VBT in CBFS
1332 07:41:18.016755 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 07:41:18.023416 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 07:41:18.029709 PCI: 00:02.0 init finished in 18 msecs
1335 07:41:18.029789 PCI: 00:08.0 init
1336 07:41:18.036593 PCI: 00:08.0 init finished in 0 msecs
1337 07:41:18.036673 PCI: 00:14.0 init
1338 07:41:18.043104 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 07:41:18.046750 PCI: 00:14.0 init finished in 4 msecs
1340 07:41:18.049892 PCI: 00:15.0 init
1341 07:41:18.049970 I2C bus 0 version 0x3230302a
1342 07:41:18.056740 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 07:41:18.059688 PCI: 00:15.0 init finished in 6 msecs
1344 07:41:18.059767 PCI: 00:15.1 init
1345 07:41:18.063240 I2C bus 1 version 0x3230302a
1346 07:41:18.066598 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 07:41:18.069695 PCI: 00:15.1 init finished in 6 msecs
1348 07:41:18.073229 PCI: 00:15.2 init
1349 07:41:18.076351 I2C bus 2 version 0x3230302a
1350 07:41:18.080001 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 07:41:18.082995 PCI: 00:15.2 init finished in 6 msecs
1352 07:41:18.086177 PCI: 00:15.3 init
1353 07:41:18.089862 I2C bus 3 version 0x3230302a
1354 07:41:18.093075 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 07:41:18.096248 PCI: 00:15.3 init finished in 6 msecs
1356 07:41:18.099554 PCI: 00:16.0 init
1357 07:41:18.103156 PCI: 00:16.0 init finished in 0 msecs
1358 07:41:18.103238 PCI: 00:19.0 init
1359 07:41:18.106508 I2C bus 4 version 0x3230302a
1360 07:41:18.109744 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 07:41:18.113347 PCI: 00:19.0 init finished in 6 msecs
1362 07:41:18.116871 PCI: 00:1a.0 init
1363 07:41:18.120028 PCI: 00:1a.0 init finished in 0 msecs
1364 07:41:18.123651 PCI: 00:1f.0 init
1365 07:41:18.126801 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 07:41:18.133936 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 07:41:18.134049 IOAPIC: ID = 0x02
1368 07:41:18.136555 IOAPIC: Dumping registers
1369 07:41:18.140382 reg 0x0000: 0x02000000
1370 07:41:18.140484 reg 0x0001: 0x00770020
1371 07:41:18.143448 reg 0x0002: 0x00000000
1372 07:41:18.146875 PCI: 00:1f.0 init finished in 21 msecs
1373 07:41:18.149954 PCI: 00:1f.2 init
1374 07:41:18.153711 Disabling ACPI via APMC.
1375 07:41:18.157456 APMC done.
1376 07:41:18.160598 PCI: 00:1f.2 init finished in 6 msecs
1377 07:41:18.171611 PNP: 0c09.0 init
1378 07:41:18.175033 Google Chrome EC uptime: 6.504 seconds
1379 07:41:18.181616 Google Chrome AP resets since EC boot: 0
1380 07:41:18.185249 Google Chrome most recent AP reset causes:
1381 07:41:18.191965 Google Chrome EC reset flags at last EC boot: reset-pin
1382 07:41:18.195255 PNP: 0c09.0 init finished in 18 msecs
1383 07:41:18.195336 Devices initialized
1384 07:41:18.198415 Show all devs... After init.
1385 07:41:18.201526 Root Device: enabled 1
1386 07:41:18.204837 CPU_CLUSTER: 0: enabled 1
1387 07:41:18.208197 DOMAIN: 0000: enabled 1
1388 07:41:18.208274 PCI: 00:00.0: enabled 1
1389 07:41:18.211673 PCI: 00:02.0: enabled 1
1390 07:41:18.214993 PCI: 00:04.0: enabled 1
1391 07:41:18.215077 PCI: 00:05.0: enabled 1
1392 07:41:18.218045 PCI: 00:09.0: enabled 0
1393 07:41:18.221596 PCI: 00:12.6: enabled 0
1394 07:41:18.224878 PCI: 00:14.0: enabled 1
1395 07:41:18.224958 PCI: 00:14.1: enabled 0
1396 07:41:18.227885 PCI: 00:14.2: enabled 0
1397 07:41:18.231098 PCI: 00:14.3: enabled 1
1398 07:41:18.234436 PCI: 00:14.5: enabled 1
1399 07:41:18.234551 PCI: 00:15.0: enabled 1
1400 07:41:18.238009 PCI: 00:15.1: enabled 1
1401 07:41:18.241149 PCI: 00:15.2: enabled 1
1402 07:41:18.244582 PCI: 00:15.3: enabled 1
1403 07:41:18.244702 PCI: 00:16.0: enabled 1
1404 07:41:18.248167 PCI: 00:16.1: enabled 0
1405 07:41:18.251188 PCI: 00:16.4: enabled 0
1406 07:41:18.251296 PCI: 00:16.5: enabled 0
1407 07:41:18.254170 PCI: 00:17.0: enabled 0
1408 07:41:18.257988 PCI: 00:19.0: enabled 1
1409 07:41:18.261212 PCI: 00:19.1: enabled 0
1410 07:41:18.261331 PCI: 00:19.2: enabled 1
1411 07:41:18.264333 PCI: 00:1a.0: enabled 1
1412 07:41:18.267830 PCI: 00:1c.0: enabled 0
1413 07:41:18.270930 PCI: 00:1c.1: enabled 0
1414 07:41:18.271043 PCI: 00:1c.2: enabled 0
1415 07:41:18.274009 PCI: 00:1c.3: enabled 0
1416 07:41:18.277347 PCI: 00:1c.4: enabled 0
1417 07:41:18.281067 PCI: 00:1c.5: enabled 0
1418 07:41:18.281177 PCI: 00:1c.6: enabled 0
1419 07:41:18.284011 PCI: 00:1c.7: enabled 1
1420 07:41:18.287559 PCI: 00:1e.0: enabled 0
1421 07:41:18.290761 PCI: 00:1e.1: enabled 0
1422 07:41:18.290845 PCI: 00:1e.2: enabled 1
1423 07:41:18.293810 PCI: 00:1e.3: enabled 0
1424 07:41:18.297341 PCI: 00:1f.0: enabled 1
1425 07:41:18.297452 PCI: 00:1f.1: enabled 0
1426 07:41:18.300571 PCI: 00:1f.2: enabled 1
1427 07:41:18.304164 PCI: 00:1f.3: enabled 1
1428 07:41:18.307454 PCI: 00:1f.4: enabled 0
1429 07:41:18.307574 PCI: 00:1f.5: enabled 1
1430 07:41:18.310542 PCI: 00:1f.7: enabled 0
1431 07:41:18.314101 GENERIC: 0.0: enabled 1
1432 07:41:18.317499 GENERIC: 0.0: enabled 1
1433 07:41:18.317581 USB0 port 0: enabled 1
1434 07:41:18.320562 GENERIC: 0.0: enabled 1
1435 07:41:18.324133 I2C: 00:2c: enabled 1
1436 07:41:18.324214 I2C: 00:15: enabled 1
1437 07:41:18.327106 GENERIC: 0.0: enabled 0
1438 07:41:18.330286 I2C: 00:15: enabled 1
1439 07:41:18.330375 I2C: 00:10: enabled 0
1440 07:41:18.333903 I2C: 00:10: enabled 0
1441 07:41:18.337473 I2C: 00:2c: enabled 1
1442 07:41:18.337583 I2C: 00:40: enabled 1
1443 07:41:18.340735 I2C: 00:10: enabled 1
1444 07:41:18.344008 I2C: 00:39: enabled 1
1445 07:41:18.344116 I2C: 00:36: enabled 1
1446 07:41:18.346934 I2C: 00:10: enabled 0
1447 07:41:18.350657 I2C: 00:0c: enabled 1
1448 07:41:18.353873 I2C: 00:50: enabled 1
1449 07:41:18.353975 I2C: 00:1a: enabled 1
1450 07:41:18.357127 I2C: 00:1a: enabled 0
1451 07:41:18.360168 I2C: 00:1a: enabled 0
1452 07:41:18.360249 I2C: 00:28: enabled 1
1453 07:41:18.363693 I2C: 00:29: enabled 1
1454 07:41:18.366932 PCI: 00:00.0: enabled 1
1455 07:41:18.367026 SPI: 00: enabled 1
1456 07:41:18.370548 PNP: 0c09.0: enabled 1
1457 07:41:18.373727 GENERIC: 0.0: enabled 0
1458 07:41:18.373825 USB2 port 0: enabled 1
1459 07:41:18.376662 USB2 port 1: enabled 1
1460 07:41:18.380458 USB2 port 2: enabled 1
1461 07:41:18.380568 USB2 port 3: enabled 1
1462 07:41:18.383491 USB2 port 4: enabled 0
1463 07:41:18.386725 USB2 port 5: enabled 1
1464 07:41:18.390150 USB2 port 6: enabled 0
1465 07:41:18.390235 USB2 port 7: enabled 1
1466 07:41:18.393257 USB3 port 0: enabled 1
1467 07:41:18.396535 USB3 port 1: enabled 1
1468 07:41:18.396621 USB3 port 2: enabled 1
1469 07:41:18.399920 USB3 port 3: enabled 1
1470 07:41:18.403252 APIC: 00: enabled 1
1471 07:41:18.403363 APIC: 02: enabled 1
1472 07:41:18.406419 PCI: 00:08.0: enabled 1
1473 07:41:18.413341 BS: BS_DEV_INIT run times (exec / console): 23 / 437 ms
1474 07:41:18.416654 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 07:41:18.419700 ELOG: NV offset 0xbfa000 size 0x1000
1476 07:41:18.427969 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 07:41:18.434443 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:18 UTC
1478 07:41:18.441386 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:18 UTC
1479 07:41:18.447711 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:18 UTC
1480 07:41:18.454131 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:18 UTC
1481 07:41:18.460838 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:18 UTC
1482 07:41:18.467495 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 07:41:18.471195 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:18 UTC
1484 07:41:18.480920 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 07:41:18.487357 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:18 UTC
1486 07:41:18.491048 ELOG: Event(16) added with size 11 at 2024-01-03 07:41:18 UTC
1487 07:41:18.494087 Erasing flash addr bfa000 + 4 KiB
1488 07:41:18.547170 elog_add_boot_reason: Logged dev mode boot
1489 07:41:18.553931 BS: BS_POST_DEVICE entry times (exec / console): 26 / 34 ms
1490 07:41:18.554025 Finalize devices...
1491 07:41:18.557363 Devices finalized
1492 07:41:18.560569 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1493 07:41:18.567217 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1494 07:41:18.573778 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1495 07:41:18.577276 ME: HFSTS1 : 0x80030045
1496 07:41:18.580233 ME: HFSTS2 : 0x30280136
1497 07:41:18.583769 ME: HFSTS3 : 0x00000050
1498 07:41:18.590602 ME: HFSTS4 : 0x00004000
1499 07:41:18.593746 ME: HFSTS5 : 0x00000000
1500 07:41:18.596907 ME: HFSTS6 : 0x40400006
1501 07:41:18.600098 ME: Manufacturing Mode : NO
1502 07:41:18.603881 ME: FW Partition Table : OK
1503 07:41:18.606716 ME: Bringup Loader Failure : NO
1504 07:41:18.610165 ME: Firmware Init Complete : NO
1505 07:41:18.613296 ME: Boot Options Present : NO
1506 07:41:18.616863 ME: Update In Progress : NO
1507 07:41:18.620014 ME: D0i3 Support : YES
1508 07:41:18.623275 ME: Low Power State Enabled : NO
1509 07:41:18.626451 ME: CPU Replaced : YES
1510 07:41:18.630226 ME: CPU Replacement Valid : YES
1511 07:41:18.633317 ME: Current Working State : 5
1512 07:41:18.636516 ME: Current Operation State : 1
1513 07:41:18.640107 ME: Current Operation Mode : 3
1514 07:41:18.643270 ME: Error Code : 0
1515 07:41:18.646723 ME: CPU Debug Disabled : YES
1516 07:41:18.649683 ME: TXT Support : NO
1517 07:41:18.656600 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1518 07:41:18.662974 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1519 07:41:18.666758 ACPI: Writing ACPI tables at 76b27000.
1520 07:41:18.666849 ACPI: * FACS
1521 07:41:18.669793 ACPI: * DSDT
1522 07:41:18.673074 Ramoops buffer: 0x100000@0x76a26000.
1523 07:41:18.676515 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1524 07:41:18.682947 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1525 07:41:18.686604 Google Chrome EC: version:
1526 07:41:18.689575 ro: magolor_1.1.9999-103b6f9
1527 07:41:18.692804 rw: magolor_1.1.9999-103b6f9
1528 07:41:18.692922 running image: 1
1529 07:41:18.699458 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1530 07:41:18.703459 ACPI: * FADT
1531 07:41:18.703541 SCI is IRQ9
1532 07:41:18.710270 ACPI: added table 1/32, length now 40
1533 07:41:18.710381 ACPI: * SSDT
1534 07:41:18.713176 Found 1 CPU(s) with 2 core(s) each.
1535 07:41:18.716612 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1536 07:41:18.723389 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1537 07:41:18.726682 Could not locate 'wifi_sar' in VPD.
1538 07:41:18.729868 Checking CBFS for default SAR values
1539 07:41:18.736593 wifi_sar_defaults.hex has bad len in CBFS
1540 07:41:18.740292 failed from getting SAR limits!
1541 07:41:18.743432 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1542 07:41:18.749661 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1543 07:41:18.753027 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1544 07:41:18.759591 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1545 07:41:18.763414 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1546 07:41:18.769680 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1547 07:41:18.773389 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1548 07:41:18.779884 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1549 07:41:18.786270 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1550 07:41:18.793213 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1551 07:41:18.796153 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1552 07:41:18.803130 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1553 07:41:18.806247 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1554 07:41:18.812861 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1555 07:41:18.815987 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1556 07:41:18.823567 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1557 07:41:18.826866 PS2K: Passing 101 keymaps to kernel
1558 07:41:18.833793 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1559 07:41:18.840126 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1560 07:41:18.843487 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1561 07:41:18.849831 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1562 07:41:18.856969 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1563 07:41:18.859965 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1564 07:41:18.866495 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1565 07:41:18.873337 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1566 07:41:18.876612 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1567 07:41:18.883515 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1568 07:41:18.886954 ACPI: added table 2/32, length now 44
1569 07:41:18.889844 ACPI: * MCFG
1570 07:41:18.893405 ACPI: added table 3/32, length now 48
1571 07:41:18.893518 ACPI: * TPM2
1572 07:41:18.896402 TPM2 log created at 0x76a16000
1573 07:41:18.900062 ACPI: added table 4/32, length now 52
1574 07:41:18.903208 ACPI: * MADT
1575 07:41:18.903312 SCI is IRQ9
1576 07:41:18.906295 ACPI: added table 5/32, length now 56
1577 07:41:18.909680 current = 76b2d580
1578 07:41:18.912968 ACPI: * DMAR
1579 07:41:18.916171 ACPI: added table 6/32, length now 60
1580 07:41:18.919950 ACPI: added table 7/32, length now 64
1581 07:41:18.920032 ACPI: * HPET
1582 07:41:18.922997 ACPI: added table 8/32, length now 68
1583 07:41:18.926169 ACPI: done.
1584 07:41:18.929529 ACPI tables: 26304 bytes.
1585 07:41:18.932739 smbios_write_tables: 76a15000
1586 07:41:18.936125 EC returned error result code 3
1587 07:41:18.939357 Couldn't obtain OEM name from CBI
1588 07:41:18.942868 Create SMBIOS type 16
1589 07:41:18.942953 Create SMBIOS type 17
1590 07:41:18.946718 GENERIC: 0.0 (WIFI Device)
1591 07:41:18.949724 SMBIOS tables: 913 bytes.
1592 07:41:18.952816 Writing table forward entry at 0x00000500
1593 07:41:18.959677 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1594 07:41:18.962593 Writing coreboot table at 0x76b4b000
1595 07:41:18.969356 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1596 07:41:18.972821 1. 0000000000001000-000000000009ffff: RAM
1597 07:41:18.979279 2. 00000000000a0000-00000000000fffff: RESERVED
1598 07:41:18.982938 3. 0000000000100000-0000000076a14fff: RAM
1599 07:41:18.989399 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1600 07:41:18.992242 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1601 07:41:18.998821 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1602 07:41:19.002476 7. 0000000077000000-000000007fbfffff: RESERVED
1603 07:41:19.009256 8. 00000000c0000000-00000000cfffffff: RESERVED
1604 07:41:19.012011 9. 00000000fb000000-00000000fb000fff: RESERVED
1605 07:41:19.018810 10. 00000000fe000000-00000000fe00ffff: RESERVED
1606 07:41:19.022023 11. 00000000fea80000-00000000fea87fff: RESERVED
1607 07:41:19.028816 12. 00000000fed80000-00000000fed87fff: RESERVED
1608 07:41:19.032076 13. 00000000fed90000-00000000fed92fff: RESERVED
1609 07:41:19.038487 14. 00000000feda0000-00000000feda1fff: RESERVED
1610 07:41:19.041846 15. 0000000100000000-00000001803fffff: RAM
1611 07:41:19.044948 Passing 4 GPIOs to payload:
1612 07:41:19.048380 NAME | PORT | POLARITY | VALUE
1613 07:41:19.055178 lid | undefined | high | high
1614 07:41:19.058457 power | undefined | high | low
1615 07:41:19.065016 oprom | undefined | high | low
1616 07:41:19.071856 EC in RW | 0x000000b9 | high | low
1617 07:41:19.078290 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 4c54
1618 07:41:19.078402 coreboot table: 1504 bytes.
1619 07:41:19.081478 IMD ROOT 0. 0x76fff000 0x00001000
1620 07:41:19.088150 IMD SMALL 1. 0x76ffe000 0x00001000
1621 07:41:19.091357 FSP MEMORY 2. 0x76c4e000 0x003b0000
1622 07:41:19.094666 CONSOLE 3. 0x76c2e000 0x00020000
1623 07:41:19.098184 FMAP 4. 0x76c2d000 0x00000578
1624 07:41:19.101382 TIME STAMP 5. 0x76c2c000 0x00000910
1625 07:41:19.104995 VBOOT WORK 6. 0x76c18000 0x00014000
1626 07:41:19.108190 ROMSTG STCK 7. 0x76c17000 0x00001000
1627 07:41:19.111231 AFTER CAR 8. 0x76c0d000 0x0000a000
1628 07:41:19.117838 RAMSTAGE 9. 0x76ba7000 0x00066000
1629 07:41:19.121583 REFCODE 10. 0x76b67000 0x00040000
1630 07:41:19.124739 SMM BACKUP 11. 0x76b57000 0x00010000
1631 07:41:19.128006 4f444749 12. 0x76b55000 0x00002000
1632 07:41:19.131024 EXT VBT13. 0x76b53000 0x00001c43
1633 07:41:19.134277 COREBOOT 14. 0x76b4b000 0x00008000
1634 07:41:19.137718 ACPI 15. 0x76b27000 0x00024000
1635 07:41:19.141130 ACPI GNVS 16. 0x76b26000 0x00001000
1636 07:41:19.144564 RAMOOPS 17. 0x76a26000 0x00100000
1637 07:41:19.151440 TPM2 TCGLOG18. 0x76a16000 0x00010000
1638 07:41:19.154253 SMBIOS 19. 0x76a15000 0x00000800
1639 07:41:19.154383 IMD small region:
1640 07:41:19.157735 IMD ROOT 0. 0x76ffec00 0x00000400
1641 07:41:19.164240 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1642 07:41:19.167859 VPD 2. 0x76ffeb80 0x00000058
1643 07:41:19.170805 POWER STATE 3. 0x76ffeb40 0x00000040
1644 07:41:19.174065 ROMSTAGE 4. 0x76ffeb20 0x00000004
1645 07:41:19.177214 MEM INFO 5. 0x76ffe940 0x000001e0
1646 07:41:19.184305 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1647 07:41:19.187498 MTRR: Physical address space:
1648 07:41:19.193966 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1649 07:41:19.200672 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1650 07:41:19.207459 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1651 07:41:19.213589 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1652 07:41:19.217256 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1653 07:41:19.223566 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1654 07:41:19.230457 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1655 07:41:19.233615 MTRR: Fixed MSR 0x250 0x0606060606060606
1656 07:41:19.239955 MTRR: Fixed MSR 0x258 0x0606060606060606
1657 07:41:19.243472 MTRR: Fixed MSR 0x259 0x0000000000000000
1658 07:41:19.246514 MTRR: Fixed MSR 0x268 0x0606060606060606
1659 07:41:19.250059 MTRR: Fixed MSR 0x269 0x0606060606060606
1660 07:41:19.256605 MTRR: Fixed MSR 0x26a 0x0606060606060606
1661 07:41:19.259776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1662 07:41:19.263403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1663 07:41:19.266483 MTRR: Fixed MSR 0x26d 0x0606060606060606
1664 07:41:19.273006 MTRR: Fixed MSR 0x26e 0x0606060606060606
1665 07:41:19.276473 MTRR: Fixed MSR 0x26f 0x0606060606060606
1666 07:41:19.279861 call enable_fixed_mtrr()
1667 07:41:19.283210 CPU physical address size: 39 bits
1668 07:41:19.286593 MTRR: default type WB/UC MTRR counts: 6/5.
1669 07:41:19.289683 MTRR: UC selected as default type.
1670 07:41:19.296487 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1671 07:41:19.302869 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1672 07:41:19.309409 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1673 07:41:19.316112 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1674 07:41:19.322540 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1675 07:41:19.322661
1676 07:41:19.322736 MTRR check
1677 07:41:19.326185 Fixed MTRRs : Enabled
1678 07:41:19.329332 Variable MTRRs: Enabled
1679 07:41:19.329449
1680 07:41:19.333012 MTRR: Fixed MSR 0x250 0x0606060606060606
1681 07:41:19.336117 MTRR: Fixed MSR 0x258 0x0606060606060606
1682 07:41:19.339378 MTRR: Fixed MSR 0x259 0x0000000000000000
1683 07:41:19.346025 MTRR: Fixed MSR 0x268 0x0606060606060606
1684 07:41:19.349094 MTRR: Fixed MSR 0x269 0x0606060606060606
1685 07:41:19.352733 MTRR: Fixed MSR 0x26a 0x0606060606060606
1686 07:41:19.355644 MTRR: Fixed MSR 0x26b 0x0606060606060606
1687 07:41:19.359192 MTRR: Fixed MSR 0x26c 0x0606060606060606
1688 07:41:19.365836 MTRR: Fixed MSR 0x26d 0x0606060606060606
1689 07:41:19.368731 MTRR: Fixed MSR 0x26e 0x0606060606060606
1690 07:41:19.372319 MTRR: Fixed MSR 0x26f 0x0606060606060606
1691 07:41:19.379168 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1692 07:41:19.382157 call enable_fixed_mtrr()
1693 07:41:19.385353 Checking cr50 for pending updates
1694 07:41:19.388732 CPU physical address size: 39 bits
1695 07:41:19.391903 Reading cr50 TPM mode
1696 07:41:19.401858 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1697 07:41:19.409250 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1698 07:41:19.412437 Checking segment from ROM address 0xfff9d5b8
1699 07:41:19.418956 Checking segment from ROM address 0xfff9d5d4
1700 07:41:19.422658 Loading segment from ROM address 0xfff9d5b8
1701 07:41:19.425876 code (compression=0)
1702 07:41:19.432713 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1703 07:41:19.442293 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1704 07:41:19.445280 it's not compressed!
1705 07:41:19.570924 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1706 07:41:19.577507 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1707 07:41:19.585026 Loading segment from ROM address 0xfff9d5d4
1708 07:41:19.588660 Entry Point 0x30000000
1709 07:41:19.588740 Loaded segments
1710 07:41:19.594977 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1711 07:41:19.611141 Finalizing chipset.
1712 07:41:19.614427 Finalizing SMM.
1713 07:41:19.614542 APMC done.
1714 07:41:19.620989 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1715 07:41:19.624378 mp_park_aps done after 0 msecs.
1716 07:41:19.627805 Jumping to boot code at 0x30000000(0x76b4b000)
1717 07:41:19.637844 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1718 07:41:19.637959
1719 07:41:19.638059
1720 07:41:19.638151
1721 07:41:19.640978 Starting depthcharge on Magolor...
1722 07:41:19.641051
1723 07:41:19.641372 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1724 07:41:19.641469 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1725 07:41:19.641552 Setting prompt string to ['dedede:']
1726 07:41:19.641630 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1727 07:41:19.651063 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1728 07:41:19.651152
1729 07:41:19.658081 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1730 07:41:19.658288
1731 07:41:19.661036 fw_config match found: AUDIO_AMP=UNPROVISIONED
1732 07:41:19.661119
1733 07:41:19.664183 Wipe memory regions:
1734 07:41:19.664266
1735 07:41:19.667430 [0x00000000001000, 0x000000000a0000)
1736 07:41:19.667552
1737 07:41:19.670785 [0x00000000100000, 0x00000030000000)
1738 07:41:19.799837
1739 07:41:19.803042 [0x00000031062170, 0x00000076a15000)
1740 07:41:19.972242
1741 07:41:19.975544 [0x00000100000000, 0x00000180400000)
1742 07:41:21.038506
1743 07:41:21.038688 R8152: Initializing
1744 07:41:21.038772
1745 07:41:21.041750 Version 9 (ocp_data = 6010)
1746 07:41:21.041847
1747 07:41:21.045341 R8152: Done initializing
1748 07:41:21.045454
1749 07:41:21.048344 Adding net device
1750 07:41:21.048448
1751 07:41:21.051546 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1752 07:41:21.051648
1753 07:41:21.054804
1754 07:41:21.054885
1755 07:41:21.055174 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 07:41:21.155497 dedede: tftpboot 192.168.201.1 12435208/tftp-deploy-hjty0v4c/kernel/bzImage 12435208/tftp-deploy-hjty0v4c/kernel/cmdline 12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
1758 07:41:21.155680 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1759 07:41:21.155801 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1760 07:41:21.159804 tftpboot 192.168.201.1 12435208/tftp-deploy-hjty0v4c/kernel/bzIploy-hjty0v4c/kernel/cmdline 12435208/tftp-deploy-hjty0v4c/ramdisk/ramdisk.cpio.gz
1761 07:41:21.159908
1762 07:41:21.160005 Waiting for link
1763 07:41:21.361855
1764 07:41:21.361996 done.
1765 07:41:21.362068
1766 07:41:21.362133 MAC: 00:e0:4c:72:3d:b7
1767 07:41:21.362211
1768 07:41:21.365525 Sending DHCP discover... done.
1769 07:41:21.365639
1770 07:41:21.368581 Waiting for reply... done.
1771 07:41:21.368690
1772 07:41:21.372099 Sending DHCP request... done.
1773 07:41:21.372206
1774 07:41:21.375039 Waiting for reply... done.
1775 07:41:21.375137
1776 07:41:21.378699 My ip is 192.168.201.22
1777 07:41:21.378779
1778 07:41:21.381693 The DHCP server ip is 192.168.201.1
1779 07:41:21.381774
1780 07:41:21.385236 TFTP server IP predefined by user: 192.168.201.1
1781 07:41:21.385338
1782 07:41:21.391902 Bootfile predefined by user: 12435208/tftp-deploy-hjty0v4c/kernel/bzImage
1783 07:41:21.392018
1784 07:41:21.394980 Sending tftp read request... done.
1785 07:41:21.395062
1786 07:41:21.401808 Waiting for the transfer...
1787 07:41:21.401896
1788 07:41:21.682932 00000000 ################################################################
1789 07:41:21.683072
1790 07:41:21.968067 00080000 ################################################################
1791 07:41:21.968222
1792 07:41:22.250857 00100000 ################################################################
1793 07:41:22.251021
1794 07:41:22.534014 00180000 ################################################################
1795 07:41:22.534173
1796 07:41:22.816312 00200000 ################################################################
1797 07:41:22.816455
1798 07:41:23.097652 00280000 ################################################################
1799 07:41:23.097793
1800 07:41:23.379889 00300000 ################################################################
1801 07:41:23.380043
1802 07:41:23.659815 00380000 ################################################################
1803 07:41:23.659992
1804 07:41:23.937720 00400000 ################################################################
1805 07:41:23.937865
1806 07:41:24.215929 00480000 ################################################################
1807 07:41:24.216074
1808 07:41:24.495446 00500000 ################################################################
1809 07:41:24.495610
1810 07:41:24.774783 00580000 ################################################################
1811 07:41:24.774956
1812 07:41:25.053594 00600000 ################################################################
1813 07:41:25.053749
1814 07:41:25.331771 00680000 ################################################################
1815 07:41:25.331934
1816 07:41:25.607636 00700000 ################################################################
1817 07:41:25.607811
1818 07:41:25.885275 00780000 ################################################################
1819 07:41:25.885453
1820 07:41:25.982866 00800000 ####################### done.
1821 07:41:25.983024
1822 07:41:25.986324 The bootfile was 8572816 bytes long.
1823 07:41:25.986417
1824 07:41:25.989581 Sending tftp read request... done.
1825 07:41:25.992668
1826 07:41:25.992749 Waiting for the transfer...
1827 07:41:25.992828
1828 07:41:26.276401 00000000 ################################################################
1829 07:41:26.276583
1830 07:41:26.552841 00080000 ################################################################
1831 07:41:26.553009
1832 07:41:26.837268 00100000 ################################################################
1833 07:41:26.837454
1834 07:41:27.113735 00180000 ################################################################
1835 07:41:27.113923
1836 07:41:27.391525 00200000 ################################################################
1837 07:41:27.391691
1838 07:41:27.667413 00280000 ################################################################
1839 07:41:27.667560
1840 07:41:27.942933 00300000 ################################################################
1841 07:41:27.943074
1842 07:41:28.227632 00380000 ################################################################
1843 07:41:28.227796
1844 07:41:28.508872 00400000 ################################################################
1845 07:41:28.509054
1846 07:41:28.796274 00480000 ################################################################
1847 07:41:28.796414
1848 07:41:29.083442 00500000 ################################################################
1849 07:41:29.083582
1850 07:41:29.372345 00580000 ################################################################
1851 07:41:29.372486
1852 07:41:29.668679 00600000 ################################################################
1853 07:41:29.668838
1854 07:41:29.963722 00680000 ################################################################
1855 07:41:29.963893
1856 07:41:30.246776 00700000 ################################################################
1857 07:41:30.246943
1858 07:41:30.539872 00780000 ################################################################
1859 07:41:30.540008
1860 07:41:30.778810 00800000 ##################################################### done.
1861 07:41:30.778945
1862 07:41:30.781745 Sending tftp read request... done.
1863 07:41:30.781852
1864 07:41:30.785419 Waiting for the transfer...
1865 07:41:30.785525
1866 07:41:30.788224 00000000 # done.
1867 07:41:30.788318
1868 07:41:30.795066 Command line loaded dynamically from TFTP file: 12435208/tftp-deploy-hjty0v4c/kernel/cmdline
1869 07:41:30.798345
1870 07:41:30.811342 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1871 07:41:30.811457
1872 07:41:30.817790 ec_init: CrosEC protocol v3 supported (256, 256)
1873 07:41:30.823665
1874 07:41:30.827150 Shutting down all USB controllers.
1875 07:41:30.827254
1876 07:41:30.827350 Removing current net device
1877 07:41:30.827440
1878 07:41:30.830497 Finalizing coreboot
1879 07:41:30.830598
1880 07:41:30.837193 Exiting depthcharge with code 4 at timestamp: 18045554
1881 07:41:30.837353
1882 07:41:30.837457
1883 07:41:30.837558 Starting kernel ...
1884 07:41:30.837660
1885 07:41:30.837757
1886 07:41:30.838387 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1887 07:41:30.838524 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1888 07:41:30.838675 Setting prompt string to ['Linux version [0-9]']
1889 07:41:30.838782 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1890 07:41:30.838891 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1892 07:46:06.839391 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1894 07:46:06.841006 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1896 07:46:06.842341 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1899 07:46:06.844644 end: 2 depthcharge-action (duration 00:05:00) [common]
1901 07:46:06.846373 Cleaning after the job
1902 07:46:06.846980 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/ramdisk
1903 07:46:06.853545 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/kernel
1904 07:46:06.860482 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435208/tftp-deploy-hjty0v4c/modules
1905 07:46:06.862110 start: 5.1 power-off (timeout 00:00:30) [common]
1906 07:46:06.863028 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1907 07:46:06.954536 >> Command sent successfully.
1908 07:46:06.957086 Returned 0 in 0 seconds
1909 07:46:07.057849 end: 5.1 power-off (duration 00:00:00) [common]
1911 07:46:07.059671 start: 5.2 read-feedback (timeout 00:10:00) [common]
1912 07:46:07.060997 Listened to connection for namespace 'common' for up to 1s
1914 07:46:07.062778 Listened to connection for namespace 'common' for up to 1s
1915 07:46:08.061390 Finalising connection for namespace 'common'
1916 07:46:08.061579 Disconnecting from shell: Finalise
1917 07:46:08.061688
1918 07:46:08.162127 end: 5.2 read-feedback (duration 00:00:01) [common]
1919 07:46:08.162505 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435208
1920 07:46:08.183428 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435208
1921 07:46:08.183599 JobError: Your job cannot terminate cleanly.