Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:41:04.452984 lava-dispatcher, installed at version: 2023.10
2 07:41:04.453192 start: 0 validate
3 07:41:04.453321 Start time: 2024-01-03 07:41:04.453313+00:00 (UTC)
4 07:41:04.453438 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:41:04.453570 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:41:04.722998 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:41:04.723497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:41:04.995043 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:41:04.995942 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:41:05.275660 validate duration: 0.82
12 07:41:05.277492 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:41:05.278176 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:41:05.278702 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:41:05.279339 Not decompressing ramdisk as can be used compressed.
16 07:41:05.279917 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:41:05.280423 saving as /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/ramdisk/rootfs.cpio.gz
18 07:41:05.280792 total size: 8418130 (8 MB)
19 07:41:05.288392 progress 0 % (0 MB)
20 07:41:05.299350 progress 5 % (0 MB)
21 07:41:05.305892 progress 10 % (0 MB)
22 07:41:05.311213 progress 15 % (1 MB)
23 07:41:05.315561 progress 20 % (1 MB)
24 07:41:05.319463 progress 25 % (2 MB)
25 07:41:05.322685 progress 30 % (2 MB)
26 07:41:05.324735 progress 35 % (2 MB)
27 07:41:05.327120 progress 40 % (3 MB)
28 07:41:05.329413 progress 45 % (3 MB)
29 07:41:05.331703 progress 50 % (4 MB)
30 07:41:05.334157 progress 55 % (4 MB)
31 07:41:05.336419 progress 60 % (4 MB)
32 07:41:05.338517 progress 65 % (5 MB)
33 07:41:05.340766 progress 70 % (5 MB)
34 07:41:05.343053 progress 75 % (6 MB)
35 07:41:05.345203 progress 80 % (6 MB)
36 07:41:05.347387 progress 85 % (6 MB)
37 07:41:05.349529 progress 90 % (7 MB)
38 07:41:05.351768 progress 95 % (7 MB)
39 07:41:05.353805 progress 100 % (8 MB)
40 07:41:05.354041 8 MB downloaded in 0.07 s (109.57 MB/s)
41 07:41:05.354197 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:41:05.354436 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:41:05.354525 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:41:05.354609 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:41:05.354749 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:41:05.354826 saving as /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/kernel/bzImage
48 07:41:05.354887 total size: 8572816 (8 MB)
49 07:41:05.354947 No compression specified
50 07:41:05.356296 progress 0 % (0 MB)
51 07:41:05.358644 progress 5 % (0 MB)
52 07:41:05.360911 progress 10 % (0 MB)
53 07:41:05.363185 progress 15 % (1 MB)
54 07:41:05.365433 progress 20 % (1 MB)
55 07:41:05.367716 progress 25 % (2 MB)
56 07:41:05.369990 progress 30 % (2 MB)
57 07:41:05.372270 progress 35 % (2 MB)
58 07:41:05.374597 progress 40 % (3 MB)
59 07:41:05.376838 progress 45 % (3 MB)
60 07:41:05.379232 progress 50 % (4 MB)
61 07:41:05.381515 progress 55 % (4 MB)
62 07:41:05.383759 progress 60 % (4 MB)
63 07:41:05.386260 progress 65 % (5 MB)
64 07:41:05.388534 progress 70 % (5 MB)
65 07:41:05.390882 progress 75 % (6 MB)
66 07:41:05.393076 progress 80 % (6 MB)
67 07:41:05.395359 progress 85 % (6 MB)
68 07:41:05.397666 progress 90 % (7 MB)
69 07:41:05.399907 progress 95 % (7 MB)
70 07:41:05.402212 progress 100 % (8 MB)
71 07:41:05.402400 8 MB downloaded in 0.05 s (172.09 MB/s)
72 07:41:05.402541 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:41:05.402767 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:41:05.402858 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:41:05.402941 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:41:05.403079 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:41:05.403150 saving as /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/modules/modules.tar
79 07:41:05.403210 total size: 251144 (0 MB)
80 07:41:05.403271 Using unxz to decompress xz
81 07:41:05.407678 progress 13 % (0 MB)
82 07:41:05.408075 progress 26 % (0 MB)
83 07:41:05.408309 progress 39 % (0 MB)
84 07:41:05.410024 progress 52 % (0 MB)
85 07:41:05.411915 progress 65 % (0 MB)
86 07:41:05.413802 progress 78 % (0 MB)
87 07:41:05.415610 progress 91 % (0 MB)
88 07:41:05.417534 progress 100 % (0 MB)
89 07:41:05.422904 0 MB downloaded in 0.02 s (12.16 MB/s)
90 07:41:05.423135 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:41:05.423403 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:41:05.423503 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 07:41:05.423603 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 07:41:05.423688 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:41:05.423773 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 07:41:05.424036 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1
98 07:41:05.424221 makedir: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin
99 07:41:05.424331 makedir: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/tests
100 07:41:05.424432 makedir: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/results
101 07:41:05.424549 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-add-keys
102 07:41:05.424695 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-add-sources
103 07:41:05.424825 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-background-process-start
104 07:41:05.424953 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-background-process-stop
105 07:41:05.425078 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-common-functions
106 07:41:05.425204 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-echo-ipv4
107 07:41:05.425331 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-install-packages
108 07:41:05.425453 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-installed-packages
109 07:41:05.425577 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-os-build
110 07:41:05.425699 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-probe-channel
111 07:41:05.425821 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-probe-ip
112 07:41:05.425988 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-target-ip
113 07:41:05.426112 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-target-mac
114 07:41:05.426235 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-target-storage
115 07:41:05.426361 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-case
116 07:41:05.426484 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-event
117 07:41:05.426605 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-feedback
118 07:41:05.426725 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-raise
119 07:41:05.426877 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-reference
120 07:41:05.427050 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-runner
121 07:41:05.427207 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-set
122 07:41:05.427337 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-test-shell
123 07:41:05.427466 Updating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-install-packages (oe)
124 07:41:05.427618 Updating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/bin/lava-installed-packages (oe)
125 07:41:05.427744 Creating /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/environment
126 07:41:05.427844 LAVA metadata
127 07:41:05.427918 - LAVA_JOB_ID=12435227
128 07:41:05.427983 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:41:05.428083 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 07:41:05.428152 skipped lava-vland-overlay
131 07:41:05.428225 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:41:05.428303 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 07:41:05.428363 skipped lava-multinode-overlay
134 07:41:05.428432 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:41:05.428515 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 07:41:05.428587 Loading test definitions
137 07:41:05.428678 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 07:41:05.428750 Using /lava-12435227 at stage 0
139 07:41:05.429068 uuid=12435227_1.4.2.3.1 testdef=None
140 07:41:05.429154 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:41:05.429242 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 07:41:05.429771 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:41:05.430069 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 07:41:05.430752 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:41:05.430981 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 07:41:05.431593 runner path: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/0/tests/0_dmesg test_uuid 12435227_1.4.2.3.1
149 07:41:05.431746 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:41:05.431973 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 07:41:05.432043 Using /lava-12435227 at stage 1
153 07:41:05.432342 uuid=12435227_1.4.2.3.5 testdef=None
154 07:41:05.432429 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 07:41:05.432511 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 07:41:05.432981 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 07:41:05.433200 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 07:41:05.433970 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 07:41:05.434233 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 07:41:05.434859 runner path: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/1/tests/1_bootrr test_uuid 12435227_1.4.2.3.5
163 07:41:05.435010 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 07:41:05.435215 Creating lava-test-runner.conf files
166 07:41:05.435277 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/0 for stage 0
167 07:41:05.435363 - 0_dmesg
168 07:41:05.435440 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435227/lava-overlay-tvd7g4g1/lava-12435227/1 for stage 1
169 07:41:05.435527 - 1_bootrr
170 07:41:05.435618 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 07:41:05.435708 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 07:41:05.444412 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 07:41:05.444518 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 07:41:05.444603 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 07:41:05.444687 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 07:41:05.444771 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 07:41:05.695175 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 07:41:05.695536 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 07:41:05.695652 extracting modules file /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435227/extract-overlay-ramdisk-ocv27n7t/ramdisk
180 07:41:05.709042 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 07:41:05.709162 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 07:41:05.709250 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435227/compress-overlay-1wrp_szs/overlay-1.4.2.4.tar.gz to ramdisk
183 07:41:05.709320 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435227/compress-overlay-1wrp_szs/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435227/extract-overlay-ramdisk-ocv27n7t/ramdisk
184 07:41:05.718275 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 07:41:05.718393 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 07:41:05.718485 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 07:41:05.718582 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 07:41:05.718665 Building ramdisk /var/lib/lava/dispatcher/tmp/12435227/extract-overlay-ramdisk-ocv27n7t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435227/extract-overlay-ramdisk-ocv27n7t/ramdisk
189 07:41:05.844679 >> 49790 blocks
190 07:41:06.732950 rename /var/lib/lava/dispatcher/tmp/12435227/extract-overlay-ramdisk-ocv27n7t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
191 07:41:06.733363 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 07:41:06.733485 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 07:41:06.733588 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 07:41:06.733678 No mkimage arch provided, not using FIT.
195 07:41:06.733763 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 07:41:06.733849 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 07:41:06.733951 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 07:41:06.734045 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 07:41:06.734122 No LXC device requested
200 07:41:06.734202 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 07:41:06.734294 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 07:41:06.734377 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 07:41:06.734455 Checking files for TFTP limit of 4294967296 bytes.
204 07:41:06.734869 end: 1 tftp-deploy (duration 00:00:01) [common]
205 07:41:06.734973 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 07:41:06.735061 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 07:41:06.735178 substitutions:
208 07:41:06.735243 - {DTB}: None
209 07:41:06.735305 - {INITRD}: 12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
210 07:41:06.735363 - {KERNEL}: 12435227/tftp-deploy-vl5b7ix_/kernel/bzImage
211 07:41:06.735419 - {LAVA_MAC}: None
212 07:41:06.735475 - {PRESEED_CONFIG}: None
213 07:41:06.735530 - {PRESEED_LOCAL}: None
214 07:41:06.735622 - {RAMDISK}: 12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
215 07:41:06.735676 - {ROOT_PART}: None
216 07:41:06.735730 - {ROOT}: None
217 07:41:06.735783 - {SERVER_IP}: 192.168.201.1
218 07:41:06.735835 - {TEE}: None
219 07:41:06.735888 Parsed boot commands:
220 07:41:06.735941 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 07:41:06.736114 Parsed boot commands: tftpboot 192.168.201.1 12435227/tftp-deploy-vl5b7ix_/kernel/bzImage 12435227/tftp-deploy-vl5b7ix_/kernel/cmdline 12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
222 07:41:06.736201 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 07:41:06.736284 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 07:41:06.736374 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 07:41:06.736458 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 07:41:06.736527 Not connected, no need to disconnect.
227 07:41:06.736599 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 07:41:06.736683 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 07:41:06.736752 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
230 07:41:06.740778 Setting prompt string to ['lava-test: # ']
231 07:41:06.741130 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 07:41:06.741234 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 07:41:06.741331 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 07:41:06.741423 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 07:41:06.741615 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=reboot'
236 07:41:11.872643 >> Command sent successfully.
237 07:41:11.875182 Returned 0 in 5 seconds
238 07:41:11.975569 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 07:41:11.975888 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 07:41:11.975986 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 07:41:11.976092 Setting prompt string to 'Starting depthcharge on Volmar...'
243 07:41:11.976159 Changing prompt to 'Starting depthcharge on Volmar...'
244 07:41:11.976227 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 07:41:11.976488 [Enter `^Ec?' for help]
246 07:41:13.352545
247 07:41:13.352691
248 07:41:13.359415 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 07:41:13.362601 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 07:41:13.369201 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 07:41:13.372523 CPU: AES supported, TXT NOT supported, VT supported
252 07:41:13.382429 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 07:41:13.382514 Cache size = 10 MiB
254 07:41:13.386829 MCH: device id 4609 (rev 04) is Alderlake-P
255 07:41:13.393952 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 07:41:13.396951 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 07:41:13.400554 VBOOT: Loading verstage.
258 07:41:13.404654 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 07:41:13.411546 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 07:41:13.414604 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 07:41:13.424785 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 07:41:13.431398 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 07:41:13.431483
264 07:41:13.431548
265 07:41:13.441767 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 07:41:13.444936 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 07:41:13.449199 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 07:41:13.452372 done! DID_VID 0x00281ae0
269 07:41:13.455977 TPM ready after 0 ms
270 07:41:13.459283 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 07:41:13.472143 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
272 07:41:13.478936 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 07:41:13.531264 tlcl_send_startup: Startup return code is 0
274 07:41:13.531375 TPM: setup succeeded
275 07:41:13.553309 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 07:41:13.573474 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 07:41:13.579128 Chrome EC: UHEPI supported
278 07:41:13.582599 Reading cr50 boot mode
279 07:41:13.597409 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 07:41:13.597492 Phase 1
281 07:41:13.604261 FMAP: area GBB found @ 1805000 (458752 bytes)
282 07:41:13.610815 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 07:41:13.616975 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 07:41:13.623920 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 07:41:13.627179 Phase 2
286 07:41:13.627264 Phase 3
287 07:41:13.630478 FMAP: area GBB found @ 1805000 (458752 bytes)
288 07:41:13.637304 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 07:41:13.640490 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
290 07:41:13.647057 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 07:41:13.653461 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 07:41:13.660538 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 07:41:13.670567 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 07:41:13.682721 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
295 07:41:13.686030 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 07:41:13.692186 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 07:41:13.698935 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 07:41:13.705596 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 07:41:13.711966 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 07:41:13.716520 Phase 4
301 07:41:13.720108 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
302 07:41:13.726216 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 07:41:13.938730 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 07:41:13.945538 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 07:41:13.949071 Saving vboot hash.
306 07:41:13.955408 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 07:41:13.971601 tlcl_extend: response is 0
308 07:41:13.977877 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 07:41:13.984599 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 07:41:13.999043 tlcl_extend: response is 0
311 07:41:14.005492 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 07:41:14.027123 tlcl_lock_nv_write: response is 0
313 07:41:14.046552 tlcl_lock_nv_write: response is 0
314 07:41:14.046645 Slot A is selected
315 07:41:14.053002 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
316 07:41:14.059890 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
317 07:41:14.066147 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
318 07:41:14.073000 BS: verstage times (exec / console): total (unknown) / 256 ms
319 07:41:14.073110
320 07:41:14.073205
321 07:41:14.079393 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
322 07:41:14.083636 Google Chrome EC: version:
323 07:41:14.086939 ro: volmar_v2.0.14126-e605144e9c
324 07:41:14.090394 rw: volmar_v0.0.55-22d1557
325 07:41:14.093562 running image: 2
326 07:41:14.096803 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
327 07:41:14.107139 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 07:41:14.113341 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 07:41:14.119681 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
330 07:41:14.129974 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 07:41:14.139780 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
332 07:41:14.146341 EC took 1698us to calculate image hash
333 07:41:14.156393 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 07:41:14.159925 VB2:sync_ec() select_rw=RW(active)
335 07:41:14.169748 Waited 270us to clear limit power flag.
336 07:41:14.172895 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 07:41:14.176319 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 07:41:14.179596 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 07:41:14.186079 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
340 07:41:14.189474 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
341 07:41:14.192853 TCO_STS: 0000 0000
342 07:41:14.196042 GEN_PMCON: d0015038 00002200
343 07:41:14.199432 GBLRST_CAUSE: 00000000 00000000
344 07:41:14.199515 HPR_CAUSE0: 00000000
345 07:41:14.202717 prev_sleep_state 5
346 07:41:14.209218 Abort disabling TXT, as CPU is not TXT capable.
347 07:41:14.212896 cse_lite: Number of partitions = 3
348 07:41:14.216017 cse_lite: Current partition = RO
349 07:41:14.219314 cse_lite: Next partition = RO
350 07:41:14.222520 cse_lite: Flags = 0x7
351 07:41:14.229521 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
352 07:41:14.235972 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
353 07:41:14.242691 FMAP: area SI_ME found @ 1000 (5238784 bytes)
354 07:41:14.249048 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
355 07:41:14.252546 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
356 07:41:14.262732 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
357 07:41:14.266058 cse_lite: CSE CBFS RW version : 16.1.25.2049
358 07:41:14.269165 cse_lite: Set Boot Partition Info Command (RW)
359 07:41:14.277031 HECI: Global Reset(Type:1) Command
360 07:41:15.709217 �, TXT NOT supported, VT supported
361 07:41:15.715937 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
362 07:41:15.716027 Cache size = 10 MiB
363 07:41:15.722642 MCH: device id 4609 (rev 04) is Alderlake-P
364 07:41:15.726406 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
365 07:41:15.732672 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
366 07:41:15.736251 VBOOT: Loading verstage.
367 07:41:15.740054 FMAP: Found "FLASH" version 1.1 at 0x1804000.
368 07:41:15.743646 FMAP: base = 0x0 size = 0x2000000 #areas = 37
369 07:41:15.750068 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 07:41:15.757596 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
371 07:41:15.763843 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
372 07:41:15.767783
373 07:41:15.767868
374 07:41:15.774312 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
375 07:41:15.780621 Probing TPM I2C: I2C bus 1 version 0x3230302a
376 07:41:15.784282 DW I2C bus 1 at 0xfe022000 (400 KHz)
377 07:41:15.787617 done! DID_VID 0x00281ae0
378 07:41:15.791117 TPM ready after 0 ms
379 07:41:15.794269 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
380 07:41:15.803084 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
381 07:41:15.811470 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
382 07:41:15.867061 tlcl_send_startup: Startup return code is 0
383 07:41:15.867583 TPM: setup succeeded
384 07:41:15.888154 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
385 07:41:15.908611 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
386 07:41:15.912657 Chrome EC: UHEPI supported
387 07:41:15.915967 Reading cr50 boot mode
388 07:41:15.930713 Cr50 says boot_mode is VERIFIED_RW(0x00).
389 07:41:15.931200 Phase 1
390 07:41:15.937579 FMAP: area GBB found @ 1805000 (458752 bytes)
391 07:41:15.943729 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 07:41:15.950825 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 07:41:15.957125 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
394 07:41:15.960654 Phase 2
395 07:41:15.961120 Phase 3
396 07:41:15.963964 FMAP: area GBB found @ 1805000 (458752 bytes)
397 07:41:15.970651 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
398 07:41:15.974026 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
399 07:41:15.980514 VB2:vb2_verify_keyblock() Checking keyblock signature...
400 07:41:15.986980 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
401 07:41:15.993570 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
402 07:41:16.003762 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
403 07:41:16.015901 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 07:41:16.018913 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 07:41:16.025917 VB2:vb2_verify_fw_preamble() Verifying preamble.
406 07:41:16.032326 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
407 07:41:16.038986 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
408 07:41:16.045536 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
409 07:41:16.049411 Phase 4
410 07:41:16.052755 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
411 07:41:16.059795 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
412 07:41:16.272145 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
413 07:41:16.278507 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
414 07:41:16.281730 Saving vboot hash.
415 07:41:16.288409 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
416 07:41:16.304604 tlcl_extend: response is 0
417 07:41:16.311036 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
418 07:41:16.317577 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
419 07:41:16.332125 tlcl_extend: response is 0
420 07:41:16.338655 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
421 07:41:16.358641 tlcl_lock_nv_write: response is 0
422 07:41:16.378162 tlcl_lock_nv_write: response is 0
423 07:41:16.378710 Slot A is selected
424 07:41:16.384622 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
425 07:41:16.391406 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
426 07:41:16.397802 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
427 07:41:16.404527 BS: verstage times (exec / console): total (unknown) / 256 ms
428 07:41:16.404996
429 07:41:16.405362
430 07:41:16.410940 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
431 07:41:16.415682 Google Chrome EC: version:
432 07:41:16.418707 ro: volmar_v2.0.14126-e605144e9c
433 07:41:16.421712 rw: volmar_v0.0.55-22d1557
434 07:41:16.425057 running image: 2
435 07:41:16.428405 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 07:41:16.438556 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
437 07:41:16.445191 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
438 07:41:16.451663 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
439 07:41:16.461462 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
440 07:41:16.471682 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
441 07:41:16.474654 EC took 942us to calculate image hash
442 07:41:16.484539 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
443 07:41:16.488117 VB2:sync_ec() select_rw=RW(active)
444 07:41:16.508732 Waited 270us to clear limit power flag.
445 07:41:16.511835 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
446 07:41:16.514987 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
447 07:41:16.518468 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
448 07:41:16.525288 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
449 07:41:16.528590 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
450 07:41:16.531737 TCO_STS: 0000 0000
451 07:41:16.535200 GEN_PMCON: d1001038 00002200
452 07:41:16.538324 GBLRST_CAUSE: 00000040 00000000
453 07:41:16.538783 HPR_CAUSE0: 00000000
454 07:41:16.541701 prev_sleep_state 5
455 07:41:16.544869 Abort disabling TXT, as CPU is not TXT capable.
456 07:41:16.552867 cse_lite: Number of partitions = 3
457 07:41:16.556206 cse_lite: Current partition = RW
458 07:41:16.556647 cse_lite: Next partition = RW
459 07:41:16.559957 cse_lite: Flags = 0x7
460 07:41:16.566064 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
461 07:41:16.576472 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
462 07:41:16.579593 FMAP: area SI_ME found @ 1000 (5238784 bytes)
463 07:41:16.586234 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
464 07:41:16.593220 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
465 07:41:16.599453 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
466 07:41:16.602727 cse_lite: CSE CBFS RW version : 16.1.25.2049
467 07:41:16.606258 Boot Count incremented to 15763
468 07:41:16.612557 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
469 07:41:16.619854 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
470 07:41:16.632695 Probing TPM I2C: done! DID_VID 0x00281ae0
471 07:41:16.635935 Locality already claimed
472 07:41:16.639032 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
473 07:41:16.658805 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
474 07:41:16.665345 MRC: Hash idx 0x100d comparison successful.
475 07:41:16.668804 MRC cache found, size f6c8
476 07:41:16.669383 bootmode is set to: 2
477 07:41:16.672111 EC returned error result code 3
478 07:41:16.675871 FW_CONFIG value from CBI is 0x131
479 07:41:16.682347 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
480 07:41:16.685882 SPD index = 0
481 07:41:16.692110 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
482 07:41:16.692813 SPD: module type is LPDDR4X
483 07:41:16.699921 SPD: module part number is K4U6E3S4AB-MGCL
484 07:41:16.706215 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
485 07:41:16.709418 SPD: device width 16 bits, bus width 16 bits
486 07:41:16.712800 SPD: module size is 1024 MB (per channel)
487 07:41:16.781551 CBMEM:
488 07:41:16.784634 IMD: root @ 0x76fff000 254 entries.
489 07:41:16.787969 IMD: root @ 0x76ffec00 62 entries.
490 07:41:16.796525 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
491 07:41:16.799781 RO_VPD is uninitialized or empty.
492 07:41:16.802759 FMAP: area RW_VPD found @ f29000 (8192 bytes)
493 07:41:16.809151 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
494 07:41:16.812993 External stage cache:
495 07:41:16.816077 IMD: root @ 0x7bbff000 254 entries.
496 07:41:16.819784 IMD: root @ 0x7bbfec00 62 entries.
497 07:41:16.825918 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
498 07:41:16.833099 MRC: Checking cached data update for 'RW_MRC_CACHE'.
499 07:41:16.836442 MRC: 'RW_MRC_CACHE' does not need update.
500 07:41:16.836898 8 DIMMs found
501 07:41:16.839770 SMM Memory Map
502 07:41:16.842701 SMRAM : 0x7b800000 0x800000
503 07:41:16.846183 Subregion 0: 0x7b800000 0x200000
504 07:41:16.849256 Subregion 1: 0x7ba00000 0x200000
505 07:41:16.852624 Subregion 2: 0x7bc00000 0x400000
506 07:41:16.856339 top_of_ram = 0x77000000
507 07:41:16.859463 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
508 07:41:16.865693 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
509 07:41:16.872545 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
510 07:41:16.875913 MTRR Range: Start=ff000000 End=0 (Size 1000000)
511 07:41:16.876372 Normal boot
512 07:41:16.885767 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
513 07:41:16.892745 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
514 07:41:16.899388 Processing 237 relocs. Offset value of 0x74ab9000
515 07:41:16.907460 BS: romstage times (exec / console): total (unknown) / 377 ms
516 07:41:16.914792
517 07:41:16.915317
518 07:41:16.921319 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
519 07:41:16.921894 Normal boot
520 07:41:16.927790 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
521 07:41:16.934917 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
522 07:41:16.941192 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
523 07:41:16.951466 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
524 07:41:17.000322 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
525 07:41:17.006450 Processing 5931 relocs. Offset value of 0x72a2f000
526 07:41:17.010261 BS: postcar times (exec / console): total (unknown) / 51 ms
527 07:41:17.010743
528 07:41:17.013522
529 07:41:17.020153 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
530 07:41:17.023283 Reserving BERT start 76a1e000, size 10000
531 07:41:17.026630 Normal boot
532 07:41:17.030379 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
533 07:41:17.036841 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
534 07:41:17.047148 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
535 07:41:17.049774 FMAP: area RW_VPD found @ f29000 (8192 bytes)
536 07:41:17.053456 Google Chrome EC: version:
537 07:41:17.057105 ro: volmar_v2.0.14126-e605144e9c
538 07:41:17.060407 rw: volmar_v0.0.55-22d1557
539 07:41:17.063201 running image: 2
540 07:41:17.066614 ACPI _SWS is PM1 Index 8 GPE Index -1
541 07:41:17.069804 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
542 07:41:17.075281 EC returned error result code 3
543 07:41:17.078928 FW_CONFIG value from CBI is 0x131
544 07:41:17.085160 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
545 07:41:17.088723 PCI: 00:1c.2 disabled by fw_config
546 07:41:17.095294 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
547 07:41:17.098539 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
548 07:41:17.105500 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
549 07:41:17.108299 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
550 07:41:17.115220 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
551 07:41:17.121815 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
552 07:41:17.128341 microcode: sig=0x906a4 pf=0x80 revision=0x423
553 07:41:17.131657 microcode: Update skipped, already up-to-date
554 07:41:17.138184 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
555 07:41:17.170925 Detected 6 core, 8 thread CPU.
556 07:41:17.174260 Setting up SMI for CPU
557 07:41:17.177579 IED base = 0x7bc00000
558 07:41:17.178246 IED size = 0x00400000
559 07:41:17.181093 Will perform SMM setup.
560 07:41:17.184104 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
561 07:41:17.187687 LAPIC 0x0 in XAPIC mode.
562 07:41:17.197188 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
563 07:41:17.200691 Processing 18 relocs. Offset value of 0x00030000
564 07:41:17.205000 Attempting to start 7 APs
565 07:41:17.208962 Waiting for 10ms after sending INIT.
566 07:41:17.221466 Waiting for SIPI to complete...
567 07:41:17.225102 done.
568 07:41:17.225522 LAPIC 0x1 in XAPIC mode.
569 07:41:17.228169 LAPIC 0x10 in XAPIC mode.
570 07:41:17.231687 LAPIC 0x14 in XAPIC mode.
571 07:41:17.234999 AP: slot 7 apic_id 1, MCU rev: 0x00000423
572 07:41:17.238548 LAPIC 0x12 in XAPIC mode.
573 07:41:17.241672 AP: slot 1 apic_id 14, MCU rev: 0x00000423
574 07:41:17.244974 LAPIC 0x16 in XAPIC mode.
575 07:41:17.248153 AP: slot 4 apic_id 12, MCU rev: 0x00000423
576 07:41:17.255462 AP: slot 3 apic_id 10, MCU rev: 0x00000423
577 07:41:17.258338 AP: slot 2 apic_id 16, MCU rev: 0x00000423
578 07:41:17.261604 LAPIC 0x8 in XAPIC mode.
579 07:41:17.264858 LAPIC 0x9 in XAPIC mode.
580 07:41:17.268066 AP: slot 6 apic_id 8, MCU rev: 0x00000423
581 07:41:17.271513 AP: slot 5 apic_id 9, MCU rev: 0x00000423
582 07:41:17.274632 Waiting for SIPI to complete...
583 07:41:17.275055 done.
584 07:41:17.277962 smm_setup_relocation_handler: enter
585 07:41:17.281330 smm_setup_relocation_handler: exit
586 07:41:17.291668 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
587 07:41:17.294911 Processing 11 relocs. Offset value of 0x00038000
588 07:41:17.301584 smm_module_setup_stub: stack_top = 0x7b804000
589 07:41:17.304506 smm_module_setup_stub: per cpu stack_size = 0x800
590 07:41:17.311340 smm_module_setup_stub: runtime.start32_offset = 0x4c
591 07:41:17.314485 smm_module_setup_stub: runtime.smm_size = 0x10000
592 07:41:17.321282 SMM Module: stub loaded at 38000. Will call 0x76a52094
593 07:41:17.324408 Installing permanent SMM handler to 0x7b800000
594 07:41:17.331052 smm_load_module: total_smm_space_needed e468, available -> 200000
595 07:41:17.341447 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
596 07:41:17.344251 Processing 255 relocs. Offset value of 0x7b9f6000
597 07:41:17.350938 smm_load_module: smram_start: 0x7b800000
598 07:41:17.354558 smm_load_module: smram_end: 7ba00000
599 07:41:17.357744 smm_load_module: handler start 0x7b9f6d5f
600 07:41:17.361285 smm_load_module: handler_size 98d0
601 07:41:17.364552 smm_load_module: fxsave_area 0x7b9ff000
602 07:41:17.367685 smm_load_module: fxsave_size 1000
603 07:41:17.370826 smm_load_module: CONFIG_MSEG_SIZE 0x0
604 07:41:17.377745 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
605 07:41:17.384515 smm_load_module: handler_mod_params.smbase = 0x7b800000
606 07:41:17.387752 smm_load_module: per_cpu_save_state_size = 0x400
607 07:41:17.390948 smm_load_module: num_cpus = 0x8
608 07:41:17.397349 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
609 07:41:17.400920 smm_load_module: total_save_state_size = 0x2000
610 07:41:17.407395 smm_load_module: cpu0 entry: 7b9e6000
611 07:41:17.410555 smm_create_map: cpus allowed in one segment 30
612 07:41:17.414011 smm_create_map: min # of segments needed 1
613 07:41:17.414433 CPU 0x0
614 07:41:17.421197 smbase 7b9e6000 entry 7b9ee000
615 07:41:17.424421 ss_start 7b9f5c00 code_end 7b9ee208
616 07:41:17.424979 CPU 0x1
617 07:41:17.427642 smbase 7b9e5c00 entry 7b9edc00
618 07:41:17.434102 ss_start 7b9f5800 code_end 7b9ede08
619 07:41:17.434751 CPU 0x2
620 07:41:17.437370 smbase 7b9e5800 entry 7b9ed800
621 07:41:17.444161 ss_start 7b9f5400 code_end 7b9eda08
622 07:41:17.444764 CPU 0x3
623 07:41:17.447623 smbase 7b9e5400 entry 7b9ed400
624 07:41:17.450809 ss_start 7b9f5000 code_end 7b9ed608
625 07:41:17.454022 CPU 0x4
626 07:41:17.457405 smbase 7b9e5000 entry 7b9ed000
627 07:41:17.460398 ss_start 7b9f4c00 code_end 7b9ed208
628 07:41:17.460866 CPU 0x5
629 07:41:17.467342 smbase 7b9e4c00 entry 7b9ecc00
630 07:41:17.470288 ss_start 7b9f4800 code_end 7b9ece08
631 07:41:17.470761 CPU 0x6
632 07:41:17.473592 smbase 7b9e4800 entry 7b9ec800
633 07:41:17.480670 ss_start 7b9f4400 code_end 7b9eca08
634 07:41:17.481267 CPU 0x7
635 07:41:17.484140 smbase 7b9e4400 entry 7b9ec400
636 07:41:17.490533 ss_start 7b9f4000 code_end 7b9ec608
637 07:41:17.497250 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
638 07:41:17.504076 Processing 11 relocs. Offset value of 0x7b9ee000
639 07:41:17.507155 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
640 07:41:17.513776 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
641 07:41:17.520538 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
642 07:41:17.527038 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
643 07:41:17.533481 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
644 07:41:17.540428 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
645 07:41:17.547058 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
646 07:41:17.550224 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
647 07:41:17.556970 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
648 07:41:17.563452 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
649 07:41:17.570153 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
650 07:41:17.576863 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
651 07:41:17.583657 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
652 07:41:17.590091 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
653 07:41:17.596701 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
654 07:41:17.599952 smm_module_setup_stub: stack_top = 0x7b804000
655 07:41:17.606783 smm_module_setup_stub: per cpu stack_size = 0x800
656 07:41:17.609959 smm_module_setup_stub: runtime.start32_offset = 0x4c
657 07:41:17.616500 smm_module_setup_stub: runtime.smm_size = 0x200000
658 07:41:17.620383 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
659 07:41:17.625596 Clearing SMI status registers
660 07:41:17.628545 SMI_STS: PM1
661 07:41:17.629034 PM1_STS: WAK PWRBTN
662 07:41:17.638956 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
663 07:41:17.642421 In relocation handler: CPU 0
664 07:41:17.645570 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
665 07:41:17.649273 Writing SMRR. base = 0x7b800006, mask=0xff800c00
666 07:41:17.652655 Relocation complete.
667 07:41:17.658848 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
668 07:41:17.662535 In relocation handler: CPU 7
669 07:41:17.665625 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
670 07:41:17.669107 Relocation complete.
671 07:41:17.675398 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
672 07:41:17.678784 In relocation handler: CPU 2
673 07:41:17.682076 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
674 07:41:17.688578 Writing SMRR. base = 0x7b800006, mask=0xff800c00
675 07:41:17.689152 Relocation complete.
676 07:41:17.695371 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
677 07:41:17.698494 In relocation handler: CPU 1
678 07:41:17.701750 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
679 07:41:17.708951 Writing SMRR. base = 0x7b800006, mask=0xff800c00
680 07:41:17.712221 Relocation complete.
681 07:41:17.718836 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
682 07:41:17.721985 In relocation handler: CPU 3
683 07:41:17.725533 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
684 07:41:17.728436 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 07:41:17.731969 Relocation complete.
686 07:41:17.738565 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
687 07:41:17.741918 In relocation handler: CPU 4
688 07:41:17.745253 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
689 07:41:17.752101 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 07:41:17.752653 Relocation complete.
691 07:41:17.761803 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
692 07:41:17.762373 In relocation handler: CPU 6
693 07:41:17.768530 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
694 07:41:17.771492 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 07:41:17.775329 Relocation complete.
696 07:41:17.781716 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
697 07:41:17.784935 In relocation handler: CPU 5
698 07:41:17.787959 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
699 07:41:17.791591 Relocation complete.
700 07:41:17.792074 Initializing CPU #0
701 07:41:17.794661 CPU: vendor Intel device 906a4
702 07:41:17.798141 CPU: family 06, model 9a, stepping 04
703 07:41:17.801818 Clearing out pending MCEs
704 07:41:17.804590 cpu: energy policy set to 7
705 07:41:17.808298 Turbo is available but hidden
706 07:41:17.811503 Turbo is available and visible
707 07:41:17.815020 microcode: Update skipped, already up-to-date
708 07:41:17.818234 CPU #0 initialized
709 07:41:17.821573 Initializing CPU #7
710 07:41:17.822079 Initializing CPU #4
711 07:41:17.824820 Initializing CPU #1
712 07:41:17.825361 Initializing CPU #2
713 07:41:17.828193 CPU: vendor Intel device 906a4
714 07:41:17.831202 CPU: family 06, model 9a, stepping 04
715 07:41:17.834425 Initializing CPU #3
716 07:41:17.838350 Clearing out pending MCEs
717 07:41:17.841484 CPU: vendor Intel device 906a4
718 07:41:17.844705 CPU: family 06, model 9a, stepping 04
719 07:41:17.848319 Initializing CPU #5
720 07:41:17.851687 CPU: vendor Intel device 906a4
721 07:41:17.854992 CPU: family 06, model 9a, stepping 04
722 07:41:17.858287 CPU: vendor Intel device 906a4
723 07:41:17.861560 CPU: family 06, model 9a, stepping 04
724 07:41:17.864681 Clearing out pending MCEs
725 07:41:17.865218 CPU: vendor Intel device 906a4
726 07:41:17.871235 CPU: family 06, model 9a, stepping 04
727 07:41:17.874332 CPU: vendor Intel device 906a4
728 07:41:17.878256 CPU: family 06, model 9a, stepping 04
729 07:41:17.881398 cpu: energy policy set to 7
730 07:41:17.881963 Clearing out pending MCEs
731 07:41:17.884713 Clearing out pending MCEs
732 07:41:17.891217 microcode: Update skipped, already up-to-date
733 07:41:17.891680 CPU #1 initialized
734 07:41:17.894531 Clearing out pending MCEs
735 07:41:17.897727 cpu: energy policy set to 7
736 07:41:17.901068 cpu: energy policy set to 7
737 07:41:17.901596 cpu: energy policy set to 7
738 07:41:17.907828 microcode: Update skipped, already up-to-date
739 07:41:17.908366 CPU #3 initialized
740 07:41:17.914436 microcode: Update skipped, already up-to-date
741 07:41:17.914999 CPU #2 initialized
742 07:41:17.921198 microcode: Update skipped, already up-to-date
743 07:41:17.921665 CPU #4 initialized
744 07:41:17.924814 cpu: energy policy set to 7
745 07:41:17.927434 Clearing out pending MCEs
746 07:41:17.931204 microcode: Update skipped, already up-to-date
747 07:41:17.934707 CPU #7 initialized
748 07:41:17.937591 cpu: energy policy set to 7
749 07:41:17.938109 Initializing CPU #6
750 07:41:17.944367 microcode: Update skipped, already up-to-date
751 07:41:17.944836 CPU #5 initialized
752 07:41:17.947764 CPU: vendor Intel device 906a4
753 07:41:17.954086 CPU: family 06, model 9a, stepping 04
754 07:41:17.954644 Clearing out pending MCEs
755 07:41:17.957394 cpu: energy policy set to 7
756 07:41:17.964319 microcode: Update skipped, already up-to-date
757 07:41:17.964895 CPU #6 initialized
758 07:41:17.967480 bsp_do_flight_plan done after 689 msecs.
759 07:41:17.970857 CPU: frequency set to 4400 MHz
760 07:41:17.973950 Enabling SMIs.
761 07:41:17.980422 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
762 07:41:17.996387 Probing TPM I2C: done! DID_VID 0x00281ae0
763 07:41:17.999730 Locality already claimed
764 07:41:18.002506 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
765 07:41:18.014317 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
766 07:41:18.017606 Enabling GPIO PM b/c CR50 has long IRQ pulse support
767 07:41:18.023944 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
768 07:41:18.030652 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
769 07:41:18.034583 Found a VBT of 9216 bytes after decompression
770 07:41:18.037302 PCI 1.0, PIN A, using IRQ #16
771 07:41:18.040767 PCI 2.0, PIN A, using IRQ #17
772 07:41:18.044112 PCI 4.0, PIN A, using IRQ #18
773 07:41:18.047356 PCI 5.0, PIN A, using IRQ #16
774 07:41:18.051023 PCI 6.0, PIN A, using IRQ #16
775 07:41:18.054319 PCI 6.2, PIN C, using IRQ #18
776 07:41:18.057411 PCI 7.0, PIN A, using IRQ #19
777 07:41:18.060739 PCI 7.1, PIN B, using IRQ #20
778 07:41:18.063661 PCI 7.2, PIN C, using IRQ #21
779 07:41:18.067206 PCI 7.3, PIN D, using IRQ #22
780 07:41:18.070882 PCI 8.0, PIN A, using IRQ #23
781 07:41:18.074010 PCI D.0, PIN A, using IRQ #17
782 07:41:18.077137 PCI D.1, PIN B, using IRQ #19
783 07:41:18.077579 PCI 10.0, PIN A, using IRQ #24
784 07:41:18.080333 PCI 10.1, PIN B, using IRQ #25
785 07:41:18.083805 PCI 10.6, PIN C, using IRQ #20
786 07:41:18.086984 PCI 10.7, PIN D, using IRQ #21
787 07:41:18.090803 PCI 11.0, PIN A, using IRQ #26
788 07:41:18.094036 PCI 11.1, PIN B, using IRQ #27
789 07:41:18.097677 PCI 11.2, PIN C, using IRQ #28
790 07:41:18.100601 PCI 11.3, PIN D, using IRQ #29
791 07:41:18.103966 PCI 12.0, PIN A, using IRQ #30
792 07:41:18.106964 PCI 12.6, PIN B, using IRQ #31
793 07:41:18.110239 PCI 12.7, PIN C, using IRQ #22
794 07:41:18.113711 PCI 13.0, PIN A, using IRQ #32
795 07:41:18.117290 PCI 13.1, PIN B, using IRQ #33
796 07:41:18.120717 PCI 13.2, PIN C, using IRQ #34
797 07:41:18.123821 PCI 13.3, PIN D, using IRQ #35
798 07:41:18.126989 PCI 14.0, PIN B, using IRQ #23
799 07:41:18.130407 PCI 14.1, PIN A, using IRQ #36
800 07:41:18.130893 PCI 14.3, PIN C, using IRQ #17
801 07:41:18.133645 PCI 15.0, PIN A, using IRQ #37
802 07:41:18.137228 PCI 15.1, PIN B, using IRQ #38
803 07:41:18.140409 PCI 15.2, PIN C, using IRQ #39
804 07:41:18.143995 PCI 15.3, PIN D, using IRQ #40
805 07:41:18.146849 PCI 16.0, PIN A, using IRQ #18
806 07:41:18.150038 PCI 16.1, PIN B, using IRQ #19
807 07:41:18.154129 PCI 16.2, PIN C, using IRQ #20
808 07:41:18.157363 PCI 16.3, PIN D, using IRQ #21
809 07:41:18.160676 PCI 16.4, PIN A, using IRQ #18
810 07:41:18.163500 PCI 16.5, PIN B, using IRQ #19
811 07:41:18.166901 PCI 17.0, PIN A, using IRQ #22
812 07:41:18.170311 PCI 19.0, PIN A, using IRQ #41
813 07:41:18.173299 PCI 19.1, PIN B, using IRQ #42
814 07:41:18.176726 PCI 19.2, PIN C, using IRQ #43
815 07:41:18.180048 PCI 1C.0, PIN A, using IRQ #16
816 07:41:18.183776 PCI 1C.1, PIN B, using IRQ #17
817 07:41:18.184534 PCI 1C.2, PIN C, using IRQ #18
818 07:41:18.187188 PCI 1C.3, PIN D, using IRQ #19
819 07:41:18.189911 PCI 1C.4, PIN A, using IRQ #16
820 07:41:18.193476 PCI 1C.5, PIN B, using IRQ #17
821 07:41:18.196764 PCI 1C.6, PIN C, using IRQ #18
822 07:41:18.199999 PCI 1C.7, PIN D, using IRQ #19
823 07:41:18.203513 PCI 1D.0, PIN A, using IRQ #16
824 07:41:18.206464 PCI 1D.1, PIN B, using IRQ #17
825 07:41:18.210270 PCI 1D.2, PIN C, using IRQ #18
826 07:41:18.213642 PCI 1D.3, PIN D, using IRQ #19
827 07:41:18.217053 PCI 1E.0, PIN A, using IRQ #23
828 07:41:18.220268 PCI 1E.1, PIN B, using IRQ #20
829 07:41:18.223313 PCI 1E.2, PIN C, using IRQ #44
830 07:41:18.226427 PCI 1E.3, PIN D, using IRQ #45
831 07:41:18.229912 PCI 1F.3, PIN B, using IRQ #22
832 07:41:18.233252 PCI 1F.4, PIN C, using IRQ #23
833 07:41:18.236603 PCI 1F.6, PIN D, using IRQ #20
834 07:41:18.237081 PCI 1F.7, PIN A, using IRQ #21
835 07:41:18.242995 IRQ: Using dynamically assigned PCI IO-APIC IRQs
836 07:41:18.249622 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
837 07:41:18.429566 FSPS returned 0
838 07:41:18.432887 Executing Phase 1 of FspMultiPhaseSiInit
839 07:41:18.442695 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
840 07:41:18.446237 port C0 DISC req: usage 1 usb3 1 usb2 1
841 07:41:18.449530 Raw Buffer output 0 00000111
842 07:41:18.452677 Raw Buffer output 1 00000000
843 07:41:18.456245 pmc_send_ipc_cmd succeeded
844 07:41:18.463304 port C1 DISC req: usage 1 usb3 3 usb2 3
845 07:41:18.463876 Raw Buffer output 0 00000331
846 07:41:18.466560 Raw Buffer output 1 00000000
847 07:41:18.470609 pmc_send_ipc_cmd succeeded
848 07:41:18.474444 Detected 6 core, 8 thread CPU.
849 07:41:18.477657 Detected 6 core, 8 thread CPU.
850 07:41:18.483005 Detected 6 core, 8 thread CPU.
851 07:41:18.486160 Detected 6 core, 8 thread CPU.
852 07:41:18.489627 Detected 6 core, 8 thread CPU.
853 07:41:18.492682 Detected 6 core, 8 thread CPU.
854 07:41:18.496367 Detected 6 core, 8 thread CPU.
855 07:41:18.499737 Detected 6 core, 8 thread CPU.
856 07:41:18.502863 Detected 6 core, 8 thread CPU.
857 07:41:18.506132 Detected 6 core, 8 thread CPU.
858 07:41:18.509252 Detected 6 core, 8 thread CPU.
859 07:41:18.512263 Detected 6 core, 8 thread CPU.
860 07:41:18.515740 Detected 6 core, 8 thread CPU.
861 07:41:18.519358 Detected 6 core, 8 thread CPU.
862 07:41:18.522754 Detected 6 core, 8 thread CPU.
863 07:41:18.525582 Detected 6 core, 8 thread CPU.
864 07:41:18.528933 Detected 6 core, 8 thread CPU.
865 07:41:18.532631 Detected 6 core, 8 thread CPU.
866 07:41:18.535546 Detected 6 core, 8 thread CPU.
867 07:41:18.539040 Detected 6 core, 8 thread CPU.
868 07:41:18.542404 Detected 6 core, 8 thread CPU.
869 07:41:18.545701 Detected 6 core, 8 thread CPU.
870 07:41:18.825988 Detected 6 core, 8 thread CPU.
871 07:41:18.829210 Detected 6 core, 8 thread CPU.
872 07:41:18.832950 Detected 6 core, 8 thread CPU.
873 07:41:18.836052 Detected 6 core, 8 thread CPU.
874 07:41:18.839711 Detected 6 core, 8 thread CPU.
875 07:41:18.842730 Detected 6 core, 8 thread CPU.
876 07:41:18.845925 Detected 6 core, 8 thread CPU.
877 07:41:18.849152 Detected 6 core, 8 thread CPU.
878 07:41:18.852755 Detected 6 core, 8 thread CPU.
879 07:41:18.856114 Detected 6 core, 8 thread CPU.
880 07:41:18.859367 Detected 6 core, 8 thread CPU.
881 07:41:18.862484 Detected 6 core, 8 thread CPU.
882 07:41:18.866290 Detected 6 core, 8 thread CPU.
883 07:41:18.869440 Detected 6 core, 8 thread CPU.
884 07:41:18.872602 Detected 6 core, 8 thread CPU.
885 07:41:18.875913 Detected 6 core, 8 thread CPU.
886 07:41:18.879447 Detected 6 core, 8 thread CPU.
887 07:41:18.883168 Detected 6 core, 8 thread CPU.
888 07:41:18.886114 Detected 6 core, 8 thread CPU.
889 07:41:18.886688 Detected 6 core, 8 thread CPU.
890 07:41:18.889825 Display FSP Version Info HOB
891 07:41:18.892850 Reference Code - CPU = c.0.65.70
892 07:41:18.896260 uCode Version = 0.0.4.23
893 07:41:18.899449 TXT ACM version = ff.ff.ff.ffff
894 07:41:18.902753 Reference Code - ME = c.0.65.70
895 07:41:18.906332 MEBx version = 0.0.0.0
896 07:41:18.909399 ME Firmware Version = Lite SKU
897 07:41:18.912943 Reference Code - PCH = c.0.65.70
898 07:41:18.916285 PCH-CRID Status = Disabled
899 07:41:18.919570 PCH-CRID Original Value = ff.ff.ff.ffff
900 07:41:18.922689 PCH-CRID New Value = ff.ff.ff.ffff
901 07:41:18.926457 OPROM - RST - RAID = ff.ff.ff.ffff
902 07:41:18.929606 PCH Hsio Version = 4.0.0.0
903 07:41:18.932781 Reference Code - SA - System Agent = c.0.65.70
904 07:41:18.936178 Reference Code - MRC = 0.0.3.80
905 07:41:18.939465 SA - PCIe Version = c.0.65.70
906 07:41:18.942763 SA-CRID Status = Disabled
907 07:41:18.945868 SA-CRID Original Value = 0.0.0.4
908 07:41:18.949369 SA-CRID New Value = 0.0.0.4
909 07:41:18.952802 OPROM - VBIOS = ff.ff.ff.ffff
910 07:41:18.956204 IO Manageability Engine FW Version = 24.0.4.0
911 07:41:18.960485 PHY Build Version = 0.0.0.2016
912 07:41:18.963050 Thunderbolt(TM) FW Version = 0.0.0.0
913 07:41:18.969452 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
914 07:41:18.975757 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
915 07:41:18.979066 Enumerating buses...
916 07:41:18.982320 Show all devs... Before device enumeration.
917 07:41:18.985630 Root Device: enabled 1
918 07:41:18.986096 CPU_CLUSTER: 0: enabled 1
919 07:41:18.989096 DOMAIN: 0000: enabled 1
920 07:41:18.992034 GPIO: 0: enabled 1
921 07:41:18.992460 PCI: 00:00.0: enabled 1
922 07:41:18.995736 PCI: 00:01.0: enabled 0
923 07:41:18.998845 PCI: 00:01.1: enabled 0
924 07:41:19.002303 PCI: 00:02.0: enabled 1
925 07:41:19.002724 PCI: 00:04.0: enabled 1
926 07:41:19.005667 PCI: 00:05.0: enabled 0
927 07:41:19.008690 PCI: 00:06.0: enabled 1
928 07:41:19.012163 PCI: 00:06.2: enabled 0
929 07:41:19.012581 PCI: 00:07.0: enabled 0
930 07:41:19.015439 PCI: 00:07.1: enabled 0
931 07:41:19.019034 PCI: 00:07.2: enabled 0
932 07:41:19.022005 PCI: 00:07.3: enabled 0
933 07:41:19.022423 PCI: 00:08.0: enabled 0
934 07:41:19.025576 PCI: 00:09.0: enabled 0
935 07:41:19.028686 PCI: 00:0a.0: enabled 1
936 07:41:19.029174 PCI: 00:0d.0: enabled 1
937 07:41:19.031918 PCI: 00:0d.1: enabled 0
938 07:41:19.036054 PCI: 00:0d.2: enabled 0
939 07:41:19.038916 PCI: 00:0d.3: enabled 0
940 07:41:19.039395 PCI: 00:0e.0: enabled 0
941 07:41:19.042282 PCI: 00:10.0: enabled 0
942 07:41:19.045592 PCI: 00:10.1: enabled 0
943 07:41:19.049026 PCI: 00:10.6: enabled 0
944 07:41:19.049580 PCI: 00:10.7: enabled 0
945 07:41:19.052126 PCI: 00:12.0: enabled 0
946 07:41:19.055769 PCI: 00:12.6: enabled 0
947 07:41:19.059274 PCI: 00:12.7: enabled 0
948 07:41:19.059794 PCI: 00:13.0: enabled 0
949 07:41:19.062086 PCI: 00:14.0: enabled 1
950 07:41:19.065675 PCI: 00:14.1: enabled 0
951 07:41:19.066268 PCI: 00:14.2: enabled 1
952 07:41:19.068810 PCI: 00:14.3: enabled 1
953 07:41:19.072558 PCI: 00:15.0: enabled 1
954 07:41:19.075106 PCI: 00:15.1: enabled 1
955 07:41:19.075659 PCI: 00:15.2: enabled 0
956 07:41:19.078601 PCI: 00:15.3: enabled 1
957 07:41:19.082125 PCI: 00:16.0: enabled 1
958 07:41:19.085502 PCI: 00:16.1: enabled 0
959 07:41:19.086032 PCI: 00:16.2: enabled 0
960 07:41:19.089142 PCI: 00:16.3: enabled 0
961 07:41:19.092446 PCI: 00:16.4: enabled 0
962 07:41:19.095465 PCI: 00:16.5: enabled 0
963 07:41:19.095902 PCI: 00:17.0: enabled 1
964 07:41:19.098721 PCI: 00:19.0: enabled 0
965 07:41:19.101960 PCI: 00:19.1: enabled 1
966 07:41:19.105477 PCI: 00:19.2: enabled 0
967 07:41:19.105932 PCI: 00:1a.0: enabled 0
968 07:41:19.108618 PCI: 00:1c.0: enabled 0
969 07:41:19.111905 PCI: 00:1c.1: enabled 0
970 07:41:19.112417 PCI: 00:1c.2: enabled 0
971 07:41:19.115151 PCI: 00:1c.3: enabled 0
972 07:41:19.118566 PCI: 00:1c.4: enabled 0
973 07:41:19.121793 PCI: 00:1c.5: enabled 0
974 07:41:19.122313 PCI: 00:1c.6: enabled 0
975 07:41:19.125258 PCI: 00:1c.7: enabled 0
976 07:41:19.128385 PCI: 00:1d.0: enabled 0
977 07:41:19.131809 PCI: 00:1d.1: enabled 0
978 07:41:19.132272 PCI: 00:1d.2: enabled 0
979 07:41:19.135137 PCI: 00:1d.3: enabled 0
980 07:41:19.138381 PCI: 00:1e.0: enabled 1
981 07:41:19.141702 PCI: 00:1e.1: enabled 0
982 07:41:19.142367 PCI: 00:1e.2: enabled 0
983 07:41:19.145376 PCI: 00:1e.3: enabled 1
984 07:41:19.148458 PCI: 00:1f.0: enabled 1
985 07:41:19.148920 PCI: 00:1f.1: enabled 0
986 07:41:19.151904 PCI: 00:1f.2: enabled 1
987 07:41:19.155198 PCI: 00:1f.3: enabled 1
988 07:41:19.158589 PCI: 00:1f.4: enabled 0
989 07:41:19.159158 PCI: 00:1f.5: enabled 1
990 07:41:19.161836 PCI: 00:1f.6: enabled 0
991 07:41:19.165487 PCI: 00:1f.7: enabled 0
992 07:41:19.168616 GENERIC: 0.0: enabled 1
993 07:41:19.169185 GENERIC: 0.0: enabled 1
994 07:41:19.172010 GENERIC: 1.0: enabled 1
995 07:41:19.174906 GENERIC: 0.0: enabled 1
996 07:41:19.178313 GENERIC: 1.0: enabled 1
997 07:41:19.178771 USB0 port 0: enabled 1
998 07:41:19.181896 USB0 port 0: enabled 1
999 07:41:19.185165 GENERIC: 0.0: enabled 1
1000 07:41:19.185623 I2C: 00:1a: enabled 1
1001 07:41:19.188329 I2C: 00:31: enabled 1
1002 07:41:19.191918 I2C: 00:32: enabled 1
1003 07:41:19.192452 I2C: 00:50: enabled 1
1004 07:41:19.195330 I2C: 00:10: enabled 1
1005 07:41:19.198300 I2C: 00:15: enabled 1
1006 07:41:19.198913 I2C: 00:2c: enabled 1
1007 07:41:19.201479 GENERIC: 0.0: enabled 1
1008 07:41:19.204767 SPI: 00: enabled 1
1009 07:41:19.205315 PNP: 0c09.0: enabled 1
1010 07:41:19.208130 GENERIC: 0.0: enabled 1
1011 07:41:19.211747 USB3 port 0: enabled 1
1012 07:41:19.214826 USB3 port 1: enabled 0
1013 07:41:19.215287 USB3 port 2: enabled 1
1014 07:41:19.218180 USB3 port 3: enabled 0
1015 07:41:19.221548 USB2 port 0: enabled 1
1016 07:41:19.222204 USB2 port 1: enabled 0
1017 07:41:19.225079 USB2 port 2: enabled 1
1018 07:41:19.228228 USB2 port 3: enabled 0
1019 07:41:19.231330 USB2 port 4: enabled 0
1020 07:41:19.231792 USB2 port 5: enabled 1
1021 07:41:19.235001 USB2 port 6: enabled 0
1022 07:41:19.238121 USB2 port 7: enabled 0
1023 07:41:19.238582 USB2 port 8: enabled 1
1024 07:41:19.241988 USB2 port 9: enabled 1
1025 07:41:19.244978 USB3 port 0: enabled 1
1026 07:41:19.247919 USB3 port 1: enabled 0
1027 07:41:19.248397 USB3 port 2: enabled 0
1028 07:41:19.251112 USB3 port 3: enabled 0
1029 07:41:19.254850 GENERIC: 0.0: enabled 1
1030 07:41:19.255305 GENERIC: 1.0: enabled 1
1031 07:41:19.258178 APIC: 00: enabled 1
1032 07:41:19.261294 APIC: 14: enabled 1
1033 07:41:19.261747 APIC: 16: enabled 1
1034 07:41:19.264515 APIC: 10: enabled 1
1035 07:41:19.264967 APIC: 12: enabled 1
1036 07:41:19.268315 APIC: 09: enabled 1
1037 07:41:19.271708 APIC: 08: enabled 1
1038 07:41:19.272163 APIC: 01: enabled 1
1039 07:41:19.274867 Compare with tree...
1040 07:41:19.278089 Root Device: enabled 1
1041 07:41:19.281466 CPU_CLUSTER: 0: enabled 1
1042 07:41:19.281963 APIC: 00: enabled 1
1043 07:41:19.284580 APIC: 14: enabled 1
1044 07:41:19.288055 APIC: 16: enabled 1
1045 07:41:19.288536 APIC: 10: enabled 1
1046 07:41:19.291561 APIC: 12: enabled 1
1047 07:41:19.294632 APIC: 09: enabled 1
1048 07:41:19.295088 APIC: 08: enabled 1
1049 07:41:19.297705 APIC: 01: enabled 1
1050 07:41:19.301550 DOMAIN: 0000: enabled 1
1051 07:41:19.302059 GPIO: 0: enabled 1
1052 07:41:19.304760 PCI: 00:00.0: enabled 1
1053 07:41:19.307947 PCI: 00:01.0: enabled 0
1054 07:41:19.311164 PCI: 00:01.1: enabled 0
1055 07:41:19.314679 PCI: 00:02.0: enabled 1
1056 07:41:19.315275 PCI: 00:04.0: enabled 1
1057 07:41:19.317806 GENERIC: 0.0: enabled 1
1058 07:41:19.321001 PCI: 00:05.0: enabled 0
1059 07:41:19.324331 PCI: 00:06.0: enabled 1
1060 07:41:19.328073 PCI: 00:06.2: enabled 0
1061 07:41:19.328529 PCI: 00:08.0: enabled 0
1062 07:41:19.331335 PCI: 00:09.0: enabled 0
1063 07:41:19.334477 PCI: 00:0a.0: enabled 1
1064 07:41:19.337831 PCI: 00:0d.0: enabled 1
1065 07:41:19.338287 USB0 port 0: enabled 1
1066 07:41:19.341165 USB3 port 0: enabled 1
1067 07:41:19.344996 USB3 port 1: enabled 0
1068 07:41:19.347914 USB3 port 2: enabled 1
1069 07:41:19.351153 USB3 port 3: enabled 0
1070 07:41:19.354379 PCI: 00:0d.1: enabled 0
1071 07:41:19.354795 PCI: 00:0d.2: enabled 0
1072 07:41:19.357867 PCI: 00:0d.3: enabled 0
1073 07:41:19.360981 PCI: 00:0e.0: enabled 0
1074 07:41:19.364409 PCI: 00:10.0: enabled 0
1075 07:41:19.367665 PCI: 00:10.1: enabled 0
1076 07:41:19.368077 PCI: 00:10.6: enabled 0
1077 07:41:19.370988 PCI: 00:10.7: enabled 0
1078 07:41:19.374216 PCI: 00:12.0: enabled 0
1079 07:41:19.377713 PCI: 00:12.6: enabled 0
1080 07:41:19.380885 PCI: 00:12.7: enabled 0
1081 07:41:19.381391 PCI: 00:13.0: enabled 0
1082 07:41:19.384200 PCI: 00:14.0: enabled 1
1083 07:41:19.387448 USB0 port 0: enabled 1
1084 07:41:19.391011 USB2 port 0: enabled 1
1085 07:41:19.394182 USB2 port 1: enabled 0
1086 07:41:19.394663 USB2 port 2: enabled 1
1087 07:41:19.397540 USB2 port 3: enabled 0
1088 07:41:19.401044 USB2 port 4: enabled 0
1089 07:41:19.404076 USB2 port 5: enabled 1
1090 07:41:19.407452 USB2 port 6: enabled 0
1091 07:41:19.407867 USB2 port 7: enabled 0
1092 07:41:19.411091 USB2 port 8: enabled 1
1093 07:41:19.413943 USB2 port 9: enabled 1
1094 07:41:19.417546 USB3 port 0: enabled 1
1095 07:41:19.420847 USB3 port 1: enabled 0
1096 07:41:19.424333 USB3 port 2: enabled 0
1097 07:41:19.424749 USB3 port 3: enabled 0
1098 07:41:19.427876 PCI: 00:14.1: enabled 0
1099 07:41:19.430859 PCI: 00:14.2: enabled 1
1100 07:41:19.434000 PCI: 00:14.3: enabled 1
1101 07:41:19.437453 GENERIC: 0.0: enabled 1
1102 07:41:19.438102 PCI: 00:15.0: enabled 1
1103 07:41:19.440419 I2C: 00:1a: enabled 1
1104 07:41:19.444303 I2C: 00:31: enabled 1
1105 07:41:19.447113 I2C: 00:32: enabled 1
1106 07:41:19.450654 PCI: 00:15.1: enabled 1
1107 07:41:19.451069 I2C: 00:50: enabled 1
1108 07:41:19.453943 PCI: 00:15.2: enabled 0
1109 07:41:19.457204 PCI: 00:15.3: enabled 1
1110 07:41:19.460860 I2C: 00:10: enabled 1
1111 07:41:19.461274 PCI: 00:16.0: enabled 1
1112 07:41:19.464064 PCI: 00:16.1: enabled 0
1113 07:41:19.467401 PCI: 00:16.2: enabled 0
1114 07:41:19.471142 PCI: 00:16.3: enabled 0
1115 07:41:19.473834 PCI: 00:16.4: enabled 0
1116 07:41:19.474299 PCI: 00:16.5: enabled 0
1117 07:41:19.477292 PCI: 00:17.0: enabled 1
1118 07:41:19.480856 PCI: 00:19.0: enabled 0
1119 07:41:19.484150 PCI: 00:19.1: enabled 1
1120 07:41:19.487312 I2C: 00:15: enabled 1
1121 07:41:19.487835 I2C: 00:2c: enabled 1
1122 07:41:19.490794 PCI: 00:19.2: enabled 0
1123 07:41:19.494071 PCI: 00:1a.0: enabled 0
1124 07:41:19.497297 PCI: 00:1e.0: enabled 1
1125 07:41:19.497726 PCI: 00:1e.1: enabled 0
1126 07:41:19.500419 PCI: 00:1e.2: enabled 0
1127 07:41:19.504060 PCI: 00:1e.3: enabled 1
1128 07:41:19.507454 SPI: 00: enabled 1
1129 07:41:19.510260 PCI: 00:1f.0: enabled 1
1130 07:41:19.510685 PNP: 0c09.0: enabled 1
1131 07:41:19.513767 PCI: 00:1f.1: enabled 0
1132 07:41:19.516985 PCI: 00:1f.2: enabled 1
1133 07:41:19.520898 GENERIC: 0.0: enabled 1
1134 07:41:19.524025 GENERIC: 0.0: enabled 1
1135 07:41:19.524488 GENERIC: 1.0: enabled 1
1136 07:41:19.527479 PCI: 00:1f.3: enabled 1
1137 07:41:19.530551 PCI: 00:1f.4: enabled 0
1138 07:41:19.533998 PCI: 00:1f.5: enabled 1
1139 07:41:19.537003 PCI: 00:1f.6: enabled 0
1140 07:41:19.537450 PCI: 00:1f.7: enabled 0
1141 07:41:19.540274 Root Device scanning...
1142 07:41:19.544191 scan_static_bus for Root Device
1143 07:41:19.547417 CPU_CLUSTER: 0 enabled
1144 07:41:19.547833 DOMAIN: 0000 enabled
1145 07:41:19.550411 DOMAIN: 0000 scanning...
1146 07:41:19.553937 PCI: pci_scan_bus for bus 00
1147 07:41:19.556855 PCI: 00:00.0 [8086/0000] ops
1148 07:41:19.560784 PCI: 00:00.0 [8086/4609] enabled
1149 07:41:19.564091 PCI: 00:02.0 [8086/0000] bus ops
1150 07:41:19.567204 PCI: 00:02.0 [8086/46b3] enabled
1151 07:41:19.570527 PCI: 00:04.0 [8086/0000] bus ops
1152 07:41:19.573652 PCI: 00:04.0 [8086/461d] enabled
1153 07:41:19.577412 PCI: 00:06.0 [8086/0000] bus ops
1154 07:41:19.580558 PCI: 00:06.0 [8086/464d] enabled
1155 07:41:19.583713 PCI: 00:08.0 [8086/464f] disabled
1156 07:41:19.587599 PCI: 00:0a.0 [8086/467d] enabled
1157 07:41:19.590546 PCI: 00:0d.0 [8086/0000] bus ops
1158 07:41:19.593950 PCI: 00:0d.0 [8086/461e] enabled
1159 07:41:19.596840 PCI: 00:14.0 [8086/0000] bus ops
1160 07:41:19.600244 PCI: 00:14.0 [8086/51ed] enabled
1161 07:41:19.603912 PCI: 00:14.2 [8086/51ef] enabled
1162 07:41:19.607397 PCI: 00:14.3 [8086/0000] bus ops
1163 07:41:19.610308 PCI: 00:14.3 [8086/51f0] enabled
1164 07:41:19.613631 PCI: 00:15.0 [8086/0000] bus ops
1165 07:41:19.616779 PCI: 00:15.0 [8086/51e8] enabled
1166 07:41:19.620347 PCI: 00:15.1 [8086/0000] bus ops
1167 07:41:19.624242 PCI: 00:15.1 [8086/51e9] enabled
1168 07:41:19.627395 PCI: 00:15.2 [8086/0000] bus ops
1169 07:41:19.630114 PCI: 00:15.2 [8086/51ea] disabled
1170 07:41:19.633529 PCI: 00:15.3 [8086/0000] bus ops
1171 07:41:19.637071 PCI: 00:15.3 [8086/51eb] enabled
1172 07:41:19.640207 PCI: 00:16.0 [8086/0000] ops
1173 07:41:19.643381 PCI: 00:16.0 [8086/51e0] enabled
1174 07:41:19.650291 PCI: Static device PCI: 00:17.0 not found, disabling it.
1175 07:41:19.653778 PCI: 00:19.0 [8086/0000] bus ops
1176 07:41:19.656786 PCI: 00:19.0 [8086/51c5] disabled
1177 07:41:19.660685 PCI: 00:19.1 [8086/0000] bus ops
1178 07:41:19.663567 PCI: 00:19.1 [8086/51c6] enabled
1179 07:41:19.666851 PCI: 00:1e.0 [8086/0000] ops
1180 07:41:19.670546 PCI: 00:1e.0 [8086/51a8] enabled
1181 07:41:19.673762 PCI: 00:1e.3 [8086/0000] bus ops
1182 07:41:19.676645 PCI: 00:1e.3 [8086/51ab] enabled
1183 07:41:19.680295 PCI: 00:1f.0 [8086/0000] bus ops
1184 07:41:19.683359 PCI: 00:1f.0 [8086/5182] enabled
1185 07:41:19.686592 RTC Init
1186 07:41:19.690233 Set power on after power failure.
1187 07:41:19.690845 Disabling Deep S3
1188 07:41:19.693836 Disabling Deep S3
1189 07:41:19.696529 Disabling Deep S4
1190 07:41:19.697067 Disabling Deep S4
1191 07:41:19.699725 Disabling Deep S5
1192 07:41:19.700262 Disabling Deep S5
1193 07:41:19.703621 PCI: 00:1f.2 [0000/0000] hidden
1194 07:41:19.706845 PCI: 00:1f.3 [8086/0000] bus ops
1195 07:41:19.709816 PCI: 00:1f.3 [8086/51c8] enabled
1196 07:41:19.713262 PCI: 00:1f.5 [8086/0000] bus ops
1197 07:41:19.716767 PCI: 00:1f.5 [8086/51a4] enabled
1198 07:41:19.720210 GPIO: 0 enabled
1199 07:41:19.723351 PCI: Leftover static devices:
1200 07:41:19.723980 PCI: 00:01.0
1201 07:41:19.724421 PCI: 00:01.1
1202 07:41:19.726806 PCI: 00:05.0
1203 07:41:19.727421 PCI: 00:06.2
1204 07:41:19.729970 PCI: 00:09.0
1205 07:41:19.730628 PCI: 00:0d.1
1206 07:41:19.733195 PCI: 00:0d.2
1207 07:41:19.733648 PCI: 00:0d.3
1208 07:41:19.734075 PCI: 00:0e.0
1209 07:41:19.736551 PCI: 00:10.0
1210 07:41:19.736951 PCI: 00:10.1
1211 07:41:19.740052 PCI: 00:10.6
1212 07:41:19.740668 PCI: 00:10.7
1213 07:41:19.741141 PCI: 00:12.0
1214 07:41:19.743088 PCI: 00:12.6
1215 07:41:19.743540 PCI: 00:12.7
1216 07:41:19.746551 PCI: 00:13.0
1217 07:41:19.747006 PCI: 00:14.1
1218 07:41:19.747366 PCI: 00:16.1
1219 07:41:19.749891 PCI: 00:16.2
1220 07:41:19.750479 PCI: 00:16.3
1221 07:41:19.753084 PCI: 00:16.4
1222 07:41:19.753665 PCI: 00:16.5
1223 07:41:19.756247 PCI: 00:17.0
1224 07:41:19.756821 PCI: 00:19.2
1225 07:41:19.757379 PCI: 00:1a.0
1226 07:41:19.760172 PCI: 00:1e.1
1227 07:41:19.760629 PCI: 00:1e.2
1228 07:41:19.763324 PCI: 00:1f.1
1229 07:41:19.763872 PCI: 00:1f.4
1230 07:41:19.764237 PCI: 00:1f.6
1231 07:41:19.766526 PCI: 00:1f.7
1232 07:41:19.769720 PCI: Check your devicetree.cb.
1233 07:41:19.773284 PCI: 00:02.0 scanning...
1234 07:41:19.776436 scan_generic_bus for PCI: 00:02.0
1235 07:41:19.779723 scan_generic_bus for PCI: 00:02.0 done
1236 07:41:19.783049 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1237 07:41:19.786337 PCI: 00:04.0 scanning...
1238 07:41:19.790088 scan_generic_bus for PCI: 00:04.0
1239 07:41:19.793126 GENERIC: 0.0 enabled
1240 07:41:19.796457 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1241 07:41:19.803106 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1242 07:41:19.806310 PCI: 00:06.0 scanning...
1243 07:41:19.809625 do_pci_scan_bridge for PCI: 00:06.0
1244 07:41:19.812824 PCI: pci_scan_bus for bus 01
1245 07:41:19.816117 PCI: 01:00.0 [15b7/5009] enabled
1246 07:41:19.820062 Enabling Common Clock Configuration
1247 07:41:19.823040 L1 Sub-State supported from root port 6
1248 07:41:19.826110 L1 Sub-State Support = 0x5
1249 07:41:19.829440 CommonModeRestoreTime = 0x6e
1250 07:41:19.833063 Power On Value = 0x5, Power On Scale = 0x2
1251 07:41:19.833542 ASPM: Enabled L1
1252 07:41:19.839383 PCIe: Max_Payload_Size adjusted to 256
1253 07:41:19.839971 PCI: 01:00.0: Enabled LTR
1254 07:41:19.846299 PCI: 01:00.0: Programmed LTR max latencies
1255 07:41:19.849805 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1256 07:41:19.852814 PCI: 00:0d.0 scanning...
1257 07:41:19.856195 scan_static_bus for PCI: 00:0d.0
1258 07:41:19.859664 USB0 port 0 enabled
1259 07:41:19.860104 USB0 port 0 scanning...
1260 07:41:19.863053 scan_static_bus for USB0 port 0
1261 07:41:19.866424 USB3 port 0 enabled
1262 07:41:19.867067 USB3 port 1 disabled
1263 07:41:19.869738 USB3 port 2 enabled
1264 07:41:19.872902 USB3 port 3 disabled
1265 07:41:19.873410 USB3 port 0 scanning...
1266 07:41:19.876123 scan_static_bus for USB3 port 0
1267 07:41:19.882593 scan_static_bus for USB3 port 0 done
1268 07:41:19.886371 scan_bus: bus USB3 port 0 finished in 6 msecs
1269 07:41:19.889471 USB3 port 2 scanning...
1270 07:41:19.892869 scan_static_bus for USB3 port 2
1271 07:41:19.896033 scan_static_bus for USB3 port 2 done
1272 07:41:19.899627 scan_bus: bus USB3 port 2 finished in 6 msecs
1273 07:41:19.902649 scan_static_bus for USB0 port 0 done
1274 07:41:19.909625 scan_bus: bus USB0 port 0 finished in 43 msecs
1275 07:41:19.912884 scan_static_bus for PCI: 00:0d.0 done
1276 07:41:19.916046 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1277 07:41:19.919250 PCI: 00:14.0 scanning...
1278 07:41:19.922528 scan_static_bus for PCI: 00:14.0
1279 07:41:19.926114 USB0 port 0 enabled
1280 07:41:19.926573 USB0 port 0 scanning...
1281 07:41:19.929110 scan_static_bus for USB0 port 0
1282 07:41:19.932939 USB2 port 0 enabled
1283 07:41:19.935909 USB2 port 1 disabled
1284 07:41:19.936367 USB2 port 2 enabled
1285 07:41:19.939205 USB2 port 3 disabled
1286 07:41:19.942528 USB2 port 4 disabled
1287 07:41:19.942987 USB2 port 5 enabled
1288 07:41:19.945693 USB2 port 6 disabled
1289 07:41:19.946196 USB2 port 7 disabled
1290 07:41:19.949413 USB2 port 8 enabled
1291 07:41:19.952700 USB2 port 9 enabled
1292 07:41:19.953242 USB3 port 0 enabled
1293 07:41:19.956714 USB3 port 1 disabled
1294 07:41:19.959020 USB3 port 2 disabled
1295 07:41:19.959529 USB3 port 3 disabled
1296 07:41:19.962423 USB2 port 0 scanning...
1297 07:41:19.965953 scan_static_bus for USB2 port 0
1298 07:41:19.969278 scan_static_bus for USB2 port 0 done
1299 07:41:19.972584 scan_bus: bus USB2 port 0 finished in 6 msecs
1300 07:41:19.975949 USB2 port 2 scanning...
1301 07:41:19.979118 scan_static_bus for USB2 port 2
1302 07:41:19.982398 scan_static_bus for USB2 port 2 done
1303 07:41:19.989555 scan_bus: bus USB2 port 2 finished in 6 msecs
1304 07:41:19.990154 USB2 port 5 scanning...
1305 07:41:19.992673 scan_static_bus for USB2 port 5
1306 07:41:19.995843 scan_static_bus for USB2 port 5 done
1307 07:41:20.002228 scan_bus: bus USB2 port 5 finished in 6 msecs
1308 07:41:20.005953 USB2 port 8 scanning...
1309 07:41:20.008997 scan_static_bus for USB2 port 8
1310 07:41:20.012694 scan_static_bus for USB2 port 8 done
1311 07:41:20.015772 scan_bus: bus USB2 port 8 finished in 6 msecs
1312 07:41:20.018939 USB2 port 9 scanning...
1313 07:41:20.022262 scan_static_bus for USB2 port 9
1314 07:41:20.025357 scan_static_bus for USB2 port 9 done
1315 07:41:20.029474 scan_bus: bus USB2 port 9 finished in 6 msecs
1316 07:41:20.032351 USB3 port 0 scanning...
1317 07:41:20.035557 scan_static_bus for USB3 port 0
1318 07:41:20.038900 scan_static_bus for USB3 port 0 done
1319 07:41:20.042430 scan_bus: bus USB3 port 0 finished in 6 msecs
1320 07:41:20.048781 scan_static_bus for USB0 port 0 done
1321 07:41:20.052056 scan_bus: bus USB0 port 0 finished in 120 msecs
1322 07:41:20.055271 scan_static_bus for PCI: 00:14.0 done
1323 07:41:20.062177 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1324 07:41:20.062640 PCI: 00:14.3 scanning...
1325 07:41:20.065586 scan_static_bus for PCI: 00:14.3
1326 07:41:20.068889 GENERIC: 0.0 enabled
1327 07:41:20.072266 scan_static_bus for PCI: 00:14.3 done
1328 07:41:20.079015 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1329 07:41:20.079462 PCI: 00:15.0 scanning...
1330 07:41:20.082066 scan_static_bus for PCI: 00:15.0
1331 07:41:20.085710 I2C: 00:1a enabled
1332 07:41:20.089031 I2C: 00:31 enabled
1333 07:41:20.089760 I2C: 00:32 enabled
1334 07:41:20.092120 scan_static_bus for PCI: 00:15.0 done
1335 07:41:20.098885 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1336 07:41:20.101945 PCI: 00:15.1 scanning...
1337 07:41:20.105325 scan_static_bus for PCI: 00:15.1
1338 07:41:20.105783 I2C: 00:50 enabled
1339 07:41:20.109196 scan_static_bus for PCI: 00:15.1 done
1340 07:41:20.114958 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1341 07:41:20.115424 PCI: 00:15.3 scanning...
1342 07:41:20.118508 scan_static_bus for PCI: 00:15.3
1343 07:41:20.121915 I2C: 00:10 enabled
1344 07:41:20.125020 scan_static_bus for PCI: 00:15.3 done
1345 07:41:20.131819 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1346 07:41:20.132420 PCI: 00:19.1 scanning...
1347 07:41:20.135532 scan_static_bus for PCI: 00:19.1
1348 07:41:20.138543 I2C: 00:15 enabled
1349 07:41:20.142005 I2C: 00:2c enabled
1350 07:41:20.145182 scan_static_bus for PCI: 00:19.1 done
1351 07:41:20.148791 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1352 07:41:20.151649 PCI: 00:1e.3 scanning...
1353 07:41:20.155008 scan_generic_bus for PCI: 00:1e.3
1354 07:41:20.155466 SPI: 00 enabled
1355 07:41:20.161707 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1356 07:41:20.168436 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1357 07:41:20.169000 PCI: 00:1f.0 scanning...
1358 07:41:20.171850 scan_static_bus for PCI: 00:1f.0
1359 07:41:20.174874 PNP: 0c09.0 enabled
1360 07:41:20.178482 PNP: 0c09.0 scanning...
1361 07:41:20.181720 scan_static_bus for PNP: 0c09.0
1362 07:41:20.185099 scan_static_bus for PNP: 0c09.0 done
1363 07:41:20.188403 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1364 07:41:20.191751 scan_static_bus for PCI: 00:1f.0 done
1365 07:41:20.198102 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1366 07:41:20.201327 PCI: 00:1f.2 scanning...
1367 07:41:20.204966 scan_static_bus for PCI: 00:1f.2
1368 07:41:20.205462 GENERIC: 0.0 enabled
1369 07:41:20.208388 GENERIC: 0.0 scanning...
1370 07:41:20.211721 scan_static_bus for GENERIC: 0.0
1371 07:41:20.214568 GENERIC: 0.0 enabled
1372 07:41:20.215067 GENERIC: 1.0 enabled
1373 07:41:20.218000 scan_static_bus for GENERIC: 0.0 done
1374 07:41:20.224979 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1375 07:41:20.227961 scan_static_bus for PCI: 00:1f.2 done
1376 07:41:20.231195 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1377 07:41:20.234530 PCI: 00:1f.3 scanning...
1378 07:41:20.238506 scan_static_bus for PCI: 00:1f.3
1379 07:41:20.241551 scan_static_bus for PCI: 00:1f.3 done
1380 07:41:20.248233 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1381 07:41:20.251605 PCI: 00:1f.5 scanning...
1382 07:41:20.255027 scan_generic_bus for PCI: 00:1f.5
1383 07:41:20.258199 scan_generic_bus for PCI: 00:1f.5 done
1384 07:41:20.261508 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1385 07:41:20.267858 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1386 07:41:20.271424 scan_static_bus for Root Device done
1387 07:41:20.274402 scan_bus: bus Root Device finished in 729 msecs
1388 07:41:20.274966 done
1389 07:41:20.281218 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1390 07:41:20.287938 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1391 07:41:20.294347 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1392 07:41:20.298110 SPI flash protection: WPSW=0 SRP0=0
1393 07:41:20.300981 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1394 07:41:20.307672 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1395 07:41:20.310909 found VGA at PCI: 00:02.0
1396 07:41:20.314730 Setting up VGA for PCI: 00:02.0
1397 07:41:20.318040 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1398 07:41:20.324576 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1399 07:41:20.327964 Allocating resources...
1400 07:41:20.328430 Reading resources...
1401 07:41:20.334220 Root Device read_resources bus 0 link: 0
1402 07:41:20.337894 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1403 07:41:20.341271 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1404 07:41:20.347651 DOMAIN: 0000 read_resources bus 0 link: 0
1405 07:41:20.354188 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1406 07:41:20.357646 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1407 07:41:20.364559 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1408 07:41:20.371040 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1409 07:41:20.377306 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1410 07:41:20.384203 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1411 07:41:20.390904 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1412 07:41:20.397512 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1413 07:41:20.403856 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1414 07:41:20.410773 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1415 07:41:20.417390 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1416 07:41:20.424041 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1417 07:41:20.427165 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1418 07:41:20.434282 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1419 07:41:20.440268 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1420 07:41:20.447034 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1421 07:41:20.453942 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1422 07:41:20.460848 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1423 07:41:20.467011 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1424 07:41:20.474079 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1425 07:41:20.477229 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1426 07:41:20.483832 PCI: 00:04.0 read_resources bus 1 link: 0
1427 07:41:20.487463 PCI: 00:04.0 read_resources bus 1 link: 0 done
1428 07:41:20.490563 PCI: 00:06.0 read_resources bus 1 link: 0
1429 07:41:20.497217 PCI: 00:06.0 read_resources bus 1 link: 0 done
1430 07:41:20.500542 PCI: 00:0d.0 read_resources bus 0 link: 0
1431 07:41:20.503795 USB0 port 0 read_resources bus 0 link: 0
1432 07:41:20.510134 USB0 port 0 read_resources bus 0 link: 0 done
1433 07:41:20.513434 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1434 07:41:20.517281 PCI: 00:14.0 read_resources bus 0 link: 0
1435 07:41:20.523563 USB0 port 0 read_resources bus 0 link: 0
1436 07:41:20.526845 USB0 port 0 read_resources bus 0 link: 0 done
1437 07:41:20.533280 PCI: 00:14.0 read_resources bus 0 link: 0 done
1438 07:41:20.537270 PCI: 00:14.3 read_resources bus 0 link: 0
1439 07:41:20.540519 PCI: 00:14.3 read_resources bus 0 link: 0 done
1440 07:41:20.546825 PCI: 00:15.0 read_resources bus 0 link: 0
1441 07:41:20.550266 PCI: 00:15.0 read_resources bus 0 link: 0 done
1442 07:41:20.553234 PCI: 00:15.1 read_resources bus 0 link: 0
1443 07:41:20.560131 PCI: 00:15.1 read_resources bus 0 link: 0 done
1444 07:41:20.563423 PCI: 00:15.3 read_resources bus 0 link: 0
1445 07:41:20.566662 PCI: 00:15.3 read_resources bus 0 link: 0 done
1446 07:41:20.573360 PCI: 00:19.1 read_resources bus 0 link: 0
1447 07:41:20.576774 PCI: 00:19.1 read_resources bus 0 link: 0 done
1448 07:41:20.579934 PCI: 00:1e.3 read_resources bus 2 link: 0
1449 07:41:20.586693 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1450 07:41:20.589755 PCI: 00:1f.0 read_resources bus 0 link: 0
1451 07:41:20.596539 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1452 07:41:20.599919 PCI: 00:1f.2 read_resources bus 0 link: 0
1453 07:41:20.603509 GENERIC: 0.0 read_resources bus 0 link: 0
1454 07:41:20.606719 GENERIC: 0.0 read_resources bus 0 link: 0 done
1455 07:41:20.613000 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1456 07:41:20.617035 DOMAIN: 0000 read_resources bus 0 link: 0 done
1457 07:41:20.623482 Root Device read_resources bus 0 link: 0 done
1458 07:41:20.626420 Done reading resources.
1459 07:41:20.629605 Show resources in subtree (Root Device)...After reading.
1460 07:41:20.636713 Root Device child on link 0 CPU_CLUSTER: 0
1461 07:41:20.639542 CPU_CLUSTER: 0 child on link 0 APIC: 00
1462 07:41:20.639996 APIC: 00
1463 07:41:20.643220 APIC: 14
1464 07:41:20.643674 APIC: 16
1465 07:41:20.644034 APIC: 10
1466 07:41:20.646501 APIC: 12
1467 07:41:20.646954 APIC: 09
1468 07:41:20.649996 APIC: 08
1469 07:41:20.650551 APIC: 01
1470 07:41:20.653592 DOMAIN: 0000 child on link 0 GPIO: 0
1471 07:41:20.663495 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1472 07:41:20.673109 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1473 07:41:20.673689 GPIO: 0
1474 07:41:20.676402 PCI: 00:00.0
1475 07:41:20.686448 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1476 07:41:20.692963 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1477 07:41:20.702821 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1478 07:41:20.712864 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1479 07:41:20.722589 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1480 07:41:20.732475 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1481 07:41:20.742809 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1482 07:41:20.749407 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1483 07:41:20.759140 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1484 07:41:20.769279 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1485 07:41:20.778924 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1486 07:41:20.788939 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1487 07:41:20.798810 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1488 07:41:20.809364 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1489 07:41:20.815477 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1490 07:41:20.825690 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1491 07:41:20.835236 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1492 07:41:20.845203 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1493 07:41:20.855378 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1494 07:41:20.865640 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1495 07:41:20.875704 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1496 07:41:20.882223 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1497 07:41:20.892349 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1498 07:41:20.902021 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1499 07:41:20.912105 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1500 07:41:20.922213 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1501 07:41:20.931825 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1502 07:41:20.942062 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1503 07:41:20.942625 PCI: 00:02.0
1504 07:41:20.951596 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1505 07:41:20.965380 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1506 07:41:20.971863 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1507 07:41:20.975006 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1508 07:41:20.984811 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1509 07:41:20.988226 GENERIC: 0.0
1510 07:41:20.991248 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1511 07:41:21.001779 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1512 07:41:21.011618 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1513 07:41:21.021511 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1514 07:41:21.022131 PCI: 01:00.0
1515 07:41:21.031769 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1516 07:41:21.041067 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1517 07:41:21.044545 PCI: 00:08.0
1518 07:41:21.045000 PCI: 00:0a.0
1519 07:41:21.054382 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1520 07:41:21.057558 PCI: 00:0d.0 child on link 0 USB0 port 0
1521 07:41:21.071124 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1522 07:41:21.074414 USB0 port 0 child on link 0 USB3 port 0
1523 07:41:21.074874 USB3 port 0
1524 07:41:21.077650 USB3 port 1
1525 07:41:21.078131 USB3 port 2
1526 07:41:21.080763 USB3 port 3
1527 07:41:21.084592 PCI: 00:14.0 child on link 0 USB0 port 0
1528 07:41:21.094495 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1529 07:41:21.100661 USB0 port 0 child on link 0 USB2 port 0
1530 07:41:21.101121 USB2 port 0
1531 07:41:21.104770 USB2 port 1
1532 07:41:21.105254 USB2 port 2
1533 07:41:21.107855 USB2 port 3
1534 07:41:21.108337 USB2 port 4
1535 07:41:21.111172 USB2 port 5
1536 07:41:21.111657 USB2 port 6
1537 07:41:21.114271 USB2 port 7
1538 07:41:21.114746 USB2 port 8
1539 07:41:21.117991 USB2 port 9
1540 07:41:21.118449 USB3 port 0
1541 07:41:21.121397 USB3 port 1
1542 07:41:21.124753 USB3 port 2
1543 07:41:21.125315 USB3 port 3
1544 07:41:21.127591 PCI: 00:14.2
1545 07:41:21.137819 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1546 07:41:21.147716 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1547 07:41:21.150993 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1548 07:41:21.160933 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1549 07:41:21.161460 GENERIC: 0.0
1550 07:41:21.167700 PCI: 00:15.0 child on link 0 I2C: 00:1a
1551 07:41:21.177287 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1552 07:41:21.177815 I2C: 00:1a
1553 07:41:21.181172 I2C: 00:31
1554 07:41:21.181723 I2C: 00:32
1555 07:41:21.184192 PCI: 00:15.1 child on link 0 I2C: 00:50
1556 07:41:21.194067 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1557 07:41:21.197275 I2C: 00:50
1558 07:41:21.197730 PCI: 00:15.2
1559 07:41:21.204206 PCI: 00:15.3 child on link 0 I2C: 00:10
1560 07:41:21.214006 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 07:41:21.214475 I2C: 00:10
1562 07:41:21.217531 PCI: 00:16.0
1563 07:41:21.227405 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 07:41:21.227934 PCI: 00:19.0
1565 07:41:21.230535 PCI: 00:19.1 child on link 0 I2C: 00:15
1566 07:41:21.240384 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 07:41:21.243779 I2C: 00:15
1568 07:41:21.244328 I2C: 00:2c
1569 07:41:21.247521 PCI: 00:1e.0
1570 07:41:21.256564 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1571 07:41:21.259897 PCI: 00:1e.3 child on link 0 SPI: 00
1572 07:41:21.270176 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 07:41:21.274034 SPI: 00
1574 07:41:21.277180 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1575 07:41:21.287320 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1576 07:41:21.287864 PNP: 0c09.0
1577 07:41:21.297033 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1578 07:41:21.300197 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1579 07:41:21.310341 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1580 07:41:21.320176 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1581 07:41:21.323820 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1582 07:41:21.326751 GENERIC: 0.0
1583 07:41:21.327213 GENERIC: 1.0
1584 07:41:21.329982 PCI: 00:1f.3
1585 07:41:21.340526 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1586 07:41:21.349942 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1587 07:41:21.350480 PCI: 00:1f.5
1588 07:41:21.360387 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1589 07:41:21.367203 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1590 07:41:21.373514 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1591 07:41:21.380125 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1592 07:41:21.386384 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1593 07:41:21.390445 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1594 07:41:21.393582 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1595 07:41:21.403196 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1596 07:41:21.410057 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1597 07:41:21.416601 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1598 07:41:21.423219 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1599 07:41:21.430202 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1600 07:41:21.436483 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1601 07:41:21.446747 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1602 07:41:21.453147 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1603 07:41:21.456526 DOMAIN: 0000: Resource ranges:
1604 07:41:21.459974 * Base: 1000, Size: 800, Tag: 100
1605 07:41:21.463190 * Base: 1900, Size: e700, Tag: 100
1606 07:41:21.469569 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1607 07:41:21.476314 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1608 07:41:21.482705 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1609 07:41:21.489295 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1610 07:41:21.495932 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1611 07:41:21.506024 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1612 07:41:21.512437 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1613 07:41:21.519530 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1614 07:41:21.529235 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1615 07:41:21.536270 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1616 07:41:21.542463 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1617 07:41:21.552697 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1618 07:41:21.559292 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1619 07:41:21.565797 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1620 07:41:21.575953 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1621 07:41:21.581963 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1622 07:41:21.589016 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1623 07:41:21.598851 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1624 07:41:21.605383 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1625 07:41:21.611913 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1626 07:41:21.621660 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1627 07:41:21.628661 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1628 07:41:21.635257 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1629 07:41:21.645120 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1630 07:41:21.651649 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1631 07:41:21.658588 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1632 07:41:21.668211 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1633 07:41:21.674846 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1634 07:41:21.681457 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1635 07:41:21.691529 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1636 07:41:21.698138 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1637 07:41:21.704816 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1638 07:41:21.714741 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1639 07:41:21.718429 DOMAIN: 0000: Resource ranges:
1640 07:41:21.721470 * Base: 80400000, Size: 3fc00000, Tag: 200
1641 07:41:21.724267 * Base: d0000000, Size: 28000000, Tag: 200
1642 07:41:21.731457 * Base: fa000000, Size: 1000000, Tag: 200
1643 07:41:21.734439 * Base: fb001000, Size: 17ff000, Tag: 200
1644 07:41:21.737740 * Base: fe800000, Size: 300000, Tag: 200
1645 07:41:21.740994 * Base: feb80000, Size: 80000, Tag: 200
1646 07:41:21.747874 * Base: fed00000, Size: 40000, Tag: 200
1647 07:41:21.750893 * Base: fed70000, Size: 10000, Tag: 200
1648 07:41:21.754029 * Base: fed88000, Size: 8000, Tag: 200
1649 07:41:21.757427 * Base: fed93000, Size: d000, Tag: 200
1650 07:41:21.760762 * Base: feda2000, Size: 1e000, Tag: 200
1651 07:41:21.767688 * Base: fede0000, Size: 1220000, Tag: 200
1652 07:41:21.770685 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1653 07:41:21.777299 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1654 07:41:21.784312 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1655 07:41:21.790819 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1656 07:41:21.797373 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1657 07:41:21.804023 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1658 07:41:21.810510 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1659 07:41:21.816977 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1660 07:41:21.823768 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1661 07:41:21.830674 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1662 07:41:21.837346 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1663 07:41:21.843587 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1664 07:41:21.850014 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1665 07:41:21.856708 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1666 07:41:21.863373 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1667 07:41:21.870073 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1668 07:41:21.877073 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1669 07:41:21.886881 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1670 07:41:21.893581 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1671 07:41:21.899843 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1672 07:41:21.906644 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1673 07:41:21.912964 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1674 07:41:21.916317 PCI: 00:06.0: Resource ranges:
1675 07:41:21.919492 * Base: 80400000, Size: 100000, Tag: 200
1676 07:41:21.926068 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1677 07:41:21.933413 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1678 07:41:21.942886 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1679 07:41:21.949238 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1680 07:41:21.953040 Root Device assign_resources, bus 0 link: 0
1681 07:41:21.959345 DOMAIN: 0000 assign_resources, bus 0 link: 0
1682 07:41:21.965823 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1683 07:41:21.976103 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1684 07:41:21.982317 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1685 07:41:21.992716 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1686 07:41:21.996014 PCI: 00:04.0 assign_resources, bus 1 link: 0
1687 07:41:21.999227 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1688 07:41:22.009253 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1689 07:41:22.019133 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1690 07:41:22.029205 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1691 07:41:22.032393 PCI: 00:06.0 assign_resources, bus 1 link: 0
1692 07:41:22.038832 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1693 07:41:22.048593 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1694 07:41:22.052036 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1695 07:41:22.062029 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1696 07:41:22.068478 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1697 07:41:22.072168 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1698 07:41:22.078582 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1699 07:41:22.085030 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1700 07:41:22.091617 PCI: 00:14.0 assign_resources, bus 0 link: 0
1701 07:41:22.095411 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1702 07:41:22.104978 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1703 07:41:22.111252 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1704 07:41:22.121485 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1705 07:41:22.124725 PCI: 00:14.3 assign_resources, bus 0 link: 0
1706 07:41:22.128214 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1707 07:41:22.137722 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1708 07:41:22.141039 PCI: 00:15.0 assign_resources, bus 0 link: 0
1709 07:41:22.147708 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1710 07:41:22.154791 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1711 07:41:22.158083 PCI: 00:15.1 assign_resources, bus 0 link: 0
1712 07:41:22.164131 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1713 07:41:22.171267 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1714 07:41:22.177581 PCI: 00:15.3 assign_resources, bus 0 link: 0
1715 07:41:22.180805 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1716 07:41:22.190636 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1717 07:41:22.197600 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1718 07:41:22.200592 PCI: 00:19.1 assign_resources, bus 0 link: 0
1719 07:41:22.207488 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1720 07:41:22.213483 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1721 07:41:22.220163 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1722 07:41:22.223481 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1723 07:41:22.229887 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1724 07:41:22.233263 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1725 07:41:22.239915 LPC: Trying to open IO window from 800 size 1ff
1726 07:41:22.246289 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1727 07:41:22.253431 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1728 07:41:22.263161 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1729 07:41:22.266416 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1730 07:41:22.273126 Root Device assign_resources, bus 0 link: 0 done
1731 07:41:22.273336 Done setting resources.
1732 07:41:22.279945 Show resources in subtree (Root Device)...After assigning values.
1733 07:41:22.286582 Root Device child on link 0 CPU_CLUSTER: 0
1734 07:41:22.290009 CPU_CLUSTER: 0 child on link 0 APIC: 00
1735 07:41:22.290239 APIC: 00
1736 07:41:22.292997 APIC: 14
1737 07:41:22.293233 APIC: 16
1738 07:41:22.296353 APIC: 10
1739 07:41:22.296626 APIC: 12
1740 07:41:22.296787 APIC: 09
1741 07:41:22.299744 APIC: 08
1742 07:41:22.300078 APIC: 01
1743 07:41:22.302961 DOMAIN: 0000 child on link 0 GPIO: 0
1744 07:41:22.312955 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1745 07:41:22.322763 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1746 07:41:22.323231 GPIO: 0
1747 07:41:22.326100 PCI: 00:00.0
1748 07:41:22.336297 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1749 07:41:22.346189 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1750 07:41:22.352617 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1751 07:41:22.362602 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1752 07:41:22.372841 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1753 07:41:22.382540 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1754 07:41:22.392375 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1755 07:41:22.402373 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1756 07:41:22.412656 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1757 07:41:22.422327 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1758 07:41:22.428636 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1759 07:41:22.439005 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1760 07:41:22.448622 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1761 07:41:22.458513 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1762 07:41:22.468470 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1763 07:41:22.478408 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1764 07:41:22.484982 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1765 07:41:22.495021 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1766 07:41:22.504990 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1767 07:41:22.514769 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1768 07:41:22.524759 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1769 07:41:22.534632 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1770 07:41:22.544771 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1771 07:41:22.554456 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1772 07:41:22.564201 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1773 07:41:22.574411 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1774 07:41:22.581432 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1775 07:41:22.591134 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1776 07:41:22.594344 PCI: 00:02.0
1777 07:41:22.603976 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1778 07:41:22.614409 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1779 07:41:22.624056 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1780 07:41:22.628317 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1781 07:41:22.637076 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1782 07:41:22.640781 GENERIC: 0.0
1783 07:41:22.643732 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1784 07:41:22.653276 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1785 07:41:22.666611 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1786 07:41:22.676478 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1787 07:41:22.676626 PCI: 01:00.0
1788 07:41:22.689846 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1789 07:41:22.699950 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1790 07:41:22.700062 PCI: 00:08.0
1791 07:41:22.703198 PCI: 00:0a.0
1792 07:41:22.712951 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1793 07:41:22.716061 PCI: 00:0d.0 child on link 0 USB0 port 0
1794 07:41:22.726699 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1795 07:41:22.732848 USB0 port 0 child on link 0 USB3 port 0
1796 07:41:22.732957 USB3 port 0
1797 07:41:22.736124 USB3 port 1
1798 07:41:22.736207 USB3 port 2
1799 07:41:22.739450 USB3 port 3
1800 07:41:22.742548 PCI: 00:14.0 child on link 0 USB0 port 0
1801 07:41:22.752853 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1802 07:41:22.759348 USB0 port 0 child on link 0 USB2 port 0
1803 07:41:22.759465 USB2 port 0
1804 07:41:22.762944 USB2 port 1
1805 07:41:22.763031 USB2 port 2
1806 07:41:22.765828 USB2 port 3
1807 07:41:22.765954 USB2 port 4
1808 07:41:22.769442 USB2 port 5
1809 07:41:22.769526 USB2 port 6
1810 07:41:22.772553 USB2 port 7
1811 07:41:22.772636 USB2 port 8
1812 07:41:22.775766 USB2 port 9
1813 07:41:22.775849 USB3 port 0
1814 07:41:22.779314 USB3 port 1
1815 07:41:22.779401 USB3 port 2
1816 07:41:22.782491 USB3 port 3
1817 07:41:22.782576 PCI: 00:14.2
1818 07:41:22.795542 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1819 07:41:22.805959 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1820 07:41:22.809113 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1821 07:41:22.819160 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1822 07:41:22.822392 GENERIC: 0.0
1823 07:41:22.825469 PCI: 00:15.0 child on link 0 I2C: 00:1a
1824 07:41:22.835733 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1825 07:41:22.838934 I2C: 00:1a
1826 07:41:22.839031 I2C: 00:31
1827 07:41:22.842312 I2C: 00:32
1828 07:41:22.845524 PCI: 00:15.1 child on link 0 I2C: 00:50
1829 07:41:22.855167 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1830 07:41:22.855251 I2C: 00:50
1831 07:41:22.858654 PCI: 00:15.2
1832 07:41:22.861869 PCI: 00:15.3 child on link 0 I2C: 00:10
1833 07:41:22.872032 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1834 07:41:22.875371 I2C: 00:10
1835 07:41:22.875453 PCI: 00:16.0
1836 07:41:22.885266 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1837 07:41:22.889135 PCI: 00:19.0
1838 07:41:22.892049 PCI: 00:19.1 child on link 0 I2C: 00:15
1839 07:41:22.902089 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1840 07:41:22.905407 I2C: 00:15
1841 07:41:22.905559 I2C: 00:2c
1842 07:41:22.908652 PCI: 00:1e.0
1843 07:41:22.918542 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1844 07:41:22.922243 PCI: 00:1e.3 child on link 0 SPI: 00
1845 07:41:22.932014 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1846 07:41:22.935286 SPI: 00
1847 07:41:22.938563 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1848 07:41:22.948335 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1849 07:41:22.948668 PNP: 0c09.0
1850 07:41:22.958670 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1851 07:41:22.962241 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1852 07:41:22.972145 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1853 07:41:22.981970 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1854 07:41:22.985424 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1855 07:41:22.988643 GENERIC: 0.0
1856 07:41:22.989103 GENERIC: 1.0
1857 07:41:22.991878 PCI: 00:1f.3
1858 07:41:23.002013 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1859 07:41:23.011600 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1860 07:41:23.014945 PCI: 00:1f.5
1861 07:41:23.025466 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1862 07:41:23.028624 Done allocating resources.
1863 07:41:23.034898 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1864 07:41:23.038435 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1865 07:41:23.045204 Configure audio over I2S with MAX98373 NAU88L25B.
1866 07:41:23.048150 Enabling BT offload
1867 07:41:23.055960 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1868 07:41:23.058948 Enabling resources...
1869 07:41:23.062501 PCI: 00:00.0 subsystem <- 8086/4609
1870 07:41:23.065882 PCI: 00:00.0 cmd <- 06
1871 07:41:23.069157 PCI: 00:02.0 subsystem <- 8086/46b3
1872 07:41:23.072359 PCI: 00:02.0 cmd <- 03
1873 07:41:23.075808 PCI: 00:04.0 subsystem <- 8086/461d
1874 07:41:23.076270 PCI: 00:04.0 cmd <- 02
1875 07:41:23.079318 PCI: 00:06.0 bridge ctrl <- 0013
1876 07:41:23.082417 PCI: 00:06.0 subsystem <- 8086/464d
1877 07:41:23.085658 PCI: 00:06.0 cmd <- 106
1878 07:41:23.089249 PCI: 00:0a.0 subsystem <- 8086/467d
1879 07:41:23.092292 PCI: 00:0a.0 cmd <- 02
1880 07:41:23.095881 PCI: 00:0d.0 subsystem <- 8086/461e
1881 07:41:23.099115 PCI: 00:0d.0 cmd <- 02
1882 07:41:23.102341 PCI: 00:14.0 subsystem <- 8086/51ed
1883 07:41:23.105491 PCI: 00:14.0 cmd <- 02
1884 07:41:23.109105 PCI: 00:14.2 subsystem <- 8086/51ef
1885 07:41:23.109674 PCI: 00:14.2 cmd <- 02
1886 07:41:23.115124 PCI: 00:14.3 subsystem <- 8086/51f0
1887 07:41:23.115662 PCI: 00:14.3 cmd <- 02
1888 07:41:23.118373 PCI: 00:15.0 subsystem <- 8086/51e8
1889 07:41:23.121922 PCI: 00:15.0 cmd <- 02
1890 07:41:23.125245 PCI: 00:15.1 subsystem <- 8086/51e9
1891 07:41:23.128951 PCI: 00:15.1 cmd <- 06
1892 07:41:23.131740 PCI: 00:15.3 subsystem <- 8086/51eb
1893 07:41:23.134977 PCI: 00:15.3 cmd <- 02
1894 07:41:23.138779 PCI: 00:16.0 subsystem <- 8086/51e0
1895 07:41:23.139342 PCI: 00:16.0 cmd <- 02
1896 07:41:23.145152 PCI: 00:19.1 subsystem <- 8086/51c6
1897 07:41:23.145751 PCI: 00:19.1 cmd <- 02
1898 07:41:23.148731 PCI: 00:1e.0 subsystem <- 8086/51a8
1899 07:41:23.152120 PCI: 00:1e.0 cmd <- 06
1900 07:41:23.155518 PCI: 00:1e.3 subsystem <- 8086/51ab
1901 07:41:23.158854 PCI: 00:1e.3 cmd <- 02
1902 07:41:23.162427 PCI: 00:1f.0 subsystem <- 8086/5182
1903 07:41:23.165644 PCI: 00:1f.0 cmd <- 407
1904 07:41:23.168969 PCI: 00:1f.3 subsystem <- 8086/51c8
1905 07:41:23.169540 PCI: 00:1f.3 cmd <- 02
1906 07:41:23.175262 PCI: 00:1f.5 subsystem <- 8086/51a4
1907 07:41:23.175856 PCI: 00:1f.5 cmd <- 406
1908 07:41:23.178951 PCI: 01:00.0 cmd <- 02
1909 07:41:23.179414 done.
1910 07:41:23.185132 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1911 07:41:23.188491 ME: Version: Unavailable
1912 07:41:23.192026 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1913 07:41:23.195037 Initializing devices...
1914 07:41:23.198228 Root Device init
1915 07:41:23.198708 mainboard: EC init
1916 07:41:23.204781 Chrome EC: Set SMI mask to 0x0000000000000000
1917 07:41:23.208420 Chrome EC: UHEPI supported
1918 07:41:23.214910 Chrome EC: clear events_b mask to 0x0000000000000000
1919 07:41:23.218464 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1920 07:41:23.224766 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1921 07:41:23.231535 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1922 07:41:23.235223 Chrome EC: Set WAKE mask to 0x0000000000000000
1923 07:41:23.241578 Root Device init finished in 39 msecs
1924 07:41:23.242229 PCI: 00:00.0 init
1925 07:41:23.245428 CPU TDP = 15 Watts
1926 07:41:23.248612 CPU PL1 = 15 Watts
1927 07:41:23.249072 CPU PL2 = 55 Watts
1928 07:41:23.252262 CPU PL4 = 123 Watts
1929 07:41:23.255493 PCI: 00:00.0 init finished in 8 msecs
1930 07:41:23.258654 PCI: 00:02.0 init
1931 07:41:23.259209 GMA: Found VBT in CBFS
1932 07:41:23.262083 GMA: Found valid VBT in CBFS
1933 07:41:23.268774 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1934 07:41:23.275068 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1935 07:41:23.278457 PCI: 00:02.0 init finished in 18 msecs
1936 07:41:23.282209 PCI: 00:06.0 init
1937 07:41:23.285530 Initializing PCH PCIe bridge.
1938 07:41:23.288666 PCI: 00:06.0 init finished in 3 msecs
1939 07:41:23.289127 PCI: 00:0a.0 init
1940 07:41:23.295561 PCI: 00:0a.0 init finished in 0 msecs
1941 07:41:23.296119 PCI: 00:14.0 init
1942 07:41:23.298739 PCI: 00:14.0 init finished in 0 msecs
1943 07:41:23.301973 PCI: 00:14.2 init
1944 07:41:23.304995 PCI: 00:14.2 init finished in 0 msecs
1945 07:41:23.308444 PCI: 00:15.0 init
1946 07:41:23.311790 I2C bus 0 version 0x3230302a
1947 07:41:23.315253 DW I2C bus 0 at 0x80655000 (400 KHz)
1948 07:41:23.318028 PCI: 00:15.0 init finished in 6 msecs
1949 07:41:23.318471 PCI: 00:15.1 init
1950 07:41:23.321895 I2C bus 1 version 0x3230302a
1951 07:41:23.324948 DW I2C bus 1 at 0x80656000 (400 KHz)
1952 07:41:23.331856 PCI: 00:15.1 init finished in 6 msecs
1953 07:41:23.332315 PCI: 00:15.3 init
1954 07:41:23.335201 I2C bus 3 version 0x3230302a
1955 07:41:23.338211 DW I2C bus 3 at 0x80657000 (400 KHz)
1956 07:41:23.341270 PCI: 00:15.3 init finished in 6 msecs
1957 07:41:23.344609 PCI: 00:16.0 init
1958 07:41:23.348158 PCI: 00:16.0 init finished in 0 msecs
1959 07:41:23.351303 PCI: 00:19.1 init
1960 07:41:23.351713 I2C bus 5 version 0x3230302a
1961 07:41:23.358021 DW I2C bus 5 at 0x80659000 (400 KHz)
1962 07:41:23.361431 PCI: 00:19.1 init finished in 6 msecs
1963 07:41:23.361921 PCI: 00:1f.0 init
1964 07:41:23.367848 IOAPIC: Initializing IOAPIC at 0xfec00000
1965 07:41:23.368356 IOAPIC: ID = 0x02
1966 07:41:23.371176 IOAPIC: Dumping registers
1967 07:41:23.374424 reg 0x0000: 0x02000000
1968 07:41:23.374879 reg 0x0001: 0x00770020
1969 07:41:23.378165 reg 0x0002: 0x00000000
1970 07:41:23.381545 IOAPIC: 120 interrupts
1971 07:41:23.384686 IOAPIC: Clearing IOAPIC at 0xfec00000
1972 07:41:23.391271 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1973 07:41:23.394584 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1974 07:41:23.397822 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1975 07:41:23.404685 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1976 07:41:23.407705 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1977 07:41:23.414391 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1978 07:41:23.418002 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1979 07:41:23.424375 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1980 07:41:23.427859 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1981 07:41:23.434334 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1982 07:41:23.437810 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1983 07:41:23.441057 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1984 07:41:23.447611 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1985 07:41:23.450944 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1986 07:41:23.457332 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1987 07:41:23.461039 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1988 07:41:23.467750 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1989 07:41:23.470627 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1990 07:41:23.477136 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1991 07:41:23.480457 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1992 07:41:23.483793 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1993 07:41:23.490911 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1994 07:41:23.494296 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1995 07:41:23.500393 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1996 07:41:23.504363 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1997 07:41:23.510494 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1998 07:41:23.513918 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1999 07:41:23.520250 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2000 07:41:23.524089 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2001 07:41:23.526987 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2002 07:41:23.533783 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2003 07:41:23.536939 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2004 07:41:23.543863 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2005 07:41:23.546858 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2006 07:41:23.553562 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2007 07:41:23.557448 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2008 07:41:23.563877 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2009 07:41:23.566662 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2010 07:41:23.573883 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2011 07:41:23.576847 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2012 07:41:23.580217 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2013 07:41:23.586626 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2014 07:41:23.590271 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2015 07:41:23.596726 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2016 07:41:23.600413 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2017 07:41:23.606462 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2018 07:41:23.610013 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2019 07:41:23.616776 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2020 07:41:23.619859 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2021 07:41:23.623147 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2022 07:41:23.629833 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2023 07:41:23.633269 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2024 07:41:23.639712 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2025 07:41:23.643005 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2026 07:41:23.649984 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2027 07:41:23.653029 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2028 07:41:23.656461 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2029 07:41:23.663011 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2030 07:41:23.666240 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2031 07:41:23.673704 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2032 07:41:23.676979 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2033 07:41:23.683152 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2034 07:41:23.686201 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2035 07:41:23.692874 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2036 07:41:23.696453 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2037 07:41:23.699716 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2038 07:41:23.706036 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2039 07:41:23.709380 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2040 07:41:23.716680 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2041 07:41:23.719734 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2042 07:41:23.726330 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2043 07:41:23.729721 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2044 07:41:23.736197 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2045 07:41:23.739539 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2046 07:41:23.742613 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2047 07:41:23.749320 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2048 07:41:23.752482 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2049 07:41:23.759329 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2050 07:41:23.762854 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2051 07:41:23.769341 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2052 07:41:23.773055 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2053 07:41:23.779193 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2054 07:41:23.782620 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2055 07:41:23.785757 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2056 07:41:23.792931 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2057 07:41:23.795891 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2058 07:41:23.803231 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2059 07:41:23.806303 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2060 07:41:23.812697 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2061 07:41:23.815969 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2062 07:41:23.822372 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2063 07:41:23.825578 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2064 07:41:23.829644 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2065 07:41:23.835866 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2066 07:41:23.839036 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2067 07:41:23.845946 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2068 07:41:23.849423 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2069 07:41:23.855551 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2070 07:41:23.859213 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2071 07:41:23.862401 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2072 07:41:23.869247 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2073 07:41:23.872403 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2074 07:41:23.878925 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2075 07:41:23.882545 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2076 07:41:23.889224 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2077 07:41:23.892708 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2078 07:41:23.899488 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2079 07:41:23.902372 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2080 07:41:23.905739 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2081 07:41:23.912706 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2082 07:41:23.915630 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2083 07:41:23.922448 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2084 07:41:23.925602 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2085 07:41:23.932464 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2086 07:41:23.935717 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2087 07:41:23.942177 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2088 07:41:23.945444 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2089 07:41:23.948830 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2090 07:41:23.955593 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2091 07:41:23.958720 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2092 07:41:23.965140 IOAPIC: Bootstrap Processor Local APIC = 0x00
2093 07:41:23.968604 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2094 07:41:23.972206 PCI: 00:1f.0 init finished in 607 msecs
2095 07:41:23.975281 PCI: 00:1f.2 init
2096 07:41:23.978783 apm_control: Disabling ACPI.
2097 07:41:23.982314 APMC done.
2098 07:41:23.985325 PCI: 00:1f.2 init finished in 6 msecs
2099 07:41:23.988531 PCI: 00:1f.3 init
2100 07:41:23.992038 PCI: 00:1f.3 init finished in 0 msecs
2101 07:41:23.992497 PCI: 01:00.0 init
2102 07:41:23.995546 PCI: 01:00.0 init finished in 0 msecs
2103 07:41:23.998538 PNP: 0c09.0 init
2104 07:41:24.002368 Google Chrome EC uptime: 12.117 seconds
2105 07:41:24.008904 Google Chrome AP resets since EC boot: 1
2106 07:41:24.011996 Google Chrome most recent AP reset causes:
2107 07:41:24.015169 0.342: 32775 shutdown: entering G3
2108 07:41:24.021959 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2109 07:41:24.025462 PNP: 0c09.0 init finished in 23 msecs
2110 07:41:24.028833 GENERIC: 0.0 init
2111 07:41:24.031864 GENERIC: 0.0 init finished in 0 msecs
2112 07:41:24.032339 GENERIC: 1.0 init
2113 07:41:24.038702 GENERIC: 1.0 init finished in 0 msecs
2114 07:41:24.039164 Devices initialized
2115 07:41:24.041919 Show all devs... After init.
2116 07:41:24.045342 Root Device: enabled 1
2117 07:41:24.048311 CPU_CLUSTER: 0: enabled 1
2118 07:41:24.048771 DOMAIN: 0000: enabled 1
2119 07:41:24.051913 GPIO: 0: enabled 1
2120 07:41:24.055105 PCI: 00:00.0: enabled 1
2121 07:41:24.055566 PCI: 00:01.0: enabled 0
2122 07:41:24.058422 PCI: 00:01.1: enabled 0
2123 07:41:24.061639 PCI: 00:02.0: enabled 1
2124 07:41:24.065147 PCI: 00:04.0: enabled 1
2125 07:41:24.065648 PCI: 00:05.0: enabled 0
2126 07:41:24.068645 PCI: 00:06.0: enabled 1
2127 07:41:24.071829 PCI: 00:06.2: enabled 0
2128 07:41:24.075120 PCI: 00:07.0: enabled 0
2129 07:41:24.075602 PCI: 00:07.1: enabled 0
2130 07:41:24.078253 PCI: 00:07.2: enabled 0
2131 07:41:24.081756 PCI: 00:07.3: enabled 0
2132 07:41:24.085170 PCI: 00:08.0: enabled 0
2133 07:41:24.085584 PCI: 00:09.0: enabled 0
2134 07:41:24.088281 PCI: 00:0a.0: enabled 1
2135 07:41:24.091537 PCI: 00:0d.0: enabled 1
2136 07:41:24.091972 PCI: 00:0d.1: enabled 0
2137 07:41:24.095081 PCI: 00:0d.2: enabled 0
2138 07:41:24.098289 PCI: 00:0d.3: enabled 0
2139 07:41:24.101378 PCI: 00:0e.0: enabled 0
2140 07:41:24.101918 PCI: 00:10.0: enabled 0
2141 07:41:24.105075 PCI: 00:10.1: enabled 0
2142 07:41:24.108510 PCI: 00:10.6: enabled 0
2143 07:41:24.111738 PCI: 00:10.7: enabled 0
2144 07:41:24.112152 PCI: 00:12.0: enabled 0
2145 07:41:24.114823 PCI: 00:12.6: enabled 0
2146 07:41:24.118494 PCI: 00:12.7: enabled 0
2147 07:41:24.121626 PCI: 00:13.0: enabled 0
2148 07:41:24.122094 PCI: 00:14.0: enabled 1
2149 07:41:24.124805 PCI: 00:14.1: enabled 0
2150 07:41:24.128398 PCI: 00:14.2: enabled 1
2151 07:41:24.128960 PCI: 00:14.3: enabled 1
2152 07:41:24.131619 PCI: 00:15.0: enabled 1
2153 07:41:24.135371 PCI: 00:15.1: enabled 1
2154 07:41:24.138144 PCI: 00:15.2: enabled 0
2155 07:41:24.138889 PCI: 00:15.3: enabled 1
2156 07:41:24.141726 PCI: 00:16.0: enabled 1
2157 07:41:24.144817 PCI: 00:16.1: enabled 0
2158 07:41:24.148041 PCI: 00:16.2: enabled 0
2159 07:41:24.148458 PCI: 00:16.3: enabled 0
2160 07:41:24.151469 PCI: 00:16.4: enabled 0
2161 07:41:24.154773 PCI: 00:16.5: enabled 0
2162 07:41:24.158041 PCI: 00:17.0: enabled 0
2163 07:41:24.158453 PCI: 00:19.0: enabled 0
2164 07:41:24.161363 PCI: 00:19.1: enabled 1
2165 07:41:24.164652 PCI: 00:19.2: enabled 0
2166 07:41:24.168666 PCI: 00:1a.0: enabled 0
2167 07:41:24.169176 PCI: 00:1c.0: enabled 0
2168 07:41:24.171816 PCI: 00:1c.1: enabled 0
2169 07:41:24.174899 PCI: 00:1c.2: enabled 0
2170 07:41:24.175410 PCI: 00:1c.3: enabled 0
2171 07:41:24.178150 PCI: 00:1c.4: enabled 0
2172 07:41:24.181581 PCI: 00:1c.5: enabled 0
2173 07:41:24.184362 PCI: 00:1c.6: enabled 0
2174 07:41:24.184777 PCI: 00:1c.7: enabled 0
2175 07:41:24.188182 PCI: 00:1d.0: enabled 0
2176 07:41:24.191618 PCI: 00:1d.1: enabled 0
2177 07:41:24.194968 PCI: 00:1d.2: enabled 0
2178 07:41:24.195548 PCI: 00:1d.3: enabled 0
2179 07:41:24.198090 PCI: 00:1e.0: enabled 1
2180 07:41:24.200948 PCI: 00:1e.1: enabled 0
2181 07:41:24.204192 PCI: 00:1e.2: enabled 0
2182 07:41:24.204605 PCI: 00:1e.3: enabled 1
2183 07:41:24.208136 PCI: 00:1f.0: enabled 1
2184 07:41:24.211495 PCI: 00:1f.1: enabled 0
2185 07:41:24.214491 PCI: 00:1f.2: enabled 1
2186 07:41:24.214905 PCI: 00:1f.3: enabled 1
2187 07:41:24.217905 PCI: 00:1f.4: enabled 0
2188 07:41:24.220989 PCI: 00:1f.5: enabled 1
2189 07:41:24.221404 PCI: 00:1f.6: enabled 0
2190 07:41:24.224336 PCI: 00:1f.7: enabled 0
2191 07:41:24.227683 GENERIC: 0.0: enabled 1
2192 07:41:24.230799 GENERIC: 0.0: enabled 1
2193 07:41:24.231218 GENERIC: 1.0: enabled 1
2194 07:41:24.233977 GENERIC: 0.0: enabled 1
2195 07:41:24.237728 GENERIC: 1.0: enabled 1
2196 07:41:24.240721 USB0 port 0: enabled 1
2197 07:41:24.241164 USB0 port 0: enabled 1
2198 07:41:24.244464 GENERIC: 0.0: enabled 1
2199 07:41:24.247595 I2C: 00:1a: enabled 1
2200 07:41:24.248120 I2C: 00:31: enabled 1
2201 07:41:24.250466 I2C: 00:32: enabled 1
2202 07:41:24.254270 I2C: 00:50: enabled 1
2203 07:41:24.254685 I2C: 00:10: enabled 1
2204 07:41:24.257366 I2C: 00:15: enabled 1
2205 07:41:24.260440 I2C: 00:2c: enabled 1
2206 07:41:24.263893 GENERIC: 0.0: enabled 1
2207 07:41:24.264454 SPI: 00: enabled 1
2208 07:41:24.267066 PNP: 0c09.0: enabled 1
2209 07:41:24.270359 GENERIC: 0.0: enabled 1
2210 07:41:24.271099 USB3 port 0: enabled 1
2211 07:41:24.273826 USB3 port 1: enabled 0
2212 07:41:24.277333 USB3 port 2: enabled 1
2213 07:41:24.277747 USB3 port 3: enabled 0
2214 07:41:24.280481 USB2 port 0: enabled 1
2215 07:41:24.283717 USB2 port 1: enabled 0
2216 07:41:24.287313 USB2 port 2: enabled 1
2217 07:41:24.287730 USB2 port 3: enabled 0
2218 07:41:24.290648 USB2 port 4: enabled 0
2219 07:41:24.293610 USB2 port 5: enabled 1
2220 07:41:24.294126 USB2 port 6: enabled 0
2221 07:41:24.296811 USB2 port 7: enabled 0
2222 07:41:24.300557 USB2 port 8: enabled 1
2223 07:41:24.303626 USB2 port 9: enabled 1
2224 07:41:24.304041 USB3 port 0: enabled 1
2225 07:41:24.306766 USB3 port 1: enabled 0
2226 07:41:24.310048 USB3 port 2: enabled 0
2227 07:41:24.310464 USB3 port 3: enabled 0
2228 07:41:24.313419 GENERIC: 0.0: enabled 1
2229 07:41:24.316679 GENERIC: 1.0: enabled 1
2230 07:41:24.320378 APIC: 00: enabled 1
2231 07:41:24.320795 APIC: 14: enabled 1
2232 07:41:24.323634 APIC: 16: enabled 1
2233 07:41:24.324201 APIC: 10: enabled 1
2234 07:41:24.326655 APIC: 12: enabled 1
2235 07:41:24.329921 APIC: 09: enabled 1
2236 07:41:24.330388 APIC: 08: enabled 1
2237 07:41:24.333688 APIC: 01: enabled 1
2238 07:41:24.336993 PCI: 01:00.0: enabled 1
2239 07:41:24.339963 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2240 07:41:24.346563 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2241 07:41:24.349821 ELOG: NV offset 0xf20000 size 0x4000
2242 07:41:24.356412 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2243 07:41:24.363813 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:24 UTC
2244 07:41:24.369893 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:24 UTC
2245 07:41:24.376372 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:24 UTC
2246 07:41:24.383219 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2247 07:41:24.389329 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:24 UTC
2248 07:41:24.393102 elog_add_boot_reason: Logged dev mode boot
2249 07:41:24.400045 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2250 07:41:24.403099 Finalize devices...
2251 07:41:24.403519 PCI: 00:16.0 final
2252 07:41:24.406091 PCI: 00:1f.2 final
2253 07:41:24.406508 GENERIC: 0.0 final
2254 07:41:24.413221 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2255 07:41:24.416676 GENERIC: 1.0 final
2256 07:41:24.422871 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2257 07:41:24.423303 Devices finalized
2258 07:41:24.429396 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2259 07:41:24.432462 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2260 07:41:24.439790 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2261 07:41:24.446023 ME: HFSTS1 : 0x90000245
2262 07:41:24.449175 ME: HFSTS2 : 0x82100116
2263 07:41:24.452252 ME: HFSTS3 : 0x00000050
2264 07:41:24.459063 ME: HFSTS4 : 0x00004000
2265 07:41:24.462562 ME: HFSTS5 : 0x00000000
2266 07:41:24.466046 ME: HFSTS6 : 0x40600006
2267 07:41:24.469193 ME: Manufacturing Mode : NO
2268 07:41:24.475758 ME: SPI Protection Mode Enabled : YES
2269 07:41:24.479049 ME: FPFs Committed : YES
2270 07:41:24.482274 ME: Manufacturing Vars Locked : YES
2271 07:41:24.485568 ME: FW Partition Table : OK
2272 07:41:24.488909 ME: Bringup Loader Failure : NO
2273 07:41:24.492175 ME: Firmware Init Complete : YES
2274 07:41:24.496073 ME: Boot Options Present : NO
2275 07:41:24.502388 ME: Update In Progress : NO
2276 07:41:24.505617 ME: D0i3 Support : YES
2277 07:41:24.509094 ME: Low Power State Enabled : NO
2278 07:41:24.512086 ME: CPU Replaced : YES
2279 07:41:24.515485 ME: CPU Replacement Valid : YES
2280 07:41:24.518690 ME: Current Working State : 5
2281 07:41:24.522021 ME: Current Operation State : 1
2282 07:41:24.525243 ME: Current Operation Mode : 0
2283 07:41:24.528593 ME: Error Code : 0
2284 07:41:24.535236 ME: Enhanced Debug Mode : NO
2285 07:41:24.538504 ME: CPU Debug Disabled : YES
2286 07:41:24.541720 ME: TXT Support : NO
2287 07:41:24.545179 ME: WP for RO is enabled : YES
2288 07:41:24.552108 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2289 07:41:24.558352 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2290 07:41:24.561522 Ramoops buffer: 0x100000@0x76899000.
2291 07:41:24.568616 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2292 07:41:24.575365 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2293 07:41:24.578319 CBFS: 'fallback/slic' not found.
2294 07:41:24.581551 ACPI: Writing ACPI tables at 7686d000.
2295 07:41:24.582005 ACPI: * FACS
2296 07:41:24.584793 ACPI: * DSDT
2297 07:41:24.591955 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2298 07:41:24.595075 ACPI: * FADT
2299 07:41:24.595493 SCI is IRQ9
2300 07:41:24.601786 ACPI: added table 1/32, length now 40
2301 07:41:24.602252 ACPI: * SSDT
2302 07:41:24.608457 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2303 07:41:24.611691 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2304 07:41:24.618573 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2305 07:41:24.621543 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2306 07:41:24.628381 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2307 07:41:24.631584 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2308 07:41:24.638260 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2309 07:41:24.644351 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2310 07:41:24.648082 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2311 07:41:24.654293 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2312 07:41:24.657993 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2313 07:41:24.664761 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2314 07:41:24.667930 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2315 07:41:24.674673 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2316 07:41:24.680845 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2317 07:41:24.684664 PS2K: Passing 80 keymaps to kernel
2318 07:41:24.691166 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2319 07:41:24.697434 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2320 07:41:24.704258 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2321 07:41:24.710552 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2322 07:41:24.714115 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2323 07:41:24.720514 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2324 07:41:24.727561 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2325 07:41:24.734294 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2326 07:41:24.741117 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2327 07:41:24.747329 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2328 07:41:24.750722 ACPI: added table 2/32, length now 44
2329 07:41:24.750895 ACPI: * MCFG
2330 07:41:24.757644 ACPI: added table 3/32, length now 48
2331 07:41:24.757811 ACPI: * TPM2
2332 07:41:24.760961 TPM2 log created at 0x7685d000
2333 07:41:24.763765 ACPI: added table 4/32, length now 52
2334 07:41:24.767328 ACPI: * LPIT
2335 07:41:24.770501 ACPI: added table 5/32, length now 56
2336 07:41:24.770596 ACPI: * MADT
2337 07:41:24.774103 SCI is IRQ9
2338 07:41:24.777178 ACPI: added table 6/32, length now 60
2339 07:41:24.780661 cmd_reg from pmc_make_ipc_cmd 1052838
2340 07:41:24.787501 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2341 07:41:24.793696 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2342 07:41:24.801018 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2343 07:41:24.804092 PMC CrashLog size in discovery mode: 0xC00
2344 07:41:24.807498 cpu crashlog bar addr: 0x80640000
2345 07:41:24.810661 cpu discovery table offset: 0x6030
2346 07:41:24.814474 cpu_crashlog_discovery_table buffer count: 0x3
2347 07:41:24.820822 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2348 07:41:24.827164 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2349 07:41:24.833940 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2350 07:41:24.840690 PMC crashLog size in discovery mode : 0xC00
2351 07:41:24.847185 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2352 07:41:24.850493 discover mode PMC crashlog size adjusted to: 0x200
2353 07:41:24.857279 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2354 07:41:24.863876 discover mode PMC crashlog size adjusted to: 0x0
2355 07:41:24.867026 m_cpu_crashLog_size : 0x3480 bytes
2356 07:41:24.870740 CPU crashLog present.
2357 07:41:24.873919 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2358 07:41:24.880858 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2359 07:41:24.884091 current = 76876550
2360 07:41:24.884566 ACPI: * DMAR
2361 07:41:24.887339 ACPI: added table 7/32, length now 64
2362 07:41:24.893737 ACPI: added table 8/32, length now 68
2363 07:41:24.894452 ACPI: * HPET
2364 07:41:24.897257 ACPI: added table 9/32, length now 72
2365 07:41:24.900575 ACPI: done.
2366 07:41:24.900993 ACPI tables: 38528 bytes.
2367 07:41:24.903486 smbios_write_tables: 76857000
2368 07:41:24.909004 EC returned error result code 3
2369 07:41:24.912495 Couldn't obtain OEM name from CBI
2370 07:41:24.915405 Create SMBIOS type 16
2371 07:41:24.919150 Create SMBIOS type 17
2372 07:41:24.922288 Create SMBIOS type 20
2373 07:41:24.922709 GENERIC: 0.0 (WIFI Device)
2374 07:41:24.925527 SMBIOS tables: 2156 bytes.
2375 07:41:24.929005 Writing table forward entry at 0x00000500
2376 07:41:24.935527 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2377 07:41:24.938625 Writing coreboot table at 0x76891000
2378 07:41:24.945417 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2379 07:41:24.952063 1. 0000000000001000-000000000009ffff: RAM
2380 07:41:24.955249 2. 00000000000a0000-00000000000fffff: RESERVED
2381 07:41:24.958360 3. 0000000000100000-0000000076856fff: RAM
2382 07:41:24.965373 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2383 07:41:24.972105 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2384 07:41:24.975900 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2385 07:41:24.982193 7. 0000000077000000-00000000803fffff: RESERVED
2386 07:41:24.985283 8. 00000000c0000000-00000000cfffffff: RESERVED
2387 07:41:24.992163 9. 00000000f8000000-00000000f9ffffff: RESERVED
2388 07:41:24.995475 10. 00000000fb000000-00000000fb000fff: RESERVED
2389 07:41:25.001560 11. 00000000fc800000-00000000fe7fffff: RESERVED
2390 07:41:25.004894 12. 00000000feb00000-00000000feb7ffff: RESERVED
2391 07:41:25.008358 13. 00000000fec00000-00000000fecfffff: RESERVED
2392 07:41:25.014958 14. 00000000fed40000-00000000fed6ffff: RESERVED
2393 07:41:25.018071 15. 00000000fed80000-00000000fed87fff: RESERVED
2394 07:41:25.024519 16. 00000000fed90000-00000000fed92fff: RESERVED
2395 07:41:25.027727 17. 00000000feda0000-00000000feda1fff: RESERVED
2396 07:41:25.034950 18. 00000000fedc0000-00000000feddffff: RESERVED
2397 07:41:25.037980 19. 0000000100000000-000000027fbfffff: RAM
2398 07:41:25.041343 Passing 4 GPIOs to payload:
2399 07:41:25.044569 NAME | PORT | POLARITY | VALUE
2400 07:41:25.051432 lid | undefined | high | high
2401 07:41:25.057704 power | undefined | high | low
2402 07:41:25.061034 oprom | undefined | high | low
2403 07:41:25.067751 EC in RW | 0x00000151 | high | high
2404 07:41:25.068290 Board ID: 3
2405 07:41:25.071554 FW config: 0x131
2406 07:41:25.077830 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum e946
2407 07:41:25.081433 coreboot table: 1788 bytes.
2408 07:41:25.084501 IMD ROOT 0. 0x76fff000 0x00001000
2409 07:41:25.087385 IMD SMALL 1. 0x76ffe000 0x00001000
2410 07:41:25.091109 FSP MEMORY 2. 0x76afe000 0x00500000
2411 07:41:25.094441 CONSOLE 3. 0x76ade000 0x00020000
2412 07:41:25.097608 RW MCACHE 4. 0x76add000 0x0000043c
2413 07:41:25.100827 RO MCACHE 5. 0x76adc000 0x00000fd8
2414 07:41:25.104105 FMAP 6. 0x76adb000 0x0000064a
2415 07:41:25.111209 TIME STAMP 7. 0x76ada000 0x00000910
2416 07:41:25.113832 VBOOT WORK 8. 0x76ac6000 0x00014000
2417 07:41:25.117558 MEM INFO 9. 0x76ac5000 0x000003b8
2418 07:41:25.120875 ROMSTG STCK10. 0x76ac4000 0x00001000
2419 07:41:25.123970 AFTER CAR 11. 0x76ab8000 0x0000c000
2420 07:41:25.127285 RAMSTAGE 12. 0x76a2e000 0x0008a000
2421 07:41:25.130332 ACPI BERT 13. 0x76a1e000 0x00010000
2422 07:41:25.133570 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2423 07:41:25.140360 REFCODE 15. 0x769ae000 0x0006f000
2424 07:41:25.143640 SMM BACKUP 16. 0x7699e000 0x00010000
2425 07:41:25.146829 IGD OPREGION17. 0x76999000 0x00004203
2426 07:41:25.150465 RAMOOPS 18. 0x76899000 0x00100000
2427 07:41:25.153681 COREBOOT 19. 0x76891000 0x00008000
2428 07:41:25.157033 ACPI 20. 0x7686d000 0x00024000
2429 07:41:25.160324 TPM2 TCGLOG21. 0x7685d000 0x00010000
2430 07:41:25.163685 PMC CRASHLOG22. 0x7685c000 0x00000c00
2431 07:41:25.170182 CPU CRASHLOG23. 0x76858000 0x00003480
2432 07:41:25.173722 SMBIOS 24. 0x76857000 0x00001000
2433 07:41:25.173804 IMD small region:
2434 07:41:25.177196 IMD ROOT 0. 0x76ffec00 0x00000400
2435 07:41:25.183569 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2436 07:41:25.186722 VPD 2. 0x76ffeb60 0x0000006c
2437 07:41:25.190275 POWER STATE 3. 0x76ffeb00 0x00000044
2438 07:41:25.193544 ROMSTAGE 4. 0x76ffeae0 0x00000004
2439 07:41:25.196815 ACPI GNVS 5. 0x76ffea80 0x00000048
2440 07:41:25.203326 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2441 07:41:25.206720 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2442 07:41:25.209915 MTRR: Physical address space:
2443 07:41:25.216701 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2444 07:41:25.223071 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2445 07:41:25.229797 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2446 07:41:25.236304 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2447 07:41:25.242757 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2448 07:41:25.249529 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2449 07:41:25.256470 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2450 07:41:25.259638 MTRR: Fixed MSR 0x250 0x0606060606060606
2451 07:41:25.263176 MTRR: Fixed MSR 0x258 0x0606060606060606
2452 07:41:25.266233 MTRR: Fixed MSR 0x259 0x0000000000000000
2453 07:41:25.269724 MTRR: Fixed MSR 0x268 0x0606060606060606
2454 07:41:25.276246 MTRR: Fixed MSR 0x269 0x0606060606060606
2455 07:41:25.279261 MTRR: Fixed MSR 0x26a 0x0606060606060606
2456 07:41:25.282845 MTRR: Fixed MSR 0x26b 0x0606060606060606
2457 07:41:25.286161 MTRR: Fixed MSR 0x26c 0x0606060606060606
2458 07:41:25.292918 MTRR: Fixed MSR 0x26d 0x0606060606060606
2459 07:41:25.296130 MTRR: Fixed MSR 0x26e 0x0606060606060606
2460 07:41:25.299444 MTRR: Fixed MSR 0x26f 0x0606060606060606
2461 07:41:25.302730 call enable_fixed_mtrr()
2462 07:41:25.306545 CPU physical address size: 39 bits
2463 07:41:25.313009 MTRR: default type WB/UC MTRR counts: 6/6.
2464 07:41:25.316177 MTRR: UC selected as default type.
2465 07:41:25.322833 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2466 07:41:25.325988 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2467 07:41:25.332556 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2468 07:41:25.339201 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2469 07:41:25.345913 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2470 07:41:25.352809 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2471 07:41:25.359331 MTRR: Fixed MSR 0x250 0x0606060606060606
2472 07:41:25.362532 MTRR: Fixed MSR 0x258 0x0606060606060606
2473 07:41:25.365982 MTRR: Fixed MSR 0x259 0x0000000000000000
2474 07:41:25.369260 MTRR: Fixed MSR 0x268 0x0606060606060606
2475 07:41:25.376109 MTRR: Fixed MSR 0x269 0x0606060606060606
2476 07:41:25.378992 MTRR: Fixed MSR 0x26a 0x0606060606060606
2477 07:41:25.382834 MTRR: Fixed MSR 0x26b 0x0606060606060606
2478 07:41:25.385832 MTRR: Fixed MSR 0x26c 0x0606060606060606
2479 07:41:25.392516 MTRR: Fixed MSR 0x26d 0x0606060606060606
2480 07:41:25.395730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2481 07:41:25.398912 MTRR: Fixed MSR 0x26f 0x0606060606060606
2482 07:41:25.402528 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 07:41:25.405684 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 07:41:25.412234 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 07:41:25.415956 MTRR: Fixed MSR 0x259 0x0000000000000000
2486 07:41:25.419040 MTRR: Fixed MSR 0x268 0x0606060606060606
2487 07:41:25.422165 MTRR: Fixed MSR 0x269 0x0606060606060606
2488 07:41:25.428982 MTRR: Fixed MSR 0x258 0x0606060606060606
2489 07:41:25.432272 MTRR: Fixed MSR 0x259 0x0000000000000000
2490 07:41:25.435508 MTRR: Fixed MSR 0x268 0x0606060606060606
2491 07:41:25.438696 MTRR: Fixed MSR 0x269 0x0606060606060606
2492 07:41:25.445404 MTRR: Fixed MSR 0x26a 0x0606060606060606
2493 07:41:25.448764 MTRR: Fixed MSR 0x26b 0x0606060606060606
2494 07:41:25.452028 MTRR: Fixed MSR 0x26c 0x0606060606060606
2495 07:41:25.455599 MTRR: Fixed MSR 0x26d 0x0606060606060606
2496 07:41:25.462588 MTRR: Fixed MSR 0x26e 0x0606060606060606
2497 07:41:25.465580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2498 07:41:25.468848 call enable_fixed_mtrr()
2499 07:41:25.472017 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 07:41:25.475309 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 07:41:25.478898 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 07:41:25.481799 call enable_fixed_mtrr()
2503 07:41:25.485433 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 07:41:25.488797 MTRR: Fixed MSR 0x259 0x0000000000000000
2505 07:41:25.495366 MTRR: Fixed MSR 0x268 0x0606060606060606
2506 07:41:25.498704 MTRR: Fixed MSR 0x269 0x0606060606060606
2507 07:41:25.502117 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 07:41:25.505096 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 07:41:25.512061 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 07:41:25.515270 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 07:41:25.518346 MTRR: Fixed MSR 0x250 0x0606060606060606
2512 07:41:25.521717 MTRR: Fixed MSR 0x26a 0x0606060606060606
2513 07:41:25.528551 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 07:41:25.531641 MTRR: Fixed MSR 0x259 0x0000000000000000
2515 07:41:25.535304 MTRR: Fixed MSR 0x268 0x0606060606060606
2516 07:41:25.538560 MTRR: Fixed MSR 0x269 0x0606060606060606
2517 07:41:25.544776 MTRR: Fixed MSR 0x26a 0x0606060606060606
2518 07:41:25.548501 MTRR: Fixed MSR 0x26b 0x0606060606060606
2519 07:41:25.551669 MTRR: Fixed MSR 0x26c 0x0606060606060606
2520 07:41:25.555189 MTRR: Fixed MSR 0x26d 0x0606060606060606
2521 07:41:25.558157 MTRR: Fixed MSR 0x26e 0x0606060606060606
2522 07:41:25.564883 MTRR: Fixed MSR 0x26f 0x0606060606060606
2523 07:41:25.568109 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 07:41:25.571370 MTRR: Fixed MSR 0x26b 0x0606060606060606
2525 07:41:25.574719 MTRR: Fixed MSR 0x26a 0x0606060606060606
2526 07:41:25.581518 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 07:41:25.584610 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 07:41:25.588336 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 07:41:25.591440 CPU physical address size: 39 bits
2530 07:41:25.594905 MTRR: Fixed MSR 0x26c 0x0606060606060606
2531 07:41:25.597875 call enable_fixed_mtrr()
2532 07:41:25.601630 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 07:41:25.608296 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 07:41:25.611754 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 07:41:25.614925 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 07:41:25.618063 call enable_fixed_mtrr()
2537 07:41:25.621620 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 07:41:25.624951 CPU physical address size: 39 bits
2539 07:41:25.628010 MTRR: Fixed MSR 0x26b 0x0606060606060606
2540 07:41:25.631149 CPU physical address size: 39 bits
2541 07:41:25.638027 MTRR: Fixed MSR 0x26b 0x0606060606060606
2542 07:41:25.641247 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 07:41:25.644564 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 07:41:25.648112 CPU physical address size: 39 bits
2545 07:41:25.651004 MTRR: Fixed MSR 0x26c 0x0606060606060606
2546 07:41:25.658122 MTRR: Fixed MSR 0x26c 0x0606060606060606
2547 07:41:25.661288 MTRR: Fixed MSR 0x26d 0x0606060606060606
2548 07:41:25.664192 MTRR: Fixed MSR 0x26d 0x0606060606060606
2549 07:41:25.667655 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 07:41:25.674286 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 07:41:25.677553 MTRR: Fixed MSR 0x26e 0x0606060606060606
2552 07:41:25.681029 call enable_fixed_mtrr()
2553 07:41:25.684596 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 07:41:25.687711 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 07:41:25.691091 call enable_fixed_mtrr()
2556 07:41:25.694316 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 07:41:25.697735 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 07:41:25.701249 CPU physical address size: 39 bits
2559 07:41:25.704279 call enable_fixed_mtrr()
2560 07:41:25.707934 CPU physical address size: 39 bits
2561 07:41:25.711547 CPU physical address size: 39 bits
2562 07:41:25.715708
2563 07:41:25.715806 MTRR check
2564 07:41:25.719114 Fixed MTRRs : Enabled
2565 07:41:25.719197 Variable MTRRs: Enabled
2566 07:41:25.719261
2567 07:41:25.725638 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2568 07:41:25.728755 Checking cr50 for pending updates
2569 07:41:25.741709 Reading cr50 TPM mode
2570 07:41:25.756439 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2571 07:41:25.766585 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2572 07:41:25.769834 Checking segment from ROM address 0xf96cbe6c
2573 07:41:25.773367 Checking segment from ROM address 0xf96cbe88
2574 07:41:25.779662 Loading segment from ROM address 0xf96cbe6c
2575 07:41:25.779747 code (compression=1)
2576 07:41:25.789800 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2577 07:41:25.796253 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2578 07:41:25.799495 using LZMA
2579 07:41:25.821664 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2580 07:41:25.827853 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2581 07:41:25.835964 Loading segment from ROM address 0xf96cbe88
2582 07:41:25.839682 Entry Point 0x30000000
2583 07:41:25.839768 Loaded segments
2584 07:41:25.846463 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2585 07:41:25.852959 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2586 07:41:25.856156 Finalizing chipset.
2587 07:41:25.859252 apm_control: Finalizing SMM.
2588 07:41:25.859334 APMC done.
2589 07:41:25.862873 HECI: CSE device 16.1 is disabled
2590 07:41:25.866147 HECI: CSE device 16.2 is disabled
2591 07:41:25.869291 HECI: CSE device 16.3 is disabled
2592 07:41:25.872570 HECI: CSE device 16.4 is disabled
2593 07:41:25.875945 HECI: CSE device 16.5 is disabled
2594 07:41:25.879645 HECI: Sending End-of-Post
2595 07:41:25.888093 CSE: EOP requested action: continue boot
2596 07:41:25.891400 CSE EOP successful, continuing boot
2597 07:41:25.898136 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2598 07:41:25.901316 mp_park_aps done after 0 msecs.
2599 07:41:25.904952 Jumping to boot code at 0x30000000(0x76891000)
2600 07:41:25.914565 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2601 07:41:25.919048
2602 07:41:25.919133
2603 07:41:25.919198
2604 07:41:25.922157 Starting depthcharge on Volmar...
2605 07:41:25.922239
2606 07:41:25.922725 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2607 07:41:25.922823 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2608 07:41:25.922907 Setting prompt string to ['brya:']
2609 07:41:25.922987 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2610 07:41:25.928740 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2611 07:41:25.928828
2612 07:41:25.935544 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2613 07:41:25.935657
2614 07:41:25.941830 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2615 07:41:25.941937
2616 07:41:25.945596 configure_storage: Failed to remap 1C:2
2617 07:41:25.945703
2618 07:41:25.948655 Wipe memory regions:
2619 07:41:25.948739
2620 07:41:25.951978 [0x00000000001000, 0x000000000a0000)
2621 07:41:25.952060
2622 07:41:25.955078 [0x00000000100000, 0x00000030000000)
2623 07:41:26.057864
2624 07:41:26.061194 [0x00000032668e60, 0x00000076857000)
2625 07:41:26.205215
2626 07:41:26.208596 [0x00000100000000, 0x0000027fc00000)
2627 07:41:27.018704
2628 07:41:27.021971 ec_init: CrosEC protocol v3 supported (256, 256)
2629 07:41:27.631299
2630 07:41:27.631450 R8152: Initializing
2631 07:41:27.631521
2632 07:41:27.634179 Version 9 (ocp_data = 6010)
2633 07:41:27.634263
2634 07:41:27.637874 R8152: Done initializing
2635 07:41:27.637981
2636 07:41:27.640934 Adding net device
2637 07:41:27.942123
2638 07:41:27.945150 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2639 07:41:27.945250
2640 07:41:27.945315
2641 07:41:27.945376
2642 07:41:27.945658 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2644 07:41:28.046015 brya: tftpboot 192.168.201.1 12435227/tftp-deploy-vl5b7ix_/kernel/bzImage 12435227/tftp-deploy-vl5b7ix_/kernel/cmdline 12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
2645 07:41:28.046183 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2646 07:41:28.046278 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2647 07:41:28.050240 tftpboot 192.168.201.1 12435227/tftp-deploy-vl5b7ix_/kernel/bzIploy-vl5b7ix_/kernel/cmdline 12435227/tftp-deploy-vl5b7ix_/ramdisk/ramdisk.cpio.gz
2648 07:41:28.050331
2649 07:41:28.050397 Waiting for link
2650 07:41:28.252755
2651 07:41:28.252889 done.
2652 07:41:28.252958
2653 07:41:28.253019 MAC: 00:e0:4c:68:01:74
2654 07:41:28.253078
2655 07:41:28.256150 Sending DHCP discover... done.
2656 07:41:28.256224
2657 07:41:28.259355 Waiting for reply... done.
2658 07:41:28.259426
2659 07:41:28.262692 Sending DHCP request... done.
2660 07:41:28.262773
2661 07:41:28.269215 Waiting for reply... done.
2662 07:41:28.269295
2663 07:41:28.269359 My ip is 192.168.201.16
2664 07:41:28.269418
2665 07:41:28.272529 The DHCP server ip is 192.168.201.1
2666 07:41:28.272610
2667 07:41:28.279094 TFTP server IP predefined by user: 192.168.201.1
2668 07:41:28.279175
2669 07:41:28.285809 Bootfile predefined by user: 12435227/tftp-deploy-vl5b7ix_/kernel/bzImage
2670 07:41:28.285904
2671 07:41:28.289042 Sending tftp read request... done.
2672 07:41:28.289125
2673 07:41:28.292609 Waiting for the transfer...
2674 07:41:28.292699
2675 07:41:28.566137 00000000 ################################################################
2676 07:41:28.566281
2677 07:41:28.815106 00080000 ################################################################
2678 07:41:28.815255
2679 07:41:29.060090 00100000 ################################################################
2680 07:41:29.060235
2681 07:41:29.312061 00180000 ################################################################
2682 07:41:29.312207
2683 07:41:29.567230 00200000 ################################################################
2684 07:41:29.567378
2685 07:41:29.834688 00280000 ################################################################
2686 07:41:29.834836
2687 07:41:30.087723 00300000 ################################################################
2688 07:41:30.087898
2689 07:41:30.334867 00380000 ################################################################
2690 07:41:30.335009
2691 07:41:30.578775 00400000 ################################################################
2692 07:41:30.578918
2693 07:41:30.824545 00480000 ################################################################
2694 07:41:30.824692
2695 07:41:31.066166 00500000 ################################################################
2696 07:41:31.066309
2697 07:41:31.312387 00580000 ################################################################
2698 07:41:31.312524
2699 07:41:31.556153 00600000 ################################################################
2700 07:41:31.556291
2701 07:41:31.801237 00680000 ################################################################
2702 07:41:31.801400
2703 07:41:32.047520 00700000 ################################################################
2704 07:41:32.047710
2705 07:41:32.292114 00780000 ################################################################
2706 07:41:32.292256
2707 07:41:32.376089 00800000 ####################### done.
2708 07:41:32.376212
2709 07:41:32.379439 The bootfile was 8572816 bytes long.
2710 07:41:32.379522
2711 07:41:32.382794 Sending tftp read request... done.
2712 07:41:32.382877
2713 07:41:32.386160 Waiting for the transfer...
2714 07:41:32.386243
2715 07:41:32.649752 00000000 ################################################################
2716 07:41:32.649927
2717 07:41:32.908120 00080000 ################################################################
2718 07:41:32.908269
2719 07:41:33.151427 00100000 ################################################################
2720 07:41:33.151581
2721 07:41:33.396587 00180000 ################################################################
2722 07:41:33.396727
2723 07:41:33.641775 00200000 ################################################################
2724 07:41:33.641973
2725 07:41:33.886798 00280000 ################################################################
2726 07:41:33.886937
2727 07:41:34.136995 00300000 ################################################################
2728 07:41:34.137132
2729 07:41:34.389710 00380000 ################################################################
2730 07:41:34.389857
2731 07:41:34.661279 00400000 ################################################################
2732 07:41:34.661415
2733 07:41:34.924324 00480000 ################################################################
2734 07:41:34.924444
2735 07:41:35.180647 00500000 ################################################################
2736 07:41:35.180777
2737 07:41:35.430545 00580000 ################################################################
2738 07:41:35.430670
2739 07:41:35.674136 00600000 ################################################################
2740 07:41:35.674262
2741 07:41:35.919014 00680000 ################################################################
2742 07:41:35.919149
2743 07:41:36.161116 00700000 ################################################################
2744 07:41:36.161252
2745 07:41:36.406008 00780000 ################################################################
2746 07:41:36.406164
2747 07:41:36.618716 00800000 ####################################################### done.
2748 07:41:36.618849
2749 07:41:36.622170 Sending tftp read request... done.
2750 07:41:36.622254
2751 07:41:36.622320 Waiting for the transfer...
2752 07:41:36.625502
2753 07:41:36.625590 00000000 # done.
2754 07:41:36.625663
2755 07:41:36.635133 Command line loaded dynamically from TFTP file: 12435227/tftp-deploy-vl5b7ix_/kernel/cmdline
2756 07:41:36.635242
2757 07:41:36.648706 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2758 07:41:36.654889
2759 07:41:36.658475 Shutting down all USB controllers.
2760 07:41:36.658660
2761 07:41:36.658786 Removing current net device
2762 07:41:36.658902
2763 07:41:36.661644 Finalizing coreboot
2764 07:41:36.661802
2765 07:41:36.668562 Exiting depthcharge with code 4 at timestamp: 20992132
2766 07:41:36.668765
2767 07:41:36.668925
2768 07:41:36.669075 Starting kernel ...
2769 07:41:36.669219
2770 07:41:36.669360
2771 07:41:36.670198 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2772 07:41:36.670487 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2773 07:41:36.670707 Setting prompt string to ['Linux version [0-9]']
2774 07:41:36.670908 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2775 07:41:36.671111 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2777 07:46:06.671327 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2779 07:46:06.672681 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2781 07:46:06.673802 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2784 07:46:06.675572 end: 2 depthcharge-action (duration 00:05:00) [common]
2786 07:46:06.676736 Cleaning after the job
2787 07:46:06.677177 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/ramdisk
2788 07:46:06.684140 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/kernel
2789 07:46:06.690294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435227/tftp-deploy-vl5b7ix_/modules
2790 07:46:06.691525 start: 5.1 power-off (timeout 00:00:30) [common]
2791 07:46:06.692299 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=off'
2792 07:46:06.771263 >> Command sent successfully.
2793 07:46:06.775443 Returned 0 in 0 seconds
2794 07:46:06.876373 end: 5.1 power-off (duration 00:00:00) [common]
2796 07:46:06.878008 start: 5.2 read-feedback (timeout 00:10:00) [common]
2797 07:46:06.879202 Listened to connection for namespace 'common' for up to 1s
2799 07:46:06.880728 Listened to connection for namespace 'common' for up to 1s
2800 07:46:07.879645 Finalising connection for namespace 'common'
2801 07:46:07.879806 Disconnecting from shell: Finalise
2802 07:46:07.879888
2803 07:46:07.980225 end: 5.2 read-feedback (duration 00:00:01) [common]
2804 07:46:07.980368 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435227
2805 07:46:07.996876 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435227
2806 07:46:07.997027 JobError: Your job cannot terminate cleanly.