Boot log: acer-chromebox-cxi4-puff
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:42.781453 lava-dispatcher, installed at version: 2023.10
2 07:40:42.781663 start: 0 validate
3 07:40:42.781801 Start time: 2024-01-03 07:40:42.781791+00:00 (UTC)
4 07:40:42.781959 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:42.782093 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:40:43.049452 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:43.049641 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:43.317086 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:43.317252 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:40:46.393377 validate duration: 3.61
12 07:40:46.393672 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:40:46.393789 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:40:46.393891 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:40:46.394015 Not decompressing ramdisk as can be used compressed.
16 07:40:46.394106 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:40:46.394176 saving as /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/ramdisk/rootfs.cpio.gz
18 07:40:46.394240 total size: 8418130 (8 MB)
19 07:40:46.924197 progress 0 % (0 MB)
20 07:40:46.929813 progress 5 % (0 MB)
21 07:40:46.932091 progress 10 % (0 MB)
22 07:40:46.934378 progress 15 % (1 MB)
23 07:40:46.936597 progress 20 % (1 MB)
24 07:40:46.938839 progress 25 % (2 MB)
25 07:40:46.941043 progress 30 % (2 MB)
26 07:40:46.943153 progress 35 % (2 MB)
27 07:40:46.945360 progress 40 % (3 MB)
28 07:40:46.948104 progress 45 % (3 MB)
29 07:40:46.950768 progress 50 % (4 MB)
30 07:40:46.953067 progress 55 % (4 MB)
31 07:40:46.955298 progress 60 % (4 MB)
32 07:40:46.957331 progress 65 % (5 MB)
33 07:40:46.959575 progress 70 % (5 MB)
34 07:40:46.961781 progress 75 % (6 MB)
35 07:40:46.964023 progress 80 % (6 MB)
36 07:40:46.966234 progress 85 % (6 MB)
37 07:40:46.968432 progress 90 % (7 MB)
38 07:40:46.970692 progress 95 % (7 MB)
39 07:40:46.972795 progress 100 % (8 MB)
40 07:40:46.973037 8 MB downloaded in 0.58 s (13.87 MB/s)
41 07:40:46.973198 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:40:46.973441 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:40:46.973534 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:40:46.973621 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:40:46.973762 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:40:46.973843 saving as /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/kernel/bzImage
48 07:40:46.973941 total size: 8572816 (8 MB)
49 07:40:46.974004 No compression specified
50 07:40:46.975414 progress 0 % (0 MB)
51 07:40:46.977783 progress 5 % (0 MB)
52 07:40:46.980095 progress 10 % (0 MB)
53 07:40:46.982385 progress 15 % (1 MB)
54 07:40:46.984650 progress 20 % (1 MB)
55 07:40:46.986963 progress 25 % (2 MB)
56 07:40:46.989303 progress 30 % (2 MB)
57 07:40:46.991621 progress 35 % (2 MB)
58 07:40:46.993911 progress 40 % (3 MB)
59 07:40:46.996183 progress 45 % (3 MB)
60 07:40:46.998481 progress 50 % (4 MB)
61 07:40:47.000732 progress 55 % (4 MB)
62 07:40:47.003006 progress 60 % (4 MB)
63 07:40:47.005382 progress 65 % (5 MB)
64 07:40:47.007692 progress 70 % (5 MB)
65 07:40:47.009976 progress 75 % (6 MB)
66 07:40:47.012178 progress 80 % (6 MB)
67 07:40:47.014471 progress 85 % (6 MB)
68 07:40:47.016691 progress 90 % (7 MB)
69 07:40:47.018948 progress 95 % (7 MB)
70 07:40:47.021170 progress 100 % (8 MB)
71 07:40:47.021360 8 MB downloaded in 0.05 s (172.43 MB/s)
72 07:40:47.021504 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:40:47.021733 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:40:47.021826 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:40:47.021957 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:40:47.022098 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:40:47.022170 saving as /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/modules/modules.tar
79 07:40:47.022232 total size: 251144 (0 MB)
80 07:40:47.022294 Using unxz to decompress xz
81 07:40:47.026647 progress 13 % (0 MB)
82 07:40:47.027042 progress 26 % (0 MB)
83 07:40:47.027275 progress 39 % (0 MB)
84 07:40:47.028921 progress 52 % (0 MB)
85 07:40:47.030886 progress 65 % (0 MB)
86 07:40:47.032745 progress 78 % (0 MB)
87 07:40:47.034523 progress 91 % (0 MB)
88 07:40:47.036485 progress 100 % (0 MB)
89 07:40:47.041833 0 MB downloaded in 0.02 s (12.22 MB/s)
90 07:40:47.042104 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:40:47.042379 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:40:47.042478 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 07:40:47.042580 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 07:40:47.042668 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:40:47.042757 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 07:40:47.042973 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q
98 07:40:47.043108 makedir: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin
99 07:40:47.043218 makedir: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/tests
100 07:40:47.043319 makedir: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/results
101 07:40:47.043436 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-add-keys
102 07:40:47.043583 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-add-sources
103 07:40:47.043717 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-background-process-start
104 07:40:47.043849 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-background-process-stop
105 07:40:47.043978 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-common-functions
106 07:40:47.044105 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-echo-ipv4
107 07:40:47.044232 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-install-packages
108 07:40:47.044359 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-installed-packages
109 07:40:47.044485 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-os-build
110 07:40:47.044616 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-probe-channel
111 07:40:47.044743 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-probe-ip
112 07:40:47.044870 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-target-ip
113 07:40:47.044998 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-target-mac
114 07:40:47.045123 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-target-storage
115 07:40:47.045254 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-case
116 07:40:47.045382 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-event
117 07:40:47.045509 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-feedback
118 07:40:47.045635 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-raise
119 07:40:47.045764 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-reference
120 07:40:47.045928 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-runner
121 07:40:47.046055 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-set
122 07:40:47.046184 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-test-shell
123 07:40:47.046319 Updating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-install-packages (oe)
124 07:40:47.046473 Updating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/bin/lava-installed-packages (oe)
125 07:40:47.046602 Creating /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/environment
126 07:40:47.046702 LAVA metadata
127 07:40:47.046780 - LAVA_JOB_ID=12435188
128 07:40:47.046846 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:40:47.046968 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 07:40:47.047040 skipped lava-vland-overlay
131 07:40:47.047115 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:40:47.047195 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 07:40:47.047257 skipped lava-multinode-overlay
134 07:40:47.047329 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:40:47.047411 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 07:40:47.047486 Loading test definitions
137 07:40:47.047580 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 07:40:47.047676 Using /lava-12435188 at stage 0
139 07:40:47.048001 uuid=12435188_1.4.2.3.1 testdef=None
140 07:40:47.048089 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:40:47.048178 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 07:40:47.048714 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:40:47.048935 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 07:40:47.049580 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:40:47.049808 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 07:40:47.050527 runner path: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/0/tests/0_dmesg test_uuid 12435188_1.4.2.3.1
149 07:40:47.050684 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:40:47.050913 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 07:40:47.050986 Using /lava-12435188 at stage 1
153 07:40:47.051289 uuid=12435188_1.4.2.3.5 testdef=None
154 07:40:47.051377 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 07:40:47.051461 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 07:40:47.051939 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 07:40:47.052159 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 07:40:47.052820 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 07:40:47.053053 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 07:40:47.053684 runner path: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/1/tests/1_bootrr test_uuid 12435188_1.4.2.3.5
163 07:40:47.053843 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 07:40:47.054052 Creating lava-test-runner.conf files
166 07:40:47.054116 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/0 for stage 0
167 07:40:47.054207 - 0_dmesg
168 07:40:47.054287 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435188/lava-overlay-rmllmv5q/lava-12435188/1 for stage 1
169 07:40:47.054378 - 1_bootrr
170 07:40:47.054474 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 07:40:47.054560 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 07:40:47.062993 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 07:40:47.063102 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 07:40:47.063188 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 07:40:47.063271 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 07:40:47.063359 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 07:40:47.312685 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 07:40:47.313046 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 07:40:47.313165 extracting modules file /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435188/extract-overlay-ramdisk-7y4byd5d/ramdisk
180 07:40:47.326613 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 07:40:47.326741 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 07:40:47.326836 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435188/compress-overlay-k6604v7o/overlay-1.4.2.4.tar.gz to ramdisk
183 07:40:47.326907 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435188/compress-overlay-k6604v7o/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435188/extract-overlay-ramdisk-7y4byd5d/ramdisk
184 07:40:47.336028 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 07:40:47.336179 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 07:40:47.336274 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 07:40:47.336367 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 07:40:47.336446 Building ramdisk /var/lib/lava/dispatcher/tmp/12435188/extract-overlay-ramdisk-7y4byd5d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435188/extract-overlay-ramdisk-7y4byd5d/ramdisk
189 07:40:47.463435 >> 49790 blocks
190 07:40:48.318315 rename /var/lib/lava/dispatcher/tmp/12435188/extract-overlay-ramdisk-7y4byd5d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
191 07:40:48.318747 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 07:40:48.318867 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 07:40:48.318972 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 07:40:48.319065 No mkimage arch provided, not using FIT.
195 07:40:48.319151 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 07:40:48.319232 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 07:40:48.319337 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 07:40:48.319431 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 07:40:48.319507 No LXC device requested
200 07:40:48.319588 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 07:40:48.319677 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 07:40:48.319763 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 07:40:48.319837 Checking files for TFTP limit of 4294967296 bytes.
204 07:40:48.320239 end: 1 tftp-deploy (duration 00:00:02) [common]
205 07:40:48.320346 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 07:40:48.320434 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 07:40:48.320557 substitutions:
208 07:40:48.320620 - {DTB}: None
209 07:40:48.320681 - {INITRD}: 12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
210 07:40:48.320739 - {KERNEL}: 12435188/tftp-deploy-2sj5ko6u/kernel/bzImage
211 07:40:48.320795 - {LAVA_MAC}: None
212 07:40:48.320850 - {PRESEED_CONFIG}: None
213 07:40:48.320903 - {PRESEED_LOCAL}: None
214 07:40:48.320956 - {RAMDISK}: 12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
215 07:40:48.321009 - {ROOT_PART}: None
216 07:40:48.321062 - {ROOT}: None
217 07:40:48.321114 - {SERVER_IP}: 192.168.201.1
218 07:40:48.321166 - {TEE}: None
219 07:40:48.321218 Parsed boot commands:
220 07:40:48.321270 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 07:40:48.321441 Parsed boot commands: tftpboot 192.168.201.1 12435188/tftp-deploy-2sj5ko6u/kernel/bzImage 12435188/tftp-deploy-2sj5ko6u/kernel/cmdline 12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
222 07:40:48.321526 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 07:40:48.321610 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 07:40:48.321700 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 07:40:48.321784 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 07:40:48.321877 Not connected, no need to disconnect.
227 07:40:48.321965 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 07:40:48.322045 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 07:40:48.322110 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-5'
230 07:40:48.326143 Setting prompt string to ['lava-test: # ']
231 07:40:48.326513 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 07:40:48.326619 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 07:40:48.326716 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 07:40:48.326808 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 07:40:48.327034 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=reboot'
236 07:40:54.926364 >> Command sent successfully.
237 07:40:54.937228 Returned 0 in 6 seconds
238 07:40:55.038475 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
240 07:40:55.040012 end: 2.2.2 reset-device (duration 00:00:07) [common]
241 07:40:55.040561 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
242 07:40:55.041029 Setting prompt string to 'Starting depthcharge on Kaisa...'
243 07:40:55.041415 Changing prompt to 'Starting depthcharge on Kaisa...'
244 07:40:55.041788 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
245 07:40:55.043109 [Enter `^Ec?' for help]
246 07:40:55.366295 �
247 07:40:55.366811
248 07:40:55.377154 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
249 07:40:55.381752 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
250 07:40:55.387224 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
251 07:40:55.392304 CPU: AES supported, TXT NOT supported, VT supported
252 07:40:55.397079 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
253 07:40:55.402406 PCH: device id 0285 (rev 00) is Cometlake-U Base
254 07:40:55.407454 IGD: device id 9baa (rev 04) is CometLake ULT GT2
255 07:40:55.410211 VBOOT: Loading verstage.
256 07:40:55.415364 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 07:40:55.420438 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 07:40:55.425429 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 07:40:55.428843 CBFS: Locating 'fallback/verstage'
260 07:40:55.432794 CBFS: Found @ offset 10c240 size 1152c
261 07:40:55.433738
262 07:40:55.434855
263 07:40:55.444832 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
264 07:40:55.459716 Probing TPM: . done!
265 07:40:55.462875 TPM ready after 0 ms
266 07:40:55.467818 Connected to device vid:did:rid of 1ae0:0028:00
267 07:40:55.478143 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
268 07:40:55.481600 Initialized TPM device CR50 revision 0
269 07:40:55.591805 tlcl_send_startup: Startup return code is 0
270 07:40:55.593053 TPM: setup succeeded
271 07:40:55.606272 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 07:40:55.619042 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 07:40:55.627621 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 07:40:55.639900 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 07:40:55.643283 Chrome EC: UHEPI supported
276 07:40:55.643982 Phase 1
277 07:40:55.649800 FMAP: area GBB found @ c05000 (12288 bytes)
278 07:40:55.655955 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 07:40:55.662189 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 07:40:55.666179 Recovery requested (1009000e)
281 07:40:55.671288 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 07:40:55.681217 tlcl_extend: response is 0
283 07:40:55.685762 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 07:40:55.695699 tlcl_extend: response is 0
285 07:40:55.700642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 07:40:55.704280 CBFS: Locating 'fallback/romstage'
287 07:40:55.707689 CBFS: Found @ offset 80 size 1607c
288 07:40:55.713536 BS: verstage times (exec / console): total (unknown) / 119 ms
289 07:40:55.715636
290 07:40:55.716125
291 07:40:55.726317 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
292 07:40:55.732396 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 07:40:55.737387 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 07:40:55.741532 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 07:40:55.746635 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
296 07:40:55.750115 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 07:40:55.754599 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
298 07:40:55.756635 TCO_STS: 0000 0000
299 07:40:55.759407 GEN_PMCON: e0015038 00000200
300 07:40:55.763362 GBLRST_CAUSE: 00000000 00000000
301 07:40:55.764805 prev_sleep_state 5
302 07:40:55.769226 Boot Count incremented to 18583
303 07:40:55.774756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 07:40:55.776948 CBFS: Locating 'fspm.bin'
305 07:40:55.780503 CBFS: Found @ offset 66fc0 size 71000
306 07:40:55.784494 Chrome EC: UHEPI supported
307 07:40:55.791734 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
308 07:40:55.795554 Probing TPM: done!
309 07:40:55.800553 Connected to device vid:did:rid of 1ae0:0028:00
310 07:40:55.811770 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
311 07:40:55.815132 Initialized TPM device CR50 revision 0
312 07:40:55.828782 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 07:40:55.834982 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
314 07:40:55.837801 MRC cache found, size 1948
315 07:40:55.839723 bootmode is set to: 2
316 07:40:55.842569 PRMRR disabled by config.
317 07:40:55.848329 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
318 07:40:55.851596 SPD_CACHE: cache found, size 0x1000
319 07:40:55.854632 No memory dimm at address 50
320 07:40:55.857310 SPD_CACHE: DIMM0 is not present
321 07:40:55.863567 SPD_CACHE: DIMM1 is the same
322 07:40:55.864478 SPD @ 0x52
323 07:40:55.867298 SPD: module type is DDR4
324 07:40:55.872121 SPD: module part number is HMA851S6CJR6N-VK
325 07:40:55.877616 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
326 07:40:55.882593 SPD: device width 16 bits, bus width 64 bits
327 07:40:55.886416 SPD: module size is 4096 MB (per channel)
328 07:40:55.890131 memory slot: 2 configuration done.
329 07:40:55.938754 CBMEM:
330 07:40:55.942066 IMD: root @ 0x99fff000 254 entries.
331 07:40:55.946314 IMD: root @ 0x99ffec00 62 entries.
332 07:40:55.951370 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 07:40:55.955103 WARNING: RO_VPD is uninitialized or empty.
334 07:40:55.959395 FMAP: area RW_VPD found @ af8000 (8192 bytes)
335 07:40:55.963469 External stage cache:
336 07:40:55.966648 IMD: root @ 0x9abff000 254 entries.
337 07:40:55.970387 IMD: root @ 0x9abfec00 62 entries.
338 07:40:55.985230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
339 07:40:55.994778 tlcl_write: response is 0
340 07:40:55.999034 MRC: TPM MRC hash updated successfully.
341 07:40:55.999748 1 DIMMs found
342 07:40:56.001296 SMM Memory Map
343 07:40:56.005240 SMRAM : 0x9a000000 0x1000000
344 07:40:56.007905 Subregion 0: 0x9a000000 0xa00000
345 07:40:56.012481 Subregion 1: 0x9aa00000 0x200000
346 07:40:56.015359 Subregion 2: 0x9ac00000 0x400000
347 07:40:56.017087 top_of_ram = 0x9a000000
348 07:40:56.023492 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
349 07:40:56.029267 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
350 07:40:56.033456 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 07:40:56.038139 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
352 07:40:56.041618 CBFS: Locating 'fallback/postcar'
353 07:40:56.045403 CBFS: Found @ offset 1076c0 size 4b28
354 07:40:56.052240 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
355 07:40:56.061656 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
356 07:40:56.066668 Processing 173 relocs. Offset value of 0x97c0c000
357 07:40:56.075602 BS: romstage times (exec / console): total (unknown) / 267 ms
358 07:40:56.075861
359 07:40:56.075930
360 07:40:56.086057 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
361 07:40:56.091891 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 07:40:56.095038 CBFS: Locating 'fallback/ramstage'
363 07:40:56.098725 CBFS: Found @ offset 44e00 size 1e0ef
364 07:40:56.105698 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
365 07:40:56.136706 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
366 07:40:56.141916 Processing 4604 relocs. Offset value of 0x98da5000
367 07:40:56.148080 BS: postcar times (exec / console): total (unknown) / 43 ms
368 07:40:56.148602
369 07:40:56.148962
370 07:40:56.159440 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
371 07:40:56.160468 Normal boot
372 07:40:56.165614 cse_lite: Skip switching to RW in the recovery path
373 07:40:56.170872 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
374 07:40:56.176120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
375 07:40:56.180672 CBFS: Locating 'cpu_microcode_blob.bin'
376 07:40:56.184556 CBFS: Found @ offset 16180 size 2ec00
377 07:40:56.188482 microcode: sig=0xa0660 pf=0x80 revision=0xc9
378 07:40:56.190836 Skip microcode update
379 07:40:56.195887 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 07:40:56.198185 CBFS: Locating 'fsps.bin'
381 07:40:56.202667 CBFS: Found @ offset d8fc0 size 2e69d
382 07:40:56.238754 Detected 2 core, 2 thread CPU.
383 07:40:56.240903 Setting up SMI for CPU
384 07:40:56.242958 IED base = 0x9ac00000
385 07:40:56.244490 IED size = 0x00400000
386 07:40:56.247381 Will perform SMM setup.
387 07:40:56.251991 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
388 07:40:56.260383 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 07:40:56.265804 Processing 16 relocs. Offset value of 0x00030000
390 07:40:56.267904 Attempting to start 1 APs
391 07:40:56.271392 Waiting for 10ms after sending INIT.
392 07:40:56.286330 Waiting for 1st SIPI to complete...done.
393 07:40:56.288186 AP: slot 1 apic_id 2.
394 07:40:56.291714 Waiting for 2nd SIPI to complete...done.
395 07:40:56.300577 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 07:40:56.304887 Processing 13 relocs. Offset value of 0x00038000
397 07:40:56.311966 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
398 07:40:56.316026 Installing SMM handler to 0x9a000000
399 07:40:56.323903 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
400 07:40:56.329168 Processing 617 relocs. Offset value of 0x9a010000
401 07:40:56.337133 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
402 07:40:56.342790 Processing 13 relocs. Offset value of 0x9a008000
403 07:40:56.348339 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
404 07:40:56.355447 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
405 07:40:56.358886 Clearing SMI status registers
406 07:40:56.360131 SMI_STS: PM1
407 07:40:56.361832 PM1_STS: PWRBTN
408 07:40:56.364243 New SMBASE 0x9a000000
409 07:40:56.367322 In relocation handler: CPU 0
410 07:40:56.370509 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
411 07:40:56.375671 Writing SMRR. base = 0x9a000006, mask=0xff000800
412 07:40:56.378683 Relocation complete.
413 07:40:56.380730 New SMBASE 0x99fffc00
414 07:40:56.383736 In relocation handler: CPU 1
415 07:40:56.387639 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
416 07:40:56.392511 Writing SMRR. base = 0x9a000006, mask=0xff000800
417 07:40:56.394060 Relocation complete.
418 07:40:56.396022 Initializing CPU #0
419 07:40:56.400385 CPU: vendor Intel device a0660
420 07:40:56.403695 CPU: family 06, model a6, stepping 00
421 07:40:56.406206 Clearing out pending MCEs
422 07:40:56.408469 Setting up local APIC...
423 07:40:56.411073 apic_id: 0x00 done.
424 07:40:56.414670 Turbo is available but hidden
425 07:40:56.416141 Turbo is unavailable
426 07:40:56.418605 VMX status: enabled
427 07:40:56.421460 IA32_FEATURE_CONTROL status: locked
428 07:40:56.423472 Skip microcode update
429 07:40:56.425651 CPU #0 initialized
430 07:40:56.428440 Initializing CPU #1
431 07:40:56.431255 CPU: vendor Intel device a0660
432 07:40:56.434765 CPU: family 06, model a6, stepping 00
433 07:40:56.438187 Clearing out pending MCEs
434 07:40:56.439980 Setting up local APIC...
435 07:40:56.442671 apic_id: 0x02 done.
436 07:40:56.444792 VMX status: enabled
437 07:40:56.447824 IA32_FEATURE_CONTROL status: locked
438 07:40:56.450193 Skip microcode update
439 07:40:56.452860 CPU #1 initialized
440 07:40:56.456933 bsp_do_flight_plan done after 160 msecs.
441 07:40:56.458544 Enabling SMIs.
442 07:40:56.459528 Locking SMM.
443 07:40:56.465363 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
444 07:40:56.476816 Waiting for DisplayPort
445 07:40:59.495046 DisplayPort not ready after 3000ms. Abort.
446 07:40:59.501566 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 07:40:59.503221 CBFS: Locating 'vbt.bin'
448 07:40:59.507523 CBFS: Found @ offset 66a80 size 49e
449 07:40:59.512040 Found a VBT of 4608 bytes after decompression
450 07:40:59.513603 psys_pmax = 182W
451 07:40:59.562785 Display FSP Version Info HOB
452 07:40:59.566096 Reference Code - CPU = 9.0.1e.30
453 07:40:59.568650 uCode Version = 0.0.0.ca
454 07:40:59.571830 TXT ACM version = ff.ff.ff.ffff
455 07:40:59.574617 Reference Code - ME = 9.0.1e.30
456 07:40:59.576870 MEBx version = 0.0.0.0
457 07:40:59.581056 ME Firmware Version = Consumer SKU
458 07:40:59.584752 Reference Code - CML PCH = 9.0.1e.30
459 07:40:59.586746 PCH-CRID Status = Disabled
460 07:40:59.591827 PCH-CRID Original Value = ff.ff.ff.ffff
461 07:40:59.594307 PCH-CRID New Value = ff.ff.ff.ffff
462 07:40:59.598254 OPROM - RST - RAID = ff.ff.ff.ffff
463 07:40:59.602561 ChipsetInit Base Version = ff.ff.ff.ffff
464 07:40:59.606284 ChipsetInit Oem Version = ff.ff.ff.ffff
465 07:40:59.610920 Reference Code - SA - System Agent = 9.0.1e.30
466 07:40:59.613977 Reference Code - MRC = 0.0.0.2d
467 07:40:59.616911 SA - PCIe Version = 9.0.1e.30
468 07:40:59.619544 SA-CRID Status = Disabled
469 07:40:59.622876 SA-CRID Original Value = 0.0.0.0
470 07:40:59.626012 SA-CRID New Value = 0.0.0.0
471 07:40:59.629091 OPROM - VBIOS = ff.ff.ff.ffff
472 07:40:59.633241 Found PCIe Root Port #7 at PCI: 00:1c.0.
473 07:40:59.640115 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
474 07:40:59.651811 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
475 07:40:59.663838 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
476 07:40:59.676092 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
477 07:40:59.682270 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3064 / 140 ms
478 07:40:59.684096 RTC Init
479 07:40:59.687671 Set power on after power failure.
480 07:40:59.690208 Disabling Deep S3
481 07:40:59.691494 Disabling Deep S3
482 07:40:59.693462 Disabling Deep S4
483 07:40:59.695100 Disabling Deep S4
484 07:40:59.697211 Disabling Deep S5
485 07:40:59.698981 Disabling Deep S5
486 07:40:59.704428 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
487 07:40:59.707233 Enumerating buses...
488 07:40:59.711074 Show all devs... Before device enumeration.
489 07:40:59.713551 Root Device: enabled 1
490 07:40:59.716895 CPU_CLUSTER: 0: enabled 1
491 07:40:59.718473 DOMAIN: 0000: enabled 1
492 07:40:59.720527 APIC: 00: enabled 1
493 07:40:59.722910 PCI: 00:00.0: enabled 1
494 07:40:59.725718 PCI: 00:02.0: enabled 1
495 07:40:59.727803 PCI: 00:04.0: enabled 1
496 07:40:59.731078 PCI: 00:05.0: enabled 0
497 07:40:59.732800 PCI: 00:12.0: enabled 1
498 07:40:59.735301 PCI: 00:12.5: enabled 0
499 07:40:59.737959 PCI: 00:12.6: enabled 0
500 07:40:59.740322 PCI: 00:14.0: enabled 1
501 07:40:59.742345 PCI: 00:14.1: enabled 0
502 07:40:59.744636 PCI: 00:14.3: enabled 1
503 07:40:59.747079 PCI: 00:14.5: enabled 1
504 07:40:59.749347 PCI: 00:15.0: enabled 0
505 07:40:59.751770 PCI: 00:15.1: enabled 0
506 07:40:59.754516 PCI: 00:15.2: enabled 1
507 07:40:59.756747 PCI: 00:15.3: enabled 1
508 07:40:59.759315 PCI: 00:16.0: enabled 1
509 07:40:59.762286 PCI: 00:16.1: enabled 0
510 07:40:59.763925 PCI: 00:16.2: enabled 0
511 07:40:59.766416 PCI: 00:16.3: enabled 0
512 07:40:59.768881 PCI: 00:16.4: enabled 0
513 07:40:59.771726 PCI: 00:16.5: enabled 0
514 07:40:59.774394 PCI: 00:17.0: enabled 1
515 07:40:59.776874 PCI: 00:19.0: enabled 1
516 07:40:59.779501 PCI: 00:19.1: enabled 0
517 07:40:59.781591 PCI: 00:19.2: enabled 0
518 07:40:59.783727 PCI: 00:1a.0: enabled 1
519 07:40:59.785905 PCI: 00:1c.0: enabled 0
520 07:40:59.789107 PCI: 00:1c.1: enabled 0
521 07:40:59.791032 PCI: 00:1c.2: enabled 0
522 07:40:59.793466 PCI: 00:1c.3: enabled 0
523 07:40:59.795685 PCI: 00:1c.4: enabled 0
524 07:40:59.798288 PCI: 00:1c.5: enabled 0
525 07:40:59.800651 PCI: 00:1c.0: enabled 1
526 07:40:59.803058 PCI: 00:1c.7: enabled 0
527 07:40:59.805274 PCI: 00:1d.0: enabled 1
528 07:40:59.807809 PCI: 00:1d.1: enabled 0
529 07:40:59.810824 PCI: 00:1d.2: enabled 1
530 07:40:59.813309 PCI: 00:1d.3: enabled 0
531 07:40:59.815156 PCI: 00:1d.4: enabled 0
532 07:40:59.817759 PCI: 00:1d.5: enabled 1
533 07:40:59.820368 PCI: 00:1e.0: enabled 1
534 07:40:59.822355 PCI: 00:1e.1: enabled 0
535 07:40:59.824875 PCI: 00:1e.2: enabled 1
536 07:40:59.827638 PCI: 00:1e.3: enabled 0
537 07:40:59.830665 PCI: 00:1f.0: enabled 1
538 07:40:59.832959 PCI: 00:1f.1: enabled 1
539 07:40:59.834882 PCI: 00:1f.2: enabled 1
540 07:40:59.838101 PCI: 00:1f.3: enabled 1
541 07:40:59.839540 PCI: 00:1f.4: enabled 1
542 07:40:59.842658 PCI: 00:1f.5: enabled 1
543 07:40:59.844398 PCI: 00:1f.6: enabled 0
544 07:40:59.846860 GENERIC: 0.0: enabled 1
545 07:40:59.849312 USB0 port 0: enabled 1
546 07:40:59.851510 I2C: 00:4a: enabled 1
547 07:40:59.853797 I2C: 00:4a: enabled 1
548 07:40:59.855597 I2C: 00:1a: enabled 1
549 07:40:59.858540 PCI: 00:00.0: enabled 1
550 07:40:59.860724 PCI: 00:00.0: enabled 1
551 07:40:59.863009 SPI: 00: enabled 1
552 07:40:59.864866 PNP: 0c09.0: enabled 1
553 07:40:59.867632 USB2 port 0: enabled 1
554 07:40:59.870274 USB2 port 1: enabled 1
555 07:40:59.872128 USB2 port 2: enabled 1
556 07:40:59.874790 USB2 port 3: enabled 1
557 07:40:59.876841 USB2 port 5: enabled 1
558 07:40:59.879815 USB2 port 6: enabled 0
559 07:40:59.881567 USB2 port 9: enabled 1
560 07:40:59.884456 USB3 port 0: enabled 1
561 07:40:59.886186 USB3 port 1: enabled 1
562 07:40:59.888721 USB3 port 2: enabled 1
563 07:40:59.891489 USB3 port 3: enabled 1
564 07:40:59.893122 USB3 port 4: enabled 1
565 07:40:59.895355 USB2 port 4: enabled 1
566 07:40:59.898521 USB3 port 5: enabled 1
567 07:40:59.900308 APIC: 02: enabled 1
568 07:40:59.902232 Compare with tree...
569 07:40:59.904280 Root Device: enabled 1
570 07:40:59.907142 CPU_CLUSTER: 0: enabled 1
571 07:40:59.909244 APIC: 00: enabled 1
572 07:40:59.911575 APIC: 02: enabled 1
573 07:40:59.914074 DOMAIN: 0000: enabled 1
574 07:40:59.916734 PCI: 00:00.0: enabled 1
575 07:40:59.919556 PCI: 00:02.0: enabled 1
576 07:40:59.922043 PCI: 00:04.0: enabled 1
577 07:40:59.924854 GENERIC: 0.0: enabled 1
578 07:40:59.927631 PCI: 00:05.0: enabled 0
579 07:40:59.929941 PCI: 00:12.0: enabled 1
580 07:40:59.933117 PCI: 00:12.5: enabled 0
581 07:40:59.935640 PCI: 00:12.6: enabled 0
582 07:40:59.938046 PCI: 00:14.0: enabled 1
583 07:40:59.940665 USB0 port 0: enabled 1
584 07:40:59.943733 USB2 port 0: enabled 1
585 07:40:59.946900 USB2 port 1: enabled 1
586 07:40:59.948976 USB2 port 2: enabled 1
587 07:40:59.951648 USB2 port 3: enabled 1
588 07:40:59.954665 USB2 port 5: enabled 1
589 07:40:59.957769 USB2 port 6: enabled 0
590 07:40:59.960042 USB2 port 9: enabled 1
591 07:40:59.962262 USB3 port 0: enabled 1
592 07:40:59.965385 USB3 port 1: enabled 1
593 07:40:59.968329 USB3 port 2: enabled 1
594 07:40:59.971018 USB3 port 3: enabled 1
595 07:40:59.973604 USB3 port 4: enabled 1
596 07:40:59.976283 USB2 port 4: enabled 1
597 07:40:59.979010 USB3 port 5: enabled 1
598 07:40:59.981393 PCI: 00:14.1: enabled 0
599 07:40:59.984150 PCI: 00:14.3: enabled 1
600 07:40:59.986582 PCI: 00:14.5: enabled 1
601 07:40:59.989259 PCI: 00:15.0: enabled 0
602 07:40:59.992074 PCI: 00:15.1: enabled 0
603 07:40:59.994146 PCI: 00:15.2: enabled 1
604 07:40:59.997293 I2C: 00:4a: enabled 1
605 07:40:59.999694 PCI: 00:15.3: enabled 1
606 07:41:00.002609 I2C: 00:4a: enabled 1
607 07:41:00.004717 PCI: 00:16.0: enabled 1
608 07:41:00.007333 PCI: 00:16.1: enabled 0
609 07:41:00.009908 PCI: 00:16.2: enabled 0
610 07:41:00.012719 PCI: 00:16.3: enabled 0
611 07:41:00.015248 PCI: 00:16.4: enabled 0
612 07:41:00.017638 PCI: 00:16.5: enabled 0
613 07:41:00.020804 PCI: 00:17.0: enabled 1
614 07:41:00.023088 PCI: 00:19.0: enabled 1
615 07:41:00.025753 I2C: 00:1a: enabled 1
616 07:41:00.028120 PCI: 00:19.1: enabled 0
617 07:41:00.031165 PCI: 00:19.2: enabled 0
618 07:41:00.034154 PCI: 00:1a.0: enabled 1
619 07:41:00.036166 PCI: 00:1c.0: enabled 1
620 07:41:00.039166 PCI: 00:00.0: enabled 1
621 07:41:00.041630 PCI: 00:1e.0: enabled 1
622 07:41:00.044433 PCI: 00:1e.1: enabled 0
623 07:41:00.047027 PCI: 00:1e.2: enabled 1
624 07:41:00.048820 SPI: 00: enabled 1
625 07:41:00.051711 PCI: 00:1e.3: enabled 0
626 07:41:00.054454 PCI: 00:1f.0: enabled 1
627 07:41:00.057030 PNP: 0c09.0: enabled 1
628 07:41:00.059453 PCI: 00:1f.1: enabled 1
629 07:41:00.062341 PCI: 00:1f.2: enabled 1
630 07:41:00.064602 PCI: 00:1f.3: enabled 1
631 07:41:00.067918 PCI: 00:1f.4: enabled 1
632 07:41:00.069728 PCI: 00:1f.5: enabled 1
633 07:41:00.072513 PCI: 00:1f.6: enabled 0
634 07:41:00.075339 Root Device scanning...
635 07:41:00.078907 scan_static_bus for Root Device
636 07:41:00.081233 CPU_CLUSTER: 0 enabled
637 07:41:00.083082 DOMAIN: 0000 enabled
638 07:41:00.085403 DOMAIN: 0000 scanning...
639 07:41:00.089392 PCI: pci_scan_bus for bus 00
640 07:41:00.092220 PCI: 00:00.0 [8086/0000] ops
641 07:41:00.095447 PCI: 00:00.0 [8086/9b71] enabled
642 07:41:00.098374 PCI: 00:02.0 [8086/0000] bus ops
643 07:41:00.101514 PCI: 00:02.0 [8086/9baa] enabled
644 07:41:00.105271 PCI: 00:04.0 [8086/0000] bus ops
645 07:41:00.108228 PCI: 00:04.0 [8086/1903] enabled
646 07:41:00.111916 PCI: 00:08.0 [8086/1911] enabled
647 07:41:00.115322 PCI: 00:12.0 [8086/02f9] enabled
648 07:41:00.118365 PCI: 00:14.0 [8086/0000] bus ops
649 07:41:00.121904 PCI: 00:14.0 [8086/02ed] enabled
650 07:41:00.124860 PCI: 00:14.2 [8086/02ef] enabled
651 07:41:00.128466 PCI: 00:14.3 [8086/02f0] enabled
652 07:41:00.131085 PCI: 00:14.5 [8086/0000] ops
653 07:41:00.134750 PCI: 00:14.5 [8086/02f5] enabled
654 07:41:00.138389 PCI: 00:15.0 [8086/0000] bus ops
655 07:41:00.141655 PCI: 00:15.0 [8086/02e8] disabled
656 07:41:00.145072 PCI: 00:15.2 [8086/0000] bus ops
657 07:41:00.147955 PCI: 00:15.2 [8086/02ea] enabled
658 07:41:00.151108 PCI: 00:15.3 [8086/0000] bus ops
659 07:41:00.154693 PCI: 00:15.3 [8086/02eb] enabled
660 07:41:00.157114 PCI: 00:16.0 [8086/0000] ops
661 07:41:00.161546 PCI: 00:16.0 [8086/02e0] enabled
662 07:41:00.166662 PCI: Static device PCI: 00:17.0 not found, disabling it.
663 07:41:00.169868 PCI: 00:19.0 [8086/0000] bus ops
664 07:41:00.173225 PCI: 00:19.0 [8086/02c5] enabled
665 07:41:00.176682 PCI: 00:1a.0 [8086/0000] ops
666 07:41:00.179516 PCI: 00:1a.0 [8086/02c4] enabled
667 07:41:00.182550 PCI: 00:1c.0 [8086/0000] bus ops
668 07:41:00.186123 PCI: 00:1c.0 [8086/02be] enabled
669 07:41:00.189037 PCI: 00:1e.0 [8086/0000] ops
670 07:41:00.192421 PCI: 00:1e.0 [8086/02a8] enabled
671 07:41:00.195652 PCI: 00:1e.2 [8086/0000] bus ops
672 07:41:00.198912 PCI: 00:1e.2 [8086/02aa] enabled
673 07:41:00.202376 PCI: 00:1f.0 [8086/0000] bus ops
674 07:41:00.206115 PCI: 00:1f.0 [8086/0285] enabled
675 07:41:00.211089 PCI: Static device PCI: 00:1f.1 not found, disabling it.
676 07:41:00.217307 PCI: Static device PCI: 00:1f.2 not found, disabling it.
677 07:41:00.220021 PCI: 00:1f.3 [8086/0000] bus ops
678 07:41:00.223350 PCI: 00:1f.3 [8086/02c8] enabled
679 07:41:00.227054 PCI: 00:1f.4 [8086/0000] bus ops
680 07:41:00.230010 PCI: 00:1f.4 [8086/02a3] enabled
681 07:41:00.233460 PCI: 00:1f.5 [8086/0000] bus ops
682 07:41:00.236896 PCI: 00:1f.5 [8086/02a4] enabled
683 07:41:00.239795 PCI: Leftover static devices:
684 07:41:00.241137 PCI: 00:05.0
685 07:41:00.242742 PCI: 00:12.5
686 07:41:00.244214 PCI: 00:12.6
687 07:41:00.245152 PCI: 00:14.1
688 07:41:00.246850 PCI: 00:15.1
689 07:41:00.248254 PCI: 00:16.1
690 07:41:00.249758 PCI: 00:16.2
691 07:41:00.251479 PCI: 00:16.3
692 07:41:00.252024 PCI: 00:16.4
693 07:41:00.253496 PCI: 00:16.5
694 07:41:00.254963 PCI: 00:17.0
695 07:41:00.256073 PCI: 00:19.1
696 07:41:00.257670 PCI: 00:19.2
697 07:41:00.259123 PCI: 00:1e.1
698 07:41:00.260269 PCI: 00:1e.3
699 07:41:00.261876 PCI: 00:1f.1
700 07:41:00.262776 PCI: 00:1f.2
701 07:41:00.264733 PCI: 00:1f.6
702 07:41:00.267542 PCI: Check your devicetree.cb.
703 07:41:00.269847 PCI: 00:02.0 scanning...
704 07:41:00.274026 scan_generic_bus for PCI: 00:02.0
705 07:41:00.277732 scan_generic_bus for PCI: 00:02.0 done
706 07:41:00.282427 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
707 07:41:00.285058 PCI: 00:04.0 scanning...
708 07:41:00.288785 scan_generic_bus for PCI: 00:04.0
709 07:41:00.293077 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
710 07:41:00.297099 scan_generic_bus for PCI: 00:04.0 done
711 07:41:00.301629 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
712 07:41:00.304306 PCI: 00:14.0 scanning...
713 07:41:00.307500 scan_static_bus for PCI: 00:14.0
714 07:41:00.309697 USB0 port 0 enabled
715 07:41:00.312062 USB0 port 0 scanning...
716 07:41:00.315487 scan_static_bus for USB0 port 0
717 07:41:00.317253 USB2 port 0 enabled
718 07:41:00.320299 USB2 port 1 enabled
719 07:41:00.322290 USB2 port 2 enabled
720 07:41:00.323832 USB2 port 3 enabled
721 07:41:00.326248 USB2 port 5 enabled
722 07:41:00.327829 USB2 port 6 disabled
723 07:41:00.330429 USB2 port 9 enabled
724 07:41:00.332501 USB3 port 0 enabled
725 07:41:00.334657 USB3 port 1 enabled
726 07:41:00.336722 USB3 port 2 enabled
727 07:41:00.337801 USB3 port 3 enabled
728 07:41:00.340473 USB3 port 4 enabled
729 07:41:00.342273 USB2 port 4 enabled
730 07:41:00.345059 USB3 port 5 enabled
731 07:41:00.347289 USB2 port 0 scanning...
732 07:41:00.350341 scan_static_bus for USB2 port 0
733 07:41:00.353878 scan_static_bus for USB2 port 0 done
734 07:41:00.358886 scan_bus: bus USB2 port 0 finished in 6 msecs
735 07:41:00.361198 USB2 port 1 scanning...
736 07:41:00.364400 scan_static_bus for USB2 port 1
737 07:41:00.368017 scan_static_bus for USB2 port 1 done
738 07:41:00.373319 scan_bus: bus USB2 port 1 finished in 6 msecs
739 07:41:00.376030 USB2 port 2 scanning...
740 07:41:00.378584 scan_static_bus for USB2 port 2
741 07:41:00.382493 scan_static_bus for USB2 port 2 done
742 07:41:00.387423 scan_bus: bus USB2 port 2 finished in 6 msecs
743 07:41:00.389825 USB2 port 3 scanning...
744 07:41:00.392856 scan_static_bus for USB2 port 3
745 07:41:00.396613 scan_static_bus for USB2 port 3 done
746 07:41:00.400967 scan_bus: bus USB2 port 3 finished in 6 msecs
747 07:41:00.403584 USB2 port 5 scanning...
748 07:41:00.406846 scan_static_bus for USB2 port 5
749 07:41:00.411326 scan_static_bus for USB2 port 5 done
750 07:41:00.415276 scan_bus: bus USB2 port 5 finished in 6 msecs
751 07:41:00.417966 USB2 port 9 scanning...
752 07:41:00.421075 scan_static_bus for USB2 port 9
753 07:41:00.425612 scan_static_bus for USB2 port 9 done
754 07:41:00.429433 scan_bus: bus USB2 port 9 finished in 6 msecs
755 07:41:00.432025 USB3 port 0 scanning...
756 07:41:00.436046 scan_static_bus for USB3 port 0
757 07:41:00.439294 scan_static_bus for USB3 port 0 done
758 07:41:00.443666 scan_bus: bus USB3 port 0 finished in 6 msecs
759 07:41:00.446898 USB3 port 1 scanning...
760 07:41:00.450641 scan_static_bus for USB3 port 1
761 07:41:00.453708 scan_static_bus for USB3 port 1 done
762 07:41:00.458182 scan_bus: bus USB3 port 1 finished in 6 msecs
763 07:41:00.461157 USB3 port 2 scanning...
764 07:41:00.463799 scan_static_bus for USB3 port 2
765 07:41:00.467752 scan_static_bus for USB3 port 2 done
766 07:41:00.472584 scan_bus: bus USB3 port 2 finished in 6 msecs
767 07:41:00.474476 USB3 port 3 scanning...
768 07:41:00.478215 scan_static_bus for USB3 port 3
769 07:41:00.482039 scan_static_bus for USB3 port 3 done
770 07:41:00.486662 scan_bus: bus USB3 port 3 finished in 6 msecs
771 07:41:00.489181 USB3 port 4 scanning...
772 07:41:00.492364 scan_static_bus for USB3 port 4
773 07:41:00.496155 scan_static_bus for USB3 port 4 done
774 07:41:00.500475 scan_bus: bus USB3 port 4 finished in 6 msecs
775 07:41:00.502997 USB2 port 4 scanning...
776 07:41:00.506576 scan_static_bus for USB2 port 4
777 07:41:00.510945 scan_static_bus for USB2 port 4 done
778 07:41:00.514952 scan_bus: bus USB2 port 4 finished in 6 msecs
779 07:41:00.517205 USB3 port 5 scanning...
780 07:41:00.521410 scan_static_bus for USB3 port 5
781 07:41:00.525573 scan_static_bus for USB3 port 5 done
782 07:41:00.529936 scan_bus: bus USB3 port 5 finished in 6 msecs
783 07:41:00.533709 scan_static_bus for USB0 port 0 done
784 07:41:00.537786 scan_bus: bus USB0 port 0 finished in 219 msecs
785 07:41:00.541926 scan_static_bus for PCI: 00:14.0 done
786 07:41:00.546641 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
787 07:41:00.549476 PCI: 00:15.2 scanning...
788 07:41:00.552636 scan_generic_bus for PCI: 00:15.2
789 07:41:00.557491 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
790 07:41:00.560575 scan_generic_bus for PCI: 00:15.2 done
791 07:41:00.565156 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
792 07:41:00.568096 PCI: 00:15.3 scanning...
793 07:41:00.572380 scan_generic_bus for PCI: 00:15.3
794 07:41:00.576003 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
795 07:41:00.580312 scan_generic_bus for PCI: 00:15.3 done
796 07:41:00.585256 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
797 07:41:00.587199 PCI: 00:19.0 scanning...
798 07:41:00.591073 scan_generic_bus for PCI: 00:19.0
799 07:41:00.594716 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
800 07:41:00.598793 scan_generic_bus for PCI: 00:19.0 done
801 07:41:00.603635 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
802 07:41:00.606648 PCI: 00:1c.0 scanning...
803 07:41:00.610263 do_pci_scan_bridge for PCI: 00:1c.0
804 07:41:00.613021 PCI: pci_scan_bus for bus 01
805 07:41:00.615616 PCI: 01:00.0 [10ec/8168] ops
806 07:41:00.620274 PCI: 01:00.0 [10ec/8168] enabled
807 07:41:00.623536 Enabling Common Clock Configuration
808 07:41:00.628116 L1 Sub-State supported from root port 28
809 07:41:00.630502 L1 Sub-State Support = 0xf
810 07:41:00.632678 CommonModeRestoreTime = 0x96
811 07:41:00.637967 Power On Value = 0xf, Power On Scale = 0x1
812 07:41:00.639047 ASPM: Enabled L1
813 07:41:00.642814 PCIe: Max_Payload_Size adjusted to 128
814 07:41:00.647604 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
815 07:41:00.650126 PCI: 00:1e.2 scanning...
816 07:41:00.654305 scan_generic_bus for PCI: 00:1e.2
817 07:41:00.657783 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
818 07:41:00.662026 scan_generic_bus for PCI: 00:1e.2 done
819 07:41:00.666682 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
820 07:41:00.669080 PCI: 00:1f.0 scanning...
821 07:41:00.672416 scan_static_bus for PCI: 00:1f.0
822 07:41:00.674539 PNP: 0c09.0 enabled
823 07:41:00.676720 PNP: 0c09.0 scanning...
824 07:41:00.680791 scan_static_bus for PNP: 0c09.0
825 07:41:00.684620 scan_static_bus for PNP: 0c09.0 done
826 07:41:00.689071 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
827 07:41:00.693091 scan_static_bus for PCI: 00:1f.0 done
828 07:41:00.697142 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
829 07:41:00.700192 PCI: 00:1f.3 scanning...
830 07:41:00.703749 scan_static_bus for PCI: 00:1f.3
831 07:41:00.707448 scan_static_bus for PCI: 00:1f.3 done
832 07:41:00.712056 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
833 07:41:00.714767 PCI: 00:1f.4 scanning...
834 07:41:00.718264 scan_generic_bus for PCI: 00:1f.4
835 07:41:00.722258 scan_generic_bus for PCI: 00:1f.4 done
836 07:41:00.727362 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
837 07:41:00.730010 PCI: 00:1f.5 scanning...
838 07:41:00.733000 scan_generic_bus for PCI: 00:1f.5
839 07:41:00.737628 scan_generic_bus for PCI: 00:1f.5 done
840 07:41:00.741640 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
841 07:41:00.746735 scan_bus: bus DOMAIN: 0000 finished in 653 msecs
842 07:41:00.750671 scan_static_bus for Root Device done
843 07:41:00.755005 scan_bus: bus Root Device finished in 672 msecs
844 07:41:00.756278 done
845 07:41:00.762050 BS: BS_DEV_ENUMERATE run times (exec / console): 12 / 1037 ms
846 07:41:00.767766 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
847 07:41:00.774110 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
848 07:41:00.780118 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
849 07:41:00.785032 MRC: 'RECOVERY_MRC_CACHE' does not need update.
850 07:41:00.788738 Chrome EC: UHEPI supported
851 07:41:00.794761 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
852 07:41:00.797736 SPI flash protection: WPSW=0 SRP0=0
853 07:41:00.802633 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
854 07:41:00.809025 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
855 07:41:00.810935 found VGA at PCI: 00:02.0
856 07:41:00.815831 Setting up VGA for PCI: 00:02.0
857 07:41:00.819313 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
858 07:41:00.824817 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
859 07:41:00.827341 Allocating resources...
860 07:41:00.829314 Reading resources...
861 07:41:00.833675 Root Device read_resources bus 0 link: 0
862 07:41:00.838104 CPU_CLUSTER: 0 read_resources bus 0 link: 0
863 07:41:00.843149 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
864 07:41:00.848356 DOMAIN: 0000 read_resources bus 0 link: 0
865 07:41:00.853434 PCI: 00:04.0 read_resources bus 1 link: 0
866 07:41:00.857546 PCI: 00:04.0 read_resources bus 1 link: 0 done
867 07:41:00.863207 PCI: 00:14.0 read_resources bus 0 link: 0
868 07:41:00.867779 USB0 port 0 read_resources bus 0 link: 0
869 07:41:00.876581 USB0 port 0 read_resources bus 0 link: 0 done
870 07:41:00.881477 PCI: 00:14.0 read_resources bus 0 link: 0 done
871 07:41:00.887148 PCI: 00:15.2 read_resources bus 2 link: 0
872 07:41:00.892351 PCI: 00:15.2 read_resources bus 2 link: 0 done
873 07:41:00.897723 PCI: 00:15.3 read_resources bus 3 link: 0
874 07:41:00.902476 PCI: 00:15.3 read_resources bus 3 link: 0 done
875 07:41:00.907050 PCI: 00:19.0 read_resources bus 4 link: 0
876 07:41:00.912641 PCI: 00:19.0 read_resources bus 4 link: 0 done
877 07:41:00.917895 PCI: 00:1c.0 read_resources bus 1 link: 0
878 07:41:00.922698 PCI: 00:1c.0 read_resources bus 1 link: 0 done
879 07:41:00.928258 PCI: 00:1e.2 read_resources bus 5 link: 0
880 07:41:00.933234 PCI: 00:1e.2 read_resources bus 5 link: 0 done
881 07:41:00.938080 PCI: 00:1f.0 read_resources bus 0 link: 0
882 07:41:00.942666 PCI: 00:1f.0 read_resources bus 0 link: 0 done
883 07:41:00.949462 DOMAIN: 0000 read_resources bus 0 link: 0 done
884 07:41:00.954189 Root Device read_resources bus 0 link: 0 done
885 07:41:00.956727 Done reading resources.
886 07:41:00.961909 Show resources in subtree (Root Device)...After reading.
887 07:41:00.966608 Root Device child on link 0 CPU_CLUSTER: 0
888 07:41:00.970807 CPU_CLUSTER: 0 child on link 0 APIC: 00
889 07:41:00.971559 APIC: 00
890 07:41:00.973490 APIC: 02
891 07:41:00.977412 DOMAIN: 0000 child on link 0 PCI: 00:00.0
892 07:41:00.986390 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
893 07:41:00.995889 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
894 07:41:00.997977 PCI: 00:00.0
895 07:41:01.007718 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
896 07:41:01.016595 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
897 07:41:01.026054 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
898 07:41:01.035645 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
899 07:41:01.045277 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
900 07:41:01.054583 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
901 07:41:01.063815 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
902 07:41:01.073107 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
903 07:41:01.082598 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
904 07:41:01.091598 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
905 07:41:01.101468 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
906 07:41:01.110379 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
907 07:41:01.119460 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
908 07:41:01.129214 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
909 07:41:01.138887 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
910 07:41:01.148077 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
911 07:41:01.149100 PCI: 00:02.0
912 07:41:01.160042 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
913 07:41:01.170038 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
914 07:41:01.178739 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
915 07:41:01.183216 PCI: 00:04.0 child on link 0 GENERIC: 0.0
916 07:41:01.192962 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
917 07:41:01.195411 GENERIC: 0.0
918 07:41:01.196901 PCI: 00:08.0
919 07:41:01.205679 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
920 07:41:01.208207 PCI: 00:12.0
921 07:41:01.217614 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
922 07:41:01.221610 PCI: 00:14.0 child on link 0 USB0 port 0
923 07:41:01.232155 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
924 07:41:01.236322 USB0 port 0 child on link 0 USB2 port 0
925 07:41:01.237944 USB2 port 0
926 07:41:01.239877 USB2 port 1
927 07:41:01.241697 USB2 port 2
928 07:41:01.243554 USB2 port 3
929 07:41:01.244938 USB2 port 5
930 07:41:01.246711 USB2 port 6
931 07:41:01.248649 USB2 port 9
932 07:41:01.250951 USB3 port 0
933 07:41:01.252414 USB3 port 1
934 07:41:01.254566 USB3 port 2
935 07:41:01.256179 USB3 port 3
936 07:41:01.257875 USB3 port 4
937 07:41:01.259221 USB2 port 4
938 07:41:01.261585 USB3 port 5
939 07:41:01.263134 PCI: 00:14.2
940 07:41:01.273083 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
941 07:41:01.282615 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
942 07:41:01.285074 PCI: 00:14.3
943 07:41:01.293977 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
944 07:41:01.296013 PCI: 00:14.5
945 07:41:01.305981 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
946 07:41:01.307747 PCI: 00:15.0
947 07:41:01.311815 PCI: 00:15.2 child on link 0 I2C: 02:4a
948 07:41:01.322058 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
949 07:41:01.323188 I2C: 02:4a
950 07:41:01.327808 PCI: 00:15.3 child on link 0 I2C: 03:4a
951 07:41:01.337896 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
952 07:41:01.338843 I2C: 03:4a
953 07:41:01.340616 PCI: 00:16.0
954 07:41:01.350687 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
955 07:41:01.355122 PCI: 00:19.0 child on link 0 I2C: 04:1a
956 07:41:01.364494 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
957 07:41:01.366949 I2C: 04:1a
958 07:41:01.368216 PCI: 00:1a.0
959 07:41:01.377943 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 07:41:01.382146 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
961 07:41:01.391108 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
962 07:41:01.401058 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
963 07:41:01.410080 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
964 07:41:01.412183 PCI: 01:00.0
965 07:41:01.420069 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
966 07:41:01.430607 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
967 07:41:01.440833 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
968 07:41:01.441835 PCI: 00:1e.0
969 07:41:01.452965 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
970 07:41:01.462765 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
971 07:41:01.467234 PCI: 00:1e.2 child on link 0 SPI: 00
972 07:41:01.476468 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 07:41:01.478263 SPI: 00
974 07:41:01.482118 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
975 07:41:01.491306 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
976 07:41:01.500333 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
977 07:41:01.502189 PNP: 0c09.0
978 07:41:01.510602 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
979 07:41:01.511696 PCI: 00:1f.3
980 07:41:01.521731 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
981 07:41:01.532576 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
982 07:41:01.534233 PCI: 00:1f.4
983 07:41:01.542938 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
984 07:41:01.552293 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
985 07:41:01.554664 PCI: 00:1f.5
986 07:41:01.563248 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
987 07:41:01.571543 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
988 07:41:01.576867 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
989 07:41:01.580139 PCI: 01:00.0 10 * [0x0 - 0xff] io
990 07:41:01.586419 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
991 07:41:01.593296 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
992 07:41:01.596559 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
993 07:41:01.601179 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
994 07:41:01.608764 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
995 07:41:01.615984 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
996 07:41:01.623438 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
997 07:41:01.630770 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
998 07:41:01.637219 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
999 07:41:01.644182 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1000 07:41:01.651952 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1001 07:41:01.659990 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1002 07:41:01.667223 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1003 07:41:01.670380 DOMAIN: 0000: Resource ranges:
1004 07:41:01.673786 * Base: 1000, Size: 800, Tag: 100
1005 07:41:01.677367 * Base: 1900, Size: d6a0, Tag: 100
1006 07:41:01.681410 * Base: efc0, Size: 1040, Tag: 100
1007 07:41:01.686405 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1008 07:41:01.691466 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1009 07:41:01.698144 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1010 07:41:01.704899 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1011 07:41:01.713396 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1012 07:41:01.720638 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1013 07:41:01.727989 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1014 07:41:01.735656 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1015 07:41:01.743734 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1016 07:41:01.751455 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1017 07:41:01.758617 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1018 07:41:01.766036 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1019 07:41:01.773813 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1020 07:41:01.781982 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1021 07:41:01.789045 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1022 07:41:01.797053 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1023 07:41:01.804822 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1024 07:41:01.812990 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1025 07:41:01.820055 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1026 07:41:01.827839 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1027 07:41:01.835564 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1028 07:41:01.839122 DOMAIN: 0000: Resource ranges:
1029 07:41:01.843028 * Base: 9f800000, Size: 40800000, Tag: 200
1030 07:41:01.847824 * Base: f0000000, Size: c000000, Tag: 200
1031 07:41:01.851928 * Base: fc001000, Size: 1fff000, Tag: 200
1032 07:41:01.856396 * Base: fe010000, Size: 22000, Tag: 200
1033 07:41:01.860016 * Base: fe033000, Size: cdd000, Tag: 200
1034 07:41:01.863976 * Base: fed18000, Size: 68000, Tag: 200
1035 07:41:01.868258 * Base: fed84000, Size: c000, Tag: 200
1036 07:41:01.872675 * Base: fed92000, Size: e000, Tag: 200
1037 07:41:01.876877 * Base: feda2000, Size: 125e000, Tag: 200
1038 07:41:01.881542 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1039 07:41:01.888198 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1040 07:41:01.894764 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1041 07:41:01.901499 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1042 07:41:01.908870 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1043 07:41:01.915118 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1044 07:41:01.921253 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1045 07:41:01.927889 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1046 07:41:01.934695 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1047 07:41:01.941347 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1048 07:41:01.947341 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1049 07:41:01.954677 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1050 07:41:01.961431 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1051 07:41:01.967587 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1052 07:41:01.974624 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1053 07:41:01.980755 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1054 07:41:01.987194 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1055 07:41:01.994224 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1056 07:41:02.000895 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1057 07:41:02.007764 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1058 07:41:02.013827 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1059 07:41:02.020799 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1060 07:41:02.027440 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1061 07:41:02.034239 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1062 07:41:02.041809 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1063 07:41:02.044320 PCI: 00:1c.0: Resource ranges:
1064 07:41:02.048131 * Base: 2000, Size: 1000, Tag: 100
1065 07:41:02.053035 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1066 07:41:02.061108 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1067 07:41:02.068930 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1068 07:41:02.072121 PCI: 00:1c.0: Resource ranges:
1069 07:41:02.076587 * Base: 9f800000, Size: 100000, Tag: 200
1070 07:41:02.082642 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1071 07:41:02.089149 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1072 07:41:02.098156 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1073 07:41:02.105663 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1074 07:41:02.109469 Root Device assign_resources, bus 0 link: 0
1075 07:41:02.113882 DOMAIN: 0000 assign_resources, bus 0 link: 0
1076 07:41:02.122944 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1077 07:41:02.130819 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1078 07:41:02.139221 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1079 07:41:02.147297 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1080 07:41:02.152106 PCI: 00:04.0 assign_resources, bus 1 link: 0
1081 07:41:02.156822 PCI: 00:04.0 assign_resources, bus 1 link: 0
1082 07:41:02.164397 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1083 07:41:02.172534 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1084 07:41:02.181492 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1085 07:41:02.185708 PCI: 00:14.0 assign_resources, bus 0 link: 0
1086 07:41:02.190161 PCI: 00:14.0 assign_resources, bus 0 link: 0
1087 07:41:02.198831 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1088 07:41:02.207261 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1089 07:41:02.215669 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1090 07:41:02.223031 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1091 07:41:02.231580 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1092 07:41:02.236188 PCI: 00:15.2 assign_resources, bus 2 link: 0
1093 07:41:02.240465 PCI: 00:15.2 assign_resources, bus 2 link: 0
1094 07:41:02.249687 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1095 07:41:02.253910 PCI: 00:15.3 assign_resources, bus 3 link: 0
1096 07:41:02.258848 PCI: 00:15.3 assign_resources, bus 3 link: 0
1097 07:41:02.266481 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1098 07:41:02.275389 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1099 07:41:02.279581 PCI: 00:19.0 assign_resources, bus 4 link: 0
1100 07:41:02.284019 PCI: 00:19.0 assign_resources, bus 4 link: 0
1101 07:41:02.292925 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1102 07:41:02.301374 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1103 07:41:02.310977 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1104 07:41:02.319822 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1105 07:41:02.324374 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1106 07:41:02.332093 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1107 07:41:02.340135 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1108 07:41:02.348091 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1109 07:41:02.353366 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1110 07:41:02.361212 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1111 07:41:02.369266 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1112 07:41:02.373883 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1113 07:41:02.379303 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1114 07:41:02.383507 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1115 07:41:02.388486 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1116 07:41:02.393726 LPC: Trying to open IO window from 800 size 1ff
1117 07:41:02.401372 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1118 07:41:02.410307 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1119 07:41:02.417786 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1120 07:41:02.425997 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1121 07:41:02.431084 DOMAIN: 0000 assign_resources, bus 0 link: 0
1122 07:41:02.435102 Root Device assign_resources, bus 0 link: 0
1123 07:41:02.438627 Done setting resources.
1124 07:41:02.444585 Show resources in subtree (Root Device)...After assigning values.
1125 07:41:02.448502 Root Device child on link 0 CPU_CLUSTER: 0
1126 07:41:02.452674 CPU_CLUSTER: 0 child on link 0 APIC: 00
1127 07:41:02.453983 APIC: 00
1128 07:41:02.455904 APIC: 02
1129 07:41:02.460402 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 07:41:02.469209 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 07:41:02.479421 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 07:41:02.481288 PCI: 00:00.0
1133 07:41:02.490083 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 07:41:02.500191 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 07:41:02.509197 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 07:41:02.518535 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 07:41:02.527412 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 07:41:02.537575 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 07:41:02.546385 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 07:41:02.555375 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 07:41:02.565024 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 07:41:02.574253 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1143 07:41:02.582823 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1144 07:41:02.593223 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1145 07:41:02.602652 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1146 07:41:02.612426 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1147 07:41:02.621753 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1148 07:41:02.630897 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1149 07:41:02.632377 PCI: 00:02.0
1150 07:41:02.643376 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1151 07:41:02.653666 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1152 07:41:02.663001 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1153 07:41:02.666767 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1154 07:41:02.678071 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1155 07:41:02.679084 GENERIC: 0.0
1156 07:41:02.681203 PCI: 00:08.0
1157 07:41:02.691729 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1158 07:41:02.692505 PCI: 00:12.0
1159 07:41:02.703104 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1160 07:41:02.708124 PCI: 00:14.0 child on link 0 USB0 port 0
1161 07:41:02.718873 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1162 07:41:02.722133 USB0 port 0 child on link 0 USB2 port 0
1163 07:41:02.724440 USB2 port 0
1164 07:41:02.725952 USB2 port 1
1165 07:41:02.727593 USB2 port 2
1166 07:41:02.729586 USB2 port 3
1167 07:41:02.731443 USB2 port 5
1168 07:41:02.733015 USB2 port 6
1169 07:41:02.734933 USB2 port 9
1170 07:41:02.736578 USB3 port 0
1171 07:41:02.737638 USB3 port 1
1172 07:41:02.739799 USB3 port 2
1173 07:41:02.741648 USB3 port 3
1174 07:41:02.742910 USB3 port 4
1175 07:41:02.745396 USB2 port 4
1176 07:41:02.747191 USB3 port 5
1177 07:41:02.749068 PCI: 00:14.2
1178 07:41:02.759263 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1179 07:41:02.768921 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1180 07:41:02.770771 PCI: 00:14.3
1181 07:41:02.780768 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1182 07:41:02.782761 PCI: 00:14.5
1183 07:41:02.793178 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1184 07:41:02.794454 PCI: 00:15.0
1185 07:41:02.799179 PCI: 00:15.2 child on link 0 I2C: 02:4a
1186 07:41:02.809196 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1187 07:41:02.810747 I2C: 02:4a
1188 07:41:02.815295 PCI: 00:15.3 child on link 0 I2C: 03:4a
1189 07:41:02.825254 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1190 07:41:02.826957 I2C: 03:4a
1191 07:41:02.828789 PCI: 00:16.0
1192 07:41:02.838441 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1193 07:41:02.842934 PCI: 00:19.0 child on link 0 I2C: 04:1a
1194 07:41:02.853273 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1195 07:41:02.854924 I2C: 04:1a
1196 07:41:02.857023 PCI: 00:1a.0
1197 07:41:02.867060 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1198 07:41:02.871506 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1199 07:41:02.880819 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1200 07:41:02.892739 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1201 07:41:02.903625 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1202 07:41:02.904937 PCI: 01:00.0
1203 07:41:02.913984 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1204 07:41:02.924650 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1205 07:41:02.934874 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1206 07:41:02.936976 PCI: 00:1e.0
1207 07:41:02.947823 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 07:41:02.958326 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1209 07:41:02.962254 PCI: 00:1e.2 child on link 0 SPI: 00
1210 07:41:02.972158 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1211 07:41:02.974062 SPI: 00
1212 07:41:02.977732 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 07:41:02.986831 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 07:41:02.996049 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 07:41:02.997810 PNP: 0c09.0
1216 07:41:03.006515 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 07:41:03.008166 PCI: 00:1f.3
1218 07:41:03.018065 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1219 07:41:03.028415 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1220 07:41:03.030300 PCI: 00:1f.4
1221 07:41:03.039852 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 07:41:03.049240 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1223 07:41:03.051208 PCI: 00:1f.5
1224 07:41:03.061552 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1225 07:41:03.063853 Done allocating resources.
1226 07:41:03.070097 BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2220 ms
1227 07:41:03.072753 Enabling resources...
1228 07:41:03.076674 PCI: 00:00.0 subsystem <- 8086/9b71
1229 07:41:03.079203 PCI: 00:00.0 cmd <- 06
1230 07:41:03.083062 PCI: 00:02.0 subsystem <- 8086/9baa
1231 07:41:03.085659 PCI: 00:02.0 cmd <- 03
1232 07:41:03.089842 PCI: 00:04.0 subsystem <- 8086/1903
1233 07:41:03.092071 PCI: 00:04.0 cmd <- 02
1234 07:41:03.094364 PCI: 00:08.0 cmd <- 06
1235 07:41:03.098753 PCI: 00:12.0 subsystem <- 8086/02f9
1236 07:41:03.100762 PCI: 00:12.0 cmd <- 02
1237 07:41:03.104452 PCI: 00:14.0 subsystem <- 8086/02ed
1238 07:41:03.106904 PCI: 00:14.0 cmd <- 02
1239 07:41:03.109275 PCI: 00:14.2 cmd <- 02
1240 07:41:03.113544 PCI: 00:14.3 subsystem <- 8086/02f0
1241 07:41:03.115931 PCI: 00:14.3 cmd <- 02
1242 07:41:03.119786 PCI: 00:14.5 subsystem <- 8086/02f5
1243 07:41:03.122266 PCI: 00:14.5 cmd <- 06
1244 07:41:03.126323 PCI: 00:15.2 subsystem <- 8086/02ea
1245 07:41:03.128408 PCI: 00:15.2 cmd <- 02
1246 07:41:03.131970 PCI: 00:15.3 subsystem <- 8086/02eb
1247 07:41:03.134747 PCI: 00:15.3 cmd <- 02
1248 07:41:03.138306 PCI: 00:16.0 subsystem <- 8086/02e0
1249 07:41:03.140876 PCI: 00:16.0 cmd <- 02
1250 07:41:03.145011 PCI: 00:19.0 subsystem <- 8086/02c5
1251 07:41:03.147805 PCI: 00:19.0 cmd <- 02
1252 07:41:03.151250 PCI: 00:1a.0 subsystem <- 8086/02c4
1253 07:41:03.153079 PCI: 00:1a.0 cmd <- 06
1254 07:41:03.156714 PCI: 00:1c.0 bridge ctrl <- 0013
1255 07:41:03.160763 PCI: 00:1c.0 subsystem <- 8086/02be
1256 07:41:03.163060 PCI: 00:1c.0 cmd <- 07
1257 07:41:03.166960 PCI: 00:1e.0 subsystem <- 8086/02a8
1258 07:41:03.169792 PCI: 00:1e.0 cmd <- 06
1259 07:41:03.173266 PCI: 00:1e.2 subsystem <- 8086/02aa
1260 07:41:03.175898 PCI: 00:1e.2 cmd <- 06
1261 07:41:03.179200 PCI: 00:1f.0 subsystem <- 8086/0285
1262 07:41:03.182778 PCI: 00:1f.0 cmd <- 407
1263 07:41:03.185699 PCI: 00:1f.3 subsystem <- 8086/02c8
1264 07:41:03.188296 PCI: 00:1f.3 cmd <- 02
1265 07:41:03.192163 PCI: 00:1f.4 subsystem <- 8086/02a3
1266 07:41:03.194621 PCI: 00:1f.4 cmd <- 03
1267 07:41:03.198303 PCI: 00:1f.5 subsystem <- 8086/02a4
1268 07:41:03.200655 PCI: 00:1f.5 cmd <- 406
1269 07:41:03.205468 PCI: 01:00.0 cmd <- 03
1270 07:41:03.207503 done.
1271 07:41:03.213105 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1272 07:41:03.215734 Initializing devices...
1273 07:41:03.217628 Root Device init
1274 07:41:03.222338 Chrome EC: Set SMI mask to 0x0000000000000000
1275 07:41:03.228645 Chrome EC: clear events_b mask to 0x0000000000000000
1276 07:41:03.234089 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1277 07:41:03.239482 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1278 07:41:03.245598 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1279 07:41:03.250459 Chrome EC: Set WAKE mask to 0x0000000000000000
1280 07:41:03.253835 Root Device init finished in 32 msecs
1281 07:41:03.258513 PCI: 00:00.0 init
1282 07:41:03.260962 CPU TDP = 15 Watts
1283 07:41:03.263150 CPU PL1 = 15 Watts
1284 07:41:03.265407 CPU PL2 = 35 Watts
1285 07:41:03.268968 CPU PsysPL2 = 65 Watts
1286 07:41:03.270732 PCI: 00:00.0 init finished in 9 msecs
1287 07:41:03.273438 PCI: 00:02.0 init
1288 07:41:03.276018 GMA: Found VBT in CBFS
1289 07:41:03.278573 GMA: Found valid VBT in CBFS
1290 07:41:03.282882 PCI: 00:02.0 init finished in 5 msecs
1291 07:41:03.284906 PCI: 00:08.0 init
1292 07:41:03.289025 PCI: 00:08.0 init finished in 0 msecs
1293 07:41:03.290612 PCI: 00:12.0 init
1294 07:41:03.294973 PCI: 00:12.0 init finished in 0 msecs
1295 07:41:03.296829 PCI: 00:14.0 init
1296 07:41:03.301204 PCI: 00:14.0 init finished in 0 msecs
1297 07:41:03.303106 PCI: 00:14.2 init
1298 07:41:03.306762 PCI: 00:14.2 init finished in 0 msecs
1299 07:41:03.309183 PCI: 00:14.3 init
1300 07:41:03.312938 PCI: 00:14.3 init finished in 0 msecs
1301 07:41:03.315842 PCI: 00:15.2 init
1302 07:41:03.319341 I2C bus 2 version 0x3132322a
1303 07:41:03.322725 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1304 07:41:03.326624 PCI: 00:15.2 init finished in 6 msecs
1305 07:41:03.328520 PCI: 00:15.3 init
1306 07:41:03.331575 I2C bus 3 version 0x3132322a
1307 07:41:03.335584 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1308 07:41:03.339528 PCI: 00:15.3 init finished in 6 msecs
1309 07:41:03.341587 PCI: 00:16.0 init
1310 07:41:03.344868 PCI: 00:16.0 init finished in 0 msecs
1311 07:41:03.347655 PCI: 00:19.0 init
1312 07:41:03.350681 I2C bus 4 version 0x3132322a
1313 07:41:03.354171 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1314 07:41:03.357636 PCI: 00:19.0 init finished in 6 msecs
1315 07:41:03.360619 PCI: 00:1a.0 init
1316 07:41:03.364031 PCI: 00:1a.0 init finished in 0 msecs
1317 07:41:03.365986 PCI: 00:1c.0 init
1318 07:41:03.369437 Initializing PCH PCIe bridge.
1319 07:41:03.372914 PCI: 00:1c.0 init finished in 3 msecs
1320 07:41:03.375828 PCI: 00:1f.0 init
1321 07:41:03.380142 IOAPIC: Initializing IOAPIC at 0xfec00000
1322 07:41:03.384763 IOAPIC: Bootstrap Processor Local APIC = 0x00
1323 07:41:03.387021 IOAPIC: ID = 0x02
1324 07:41:03.389544 IOAPIC: Dumping registers
1325 07:41:03.392119 reg 0x0000: 0x02000000
1326 07:41:03.395084 reg 0x0001: 0x00770020
1327 07:41:03.396624 reg 0x0002: 0x00000000
1328 07:41:03.401142 PCI: 00:1f.0 init finished in 21 msecs
1329 07:41:03.403974 PCI: 00:1f.4 init
1330 07:41:03.408181 PCI: 00:1f.4 init finished in 0 msecs
1331 07:41:03.418212 PCI: 01:00.0 init
1332 07:41:03.423098 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1333 07:41:03.429079 Error: Could not locate 'ethernet_mac0' in VPD
1334 07:41:03.436370 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1335 07:41:03.440323 r8168: ignore invalid MAC address in cbfs
1336 07:41:03.443246 r8168: Resetting NIC...done
1337 07:41:03.446860 r8168: Programming MAC Address...done
1338 07:41:03.449480 r8168: Customized LED 0x5af
1339 07:41:03.453607 r8168: read back LED setting as 0x5af
1340 07:41:03.457253 PCI: 01:00.0 init finished in 35 msecs
1341 07:41:03.460687 PNP: 0c09.0 init
1342 07:41:03.464755 Google Chrome EC uptime: 3647691.988 seconds
1343 07:41:03.469194 Google Chrome AP resets since EC boot: 4887
1344 07:41:03.473807 Google Chrome most recent AP reset causes:
1345 07:41:03.478542 3644544.151: 32768 shutdown: power failure
1346 07:41:03.482101 3644544.152: 32768 shutdown: power failure
1347 07:41:03.486439 3644544.375: 32775 shutdown: entering G3
1348 07:41:03.491433 3647676.883: 32774 shutdown: by console command
1349 07:41:03.497260 Google Chrome EC reset flags at last EC boot: reset-pin
1350 07:41:03.500871 PNP: 0c09.0 init finished in 36 msecs
1351 07:41:03.502820 Devices initialized
1352 07:41:03.506606 Show all devs... After init.
1353 07:41:03.508303 Root Device: enabled 1
1354 07:41:03.510948 CPU_CLUSTER: 0: enabled 1
1355 07:41:03.514289 DOMAIN: 0000: enabled 1
1356 07:41:03.515336 APIC: 00: enabled 1
1357 07:41:03.518511 PCI: 00:00.0: enabled 1
1358 07:41:03.520902 PCI: 00:02.0: enabled 1
1359 07:41:03.522782 PCI: 00:04.0: enabled 1
1360 07:41:03.525508 PCI: 00:05.0: enabled 0
1361 07:41:03.527707 PCI: 00:12.0: enabled 1
1362 07:41:03.529892 PCI: 00:12.5: enabled 0
1363 07:41:03.532683 PCI: 00:12.6: enabled 0
1364 07:41:03.535298 PCI: 00:14.0: enabled 1
1365 07:41:03.537362 PCI: 00:14.1: enabled 0
1366 07:41:03.540155 PCI: 00:14.3: enabled 1
1367 07:41:03.541792 PCI: 00:14.5: enabled 1
1368 07:41:03.545007 PCI: 00:15.0: enabled 0
1369 07:41:03.547074 PCI: 00:15.1: enabled 0
1370 07:41:03.550289 PCI: 00:15.2: enabled 1
1371 07:41:03.551841 PCI: 00:15.3: enabled 1
1372 07:41:03.554413 PCI: 00:16.0: enabled 1
1373 07:41:03.557383 PCI: 00:16.1: enabled 0
1374 07:41:03.559712 PCI: 00:16.2: enabled 0
1375 07:41:03.562295 PCI: 00:16.3: enabled 0
1376 07:41:03.564590 PCI: 00:16.4: enabled 0
1377 07:41:03.567014 PCI: 00:16.5: enabled 0
1378 07:41:03.569192 PCI: 00:17.0: enabled 0
1379 07:41:03.571720 PCI: 00:19.0: enabled 1
1380 07:41:03.574029 PCI: 00:19.1: enabled 0
1381 07:41:03.576785 PCI: 00:19.2: enabled 0
1382 07:41:03.578428 PCI: 00:1a.0: enabled 1
1383 07:41:03.582284 PCI: 00:1c.0: enabled 0
1384 07:41:03.583700 PCI: 00:1c.1: enabled 0
1385 07:41:03.586922 PCI: 00:1c.2: enabled 0
1386 07:41:03.588947 PCI: 00:1c.3: enabled 0
1387 07:41:03.591458 PCI: 00:1c.4: enabled 0
1388 07:41:03.593471 PCI: 00:1c.5: enabled 0
1389 07:41:03.596053 PCI: 00:1c.0: enabled 1
1390 07:41:03.598808 PCI: 00:1c.7: enabled 0
1391 07:41:03.600881 PCI: 00:1d.0: enabled 1
1392 07:41:03.603395 PCI: 00:1d.1: enabled 0
1393 07:41:03.605750 PCI: 00:1d.2: enabled 1
1394 07:41:03.608601 PCI: 00:1d.3: enabled 0
1395 07:41:03.610838 PCI: 00:1d.4: enabled 0
1396 07:41:03.612749 PCI: 00:1d.5: enabled 1
1397 07:41:03.615845 PCI: 00:1e.0: enabled 1
1398 07:41:03.617787 PCI: 00:1e.1: enabled 0
1399 07:41:03.619897 PCI: 00:1e.2: enabled 1
1400 07:41:03.622808 PCI: 00:1e.3: enabled 0
1401 07:41:03.625869 PCI: 00:1f.0: enabled 1
1402 07:41:03.627780 PCI: 00:1f.1: enabled 0
1403 07:41:03.630015 PCI: 00:1f.2: enabled 0
1404 07:41:03.632704 PCI: 00:1f.3: enabled 1
1405 07:41:03.635074 PCI: 00:1f.4: enabled 1
1406 07:41:03.637388 PCI: 00:1f.5: enabled 1
1407 07:41:03.640099 PCI: 00:1f.6: enabled 0
1408 07:41:03.642039 GENERIC: 0.0: enabled 1
1409 07:41:03.644719 USB0 port 0: enabled 1
1410 07:41:03.647226 I2C: 02:4a: enabled 1
1411 07:41:03.649706 I2C: 03:4a: enabled 1
1412 07:41:03.651342 I2C: 04:1a: enabled 1
1413 07:41:03.653516 PCI: 01:00.0: enabled 1
1414 07:41:03.656029 PCI: 00:00.0: enabled 1
1415 07:41:03.658257 SPI: 00: enabled 1
1416 07:41:03.660246 PNP: 0c09.0: enabled 1
1417 07:41:03.662219 USB2 port 0: enabled 1
1418 07:41:03.665039 USB2 port 1: enabled 1
1419 07:41:03.667290 USB2 port 2: enabled 1
1420 07:41:03.669359 USB2 port 3: enabled 1
1421 07:41:03.672244 USB2 port 5: enabled 1
1422 07:41:03.674304 USB2 port 6: enabled 0
1423 07:41:03.676195 USB2 port 9: enabled 1
1424 07:41:03.679253 USB3 port 0: enabled 1
1425 07:41:03.681287 USB3 port 1: enabled 1
1426 07:41:03.683765 USB3 port 2: enabled 1
1427 07:41:03.686007 USB3 port 3: enabled 1
1428 07:41:03.688350 USB3 port 4: enabled 1
1429 07:41:03.690322 USB2 port 4: enabled 1
1430 07:41:03.693233 USB3 port 5: enabled 1
1431 07:41:03.695114 APIC: 02: enabled 1
1432 07:41:03.697465 PCI: 00:08.0: enabled 1
1433 07:41:03.699370 PCI: 00:14.2: enabled 1
1434 07:41:03.705731 BS: BS_DEV_INIT run times (exec / console): 26 / 459 ms
1435 07:41:03.707971 Disabling ACPI via APMC.
1436 07:41:03.711147 APMC done.
1437 07:41:03.715869 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1438 07:41:03.719104 ELOG: NV offset 0xaf0000 size 0x4000
1439 07:41:03.726914 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1440 07:41:03.734021 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:03 UTC
1441 07:41:03.740028 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:03 UTC
1442 07:41:03.746346 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:03 UTC
1443 07:41:03.752804 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:03 UTC
1444 07:41:03.759255 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:03 UTC
1445 07:41:03.764271 BS: BS_DEV_INIT exit times (exec / console): 5 / 49 ms
1446 07:41:03.770610 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:03 UTC
1447 07:41:03.778340 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1448 07:41:03.784763 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:03 UTC
1449 07:41:03.789139 elog_add_boot_reason: Logged dev mode boot
1450 07:41:03.795263 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1451 07:41:03.796995 Finalize devices...
1452 07:41:03.799239 Devices finalized
1453 07:41:03.804837 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1454 07:41:03.809777 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1455 07:41:03.815331 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1456 07:41:03.819896 ME: HFSTS1 : 0x80030045
1457 07:41:03.823629 ME: HFSTS2 : 0x30280136
1458 07:41:03.828007 ME: HFSTS3 : 0x00000050
1459 07:41:03.831809 ME: HFSTS4 : 0x00004800
1460 07:41:03.835517 ME: HFSTS5 : 0x00000000
1461 07:41:03.839945 ME: HFSTS6 : 0x40400006
1462 07:41:03.843407 ME: Manufacturing Mode : NO
1463 07:41:03.846969 ME: FW Partition Table : OK
1464 07:41:03.849627 ME: Bringup Loader Failure : NO
1465 07:41:03.853281 ME: Firmware Init Complete : NO
1466 07:41:03.856452 ME: Boot Options Present : NO
1467 07:41:03.859573 ME: Update In Progress : NO
1468 07:41:03.863339 ME: D0i3 Support : YES
1469 07:41:03.866224 ME: Low Power State Enabled : NO
1470 07:41:03.869973 ME: CPU Replaced : YES
1471 07:41:03.873412 ME: CPU Replacement Valid : YES
1472 07:41:03.876376 ME: Current Working State : 5
1473 07:41:03.880000 ME: Current Operation State : 1
1474 07:41:03.882680 ME: Current Operation Mode : 3
1475 07:41:03.886418 ME: Error Code : 0
1476 07:41:03.889671 ME: CPU Debug Disabled : YES
1477 07:41:03.893276 ME: TXT Support : NO
1478 07:41:03.898797 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1479 07:41:03.904615 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1480 07:41:03.908063 CBFS: Locating 'fallback/dsdt.aml'
1481 07:41:03.911808 CBFS: Found @ offset 636c0 size 32e0
1482 07:41:03.917058 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1483 07:41:03.920530 CBFS: Locating 'fallback/slic'
1484 07:41:03.925652 CBFS: 'fallback/slic' not found.
1485 07:41:03.928763 ACPI: Writing ACPI tables at 99b31000.
1486 07:41:03.931005 ACPI: * FACS
1487 07:41:03.932435 ACPI: * DSDT
1488 07:41:03.936078 Ramoops buffer: 0x100000@0x99a30000.
1489 07:41:03.940967 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1490 07:41:03.945884 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1491 07:41:03.948763 Google Chrome EC: version:
1492 07:41:03.951702 ro: puff_v2.0.4638-67e4d7990
1493 07:41:03.954741 rw: puff_v2.0.4638-67e4d7990
1494 07:41:03.956289 running image: 1
1495 07:41:03.963391 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1496 07:41:03.965692 ACPI: * FADT
1497 07:41:03.967722 SCI is IRQ9
1498 07:41:03.971355 ACPI: added table 1/32, length now 40
1499 07:41:03.972800 ACPI: * SSDT
1500 07:41:03.976747 Found 1 CPU(s) with 2 core(s) each.
1501 07:41:03.980794 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1502 07:41:03.984696 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1503 07:41:03.989705 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1504 07:41:03.994344 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1505 07:41:03.999185 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1506 07:41:04.004830 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1507 07:41:04.008862 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1508 07:41:04.013053 EC returned error result code 3
1509 07:41:04.016867 EC returned error result code 1
1510 07:41:04.020812 PS2K: Bad resp from EC. Vivaldi disabled!
1511 07:41:04.027062 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1512 07:41:04.033053 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1513 07:41:04.039641 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1514 07:41:04.046209 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1515 07:41:04.052127 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1516 07:41:04.057106 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1517 07:41:04.062961 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1518 07:41:04.069439 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1519 07:41:04.076088 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1520 07:41:04.082032 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1521 07:41:04.088283 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1522 07:41:04.094764 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1523 07:41:04.101261 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1524 07:41:04.104810 ACPI: added table 2/32, length now 44
1525 07:41:04.106172 ACPI: * MCFG
1526 07:41:04.110029 ACPI: added table 3/32, length now 48
1527 07:41:04.111969 ACPI: * TPM2
1528 07:41:04.115135 TPM2 log created at 0x99a20000
1529 07:41:04.119514 ACPI: added table 4/32, length now 52
1530 07:41:04.120573 ACPI: * MADT
1531 07:41:04.121646 SCI is IRQ9
1532 07:41:04.125972 ACPI: added table 5/32, length now 56
1533 07:41:04.127088 current = 99b36070
1534 07:41:04.128944 ACPI: * DMAR
1535 07:41:04.132411 ACPI: added table 6/32, length now 60
1536 07:41:04.136825 ACPI: added table 7/32, length now 64
1537 07:41:04.138067 ACPI: * HPET
1538 07:41:04.141775 ACPI: added table 8/32, length now 68
1539 07:41:04.143342 ACPI: done.
1540 07:41:04.145328 ACPI tables: 20912 bytes.
1541 07:41:04.148351 smbios_write_tables: 99a1f000
1542 07:41:04.152119 EC returned error result code 3
1543 07:41:04.155633 Couldn't obtain OEM name from CBI
1544 07:41:04.158483 Create SMBIOS type 17
1545 07:41:04.162150 PCI: 00:00.0 (Intel Cannonlake)
1546 07:41:04.164131 PCI: 00:14.3 (Intel WiFi)
1547 07:41:04.167133 SMBIOS tables: 841 bytes.
1548 07:41:04.171393 Writing table forward entry at 0x00000500
1549 07:41:04.177329 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1550 07:41:04.180921 Writing coreboot table at 0x99b55000
1551 07:41:04.186923 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1552 07:41:04.191384 1. 0000000000001000-000000000009ffff: RAM
1553 07:41:04.195733 2. 00000000000a0000-00000000000fffff: RESERVED
1554 07:41:04.200550 3. 0000000000100000-0000000099a1efff: RAM
1555 07:41:04.206471 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1556 07:41:04.211760 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1557 07:41:04.217211 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1558 07:41:04.222464 7. 000000009a000000-000000009f7fffff: RESERVED
1559 07:41:04.227524 8. 00000000e0000000-00000000efffffff: RESERVED
1560 07:41:04.231108 9. 00000000fc000000-00000000fc000fff: RESERVED
1561 07:41:04.236972 10. 00000000fe000000-00000000fe00ffff: RESERVED
1562 07:41:04.242018 11. 00000000fed10000-00000000fed17fff: RESERVED
1563 07:41:04.245523 12. 00000000fed80000-00000000fed83fff: RESERVED
1564 07:41:04.250482 13. 00000000fed90000-00000000fed91fff: RESERVED
1565 07:41:04.255562 14. 00000000feda0000-00000000feda1fff: RESERVED
1566 07:41:04.259615 15. 0000000100000000-000000015e7fffff: RAM
1567 07:41:04.263468 Graphics hand-off block not found
1568 07:41:04.267554 FSP did not return a valid framebuffer
1569 07:41:04.269693 Passing 4 GPIOs to payload:
1570 07:41:04.274692 NAME | PORT | POLARITY | VALUE
1571 07:41:04.280011 lid | undefined | high | high
1572 07:41:04.285609 power | undefined | high | low
1573 07:41:04.290781 oprom | undefined | high | low
1574 07:41:04.296111 EC in RW | 0x000000cb | high | low
1575 07:41:04.296870 Board ID: 4
1576 07:41:04.301763 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1577 07:41:04.308702 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum 1a32
1578 07:41:04.311092 coreboot table: 1424 bytes.
1579 07:41:04.314832 IMD ROOT 0. 0x99fff000 0x00001000
1580 07:41:04.318762 IMD SMALL 1. 0x99ffe000 0x00001000
1581 07:41:04.322183 FSP MEMORY 2. 0x99c4e000 0x003b0000
1582 07:41:04.326453 CONSOLE 3. 0x99c2e000 0x00020000
1583 07:41:04.330151 FMAP 4. 0x99c2d000 0x00000578
1584 07:41:04.333467 TIME STAMP 5. 0x99c2c000 0x00000910
1585 07:41:04.337478 VBOOT WORK 6. 0x99c18000 0x00014000
1586 07:41:04.341312 MRC DATA 7. 0x99c16000 0x00001958
1587 07:41:04.345210 ROMSTG STCK 8. 0x99c15000 0x00001000
1588 07:41:04.348345 AFTER CAR 9. 0x99c0b000 0x0000a000
1589 07:41:04.351849 RAMSTAGE 10. 0x99ba4000 0x00067000
1590 07:41:04.356442 REFCODE 11. 0x99b6f000 0x00035000
1591 07:41:04.359431 SMM BACKUP 12. 0x99b5f000 0x00010000
1592 07:41:04.363364 4f444749 13. 0x99b5d000 0x00002000
1593 07:41:04.367059 COREBOOT 14. 0x99b55000 0x00008000
1594 07:41:04.370870 ACPI 15. 0x99b31000 0x00024000
1595 07:41:04.374537 ACPI GNVS 16. 0x99b30000 0x00001000
1596 07:41:04.377812 RAMOOPS 17. 0x99a30000 0x00100000
1597 07:41:04.381747 TPM2 TCGLOG18. 0x99a20000 0x00010000
1598 07:41:04.385400 SMBIOS 19. 0x99a1f000 0x00000800
1599 07:41:04.387275 IMD small region:
1600 07:41:04.391460 IMD ROOT 0. 0x99ffec00 0x00000400
1601 07:41:04.395705 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1602 07:41:04.399592 VPD 2. 0x99ffeb80 0x00000058
1603 07:41:04.403742 POWER STATE 3. 0x99ffeb40 0x00000040
1604 07:41:04.406710 ROMSTAGE 4. 0x99ffeb20 0x00000004
1605 07:41:04.410843 MEM INFO 5. 0x99ffe960 0x000001b9
1606 07:41:04.416339 BS: BS_WRITE_TABLES run times (exec / console): 7 / 504 ms
1607 07:41:04.419598 MTRR: Physical address space:
1608 07:41:04.426433 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1609 07:41:04.432369 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1610 07:41:04.438938 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1611 07:41:04.444743 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1612 07:41:04.450671 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1613 07:41:04.457496 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1614 07:41:04.463591 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1615 07:41:04.467683 MTRR: Fixed MSR 0x250 0x0606060606060606
1616 07:41:04.472022 MTRR: Fixed MSR 0x258 0x0606060606060606
1617 07:41:04.475440 MTRR: Fixed MSR 0x259 0x0000000000000000
1618 07:41:04.479747 MTRR: Fixed MSR 0x268 0x0606060606060606
1619 07:41:04.483886 MTRR: Fixed MSR 0x269 0x0606060606060606
1620 07:41:04.487775 MTRR: Fixed MSR 0x26a 0x0606060606060606
1621 07:41:04.491860 MTRR: Fixed MSR 0x26b 0x0606060606060606
1622 07:41:04.496156 MTRR: Fixed MSR 0x26c 0x0606060606060606
1623 07:41:04.500485 MTRR: Fixed MSR 0x26d 0x0606060606060606
1624 07:41:04.504189 MTRR: Fixed MSR 0x26e 0x0606060606060606
1625 07:41:04.508170 MTRR: Fixed MSR 0x26f 0x0606060606060606
1626 07:41:04.511294 call enable_fixed_mtrr()
1627 07:41:04.514971 CPU physical address size: 39 bits
1628 07:41:04.519052 MTRR: default type WB/UC MTRR counts: 5/6.
1629 07:41:04.522981 MTRR: WB selected as default type.
1630 07:41:04.529193 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1631 07:41:04.535354 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1632 07:41:04.541787 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1633 07:41:04.547694 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1634 07:41:04.554263 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1635 07:41:04.558762 MTRR: Fixed MSR 0x250 0x0606060606060606
1636 07:41:04.562717 MTRR: Fixed MSR 0x258 0x0606060606060606
1637 07:41:04.566625 MTRR: Fixed MSR 0x259 0x0000000000000000
1638 07:41:04.571232 MTRR: Fixed MSR 0x268 0x0606060606060606
1639 07:41:04.574915 MTRR: Fixed MSR 0x269 0x0606060606060606
1640 07:41:04.578271 MTRR: Fixed MSR 0x26a 0x0606060606060606
1641 07:41:04.583023 MTRR: Fixed MSR 0x26b 0x0606060606060606
1642 07:41:04.587076 MTRR: Fixed MSR 0x26c 0x0606060606060606
1643 07:41:04.590821 MTRR: Fixed MSR 0x26d 0x0606060606060606
1644 07:41:04.594780 MTRR: Fixed MSR 0x26e 0x0606060606060606
1645 07:41:04.599287 MTRR: Fixed MSR 0x26f 0x0606060606060606
1646 07:41:04.599883
1647 07:41:04.600639 MTRR check
1648 07:41:04.603183 Fixed MTRRs : Enabled
1649 07:41:04.605171 Variable MTRRs: Enabled
1650 07:41:04.605772
1651 07:41:04.608096 call enable_fixed_mtrr()
1652 07:41:04.614348 BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms
1653 07:41:04.617236 CPU physical address size: 39 bits
1654 07:41:04.619779 Probing TPM: done!
1655 07:41:04.624727 Connected to device vid:did:rid of 1ae0:0028:00
1656 07:41:04.634909 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1657 07:41:04.638855 Initialized TPM device CR50 revision 0
1658 07:41:04.642371 Checking cr50 for pending updates
1659 07:41:04.648466 Reading cr50 TPM mode
1660 07:41:04.658150 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1661 07:41:04.663603 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1662 07:41:04.666819 CBFS: Locating 'fallback/payload'
1663 07:41:04.671248 CBFS: Found @ offset 3a0c00 size 48db0
1664 07:41:04.676036 Checking segment from ROM address 0xfffa8c38
1665 07:41:04.680742 Checking segment from ROM address 0xfffa8c54
1666 07:41:04.684782 Loading segment from ROM address 0xfffa8c38
1667 07:41:04.687034 code (compression=0)
1668 07:41:04.695226 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1669 07:41:04.704634 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1670 07:41:04.706355 it's not compressed!
1671 07:41:04.809560 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1672 07:41:04.816763 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1673 07:41:04.824216 Loading segment from ROM address 0xfffa8c54
1674 07:41:04.827115 Entry Point 0x30000000
1675 07:41:04.828140 Loaded segments
1676 07:41:04.834129 BS: BS_PAYLOAD_LOAD run times (exec / console): 102 / 67 ms
1677 07:41:04.836977 Finalizing chipset.
1678 07:41:04.838583 Finalizing SMM.
1679 07:41:04.840494 APMC done.
1680 07:41:04.845769 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1681 07:41:04.849701 mp_park_aps done after 0 msecs.
1682 07:41:04.853583 Jumping to boot code at 0x30000000(0x99b55000)
1683 07:41:04.863417 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1684 07:41:04.863500
1685 07:41:04.863564
1686 07:41:04.864274
1687 07:41:04.867184 Starting depthcharge on Kaisa...
1688 07:41:04.867662
1689 07:41:04.870855 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1690 07:41:04.871480 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1691 07:41:04.871984 Setting prompt string to ['puff:']
1692 07:41:04.872503 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1693 07:41:04.874591 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1694 07:41:04.875075
1695 07:41:04.882636 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1696 07:41:04.883121
1697 07:41:04.883902 BIOS MMAP details:
1698 07:41:04.884666
1699 07:41:04.886910 IFD Base Offset : 0x300000
1700 07:41:04.887386
1701 07:41:04.889742 IFD End Offset : 0x1000000
1702 07:41:04.890832
1703 07:41:04.892820 MMAP Size : 0xd00000
1704 07:41:04.893478
1705 07:41:04.896460 MMAP Start : 0xff300000
1706 07:41:04.897214
1707 07:41:04.901622 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1708 07:41:04.902183
1709 07:41:04.902949 Wipe memory regions:
1710 07:41:04.903546
1711 07:41:04.906563 [0x00000000001000, 0x000000000a0000)
1712 07:41:04.907237
1713 07:41:04.911132 [0x00000000100000, 0x00000030000000)
1714 07:41:04.959385
1715 07:41:04.963010 [0x00000032660100, 0x00000099a1f000)
1716 07:41:05.066182
1717 07:41:05.069746 [0x00000100000000, 0x0000015e800000)
1718 07:41:05.469910
1719 07:41:05.471704 R8152: Initializing
1720 07:41:05.471801
1721 07:41:05.475229 Version 9 (ocp_data = 6010)
1722 07:41:05.475491
1723 07:41:05.477758 R8152: Done initializing
1724 07:41:05.477848
1725 07:41:05.479860 Adding net device
1726 07:41:05.780428
1727 07:41:05.785396 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1728 07:41:05.785495
1729 07:41:05.785928
1730 07:41:05.785996
1731 07:41:05.786907 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1733 07:41:05.887307 puff:tftpboot 192.168.201.1 12435188/tftp-deploy-2sj5ko6u/kernel/bzImage 12435188/tftp-deploy-2sj5ko6u/kernel/cmdline 12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
1734 07:41:05.887465 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1735 07:41:05.887557 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1736 07:41:05.929964 tftpboot 192.168.201.1 12435188/tftp-deploy-2sj5ko6u/kernel/bzImage 12435188/tftp-deploy-2sj5ko6u/kernel/cmdline 12435188/tftp-deploy-2sj5ko6u/ramdisk/ramdisk.cpio.gz
1737 07:41:05.930054
1738 07:41:05.930300 Waiting for link
1739 07:41:06.090875
1740 07:41:06.091433 done.
1741 07:41:06.091732
1742 07:41:06.094149 MAC: 00:e0:4c:68:02:15
1743 07:41:06.094242
1744 07:41:06.096752 Sending DHCP discover... done.
1745 07:41:06.097223
1746 07:41:06.099482 Waiting for reply... done.
1747 07:41:06.099562
1748 07:41:06.102792 Sending DHCP request... done.
1749 07:41:06.102873
1750 07:41:06.107665 Waiting for reply... done.
1751 07:41:06.107788
1752 07:41:06.111045 My ip is 192.168.201.14
1753 07:41:06.111156
1754 07:41:06.113700 The DHCP server ip is 192.168.201.1
1755 07:41:06.113804
1756 07:41:06.118359 TFTP server IP predefined by user: 192.168.201.1
1757 07:41:06.119754
1758 07:41:06.126334 Bootfile predefined by user: 12435188/tftp-deploy-2sj5ko6u/kernel/bzImage
1759 07:41:06.126414
1760 07:41:06.129338 Sending tftp read request... done.
1761 07:41:06.129607
1762 07:41:06.133647 Waiting for the transfer...
1763 07:41:06.133975
1764 07:41:06.388755 00000000 ################################################################
1765 07:41:06.388884
1766 07:41:06.635972 00080000 ################################################################
1767 07:41:06.636936
1768 07:41:06.901507 00100000 ################################################################
1769 07:41:06.901847
1770 07:41:07.149030 00180000 ################################################################
1771 07:41:07.149371
1772 07:41:07.397672 00200000 ################################################################
1773 07:41:07.398019
1774 07:41:07.641230 00280000 ################################################################
1775 07:41:07.641592
1776 07:41:07.881884 00300000 ################################################################
1777 07:41:07.882718
1778 07:41:08.123631 00380000 ################################################################
1779 07:41:08.123755
1780 07:41:08.364840 00400000 ################################################################
1781 07:41:08.365160
1782 07:41:08.606012 00480000 ################################################################
1783 07:41:08.606657
1784 07:41:08.846922 00500000 ################################################################
1785 07:41:08.847260
1786 07:41:09.089081 00580000 ################################################################
1787 07:41:09.089210
1788 07:41:09.330458 00600000 ################################################################
1789 07:41:09.330850
1790 07:41:09.571483 00680000 ################################################################
1791 07:41:09.571926
1792 07:41:09.816159 00700000 ################################################################
1793 07:41:09.816317
1794 07:41:10.057064 00780000 ################################################################
1795 07:41:10.057801
1796 07:41:10.142867 00800000 ####################### done.
1797 07:41:10.142972
1798 07:41:10.145941 The bootfile was 8572816 bytes long.
1799 07:41:10.146358
1800 07:41:10.149263 Sending tftp read request... done.
1801 07:41:10.149565
1802 07:41:10.152537 Waiting for the transfer...
1803 07:41:10.152617
1804 07:41:10.435090 00000000 ################################################################
1805 07:41:10.435437
1806 07:41:10.722158 00080000 ################################################################
1807 07:41:10.722287
1808 07:41:10.995360 00100000 ################################################################
1809 07:41:10.995710
1810 07:41:11.271516 00180000 ################################################################
1811 07:41:11.272063
1812 07:41:11.544857 00200000 ################################################################
1813 07:41:11.544983
1814 07:41:11.818984 00280000 ################################################################
1815 07:41:11.819530
1816 07:41:12.102871 00300000 ################################################################
1817 07:41:12.103421
1818 07:41:12.394903 00380000 ################################################################
1819 07:41:12.395262
1820 07:41:12.685972 00400000 ################################################################
1821 07:41:12.686410
1822 07:41:12.977936 00480000 ################################################################
1823 07:41:12.978410
1824 07:41:13.262954 00500000 ################################################################
1825 07:41:13.263081
1826 07:41:13.555029 00580000 ################################################################
1827 07:41:13.555431
1828 07:41:13.802738 00600000 ################################################################
1829 07:41:13.803700
1830 07:41:14.045478 00680000 ################################################################
1831 07:41:14.045973
1832 07:41:14.316037 00700000 ################################################################
1833 07:41:14.316168
1834 07:41:14.600624 00780000 ################################################################
1835 07:41:14.600758
1836 07:41:14.838904 00800000 ####################################################### done.
1837 07:41:14.839041
1838 07:41:14.841712 Sending tftp read request... done.
1839 07:41:14.842270
1840 07:41:14.845171 Waiting for the transfer...
1841 07:41:14.845253
1842 07:41:14.846698 00000000 # done.
1843 07:41:14.846816
1844 07:41:14.855464 Command line loaded dynamically from TFTP file: 12435188/tftp-deploy-2sj5ko6u/kernel/cmdline
1845 07:41:14.855548
1846 07:41:14.870940 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1847 07:41:14.871027
1848 07:41:14.875495 ec_init: CrosEC protocol v3 supported (256, 256)
1849 07:41:14.879861
1850 07:41:14.883540 Shutting down all USB controllers.
1851 07:41:14.884079
1852 07:41:14.886385 Removing current net device
1853 07:41:14.886492
1854 07:41:14.887823 Finalizing coreboot
1855 07:41:14.888924
1856 07:41:14.894164 Exiting depthcharge with code 4 at timestamp: 19497012
1857 07:41:14.894250
1858 07:41:14.894315
1859 07:41:14.895334 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1860 07:41:14.895440 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
1861 07:41:14.895521 Setting prompt string to ['Linux version [0-9]']
1862 07:41:14.895592 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1863 07:41:14.895665 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1864 07:41:14.896018 Starting kernel ...
1865 07:41:14.896095
1866 07:41:14.896172
1868 07:45:47.896329 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
1870 07:45:47.897334 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
1872 07:45:47.898143 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1875 07:45:47.899403 end: 2 depthcharge-action (duration 00:05:00) [common]
1877 07:45:47.900442 Cleaning after the job
1878 07:45:47.900877 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/ramdisk
1879 07:45:47.909967 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/kernel
1880 07:45:47.911376 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435188/tftp-deploy-2sj5ko6u/modules
1881 07:45:47.911895 start: 5.1 power-off (timeout 00:00:30) [common]
1882 07:45:47.912068 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=off'
1883 07:45:48.678573 >> Command sent successfully.
1884 07:45:48.689378 Returned 0 in 0 seconds
1885 07:45:48.790652 end: 5.1 power-off (duration 00:00:01) [common]
1887 07:45:48.792233 start: 5.2 read-feedback (timeout 00:09:59) [common]
1888 07:45:48.793485 Listened to connection for namespace 'common' for up to 1s
1890 07:45:49.793953 Finalising connection for namespace 'common'
1891 07:45:49.794192 Disconnecting from shell: Finalise
1892 07:45:49.794344
1893 07:45:49.894939 end: 5.2 read-feedback (duration 00:00:01) [common]
1894 07:45:49.895331 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435188
1895 07:45:49.950876 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435188
1896 07:45:49.951210 JobError: Your job cannot terminate cleanly.