Boot log: acer-chromebox-cxi5-brask

    1 07:40:42.922111  lava-dispatcher, installed at version: 2023.10
    2 07:40:42.922278  start: 0 validate
    3 07:40:42.922402  Start time: 2024-01-03 07:40:42.922375+00:00 (UTC)
    4 07:40:42.922517  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:40:42.922624  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 07:40:43.192076  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:40:43.192662  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:40:43.460824  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:40:43.461399  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 07:40:43.736147  validate duration: 0.81
   12 07:40:43.736408  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 07:40:43.736502  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 07:40:43.736581  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 07:40:43.736689  Not decompressing ramdisk as can be used compressed.
   16 07:40:43.736767  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 07:40:43.736823  saving as /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/ramdisk/rootfs.cpio.gz
   18 07:40:43.736880  total size: 8418130 (8 MB)
   19 07:40:43.737876  progress   0 % (0 MB)
   20 07:40:43.739440  progress   5 % (0 MB)
   21 07:40:43.742901  progress  10 % (0 MB)
   22 07:40:43.746089  progress  15 % (1 MB)
   23 07:40:43.748529  progress  20 % (1 MB)
   24 07:40:43.750439  progress  25 % (2 MB)
   25 07:40:43.752175  progress  30 % (2 MB)
   26 07:40:43.753571  progress  35 % (2 MB)
   27 07:40:43.755072  progress  40 % (3 MB)
   28 07:40:43.756557  progress  45 % (3 MB)
   29 07:40:43.758058  progress  50 % (4 MB)
   30 07:40:43.759590  progress  55 % (4 MB)
   31 07:40:43.761064  progress  60 % (4 MB)
   32 07:40:43.762448  progress  65 % (5 MB)
   33 07:40:43.763947  progress  70 % (5 MB)
   34 07:40:43.765424  progress  75 % (6 MB)
   35 07:40:43.766896  progress  80 % (6 MB)
   36 07:40:43.768379  progress  85 % (6 MB)
   37 07:40:43.769852  progress  90 % (7 MB)
   38 07:40:43.771331  progress  95 % (7 MB)
   39 07:40:43.772723  progress 100 % (8 MB)
   40 07:40:43.772885  8 MB downloaded in 0.04 s (222.98 MB/s)
   41 07:40:43.773006  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 07:40:43.773197  end: 1.1 download-retry (duration 00:00:00) [common]
   44 07:40:43.773267  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 07:40:43.773329  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 07:40:43.773430  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 07:40:43.773488  saving as /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/kernel/bzImage
   48 07:40:43.773535  total size: 8572816 (8 MB)
   49 07:40:43.773589  No compression specified
   50 07:40:43.774482  progress   0 % (0 MB)
   51 07:40:43.776101  progress   5 % (0 MB)
   52 07:40:43.777620  progress  10 % (0 MB)
   53 07:40:43.779128  progress  15 % (1 MB)
   54 07:40:43.780653  progress  20 % (1 MB)
   55 07:40:43.782156  progress  25 % (2 MB)
   56 07:40:43.783659  progress  30 % (2 MB)
   57 07:40:43.785198  progress  35 % (2 MB)
   58 07:40:43.786731  progress  40 % (3 MB)
   59 07:40:43.788291  progress  45 % (3 MB)
   60 07:40:43.789773  progress  50 % (4 MB)
   61 07:40:43.791272  progress  55 % (4 MB)
   62 07:40:43.792808  progress  60 % (4 MB)
   63 07:40:43.794409  progress  65 % (5 MB)
   64 07:40:43.795920  progress  70 % (5 MB)
   65 07:40:43.797436  progress  75 % (6 MB)
   66 07:40:43.798932  progress  80 % (6 MB)
   67 07:40:43.800482  progress  85 % (6 MB)
   68 07:40:43.801974  progress  90 % (7 MB)
   69 07:40:43.803472  progress  95 % (7 MB)
   70 07:40:43.804982  progress 100 % (8 MB)
   71 07:40:43.805119  8 MB downloaded in 0.03 s (258.90 MB/s)
   72 07:40:43.805234  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 07:40:43.805416  end: 1.2 download-retry (duration 00:00:00) [common]
   75 07:40:43.805487  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 07:40:43.805552  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 07:40:43.805657  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 07:40:43.805714  saving as /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/modules/modules.tar
   79 07:40:43.805761  total size: 251144 (0 MB)
   80 07:40:43.805810  Using unxz to decompress xz
   81 07:40:43.808941  progress  13 % (0 MB)
   82 07:40:43.809231  progress  26 % (0 MB)
   83 07:40:43.809419  progress  39 % (0 MB)
   84 07:40:43.810831  progress  52 % (0 MB)
   85 07:40:43.812560  progress  65 % (0 MB)
   86 07:40:43.814146  progress  78 % (0 MB)
   87 07:40:43.815787  progress  91 % (0 MB)
   88 07:40:43.817465  progress 100 % (0 MB)
   89 07:40:43.822010  0 MB downloaded in 0.02 s (14.74 MB/s)
   90 07:40:43.822197  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 07:40:43.822424  end: 1.3 download-retry (duration 00:00:00) [common]
   93 07:40:43.822503  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 07:40:43.822589  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 07:40:43.822676  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 07:40:43.822743  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 07:40:43.822905  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9
   98 07:40:43.823014  makedir: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin
   99 07:40:43.823096  makedir: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/tests
  100 07:40:43.823171  makedir: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/results
  101 07:40:43.823267  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-add-keys
  102 07:40:43.823382  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-add-sources
  103 07:40:43.823502  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-background-process-start
  104 07:40:43.823612  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-background-process-stop
  105 07:40:43.823709  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-common-functions
  106 07:40:43.823798  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-echo-ipv4
  107 07:40:43.823890  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-install-packages
  108 07:40:43.823980  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-installed-packages
  109 07:40:43.824069  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-os-build
  110 07:40:43.824158  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-probe-channel
  111 07:40:43.824248  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-probe-ip
  112 07:40:43.824337  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-target-ip
  113 07:40:43.824426  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-target-mac
  114 07:40:43.824513  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-target-storage
  115 07:40:43.824613  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-case
  116 07:40:43.824701  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-event
  117 07:40:43.824790  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-feedback
  118 07:40:43.824877  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-raise
  119 07:40:43.824992  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-reference
  120 07:40:43.825087  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-runner
  121 07:40:43.825174  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-set
  122 07:40:43.825263  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-test-shell
  123 07:40:43.825354  Updating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-install-packages (oe)
  124 07:40:43.825470  Updating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/bin/lava-installed-packages (oe)
  125 07:40:43.825562  Creating /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/environment
  126 07:40:43.825640  LAVA metadata
  127 07:40:43.825699  - LAVA_JOB_ID=12435191
  128 07:40:43.825749  - LAVA_DISPATCHER_IP=192.168.201.1
  129 07:40:43.825826  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 07:40:43.825882  skipped lava-vland-overlay
  131 07:40:43.825939  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 07:40:43.826002  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 07:40:43.826051  skipped lava-multinode-overlay
  134 07:40:43.826107  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 07:40:43.826168  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 07:40:43.826227  Loading test definitions
  137 07:40:43.826299  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 07:40:43.826359  Using /lava-12435191 at stage 0
  139 07:40:43.826586  uuid=12435191_1.4.2.3.1 testdef=None
  140 07:40:43.826660  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 07:40:43.826727  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 07:40:43.827145  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 07:40:43.827323  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 07:40:43.827881  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 07:40:43.828065  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 07:40:43.828522  runner path: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/0/tests/0_dmesg test_uuid 12435191_1.4.2.3.1
  149 07:40:43.828638  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 07:40:43.828817  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 07:40:43.828872  Using /lava-12435191 at stage 1
  153 07:40:43.829091  uuid=12435191_1.4.2.3.5 testdef=None
  154 07:40:43.829163  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 07:40:43.829228  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 07:40:43.829584  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 07:40:43.829754  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 07:40:43.830240  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 07:40:43.830423  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 07:40:43.830892  runner path: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/1/tests/1_bootrr test_uuid 12435191_1.4.2.3.5
  163 07:40:43.831009  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 07:40:43.831175  Creating lava-test-runner.conf files
  166 07:40:43.831226  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/0 for stage 0
  167 07:40:43.831291  - 0_dmesg
  168 07:40:43.831357  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435191/lava-overlay-65fbibo9/lava-12435191/1 for stage 1
  169 07:40:43.831429  - 1_bootrr
  170 07:40:43.831535  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 07:40:43.831604  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 07:40:43.837955  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 07:40:43.838051  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 07:40:43.838124  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 07:40:43.838191  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 07:40:43.838259  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 07:40:43.999280  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 07:40:43.999572  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 07:40:43.999694  extracting modules file /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435191/extract-overlay-ramdisk-8ltncx4b/ramdisk
  180 07:40:44.008048  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 07:40:44.008155  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 07:40:44.008231  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435191/compress-overlay-1adckd2l/overlay-1.4.2.4.tar.gz to ramdisk
  183 07:40:44.008289  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435191/compress-overlay-1adckd2l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435191/extract-overlay-ramdisk-8ltncx4b/ramdisk
  184 07:40:44.014482  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 07:40:44.014596  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 07:40:44.014674  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 07:40:44.014750  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 07:40:44.014815  Building ramdisk /var/lib/lava/dispatcher/tmp/12435191/extract-overlay-ramdisk-8ltncx4b/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435191/extract-overlay-ramdisk-8ltncx4b/ramdisk
  189 07:40:44.069500  >> 49790 blocks

  190 07:40:44.799363  rename /var/lib/lava/dispatcher/tmp/12435191/extract-overlay-ramdisk-8ltncx4b/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz
  191 07:40:44.799689  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 07:40:44.799809  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  193 07:40:44.799925  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  194 07:40:44.800014  No mkimage arch provided, not using FIT.
  195 07:40:44.800101  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 07:40:44.800178  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 07:40:44.800266  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 07:40:44.800355  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  199 07:40:44.800429  No LXC device requested
  200 07:40:44.800512  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 07:40:44.800580  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  202 07:40:44.800645  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 07:40:44.800704  Checking files for TFTP limit of 4294967296 bytes.
  204 07:40:44.800995  end: 1 tftp-deploy (duration 00:00:01) [common]
  205 07:40:44.801076  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 07:40:44.801141  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 07:40:44.801232  substitutions:
  208 07:40:44.801285  - {DTB}: None
  209 07:40:44.801335  - {INITRD}: 12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz
  210 07:40:44.801382  - {KERNEL}: 12435191/tftp-deploy-ctpnlr1n/kernel/bzImage
  211 07:40:44.801427  - {LAVA_MAC}: None
  212 07:40:44.801472  - {PRESEED_CONFIG}: None
  213 07:40:44.801516  - {PRESEED_LOCAL}: None
  214 07:40:44.801572  - {RAMDISK}: 12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz
  215 07:40:44.801616  - {ROOT_PART}: None
  216 07:40:44.801658  - {ROOT}: None
  217 07:40:44.801701  - {SERVER_IP}: 192.168.201.1
  218 07:40:44.801743  - {TEE}: None
  219 07:40:44.801787  Parsed boot commands:
  220 07:40:44.801829  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 07:40:44.801960  Parsed boot commands: tftpboot 192.168.201.1 12435191/tftp-deploy-ctpnlr1n/kernel/bzImage 12435191/tftp-deploy-ctpnlr1n/kernel/cmdline 12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz
  222 07:40:44.802032  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 07:40:44.802095  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 07:40:44.802162  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 07:40:44.802227  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 07:40:44.802279  Not connected, no need to disconnect.
  227 07:40:44.802335  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 07:40:44.802397  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 07:40:44.802449  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-4'
  230 07:40:44.804959  Setting prompt string to ['lava-test: # ']
  231 07:40:44.805186  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 07:40:44.805283  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 07:40:44.805359  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 07:40:44.805430  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 07:40:44.805581  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-4' '--port=1' '--command=reboot'
  236 07:40:49.944777  >> Command sent successfully.

  237 07:40:49.952117  Returned 0 in 5 seconds
  238 07:40:50.053113  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 07:40:50.054400  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 07:40:50.054782  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 07:40:50.055095  Setting prompt string to 'Starting depthcharge on Moli...'
  243 07:40:50.055355  Changing prompt to 'Starting depthcharge on Moli...'
  244 07:40:50.055645  depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
  245 07:40:50.056426  [Enter `^Ec?' for help]

  246 07:40:51.261608  

  247 07:40:51.262094  

  248 07:40:51.271520  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 bootblock starting (log level: 8)...

  249 07:40:51.275138  CPU: Intel(R) Celeron(R) 7305

  250 07:40:51.278282  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  251 07:40:51.284979  CPU: AES supported, TXT NOT supported, VT supported

  252 07:40:51.291527  Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384

  253 07:40:51.294993  Cache size = 8 MiB

  254 07:40:51.298699  MCH: device id 4619 (rev 04) is Alderlake-P

  255 07:40:51.305339  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  256 07:40:51.308739  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  257 07:40:51.312042  VBOOT: Loading verstage.

  258 07:40:51.315279  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  259 07:40:51.321679  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  260 07:40:51.325026  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  261 07:40:51.335117  CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes

  262 07:40:51.341813  CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908

  263 07:40:51.342177  

  264 07:40:51.342425  

  265 07:40:51.355075  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 verstage starting (log level: 8)...

  266 07:40:51.358378  Probing TPM I2C: I2C bus 1 version 0x3230302a

  267 07:40:51.365323  DW I2C bus 1 at 0xfe022000 (400 KHz)

  268 07:40:51.365745  done! DID_VID 0x00281ae0

  269 07:40:51.369488  TPM ready after 0 ms

  270 07:40:51.372257  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  271 07:40:51.386203  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  272 07:40:51.392400  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  273 07:40:51.441983  tlcl_send_startup: Startup return code is 0

  274 07:40:51.442408  TPM: setup succeeded

  275 07:40:51.464536  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  276 07:40:51.486217  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  277 07:40:51.489551  Chrome EC: UHEPI supported

  278 07:40:51.492857  Reading cr50 boot mode

  279 07:40:51.507935  Cr50 says boot_mode is VERIFIED_RW(0x00).

  280 07:40:51.508395  Phase 1

  281 07:40:51.514415  FMAP: area GBB found @ 1805000 (458752 bytes)

  282 07:40:51.521132  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  283 07:40:51.527595  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  284 07:40:51.534914  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  285 07:40:51.535362  Phase 2

  286 07:40:51.537910  Phase 3

  287 07:40:51.541057  FMAP: area GBB found @ 1805000 (458752 bytes)

  288 07:40:51.547477  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  289 07:40:51.551084  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  290 07:40:51.557979  VB2:vb2_verify_keyblock() Checking keyblock signature...

  291 07:40:51.564461  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  292 07:40:51.571170  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  293 07:40:51.581270  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  294 07:40:51.594101  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  295 07:40:51.597281  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  296 07:40:51.603908  VB2:vb2_verify_fw_preamble() Verifying preamble.

  297 07:40:51.610722  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  298 07:40:51.617162  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  299 07:40:51.624108  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  300 07:40:51.628168  Phase 4

  301 07:40:51.631644  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  302 07:40:51.638347  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  303 07:40:51.866678  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  304 07:40:51.873165  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  305 07:40:51.876490  Saving vboot hash.

  306 07:40:51.883545  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  307 07:40:51.899330  tlcl_extend: response is 0

  308 07:40:51.905827  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  309 07:40:51.909436  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  310 07:40:51.927035  tlcl_extend: response is 0

  311 07:40:51.933470  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  312 07:40:51.952600  tlcl_lock_nv_write: response is 0

  313 07:40:51.970082  tlcl_lock_nv_write: response is 0

  314 07:40:51.970541  Slot B is selected

  315 07:40:51.976781  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  316 07:40:51.983334  CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes

  317 07:40:51.990258  CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600

  318 07:40:51.996704  BS: verstage times (exec / console): total (unknown) / 260 ms

  319 07:40:51.997164  

  320 07:40:51.997419  

  321 07:40:52.006461  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 romstage starting (log level: 8)...

  322 07:40:52.010167  Google Chrome EC: version:

  323 07:40:52.013450  	ro: moli_v2.0.19454-8a70cbdcf0

  324 07:40:52.016755  	rw: moli_v2.0.22464-d4ba27cabb

  325 07:40:52.020088    running image: 2

  326 07:40:52.023166  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  327 07:40:52.033599  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  328 07:40:52.039982  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  329 07:40:52.046773  CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc

  330 07:40:52.056220  VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  331 07:40:52.066585  VB2:check_ec_hash()            Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  332 07:40:52.070222  EC took 944us to calculate image hash

  333 07:40:52.080068  VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  334 07:40:52.086396  VB2:sync_ec() select_rw=RW(active)

  335 07:40:52.092080  EC returned error result code 1

  336 07:40:52.095991  PARAM_LIMIT_POWER not supported by EC.

  337 07:40:52.102202  Waited 7639us to clear limit power flag.

  338 07:40:52.106132  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  339 07:40:52.109221  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  340 07:40:52.115589  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  341 07:40:52.118970  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  342 07:40:52.122576  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  343 07:40:52.126384  TCO_STS:   0000 0000

  344 07:40:52.126775  GEN_PMCON: d0015038 00002200

  345 07:40:52.130239  GBLRST_CAUSE: 00000000 00000000

  346 07:40:52.133288  HPR_CAUSE0: 00000000

  347 07:40:52.133723  prev_sleep_state 5

  348 07:40:52.140798  Abort disabling TXT, as CPU is not TXT capable.

  349 07:40:52.147673  cse_lite: Number of partitions = 3

  350 07:40:52.150877  cse_lite: Current partition = RO

  351 07:40:52.151232  cse_lite: Next partition = RO

  352 07:40:52.154155  cse_lite: Flags = 0x7

  353 07:40:52.160905  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)

  354 07:40:52.170924  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)

  355 07:40:52.174215  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  356 07:40:52.181132  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  357 07:40:52.187490  cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000

  358 07:40:52.194179  CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4

  359 07:40:52.197466  cse_lite: CSE CBFS RW version : 16.1.25.2049

  360 07:40:52.201031  CSE Sub-partition update not required

  361 07:40:52.207543  cse_lite: Set Boot Partition Info Command (RW)

  362 07:40:52.211020  HECI: Global Reset(Type:1) Command

  363 07:40:53.683502  e = 0x2000000 #areas = 37

  364 07:40:53.690448  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  365 07:40:53.696828  CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes

  366 07:40:53.707209  CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908

  367 07:40:53.707789  

  368 07:40:53.708191  

  369 07:40:53.717096  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 verstage starting (log level: 8)...

  370 07:40:53.724167  Probing TPM I2C: I2C bus 1 version 0x3230302a

  371 07:40:53.727218  DW I2C bus 1 at 0xfe022000 (400 KHz)

  372 07:40:53.730726  done! DID_VID 0x00281ae0

  373 07:40:53.734154  TPM ready after 0 ms

  374 07:40:53.737230  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  375 07:40:53.749822  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  376 07:40:53.755885  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  377 07:40:53.803136  tlcl_send_startup: Startup return code is 0

  378 07:40:53.803667  TPM: setup succeeded

  379 07:40:53.823048  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  380 07:40:53.844877  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  381 07:40:53.848612  Chrome EC: UHEPI supported

  382 07:40:53.851933  Reading cr50 boot mode

  383 07:40:53.866588  Cr50 says boot_mode is VERIFIED_RW(0x00).

  384 07:40:53.866966  Phase 1

  385 07:40:53.873974  FMAP: area GBB found @ 1805000 (458752 bytes)

  386 07:40:53.880277  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  387 07:40:53.886998  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  388 07:40:53.893451  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  389 07:40:53.893867  Phase 2

  390 07:40:53.896927  Phase 3

  391 07:40:53.900273  FMAP: area GBB found @ 1805000 (458752 bytes)

  392 07:40:53.906814  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  393 07:40:53.910313  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  394 07:40:53.917296  VB2:vb2_verify_keyblock() Checking keyblock signature...

  395 07:40:53.923507  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  396 07:40:53.930468  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  397 07:40:53.940317  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  398 07:40:53.953249  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  399 07:40:53.956223  FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)

  400 07:40:53.963538  VB2:vb2_verify_fw_preamble() Verifying preamble.

  401 07:40:53.967302  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  402 07:40:53.975042  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  403 07:40:53.982038  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  404 07:40:53.987549  Phase 4

  405 07:40:53.990673  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  406 07:40:53.997199  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  407 07:40:54.225605  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  408 07:40:54.232068  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  409 07:40:54.235683  Saving vboot hash.

  410 07:40:54.242428  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  411 07:40:54.258296  tlcl_extend: response is 0

  412 07:40:54.264826  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  413 07:40:54.268355  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  414 07:40:54.286003  tlcl_extend: response is 0

  415 07:40:54.292705  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  416 07:40:54.311391  tlcl_lock_nv_write: response is 0

  417 07:40:54.328899  tlcl_lock_nv_write: response is 0

  418 07:40:54.329480  Slot B is selected

  419 07:40:54.335574  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  420 07:40:54.342627  CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes

  421 07:40:54.349325  CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600

  422 07:40:54.355769  BS: verstage times (exec / console): total (unknown) / 260 ms

  423 07:40:54.356124  

  424 07:40:54.356378  

  425 07:40:54.365576  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 romstage starting (log level: 8)...

  426 07:40:54.369064  Google Chrome EC: version:

  427 07:40:54.372141  	ro: moli_v2.0.19454-8a70cbdcf0

  428 07:40:54.375708  	rw: moli_v2.0.22464-d4ba27cabb

  429 07:40:54.378599    running image: 2

  430 07:40:54.382363  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  431 07:40:54.392325  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  432 07:40:54.398937  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  433 07:40:54.405514  CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc

  434 07:40:54.415359  VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  435 07:40:54.425701  VB2:check_ec_hash()            Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  436 07:40:54.428749  EC took 944us to calculate image hash

  437 07:40:54.439065  VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d

  438 07:40:54.442538  VB2:sync_ec() select_rw=RW(active)

  439 07:40:54.451060  EC returned error result code 1

  440 07:40:54.454209  PARAM_LIMIT_POWER not supported by EC.

  441 07:40:54.460619  Waited 7369us to clear limit power flag.

  442 07:40:54.463949  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  443 07:40:54.467529  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  444 07:40:54.473913  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  445 07:40:54.477511  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  446 07:40:54.480834  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  447 07:40:54.484010  TCO_STS:   0000 0000

  448 07:40:54.487333  GEN_PMCON: d1001038 00002200

  449 07:40:54.490884  GBLRST_CAUSE: 00000040 00000000

  450 07:40:54.491364  HPR_CAUSE0: 00000000

  451 07:40:54.494333  prev_sleep_state 5

  452 07:40:54.500768  Abort disabling TXT, as CPU is not TXT capable.

  453 07:40:54.504175  cse_lite: Number of partitions = 3

  454 07:40:54.507507  cse_lite: Current partition = RW

  455 07:40:54.511494  cse_lite: Next partition = RW

  456 07:40:54.514267  cse_lite: Flags = 0x7

  457 07:40:54.520980  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)

  458 07:40:54.527187  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)

  459 07:40:54.534347  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  460 07:40:54.540813  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  461 07:40:54.547456  cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000

  462 07:40:54.554157  CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4

  463 07:40:54.557415  cse_lite: CSE CBFS RW version : 16.1.25.2049

  464 07:40:54.560882  CSE Sub-partition update not required

  465 07:40:54.564272  Boot Count incremented to 1988

  466 07:40:54.570980  CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868

  467 07:40:54.577544  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  468 07:40:54.590938  Probing TPM I2C: done! DID_VID 0x00281ae0

  469 07:40:54.594164  Locality already claimed

  470 07:40:54.597563  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  471 07:40:54.617024  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  472 07:40:54.623749  MRC: Hash idx 0x100d comparison successful.

  473 07:40:54.626934  MRC cache found, size f6c8

  474 07:40:54.627298  bootmode is set to: 2

  475 07:40:54.630261  FW_CONFIG value from CBI is 0x64

  476 07:40:54.637308  fw_config match found: STORAGE=STORAGE_EMMC

  477 07:40:54.640494  FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)

  478 07:40:54.643929  SPD_CACHE: cache found, size 0x1000

  479 07:40:54.651287  SPD_CACHE: DIMM0 is the same

  480 07:40:54.655006  No memory dimm at address 51

  481 07:40:54.658204  SPD_CACHE: DIMM1 is not present

  482 07:40:54.661237  No memory dimm at address 52

  483 07:40:54.664471  SPD_CACHE: DIMM2 is not present

  484 07:40:54.668045  No memory dimm at address 53

  485 07:40:54.670993  SPD_CACHE: DIMM3 is not present

  486 07:40:54.674616  Use the SPD cache data

  487 07:40:54.677720  SPD: module type is DDR4

  488 07:40:54.681175  SPD: module part number is M471A5244CB0-CWE    

  489 07:40:54.687879  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  490 07:40:54.691017  SPD: device width 16 bits, bus width 64 bits

  491 07:40:54.694818  SPD: module size is 4096 MB (per channel)

  492 07:40:54.749055  CBMEM:

  493 07:40:54.752564  IMD: root @ 0x76fff000 254 entries.

  494 07:40:54.755439  IMD: root @ 0x76ffec00 62 entries.

  495 07:40:54.765432  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  496 07:40:54.768897  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  497 07:40:54.772026  RW_VPD is uninitialized or empty.

  498 07:40:54.778798  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  499 07:40:54.782190  External stage cache:

  500 07:40:54.785340  IMD: root @ 0x7bbff000 254 entries.

  501 07:40:54.788471  IMD: root @ 0x7bbfec00 62 entries.

  502 07:40:54.796171  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  503 07:40:54.802758  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  504 07:40:54.806294  MRC: 'RW_MRC_CACHE' does not need update.

  505 07:40:54.806751  1 DIMMs found

  506 07:40:54.809019  SMM Memory Map

  507 07:40:54.812422  SMRAM       : 0x7b800000 0x800000

  508 07:40:54.815815   Subregion 0: 0x7b800000 0x200000

  509 07:40:54.819107   Subregion 1: 0x7ba00000 0x200000

  510 07:40:54.822247   Subregion 2: 0x7bc00000 0x400000

  511 07:40:54.825847  top_of_ram = 0x77000000

  512 07:40:54.828825  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  513 07:40:54.835512  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  514 07:40:54.842294  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  515 07:40:54.845705  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  516 07:40:54.846014  Normal boot

  517 07:40:54.855614  CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc

  518 07:40:54.865978  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60

  519 07:40:54.868994  Processing 237 relocs. Offset value of 0x74ab9000

  520 07:40:54.872508  CLFLUSH [0x76ab9000, 0x76ac3e60]

  521 07:40:54.875555  CLFLUSH [0x76abea80, 0x76abea84]

  522 07:40:54.885934  BS: romstage times (exec / console): total (unknown) / 418 ms

  523 07:40:54.889032  CLFLUSH [0x76ab8000, 0x77000000]

  524 07:40:54.899900  CLFLUSH [0x7ba00000, 0x7bc00000]

  525 07:40:54.911212  

  526 07:40:54.911677  

  527 07:40:54.921438  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 postcar starting (log level: 8)...

  528 07:40:54.921934  Normal boot

  529 07:40:54.927862  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  530 07:40:54.934566  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  531 07:40:54.941331  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  532 07:40:54.947851  CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0

  533 07:40:54.998895  Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50

  534 07:40:55.005779  Processing 5882 relocs. Offset value of 0x72a2e000

  535 07:40:55.009283  BS: postcar times (exec / console): total (unknown) / 54 ms

  536 07:40:55.009743  

  537 07:40:55.012405  

  538 07:40:55.022465  coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep  6 23:44:51 UTC 2023 ramstage starting (log level: 8)...

  539 07:40:55.025877  Reserving BERT start 76a1d000, size 10000

  540 07:40:55.026369  Normal boot

  541 07:40:55.032530  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  542 07:40:55.039367  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  543 07:40:55.045938  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  544 07:40:55.052615  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  545 07:40:55.055715  Google Chrome EC: version:

  546 07:40:55.058936  	ro: moli_v2.0.19454-8a70cbdcf0

  547 07:40:55.062042  	rw: moli_v2.0.22464-d4ba27cabb

  548 07:40:55.062390    running image: 2

  549 07:40:55.065318  ACPI _SWS is PM1 Index 8 GPE Index -1

  550 07:40:55.072520  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  551 07:40:55.075497  FW_CONFIG value from CBI is 0x64

  552 07:40:55.078765  PCI: 00:06.0 disabled by fw_config

  553 07:40:55.085879  fw_config match found: STORAGE=STORAGE_EMMC

  554 07:40:55.089301  fw_config match found: STORAGE=STORAGE_EMMC

  555 07:40:55.092667  FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)

  556 07:40:55.102360  CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080

  557 07:40:55.106059  microcode: sig=0x906a4 pf=0x80 revision=0x423

  558 07:40:55.112668  microcode: Update skipped, already up-to-date

  559 07:40:55.119194  CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8

  560 07:40:55.151545  Detected 5 core, 5 thread CPU.

  561 07:40:55.154726  Setting up SMI for CPU

  562 07:40:55.158009  IED base = 0x7bc00000

  563 07:40:55.158450  IED size = 0x00400000

  564 07:40:55.161236  Will perform SMM setup.

  565 07:40:55.164616  CPU: Intel(R) Celeron(R) 7305.

  566 07:40:55.168369  LAPIC 0x0 in XAPIC mode.

  567 07:40:55.174792  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  568 07:40:55.182004  Processing 18 relocs. Offset value of 0x00030000

  569 07:40:55.185488  Attempting to start 4 APs

  570 07:40:55.188709  Waiting for 10ms after sending INIT.

  571 07:40:55.202003  Waiting for SIPI to complete...

  572 07:40:55.205151  done.

  573 07:40:55.205521  LAPIC 0x16 in XAPIC mode.

  574 07:40:55.208700  Waiting for SIPI to complete...

  575 07:40:55.212046  done.

  576 07:40:55.212531  LAPIC 0x12 in XAPIC mode.

  577 07:40:55.215195  LAPIC 0x10 in XAPIC mode.

  578 07:40:55.218821  LAPIC 0x14 in XAPIC mode.

  579 07:40:55.222097  AP: slot 3 apic_id 10, MCU rev: 0x00000423

  580 07:40:55.225945  AP: slot 4 apic_id 12, MCU rev: 0x00000423

  581 07:40:55.232461  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  582 07:40:55.235470  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  583 07:40:55.239192  smm_setup_relocation_handler: enter

  584 07:40:55.242153  smm_setup_relocation_handler: exit

  585 07:40:55.252517  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  586 07:40:55.255705  Processing 11 relocs. Offset value of 0x00038000

  587 07:40:55.259147  smm_module_setup_stub: stack_top = 0x7b802800

  588 07:40:55.265784  smm_module_setup_stub: per cpu stack_size = 0x800

  589 07:40:55.269095  smm_module_setup_stub: runtime.start32_offset = 0x4c

  590 07:40:55.275737  smm_module_setup_stub: runtime.smm_size = 0x10000

  591 07:40:55.282482  SMM Module: stub loaded at 38000. Will call 0x76a5220d

  592 07:40:55.285549  Installing permanent SMM handler to 0x7b800000

  593 07:40:55.288963  FX_SAVE      [0x7b9ff600-0x7ba00000]

  594 07:40:55.292147  HANDLER      [0x7b9f6000-0x7b9ff528]

  595 07:40:55.292615  

  596 07:40:55.292905  CPU 0

  597 07:40:55.299151    ss0        [0x7b9f5c00-0x7b9f6000]

  598 07:40:55.302661    stub0      [0x7b9ee000-0x7b9ee208]

  599 07:40:55.303106  

  600 07:40:55.303359  CPU 1

  601 07:40:55.306013    ss1        [0x7b9f5800-0x7b9f5c00]

  602 07:40:55.309247    stub1      [0x7b9edc00-0x7b9ede08]

  603 07:40:55.309670  

  604 07:40:55.309921  CPU 2

  605 07:40:55.315803    ss2        [0x7b9f5400-0x7b9f5800]

  606 07:40:55.319227    stub2      [0x7b9ed800-0x7b9eda08]

  607 07:40:55.319699  

  608 07:40:55.319953  CPU 3

  609 07:40:55.322672    ss3        [0x7b9f5000-0x7b9f5400]

  610 07:40:55.326090    stub3      [0x7b9ed400-0x7b9ed608]

  611 07:40:55.326515  

  612 07:40:55.326777  CPU 4

  613 07:40:55.329058    ss4        [0x7b9f4c00-0x7b9f5000]

  614 07:40:55.336038    stub4      [0x7b9ed000-0x7b9ed208]

  615 07:40:55.336460  

  616 07:40:55.339229  stacks       [0x7b800000-0x7b802800]

  617 07:40:55.346008  Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528

  618 07:40:55.352887  Processing 255 relocs. Offset value of 0x7b9f6000

  619 07:40:55.359829  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  620 07:40:55.366210  Processing 11 relocs. Offset value of 0x7b9ee000

  621 07:40:55.369275  smm_module_setup_stub: stack_top = 0x7b802800

  622 07:40:55.375818  smm_module_setup_stub: per cpu stack_size = 0x800

  623 07:40:55.379517  smm_module_setup_stub: runtime.start32_offset = 0x4c

  624 07:40:55.386045  smm_module_setup_stub: runtime.smm_size = 0x200000

  625 07:40:55.389397  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  626 07:40:55.396048  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  627 07:40:55.402653  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  628 07:40:55.409610  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  629 07:40:55.415702  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  630 07:40:55.422593  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  631 07:40:55.429251  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  632 07:40:55.436502  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  633 07:40:55.442421  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c

  634 07:40:55.446244  Clearing SMI status registers

  635 07:40:55.449152  SMI_STS: PM1 

  636 07:40:55.449513  PM1_STS: WAK PWRBTN 

  637 07:40:55.456013  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  638 07:40:55.459298  In relocation handler: CPU 0

  639 07:40:55.465789  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  640 07:40:55.469438  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  641 07:40:55.472805  Relocation complete.

  642 07:40:55.479206  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  643 07:40:55.482335  In relocation handler: CPU 1

  644 07:40:55.485905  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  645 07:40:55.489441  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  646 07:40:55.492812  Relocation complete.

  647 07:40:55.498944  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  648 07:40:55.502743  In relocation handler: CPU 2

  649 07:40:55.505828  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  650 07:40:55.512332  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  651 07:40:55.512755  Relocation complete.

  652 07:40:55.522315  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  653 07:40:55.522732  In relocation handler: CPU 3

  654 07:40:55.529052  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  655 07:40:55.532627  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  656 07:40:55.536010  Relocation complete.

  657 07:40:55.542791  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  658 07:40:55.545920  In relocation handler: CPU 4

  659 07:40:55.549356  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  660 07:40:55.552646  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  661 07:40:55.555722  Relocation complete.

  662 07:40:55.559395  Initializing CPU #0

  663 07:40:55.562344  CPU: vendor Intel device 906a4

  664 07:40:55.566065  CPU: family 06, model 9a, stepping 04

  665 07:40:55.569342  Clearing out pending MCEs

  666 07:40:55.569846  cpu: energy policy set to 7

  667 07:40:55.572816  Turbo is unavailable

  668 07:40:55.579086  microcode: Update skipped, already up-to-date

  669 07:40:55.579563  CPU #0 initialized

  670 07:40:55.582449  Initializing CPU #1

  671 07:40:55.582799  Initializing CPU #2

  672 07:40:55.585943  Initializing CPU #4

  673 07:40:55.589274  CPU: vendor Intel device 906a4

  674 07:40:55.592701  CPU: family 06, model 9a, stepping 04

  675 07:40:55.596124  CPU: vendor Intel device 906a4

  676 07:40:55.599566  CPU: family 06, model 9a, stepping 04

  677 07:40:55.602914  CPU: vendor Intel device 906a4

  678 07:40:55.606043  CPU: family 06, model 9a, stepping 04

  679 07:40:55.609544  Clearing out pending MCEs

  680 07:40:55.612761  Clearing out pending MCEs

  681 07:40:55.615714  Clearing out pending MCEs

  682 07:40:55.616083  cpu: energy policy set to 7

  683 07:40:55.619046  Initializing CPU #3

  684 07:40:55.622633  cpu: energy policy set to 7

  685 07:40:55.625681  microcode: Update skipped, already up-to-date

  686 07:40:55.628958  CPU #2 initialized

  687 07:40:55.632677  CPU: vendor Intel device 906a4

  688 07:40:55.635942  CPU: family 06, model 9a, stepping 04

  689 07:40:55.639124  cpu: energy policy set to 7

  690 07:40:55.642648  Clearing out pending MCEs

  691 07:40:55.645787  microcode: Update skipped, already up-to-date

  692 07:40:55.649003  CPU #4 initialized

  693 07:40:55.649355  cpu: energy policy set to 7

  694 07:40:55.655994  microcode: Update skipped, already up-to-date

  695 07:40:55.656484  CPU #1 initialized

  696 07:40:55.662591  microcode: Update skipped, already up-to-date

  697 07:40:55.663030  CPU #3 initialized

  698 07:40:55.669339  bsp_do_flight_plan done after 453 msecs.

  699 07:40:55.669754  Enabling SMIs.

  700 07:40:55.675515  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 245 / 352 ms

  701 07:40:55.692137  Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)

  702 07:40:55.698696  Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)

  703 07:40:55.705422  Probing TPM I2C: done! DID_VID 0x00281ae0

  704 07:40:55.708803  Locality already claimed

  705 07:40:55.712024  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  706 07:40:55.723081  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9

  707 07:40:55.726094  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  708 07:40:55.732901  fw_config match found: AUDIO=NAU88L25B_I2S

  709 07:40:55.736192  CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4

  710 07:40:55.743061  Found a VBT of 8704 bytes after decompression

  711 07:40:55.743562  PsysPmax = 214W

  712 07:40:55.746284  PCI  1.0, PIN A, using IRQ #16

  713 07:40:55.749696  PCI  2.0, PIN A, using IRQ #17

  714 07:40:55.752859  PCI  4.0, PIN A, using IRQ #18

  715 07:40:55.756078  PCI  5.0, PIN A, using IRQ #16

  716 07:40:55.759532  PCI  6.0, PIN A, using IRQ #16

  717 07:40:55.762803  PCI  6.2, PIN C, using IRQ #18

  718 07:40:55.766113  PCI  7.0, PIN A, using IRQ #19

  719 07:40:55.769645  PCI  7.1, PIN B, using IRQ #20

  720 07:40:55.772734  PCI  7.2, PIN C, using IRQ #21

  721 07:40:55.776051  PCI  7.3, PIN D, using IRQ #22

  722 07:40:55.779502  PCI  8.0, PIN A, using IRQ #23

  723 07:40:55.782516  PCI  D.0, PIN A, using IRQ #17

  724 07:40:55.786058  PCI  D.1, PIN B, using IRQ #19

  725 07:40:55.789322  PCI 10.0, PIN A, using IRQ #24

  726 07:40:55.792675  PCI 10.1, PIN B, using IRQ #25

  727 07:40:55.793066  PCI 10.6, PIN C, using IRQ #20

  728 07:40:55.796187  PCI 10.7, PIN D, using IRQ #21

  729 07:40:55.799416  PCI 11.0, PIN A, using IRQ #26

  730 07:40:55.802884  PCI 11.1, PIN B, using IRQ #27

  731 07:40:55.806048  PCI 11.2, PIN C, using IRQ #28

  732 07:40:55.809505  PCI 11.3, PIN D, using IRQ #29

  733 07:40:55.812601  PCI 12.0, PIN A, using IRQ #30

  734 07:40:55.815988  PCI 12.6, PIN B, using IRQ #31

  735 07:40:55.819074  PCI 12.7, PIN C, using IRQ #22

  736 07:40:55.822810  PCI 13.0, PIN A, using IRQ #32

  737 07:40:55.825916  PCI 13.1, PIN B, using IRQ #33

  738 07:40:55.829147  PCI 13.2, PIN C, using IRQ #34

  739 07:40:55.832786  PCI 13.3, PIN D, using IRQ #35

  740 07:40:55.836094  PCI 14.0, PIN B, using IRQ #23

  741 07:40:55.839163  PCI 14.1, PIN A, using IRQ #36

  742 07:40:55.842461  PCI 14.3, PIN C, using IRQ #17

  743 07:40:55.842888  PCI 15.0, PIN A, using IRQ #37

  744 07:40:55.846047  PCI 15.1, PIN B, using IRQ #38

  745 07:40:55.849511  PCI 15.2, PIN C, using IRQ #39

  746 07:40:55.852466  PCI 15.3, PIN D, using IRQ #40

  747 07:40:55.856190  PCI 16.0, PIN A, using IRQ #18

  748 07:40:55.859362  PCI 16.1, PIN B, using IRQ #19

  749 07:40:55.862819  PCI 16.2, PIN C, using IRQ #20

  750 07:40:55.865931  PCI 16.3, PIN D, using IRQ #21

  751 07:40:55.869514  PCI 16.4, PIN A, using IRQ #18

  752 07:40:55.872812  PCI 16.5, PIN B, using IRQ #19

  753 07:40:55.876125  PCI 17.0, PIN A, using IRQ #22

  754 07:40:55.879270  PCI 19.0, PIN A, using IRQ #41

  755 07:40:55.882781  PCI 19.1, PIN B, using IRQ #42

  756 07:40:55.886727  PCI 19.2, PIN C, using IRQ #43

  757 07:40:55.889589  PCI 1C.0, PIN A, using IRQ #16

  758 07:40:55.890015  PCI 1C.1, PIN B, using IRQ #17

  759 07:40:55.892910  PCI 1C.2, PIN C, using IRQ #18

  760 07:40:55.896584  PCI 1C.3, PIN D, using IRQ #19

  761 07:40:55.899388  PCI 1C.4, PIN A, using IRQ #16

  762 07:40:55.903472  PCI 1C.5, PIN B, using IRQ #17

  763 07:40:55.906408  PCI 1C.6, PIN C, using IRQ #18

  764 07:40:55.909695  PCI 1C.7, PIN D, using IRQ #19

  765 07:40:55.912959  PCI 1D.0, PIN A, using IRQ #16

  766 07:40:55.916324  PCI 1D.1, PIN B, using IRQ #17

  767 07:40:55.919575  PCI 1D.2, PIN C, using IRQ #18

  768 07:40:55.923095  PCI 1D.3, PIN D, using IRQ #19

  769 07:40:55.926205  PCI 1E.0, PIN A, using IRQ #23

  770 07:40:55.929664  PCI 1E.1, PIN B, using IRQ #20

  771 07:40:55.933059  PCI 1E.2, PIN C, using IRQ #44

  772 07:40:55.936368  PCI 1E.3, PIN D, using IRQ #45

  773 07:40:55.939394  PCI 1F.3, PIN B, using IRQ #22

  774 07:40:55.939846  PCI 1F.4, PIN C, using IRQ #23

  775 07:40:55.943215  PCI 1F.6, PIN D, using IRQ #20

  776 07:40:55.946019  PCI 1F.7, PIN A, using IRQ #21

  777 07:40:55.952911  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  778 07:40:55.959384  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  779 07:40:56.022226  FSPS returned 0

  780 07:40:56.025781  Executing Phase 1 of FspMultiPhaseSiInit

  781 07:40:56.035611  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  782 07:40:56.038869  port C0 DISC req: usage 1 usb3 1 usb2 1

  783 07:40:56.042228  Raw Buffer output 0 00000111

  784 07:40:56.045491  Raw Buffer output 1 00000000

  785 07:40:56.049213  pmc_send_ipc_cmd succeeded

  786 07:40:56.055683  port C1 DISC req: usage 1 usb3 3 usb2 3

  787 07:40:56.056005  Raw Buffer output 0 00000331

  788 07:40:56.058778  Raw Buffer output 1 00000000

  789 07:40:56.063132  pmc_send_ipc_cmd succeeded

  790 07:40:56.070396  AP Mode Entry enabled, skip waiting for DisplayPort connection

  791 07:40:56.076191  Detected 5 core, 5 thread CPU.

  792 07:40:56.079171  Detected 5 core, 5 thread CPU.

  793 07:40:56.084795  Detected 5 core, 5 thread CPU.

  794 07:40:56.088114  Detected 5 core, 5 thread CPU.

  795 07:40:56.091551  Detected 5 core, 5 thread CPU.

  796 07:40:56.094583  Detected 5 core, 5 thread CPU.

  797 07:40:56.098183  Detected 5 core, 5 thread CPU.

  798 07:40:56.101443  Detected 5 core, 5 thread CPU.

  799 07:40:56.104731  Detected 5 core, 5 thread CPU.

  800 07:40:56.108078  Detected 5 core, 5 thread CPU.

  801 07:40:56.111246  Detected 5 core, 5 thread CPU.

  802 07:40:56.114785  Detected 5 core, 5 thread CPU.

  803 07:40:56.118292  Detected 5 core, 5 thread CPU.

  804 07:40:56.121696  Detected 5 core, 5 thread CPU.

  805 07:40:56.124952  Detected 5 core, 5 thread CPU.

  806 07:40:56.127737  Detected 5 core, 5 thread CPU.

  807 07:40:56.226017  Detected 5 core, 5 thread CPU.

  808 07:40:56.229225  Detected 5 core, 5 thread CPU.

  809 07:40:56.232273  Detected 5 core, 5 thread CPU.

  810 07:40:56.236144  Detected 5 core, 5 thread CPU.

  811 07:40:56.239661  Detected 5 core, 5 thread CPU.

  812 07:40:56.242670  Detected 5 core, 5 thread CPU.

  813 07:40:56.245884  Detected 5 core, 5 thread CPU.

  814 07:40:56.249039  Detected 5 core, 5 thread CPU.

  815 07:40:56.252559  Detected 5 core, 5 thread CPU.

  816 07:40:56.256221  Detected 5 core, 5 thread CPU.

  817 07:40:56.259342  Detected 5 core, 5 thread CPU.

  818 07:40:56.262663  Detected 5 core, 5 thread CPU.

  819 07:40:56.266086  Detected 5 core, 5 thread CPU.

  820 07:40:56.269742  Detected 5 core, 5 thread CPU.

  821 07:40:56.272975  Display FSP Version Info HOB

  822 07:40:56.275908  Reference Code - CPU = c.0.65.70

  823 07:40:56.276290  uCode Version = 0.0.4.23

  824 07:40:56.279518  TXT ACM version = ff.ff.ff.ffff

  825 07:40:56.282570  Reference Code - ME = c.0.65.70

  826 07:40:56.286002  MEBx version = 0.0.0.0

  827 07:40:56.289420  ME Firmware Version = Lite SKU

  828 07:40:56.292678  Reference Code - PCH = c.0.65.70

  829 07:40:56.296233  PCH-CRID Status = Disabled

  830 07:40:56.299582  PCH-CRID Original Value = ff.ff.ff.ffff

  831 07:40:56.302875  PCH-CRID New Value = ff.ff.ff.ffff

  832 07:40:56.306230  OPROM - RST - RAID = ff.ff.ff.ffff

  833 07:40:56.309768  PCH Hsio Version = 4.0.0.0

  834 07:40:56.312740  Reference Code - SA - System Agent = c.0.65.70

  835 07:40:56.316324  Reference Code - MRC = 0.0.3.80

  836 07:40:56.319163  SA - PCIe Version = c.0.65.70

  837 07:40:56.322984  SA-CRID Status = Disabled

  838 07:40:56.326072  SA-CRID Original Value = 0.0.0.4

  839 07:40:56.329716  SA-CRID New Value = 0.0.0.4

  840 07:40:56.332412  OPROM - VBIOS = ff.ff.ff.ffff

  841 07:40:56.335903  IO Manageability Engine FW Version = 24.0.4.0

  842 07:40:56.339577  PHY Build Version = 0.0.0.2016

  843 07:40:56.342631  Thunderbolt(TM) FW Version = 11.5.0.0

  844 07:40:56.349586  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  845 07:40:56.352637  Found PCIe Root Port #7 at PCI: 00:1c.0.

  846 07:40:56.359496  Found PCIe Root Port #8 at PCI: 00:1c.7.

  847 07:40:56.362776  Found PCIe Root Port #12 at PCI: 00:1d.0.

  848 07:40:56.372666  pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.

  849 07:40:56.382913  Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.

  850 07:40:56.389517  Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.

  851 07:40:56.392849  Found PCIe Root Port #1 at PCI: 00:07.0.

  852 07:40:56.395848  Found PCIe Root Port #2 at PCI: 00:07.1.

  853 07:40:56.399189  Found PCIe Root Port #3 at PCI: 00:07.2.

  854 07:40:56.402999  Sending EOP early from SoC

  855 07:40:56.406071  HECI: Sending End-of-Post

  856 07:40:56.412940  BS: BS_DEV_INIT_CHIPS run times (exec / console): 183 / 546 ms

  857 07:40:56.416044  Enumerating buses...

  858 07:40:56.419573  Show all devs... Before device enumeration.

  859 07:40:56.422706  Root Device: enabled 1

  860 07:40:56.423191  CPU_CLUSTER: 0: enabled 1

  861 07:40:56.426136  DOMAIN: 0000: enabled 1

  862 07:40:56.429152  GPIO: 0: enabled 1

  863 07:40:56.432382  PCI: 00:00.0: enabled 1

  864 07:40:56.432704  PCI: 00:01.0: enabled 0

  865 07:40:56.435848  PCI: 00:01.1: enabled 0

  866 07:40:56.439441  PCI: 00:02.0: enabled 1

  867 07:40:56.439949  PCI: 00:04.0: enabled 1

  868 07:40:56.443003  PCI: 00:05.0: enabled 0

  869 07:40:56.446134  PCI: 00:06.0: enabled 0

  870 07:40:56.449308  PCI: 00:06.2: enabled 0

  871 07:40:56.449674  PCI: 00:07.0: enabled 1

  872 07:40:56.452689  PCI: 00:07.1: enabled 1

  873 07:40:56.456158  PCI: 00:07.2: enabled 1

  874 07:40:56.459365  PCI: 00:07.3: enabled 0

  875 07:40:56.459870  PCI: 00:08.0: enabled 0

  876 07:40:56.462427  PCI: 00:09.0: enabled 0

  877 07:40:56.465841  PCI: 00:0a.0: enabled 1

  878 07:40:56.469508  PCI: 00:0d.0: enabled 1

  879 07:40:56.469993  PCI: 00:0d.1: enabled 0

  880 07:40:56.472831  PCI: 00:0d.2: enabled 1

  881 07:40:56.476167  PCI: 00:0d.3: enabled 1

  882 07:40:56.476651  PCI: 00:0e.0: enabled 0

  883 07:40:56.479492  PCI: 00:10.0: enabled 0

  884 07:40:56.482813  PCI: 00:10.1: enabled 0

  885 07:40:56.486221  PCI: 00:10.6: enabled 0

  886 07:40:56.486636  PCI: 00:10.7: enabled 0

  887 07:40:56.489235  PCI: 00:12.0: enabled 0

  888 07:40:56.492818  PCI: 00:12.6: enabled 0

  889 07:40:56.495970  PCI: 00:12.7: enabled 0

  890 07:40:56.496365  PCI: 00:13.0: enabled 0

  891 07:40:56.499695  PCI: 00:14.0: enabled 1

  892 07:40:56.502929  PCI: 00:14.1: enabled 0

  893 07:40:56.503396  PCI: 00:14.2: enabled 1

  894 07:40:56.506382  PCI: 00:14.3: enabled 1

  895 07:40:56.509782  PCI: 00:15.0: enabled 1

  896 07:40:56.513039  PCI: 00:15.1: enabled 1

  897 07:40:56.513510  PCI: 00:15.2: enabled 0

  898 07:40:56.516231  PCI: 00:15.3: enabled 0

  899 07:40:56.519745  PCI: 00:16.0: enabled 1

  900 07:40:56.522966  PCI: 00:16.1: enabled 0

  901 07:40:56.523455  PCI: 00:16.2: enabled 0

  902 07:40:56.526037  PCI: 00:16.3: enabled 0

  903 07:40:56.529974  PCI: 00:16.4: enabled 0

  904 07:40:56.530458  PCI: 00:16.5: enabled 0

  905 07:40:56.532676  PCI: 00:17.0: enabled 1

  906 07:40:56.536056  PCI: 00:19.0: enabled 0

  907 07:40:56.539749  PCI: 00:19.1: enabled 0

  908 07:40:56.540133  PCI: 00:19.2: enabled 0

  909 07:40:56.542729  PCI: 00:1a.0: enabled 0

  910 07:40:56.546465  PCI: 00:1c.0: enabled 0

  911 07:40:56.549714  PCI: 00:1c.1: enabled 0

  912 07:40:56.550187  PCI: 00:1c.2: enabled 0

  913 07:40:56.553019  PCI: 00:1c.3: enabled 0

  914 07:40:56.555993  PCI: 00:1c.4: enabled 0

  915 07:40:56.559234  PCI: 00:1c.5: enabled 1

  916 07:40:56.559618  PCI: 00:1c.0: enabled 1

  917 07:40:56.562780  PCI: 00:1c.7: enabled 1

  918 07:40:56.566200  PCI: 00:1d.0: enabled 0

  919 07:40:56.569448  PCI: 00:1d.1: enabled 0

  920 07:40:56.569922  PCI: 00:1d.2: enabled 0

  921 07:40:56.573009  PCI: 00:1d.0: enabled 1

  922 07:40:56.576206  PCI: 00:1e.0: enabled 1

  923 07:40:56.576573  PCI: 00:1e.1: enabled 0

  924 07:40:56.579064  PCI: 00:1e.2: enabled 0

  925 07:40:56.583006  PCI: 00:1e.3: enabled 1

  926 07:40:56.586002  PCI: 00:1f.0: enabled 1

  927 07:40:56.586460  PCI: 00:1f.1: enabled 0

  928 07:40:56.589542  PCI: 00:1f.2: enabled 1

  929 07:40:56.592546  PCI: 00:1f.3: enabled 1

  930 07:40:56.595666  PCI: 00:1f.4: enabled 1

  931 07:40:56.596097  PCI: 00:1f.5: enabled 1

  932 07:40:56.599296  PCI: 00:1f.6: enabled 0

  933 07:40:56.602910  PCI: 00:1f.7: enabled 0

  934 07:40:56.605950  GENERIC: 0.0: enabled 1

  935 07:40:56.606321  GENERIC: 0.0: enabled 1

  936 07:40:56.609477  GENERIC: 1.0: enabled 1

  937 07:40:56.612601  GENERIC: 0.0: enabled 1

  938 07:40:56.612964  GENERIC: 1.0: enabled 1

  939 07:40:56.615883  USB0 port 0: enabled 1

  940 07:40:56.619293  GENERIC: 0.0: enabled 1

  941 07:40:56.622745  GENERIC: 0.0: enabled 1

  942 07:40:56.623203  USB0 port 0: enabled 1

  943 07:40:56.626057  GENERIC: 0.0: enabled 1

  944 07:40:56.629536  I2C: 00:1a: enabled 1

  945 07:40:56.629997  I2C: 00:50: enabled 1

  946 07:40:56.632525  PCI: 00:00.0: enabled 1

  947 07:40:56.635865  PCI: 00:00.0: enabled 1

  948 07:40:56.638933  GENERIC: 0.0: enabled 1

  949 07:40:56.639299  GENERIC: 0.0: enabled 1

  950 07:40:56.642412  PNP: 0c09.0: enabled 1

  951 07:40:56.645901  GENERIC: 0.0: enabled 1

  952 07:40:56.649037  USB3 port 0: enabled 1

  953 07:40:56.649421  USB3 port 1: enabled 0

  954 07:40:56.652710  USB3 port 2: enabled 1

  955 07:40:56.656176  USB3 port 3: enabled 0

  956 07:40:56.656622  USB2 port 0: enabled 1

  957 07:40:56.659195  USB2 port 1: enabled 0

  958 07:40:56.662527  USB2 port 2: enabled 1

  959 07:40:56.662960  USB2 port 3: enabled 1

  960 07:40:56.665629  USB2 port 4: enabled 1

  961 07:40:56.715982  USB2 port 5: enabled 1

  962 07:40:56.716518  USB2 port 6: enabled 1

  963 07:40:56.716841  USB2 port 7: enabled 1

  964 07:40:56.717084  USB2 port 8: enabled 0

  965 07:40:56.717312  USB2 port 9: enabled 1

  966 07:40:56.717533  USB3 port 0: enabled 1

  967 07:40:56.717760  USB3 port 1: enabled 1

  968 07:40:56.717987  USB3 port 2: enabled 1

  969 07:40:56.718482  USB3 port 3: enabled 1

  970 07:40:56.718731  GENERIC: 0.0: enabled 1

  971 07:40:56.718947  GENERIC: 1.0: enabled 1

  972 07:40:56.719152  APIC: 00: enabled 1

  973 07:40:56.719356  APIC: 14: enabled 1

  974 07:40:56.719599  APIC: 16: enabled 1

  975 07:40:56.719804  APIC: 10: enabled 1

  976 07:40:56.720005  APIC: 12: enabled 1

  977 07:40:56.720202  Compare with tree...

  978 07:40:56.720400  Root Device: enabled 1

  979 07:40:56.720600   CPU_CLUSTER: 0: enabled 1

  980 07:40:56.720800    APIC: 00: enabled 1

  981 07:40:56.720999    APIC: 14: enabled 1

  982 07:40:56.721200    APIC: 16: enabled 1

  983 07:40:56.765749    APIC: 10: enabled 1

  984 07:40:56.766293    APIC: 12: enabled 1

  985 07:40:56.766601   DOMAIN: 0000: enabled 1

  986 07:40:56.766840    GPIO: 0: enabled 1

  987 07:40:56.767063    PCI: 00:00.0: enabled 1

  988 07:40:56.767572    PCI: 00:01.0: enabled 0

  989 07:40:56.767847    PCI: 00:01.1: enabled 0

  990 07:40:56.768194    PCI: 00:02.0: enabled 1

  991 07:40:56.768465    PCI: 00:04.0: enabled 1

  992 07:40:56.768684     GENERIC: 0.0: enabled 1

  993 07:40:56.768901    PCI: 00:05.0: enabled 0

  994 07:40:56.769105    PCI: 00:06.0: enabled 0

  995 07:40:56.769310    PCI: 00:06.2: enabled 0

  996 07:40:56.769515    PCI: 00:07.0: enabled 1

  997 07:40:56.769721     GENERIC: 0.0: enabled 1

  998 07:40:56.769924    PCI: 00:07.1: enabled 1

  999 07:40:56.770127     GENERIC: 1.0: enabled 1

 1000 07:40:56.770331    PCI: 00:07.2: enabled 1

 1001 07:40:56.770531     GENERIC: 0.0: enabled 1

 1002 07:40:56.815413    PCI: 00:08.0: enabled 0

 1003 07:40:56.815932    PCI: 00:09.0: enabled 0

 1004 07:40:56.816269    PCI: 00:0a.0: enabled 1

 1005 07:40:56.816515    PCI: 00:0d.0: enabled 1

 1006 07:40:56.816736     USB0 port 0: enabled 1

 1007 07:40:56.816951      USB3 port 0: enabled 1

 1008 07:40:56.817162      USB3 port 1: enabled 0

 1009 07:40:56.817658      USB3 port 2: enabled 1

 1010 07:40:56.817896      USB3 port 3: enabled 0

 1011 07:40:56.818131    PCI: 00:0d.1: enabled 0

 1012 07:40:56.818362    PCI: 00:0d.2: enabled 1

 1013 07:40:56.818583     GENERIC: 0.0: enabled 1

 1014 07:40:56.818790    PCI: 00:0d.3: enabled 1

 1015 07:40:56.818991     GENERIC: 0.0: enabled 1

 1016 07:40:56.819194    PCI: 00:0e.0: enabled 0

 1017 07:40:56.819395    PCI: 00:10.0: enabled 0

 1018 07:40:56.819627    PCI: 00:10.1: enabled 0

 1019 07:40:56.819832    PCI: 00:10.6: enabled 0

 1020 07:40:56.820034    PCI: 00:10.7: enabled 0

 1021 07:40:56.832202    PCI: 00:12.0: enabled 0

 1022 07:40:56.832799    PCI: 00:12.6: enabled 0

 1023 07:40:56.833089    PCI: 00:12.7: enabled 0

 1024 07:40:56.833320    PCI: 00:13.0: enabled 0

 1025 07:40:56.833658    PCI: 00:14.0: enabled 1

 1026 07:40:56.835724     USB0 port 0: enabled 1

 1027 07:40:56.836075      USB2 port 0: enabled 1

 1028 07:40:56.838938      USB2 port 1: enabled 0

 1029 07:40:56.839385      USB2 port 2: enabled 1

 1030 07:40:56.842150      USB2 port 3: enabled 1

 1031 07:40:56.845825      USB2 port 4: enabled 1

 1032 07:40:56.849169      USB2 port 5: enabled 1

 1033 07:40:56.852187      USB2 port 6: enabled 1

 1034 07:40:56.852611      USB2 port 7: enabled 1

 1035 07:40:56.855463      USB2 port 8: enabled 0

 1036 07:40:56.859100      USB2 port 9: enabled 1

 1037 07:40:56.862114      USB3 port 0: enabled 1

 1038 07:40:56.865495      USB3 port 1: enabled 1

 1039 07:40:56.869208      USB3 port 2: enabled 1

 1040 07:40:56.869597      USB3 port 3: enabled 1

 1041 07:40:56.872351    PCI: 00:14.1: enabled 0

 1042 07:40:56.875285    PCI: 00:14.2: enabled 1

 1043 07:40:56.878774    PCI: 00:14.3: enabled 1

 1044 07:40:56.882194     GENERIC: 0.0: enabled 1

 1045 07:40:56.882642    PCI: 00:15.0: enabled 1

 1046 07:40:56.885565     I2C: 00:1a: enabled 1

 1047 07:40:56.888820    PCI: 00:15.1: enabled 1

 1048 07:40:56.892184     I2C: 00:50: enabled 1

 1049 07:40:56.895635    PCI: 00:15.2: enabled 0

 1050 07:40:56.896076    PCI: 00:15.3: enabled 0

 1051 07:40:56.898720    PCI: 00:16.0: enabled 1

 1052 07:40:56.902299    PCI: 00:16.1: enabled 0

 1053 07:40:56.905663    PCI: 00:16.2: enabled 0

 1054 07:40:56.908575    PCI: 00:16.3: enabled 0

 1055 07:40:56.908926    PCI: 00:16.4: enabled 0

 1056 07:40:56.912088    PCI: 00:16.5: enabled 0

 1057 07:40:56.915313    PCI: 00:17.0: enabled 1

 1058 07:40:56.918658    PCI: 00:19.0: enabled 0

 1059 07:40:56.919117    PCI: 00:19.1: enabled 0

 1060 07:40:56.921837    PCI: 00:19.2: enabled 0

 1061 07:40:56.925262    PCI: 00:1a.0: enabled 0

 1062 07:40:56.928926    PCI: 00:1c.0: enabled 1

 1063 07:40:56.931681     PCI: 00:00.0: enabled 1

 1064 07:40:56.932036    PCI: 00:1c.7: enabled 1

 1065 07:40:56.935286     GENERIC: 0.0: enabled 1

 1066 07:40:56.938663    PCI: 00:1d.0: enabled 1

 1067 07:40:56.942282     GENERIC: 0.0: enabled 1

 1068 07:40:56.945415    PCI: 00:1e.0: enabled 1

 1069 07:40:56.945770    PCI: 00:1e.1: enabled 0

 1070 07:40:56.948805    PCI: 00:1e.2: enabled 0

 1071 07:40:56.952102    PCI: 00:1e.3: enabled 1

 1072 07:40:56.955402    PCI: 00:1f.0: enabled 1

 1073 07:40:56.958719     PNP: 0c09.0: enabled 1

 1074 07:40:56.959216    PCI: 00:1f.1: enabled 0

 1075 07:40:56.962005    PCI: 00:1f.2: enabled 1

 1076 07:40:56.965516     GENERIC: 0.0: enabled 1

 1077 07:40:56.968959      GENERIC: 0.0: enabled 1

 1078 07:40:56.972244      GENERIC: 1.0: enabled 1

 1079 07:40:56.975473    PCI: 00:1f.3: enabled 1

 1080 07:40:56.975909    PCI: 00:1f.4: enabled 1

 1081 07:40:56.978550    PCI: 00:1f.5: enabled 1

 1082 07:40:56.981911    PCI: 00:1f.6: enabled 0

 1083 07:40:56.985207    PCI: 00:1f.7: enabled 0

 1084 07:40:56.985671  Root Device scanning...

 1085 07:40:56.988777  scan_static_bus for Root Device

 1086 07:40:56.992127  CPU_CLUSTER: 0 enabled

 1087 07:40:56.995334  DOMAIN: 0000 enabled

 1088 07:40:56.996030  DOMAIN: 0000 scanning...

 1089 07:40:56.998484  PCI: pci_scan_bus for bus 00

 1090 07:40:57.002127  PCI: 00:00.0 [8086/0000] ops

 1091 07:40:57.005700  PCI: 00:00.0 [8086/4619] enabled

 1092 07:40:57.008913  PCI: 00:02.0 [8086/0000] bus ops

 1093 07:40:57.012147  PCI: 00:02.0 [8086/46b3] enabled

 1094 07:40:57.015381  PCI: 00:04.0 [8086/0000] bus ops

 1095 07:40:57.018999  PCI: 00:04.0 [8086/461d] enabled

 1096 07:40:57.022075  PCI: 00:07.0 subordinate bus PCI Express

 1097 07:40:57.025416  PCI: 00:07.0 hot-plug capable

 1098 07:40:57.028874  PCI: 00:07.0 [8086/466e] enabled

 1099 07:40:57.035240  PCI: 00:07.1 subordinate bus PCI Express

 1100 07:40:57.038728  PCI: 00:07.1 hot-plug capable

 1101 07:40:57.042363  PCI: 00:07.1 [8086/463f] enabled

 1102 07:40:57.045614  PCI: 00:07.2 subordinate bus PCI Express

 1103 07:40:57.048797  PCI: 00:07.2 hot-plug capable

 1104 07:40:57.052320  PCI: 00:07.2 [8086/462f] enabled

 1105 07:40:57.055548  PCI: 00:08.0 [8086/464f] disabled

 1106 07:40:57.058631  PCI: 00:0a.0 [8086/467d] enabled

 1107 07:40:57.062106  PCI: 00:0d.0 [8086/0000] bus ops

 1108 07:40:57.065391  PCI: 00:0d.0 [8086/461e] enabled

 1109 07:40:57.068758  PCI: 00:0d.2 [8086/0000] bus ops

 1110 07:40:57.072164  PCI: 00:0d.2 [8086/463e] enabled

 1111 07:40:57.075353  PCI: 00:0d.3 [8086/0000] bus ops

 1112 07:40:57.078865  PCI: 00:0d.3 [8086/466d] enabled

 1113 07:40:57.082395  PCI: 00:14.0 [8086/0000] bus ops

 1114 07:40:57.085575  PCI: 00:14.0 [8086/51ed] enabled

 1115 07:40:57.089145  PCI: 00:14.2 [8086/51ef] enabled

 1116 07:40:57.092373  PCI: 00:14.3 [8086/0000] bus ops

 1117 07:40:57.095778  PCI: 00:14.3 [8086/51f0] enabled

 1118 07:40:57.099132  PCI: 00:15.0 [8086/0000] bus ops

 1119 07:40:57.102359  PCI: 00:15.0 [8086/51e8] enabled

 1120 07:40:57.105612  PCI: 00:15.1 [8086/0000] bus ops

 1121 07:40:57.109262  PCI: 00:15.1 [8086/51e9] enabled

 1122 07:40:57.112479  PCI: 00:16.0 [8086/0000] ops

 1123 07:40:57.115509  PCI: 00:16.0 [8086/51e0] enabled

 1124 07:40:57.118907  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1125 07:40:57.122081  PCI: 00:1c.0 [8086/0000] bus ops

 1126 07:40:57.125732  PCI: 00:1c.0 [8086/51be] enabled

 1127 07:40:57.129065  PCI: 00:1c.7 [8086/0000] bus ops

 1128 07:40:57.132196  PCI: 00:1c.7 [8086/51bf] enabled

 1129 07:40:57.135568  PCI: 00:1d.0 [8086/0000] bus ops

 1130 07:40:57.139173  PCI: 00:1d.0 [8086/51b3] enabled

 1131 07:40:57.142415  PCI: 00:1e.0 [8086/0000] ops

 1132 07:40:57.145605  PCI: 00:1e.0 [8086/51a8] enabled

 1133 07:40:57.149282  PCI: 00:1e.3 [8086/0000] bus ops

 1134 07:40:57.152761  PCI: 00:1e.3 [8086/51ab] enabled

 1135 07:40:57.156220  PCI: 00:1f.0 [8086/0000] bus ops

 1136 07:40:57.158896  PCI: 00:1f.0 [8086/5182] enabled

 1137 07:40:57.162146  RTC Init

 1138 07:40:57.165670  Set power on after power failure.

 1139 07:40:57.166080  Disabling Deep S3

 1140 07:40:57.168665  Disabling Deep S3

 1141 07:40:57.168983  Disabling Deep S4

 1142 07:40:57.172182  Disabling Deep S4

 1143 07:40:57.175773  Disabling Deep S5

 1144 07:40:57.176309  Disabling Deep S5

 1145 07:40:57.178711  PCI: 00:1f.2 [0000/0000] hidden

 1146 07:40:57.182274  PCI: 00:1f.3 [8086/0000] bus ops

 1147 07:40:57.185844  PCI: 00:1f.3 [8086/51c8] enabled

 1148 07:40:57.189240  PCI: 00:1f.4 [8086/0000] bus ops

 1149 07:40:57.192007  PCI: 00:1f.4 [8086/51a3] enabled

 1150 07:40:57.195521  PCI: 00:1f.5 [8086/0000] bus ops

 1151 07:40:57.198630  PCI: 00:1f.5 [8086/51a4] enabled

 1152 07:40:57.202377  GPIO: 0 enabled

 1153 07:40:57.202796  PCI: Leftover static devices:

 1154 07:40:57.205936  PCI: 00:01.0

 1155 07:40:57.206398  PCI: 00:01.1

 1156 07:40:57.209102  PCI: 00:05.0

 1157 07:40:57.209563  PCI: 00:06.0

 1158 07:40:57.212247  PCI: 00:06.2

 1159 07:40:57.212600  PCI: 00:09.0

 1160 07:40:57.212853  PCI: 00:0d.1

 1161 07:40:57.215737  PCI: 00:0e.0

 1162 07:40:57.216169  PCI: 00:10.0

 1163 07:40:57.219265  PCI: 00:10.1

 1164 07:40:57.219790  PCI: 00:10.6

 1165 07:40:57.220096  PCI: 00:10.7

 1166 07:40:57.222259  PCI: 00:12.0

 1167 07:40:57.222609  PCI: 00:12.6

 1168 07:40:57.225559  PCI: 00:12.7

 1169 07:40:57.226021  PCI: 00:13.0

 1170 07:40:57.226290  PCI: 00:14.1

 1171 07:40:57.228994  PCI: 00:15.2

 1172 07:40:57.229433  PCI: 00:15.3

 1173 07:40:57.232098  PCI: 00:16.1

 1174 07:40:57.232450  PCI: 00:16.2

 1175 07:40:57.235344  PCI: 00:16.3

 1176 07:40:57.235715  PCI: 00:16.4

 1177 07:40:57.235966  PCI: 00:16.5

 1178 07:40:57.239164  PCI: 00:17.0

 1179 07:40:57.239652  PCI: 00:19.0

 1180 07:40:57.242759  PCI: 00:19.1

 1181 07:40:57.243249  PCI: 00:19.2

 1182 07:40:57.243542  PCI: 00:1a.0

 1183 07:40:57.245873  PCI: 00:1e.1

 1184 07:40:57.246355  PCI: 00:1e.2

 1185 07:40:57.248980  PCI: 00:1f.1

 1186 07:40:57.249456  PCI: 00:1f.6

 1187 07:40:57.249747  PCI: 00:1f.7

 1188 07:40:57.252378  PCI: Check your devicetree.cb.

 1189 07:40:57.255363  PCI: 00:02.0 scanning...

 1190 07:40:57.259132  scan_generic_bus for PCI: 00:02.0

 1191 07:40:57.262449  scan_generic_bus for PCI: 00:02.0 done

 1192 07:40:57.269084  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1193 07:40:57.272219  PCI: 00:04.0 scanning...

 1194 07:40:57.275512  scan_generic_bus for PCI: 00:04.0

 1195 07:40:57.275863  GENERIC: 0.0 enabled

 1196 07:40:57.282365  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1197 07:40:57.285687  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1198 07:40:57.288973  PCI: 00:07.0 scanning...

 1199 07:40:57.292466  do_pci_scan_bridge for PCI: 00:07.0

 1200 07:40:57.295288  PCI: pci_scan_bus for bus 01

 1201 07:40:57.298627  GENERIC: 0.0 enabled

 1202 07:40:57.302329  scan_bus: bus PCI: 00:07.0 finished in 8 msecs

 1203 07:40:57.305652  PCI: 00:07.1 scanning...

 1204 07:40:57.309575  do_pci_scan_bridge for PCI: 00:07.1

 1205 07:40:57.312599  PCI: pci_scan_bus for bus 2c

 1206 07:40:57.315792  GENERIC: 1.0 enabled

 1207 07:40:57.318744  scan_bus: bus PCI: 00:07.1 finished in 8 msecs

 1208 07:40:57.322196  PCI: 00:07.2 scanning...

 1209 07:40:57.325831  do_pci_scan_bridge for PCI: 00:07.2

 1210 07:40:57.329090  PCI: pci_scan_bus for bus 57

 1211 07:40:57.329469  GENERIC: 0.0 enabled

 1212 07:40:57.335469  scan_bus: bus PCI: 00:07.2 finished in 8 msecs

 1213 07:40:57.338933  PCI: 00:0d.0 scanning...

 1214 07:40:57.342670  scan_static_bus for PCI: 00:0d.0

 1215 07:40:57.343134  USB0 port 0 enabled

 1216 07:40:57.345542  USB0 port 0 scanning...

 1217 07:40:57.348982  scan_static_bus for USB0 port 0

 1218 07:40:57.351937  USB3 port 0 enabled

 1219 07:40:57.352286  USB3 port 1 disabled

 1220 07:40:57.355582  USB3 port 2 enabled

 1221 07:40:57.356039  USB3 port 3 disabled

 1222 07:40:57.359074  USB3 port 0 scanning...

 1223 07:40:57.362396  scan_static_bus for USB3 port 0

 1224 07:40:57.365736  scan_static_bus for USB3 port 0 done

 1225 07:40:57.372033  scan_bus: bus USB3 port 0 finished in 6 msecs

 1226 07:40:57.372456  USB3 port 2 scanning...

 1227 07:40:57.375302  scan_static_bus for USB3 port 2

 1228 07:40:57.378980  scan_static_bus for USB3 port 2 done

 1229 07:40:57.385436  scan_bus: bus USB3 port 2 finished in 6 msecs

 1230 07:40:57.388868  scan_static_bus for USB0 port 0 done

 1231 07:40:57.392128  scan_bus: bus USB0 port 0 finished in 43 msecs

 1232 07:40:57.395627  scan_static_bus for PCI: 00:0d.0 done

 1233 07:40:57.402171  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1234 07:40:57.405696  PCI: 00:0d.2 scanning...

 1235 07:40:57.409054  scan_generic_bus for PCI: 00:0d.2

 1236 07:40:57.409516  GENERIC: 0.0 enabled

 1237 07:40:57.415436  bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done

 1238 07:40:57.422233  scan_bus: bus PCI: 00:0d.2 finished in 11 msecs

 1239 07:40:57.422677  PCI: 00:0d.3 scanning...

 1240 07:40:57.425569  scan_generic_bus for PCI: 00:0d.3

 1241 07:40:57.428732  GENERIC: 0.0 enabled

 1242 07:40:57.435282  bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done

 1243 07:40:57.438906  scan_bus: bus PCI: 00:0d.3 finished in 11 msecs

 1244 07:40:57.442273  PCI: 00:14.0 scanning...

 1245 07:40:57.445223  scan_static_bus for PCI: 00:14.0

 1246 07:40:57.448549  USB0 port 0 enabled

 1247 07:40:57.448899  USB0 port 0 scanning...

 1248 07:40:57.452240  scan_static_bus for USB0 port 0

 1249 07:40:57.455185  USB2 port 0 enabled

 1250 07:40:57.458795  USB2 port 1 disabled

 1251 07:40:57.459162  USB2 port 2 enabled

 1252 07:40:57.461956  USB2 port 3 enabled

 1253 07:40:57.462411  USB2 port 4 enabled

 1254 07:40:57.465487  USB2 port 5 enabled

 1255 07:40:57.468588  USB2 port 6 enabled

 1256 07:40:57.468935  USB2 port 7 enabled

 1257 07:40:57.471967  USB2 port 8 disabled

 1258 07:40:57.475182  USB2 port 9 enabled

 1259 07:40:57.475654  USB3 port 0 enabled

 1260 07:40:57.478638  USB3 port 1 enabled

 1261 07:40:57.479077  USB3 port 2 enabled

 1262 07:40:57.481909  USB3 port 3 enabled

 1263 07:40:57.485534  USB2 port 0 scanning...

 1264 07:40:57.488603  scan_static_bus for USB2 port 0

 1265 07:40:57.491711  scan_static_bus for USB2 port 0 done

 1266 07:40:57.495221  scan_bus: bus USB2 port 0 finished in 6 msecs

 1267 07:40:57.498323  USB2 port 2 scanning...

 1268 07:40:57.501996  scan_static_bus for USB2 port 2

 1269 07:40:57.505119  scan_static_bus for USB2 port 2 done

 1270 07:40:57.508588  scan_bus: bus USB2 port 2 finished in 6 msecs

 1271 07:40:57.511903  USB2 port 3 scanning...

 1272 07:40:57.514982  scan_static_bus for USB2 port 3

 1273 07:40:57.518665  scan_static_bus for USB2 port 3 done

 1274 07:40:57.525363  scan_bus: bus USB2 port 3 finished in 6 msecs

 1275 07:40:57.525816  USB2 port 4 scanning...

 1276 07:40:57.528521  scan_static_bus for USB2 port 4

 1277 07:40:57.531665  scan_static_bus for USB2 port 4 done

 1278 07:40:57.538650  scan_bus: bus USB2 port 4 finished in 6 msecs

 1279 07:40:57.541857  USB2 port 5 scanning...

 1280 07:40:57.545074  scan_static_bus for USB2 port 5

 1281 07:40:57.549062  scan_static_bus for USB2 port 5 done

 1282 07:40:57.551523  scan_bus: bus USB2 port 5 finished in 6 msecs

 1283 07:40:57.555280  USB2 port 6 scanning...

 1284 07:40:57.558560  scan_static_bus for USB2 port 6

 1285 07:40:57.561682  scan_static_bus for USB2 port 6 done

 1286 07:40:57.564923  scan_bus: bus USB2 port 6 finished in 6 msecs

 1287 07:40:57.568428  USB2 port 7 scanning...

 1288 07:40:57.571809  scan_static_bus for USB2 port 7

 1289 07:40:57.574940  scan_static_bus for USB2 port 7 done

 1290 07:40:57.578257  scan_bus: bus USB2 port 7 finished in 6 msecs

 1291 07:40:57.581852  USB2 port 9 scanning...

 1292 07:40:57.584742  scan_static_bus for USB2 port 9

 1293 07:40:57.588388  scan_static_bus for USB2 port 9 done

 1294 07:40:57.594918  scan_bus: bus USB2 port 9 finished in 6 msecs

 1295 07:40:57.595376  USB3 port 0 scanning...

 1296 07:40:57.598173  scan_static_bus for USB3 port 0

 1297 07:40:57.601708  scan_static_bus for USB3 port 0 done

 1298 07:40:57.608425  scan_bus: bus USB3 port 0 finished in 6 msecs

 1299 07:40:57.611761  USB3 port 1 scanning...

 1300 07:40:57.615083  scan_static_bus for USB3 port 1

 1301 07:40:57.618084  scan_static_bus for USB3 port 1 done

 1302 07:40:57.621513  scan_bus: bus USB3 port 1 finished in 6 msecs

 1303 07:40:57.624996  USB3 port 2 scanning...

 1304 07:40:57.628446  scan_static_bus for USB3 port 2

 1305 07:40:57.631653  scan_static_bus for USB3 port 2 done

 1306 07:40:57.634820  scan_bus: bus USB3 port 2 finished in 6 msecs

 1307 07:40:57.638382  USB3 port 3 scanning...

 1308 07:40:57.641591  scan_static_bus for USB3 port 3

 1309 07:40:57.644824  scan_static_bus for USB3 port 3 done

 1310 07:40:57.648245  scan_bus: bus USB3 port 3 finished in 6 msecs

 1311 07:40:57.655005  scan_static_bus for USB0 port 0 done

 1312 07:40:57.658343  scan_bus: bus USB0 port 0 finished in 203 msecs

 1313 07:40:57.661381  scan_static_bus for PCI: 00:14.0 done

 1314 07:40:57.668310  scan_bus: bus PCI: 00:14.0 finished in 219 msecs

 1315 07:40:57.668742  PCI: 00:14.3 scanning...

 1316 07:40:57.671278  scan_static_bus for PCI: 00:14.3

 1317 07:40:57.674813  GENERIC: 0.0 enabled

 1318 07:40:57.677970  scan_static_bus for PCI: 00:14.3 done

 1319 07:40:57.684655  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1320 07:40:57.685123  PCI: 00:15.0 scanning...

 1321 07:40:57.688108  scan_static_bus for PCI: 00:15.0

 1322 07:40:57.691209  I2C: 00:1a enabled

 1323 07:40:57.694500  scan_static_bus for PCI: 00:15.0 done

 1324 07:40:57.697865  scan_bus: bus PCI: 00:15.0 finished in 9 msecs

 1325 07:40:57.701772  PCI: 00:15.1 scanning...

 1326 07:40:57.704761  scan_static_bus for PCI: 00:15.1

 1327 07:40:57.708138  I2C: 00:50 enabled

 1328 07:40:57.711200  scan_static_bus for PCI: 00:15.1 done

 1329 07:40:57.714982  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1330 07:40:57.718124  PCI: 00:1c.0 scanning...

 1331 07:40:57.721533  do_pci_scan_bridge for PCI: 00:1c.0

 1332 07:40:57.724721  PCI: pci_scan_bus for bus 82

 1333 07:40:57.728195  PCI: 82:00.0 [10ec/0000] ops

 1334 07:40:57.731467  PCI: 82:00.0 [10ec/8168] enabled

 1335 07:40:57.734693  Enabling Common Clock Configuration

 1336 07:40:57.738236  L1 Sub-State supported from root port 28

 1337 07:40:57.741557  L1 Sub-State Support = 0xf

 1338 07:40:57.744895  CommonModeRestoreTime = 0x96

 1339 07:40:57.748420  Power On Value = 0xf, Power On Scale = 0x1

 1340 07:40:57.751492  ASPM: Enabled L1

 1341 07:40:57.755018  PCIe: Max_Payload_Size adjusted to 128

 1342 07:40:57.758134  PCI: 82:00.0: Enabled LTR

 1343 07:40:57.761497  PCI: 82:00.0: Programmed LTR max latencies

 1344 07:40:57.768298  scan_bus: bus PCI: 00:1c.0 finished in 43 msecs

 1345 07:40:57.768721  PCI: 00:1c.7 scanning...

 1346 07:40:57.771572  do_pci_scan_bridge for PCI: 00:1c.7

 1347 07:40:57.774772  PCI: pci_scan_bus for bus 83

 1348 07:40:57.778371  PCI: 83:00.0 [17a0/9755] enabled

 1349 07:40:57.781716  GENERIC: 0.0 enabled

 1350 07:40:57.784983  Enabling Common Clock Configuration

 1351 07:40:57.788409  L1 Sub-State supported from root port 28

 1352 07:40:57.791627  L1 Sub-State Support = 0xf

 1353 07:40:57.795201  CommonModeRestoreTime = 0xff

 1354 07:40:57.798309  Power On Value = 0x1f, Power On Scale = 0x2

 1355 07:40:57.801698  ASPM: Enabled L0s and L1

 1356 07:40:57.804908  PCIe: Max_Payload_Size adjusted to 128

 1357 07:40:57.808481  PCI: 83:00.0: Enabled LTR

 1358 07:40:57.811339  PCI: 83:00.0: Programmed LTR max latencies

 1359 07:40:57.818325  scan_bus: bus PCI: 00:1c.7 finished in 43 msecs

 1360 07:40:57.818753  PCI: 00:1d.0 scanning...

 1361 07:40:57.824759  do_pci_scan_bridge for PCI: 00:1d.0

 1362 07:40:57.825184  PCI: pci_scan_bus for bus 84

 1363 07:40:57.828311  PCI: 84:00.0 [1217/8760] enabled

 1364 07:40:57.831558  GENERIC: 0.0 enabled

 1365 07:40:57.834705  L1 Sub-State supported from root port 29

 1366 07:40:57.838313  L1 Sub-State Support = 0xa

 1367 07:40:57.841564  CommonModeRestoreTime = 0x78

 1368 07:40:57.844908  Power On Value = 0x16, Power On Scale = 0x0

 1369 07:40:57.848286  ASPM: Enabled L1

 1370 07:40:57.851498  PCIe: Max_Payload_Size adjusted to 128

 1371 07:40:57.855060  PCI: 84:00.0: Enabled LTR

 1372 07:40:57.858142  PCI: 84:00.0: Programmed LTR max latencies

 1373 07:40:57.865073  scan_bus: bus PCI: 00:1d.0 finished in 38 msecs

 1374 07:40:57.865498  PCI: 00:1e.3 scanning...

 1375 07:40:57.868238  scan_generic_bus for PCI: 00:1e.3

 1376 07:40:57.874751  scan_generic_bus for PCI: 00:1e.3 done

 1377 07:40:57.878518  scan_bus: bus PCI: 00:1e.3 finished in 7 msecs

 1378 07:40:57.881757  PCI: 00:1f.0 scanning...

 1379 07:40:57.884655  scan_static_bus for PCI: 00:1f.0

 1380 07:40:57.885006  PNP: 0c09.0 enabled

 1381 07:40:57.888382  PNP: 0c09.0 scanning...

 1382 07:40:57.891153  scan_static_bus for PNP: 0c09.0

 1383 07:40:57.894844  scan_static_bus for PNP: 0c09.0 done

 1384 07:40:57.902066  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1385 07:40:57.904530  scan_static_bus for PCI: 00:1f.0 done

 1386 07:40:57.908012  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1387 07:40:57.911350  PCI: 00:1f.2 scanning...

 1388 07:40:57.914881  scan_static_bus for PCI: 00:1f.2

 1389 07:40:57.918093  GENERIC: 0.0 enabled

 1390 07:40:57.918512  GENERIC: 0.0 scanning...

 1391 07:40:57.921206  scan_static_bus for GENERIC: 0.0

 1392 07:40:57.924272  GENERIC: 0.0 enabled

 1393 07:40:57.928290  GENERIC: 1.0 enabled

 1394 07:40:57.931039  scan_static_bus for GENERIC: 0.0 done

 1395 07:40:57.934789  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1396 07:40:57.937699  scan_static_bus for PCI: 00:1f.2 done

 1397 07:40:57.944434  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1398 07:40:57.947563  PCI: 00:1f.3 scanning...

 1399 07:40:57.950945  scan_static_bus for PCI: 00:1f.3

 1400 07:40:57.954414  scan_static_bus for PCI: 00:1f.3 done

 1401 07:40:57.957417  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1402 07:40:57.960933  PCI: 00:1f.4 scanning...

 1403 07:40:57.964296  scan_generic_bus for PCI: 00:1f.4

 1404 07:40:57.967474  scan_generic_bus for PCI: 00:1f.4 done

 1405 07:40:57.974248  scan_bus: bus PCI: 00:1f.4 finished in 7 msecs

 1406 07:40:57.974651  PCI: 00:1f.5 scanning...

 1407 07:40:57.977627  scan_generic_bus for PCI: 00:1f.5

 1408 07:40:57.984270  scan_generic_bus for PCI: 00:1f.5 done

 1409 07:40:57.987603  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1410 07:40:57.990774  scan_bus: bus DOMAIN: 0000 finished in 990 msecs

 1411 07:40:57.997854  scan_static_bus for Root Device done

 1412 07:40:58.000959  scan_bus: bus Root Device finished in 1009 msecs

 1413 07:40:58.001374  done

 1414 07:40:58.007504  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms

 1415 07:40:58.014560  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1416 07:40:58.021017  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1417 07:40:58.024234  SPI flash protection: WPSW=0 SRP0=1

 1418 07:40:58.027476  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1419 07:40:58.033957  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1420 07:40:58.037542  found VGA at PCI: 00:02.0

 1421 07:40:58.040931  Setting up VGA for PCI: 00:02.0

 1422 07:40:58.044176  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1423 07:40:58.051242  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1424 07:40:58.051723  Allocating resources...

 1425 07:40:58.054134  Reading resources...

 1426 07:40:58.057218  Root Device read_resources bus 0 link: 0

 1427 07:40:58.064126  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1428 07:40:58.067401  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1429 07:40:58.070806  DOMAIN: 0000 read_resources bus 0 link: 0

 1430 07:40:58.077538  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1431 07:40:58.084088  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1432 07:40:58.090423  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1433 07:40:58.097004  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1434 07:40:58.103732  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1435 07:40:58.110459  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1436 07:40:58.117362  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1437 07:40:58.123491  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1438 07:40:58.127126  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1439 07:40:58.136938  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1440 07:40:58.140214  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1441 07:40:58.147395  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1442 07:40:58.153553  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1443 07:40:58.160435  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1444 07:40:58.166902  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1445 07:40:58.173351  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1446 07:40:58.180229  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1447 07:40:58.186778  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1448 07:40:58.193738  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1449 07:40:58.197176  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1450 07:40:58.203358  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1451 07:40:58.207022  PCI: 00:04.0 read_resources bus 1 link: 0

 1452 07:40:58.213765  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1453 07:40:58.216869  PCI: 00:07.0 read_resources bus 1 link: 0

 1454 07:40:58.223702  PCI: 00:07.0 read_resources bus 1 link: 0 done

 1455 07:40:58.227136  PCI: 00:07.1 read_resources bus 44 link: 0

 1456 07:40:58.230774  PCI: 00:07.1 read_resources bus 44 link: 0 done

 1457 07:40:58.237168  PCI: 00:07.2 read_resources bus 87 link: 0

 1458 07:40:58.240666  PCI: 00:07.2 read_resources bus 87 link: 0 done

 1459 07:40:58.243842  PCI: 00:0d.0 read_resources bus 0 link: 0

 1460 07:40:58.250640  USB0 port 0 read_resources bus 0 link: 0

 1461 07:40:58.253800  USB0 port 0 read_resources bus 0 link: 0 done

 1462 07:40:58.257239  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1463 07:40:58.263816  PCI: 00:0d.2 read_resources bus 2 link: 0

 1464 07:40:58.267166  PCI: 00:0d.2 read_resources bus 2 link: 0 done

 1465 07:40:58.270858  PCI: 00:0d.3 read_resources bus 3 link: 0

 1466 07:40:58.277219  PCI: 00:0d.3 read_resources bus 3 link: 0 done

 1467 07:40:58.280656  PCI: 00:14.0 read_resources bus 0 link: 0

 1468 07:40:58.283467  USB0 port 0 read_resources bus 0 link: 0

 1469 07:40:58.290505  USB0 port 0 read_resources bus 0 link: 0 done

 1470 07:40:58.293964  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1471 07:40:58.297290  PCI: 00:14.3 read_resources bus 0 link: 0

 1472 07:40:58.303641  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1473 07:40:58.307105  PCI: 00:15.0 read_resources bus 0 link: 0

 1474 07:40:58.310336  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1475 07:40:58.317138  PCI: 00:15.1 read_resources bus 0 link: 0

 1476 07:40:58.320528  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1477 07:40:58.327022  PCI: 00:1c.0 read_resources bus 130 link: 0

 1478 07:40:58.330438  PCI: 00:1c.0 read_resources bus 130 link: 0 done

 1479 07:40:58.333899  PCI: 00:1c.7 read_resources bus 131 link: 0

 1480 07:40:58.340475  PCI: 00:1c.7 read_resources bus 131 link: 0 done

 1481 07:40:58.343537  PCI: 00:1d.0 read_resources bus 132 link: 0

 1482 07:40:58.350311  PCI: 00:1d.0 read_resources bus 132 link: 0 done

 1483 07:40:58.353570  PCI: 00:1f.0 read_resources bus 0 link: 0

 1484 07:40:58.360471  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1485 07:40:58.363637  PCI: 00:1f.2 read_resources bus 0 link: 0

 1486 07:40:58.367091  GENERIC: 0.0 read_resources bus 0 link: 0

 1487 07:40:58.370750  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1488 07:40:58.377268  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1489 07:40:58.380350  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1490 07:40:58.387238  Root Device read_resources bus 0 link: 0 done

 1491 07:40:58.390624  Done reading resources.

 1492 07:40:58.393855  Show resources in subtree (Root Device)...After reading.

 1493 07:40:58.400769   Root Device child on link 0 CPU_CLUSTER: 0

 1494 07:40:58.404026    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1495 07:40:58.404485     APIC: 00

 1496 07:40:58.407351     APIC: 14

 1497 07:40:58.407893     APIC: 16

 1498 07:40:58.408197     APIC: 10

 1499 07:40:58.410504     APIC: 12

 1500 07:40:58.413767    DOMAIN: 0000 child on link 0 GPIO: 0

 1501 07:40:58.423831    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1502 07:40:58.433880    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1503 07:40:58.434366     GPIO: 0

 1504 07:40:58.436928     PCI: 00:00.0

 1505 07:40:58.443930     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1506 07:40:58.453479     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1507 07:40:58.463721     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1508 07:40:58.473498     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1509 07:40:58.483350     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1510 07:40:58.490231     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1511 07:40:58.500432     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1512 07:40:58.510105     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1513 07:40:58.519943     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1514 07:40:58.530331     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1515 07:40:58.539996     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1516 07:40:58.547128     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1517 07:40:58.557117     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1518 07:40:58.566891     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1519 07:40:58.576597     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1520 07:40:58.586903     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1521 07:40:58.596535     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1522 07:40:58.606594     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1523 07:40:58.613491     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1524 07:40:58.623773     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1525 07:40:58.633501     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1526 07:40:58.643495     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1527 07:40:58.653325     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1528 07:40:58.663752     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1529 07:40:58.673541     PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1530 07:40:58.680416     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1531 07:40:58.690159     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1532 07:40:58.700026     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1533 07:40:58.703571     PCI: 00:02.0

 1534 07:40:58.713986     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1535 07:40:58.722865     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1536 07:40:58.729891     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1537 07:40:58.736069     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1538 07:40:58.746668     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1539 07:40:58.747150      GENERIC: 0.0

 1540 07:40:58.752865     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1541 07:40:58.759345     PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1542 07:40:58.770115     PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1543 07:40:58.779510     PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1544 07:40:58.782693      GENERIC: 0.0

 1545 07:40:58.783044      NONE

 1546 07:40:58.793097      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1547 07:40:58.803030      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1548 07:40:58.809373      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1549 07:40:58.813013     PCI: 00:07.1 child on link 0 GENERIC: 1.0

 1550 07:40:58.822757     PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1551 07:40:58.833107     PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1552 07:40:58.842838     PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1553 07:40:58.843300      GENERIC: 1.0

 1554 07:40:58.843598      NONE

 1555 07:40:58.852529      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1556 07:40:58.862670      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1557 07:40:58.872850      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1558 07:40:58.875729     PCI: 00:07.2 child on link 0 GENERIC: 0.0

 1559 07:40:58.885618     PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1560 07:40:58.895802     PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1561 07:40:58.902292     PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1562 07:40:58.905804      GENERIC: 0.0

 1563 07:40:58.906260      NONE

 1564 07:40:58.915636      NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10

 1565 07:40:58.925568      NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14

 1566 07:40:58.932218      NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18

 1567 07:40:58.935488     PCI: 00:08.0

 1568 07:40:58.935838     PCI: 00:0a.0

 1569 07:40:58.946018     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1570 07:40:58.949128     PCI: 00:0d.0 child on link 0 USB0 port 0

 1571 07:40:58.958727     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1572 07:40:58.965478      USB0 port 0 child on link 0 USB3 port 0

 1573 07:40:58.965923       USB3 port 0

 1574 07:40:58.968969       USB3 port 1

 1575 07:40:58.969324       USB3 port 2

 1576 07:40:58.972189       USB3 port 3

 1577 07:40:58.975380     PCI: 00:0d.2 child on link 0 GENERIC: 0.0

 1578 07:40:58.985248     PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10

 1579 07:40:58.995221     PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1580 07:40:58.998809      GENERIC: 0.0

 1581 07:40:59.002208     PCI: 00:0d.3 child on link 0 GENERIC: 0.0

 1582 07:40:59.012140     PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10

 1583 07:40:59.021963     PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1584 07:40:59.025135      GENERIC: 0.0

 1585 07:40:59.028553     PCI: 00:14.0 child on link 0 USB0 port 0

 1586 07:40:59.038717     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1587 07:40:59.042245      USB0 port 0 child on link 0 USB2 port 0

 1588 07:40:59.045312       USB2 port 0

 1589 07:40:59.045736       USB2 port 1

 1590 07:40:59.048726       USB2 port 2

 1591 07:40:59.051536       USB2 port 3

 1592 07:40:59.051890       USB2 port 4

 1593 07:40:59.054730       USB2 port 5

 1594 07:40:59.055073       USB2 port 6

 1595 07:40:59.058740       USB2 port 7

 1596 07:40:59.059193       USB2 port 8

 1597 07:40:59.061711       USB2 port 9

 1598 07:40:59.062058       USB3 port 0

 1599 07:40:59.065521       USB3 port 1

 1600 07:40:59.065972       USB3 port 2

 1601 07:40:59.068628       USB3 port 3

 1602 07:40:59.069086     PCI: 00:14.2

 1603 07:40:59.078309     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1604 07:40:59.088132     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1605 07:40:59.094683     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1606 07:40:59.105428     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1607 07:40:59.105886      GENERIC: 0.0

 1608 07:40:59.111523     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1609 07:40:59.121820     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1610 07:40:59.122280      I2C: 00:1a

 1611 07:40:59.125344     PCI: 00:15.1 child on link 0 I2C: 00:50

 1612 07:40:59.134640     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1613 07:40:59.138255      I2C: 00:50

 1614 07:40:59.138599     PCI: 00:16.0

 1615 07:40:59.148079     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1616 07:40:59.154983     PCI: 00:1c.0 child on link 0 PCI: 82:00.0

 1617 07:40:59.161398     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1618 07:40:59.171722     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1619 07:40:59.181412     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1620 07:40:59.181845      PCI: 82:00.0

 1621 07:40:59.191196      PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

 1622 07:40:59.201800      PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1623 07:40:59.211641      PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20

 1624 07:40:59.215104     PCI: 00:1c.7 child on link 0 GENERIC: 0.0

 1625 07:40:59.225303     PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1626 07:40:59.235228     PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1627 07:40:59.244751     PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1628 07:40:59.245264      GENERIC: 0.0

 1629 07:40:59.248066      PCI: 83:00.0

 1630 07:40:59.258148      PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1631 07:40:59.261829     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1632 07:40:59.267839     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1633 07:40:59.278188     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1634 07:40:59.288222     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1635 07:40:59.291320      GENERIC: 0.0

 1636 07:40:59.291733      PCI: 84:00.0

 1637 07:40:59.301570      PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1638 07:40:59.304498     PCI: 00:1e.0

 1639 07:40:59.314763     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1640 07:40:59.318245     PCI: 00:1e.3

 1641 07:40:59.328092     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1642 07:40:59.331350     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1643 07:40:59.341434     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1644 07:40:59.341971      PNP: 0c09.0

 1645 07:40:59.351106      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1646 07:40:59.354822     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1647 07:40:59.364832     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1648 07:40:59.374852     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1649 07:40:59.378093      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1650 07:40:59.381126       GENERIC: 0.0

 1651 07:40:59.381475       GENERIC: 1.0

 1652 07:40:59.385030     PCI: 00:1f.3

 1653 07:40:59.394800     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1654 07:40:59.404812     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1655 07:40:59.405259     PCI: 00:1f.4

 1656 07:40:59.414970     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1657 07:40:59.425043     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1658 07:40:59.425539     PCI: 00:1f.5

 1659 07:40:59.434882     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1660 07:40:59.441198  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1661 07:40:59.447830   PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1662 07:40:59.451603    NONE 18 *  [0x0 - 0x1fff] io

 1663 07:40:59.458025   PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1664 07:40:59.464441   PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1665 07:40:59.468015    NONE 10 *  [0x0 - 0xc1fffff] mem

 1666 07:40:59.474296   PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1667 07:40:59.481152   PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1668 07:40:59.484441    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1669 07:40:59.494639   PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1670 07:40:59.501231   PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff

 1671 07:40:59.501671    NONE 18 *  [0x0 - 0x1fff] io

 1672 07:40:59.507905   PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1673 07:40:59.514584   PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1674 07:40:59.518037    NONE 10 *  [0x0 - 0xc1fffff] mem

 1675 07:40:59.524628   PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1676 07:40:59.534463   PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1677 07:40:59.537633    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1678 07:40:59.544371   PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1679 07:40:59.551262   PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff

 1680 07:40:59.554562    NONE 18 *  [0x0 - 0x1fff] io

 1681 07:40:59.561321   PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done

 1682 07:40:59.567809   PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1683 07:40:59.571117    NONE 10 *  [0x0 - 0xc1fffff] mem

 1684 07:40:59.577940   PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done

 1685 07:40:59.584578   PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1686 07:40:59.587825    NONE 14 *  [0x0 - 0x1bffffff] prefmem

 1687 07:40:59.598107   PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done

 1688 07:40:59.604369   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1689 07:40:59.608000    PCI: 82:00.0 10 *  [0x0 - 0xff] io

 1690 07:40:59.615377   PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

 1691 07:40:59.621502   PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1692 07:40:59.624798    PCI: 82:00.0 20 *  [0x0 - 0x3fff] mem

 1693 07:40:59.628407    PCI: 82:00.0 18 *  [0x4000 - 0x4fff] mem

 1694 07:40:59.635009   PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1695 07:40:59.641331   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1696 07:40:59.651408   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1697 07:40:59.654579   PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff

 1698 07:40:59.661322   PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done

 1699 07:40:59.667916   PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1700 07:40:59.671304    PCI: 83:00.0 10 *  [0x0 - 0xfff] mem

 1701 07:40:59.677805   PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1702 07:40:59.688210   PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1703 07:40:59.694506   PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1704 07:40:59.701027   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1705 07:40:59.707730   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1706 07:40:59.711106   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1707 07:40:59.717624    PCI: 84:00.0 10 *  [0x0 - 0x3fff] mem

 1708 07:40:59.723913   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1709 07:40:59.730801   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1710 07:40:59.737388   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1711 07:40:59.747750  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1712 07:40:59.750753  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1713 07:40:59.760664   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1714 07:40:59.767314   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1715 07:40:59.774246   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1716 07:40:59.783811   update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1717 07:40:59.784241   DOMAIN: 0000: Resource ranges:

 1718 07:40:59.790526   * Base: 1000, Size: 800, Tag: 100

 1719 07:40:59.794015   * Base: 1900, Size: d6a0, Tag: 100

 1720 07:40:59.797261   * Base: efc0, Size: 1040, Tag: 100

 1721 07:40:59.800619    PCI: 00:07.0 1c *  [0x2000 - 0x3fff] limit: 3fff io

 1722 07:40:59.807301    PCI: 00:07.1 1c *  [0x4000 - 0x5fff] limit: 5fff io

 1723 07:40:59.813793    PCI: 00:07.2 1c *  [0x6000 - 0x7fff] limit: 7fff io

 1724 07:40:59.817302    PCI: 00:1c.0 1c *  [0x8000 - 0x8fff] limit: 8fff io

 1725 07:40:59.824080    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1726 07:40:59.830609  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1727 07:40:59.837112  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1728 07:40:59.844171   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1729 07:40:59.850503   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1730 07:40:59.860736   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1731 07:40:59.867343   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1732 07:40:59.873914   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1733 07:40:59.883721   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1734 07:40:59.890678   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1735 07:40:59.897026   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1736 07:40:59.907129   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1737 07:40:59.913992   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1738 07:40:59.920653   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1739 07:40:59.930304   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1740 07:40:59.936977   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1741 07:40:59.943907   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1742 07:40:59.953670   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1743 07:40:59.960441   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1744 07:40:59.966907   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1745 07:40:59.976841   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1746 07:40:59.983408   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1747 07:40:59.989974   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1748 07:40:59.999922   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1749 07:41:00.006803   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1750 07:41:00.013442   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1751 07:41:00.019933   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1752 07:41:00.029995   update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)

 1753 07:41:00.036189   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1754 07:41:00.046436   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1755 07:41:00.053084   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1756 07:41:00.059823   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1757 07:41:00.066493   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1758 07:41:00.069635   DOMAIN: 0000: Resource ranges:

 1759 07:41:00.076378   * Base: 80400000, Size: 3fc00000, Tag: 200

 1760 07:41:00.079670   * Base: d0000000, Size: 28000000, Tag: 200

 1761 07:41:00.082907   * Base: fa000000, Size: 1000000, Tag: 200

 1762 07:41:00.089508   * Base: fb001000, Size: 17ff000, Tag: 200

 1763 07:41:00.092875   * Base: fe800000, Size: 300000, Tag: 200

 1764 07:41:00.095888   * Base: feb80000, Size: 80000, Tag: 200

 1765 07:41:00.099566   * Base: fed00000, Size: 40000, Tag: 200

 1766 07:41:00.105856   * Base: fed70000, Size: 10000, Tag: 200

 1767 07:41:00.109536   * Base: fed88000, Size: 8000, Tag: 200

 1768 07:41:00.112640   * Base: fed93000, Size: d000, Tag: 200

 1769 07:41:00.116187   * Base: feda2000, Size: 1e000, Tag: 200

 1770 07:41:00.122820   * Base: fede0000, Size: 1220000, Tag: 200

 1771 07:41:00.126280   * Base: 17fc00000, Size: 7e80400000, Tag: 100200

 1772 07:41:00.132825    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1773 07:41:00.138816    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1774 07:41:00.146334    PCI: 00:07.0 20 *  [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem

 1775 07:41:00.152673    PCI: 00:07.1 20 *  [0xa0000000 - 0xac1fffff] limit: ac1fffff mem

 1776 07:41:00.159313    PCI: 00:07.2 20 *  [0xac200000 - 0xb83fffff] limit: b83fffff mem

 1777 07:41:00.166271    PCI: 00:1c.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1778 07:41:00.172609    PCI: 00:1c.7 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1779 07:41:00.179289    PCI: 00:1d.0 20 *  [0x80600000 - 0x806fffff] limit: 806fffff mem

 1780 07:41:00.186024    PCI: 00:1f.3 20 *  [0x80700000 - 0x807fffff] limit: 807fffff mem

 1781 07:41:00.192687    PCI: 00:0d.2 10 *  [0x80800000 - 0x8083ffff] limit: 8083ffff mem

 1782 07:41:00.198842    PCI: 00:0d.3 10 *  [0x80840000 - 0x8087ffff] limit: 8087ffff mem

 1783 07:41:00.205985    PCI: 00:04.0 10 *  [0x80880000 - 0x8089ffff] limit: 8089ffff mem

 1784 07:41:00.212453    PCI: 00:0d.0 10 *  [0x808a0000 - 0x808affff] limit: 808affff mem

 1785 07:41:00.219202    PCI: 00:14.0 10 *  [0x808b0000 - 0x808bffff] limit: 808bffff mem

 1786 07:41:00.225614    PCI: 00:0a.0 10 *  [0x808c0000 - 0x808c7fff] limit: 808c7fff mem

 1787 07:41:00.232306    PCI: 00:14.2 10 *  [0x808c8000 - 0x808cbfff] limit: 808cbfff mem

 1788 07:41:00.238565    PCI: 00:14.3 10 *  [0x808cc000 - 0x808cffff] limit: 808cffff mem

 1789 07:41:00.245557    PCI: 00:1f.3 10 *  [0x808d0000 - 0x808d3fff] limit: 808d3fff mem

 1790 07:41:00.252162    PCI: 00:0d.2 18 *  [0x808d4000 - 0x808d4fff] limit: 808d4fff mem

 1791 07:41:00.258931    PCI: 00:0d.3 18 *  [0x808d5000 - 0x808d5fff] limit: 808d5fff mem

 1792 07:41:00.265445    PCI: 00:14.2 18 *  [0x808d6000 - 0x808d6fff] limit: 808d6fff mem

 1793 07:41:00.271833    PCI: 00:15.0 10 *  [0x808d7000 - 0x808d7fff] limit: 808d7fff mem

 1794 07:41:00.278737    PCI: 00:15.1 10 *  [0x808d8000 - 0x808d8fff] limit: 808d8fff mem

 1795 07:41:00.285041    PCI: 00:16.0 10 *  [0x808d9000 - 0x808d9fff] limit: 808d9fff mem

 1796 07:41:00.291864    PCI: 00:1e.3 10 *  [0x808da000 - 0x808dafff] limit: 808dafff mem

 1797 07:41:00.298761    PCI: 00:1f.5 10 *  [0x808db000 - 0x808dbfff] limit: 808dbfff mem

 1798 07:41:00.305216    PCI: 00:1f.4 10 *  [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem

 1799 07:41:00.311973    PCI: 00:07.0 24 *  [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem

 1800 07:41:00.321931    PCI: 00:07.1 24 *  [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem

 1801 07:41:00.328579    PCI: 00:07.2 24 *  [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem

 1802 07:41:00.335169  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1803 07:41:00.342129  PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff

 1804 07:41:00.345172   PCI: 00:07.0: Resource ranges:

 1805 07:41:00.348436   * Base: 2000, Size: 2000, Tag: 100

 1806 07:41:00.355039    NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io

 1807 07:41:00.361756  PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done

 1808 07:41:00.368488  PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff

 1809 07:41:00.371273   PCI: 00:07.0: Resource ranges:

 1810 07:41:00.378339   * Base: 17fc00000, Size: 1c000000, Tag: 1200

 1811 07:41:00.384632    NONE 14 *  [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem

 1812 07:41:00.395027  PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done

 1813 07:41:00.401772  PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff

 1814 07:41:00.405128   PCI: 00:07.0: Resource ranges:

 1815 07:41:00.408260   * Base: 82000000, Size: c200000, Tag: 200

 1816 07:41:00.415016    NONE 10 *  [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem

 1817 07:41:00.424938  PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done

 1818 07:41:00.431173  PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff

 1819 07:41:00.434729   PCI: 00:07.1: Resource ranges:

 1820 07:41:00.438009   * Base: 4000, Size: 2000, Tag: 100

 1821 07:41:00.441498    NONE 18 *  [0x4000 - 0x5fff] limit: 5fff io

 1822 07:41:00.447855  PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done

 1823 07:41:00.457874  PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff

 1824 07:41:00.461254   PCI: 00:07.1: Resource ranges:

 1825 07:41:00.464646   * Base: 19bc00000, Size: 1c000000, Tag: 1200

 1826 07:41:00.470820    NONE 14 *  [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem

 1827 07:41:00.480993  PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done

 1828 07:41:00.491073  PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff

 1829 07:41:00.494490   PCI: 00:07.1: Resource ranges:

 1830 07:41:00.497660   * Base: a0000000, Size: c200000, Tag: 200

 1831 07:41:00.504515    NONE 10 *  [0xa0000000 - 0xac1fffff] limit: ac1fffff mem

 1832 07:41:00.511117  PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done

 1833 07:41:00.517567  PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff

 1834 07:41:00.521188   PCI: 00:07.2: Resource ranges:

 1835 07:41:00.524394   * Base: 6000, Size: 2000, Tag: 100

 1836 07:41:00.531071    NONE 18 *  [0x6000 - 0x7fff] limit: 7fff io

 1837 07:41:00.537756  PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done

 1838 07:41:00.547377  PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff

 1839 07:41:00.550911   PCI: 00:07.2: Resource ranges:

 1840 07:41:00.554460   * Base: 1b7c00000, Size: 1c000000, Tag: 1200

 1841 07:41:00.560702    NONE 14 *  [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem

 1842 07:41:00.570557  PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done

 1843 07:41:00.577552  PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff

 1844 07:41:00.580881   PCI: 00:07.2: Resource ranges:

 1845 07:41:00.584161   * Base: ac200000, Size: c200000, Tag: 200

 1846 07:41:00.590744    NONE 10 *  [0xac200000 - 0xb83fffff] limit: b83fffff mem

 1847 07:41:00.600787  PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done

 1848 07:41:00.607339  PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff

 1849 07:41:00.610605   PCI: 00:1c.0: Resource ranges:

 1850 07:41:00.614148   * Base: 8000, Size: 1000, Tag: 100

 1851 07:41:00.617162    PCI: 82:00.0 10 *  [0x8000 - 0x80ff] limit: 80ff io

 1852 07:41:00.627257  PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done

 1853 07:41:00.633776  PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1854 07:41:00.637231   PCI: 00:1c.0: Resource ranges:

 1855 07:41:00.639884   * Base: 80400000, Size: 100000, Tag: 200

 1856 07:41:00.647279    PCI: 82:00.0 20 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1857 07:41:00.653534    PCI: 82:00.0 18 *  [0x80404000 - 0x80404fff] limit: 80404fff mem

 1858 07:41:00.663600  PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1859 07:41:00.670404  PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff

 1860 07:41:00.673553   PCI: 00:1c.7: Resource ranges:

 1861 07:41:00.680086   * Base: 80500000, Size: 100000, Tag: 200

 1862 07:41:00.686552    PCI: 83:00.0 10 *  [0x80500000 - 0x80500fff] limit: 80500fff mem

 1863 07:41:00.693466  PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done

 1864 07:41:00.703556  PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff

 1865 07:41:00.706743   PCI: 00:1d.0: Resource ranges:

 1866 07:41:00.710102   * Base: 80600000, Size: 100000, Tag: 200

 1867 07:41:00.716790    PCI: 84:00.0 10 *  [0x80600000 - 0x80603fff] limit: 80603fff mem

 1868 07:41:00.723579  PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done

 1869 07:41:00.729966  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1870 07:41:00.736450  Root Device assign_resources, bus 0 link: 0

 1871 07:41:00.739702  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1872 07:41:00.750068  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1873 07:41:00.756483  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1874 07:41:00.763237  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1875 07:41:00.772757  PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64

 1876 07:41:00.776364  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1877 07:41:00.783022  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1878 07:41:00.789880  PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io

 1879 07:41:00.799589  PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem

 1880 07:41:00.806324  PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem

 1881 07:41:00.813145  PCI: 00:07.0 assign_resources, bus 1 link: 0

 1882 07:41:00.816131  PCI: 00:07.0 assign_resources, bus 1 link: 0 done

 1883 07:41:00.826259  PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io

 1884 07:41:00.836165  PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem

 1885 07:41:00.842667  PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem

 1886 07:41:00.845948  PCI: 00:07.1 assign_resources, bus 44 link: 0

 1887 07:41:00.853046  PCI: 00:07.1 assign_resources, bus 44 link: 0 done

 1888 07:41:00.862721  PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io

 1889 07:41:00.869234  PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem

 1890 07:41:00.879205  PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem

 1891 07:41:00.882684  PCI: 00:07.2 assign_resources, bus 87 link: 0

 1892 07:41:00.889130  PCI: 00:07.2 assign_resources, bus 87 link: 0 done

 1893 07:41:00.896055  PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64

 1894 07:41:00.902373  PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64

 1895 07:41:00.909013  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1896 07:41:00.912416  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1897 07:41:00.922531  PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64

 1898 07:41:00.929136  PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64

 1899 07:41:00.935601  PCI: 00:0d.2 assign_resources, bus 2 link: 0

 1900 07:41:00.939174  PCI: 00:0d.2 assign_resources, bus 2 link: 0 done

 1901 07:41:00.945638  PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64

 1902 07:41:00.955416  PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64

 1903 07:41:00.958928  PCI: 00:0d.3 assign_resources, bus 3 link: 0

 1904 07:41:00.965374  PCI: 00:0d.3 assign_resources, bus 3 link: 0 done

 1905 07:41:00.971863  PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64

 1906 07:41:00.975073  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1907 07:41:00.982087  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1908 07:41:00.988602  PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64

 1909 07:41:00.998625  PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64

 1910 07:41:01.005060  PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64

 1911 07:41:01.012045  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1912 07:41:01.015219  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1913 07:41:01.025362  PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64

 1914 07:41:01.028559  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1915 07:41:01.031914  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1916 07:41:01.041749  PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64

 1917 07:41:01.044938  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1918 07:41:01.051609  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1919 07:41:01.058345  PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64

 1920 07:41:01.068358  PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io

 1921 07:41:01.078293  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem

 1922 07:41:01.085210  PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem

 1923 07:41:01.091546  PCI: 00:1c.0 assign_resources, bus 130 link: 0

 1924 07:41:01.098325  PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io

 1925 07:41:01.105099  PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64

 1926 07:41:01.114866  PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1927 07:41:01.118262  PCI: 00:1c.0 assign_resources, bus 130 link: 0 done

 1928 07:41:01.128119  PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io

 1929 07:41:01.138164  PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem

 1930 07:41:01.144758  PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem

 1931 07:41:01.151524  PCI: 00:1c.7 assign_resources, bus 131 link: 0

 1932 07:41:01.157962  PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem

 1933 07:41:01.164820  PCI: 00:1c.7 assign_resources, bus 131 link: 0 done

 1934 07:41:01.171335  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io

 1935 07:41:01.181330  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem

 1936 07:41:01.191620  PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem

 1937 07:41:01.194612  PCI: 00:1d.0 assign_resources, bus 132 link: 0

 1938 07:41:01.204705  PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64

 1939 07:41:01.208123  PCI: 00:1d.0 assign_resources, bus 132 link: 0 done

 1940 07:41:01.218114  PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64

 1941 07:41:01.221607  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1942 07:41:01.224638  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1943 07:41:01.231410  LPC: Trying to open IO window from 800 size 1ff

 1944 07:41:01.237953  PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64

 1945 07:41:01.247826  PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64

 1946 07:41:01.254719  PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64

 1947 07:41:01.261215  PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem

 1948 07:41:01.267892  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1949 07:41:01.270955  Root Device assign_resources, bus 0 link: 0 done

 1950 07:41:01.274695  Done setting resources.

 1951 07:41:01.280846  Show resources in subtree (Root Device)...After assigning values.

 1952 07:41:01.284351   Root Device child on link 0 CPU_CLUSTER: 0

 1953 07:41:01.291058    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1954 07:41:01.291579     APIC: 00

 1955 07:41:01.291878     APIC: 14

 1956 07:41:01.294048     APIC: 16

 1957 07:41:01.294390     APIC: 10

 1958 07:41:01.297368     APIC: 12

 1959 07:41:01.301282    DOMAIN: 0000 child on link 0 GPIO: 0

 1960 07:41:01.311230    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1961 07:41:01.320946    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1962 07:41:01.321399     GPIO: 0

 1963 07:41:01.321657     PCI: 00:00.0

 1964 07:41:01.330922     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1965 07:41:01.340301     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1966 07:41:01.350975     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1967 07:41:01.360958     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1968 07:41:01.370676     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1969 07:41:01.377188     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1970 07:41:01.387185     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1971 07:41:01.397178     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1972 07:41:01.406722     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1973 07:41:01.417147     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1974 07:41:01.427029     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1975 07:41:01.436778     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1976 07:41:01.443396     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1977 07:41:01.453331     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1978 07:41:01.463331     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1979 07:41:01.473383     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1980 07:41:01.483224     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1981 07:41:01.493402     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1982 07:41:01.503101     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1983 07:41:01.513282     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1984 07:41:01.519760     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1985 07:41:01.529953     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1986 07:41:01.539600     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1987 07:41:01.549739     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1988 07:41:01.559892     PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1989 07:41:01.569734     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1990 07:41:01.579364     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1991 07:41:01.586288     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1992 07:41:01.589401     PCI: 00:02.0

 1993 07:41:01.599228     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1994 07:41:01.609592     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1995 07:41:01.619158     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1996 07:41:01.625969     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1997 07:41:01.635907     PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10

 1998 07:41:01.636384      GENERIC: 0.0

 1999 07:41:01.642496     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 2000 07:41:01.649042     PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c

 2001 07:41:01.662813     PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24

 2002 07:41:01.672434     PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20

 2003 07:41:01.672925      GENERIC: 0.0

 2004 07:41:01.675780      NONE

 2005 07:41:01.685873      NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10

 2006 07:41:01.695792      NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14

 2007 07:41:01.701968      NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18

 2008 07:41:01.708957     PCI: 00:07.1 child on link 0 GENERIC: 1.0

 2009 07:41:01.718703     PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c

 2010 07:41:01.729100     PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24

 2011 07:41:01.738933     PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20

 2012 07:41:01.741537      GENERIC: 1.0

 2013 07:41:01.741861      NONE

 2014 07:41:01.752066      NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10

 2015 07:41:01.761964      NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14

 2016 07:41:01.771986      NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18

 2017 07:41:01.775200     PCI: 00:07.2 child on link 0 GENERIC: 0.0

 2018 07:41:01.785326     PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c

 2019 07:41:01.795068     PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24

 2020 07:41:01.808236     PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20

 2021 07:41:01.808706      GENERIC: 0.0

 2022 07:41:01.808985      NONE

 2023 07:41:01.818248      NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10

 2024 07:41:01.831314      NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14

 2025 07:41:01.838088      NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18

 2026 07:41:01.841010     PCI: 00:08.0

 2027 07:41:01.841331     PCI: 00:0a.0

 2028 07:41:01.851359     PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10

 2029 07:41:01.857656     PCI: 00:0d.0 child on link 0 USB0 port 0

 2030 07:41:01.868067     PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10

 2031 07:41:01.871292      USB0 port 0 child on link 0 USB3 port 0

 2032 07:41:01.874732       USB3 port 0

 2033 07:41:01.875307       USB3 port 1

 2034 07:41:01.878279       USB3 port 2

 2035 07:41:01.878815       USB3 port 3

 2036 07:41:01.884691     PCI: 00:0d.2 child on link 0 GENERIC: 0.0

 2037 07:41:01.894759     PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10

 2038 07:41:01.904746     PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18

 2039 07:41:01.905207      GENERIC: 0.0

 2040 07:41:01.911152     PCI: 00:0d.3 child on link 0 GENERIC: 0.0

 2041 07:41:01.921118     PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10

 2042 07:41:01.931104     PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18

 2043 07:41:01.934391      GENERIC: 0.0

 2044 07:41:01.937751     PCI: 00:14.0 child on link 0 USB0 port 0

 2045 07:41:01.947541     PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10

 2046 07:41:01.951192      USB0 port 0 child on link 0 USB2 port 0

 2047 07:41:01.954144       USB2 port 0

 2048 07:41:01.954594       USB2 port 1

 2049 07:41:01.957458       USB2 port 2

 2050 07:41:01.957804       USB2 port 3

 2051 07:41:01.960873       USB2 port 4

 2052 07:41:01.964321       USB2 port 5

 2053 07:41:01.964777       USB2 port 6

 2054 07:41:01.967322       USB2 port 7

 2055 07:41:01.967814       USB2 port 8

 2056 07:41:01.970646       USB2 port 9

 2057 07:41:01.971101       USB3 port 0

 2058 07:41:01.974016       USB3 port 1

 2059 07:41:01.974470       USB3 port 2

 2060 07:41:01.977359       USB3 port 3

 2061 07:41:01.977849     PCI: 00:14.2

 2062 07:41:01.987379     PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10

 2063 07:41:02.000583     PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18

 2064 07:41:02.004574     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 2065 07:41:02.014188     PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10

 2066 07:41:02.017382      GENERIC: 0.0

 2067 07:41:02.020462     PCI: 00:15.0 child on link 0 I2C: 00:1a

 2068 07:41:02.030682     PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10

 2069 07:41:02.031212      I2C: 00:1a

 2070 07:41:02.036829     PCI: 00:15.1 child on link 0 I2C: 00:50

 2071 07:41:02.047243     PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10

 2072 07:41:02.047710      I2C: 00:50

 2073 07:41:02.051319     PCI: 00:16.0

 2074 07:41:02.059160     PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10

 2075 07:41:02.066975     PCI: 00:1c.0 child on link 0 PCI: 82:00.0

 2076 07:41:02.074387     PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c

 2077 07:41:02.086108     PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2078 07:41:02.097413     PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 2079 07:41:02.098003      PCI: 82:00.0

 2080 07:41:02.107292      PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10

 2081 07:41:02.117045      PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18

 2082 07:41:02.127305      PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20

 2083 07:41:02.133613     PCI: 00:1c.7 child on link 0 GENERIC: 0.0

 2084 07:41:02.143905     PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 2085 07:41:02.153641     PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2086 07:41:02.163619     PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20

 2087 07:41:02.166944      GENERIC: 0.0

 2088 07:41:02.167451      PCI: 83:00.0

 2089 07:41:02.176738      PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10

 2090 07:41:02.183336     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 2091 07:41:02.193479     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 2092 07:41:02.203657     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 2093 07:41:02.213698     PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20

 2094 07:41:02.216762      GENERIC: 0.0

 2095 07:41:02.217228      PCI: 84:00.0

 2096 07:41:02.226876      PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10

 2097 07:41:02.230548     PCI: 00:1e.0

 2098 07:41:02.239697     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 2099 07:41:02.243036     PCI: 00:1e.3

 2100 07:41:02.253662     PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10

 2101 07:41:02.256835     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 2102 07:41:02.266380     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 2103 07:41:02.266809      PNP: 0c09.0

 2104 07:41:02.276505      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 2105 07:41:02.279717     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 2106 07:41:02.289640     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 2107 07:41:02.300076     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 2108 07:41:02.303179      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 2109 07:41:02.306498       GENERIC: 0.0

 2110 07:41:02.306966       GENERIC: 1.0

 2111 07:41:02.309859     PCI: 00:1f.3

 2112 07:41:02.319759     PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10

 2113 07:41:02.329688     PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20

 2114 07:41:02.333185     PCI: 00:1f.4

 2115 07:41:02.342669     PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10

 2116 07:41:02.352911     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 2117 07:41:02.353378     PCI: 00:1f.5

 2118 07:41:02.363144     PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10

 2119 07:41:02.366280  Done allocating resources.

 2120 07:41:02.373144  BS: BS_DEV_RESOURCES run times (exec / console): 4 / 4329 ms

 2121 07:41:02.376497  coreboot skipped calling FSP notify phase: 00000020.

 2122 07:41:02.382955  fw_config match found: AUDIO=NAU88L25B_I2S

 2123 07:41:02.385964  BT offload enabled over I2S with NAU88L25B

 2124 07:41:02.392828  BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms

 2125 07:41:02.395980  Enabling resources...

 2126 07:41:02.399619  PCI: 00:00.0 subsystem <- 8086/4619

 2127 07:41:02.402794  PCI: 00:00.0 cmd <- 06

 2128 07:41:02.406030  PCI: 00:02.0 subsystem <- 8086/46b3

 2129 07:41:02.406472  PCI: 00:02.0 cmd <- 03

 2130 07:41:02.409403  PCI: 00:04.0 subsystem <- 8086/461d

 2131 07:41:02.412782  PCI: 00:04.0 cmd <- 02

 2132 07:41:02.416226  PCI: 00:07.0 bridge ctrl <- 0013

 2133 07:41:02.419239  PCI: 00:07.0 cmd <- 07

 2134 07:41:02.422755  PCI: 00:07.1 bridge ctrl <- 0013

 2135 07:41:02.426421  PCI: 00:07.1 cmd <- 07

 2136 07:41:02.429645  PCI: 00:07.2 bridge ctrl <- 0013

 2137 07:41:02.430102  PCI: 00:07.2 cmd <- 07

 2138 07:41:02.432748  PCI: 00:0a.0 subsystem <- 8086/467d

 2139 07:41:02.436128  PCI: 00:0a.0 cmd <- 02

 2140 07:41:02.439410  PCI: 00:0d.0 subsystem <- 8086/461e

 2141 07:41:02.442220  PCI: 00:0d.0 cmd <- 02

 2142 07:41:02.445973  PCI: 00:0d.2 subsystem <- 8086/463e

 2143 07:41:02.449406  PCI: 00:0d.2 cmd <- 02

 2144 07:41:02.452864  PCI: 00:0d.3 subsystem <- 8086/466d

 2145 07:41:02.453333  PCI: 00:0d.3 cmd <- 02

 2146 07:41:02.455862  PCI: 00:14.0 subsystem <- 8086/51ed

 2147 07:41:02.459504  PCI: 00:14.0 cmd <- 02

 2148 07:41:02.462613  PCI: 00:14.2 subsystem <- 8086/51ef

 2149 07:41:02.465977  PCI: 00:14.2 cmd <- 02

 2150 07:41:02.469498  PCI: 00:14.3 subsystem <- 8086/51f0

 2151 07:41:02.472623  PCI: 00:14.3 cmd <- 02

 2152 07:41:02.476053  PCI: 00:15.0 subsystem <- 8086/51e8

 2153 07:41:02.479122  PCI: 00:15.0 cmd <- 02

 2154 07:41:02.482658  PCI: 00:15.1 subsystem <- 8086/51e9

 2155 07:41:02.483144  PCI: 00:15.1 cmd <- 06

 2156 07:41:02.489094  PCI: 00:16.0 subsystem <- 8086/51e0

 2157 07:41:02.489541  PCI: 00:16.0 cmd <- 02

 2158 07:41:02.492250  PCI: 00:1c.0 bridge ctrl <- 0013

 2159 07:41:02.495310  PCI: 00:1c.0 subsystem <- 8086/51be

 2160 07:41:02.498672  PCI: 00:1c.0 cmd <- 07

 2161 07:41:02.502111  PCI: 00:1c.7 bridge ctrl <- 0013

 2162 07:41:02.505517  PCI: 00:1c.7 subsystem <- 8086/51bf

 2163 07:41:02.508772  PCI: 00:1c.7 cmd <- 06

 2164 07:41:02.512230  PCI: 00:1d.0 bridge ctrl <- 0013

 2165 07:41:02.515237  PCI: 00:1d.0 subsystem <- 8086/51b3

 2166 07:41:02.518986  PCI: 00:1d.0 cmd <- 06

 2167 07:41:02.522240  PCI: 00:1e.0 subsystem <- 8086/51a8

 2168 07:41:02.522586  PCI: 00:1e.0 cmd <- 06

 2169 07:41:02.528907  PCI: 00:1e.3 subsystem <- 8086/51ab

 2170 07:41:02.529311  PCI: 00:1e.3 cmd <- 02

 2171 07:41:02.532181  PCI: 00:1f.0 subsystem <- 8086/5182

 2172 07:41:02.535257  PCI: 00:1f.0 cmd <- 407

 2173 07:41:02.538545  PCI: 00:1f.3 subsystem <- 8086/51c8

 2174 07:41:02.542017  PCI: 00:1f.3 cmd <- 02

 2175 07:41:02.545265  PCI: 00:1f.4 subsystem <- 8086/51a3

 2176 07:41:02.548602  PCI: 00:1f.4 cmd <- 03

 2177 07:41:02.551760  PCI: 00:1f.5 subsystem <- 8086/51a4

 2178 07:41:02.551834  PCI: 00:1f.5 cmd <- 406

 2179 07:41:02.555173  PCI: 82:00.0 cmd <- 03

 2180 07:41:02.558497  PCI: 83:00.0 cmd <- 06

 2181 07:41:02.561741  PCI: 84:00.0 cmd <- 02

 2182 07:41:02.561816  done.

 2183 07:41:02.565198  BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms

 2184 07:41:02.568694  ME: Version: Unavailable

 2185 07:41:02.575091  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 2186 07:41:02.578273  Initializing devices...

 2187 07:41:02.578346  Root Device init

 2188 07:41:02.581671  mainboard: EC init

 2189 07:41:02.584944  Chrome EC: Set SMI mask to 0x0000000000000000

 2190 07:41:02.588520  Chrome EC: UHEPI supported

 2191 07:41:02.594855  Chrome EC: clear events_b mask to 0x0000000000000000

 2192 07:41:02.601661  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004

 2193 07:41:02.604752  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004

 2194 07:41:02.611508  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004

 2195 07:41:02.618292  Chrome EC: Set WAKE mask to 0x0000000000000000

 2196 07:41:02.621472  Root Device init finished in 38 msecs

 2197 07:41:02.621547  PCI: 00:00.0 init

 2198 07:41:02.624757  CPU TDP = 15 Watts

 2199 07:41:02.628281  CPU PL1 = 55 Watts

 2200 07:41:02.628353  CPU PL2 = 55 Watts

 2201 07:41:02.631609  CPU PsysPL2 = 90 Watts

 2202 07:41:02.634667  CPU PL4 = 123 Watts

 2203 07:41:02.638203  PCI: 00:00.0 init finished in 10 msecs

 2204 07:41:02.638276  PCI: 00:02.0 init

 2205 07:41:02.641417  GMA: Found VBT in CBFS

 2206 07:41:02.644950  GMA: Found valid VBT in CBFS

 2207 07:41:02.648172  Graphics hand-off block not found

 2208 07:41:02.651296  PCI: 00:02.0 init finished in 8 msecs

 2209 07:41:02.654806  PCI: 00:0a.0 init

 2210 07:41:02.658248  PCI: 00:0a.0 init finished in 0 msecs

 2211 07:41:02.658322  PCI: 00:14.0 init

 2212 07:41:02.661508  PCI: 00:14.0 init finished in 0 msecs

 2213 07:41:02.664581  PCI: 00:14.2 init

 2214 07:41:02.668175  PCI: 00:14.2 init finished in 0 msecs

 2215 07:41:02.671404  PCI: 00:15.0 init

 2216 07:41:02.674758  I2C bus 0 version 0x3230302a

 2217 07:41:02.678103  DW I2C bus 0 at 0x808d7000 (400 KHz)

 2218 07:41:02.681276  PCI: 00:15.0 init finished in 6 msecs

 2219 07:41:02.681349  PCI: 00:15.1 init

 2220 07:41:02.684693  I2C bus 1 version 0x3230302a

 2221 07:41:02.688076  DW I2C bus 1 at 0x808d8000 (400 KHz)

 2222 07:41:02.694847  PCI: 00:15.1 init finished in 6 msecs

 2223 07:41:02.694927  PCI: 00:16.0 init

 2224 07:41:02.698075  PCI: 00:16.0 init finished in 0 msecs

 2225 07:41:02.701597  PCI: 00:1c.0 init

 2226 07:41:02.704759  Initializing PCH PCIe bridge.

 2227 07:41:02.707915  PCI: 00:1c.0 init finished in 3 msecs

 2228 07:41:02.707969  PCI: 00:1c.7 init

 2229 07:41:02.711294  Initializing PCH PCIe bridge.

 2230 07:41:02.718106  PCI: 00:1c.7 init finished in 3 msecs

 2231 07:41:02.718164  PCI: 00:1d.0 init

 2232 07:41:02.721211  Initializing PCH PCIe bridge.

 2233 07:41:02.724731  PCI: 00:1d.0 init finished in 3 msecs

 2234 07:41:02.727704  PCI: 00:1f.0 init

 2235 07:41:02.731107  IOAPIC: Initializing IOAPIC at 0xfec00000

 2236 07:41:02.734641  IOAPIC: ID = 0x02

 2237 07:41:02.734706  IOAPIC: Dumping registers

 2238 07:41:02.738123    reg 0x0000: 0x02000000

 2239 07:41:02.741541    reg 0x0001: 0x00770020

 2240 07:41:02.744841    reg 0x0002: 0x00000000

 2241 07:41:02.744900  IOAPIC: 120 interrupts

 2242 07:41:02.751233  IOAPIC: Clearing IOAPIC at 0xfec00000

 2243 07:41:02.754510  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2244 07:41:02.758079  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2245 07:41:02.764723  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2246 07:41:02.767701  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2247 07:41:02.774621  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2248 07:41:02.777959  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2249 07:41:02.784337  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2250 07:41:02.787834  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2251 07:41:02.790937  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2252 07:41:02.797634  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2253 07:41:02.801025  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2254 07:41:02.807712  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2255 07:41:02.810960  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2256 07:41:02.817689  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2257 07:41:02.821148  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2258 07:41:02.827624  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2259 07:41:02.830904  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2260 07:41:02.834131  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2261 07:41:02.841066  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2262 07:41:02.844344  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2263 07:41:02.850845  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2264 07:41:02.854162  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2265 07:41:02.860800  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2266 07:41:02.864158  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2267 07:41:02.870949  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2268 07:41:02.874211  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2269 07:41:02.877515  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2270 07:41:02.884175  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2271 07:41:02.887264  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2272 07:41:02.894216  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2273 07:41:02.897559  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2274 07:41:02.904003  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2275 07:41:02.907364  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2276 07:41:02.914172  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2277 07:41:02.917565  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2278 07:41:02.920867  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2279 07:41:02.927442  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2280 07:41:02.930736  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2281 07:41:02.937299  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2282 07:41:02.940575  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2283 07:41:02.947542  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2284 07:41:02.950498  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2285 07:41:02.954195  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2286 07:41:02.960682  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2287 07:41:02.963960  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2288 07:41:02.970665  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2289 07:41:02.973962  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2290 07:41:02.980445  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2291 07:41:02.983893  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2292 07:41:02.990548  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2293 07:41:02.993937  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2294 07:41:02.997398  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2295 07:41:03.003815  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2296 07:41:03.007005  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2297 07:41:03.014137  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2298 07:41:03.017228  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2299 07:41:03.023914  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2300 07:41:03.027117  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2301 07:41:03.034053  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2302 07:41:03.037153  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2303 07:41:03.040428  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2304 07:41:03.046859  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2305 07:41:03.050630  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2306 07:41:03.057205  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2307 07:41:03.060186  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2308 07:41:03.066883  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2309 07:41:03.070106  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2310 07:41:03.077087  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2311 07:41:03.080265  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2312 07:41:03.083594  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2313 07:41:03.090196  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2314 07:41:03.093385  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2315 07:41:03.100124  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2316 07:41:03.103126  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2317 07:41:03.109920  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2318 07:41:03.113355  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2319 07:41:03.119972  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2320 07:41:03.123258  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2321 07:41:03.126560  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2322 07:41:03.133211  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2323 07:41:03.136521  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2324 07:41:03.142850  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2325 07:41:03.146356  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2326 07:41:03.152922  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2327 07:41:03.156462  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2328 07:41:03.163038  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2329 07:41:03.166237  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2330 07:41:03.169504  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2331 07:41:03.176273  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2332 07:41:03.179439  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2333 07:41:03.186091  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2334 07:41:03.189450  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2335 07:41:03.196250  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2336 07:41:03.199532  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2337 07:41:03.202920  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2338 07:41:03.209665  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2339 07:41:03.212559  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2340 07:41:03.219290  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2341 07:41:03.222805  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2342 07:41:03.229200  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2343 07:41:03.232604  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2344 07:41:03.239127  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2345 07:41:03.242426  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2346 07:41:03.245913  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2347 07:41:03.252473  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2348 07:41:03.255863  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2349 07:41:03.262190  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2350 07:41:03.265609  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2351 07:41:03.272199  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2352 07:41:03.275686  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2353 07:41:03.282343  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2354 07:41:03.285649  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2355 07:41:03.289021  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2356 07:41:03.295466  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2357 07:41:03.298917  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2358 07:41:03.305322  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2359 07:41:03.308672  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2360 07:41:03.315295  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2361 07:41:03.318745  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2362 07:41:03.325443  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2363 07:41:03.328648  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2364 07:41:03.332371  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2365 07:41:03.338854  PCI: 00:1f.0 init finished in 607 msecs

 2366 07:41:03.338931  PCI: 00:1f.2 init

 2367 07:41:03.342209  apm_control: Disabling ACPI.

 2368 07:41:03.346285  APMC done.

 2369 07:41:03.349426  PCI: 00:1f.2 init finished in 6 msecs

 2370 07:41:03.352918  PCI: 00:1f.3 init

 2371 07:41:03.356141  PCI: 00:1f.3 init finished in 0 msecs

 2372 07:41:03.356217  PCI: 00:1f.4 init

 2373 07:41:03.359437  PCI: 00:1f.4 init finished in 0 msecs

 2374 07:41:03.362791  PCI: 82:00.0 init

 2375 07:41:03.366190  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 2376 07:41:03.369661  Located 'ethernet_mac0' in VPD

 2377 07:41:03.373069  r8168: Resetting NIC...done

 2378 07:41:03.376654  r8168: Programming MAC Address...done

 2379 07:41:03.379596  r8168: Customized LED 0x482

 2380 07:41:03.383066  r8168: read back LED setting as 0x482

 2381 07:41:03.389716  PCI: 82:00.0 init finished in 21 msecs

 2382 07:41:03.389789  PCI: 83:00.0 init

 2383 07:41:03.393072  PCI: 83:00.0 init finished in 0 msecs

 2384 07:41:03.396333  PCI: 84:00.0 init

 2385 07:41:03.399718  PCI: 84:00.0 init finished in 0 msecs

 2386 07:41:03.403033  PNP: 0c09.0 init

 2387 07:41:03.406370  Google Chrome EC uptime: 13.349 seconds

 2388 07:41:03.409903  Google Chrome AP resets since EC boot: 1

 2389 07:41:03.412989  Google Chrome most recent AP reset causes:

 2390 07:41:03.419695  	0.311: 32775 shutdown: entering G3

 2391 07:41:03.422919  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2392 07:41:03.429749  PNP: 0c09.0 init finished in 23 msecs

 2393 07:41:03.429823  GENERIC: 0.0 init

 2394 07:41:03.432918  GENERIC: 0.0 init finished in 0 msecs

 2395 07:41:03.436557  GENERIC: 1.0 init

 2396 07:41:03.439421  GENERIC: 1.0 init finished in 0 msecs

 2397 07:41:03.443045  Devices initialized

 2398 07:41:03.446111  Show all devs... After init.

 2399 07:41:03.446215  Root Device: enabled 1

 2400 07:41:03.449723  CPU_CLUSTER: 0: enabled 1

 2401 07:41:03.452693  DOMAIN: 0000: enabled 1

 2402 07:41:03.452769  GPIO: 0: enabled 1

 2403 07:41:03.456044  PCI: 00:00.0: enabled 1

 2404 07:41:03.459443  PCI: 00:01.0: enabled 0

 2405 07:41:03.462851  PCI: 00:01.1: enabled 0

 2406 07:41:03.462926  PCI: 00:02.0: enabled 1

 2407 07:41:03.466121  PCI: 00:04.0: enabled 1

 2408 07:41:03.469356  PCI: 00:05.0: enabled 0

 2409 07:41:03.472793  PCI: 00:06.0: enabled 0

 2410 07:41:03.472873  PCI: 00:06.2: enabled 0

 2411 07:41:03.476283  PCI: 00:07.0: enabled 1

 2412 07:41:03.479434  PCI: 00:07.1: enabled 1

 2413 07:41:03.479515  PCI: 00:07.2: enabled 1

 2414 07:41:03.482664  PCI: 00:07.3: enabled 0

 2415 07:41:03.486128  PCI: 00:08.0: enabled 0

 2416 07:41:03.489240  PCI: 00:09.0: enabled 0

 2417 07:41:03.489316  PCI: 00:0a.0: enabled 1

 2418 07:41:03.492837  PCI: 00:0d.0: enabled 1

 2419 07:41:03.495694  PCI: 00:0d.1: enabled 0

 2420 07:41:03.499320  PCI: 00:0d.2: enabled 1

 2421 07:41:03.499405  PCI: 00:0d.3: enabled 1

 2422 07:41:03.502527  PCI: 00:0e.0: enabled 0

 2423 07:41:03.506104  PCI: 00:10.0: enabled 0

 2424 07:41:03.509278  PCI: 00:10.1: enabled 0

 2425 07:41:03.509342  PCI: 00:10.6: enabled 0

 2426 07:41:03.512762  PCI: 00:10.7: enabled 0

 2427 07:41:03.515679  PCI: 00:12.0: enabled 0

 2428 07:41:03.515739  PCI: 00:12.6: enabled 0

 2429 07:41:03.519269  PCI: 00:12.7: enabled 0

 2430 07:41:03.522365  PCI: 00:13.0: enabled 0

 2431 07:41:03.525903  PCI: 00:14.0: enabled 1

 2432 07:41:03.525954  PCI: 00:14.1: enabled 0

 2433 07:41:03.529250  PCI: 00:14.2: enabled 1

 2434 07:41:03.532633  PCI: 00:14.3: enabled 1

 2435 07:41:03.536134  PCI: 00:15.0: enabled 1

 2436 07:41:03.536207  PCI: 00:15.1: enabled 1

 2437 07:41:03.539280  PCI: 00:15.2: enabled 0

 2438 07:41:03.542485  PCI: 00:15.3: enabled 0

 2439 07:41:03.545865  PCI: 00:16.0: enabled 1

 2440 07:41:03.545942  PCI: 00:16.1: enabled 0

 2441 07:41:03.549455  PCI: 00:16.2: enabled 0

 2442 07:41:03.552450  PCI: 00:16.3: enabled 0

 2443 07:41:03.555968  PCI: 00:16.4: enabled 0

 2444 07:41:03.556041  PCI: 00:16.5: enabled 0

 2445 07:41:03.559116  PCI: 00:17.0: enabled 0

 2446 07:41:03.562240  PCI: 00:19.0: enabled 0

 2447 07:41:03.562312  PCI: 00:19.1: enabled 0

 2448 07:41:03.565915  PCI: 00:19.2: enabled 0

 2449 07:41:03.569122  PCI: 00:1a.0: enabled 0

 2450 07:41:03.572640  PCI: 00:1c.0: enabled 0

 2451 07:41:03.572715  PCI: 00:1c.1: enabled 0

 2452 07:41:03.575801  PCI: 00:1c.2: enabled 0

 2453 07:41:03.579023  PCI: 00:1c.3: enabled 0

 2454 07:41:03.582379  PCI: 00:1c.4: enabled 0

 2455 07:41:03.582451  PCI: 00:1c.5: enabled 1

 2456 07:41:03.585653  PCI: 00:1c.0: enabled 1

 2457 07:41:03.589125  PCI: 00:1c.7: enabled 1

 2458 07:41:03.592327  PCI: 00:1d.0: enabled 0

 2459 07:41:03.592400  PCI: 00:1d.1: enabled 0

 2460 07:41:03.595625  PCI: 00:1d.2: enabled 0

 2461 07:41:03.598881  PCI: 00:1d.0: enabled 1

 2462 07:41:03.598956  PCI: 00:1e.0: enabled 1

 2463 07:41:03.602051  PCI: 00:1e.1: enabled 0

 2464 07:41:03.605569  PCI: 00:1e.2: enabled 0

 2465 07:41:03.608973  PCI: 00:1e.3: enabled 1

 2466 07:41:03.609047  PCI: 00:1f.0: enabled 1

 2467 07:41:03.612283  PCI: 00:1f.1: enabled 0

 2468 07:41:03.615444  PCI: 00:1f.2: enabled 1

 2469 07:41:03.618704  PCI: 00:1f.3: enabled 1

 2470 07:41:03.618778  PCI: 00:1f.4: enabled 1

 2471 07:41:03.622266  PCI: 00:1f.5: enabled 1

 2472 07:41:03.625552  PCI: 00:1f.6: enabled 0

 2473 07:41:03.628743  PCI: 00:1f.7: enabled 0

 2474 07:41:03.628831  GENERIC: 0.0: enabled 1

 2475 07:41:03.631954  GENERIC: 0.0: enabled 1

 2476 07:41:03.635388  GENERIC: 1.0: enabled 1

 2477 07:41:03.638570  GENERIC: 0.0: enabled 1

 2478 07:41:03.638644  GENERIC: 1.0: enabled 1

 2479 07:41:03.641830  USB0 port 0: enabled 1

 2480 07:41:03.645342  GENERIC: 0.0: enabled 1

 2481 07:41:03.645418  GENERIC: 0.0: enabled 1

 2482 07:41:03.648572  USB0 port 0: enabled 1

 2483 07:41:03.651888  GENERIC: 0.0: enabled 1

 2484 07:41:03.655495  I2C: 00:1a: enabled 1

 2485 07:41:03.655569  I2C: 00:50: enabled 1

 2486 07:41:03.658728  PCI: 00:00.0: enabled 1

 2487 07:41:03.662008  PCI: 82:00.0: enabled 1

 2488 07:41:03.662082  GENERIC: 0.0: enabled 1

 2489 07:41:03.665418  GENERIC: 0.0: enabled 1

 2490 07:41:03.668712  PNP: 0c09.0: enabled 1

 2491 07:41:03.672442  GENERIC: 0.0: enabled 1

 2492 07:41:03.672515  USB3 port 0: enabled 1

 2493 07:41:03.675049  USB3 port 1: enabled 0

 2494 07:41:03.678535  USB3 port 2: enabled 1

 2495 07:41:03.678610  USB3 port 3: enabled 0

 2496 07:41:03.682041  USB2 port 0: enabled 1

 2497 07:41:03.685290  USB2 port 1: enabled 0

 2498 07:41:03.688773  USB2 port 2: enabled 1

 2499 07:41:03.688846  USB2 port 3: enabled 1

 2500 07:41:03.692265  USB2 port 4: enabled 1

 2501 07:41:03.695298  USB2 port 5: enabled 1

 2502 07:41:03.695371  USB2 port 6: enabled 1

 2503 07:41:03.698664  USB2 port 7: enabled 1

 2504 07:41:03.701848  USB2 port 8: enabled 0

 2505 07:41:03.701937  USB2 port 9: enabled 1

 2506 07:41:03.705301  USB3 port 0: enabled 1

 2507 07:41:03.708546  USB3 port 1: enabled 1

 2508 07:41:03.711982  USB3 port 2: enabled 1

 2509 07:41:03.712055  USB3 port 3: enabled 1

 2510 07:41:03.715249  GENERIC: 0.0: enabled 1

 2511 07:41:03.718868  GENERIC: 1.0: enabled 1

 2512 07:41:03.718939  APIC: 00: enabled 1

 2513 07:41:03.721760  APIC: 14: enabled 1

 2514 07:41:03.725235  APIC: 16: enabled 1

 2515 07:41:03.725307  APIC: 10: enabled 1

 2516 07:41:03.728539  APIC: 12: enabled 1

 2517 07:41:03.728612  NONE: enabled 1

 2518 07:41:03.731938  NONE: enabled 1

 2519 07:41:03.732011  NONE: enabled 1

 2520 07:41:03.735481  PCI: 83:00.0: enabled 1

 2521 07:41:03.738438  PCI: 84:00.0: enabled 1

 2522 07:41:03.741844  BS: BS_DEV_INIT run times (exec / console): 6 / 1157 ms

 2523 07:41:03.748458  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2524 07:41:03.751450  ELOG: NV offset 0xf20000 size 0x4000

 2525 07:41:03.759433  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2526 07:41:03.766064  ELOG: Event(17) added with size 13 at 2024-01-03 07:41:03 UTC

 2527 07:41:03.772692  ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:03 UTC

 2528 07:41:03.779443  ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:03 UTC

 2529 07:41:03.785836  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2530 07:41:03.792560  ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:03 UTC

 2531 07:41:03.795642  elog_add_boot_reason: Logged dev mode boot

 2532 07:41:03.802380  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2533 07:41:03.802454  Finalize devices...

 2534 07:41:03.805771  PCI: 00:16.0 final

 2535 07:41:03.809074  CSE RW Firmware Version: 16.1.25.2049

 2536 07:41:03.812329  PCI: 00:1f.2 final

 2537 07:41:03.812419  PCI: 00:1f.4 final

 2538 07:41:03.815672  GENERIC: 0.0 final

 2539 07:41:03.822225  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2540 07:41:03.822299  GENERIC: 1.0 final

 2541 07:41:03.829045  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2542 07:41:03.832479  Devices finalized

 2543 07:41:03.835633  BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms

 2544 07:41:03.842347  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2545 07:41:03.849016  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2546 07:41:03.852594  ME: HFSTS1                      : 0x90000245

 2547 07:41:03.855559  ME: HFSTS2                      : 0x32850116

 2548 07:41:03.862185  ME: HFSTS3                      : 0x00000050

 2549 07:41:03.865609  ME: HFSTS4                      : 0x00004000

 2550 07:41:03.872167  ME: HFSTS5                      : 0x00000000

 2551 07:41:03.875466  ME: HFSTS6                      : 0x40600006

 2552 07:41:03.878841  ME: Manufacturing Mode          : NO

 2553 07:41:03.882062  ME: SPI Protection Mode Enabled : YES

 2554 07:41:03.885400  ME: FPFs Committed              : YES

 2555 07:41:03.888759  ME: Manufacturing Vars Locked   : YES

 2556 07:41:03.895229  ME: FW Partition Table          : OK

 2557 07:41:03.898725  ME: Bringup Loader Failure      : NO

 2558 07:41:03.902135  ME: Firmware Init Complete      : YES

 2559 07:41:03.905269  ME: Boot Options Present        : NO

 2560 07:41:03.908598  ME: Update In Progress          : NO

 2561 07:41:03.912149  ME: D0i3 Support                : YES

 2562 07:41:03.915328  ME: Low Power State Enabled     : NO

 2563 07:41:03.918727  ME: CPU Replaced                : YES

 2564 07:41:03.925139  ME: CPU Replacement Valid       : YES

 2565 07:41:03.928494  ME: Current Working State       : 5

 2566 07:41:03.931743  ME: Current Operation State     : 1

 2567 07:41:03.935024  ME: Current Operation Mode      : 0

 2568 07:41:03.938471  ME: Error Code                  : 0

 2569 07:41:03.942018  ME: Enhanced Debug Mode         : NO

 2570 07:41:03.945158  ME: CPU Debug Disabled          : YES

 2571 07:41:03.948667  ME: TXT Support                 : NO

 2572 07:41:03.951883  ME: WP for RO is enabled        : YES

 2573 07:41:03.958520  ME: RO write protection scope - Start=0x1000, End=0x1A6FFF

 2574 07:41:03.964973  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2575 07:41:03.968823  Ramoops buffer: 0x100000@0x76898000.

 2576 07:41:03.975143  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2577 07:41:03.981742  CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c

 2578 07:41:03.985155  CBFS: 'fallback/slic' not found.

 2579 07:41:03.988431  ACPI: Writing ACPI tables at 7686c000.

 2580 07:41:03.991894  ACPI:    * FACS

 2581 07:41:03.991970  ACPI:    * DSDT

 2582 07:41:03.998480  PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000

 2583 07:41:04.003146  ACPI:    * FADT

 2584 07:41:04.003222  SCI is IRQ9

 2585 07:41:04.009854  ACPI: added table 1/32, length now 40

 2586 07:41:04.009929  ACPI:     * SSDT

 2587 07:41:04.016528  Found 1 CPU(s) with 5/5 physical/logical core(s) each.

 2588 07:41:04.019832  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2589 07:41:04.026460  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2590 07:41:04.029876  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2591 07:41:04.036559  \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0

 2592 07:41:04.039811  \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1

 2593 07:41:04.046538  \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2

 2594 07:41:04.049732  USB Type-C 0 mapped to EC port 0

 2595 07:41:04.056484  usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0

 2596 07:41:04.059782  \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0

 2597 07:41:04.063068  USB Type-C 2 mapped to EC port 1

 2598 07:41:04.069755  usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0

 2599 07:41:04.076588  \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0

 2600 07:41:04.079846  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2601 07:41:04.086817  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2602 07:41:04.089891  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2603 07:41:04.096323  \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0

 2604 07:41:04.102871  \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)

 2605 07:41:04.109552  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 2606 07:41:04.112902  \_SB.PCI0.RP09: Added StorageD3Enable property

 2607 07:41:04.117296  EC returned error result code 1

 2608 07:41:04.123828  PS2K: Bad resp from EC. Vivaldi disabled!

 2609 07:41:04.130513  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2610 07:41:04.136967  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2

 2611 07:41:04.143570  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2612 07:41:04.150477  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2

 2613 07:41:04.156762  \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3

 2614 07:41:04.160096  \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4

 2615 07:41:04.166892  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5

 2616 07:41:04.173388  \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6

 2617 07:41:04.180147  \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7

 2618 07:41:04.186821  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2619 07:41:04.193266  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0

 2620 07:41:04.199946  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1

 2621 07:41:04.206466  \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2

 2622 07:41:04.213180  \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3

 2623 07:41:04.219793  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2624 07:41:04.226583  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2625 07:41:04.229985  ACPI: added table 2/32, length now 44

 2626 07:41:04.233256  ACPI:    * MCFG

 2627 07:41:04.236418  ACPI: added table 3/32, length now 48

 2628 07:41:04.236493  ACPI:    * TPM2

 2629 07:41:04.239696  TPM2 log created at 0x7685c000

 2630 07:41:04.243060  ACPI: added table 4/32, length now 52

 2631 07:41:04.246425  ACPI:     * LPIT

 2632 07:41:04.249809  ACPI: added table 5/32, length now 56

 2633 07:41:04.249884  ACPI:    * MADT

 2634 07:41:04.253049  SCI is IRQ9

 2635 07:41:04.256397  ACPI: added table 6/32, length now 60

 2636 07:41:04.259717  cmd_reg from pmc_make_ipc_cmd 1052838

 2637 07:41:04.266366  CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc

 2638 07:41:04.273244  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2639 07:41:04.279638  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2640 07:41:04.282793  PMC CrashLog size in discovery mode: 0xC00

 2641 07:41:04.286191  cpu crashlog bar addr: 0x808C0000

 2642 07:41:04.289765  cpu discovery table offset: 0x6030

 2643 07:41:04.296298  cpu_crashlog_discovery_table buffer count: 0x3

 2644 07:41:04.299469  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2645 07:41:04.306184  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2646 07:41:04.316175  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2647 07:41:04.319252  PMC crashLog size in discovery mode : 0xC00

 2648 07:41:04.325944  Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.

 2649 07:41:04.329464  discover mode PMC crashlog size adjusted to: 0x200

 2650 07:41:04.336005  Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.

 2651 07:41:04.342812  discover mode PMC crashlog size adjusted to: 0x0

 2652 07:41:04.345801  m_cpu_crashLog_size : 0x3480 bytes

 2653 07:41:04.349158  CPU crashLog present.

 2654 07:41:04.352409  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2655 07:41:04.359098  Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.

 2656 07:41:04.362596  current = 76875cf0

 2657 07:41:04.362670  ACPI:    * DMAR

 2658 07:41:04.369044  ACPI: added table 7/32, length now 64

 2659 07:41:04.372504  ACPI: added table 8/32, length now 68

 2660 07:41:04.372578  ACPI:    * HPET

 2661 07:41:04.375910  ACPI: added table 9/32, length now 72

 2662 07:41:04.378867  ACPI: done.

 2663 07:41:04.382466  ACPI tables: 40480 bytes.

 2664 07:41:04.385638  smbios_write_tables: 76856000

 2665 07:41:04.388925  EC returned error result code 3

 2666 07:41:04.392499  Couldn't obtain OEM name from CBI

 2667 07:41:04.392573  Create SMBIOS type 16

 2668 07:41:04.395661  Create SMBIOS type 17

 2669 07:41:04.398799  Create SMBIOS type 20

 2670 07:41:04.402398  GENERIC: 0.0 (WIFI Device)

 2671 07:41:04.402472  SMBIOS tables: 982 bytes.

 2672 07:41:04.408851  Writing table forward entry at 0x00000500

 2673 07:41:04.415638  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955

 2674 07:41:04.418762  Writing coreboot table at 0x76890000

 2675 07:41:04.421921   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2676 07:41:04.428648   1. 0000000000001000-000000000009ffff: RAM

 2677 07:41:04.432212   2. 00000000000a0000-00000000000fffff: RESERVED

 2678 07:41:04.438794   3. 0000000000100000-0000000076855fff: RAM

 2679 07:41:04.441895   4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES

 2680 07:41:04.448549   5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE

 2681 07:41:04.455580   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2682 07:41:04.458609   7. 0000000077000000-00000000803fffff: RESERVED

 2683 07:41:04.461919   8. 00000000c0000000-00000000cfffffff: RESERVED

 2684 07:41:04.468488   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2685 07:41:04.471780  10. 00000000fb000000-00000000fb000fff: RESERVED

 2686 07:41:04.478458  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2687 07:41:04.481911  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2688 07:41:04.488380  13. 00000000fec00000-00000000fecfffff: RESERVED

 2689 07:41:04.491663  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2690 07:41:04.498394  15. 00000000fed80000-00000000fed87fff: RESERVED

 2691 07:41:04.501813  16. 00000000fed90000-00000000fed92fff: RESERVED

 2692 07:41:04.505025  17. 00000000feda0000-00000000feda1fff: RESERVED

 2693 07:41:04.511737  18. 00000000fedc0000-00000000feddffff: RESERVED

 2694 07:41:04.515009  19. 0000000100000000-000000017fbfffff: RAM

 2695 07:41:04.518258  Passing 4 GPIOs to payload:

 2696 07:41:04.524849              NAME |       PORT | POLARITY |     VALUE

 2697 07:41:04.528102               lid |  undefined |     high |      high

 2698 07:41:04.534818             power |  undefined |     high |       low

 2699 07:41:04.538341             oprom |  undefined |     high |       low

 2700 07:41:04.544925          EC in RW | 0x00000151 |     high |      high

 2701 07:41:04.545005  Board ID: 3

 2702 07:41:04.548019  FW config: 0x64

 2703 07:41:04.554541  Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum 4221

 2704 07:41:04.558277  coreboot table: 1788 bytes.

 2705 07:41:04.561291  IMD ROOT    0. 0x76fff000 0x00001000

 2706 07:41:04.564800  IMD SMALL   1. 0x76ffe000 0x00001000

 2707 07:41:04.567922  FSP MEMORY  2. 0x76afe000 0x00500000

 2708 07:41:04.571585  CONSOLE     3. 0x76ade000 0x00020000

 2709 07:41:04.574723  RW MCACHE   4. 0x76add000 0x00000464

 2710 07:41:04.577841  RO MCACHE   5. 0x76adc000 0x00001000

 2711 07:41:04.581429  FMAP        6. 0x76adb000 0x0000064a

 2712 07:41:04.587785  TIME STAMP  7. 0x76ada000 0x00000910

 2713 07:41:04.591360  VBOOT WORK  8. 0x76ac6000 0x00014000

 2714 07:41:04.594654  MEM INFO    9. 0x76ac5000 0x000003b8

 2715 07:41:04.597788  ROMSTG STCK10. 0x76ac4000 0x00001000

 2716 07:41:04.601218  AFTER CAR  11. 0x76ab8000 0x0000c000

 2717 07:41:04.604752  RAMSTAGE   12. 0x76a2d000 0x0008b000

 2718 07:41:04.607726  ACPI BERT  13. 0x76a1d000 0x00010000

 2719 07:41:04.614407  CHROMEOS NVS14. 0x76a1c000 0x00000f00

 2720 07:41:04.617804  REFCODE    15. 0x769ad000 0x0006f000

 2721 07:41:04.621277  SMM BACKUP 16. 0x7699d000 0x00010000

 2722 07:41:04.624681  IGD OPREGION17. 0x76998000 0x000041fd

 2723 07:41:04.628132  RAMOOPS    18. 0x76898000 0x00100000

 2724 07:41:04.631133  COREBOOT   19. 0x76890000 0x00008000

 2725 07:41:04.634712  ACPI       20. 0x7686c000 0x00024000

 2726 07:41:04.638203  TPM2 TCGLOG21. 0x7685c000 0x00010000

 2727 07:41:04.644592  PMC CRASHLOG22. 0x7685b000 0x00000c00

 2728 07:41:04.647812  CPU CRASHLOG23. 0x76857000 0x00003480

 2729 07:41:04.651116  SMBIOS     24. 0x76856000 0x00001000

 2730 07:41:04.651171  IMD small region:

 2731 07:41:04.658046    IMD ROOT    0. 0x76ffec00 0x00000400

 2732 07:41:04.661238    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2733 07:41:04.664796    VPD         2. 0x76ffeba0 0x00000032

 2734 07:41:04.667967    CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020

 2735 07:41:04.674728    POWER STATE 4. 0x76ffeb20 0x00000044

 2736 07:41:04.678005    ROMSTAGE    5. 0x76ffeb00 0x00000004

 2737 07:41:04.681569    ACPI GNVS   6. 0x76ffeaa0 0x00000048

 2738 07:41:04.684582    TYPE_C INFO 7. 0x76ffea80 0x0000000c

 2739 07:41:04.691147  BS: BS_WRITE_TABLES run times (exec / console): 6 / 704 ms

 2740 07:41:04.694705  MTRR: Physical address space:

 2741 07:41:04.701418  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2742 07:41:04.707927  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2743 07:41:04.711185  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2744 07:41:04.717738  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2745 07:41:04.724392  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2746 07:41:04.731078  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2747 07:41:04.737794  0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6

 2748 07:41:04.744667  0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0

 2749 07:41:04.747874  MTRR: Fixed MSR 0x250 0x0606060606060606

 2750 07:41:04.751173  MTRR: Fixed MSR 0x258 0x0606060606060606

 2751 07:41:04.757742  MTRR: Fixed MSR 0x259 0x0000000000000000

 2752 07:41:04.760854  MTRR: Fixed MSR 0x268 0x0606060606060606

 2753 07:41:04.764326  MTRR: Fixed MSR 0x269 0x0606060606060606

 2754 07:41:04.767838  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2755 07:41:04.774182  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2756 07:41:04.777719  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2757 07:41:04.781067  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2758 07:41:04.784279  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2759 07:41:04.787419  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2760 07:41:04.791038  call enable_fixed_mtrr()

 2761 07:41:04.794285  CPU physical address size: 39 bits

 2762 07:41:04.801000  MTRR: default type WB/UC MTRR counts: 13/6.

 2763 07:41:04.804399  MTRR: UC selected as default type.

 2764 07:41:04.811028  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2765 07:41:04.814152  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2766 07:41:04.821257  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2767 07:41:04.827756  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2768 07:41:04.834185  MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6

 2769 07:41:04.841066  MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0

 2770 07:41:04.843930  MTRR: Fixed MSR 0x250 0x0606060606060606

 2771 07:41:04.850700  MTRR: Fixed MSR 0x258 0x0606060606060606

 2772 07:41:04.854050  MTRR: Fixed MSR 0x259 0x0000000000000000

 2773 07:41:04.857234  MTRR: Fixed MSR 0x268 0x0606060606060606

 2774 07:41:04.860697  MTRR: Fixed MSR 0x269 0x0606060606060606

 2775 07:41:04.863901  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2776 07:41:04.870420  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2777 07:41:04.874028  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2778 07:41:04.877033  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2779 07:41:04.880538  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2780 07:41:04.887190  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2781 07:41:04.890513  MTRR: Fixed MSR 0x250 0x0606060606060606

 2782 07:41:04.893620  MTRR: Fixed MSR 0x258 0x0606060606060606

 2783 07:41:04.897086  MTRR: Fixed MSR 0x259 0x0000000000000000

 2784 07:41:04.903780  MTRR: Fixed MSR 0x268 0x0606060606060606

 2785 07:41:04.906836  MTRR: Fixed MSR 0x269 0x0606060606060606

 2786 07:41:04.910386  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2787 07:41:04.913637  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2788 07:41:04.920288  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2789 07:41:04.923290  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2790 07:41:04.926779  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2791 07:41:04.930236  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2792 07:41:04.933481  call enable_fixed_mtrr()

 2793 07:41:04.936714  MTRR: Fixed MSR 0x250 0x0606060606060606

 2794 07:41:04.940234  MTRR: Fixed MSR 0x258 0x0606060606060606

 2795 07:41:04.946684  MTRR: Fixed MSR 0x259 0x0000000000000000

 2796 07:41:04.949824  MTRR: Fixed MSR 0x268 0x0606060606060606

 2797 07:41:04.953313  MTRR: Fixed MSR 0x269 0x0606060606060606

 2798 07:41:04.956713  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2799 07:41:04.963737  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2800 07:41:04.966516  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2801 07:41:04.969908  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2802 07:41:04.973370  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2803 07:41:04.979956  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2804 07:41:04.983276  MTRR: Fixed MSR 0x250 0x0606060606060606

 2805 07:41:04.986614  MTRR: Fixed MSR 0x258 0x0606060606060606

 2806 07:41:04.989772  MTRR: Fixed MSR 0x259 0x0000000000000000

 2807 07:41:04.996560  MTRR: Fixed MSR 0x268 0x0606060606060606

 2808 07:41:04.999940  MTRR: Fixed MSR 0x269 0x0606060606060606

 2809 07:41:05.003012  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2810 07:41:05.006361  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2811 07:41:05.009773  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2812 07:41:05.016522  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2813 07:41:05.019775  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2814 07:41:05.022833  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2815 07:41:05.026658  call enable_fixed_mtrr()

 2816 07:41:05.029786  call enable_fixed_mtrr()

 2817 07:41:05.029862  call enable_fixed_mtrr()

 2818 07:41:05.036539  CPU physical address size: 39 bits

 2819 07:41:05.039687  CPU physical address size: 39 bits

 2820 07:41:05.043218  CPU physical address size: 39 bits

 2821 07:41:05.046206  CPU physical address size: 39 bits

 2822 07:41:05.046274  

 2823 07:41:05.046334  MTRR check

 2824 07:41:05.049788  Fixed MTRRs   : Enabled

 2825 07:41:05.052799  Variable MTRRs: Enabled

 2826 07:41:05.052859  

 2827 07:41:05.056308  BS: BS_WRITE_TABLES exit times (exec / console): 139 / 156 ms

 2828 07:41:05.062766  Checking cr50 for pending updates

 2829 07:41:05.072449  Reading cr50 TPM mode

 2830 07:41:05.087796  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2831 07:41:05.097583  CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434

 2832 07:41:05.101054  Checking segment from ROM address 0xff1f03ac

 2833 07:41:05.104419  Checking segment from ROM address 0xff1f03c8

 2834 07:41:05.110726  Loading segment from ROM address 0xff1f03ac

 2835 07:41:05.110824    code (compression=1)

 2836 07:41:05.120761    New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226

 2837 07:41:05.127425  Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226

 2838 07:41:05.130973  using LZMA

 2839 07:41:05.174941  [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4

 2840 07:41:05.181688  Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88

 2841 07:41:05.192692  Loading segment from ROM address 0xff1f03c8

 2842 07:41:05.196211    Entry Point 0x30000000

 2843 07:41:05.196285  Loaded segments

 2844 07:41:05.202630  BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms

 2845 07:41:05.206067  coreboot skipped calling FSP notify phase: 00000040.

 2846 07:41:05.212726  coreboot skipped calling FSP notify phase: 000000f0.

 2847 07:41:05.219481  BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms

 2848 07:41:05.219556  Finalizing chipset.

 2849 07:41:05.222969  apm_control: Finalizing SMM.

 2850 07:41:05.226130  APMC done.

 2851 07:41:05.229458  CSE: EOP requested action: continue boot

 2852 07:41:05.232923  HECI: CSE device 16.1 is disabled

 2853 07:41:05.236339  HECI: CSE device 16.2 is disabled

 2854 07:41:05.239462  HECI: CSE device 16.3 is disabled

 2855 07:41:05.242873  HECI: CSE device 16.4 is disabled

 2856 07:41:05.246054  HECI: CSE device 16.5 is disabled

 2857 07:41:05.252858  BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 27 ms

 2858 07:41:05.256124  mp_park_aps done after 0 msecs.

 2859 07:41:05.259480  Jumping to boot code at 0x30000000(0x76890000)

 2860 07:41:05.269155  CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes

 2861 07:41:05.274693  

 2862 07:41:05.274767  

 2863 07:41:05.274821  

 2864 07:41:05.277924  Starting depthcharge on Moli...

 2865 07:41:05.277998  

 2866 07:41:05.278340  end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
 2867 07:41:05.278421  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2868 07:41:05.278489  Setting prompt string to ['brask:']
 2869 07:41:05.278554  bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:40)
 2870 07:41:05.284615  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2871 07:41:05.284691  

 2872 07:41:05.291195  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2873 07:41:05.291270  

 2874 07:41:05.297846  Looking for NVMe Controller 0x30062398 @ 00:06:00

 2875 07:41:05.297921  

 2876 07:41:05.301086  Looking for NVMe Controller 0x30062440 @ 00:1d:00

 2877 07:41:05.301161  

 2878 07:41:05.304234  Wipe memory regions:

 2879 07:41:05.304309  

 2880 07:41:05.307735  	[0x00000000001000, 0x000000000a0000)

 2881 07:41:05.307809  

 2882 07:41:05.310838  	[0x00000000100000, 0x00000030000000)

 2883 07:41:05.679844  

 2884 07:41:05.683053  	[0x00000032665e30, 0x00000076856000)

 2885 07:41:06.203999  

 2886 07:41:06.207033  	[0x00000100000000, 0x0000017fc00000)

 2887 07:41:07.185676  

 2888 07:41:07.189025  ec_init: CrosEC protocol v3 supported (256, 256)

 2889 07:41:07.620487  

 2890 07:41:07.620628  R8152: Initializing

 2891 07:41:07.620687  

 2892 07:41:07.623763  Version 6 (ocp_data = 5c30)

 2893 07:41:07.623843  

 2894 07:41:07.626882  R8152: Done initializing

 2895 07:41:07.626956  

 2896 07:41:07.630174  Adding net device

 2897 07:41:07.931338  

 2898 07:41:07.934663  [firmware-brya-14505.B-collabora] Sep  8 2023 15:56:17

 2899 07:41:07.935081  

 2900 07:41:07.935348  

 2901 07:41:07.935579  

 2902 07:41:07.936106  Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2904 07:41:08.037099  brask: tftpboot 192.168.201.1 12435191/tftp-deploy-ctpnlr1n/kernel/bzImage 12435191/tftp-deploy-ctpnlr1n/kernel/cmdline 12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz

 2905 07:41:08.037522  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2906 07:41:08.037816  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
 2907 07:41:08.041946  tftpboot 192.168.201.1 12435191/tftp-deploy-ctpnlr1n/kernel/bzImaploy-ctpnlr1n/kernel/cmdline 12435191/tftp-deploy-ctpnlr1n/ramdisk/ramdisk.cpio.gz

 2908 07:41:08.042282  

 2909 07:41:08.042499  Waiting for link

 2910 07:41:08.244286  

 2911 07:41:08.244681  done.

 2912 07:41:08.244910  

 2913 07:41:08.245110  MAC: 00:13:3b:00:0f:bb

 2914 07:41:08.245302  

 2915 07:41:08.247660  Sending DHCP discover... done.

 2916 07:41:08.247979  

 2917 07:41:11.254305  Waiting for reply... done.

 2918 07:41:11.254707  

 2919 07:41:11.257550  Sending DHCP request... done.

 2920 07:41:11.257640  

 2921 07:41:11.263257  Waiting for reply... done.

 2922 07:41:11.263333  

 2923 07:41:11.263387  My ip is 192.168.201.196

 2924 07:41:11.263441  

 2925 07:41:11.269999  The DHCP server ip is 192.168.201.1

 2926 07:41:11.270088  

 2927 07:41:11.273360  TFTP server IP predefined by user: 192.168.201.1

 2928 07:41:11.273437  

 2929 07:41:11.279772  Bootfile predefined by user: 12435191/tftp-deploy-ctpnlr1n/kernel/bzImage

 2930 07:41:11.279845  

 2931 07:41:11.283436  Sending tftp read request... done.

 2932 07:41:11.283526  

 2933 07:41:11.286565  Waiting for the transfer... 

 2934 07:41:11.286638  

 2935 07:41:11.826109  00000000 ################################################################

 2936 07:41:11.826236  

 2937 07:41:12.352160  00080000 ################################################################

 2938 07:41:12.352294  

 2939 07:41:12.882891  00100000 ################################################################

 2940 07:41:12.883031  

 2941 07:41:13.421394  00180000 ################################################################

 2942 07:41:13.421548  

 2943 07:41:13.954846  00200000 ################################################################

 2944 07:41:13.954970  

 2945 07:41:14.474349  00280000 ################################################################

 2946 07:41:14.474497  

 2947 07:41:14.987414  00300000 ################################################################

 2948 07:41:14.987539  

 2949 07:41:15.505096  00380000 ################################################################

 2950 07:41:15.505232  

 2951 07:41:16.030245  00400000 ################################################################

 2952 07:41:16.030384  

 2953 07:41:16.557321  00480000 ################################################################

 2954 07:41:16.557466  

 2955 07:41:17.103830  00500000 ################################################################

 2956 07:41:17.103958  

 2957 07:41:17.654970  00580000 ################################################################

 2958 07:41:17.655101  

 2959 07:41:18.222000  00600000 ################################################################

 2960 07:41:18.222131  

 2961 07:41:18.772868  00680000 ################################################################

 2962 07:41:18.772994  

 2963 07:41:19.328144  00700000 ################################################################

 2964 07:41:19.328259  

 2965 07:41:19.875736  00780000 ################################################################

 2966 07:41:19.875872  

 2967 07:41:20.065562  00800000 ####################### done.

 2968 07:41:20.065658  

 2969 07:41:20.069339  The bootfile was 8572816 bytes long.

 2970 07:41:20.069741  

 2971 07:41:20.072758  Sending tftp read request... done.

 2972 07:41:20.073054  

 2973 07:41:20.075636  Waiting for the transfer... 

 2974 07:41:20.075920  

 2975 07:41:20.677024  00000000 ################################################################

 2976 07:41:20.677158  

 2977 07:41:21.276288  00080000 ################################################################

 2978 07:41:21.276447  

 2979 07:41:21.888686  00100000 ################################################################

 2980 07:41:21.889093  

 2981 07:41:22.478445  00180000 ################################################################

 2982 07:41:22.478851  

 2983 07:41:23.074299  00200000 ################################################################

 2984 07:41:23.074434  

 2985 07:41:23.682900  00280000 ################################################################

 2986 07:41:23.683059  

 2987 07:41:24.272648  00300000 ################################################################

 2988 07:41:24.273017  

 2989 07:41:24.868455  00380000 ################################################################

 2990 07:41:24.868599  

 2991 07:41:25.465230  00400000 ################################################################

 2992 07:41:25.465376  

 2993 07:41:25.986179  00480000 ################################################################

 2994 07:41:25.986316  

 2995 07:41:26.527076  00500000 ################################################################

 2996 07:41:26.527213  

 2997 07:41:27.079765  00580000 ################################################################

 2998 07:41:27.079921  

 2999 07:41:27.627008  00600000 ################################################################

 3000 07:41:27.627148  

 3001 07:41:28.154397  00680000 ################################################################

 3002 07:41:28.154546  

 3003 07:41:28.668663  00700000 ################################################################

 3004 07:41:28.668819  

 3005 07:41:29.176913  00780000 ################################################################

 3006 07:41:29.177056  

 3007 07:41:29.604000  00800000 ###################################################### done.

 3008 07:41:29.604140  

 3009 07:41:29.606986  Sending tftp read request... done.

 3010 07:41:29.607064  

 3011 07:41:29.610352  Waiting for the transfer... 

 3012 07:41:29.610429  

 3013 07:41:29.610483  00000000 # done.

 3014 07:41:29.610533  

 3015 07:41:29.620524  Command line loaded dynamically from TFTP file: 12435191/tftp-deploy-ctpnlr1n/kernel/cmdline

 3016 07:41:29.620601  

 3017 07:41:29.637001  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 3018 07:41:29.642506  

 3019 07:41:29.645680  Shutting down all USB controllers.

 3020 07:41:29.645756  

 3021 07:41:29.645811  Removing current net device

 3022 07:41:29.645860  

 3023 07:41:29.649257  Finalizing coreboot

 3024 07:41:29.649332  

 3025 07:41:29.655774  Exiting depthcharge with code 4 at timestamp: 36061357

 3026 07:41:29.655855  

 3027 07:41:29.655913  

 3028 07:41:29.655964  Starting kernel ...

 3029 07:41:29.656012  

 3030 07:41:29.656058  

 3031 07:41:29.656397  end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
 3032 07:41:29.656473  start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
 3033 07:41:29.656533  Setting prompt string to ['Linux version [0-9]']
 3034 07:41:29.656587  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 3035 07:41:29.656641  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 3037 07:45:44.657351  end: 2.2.5 auto-login-action (duration 00:04:15) [common]
 3039 07:45:44.658214  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
 3041 07:45:44.658801  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 3044 07:45:44.660071  end: 2 depthcharge-action (duration 00:05:00) [common]
 3046 07:45:44.661021  Cleaning after the job
 3047 07:45:44.661354  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/ramdisk
 3048 07:45:44.662222  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/kernel
 3049 07:45:44.663033  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435191/tftp-deploy-ctpnlr1n/modules
 3050 07:45:44.663295  start: 5.1 power-off (timeout 00:00:30) [common]
 3051 07:45:44.663436  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-4' '--port=1' '--command=off'
 3052 07:45:44.741496  >> Command sent successfully.

 3053 07:45:44.749197  Returned 0 in 0 seconds
 3054 07:45:44.850200  end: 5.1 power-off (duration 00:00:00) [common]
 3056 07:45:44.851397  start: 5.2 read-feedback (timeout 00:10:00) [common]
 3057 07:45:44.852226  Listened to connection for namespace 'common' for up to 1s
 3058 07:45:45.853216  Finalising connection for namespace 'common'
 3059 07:45:45.853786  Disconnecting from shell: Finalise
 3060 07:45:45.854120  

 3061 07:45:45.954920  end: 5.2 read-feedback (duration 00:00:01) [common]
 3062 07:45:45.955465  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435191
 3063 07:45:45.967129  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435191
 3064 07:45:45.967241  JobError: Your job cannot terminate cleanly.