Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:43:18.823107 lava-dispatcher, installed at version: 2023.10
2 07:43:18.823421 start: 0 validate
3 07:43:18.823638 Start time: 2024-01-03 07:43:18.823627+00:00 (UTC)
4 07:43:18.823839 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:43:18.824064 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:43:19.092701 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:43:19.093008 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:43:19.359250 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:43:19.359411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:43:19.625423 validate duration: 0.80
12 07:43:19.625814 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:43:19.626002 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:43:19.626152 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:43:19.626356 Not decompressing ramdisk as can be used compressed.
16 07:43:19.626475 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:43:19.626572 saving as /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/ramdisk/rootfs.cpio.gz
18 07:43:19.626683 total size: 8418130 (8 MB)
19 07:43:19.628265 progress 0 % (0 MB)
20 07:43:19.630715 progress 5 % (0 MB)
21 07:43:19.633001 progress 10 % (0 MB)
22 07:43:19.635325 progress 15 % (1 MB)
23 07:43:19.637625 progress 20 % (1 MB)
24 07:43:19.639935 progress 25 % (2 MB)
25 07:43:19.642333 progress 30 % (2 MB)
26 07:43:19.645111 progress 35 % (2 MB)
27 07:43:19.648491 progress 40 % (3 MB)
28 07:43:19.651837 progress 45 % (3 MB)
29 07:43:19.655210 progress 50 % (4 MB)
30 07:43:19.658568 progress 55 % (4 MB)
31 07:43:19.661890 progress 60 % (4 MB)
32 07:43:19.665023 progress 65 % (5 MB)
33 07:43:19.668272 progress 70 % (5 MB)
34 07:43:19.671568 progress 75 % (6 MB)
35 07:43:19.674793 progress 80 % (6 MB)
36 07:43:19.678160 progress 85 % (6 MB)
37 07:43:19.681509 progress 90 % (7 MB)
38 07:43:19.684780 progress 95 % (7 MB)
39 07:43:19.687788 progress 100 % (8 MB)
40 07:43:19.688122 8 MB downloaded in 0.06 s (130.65 MB/s)
41 07:43:19.688401 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:43:19.688831 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:43:19.688975 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:43:19.689121 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:43:19.689325 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:43:19.689450 saving as /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/kernel/bzImage
48 07:43:19.689562 total size: 8572816 (8 MB)
49 07:43:19.689690 No compression specified
50 07:43:19.691542 progress 0 % (0 MB)
51 07:43:19.694348 progress 5 % (0 MB)
52 07:43:19.696906 progress 10 % (0 MB)
53 07:43:19.699613 progress 15 % (1 MB)
54 07:43:19.702207 progress 20 % (1 MB)
55 07:43:19.704619 progress 25 % (2 MB)
56 07:43:19.707181 progress 30 % (2 MB)
57 07:43:19.709768 progress 35 % (2 MB)
58 07:43:19.712390 progress 40 % (3 MB)
59 07:43:19.714899 progress 45 % (3 MB)
60 07:43:19.717404 progress 50 % (4 MB)
61 07:43:19.719846 progress 55 % (4 MB)
62 07:43:19.722266 progress 60 % (4 MB)
63 07:43:19.724860 progress 65 % (5 MB)
64 07:43:19.727276 progress 70 % (5 MB)
65 07:43:19.729639 progress 75 % (6 MB)
66 07:43:19.731987 progress 80 % (6 MB)
67 07:43:19.734797 progress 85 % (6 MB)
68 07:43:19.738108 progress 90 % (7 MB)
69 07:43:19.741397 progress 95 % (7 MB)
70 07:43:19.744732 progress 100 % (8 MB)
71 07:43:19.745018 8 MB downloaded in 0.06 s (147.44 MB/s)
72 07:43:19.745250 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:43:19.745673 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:43:19.745826 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:43:19.745968 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:43:19.746180 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:43:19.746304 saving as /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/modules/modules.tar
79 07:43:19.746413 total size: 251144 (0 MB)
80 07:43:19.746527 Using unxz to decompress xz
81 07:43:19.751580 progress 13 % (0 MB)
82 07:43:19.752149 progress 26 % (0 MB)
83 07:43:19.752517 progress 39 % (0 MB)
84 07:43:19.754292 progress 52 % (0 MB)
85 07:43:19.756347 progress 65 % (0 MB)
86 07:43:19.758360 progress 78 % (0 MB)
87 07:43:19.760345 progress 91 % (0 MB)
88 07:43:19.762461 progress 100 % (0 MB)
89 07:43:19.768291 0 MB downloaded in 0.02 s (10.95 MB/s)
90 07:43:19.768550 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:43:19.768844 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:43:19.768947 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 07:43:19.769045 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 07:43:19.769132 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:43:19.769220 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 07:43:19.769447 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu
98 07:43:19.769589 makedir: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin
99 07:43:19.769697 makedir: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/tests
100 07:43:19.769799 makedir: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/results
101 07:43:19.769919 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-add-keys
102 07:43:19.770073 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-add-sources
103 07:43:19.770209 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-background-process-start
104 07:43:19.770342 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-background-process-stop
105 07:43:19.770473 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-common-functions
106 07:43:19.770603 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-echo-ipv4
107 07:43:19.770732 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-install-packages
108 07:43:19.770863 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-installed-packages
109 07:43:19.770991 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-os-build
110 07:43:19.771137 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-probe-channel
111 07:43:19.771284 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-probe-ip
112 07:43:19.771435 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-target-ip
113 07:43:19.771583 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-target-mac
114 07:43:19.771730 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-target-storage
115 07:43:19.771885 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-case
116 07:43:19.772060 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-event
117 07:43:19.772235 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-feedback
118 07:43:19.772418 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-raise
119 07:43:19.772594 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-reference
120 07:43:19.772770 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-runner
121 07:43:19.772917 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-set
122 07:43:19.773067 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-test-shell
123 07:43:19.773226 Updating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-install-packages (oe)
124 07:43:19.773426 Updating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/bin/lava-installed-packages (oe)
125 07:43:19.773573 Creating /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/environment
126 07:43:19.773691 LAVA metadata
127 07:43:19.773778 - LAVA_JOB_ID=12435190
128 07:43:19.773883 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:43:19.774036 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 07:43:19.774162 skipped lava-vland-overlay
131 07:43:19.774303 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:43:19.774443 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 07:43:19.774541 skipped lava-multinode-overlay
134 07:43:19.774661 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:43:19.774812 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 07:43:19.774930 Loading test definitions
137 07:43:19.775074 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 07:43:19.775191 Using /lava-12435190 at stage 0
139 07:43:19.775645 uuid=12435190_1.4.2.3.1 testdef=None
140 07:43:19.775774 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:43:19.775904 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 07:43:19.776701 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:43:19.776984 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 07:43:19.777945 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:43:19.778334 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 07:43:19.779280 runner path: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/0/tests/0_dmesg test_uuid 12435190_1.4.2.3.1
149 07:43:19.779479 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:43:19.779741 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 07:43:19.779850 Using /lava-12435190 at stage 1
153 07:43:19.780301 uuid=12435190_1.4.2.3.5 testdef=None
154 07:43:19.780402 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 07:43:19.780527 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 07:43:19.781265 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 07:43:19.781636 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 07:43:19.782326 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 07:43:19.782691 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 07:43:19.783655 runner path: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/1/tests/1_bootrr test_uuid 12435190_1.4.2.3.5
163 07:43:19.783855 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 07:43:19.784206 Creating lava-test-runner.conf files
166 07:43:19.784312 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/0 for stage 0
167 07:43:19.784432 - 0_dmesg
168 07:43:19.784525 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435190/lava-overlay-anppgriu/lava-12435190/1 for stage 1
169 07:43:19.784637 - 1_bootrr
170 07:43:19.784748 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 07:43:19.784876 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 07:43:19.794062 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 07:43:19.794186 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 07:43:19.794291 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 07:43:19.794395 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 07:43:19.794498 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 07:43:20.071062 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 07:43:20.071469 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 07:43:20.071614 extracting modules file /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435190/extract-overlay-ramdisk-xd1wluhy/ramdisk
180 07:43:20.085824 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 07:43:20.085979 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 07:43:20.086096 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435190/compress-overlay-njjq1axu/overlay-1.4.2.4.tar.gz to ramdisk
183 07:43:20.086183 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435190/compress-overlay-njjq1axu/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435190/extract-overlay-ramdisk-xd1wluhy/ramdisk
184 07:43:20.096363 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 07:43:20.096505 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 07:43:20.096613 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 07:43:20.096724 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 07:43:20.096816 Building ramdisk /var/lib/lava/dispatcher/tmp/12435190/extract-overlay-ramdisk-xd1wluhy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435190/extract-overlay-ramdisk-xd1wluhy/ramdisk
189 07:43:20.231885 >> 49790 blocks
190 07:43:21.102823 rename /var/lib/lava/dispatcher/tmp/12435190/extract-overlay-ramdisk-xd1wluhy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
191 07:43:21.103405 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 07:43:21.103600 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 07:43:21.103768 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 07:43:21.103941 No mkimage arch provided, not using FIT.
195 07:43:21.104100 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 07:43:21.104255 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 07:43:21.104445 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 07:43:21.104607 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 07:43:21.104748 No LXC device requested
200 07:43:21.104895 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 07:43:21.105046 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 07:43:21.105193 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 07:43:21.105328 Checking files for TFTP limit of 4294967296 bytes.
204 07:43:21.105962 end: 1 tftp-deploy (duration 00:00:01) [common]
205 07:43:21.106125 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 07:43:21.106279 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 07:43:21.106479 substitutions:
208 07:43:21.106597 - {DTB}: None
209 07:43:21.106717 - {INITRD}: 12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
210 07:43:21.106818 - {KERNEL}: 12435190/tftp-deploy-rvszkn1b/kernel/bzImage
211 07:43:21.106927 - {LAVA_MAC}: None
212 07:43:21.107038 - {PRESEED_CONFIG}: None
213 07:43:21.107149 - {PRESEED_LOCAL}: None
214 07:43:21.107256 - {RAMDISK}: 12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
215 07:43:21.107367 - {ROOT_PART}: None
216 07:43:21.107478 - {ROOT}: None
217 07:43:21.107590 - {SERVER_IP}: 192.168.201.1
218 07:43:21.107700 - {TEE}: None
219 07:43:21.107803 Parsed boot commands:
220 07:43:21.107911 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 07:43:21.108181 Parsed boot commands: tftpboot 192.168.201.1 12435190/tftp-deploy-rvszkn1b/kernel/bzImage 12435190/tftp-deploy-rvszkn1b/kernel/cmdline 12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
222 07:43:21.108334 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 07:43:21.108479 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 07:43:21.108630 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 07:43:21.108779 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 07:43:21.108907 Not connected, no need to disconnect.
227 07:43:21.109045 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 07:43:21.109195 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 07:43:21.109319 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 07:43:21.113730 Setting prompt string to ['lava-test: # ']
231 07:43:21.114239 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 07:43:21.114411 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 07:43:21.114566 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 07:43:21.114724 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 07:43:21.115062 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 07:43:26.243266 >> Command sent successfully.
237 07:43:26.246758 Returned 0 in 5 seconds
238 07:43:26.347171 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 07:43:26.347516 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 07:43:26.347618 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 07:43:26.347708 Setting prompt string to 'Starting depthcharge on Helios...'
243 07:43:26.347777 Changing prompt to 'Starting depthcharge on Helios...'
244 07:43:26.347850 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 07:43:26.348123 [Enter `^Ec?' for help]
246 07:43:26.967346
247 07:43:26.967528
248 07:43:26.977444 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 07:43:26.981169 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 07:43:26.987918 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 07:43:26.990868 CPU: AES supported, TXT NOT supported, VT supported
252 07:43:26.997729 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 07:43:27.001172 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 07:43:27.008063 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 07:43:27.011437 VBOOT: Loading verstage.
256 07:43:27.014870 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 07:43:27.021022 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 07:43:27.024882 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 07:43:27.028376 CBFS @ c08000 size 3f8000
260 07:43:27.034603 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 07:43:27.037663 CBFS: Locating 'fallback/verstage'
262 07:43:27.041086 CBFS: Found @ offset 10fb80 size 1072c
263 07:43:27.041194
264 07:43:27.041290
265 07:43:27.054324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 07:43:27.068383 Probing TPM: . done!
267 07:43:27.071689 TPM ready after 0 ms
268 07:43:27.075143 Connected to device vid:did:rid of 1ae0:0028:00
269 07:43:27.085166 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 07:43:27.088305 Initialized TPM device CR50 revision 0
271 07:43:27.133366 tlcl_send_startup: Startup return code is 0
272 07:43:27.133491 TPM: setup succeeded
273 07:43:27.145593 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 07:43:27.149919 Chrome EC: UHEPI supported
275 07:43:27.153107 Phase 1
276 07:43:27.156329 FMAP: area GBB found @ c05000 (12288 bytes)
277 07:43:27.163072 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 07:43:27.163159 Phase 2
279 07:43:27.166489 Phase 3
280 07:43:27.169635 FMAP: area GBB found @ c05000 (12288 bytes)
281 07:43:27.176198 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 07:43:27.182779 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
283 07:43:27.185974 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
284 07:43:27.193071 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 07:43:27.208178 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
286 07:43:27.211507 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
287 07:43:27.218347 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 07:43:27.222755 Phase 4
289 07:43:27.225881 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
290 07:43:27.232564 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 07:43:27.412225 VB2:vb2_rsa_verify_digest() Digest check failed!
292 07:43:27.418807 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 07:43:27.418927 Saving nvdata
294 07:43:27.422327 Reboot requested (10020007)
295 07:43:27.425662 board_reset() called!
296 07:43:27.425748 full_reset() called!
297 07:43:31.934070
298 07:43:31.934308
299 07:43:31.944184 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 07:43:31.947501 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 07:43:31.954212 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 07:43:31.957374 CPU: AES supported, TXT NOT supported, VT supported
303 07:43:31.964239 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 07:43:31.967438 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 07:43:31.974013 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 07:43:31.977532 VBOOT: Loading verstage.
307 07:43:31.980893 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 07:43:31.987444 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 07:43:31.994042 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 07:43:31.994122 CBFS @ c08000 size 3f8000
311 07:43:32.000908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 07:43:32.004167 CBFS: Locating 'fallback/verstage'
313 07:43:32.007426 CBFS: Found @ offset 10fb80 size 1072c
314 07:43:32.011369
315 07:43:32.011446
316 07:43:32.021411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 07:43:32.035732 Probing TPM: . done!
318 07:43:32.038820 TPM ready after 0 ms
319 07:43:32.042441 Connected to device vid:did:rid of 1ae0:0028:00
320 07:43:32.052100 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 07:43:32.055865 Initialized TPM device CR50 revision 0
322 07:43:32.100620 tlcl_send_startup: Startup return code is 0
323 07:43:32.100766 TPM: setup succeeded
324 07:43:32.113093 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 07:43:32.116804 Chrome EC: UHEPI supported
326 07:43:32.120155 Phase 1
327 07:43:32.123419 FMAP: area GBB found @ c05000 (12288 bytes)
328 07:43:32.129797 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 07:43:32.136582 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 07:43:32.139994 Recovery requested (1009000e)
331 07:43:32.145670 Saving nvdata
332 07:43:32.152028 tlcl_extend: response is 0
333 07:43:32.160801 tlcl_extend: response is 0
334 07:43:32.168032 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 07:43:32.171258 CBFS @ c08000 size 3f8000
336 07:43:32.177835 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 07:43:32.181525 CBFS: Locating 'fallback/romstage'
338 07:43:32.184422 CBFS: Found @ offset 80 size 145fc
339 07:43:32.187608 Accumulated console time in verstage 98 ms
340 07:43:32.187688
341 07:43:32.187752
342 07:43:32.200739 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 07:43:32.207356 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 07:43:32.211066 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 07:43:32.214393 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 07:43:32.220812 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 07:43:32.224190 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 07:43:32.227554 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
349 07:43:32.230728 TCO_STS: 0000 0000
350 07:43:32.233955 GEN_PMCON: e0015238 00000200
351 07:43:32.237318 GBLRST_CAUSE: 00000000 00000000
352 07:43:32.237403 prev_sleep_state 5
353 07:43:32.241053 Boot Count incremented to 3010
354 07:43:32.247569 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 07:43:32.250711 CBFS @ c08000 size 3f8000
356 07:43:32.254145 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 07:43:32.257536 CBFS: Locating 'fspm.bin'
358 07:43:32.260851 CBFS: Found @ offset 5ffc0 size 71000
359 07:43:32.264655 Chrome EC: UHEPI supported
360 07:43:32.272385 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 07:43:32.277379 Probing TPM: done!
362 07:43:32.283725 Connected to device vid:did:rid of 1ae0:0028:00
363 07:43:32.294132 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 07:43:32.299669 Initialized TPM device CR50 revision 0
365 07:43:32.309022 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 07:43:32.315549 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 07:43:32.318887 MRC cache found, size 1948
368 07:43:32.322212 bootmode is set to: 2
369 07:43:32.325352 PRMRR disabled by config.
370 07:43:32.325437 SPD INDEX = 1
371 07:43:32.331839 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 07:43:32.335267 CBFS @ c08000 size 3f8000
373 07:43:32.341802 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 07:43:32.341938 CBFS: Locating 'spd.bin'
375 07:43:32.344824 CBFS: Found @ offset 5fb80 size 400
376 07:43:32.348994 SPD: module type is LPDDR3
377 07:43:32.351660 SPD: module part is
378 07:43:32.358529 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 07:43:32.361913 SPD: device width 4 bits, bus width 8 bits
380 07:43:32.364876 SPD: module size is 4096 MB (per channel)
381 07:43:32.368015 memory slot: 0 configuration done.
382 07:43:32.371403 memory slot: 2 configuration done.
383 07:43:32.423513 CBMEM:
384 07:43:32.426345 IMD: root @ 99fff000 254 entries.
385 07:43:32.429814 IMD: root @ 99ffec00 62 entries.
386 07:43:32.432862 External stage cache:
387 07:43:32.436570 IMD: root @ 9abff000 254 entries.
388 07:43:32.439914 IMD: root @ 9abfec00 62 entries.
389 07:43:32.443055 Chrome EC: clear events_b mask to 0x0000000020004000
390 07:43:32.463353 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 07:43:32.472178 tlcl_write: response is 0
392 07:43:32.481441 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 07:43:32.488425 MRC: TPM MRC hash updated successfully.
394 07:43:32.488536 2 DIMMs found
395 07:43:32.491462 SMM Memory Map
396 07:43:32.495148 SMRAM : 0x9a000000 0x1000000
397 07:43:32.498351 Subregion 0: 0x9a000000 0xa00000
398 07:43:32.501028 Subregion 1: 0x9aa00000 0x200000
399 07:43:32.505040 Subregion 2: 0x9ac00000 0x400000
400 07:43:32.508297 top_of_ram = 0x9a000000
401 07:43:32.510977 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 07:43:32.517666 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 07:43:32.521992 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 07:43:32.528045 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 07:43:32.530843 CBFS @ c08000 size 3f8000
406 07:43:32.534541 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 07:43:32.537667 CBFS: Locating 'fallback/postcar'
408 07:43:32.544573 CBFS: Found @ offset 107000 size 4b44
409 07:43:32.547383 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 07:43:32.560526 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 07:43:32.563508 Processing 180 relocs. Offset value of 0x97c0c000
412 07:43:32.571863 Accumulated console time in romstage 285 ms
413 07:43:32.571981
414 07:43:32.572085
415 07:43:32.582249 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 07:43:32.588541 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 07:43:32.591657 CBFS @ c08000 size 3f8000
418 07:43:32.594858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 07:43:32.602070 CBFS: Locating 'fallback/ramstage'
420 07:43:32.604838 CBFS: Found @ offset 43380 size 1b9e8
421 07:43:32.611362 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 07:43:32.643891 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 07:43:32.647147 Processing 3976 relocs. Offset value of 0x98db0000
424 07:43:32.654024 Accumulated console time in postcar 52 ms
425 07:43:32.654163
426 07:43:32.654268
427 07:43:32.663584 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 07:43:32.670547 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 07:43:32.673567 WARNING: RO_VPD is uninitialized or empty.
430 07:43:32.676949 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 07:43:32.683830 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 07:43:32.683916 Normal boot.
433 07:43:32.690616 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 07:43:32.693870 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 07:43:32.697028 CBFS @ c08000 size 3f8000
436 07:43:32.703461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 07:43:32.706614 CBFS: Locating 'cpu_microcode_blob.bin'
438 07:43:32.710019 CBFS: Found @ offset 14700 size 2ec00
439 07:43:32.713269 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 07:43:32.717049 Skip microcode update
441 07:43:32.723263 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 07:43:32.723346 CBFS @ c08000 size 3f8000
443 07:43:32.730008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 07:43:32.733380 CBFS: Locating 'fsps.bin'
445 07:43:32.736720 CBFS: Found @ offset d1fc0 size 35000
446 07:43:32.762400 Detected 4 core, 8 thread CPU.
447 07:43:32.765664 Setting up SMI for CPU
448 07:43:32.768590 IED base = 0x9ac00000
449 07:43:32.768702 IED size = 0x00400000
450 07:43:32.771737 Will perform SMM setup.
451 07:43:32.778387 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 07:43:32.785352 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 07:43:32.788472 Processing 16 relocs. Offset value of 0x00030000
454 07:43:32.792155 Attempting to start 7 APs
455 07:43:32.795984 Waiting for 10ms after sending INIT.
456 07:43:32.811964 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 07:43:32.812087 done.
458 07:43:32.815164 AP: slot 4 apic_id 4.
459 07:43:32.818429 AP: slot 1 apic_id 5.
460 07:43:32.821758 Waiting for 2nd SIPI to complete...done.
461 07:43:32.825139 AP: slot 7 apic_id 3.
462 07:43:32.825253 AP: slot 6 apic_id 2.
463 07:43:32.828486 AP: slot 5 apic_id 6.
464 07:43:32.831961 AP: slot 2 apic_id 7.
465 07:43:32.838402 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 07:43:32.844982 Processing 13 relocs. Offset value of 0x00038000
467 07:43:32.851266 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 07:43:32.854830 Installing SMM handler to 0x9a000000
469 07:43:32.861621 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 07:43:32.867679 Processing 658 relocs. Offset value of 0x9a010000
471 07:43:32.875027 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 07:43:32.877643 Processing 13 relocs. Offset value of 0x9a008000
473 07:43:32.884468 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 07:43:32.891028 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 07:43:32.897466 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 07:43:32.900975 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 07:43:32.907364 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 07:43:32.914439 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 07:43:32.921165 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 07:43:32.927263 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 07:43:32.930411 Clearing SMI status registers
482 07:43:32.930491 SMI_STS: PM1
483 07:43:32.933931 PM1_STS: PWRBTN
484 07:43:32.934032 TCO_STS: SECOND_TO
485 07:43:32.937050 New SMBASE 0x9a000000
486 07:43:32.940420 In relocation handler: CPU 0
487 07:43:32.943915 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 07:43:32.947014 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 07:43:32.950423 Relocation complete.
490 07:43:32.954069 New SMBASE 0x99fff400
491 07:43:32.957317 In relocation handler: CPU 3
492 07:43:32.960544 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 07:43:32.963764 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 07:43:32.967226 Relocation complete.
495 07:43:32.970739 New SMBASE 0x99ffe800
496 07:43:32.973856 In relocation handler: CPU 6
497 07:43:32.977322 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
498 07:43:32.980502 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 07:43:32.984825 Relocation complete.
500 07:43:32.987186 New SMBASE 0x99ffe400
501 07:43:32.990529 In relocation handler: CPU 7
502 07:43:32.993427 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
503 07:43:32.997017 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 07:43:32.999976 Relocation complete.
505 07:43:33.004000 New SMBASE 0x99ffec00
506 07:43:33.004115 In relocation handler: CPU 5
507 07:43:33.010335 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
508 07:43:33.013913 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 07:43:33.016933 Relocation complete.
510 07:43:33.019867 New SMBASE 0x99fff800
511 07:43:33.019979 In relocation handler: CPU 2
512 07:43:33.026626 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
513 07:43:33.030327 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 07:43:33.033575 Relocation complete.
515 07:43:33.033656 New SMBASE 0x99fffc00
516 07:43:33.036800 In relocation handler: CPU 1
517 07:43:33.043262 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
518 07:43:33.046440 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 07:43:33.049779 Relocation complete.
520 07:43:33.049890 New SMBASE 0x99fff000
521 07:43:33.052957 In relocation handler: CPU 4
522 07:43:33.059569 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
523 07:43:33.063266 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 07:43:33.066555 Relocation complete.
525 07:43:33.066639 Initializing CPU #0
526 07:43:33.069684 CPU: vendor Intel device 806ec
527 07:43:33.073112 CPU: family 06, model 8e, stepping 0c
528 07:43:33.076385 Clearing out pending MCEs
529 07:43:33.079646 Setting up local APIC...
530 07:43:33.082962 apic_id: 0x00 done.
531 07:43:33.086397 Turbo is available but hidden
532 07:43:33.089731 Turbo is available and visible
533 07:43:33.089810 VMX status: enabled
534 07:43:33.093207 IA32_FEATURE_CONTROL status: locked
535 07:43:33.096504 Skip microcode update
536 07:43:33.099165 CPU #0 initialized
537 07:43:33.099279 Initializing CPU #3
538 07:43:33.103187 Initializing CPU #6
539 07:43:33.103295 Initializing CPU #7
540 07:43:33.106280 CPU: vendor Intel device 806ec
541 07:43:33.109659 CPU: family 06, model 8e, stepping 0c
542 07:43:33.112876 CPU: vendor Intel device 806ec
543 07:43:33.119408 CPU: family 06, model 8e, stepping 0c
544 07:43:33.119520 Clearing out pending MCEs
545 07:43:33.122607 Clearing out pending MCEs
546 07:43:33.126276 Setting up local APIC...
547 07:43:33.129354 CPU: vendor Intel device 806ec
548 07:43:33.132656 CPU: family 06, model 8e, stepping 0c
549 07:43:33.135801 Clearing out pending MCEs
550 07:43:33.135910 apic_id: 0x02 done.
551 07:43:33.139199 Setting up local APIC...
552 07:43:33.142572 Setting up local APIC...
553 07:43:33.146258 Initializing CPU #4
554 07:43:33.146386 Initializing CPU #1
555 07:43:33.149039 CPU: vendor Intel device 806ec
556 07:43:33.152136 CPU: family 06, model 8e, stepping 0c
557 07:43:33.155778 CPU: vendor Intel device 806ec
558 07:43:33.158951 CPU: family 06, model 8e, stepping 0c
559 07:43:33.162525 Clearing out pending MCEs
560 07:43:33.165776 Clearing out pending MCEs
561 07:43:33.169370 Setting up local APIC...
562 07:43:33.169499 VMX status: enabled
563 07:43:33.172543 apic_id: 0x03 done.
564 07:43:33.175847 IA32_FEATURE_CONTROL status: locked
565 07:43:33.179193 VMX status: enabled
566 07:43:33.179302 Skip microcode update
567 07:43:33.182608 IA32_FEATURE_CONTROL status: locked
568 07:43:33.185798 CPU #6 initialized
569 07:43:33.189240 Skip microcode update
570 07:43:33.189343 apic_id: 0x04 done.
571 07:43:33.192661 CPU #7 initialized
572 07:43:33.195764 VMX status: enabled
573 07:43:33.195870 Setting up local APIC...
574 07:43:33.199178 apic_id: 0x01 done.
575 07:43:33.202487 IA32_FEATURE_CONTROL status: locked
576 07:43:33.205417 apic_id: 0x05 done.
577 07:43:33.205519 Skip microcode update
578 07:43:33.208541 VMX status: enabled
579 07:43:33.212329 CPU #4 initialized
580 07:43:33.215432 IA32_FEATURE_CONTROL status: locked
581 07:43:33.215506 VMX status: enabled
582 07:43:33.218694 Skip microcode update
583 07:43:33.221851 Initializing CPU #2
584 07:43:33.225148 IA32_FEATURE_CONTROL status: locked
585 07:43:33.228711 CPU: vendor Intel device 806ec
586 07:43:33.232046 CPU: family 06, model 8e, stepping 0c
587 07:43:33.232155 Initializing CPU #5
588 07:43:33.234996 Clearing out pending MCEs
589 07:43:33.238361 CPU: vendor Intel device 806ec
590 07:43:33.241872 CPU: family 06, model 8e, stepping 0c
591 07:43:33.245161 Setting up local APIC...
592 07:43:33.248389 Skip microcode update
593 07:43:33.248474 apic_id: 0x07 done.
594 07:43:33.252451 Clearing out pending MCEs
595 07:43:33.255564 VMX status: enabled
596 07:43:33.258591 Setting up local APIC...
597 07:43:33.258677 CPU #1 initialized
598 07:43:33.261734 apic_id: 0x06 done.
599 07:43:33.265229 IA32_FEATURE_CONTROL status: locked
600 07:43:33.265335 VMX status: enabled
601 07:43:33.268207 Skip microcode update
602 07:43:33.271918 IA32_FEATURE_CONTROL status: locked
603 07:43:33.275069 CPU #2 initialized
604 07:43:33.275152 Skip microcode update
605 07:43:33.278347 CPU #3 initialized
606 07:43:33.281468 CPU #5 initialized
607 07:43:33.285016 bsp_do_flight_plan done after 461 msecs.
608 07:43:33.288207 CPU: frequency set to 4200 MHz
609 07:43:33.288298 Enabling SMIs.
610 07:43:33.291415 Locking SMM.
611 07:43:33.305828 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 07:43:33.308897 CBFS @ c08000 size 3f8000
613 07:43:33.315552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 07:43:33.315636 CBFS: Locating 'vbt.bin'
615 07:43:33.318844 CBFS: Found @ offset 5f5c0 size 499
616 07:43:33.325272 Found a VBT of 4608 bytes after decompression
617 07:43:33.507709 Display FSP Version Info HOB
618 07:43:33.511405 Reference Code - CPU = 9.0.1e.30
619 07:43:33.514165 uCode Version = 0.0.0.ca
620 07:43:33.517654 TXT ACM version = ff.ff.ff.ffff
621 07:43:33.520817 Display FSP Version Info HOB
622 07:43:33.524115 Reference Code - ME = 9.0.1e.30
623 07:43:33.528090 MEBx version = 0.0.0.0
624 07:43:33.531322 ME Firmware Version = Consumer SKU
625 07:43:33.534424 Display FSP Version Info HOB
626 07:43:33.537523 Reference Code - CML PCH = 9.0.1e.30
627 07:43:33.541109 PCH-CRID Status = Disabled
628 07:43:33.544514 PCH-CRID Original Value = ff.ff.ff.ffff
629 07:43:33.547644 PCH-CRID New Value = ff.ff.ff.ffff
630 07:43:33.550741 OPROM - RST - RAID = ff.ff.ff.ffff
631 07:43:33.554460 ChipsetInit Base Version = ff.ff.ff.ffff
632 07:43:33.557993 ChipsetInit Oem Version = ff.ff.ff.ffff
633 07:43:33.561019 Display FSP Version Info HOB
634 07:43:33.567652 Reference Code - SA - System Agent = 9.0.1e.30
635 07:43:33.570795 Reference Code - MRC = 0.7.1.6c
636 07:43:33.570879 SA - PCIe Version = 9.0.1e.30
637 07:43:33.574248 SA-CRID Status = Disabled
638 07:43:33.577466 SA-CRID Original Value = 0.0.0.c
639 07:43:33.580700 SA-CRID New Value = 0.0.0.c
640 07:43:33.583812 OPROM - VBIOS = ff.ff.ff.ffff
641 07:43:33.587247 RTC Init
642 07:43:33.590381 Set power on after power failure.
643 07:43:33.590462 Disabling Deep S3
644 07:43:33.594254 Disabling Deep S3
645 07:43:33.594336 Disabling Deep S4
646 07:43:33.597499 Disabling Deep S4
647 07:43:33.597581 Disabling Deep S5
648 07:43:33.600876 Disabling Deep S5
649 07:43:33.607215 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
650 07:43:33.607299 Enumerating buses...
651 07:43:33.613587 Show all devs... Before device enumeration.
652 07:43:33.613671 Root Device: enabled 1
653 07:43:33.617387 CPU_CLUSTER: 0: enabled 1
654 07:43:33.620529 DOMAIN: 0000: enabled 1
655 07:43:33.623777 APIC: 00: enabled 1
656 07:43:33.623935 PCI: 00:00.0: enabled 1
657 07:43:33.627254 PCI: 00:02.0: enabled 1
658 07:43:33.630205 PCI: 00:04.0: enabled 0
659 07:43:33.633930 PCI: 00:05.0: enabled 0
660 07:43:33.634013 PCI: 00:12.0: enabled 1
661 07:43:33.637105 PCI: 00:12.5: enabled 0
662 07:43:33.640107 PCI: 00:12.6: enabled 0
663 07:43:33.640240 PCI: 00:14.0: enabled 1
664 07:43:33.643144 PCI: 00:14.1: enabled 0
665 07:43:33.646961 PCI: 00:14.3: enabled 1
666 07:43:33.649936 PCI: 00:14.5: enabled 0
667 07:43:33.650017 PCI: 00:15.0: enabled 1
668 07:43:33.653134 PCI: 00:15.1: enabled 1
669 07:43:33.656855 PCI: 00:15.2: enabled 0
670 07:43:33.660056 PCI: 00:15.3: enabled 0
671 07:43:33.660138 PCI: 00:16.0: enabled 1
672 07:43:33.663322 PCI: 00:16.1: enabled 0
673 07:43:33.666700 PCI: 00:16.2: enabled 0
674 07:43:33.670007 PCI: 00:16.3: enabled 0
675 07:43:33.670088 PCI: 00:16.4: enabled 0
676 07:43:33.672990 PCI: 00:16.5: enabled 0
677 07:43:33.676736 PCI: 00:17.0: enabled 1
678 07:43:33.679747 PCI: 00:19.0: enabled 1
679 07:43:33.679829 PCI: 00:19.1: enabled 0
680 07:43:33.683107 PCI: 00:19.2: enabled 0
681 07:43:33.686497 PCI: 00:1a.0: enabled 0
682 07:43:33.689649 PCI: 00:1c.0: enabled 0
683 07:43:33.689727 PCI: 00:1c.1: enabled 0
684 07:43:33.692834 PCI: 00:1c.2: enabled 0
685 07:43:33.696111 PCI: 00:1c.3: enabled 0
686 07:43:33.696214 PCI: 00:1c.4: enabled 0
687 07:43:33.699940 PCI: 00:1c.5: enabled 0
688 07:43:33.703362 PCI: 00:1c.6: enabled 0
689 07:43:33.706584 PCI: 00:1c.7: enabled 0
690 07:43:33.706665 PCI: 00:1d.0: enabled 1
691 07:43:33.709675 PCI: 00:1d.1: enabled 0
692 07:43:33.712531 PCI: 00:1d.2: enabled 0
693 07:43:33.716388 PCI: 00:1d.3: enabled 0
694 07:43:33.716470 PCI: 00:1d.4: enabled 0
695 07:43:33.719776 PCI: 00:1d.5: enabled 1
696 07:43:33.722923 PCI: 00:1e.0: enabled 1
697 07:43:33.726243 PCI: 00:1e.1: enabled 0
698 07:43:33.726326 PCI: 00:1e.2: enabled 1
699 07:43:33.729332 PCI: 00:1e.3: enabled 1
700 07:43:33.732566 PCI: 00:1f.0: enabled 1
701 07:43:33.736165 PCI: 00:1f.1: enabled 1
702 07:43:33.736247 PCI: 00:1f.2: enabled 1
703 07:43:33.739481 PCI: 00:1f.3: enabled 1
704 07:43:33.742284 PCI: 00:1f.4: enabled 1
705 07:43:33.742367 PCI: 00:1f.5: enabled 1
706 07:43:33.745904 PCI: 00:1f.6: enabled 0
707 07:43:33.749322 USB0 port 0: enabled 1
708 07:43:33.752758 I2C: 00:15: enabled 1
709 07:43:33.752840 I2C: 00:5d: enabled 1
710 07:43:33.756076 GENERIC: 0.0: enabled 1
711 07:43:33.758917 I2C: 00:1a: enabled 1
712 07:43:33.758999 I2C: 00:38: enabled 1
713 07:43:33.762704 I2C: 00:39: enabled 1
714 07:43:33.765529 I2C: 00:3a: enabled 1
715 07:43:33.765611 I2C: 00:3b: enabled 1
716 07:43:33.769034 PCI: 00:00.0: enabled 1
717 07:43:33.772260 SPI: 00: enabled 1
718 07:43:33.772381 SPI: 01: enabled 1
719 07:43:33.775634 PNP: 0c09.0: enabled 1
720 07:43:33.778772 USB2 port 0: enabled 1
721 07:43:33.778854 USB2 port 1: enabled 1
722 07:43:33.781894 USB2 port 2: enabled 0
723 07:43:33.785497 USB2 port 3: enabled 0
724 07:43:33.788991 USB2 port 5: enabled 0
725 07:43:33.789073 USB2 port 6: enabled 1
726 07:43:33.792143 USB2 port 9: enabled 1
727 07:43:33.795507 USB3 port 0: enabled 1
728 07:43:33.795588 USB3 port 1: enabled 1
729 07:43:33.798798 USB3 port 2: enabled 1
730 07:43:33.801908 USB3 port 3: enabled 1
731 07:43:33.801990 USB3 port 4: enabled 0
732 07:43:33.805730 APIC: 05: enabled 1
733 07:43:33.808447 APIC: 07: enabled 1
734 07:43:33.808529 APIC: 01: enabled 1
735 07:43:33.812184 APIC: 04: enabled 1
736 07:43:33.815300 APIC: 06: enabled 1
737 07:43:33.815382 APIC: 02: enabled 1
738 07:43:33.818556 APIC: 03: enabled 1
739 07:43:33.818638 Compare with tree...
740 07:43:33.822192 Root Device: enabled 1
741 07:43:33.825439 CPU_CLUSTER: 0: enabled 1
742 07:43:33.828771 APIC: 00: enabled 1
743 07:43:33.828853 APIC: 05: enabled 1
744 07:43:33.832053 APIC: 07: enabled 1
745 07:43:33.835130 APIC: 01: enabled 1
746 07:43:33.835212 APIC: 04: enabled 1
747 07:43:33.838233 APIC: 06: enabled 1
748 07:43:33.841618 APIC: 02: enabled 1
749 07:43:33.841701 APIC: 03: enabled 1
750 07:43:33.844806 DOMAIN: 0000: enabled 1
751 07:43:33.848227 PCI: 00:00.0: enabled 1
752 07:43:33.851592 PCI: 00:02.0: enabled 1
753 07:43:33.855085 PCI: 00:04.0: enabled 0
754 07:43:33.855167 PCI: 00:05.0: enabled 0
755 07:43:33.858156 PCI: 00:12.0: enabled 1
756 07:43:33.861705 PCI: 00:12.5: enabled 0
757 07:43:33.864865 PCI: 00:12.6: enabled 0
758 07:43:33.868525 PCI: 00:14.0: enabled 1
759 07:43:33.868607 USB0 port 0: enabled 1
760 07:43:33.871291 USB2 port 0: enabled 1
761 07:43:33.874740 USB2 port 1: enabled 1
762 07:43:33.877913 USB2 port 2: enabled 0
763 07:43:33.881397 USB2 port 3: enabled 0
764 07:43:33.884319 USB2 port 5: enabled 0
765 07:43:33.884416 USB2 port 6: enabled 1
766 07:43:33.887935 USB2 port 9: enabled 1
767 07:43:33.890903 USB3 port 0: enabled 1
768 07:43:33.894235 USB3 port 1: enabled 1
769 07:43:33.897914 USB3 port 2: enabled 1
770 07:43:33.898019 USB3 port 3: enabled 1
771 07:43:33.901069 USB3 port 4: enabled 0
772 07:43:33.904478 PCI: 00:14.1: enabled 0
773 07:43:33.907717 PCI: 00:14.3: enabled 1
774 07:43:33.910789 PCI: 00:14.5: enabled 0
775 07:43:33.910870 PCI: 00:15.0: enabled 1
776 07:43:33.914108 I2C: 00:15: enabled 1
777 07:43:33.917402 PCI: 00:15.1: enabled 1
778 07:43:33.921141 I2C: 00:5d: enabled 1
779 07:43:33.924007 GENERIC: 0.0: enabled 1
780 07:43:33.924088 PCI: 00:15.2: enabled 0
781 07:43:33.927649 PCI: 00:15.3: enabled 0
782 07:43:33.930725 PCI: 00:16.0: enabled 1
783 07:43:33.933940 PCI: 00:16.1: enabled 0
784 07:43:33.937670 PCI: 00:16.2: enabled 0
785 07:43:33.937751 PCI: 00:16.3: enabled 0
786 07:43:33.940954 PCI: 00:16.4: enabled 0
787 07:43:33.944001 PCI: 00:16.5: enabled 0
788 07:43:33.947172 PCI: 00:17.0: enabled 1
789 07:43:33.950819 PCI: 00:19.0: enabled 1
790 07:43:33.950900 I2C: 00:1a: enabled 1
791 07:43:33.954038 I2C: 00:38: enabled 1
792 07:43:33.957291 I2C: 00:39: enabled 1
793 07:43:33.960762 I2C: 00:3a: enabled 1
794 07:43:33.960843 I2C: 00:3b: enabled 1
795 07:43:33.963832 PCI: 00:19.1: enabled 0
796 07:43:33.967067 PCI: 00:19.2: enabled 0
797 07:43:33.970795 PCI: 00:1a.0: enabled 0
798 07:43:33.973413 PCI: 00:1c.0: enabled 0
799 07:43:33.973499 PCI: 00:1c.1: enabled 0
800 07:43:33.977258 PCI: 00:1c.2: enabled 0
801 07:43:33.980259 PCI: 00:1c.3: enabled 0
802 07:43:33.983833 PCI: 00:1c.4: enabled 0
803 07:43:33.986871 PCI: 00:1c.5: enabled 0
804 07:43:33.986953 PCI: 00:1c.6: enabled 0
805 07:43:33.990072 PCI: 00:1c.7: enabled 0
806 07:43:33.993495 PCI: 00:1d.0: enabled 1
807 07:43:33.997176 PCI: 00:1d.1: enabled 0
808 07:43:34.000154 PCI: 00:1d.2: enabled 0
809 07:43:34.000264 PCI: 00:1d.3: enabled 0
810 07:43:34.003834 PCI: 00:1d.4: enabled 0
811 07:43:34.006672 PCI: 00:1d.5: enabled 1
812 07:43:34.010070 PCI: 00:00.0: enabled 1
813 07:43:34.013565 PCI: 00:1e.0: enabled 1
814 07:43:34.013647 PCI: 00:1e.1: enabled 0
815 07:43:34.016859 PCI: 00:1e.2: enabled 1
816 07:43:34.020017 SPI: 00: enabled 1
817 07:43:34.023240 PCI: 00:1e.3: enabled 1
818 07:43:34.023321 SPI: 01: enabled 1
819 07:43:34.026510 PCI: 00:1f.0: enabled 1
820 07:43:34.029981 PNP: 0c09.0: enabled 1
821 07:43:34.033566 PCI: 00:1f.1: enabled 1
822 07:43:34.033649 PCI: 00:1f.2: enabled 1
823 07:43:34.036592 PCI: 00:1f.3: enabled 1
824 07:43:34.040089 PCI: 00:1f.4: enabled 1
825 07:43:34.043168 PCI: 00:1f.5: enabled 1
826 07:43:34.046449 PCI: 00:1f.6: enabled 0
827 07:43:34.046533 Root Device scanning...
828 07:43:34.049811 scan_static_bus for Root Device
829 07:43:34.053612 CPU_CLUSTER: 0 enabled
830 07:43:34.056483 DOMAIN: 0000 enabled
831 07:43:34.059628 DOMAIN: 0000 scanning...
832 07:43:34.059709 PCI: pci_scan_bus for bus 00
833 07:43:34.063407 PCI: 00:00.0 [8086/0000] ops
834 07:43:34.066773 PCI: 00:00.0 [8086/9b61] enabled
835 07:43:34.070222 PCI: 00:02.0 [8086/0000] bus ops
836 07:43:34.073197 PCI: 00:02.0 [8086/9b41] enabled
837 07:43:34.076233 PCI: 00:04.0 [8086/1903] disabled
838 07:43:34.079505 PCI: 00:08.0 [8086/1911] enabled
839 07:43:34.083434 PCI: 00:12.0 [8086/02f9] enabled
840 07:43:34.086468 PCI: 00:14.0 [8086/0000] bus ops
841 07:43:34.089699 PCI: 00:14.0 [8086/02ed] enabled
842 07:43:34.092803 PCI: 00:14.2 [8086/02ef] enabled
843 07:43:34.096144 PCI: 00:14.3 [8086/02f0] enabled
844 07:43:34.099601 PCI: 00:15.0 [8086/0000] bus ops
845 07:43:34.103153 PCI: 00:15.0 [8086/02e8] enabled
846 07:43:34.106391 PCI: 00:15.1 [8086/0000] bus ops
847 07:43:34.109582 PCI: 00:15.1 [8086/02e9] enabled
848 07:43:34.113210 PCI: 00:16.0 [8086/0000] ops
849 07:43:34.116878 PCI: 00:16.0 [8086/02e0] enabled
850 07:43:34.119798 PCI: 00:17.0 [8086/0000] ops
851 07:43:34.122771 PCI: 00:17.0 [8086/02d3] enabled
852 07:43:34.126606 PCI: 00:19.0 [8086/0000] bus ops
853 07:43:34.129400 PCI: 00:19.0 [8086/02c5] enabled
854 07:43:34.133133 PCI: 00:1d.0 [8086/0000] bus ops
855 07:43:34.136404 PCI: 00:1d.0 [8086/02b0] enabled
856 07:43:34.142853 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 07:43:34.146441 PCI: 00:1e.0 [8086/0000] ops
858 07:43:34.149429 PCI: 00:1e.0 [8086/02a8] enabled
859 07:43:34.153154 PCI: 00:1e.2 [8086/0000] bus ops
860 07:43:34.156347 PCI: 00:1e.2 [8086/02aa] enabled
861 07:43:34.159731 PCI: 00:1e.3 [8086/0000] bus ops
862 07:43:34.162985 PCI: 00:1e.3 [8086/02ab] enabled
863 07:43:34.165983 PCI: 00:1f.0 [8086/0000] bus ops
864 07:43:34.169808 PCI: 00:1f.0 [8086/0284] enabled
865 07:43:34.172561 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 07:43:34.179506 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 07:43:34.182771 PCI: 00:1f.3 [8086/0000] bus ops
868 07:43:34.186051 PCI: 00:1f.3 [8086/02c8] enabled
869 07:43:34.189239 PCI: 00:1f.4 [8086/0000] bus ops
870 07:43:34.192724 PCI: 00:1f.4 [8086/02a3] enabled
871 07:43:34.195895 PCI: 00:1f.5 [8086/0000] bus ops
872 07:43:34.199757 PCI: 00:1f.5 [8086/02a4] enabled
873 07:43:34.202676 PCI: Leftover static devices:
874 07:43:34.205756 PCI: 00:05.0
875 07:43:34.205843 PCI: 00:12.5
876 07:43:34.205908 PCI: 00:12.6
877 07:43:34.209449 PCI: 00:14.1
878 07:43:34.209530 PCI: 00:14.5
879 07:43:34.212525 PCI: 00:15.2
880 07:43:34.212606 PCI: 00:15.3
881 07:43:34.212670 PCI: 00:16.1
882 07:43:34.215952 PCI: 00:16.2
883 07:43:34.216032 PCI: 00:16.3
884 07:43:34.219151 PCI: 00:16.4
885 07:43:34.219232 PCI: 00:16.5
886 07:43:34.219296 PCI: 00:19.1
887 07:43:34.222346 PCI: 00:19.2
888 07:43:34.222427 PCI: 00:1a.0
889 07:43:34.225793 PCI: 00:1c.0
890 07:43:34.225874 PCI: 00:1c.1
891 07:43:34.228993 PCI: 00:1c.2
892 07:43:34.229073 PCI: 00:1c.3
893 07:43:34.229137 PCI: 00:1c.4
894 07:43:34.232212 PCI: 00:1c.5
895 07:43:34.232361 PCI: 00:1c.6
896 07:43:34.235818 PCI: 00:1c.7
897 07:43:34.235913 PCI: 00:1d.1
898 07:43:34.235988 PCI: 00:1d.2
899 07:43:34.238727 PCI: 00:1d.3
900 07:43:34.238808 PCI: 00:1d.4
901 07:43:34.242189 PCI: 00:1d.5
902 07:43:34.242269 PCI: 00:1e.1
903 07:43:34.242333 PCI: 00:1f.1
904 07:43:34.245403 PCI: 00:1f.2
905 07:43:34.245484 PCI: 00:1f.6
906 07:43:34.249468 PCI: Check your devicetree.cb.
907 07:43:34.252240 PCI: 00:02.0 scanning...
908 07:43:34.255390 scan_generic_bus for PCI: 00:02.0
909 07:43:34.258886 scan_generic_bus for PCI: 00:02.0 done
910 07:43:34.265279 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
911 07:43:34.268713 PCI: 00:14.0 scanning...
912 07:43:34.272243 scan_static_bus for PCI: 00:14.0
913 07:43:34.272388 USB0 port 0 enabled
914 07:43:34.275396 USB0 port 0 scanning...
915 07:43:34.278581 scan_static_bus for USB0 port 0
916 07:43:34.282699 USB2 port 0 enabled
917 07:43:34.282779 USB2 port 1 enabled
918 07:43:34.285657 USB2 port 2 disabled
919 07:43:34.288779 USB2 port 3 disabled
920 07:43:34.288861 USB2 port 5 disabled
921 07:43:34.292178 USB2 port 6 enabled
922 07:43:34.295170 USB2 port 9 enabled
923 07:43:34.295251 USB3 port 0 enabled
924 07:43:34.298620 USB3 port 1 enabled
925 07:43:34.298700 USB3 port 2 enabled
926 07:43:34.301839 USB3 port 3 enabled
927 07:43:34.305610 USB3 port 4 disabled
928 07:43:34.305693 USB2 port 0 scanning...
929 07:43:34.308893 scan_static_bus for USB2 port 0
930 07:43:34.315384 scan_static_bus for USB2 port 0 done
931 07:43:34.319049 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
932 07:43:34.322005 USB2 port 1 scanning...
933 07:43:34.325607 scan_static_bus for USB2 port 1
934 07:43:34.328668 scan_static_bus for USB2 port 1 done
935 07:43:34.335839 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
936 07:43:34.335923 USB2 port 6 scanning...
937 07:43:34.338705 scan_static_bus for USB2 port 6
938 07:43:34.345742 scan_static_bus for USB2 port 6 done
939 07:43:34.348915 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
940 07:43:34.351979 USB2 port 9 scanning...
941 07:43:34.355490 scan_static_bus for USB2 port 9
942 07:43:34.358914 scan_static_bus for USB2 port 9 done
943 07:43:34.365258 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
944 07:43:34.365341 USB3 port 0 scanning...
945 07:43:34.368739 scan_static_bus for USB3 port 0
946 07:43:34.375954 scan_static_bus for USB3 port 0 done
947 07:43:34.378664 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
948 07:43:34.382265 USB3 port 1 scanning...
949 07:43:34.385325 scan_static_bus for USB3 port 1
950 07:43:34.388677 scan_static_bus for USB3 port 1 done
951 07:43:34.395062 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
952 07:43:34.395143 USB3 port 2 scanning...
953 07:43:34.398850 scan_static_bus for USB3 port 2
954 07:43:34.405905 scan_static_bus for USB3 port 2 done
955 07:43:34.409039 scan_bus: scanning of bus USB3 port 2 took 9697 usecs
956 07:43:34.412216 USB3 port 3 scanning...
957 07:43:34.415444 scan_static_bus for USB3 port 3
958 07:43:34.418920 scan_static_bus for USB3 port 3 done
959 07:43:34.425858 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
960 07:43:34.429154 scan_static_bus for USB0 port 0 done
961 07:43:34.432005 scan_bus: scanning of bus USB0 port 0 took 155368 usecs
962 07:43:34.438447 scan_static_bus for PCI: 00:14.0 done
963 07:43:34.442414 scan_bus: scanning of bus PCI: 00:14.0 took 172988 usecs
964 07:43:34.445347 PCI: 00:15.0 scanning...
965 07:43:34.448811 scan_generic_bus for PCI: 00:15.0
966 07:43:34.451922 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 07:43:34.458830 scan_generic_bus for PCI: 00:15.0 done
968 07:43:34.462049 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
969 07:43:34.465134 PCI: 00:15.1 scanning...
970 07:43:34.468888 scan_generic_bus for PCI: 00:15.1
971 07:43:34.471942 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 07:43:34.478940 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 07:43:34.482026 scan_generic_bus for PCI: 00:15.1 done
974 07:43:34.485381 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
975 07:43:34.488589 PCI: 00:19.0 scanning...
976 07:43:34.492326 scan_generic_bus for PCI: 00:19.0
977 07:43:34.498686 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 07:43:34.501828 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 07:43:34.504906 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 07:43:34.508344 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 07:43:34.515313 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 07:43:34.518538 scan_generic_bus for PCI: 00:19.0 done
983 07:43:34.521633 scan_bus: scanning of bus PCI: 00:19.0 took 30738 usecs
984 07:43:34.524994 PCI: 00:1d.0 scanning...
985 07:43:34.528361 do_pci_scan_bridge for PCI: 00:1d.0
986 07:43:34.531630 PCI: pci_scan_bus for bus 01
987 07:43:34.534734 PCI: 01:00.0 [1c5c/1327] enabled
988 07:43:34.537879 Enabling Common Clock Configuration
989 07:43:34.545092 L1 Sub-State supported from root port 29
990 07:43:34.545175 L1 Sub-State Support = 0xf
991 07:43:34.548326 CommonModeRestoreTime = 0x28
992 07:43:34.554756 Power On Value = 0x16, Power On Scale = 0x0
993 07:43:34.554839 ASPM: Enabled L1
994 07:43:34.561721 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
995 07:43:34.565061 PCI: 00:1e.2 scanning...
996 07:43:34.568230 scan_generic_bus for PCI: 00:1e.2
997 07:43:34.571578 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 07:43:34.574614 scan_generic_bus for PCI: 00:1e.2 done
999 07:43:34.581438 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1000 07:43:34.584710 PCI: 00:1e.3 scanning...
1001 07:43:34.588132 scan_generic_bus for PCI: 00:1e.3
1002 07:43:34.591030 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 07:43:34.594693 scan_generic_bus for PCI: 00:1e.3 done
1004 07:43:34.601025 scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs
1005 07:43:34.601108 PCI: 00:1f.0 scanning...
1006 07:43:34.604650 scan_static_bus for PCI: 00:1f.0
1007 07:43:34.608450 PNP: 0c09.0 enabled
1008 07:43:34.611279 scan_static_bus for PCI: 00:1f.0 done
1009 07:43:34.617873 scan_bus: scanning of bus PCI: 00:1f.0 took 12039 usecs
1010 07:43:34.621134 PCI: 00:1f.3 scanning...
1011 07:43:34.624454 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1012 07:43:34.627645 PCI: 00:1f.4 scanning...
1013 07:43:34.630871 scan_generic_bus for PCI: 00:1f.4
1014 07:43:34.634883 scan_generic_bus for PCI: 00:1f.4 done
1015 07:43:34.641018 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1016 07:43:34.644212 PCI: 00:1f.5 scanning...
1017 07:43:34.647477 scan_generic_bus for PCI: 00:1f.5
1018 07:43:34.650694 scan_generic_bus for PCI: 00:1f.5 done
1019 07:43:34.657454 scan_bus: scanning of bus PCI: 00:1f.5 took 10195 usecs
1020 07:43:34.664100 scan_bus: scanning of bus DOMAIN: 0000 took 604988 usecs
1021 07:43:34.667699 scan_static_bus for Root Device done
1022 07:43:34.670871 scan_bus: scanning of bus Root Device took 624864 usecs
1023 07:43:34.674240 done
1024 07:43:34.677634 Chrome EC: UHEPI supported
1025 07:43:34.680921 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 07:43:34.687620 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 07:43:34.694247 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 07:43:34.701330 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 07:43:34.704213 SPI flash protection: WPSW=0 SRP0=0
1030 07:43:34.710830 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 07:43:34.713898 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1032 07:43:34.717226 found VGA at PCI: 00:02.0
1033 07:43:34.720778 Setting up VGA for PCI: 00:02.0
1034 07:43:34.727408 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 07:43:34.730731 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 07:43:34.734107 Allocating resources...
1037 07:43:34.734188 Reading resources...
1038 07:43:34.740455 Root Device read_resources bus 0 link: 0
1039 07:43:34.743694 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 07:43:34.750511 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 07:43:34.753675 DOMAIN: 0000 read_resources bus 0 link: 0
1042 07:43:34.760720 PCI: 00:14.0 read_resources bus 0 link: 0
1043 07:43:34.763887 USB0 port 0 read_resources bus 0 link: 0
1044 07:43:34.772386 USB0 port 0 read_resources bus 0 link: 0 done
1045 07:43:34.775675 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 07:43:34.782718 PCI: 00:15.0 read_resources bus 1 link: 0
1047 07:43:34.786456 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 07:43:34.792912 PCI: 00:15.1 read_resources bus 2 link: 0
1049 07:43:34.795980 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 07:43:34.803763 PCI: 00:19.0 read_resources bus 3 link: 0
1051 07:43:34.810249 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 07:43:34.813558 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 07:43:34.820378 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 07:43:34.823336 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 07:43:34.829830 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 07:43:34.832966 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 07:43:34.840148 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 07:43:34.843203 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 07:43:34.849640 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 07:43:34.856724 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 07:43:34.859773 Root Device read_resources bus 0 link: 0 done
1062 07:43:34.863074 Done reading resources.
1063 07:43:34.866271 Show resources in subtree (Root Device)...After reading.
1064 07:43:34.873380 Root Device child on link 0 CPU_CLUSTER: 0
1065 07:43:34.876569 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 07:43:34.876651 APIC: 00
1067 07:43:34.879892 APIC: 05
1068 07:43:34.879973 APIC: 07
1069 07:43:34.883100 APIC: 01
1070 07:43:34.883181 APIC: 04
1071 07:43:34.883246 APIC: 06
1072 07:43:34.886310 APIC: 02
1073 07:43:34.886391 APIC: 03
1074 07:43:34.889659 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 07:43:34.899548 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 07:43:34.949542 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 07:43:34.949657 PCI: 00:00.0
1078 07:43:34.949800 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 07:43:34.949912 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 07:43:34.950742 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 07:43:34.950823 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 07:43:34.980082 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 07:43:34.980390 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 07:43:34.983521 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 07:43:34.986794 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 07:43:34.996915 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 07:43:35.003327 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 07:43:35.013693 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 07:43:35.023460 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 07:43:35.032926 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 07:43:35.043296 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 07:43:35.053116 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 07:43:35.062931 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 07:43:35.063033 PCI: 00:02.0
1095 07:43:35.072791 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 07:43:35.082986 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 07:43:35.092644 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 07:43:35.092773 PCI: 00:04.0
1099 07:43:35.096067 PCI: 00:08.0
1100 07:43:35.106369 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 07:43:35.106491 PCI: 00:12.0
1102 07:43:35.116085 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 07:43:35.122452 PCI: 00:14.0 child on link 0 USB0 port 0
1104 07:43:35.132238 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 07:43:35.135929 USB0 port 0 child on link 0 USB2 port 0
1106 07:43:35.139217 USB2 port 0
1107 07:43:35.139321 USB2 port 1
1108 07:43:35.142307 USB2 port 2
1109 07:43:35.142389 USB2 port 3
1110 07:43:35.145956 USB2 port 5
1111 07:43:35.146063 USB2 port 6
1112 07:43:35.149104 USB2 port 9
1113 07:43:35.149184 USB3 port 0
1114 07:43:35.152781 USB3 port 1
1115 07:43:35.152867 USB3 port 2
1116 07:43:35.156036 USB3 port 3
1117 07:43:35.156143 USB3 port 4
1118 07:43:35.159221 PCI: 00:14.2
1119 07:43:35.169044 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 07:43:35.178784 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 07:43:35.178867 PCI: 00:14.3
1122 07:43:35.188969 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 07:43:35.195140 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 07:43:35.205395 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 07:43:35.205520 I2C: 01:15
1126 07:43:35.208785 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 07:43:35.218880 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 07:43:35.222360 I2C: 02:5d
1129 07:43:35.222483 GENERIC: 0.0
1130 07:43:35.225516 PCI: 00:16.0
1131 07:43:35.235219 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 07:43:35.235344 PCI: 00:17.0
1133 07:43:35.245018 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 07:43:35.255369 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 07:43:35.262006 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 07:43:35.271482 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 07:43:35.278360 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 07:43:35.288004 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 07:43:35.291545 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 07:43:35.301212 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 07:43:35.304428 I2C: 03:1a
1142 07:43:35.304554 I2C: 03:38
1143 07:43:35.307845 I2C: 03:39
1144 07:43:35.307927 I2C: 03:3a
1145 07:43:35.311352 I2C: 03:3b
1146 07:43:35.314929 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 07:43:35.324381 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 07:43:35.334641 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 07:43:35.341176 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 07:43:35.344464 PCI: 01:00.0
1151 07:43:35.354010 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 07:43:35.357639 PCI: 00:1e.0
1153 07:43:35.367291 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 07:43:35.376985 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 07:43:35.380728 PCI: 00:1e.2 child on link 0 SPI: 00
1156 07:43:35.390493 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 07:43:35.390575 SPI: 00
1158 07:43:35.396851 PCI: 00:1e.3 child on link 0 SPI: 01
1159 07:43:35.407315 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 07:43:35.407444 SPI: 01
1161 07:43:35.410600 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 07:43:35.420121 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 07:43:35.430126 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 07:43:35.430232 PNP: 0c09.0
1165 07:43:35.440591 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 07:43:35.440674 PCI: 00:1f.3
1167 07:43:35.450376 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 07:43:35.460324 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 07:43:35.463437 PCI: 00:1f.4
1170 07:43:35.472995 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 07:43:35.483122 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 07:43:35.483221 PCI: 00:1f.5
1173 07:43:35.493596 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 07:43:35.499689 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 07:43:35.506325 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 07:43:35.513117 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 07:43:35.516313 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 07:43:35.519666 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 07:43:35.522812 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 07:43:35.525964 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 07:43:35.532821 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 07:43:35.539177 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 07:43:35.549423 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 07:43:35.556036 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 07:43:35.563110 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 07:43:35.566251 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 07:43:35.575879 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 07:43:35.579027 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 07:43:35.585577 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 07:43:35.588950 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 07:43:35.592489 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 07:43:35.598728 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 07:43:35.601981 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 07:43:35.608714 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 07:43:35.612623 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 07:43:35.618969 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 07:43:35.622167 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 07:43:35.628730 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 07:43:35.631820 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 07:43:35.638881 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 07:43:35.641922 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 07:43:35.648729 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 07:43:35.651922 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 07:43:35.658602 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 07:43:35.661977 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 07:43:35.668275 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 07:43:35.671880 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 07:43:35.674962 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 07:43:35.681587 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 07:43:35.684781 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 07:43:35.694676 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 07:43:35.698746 avoid_fixed_resources: DOMAIN: 0000
1213 07:43:35.704661 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 07:43:35.711617 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 07:43:35.717944 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 07:43:35.724634 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 07:43:35.734486 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 07:43:35.741412 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 07:43:35.747873 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 07:43:35.757942 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 07:43:35.764213 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 07:43:35.771482 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 07:43:35.778104 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 07:43:35.784416 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 07:43:35.788084 Setting resources...
1226 07:43:35.794520 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 07:43:35.797952 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 07:43:35.801337 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 07:43:35.807680 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 07:43:35.811221 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 07:43:35.817432 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 07:43:35.824082 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 07:43:35.831057 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 07:43:35.837388 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 07:43:35.840311 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 07:43:35.847026 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 07:43:35.850475 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 07:43:35.856953 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 07:43:35.860355 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 07:43:35.867243 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 07:43:35.870589 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 07:43:35.876866 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 07:43:35.880078 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 07:43:35.887104 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 07:43:35.890246 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 07:43:35.896777 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 07:43:35.900031 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 07:43:35.906605 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 07:43:35.909985 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 07:43:35.913306 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 07:43:35.919789 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 07:43:35.923168 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 07:43:35.930128 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 07:43:35.933356 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 07:43:35.939650 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 07:43:35.942924 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 07:43:35.949593 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 07:43:35.956609 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 07:43:35.962772 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 07:43:35.969185 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 07:43:35.979693 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 07:43:35.982707 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 07:43:35.989429 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 07:43:35.996049 Root Device assign_resources, bus 0 link: 0
1265 07:43:35.999110 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 07:43:36.008881 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 07:43:36.016053 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 07:43:36.025897 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 07:43:36.032281 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 07:43:36.042248 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 07:43:36.048703 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 07:43:36.055673 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 07:43:36.058883 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 07:43:36.065644 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 07:43:36.075544 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 07:43:36.081851 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 07:43:36.091809 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 07:43:36.095286 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 07:43:36.101812 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 07:43:36.108405 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 07:43:36.115330 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 07:43:36.118689 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 07:43:36.125490 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 07:43:36.135495 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 07:43:36.141947 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 07:43:36.151567 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 07:43:36.158779 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 07:43:36.164872 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 07:43:36.174689 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 07:43:36.181247 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 07:43:36.184538 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 07:43:36.191352 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 07:43:36.197815 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 07:43:36.208109 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 07:43:36.217597 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 07:43:36.221252 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 07:43:36.230886 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 07:43:36.234190 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 07:43:36.243995 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 07:43:36.250737 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 07:43:36.253865 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 07:43:36.260473 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 07:43:36.267446 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 07:43:36.273645 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 07:43:36.276888 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 07:43:36.283853 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 07:43:36.287027 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 07:43:36.293486 LPC: Trying to open IO window from 800 size 1ff
1309 07:43:36.300035 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 07:43:36.310254 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 07:43:36.316731 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 07:43:36.323223 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 07:43:36.330388 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 07:43:36.333718 Root Device assign_resources, bus 0 link: 0
1315 07:43:36.337161 Done setting resources.
1316 07:43:36.343300 Show resources in subtree (Root Device)...After assigning values.
1317 07:43:36.346912 Root Device child on link 0 CPU_CLUSTER: 0
1318 07:43:36.353695 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 07:43:36.353777 APIC: 00
1320 07:43:36.353842 APIC: 05
1321 07:43:36.356713 APIC: 07
1322 07:43:36.356785 APIC: 01
1323 07:43:36.356846 APIC: 04
1324 07:43:36.360240 APIC: 06
1325 07:43:36.360337 APIC: 02
1326 07:43:36.363384 APIC: 03
1327 07:43:36.366822 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 07:43:36.376849 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 07:43:36.386513 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 07:43:36.389830 PCI: 00:00.0
1331 07:43:36.399461 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 07:43:36.406471 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 07:43:36.416179 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 07:43:36.426283 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 07:43:36.436010 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 07:43:36.445662 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 07:43:36.456397 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 07:43:36.462483 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 07:43:36.472280 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 07:43:36.482331 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 07:43:36.492228 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 07:43:36.502373 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 07:43:36.512239 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 07:43:36.521918 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 07:43:36.528937 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 07:43:36.538372 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 07:43:36.541721 PCI: 00:02.0
1348 07:43:36.551713 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 07:43:36.561529 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 07:43:36.571627 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 07:43:36.571714 PCI: 00:04.0
1352 07:43:36.574873 PCI: 00:08.0
1353 07:43:36.584662 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 07:43:36.584746 PCI: 00:12.0
1355 07:43:36.597989 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 07:43:36.601244 PCI: 00:14.0 child on link 0 USB0 port 0
1357 07:43:36.610935 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 07:43:36.614857 USB0 port 0 child on link 0 USB2 port 0
1359 07:43:36.617771 USB2 port 0
1360 07:43:36.617858 USB2 port 1
1361 07:43:36.620880 USB2 port 2
1362 07:43:36.620962 USB2 port 3
1363 07:43:36.624579 USB2 port 5
1364 07:43:36.627730 USB2 port 6
1365 07:43:36.627818 USB2 port 9
1366 07:43:36.631344 USB3 port 0
1367 07:43:36.631425 USB3 port 1
1368 07:43:36.634530 USB3 port 2
1369 07:43:36.634614 USB3 port 3
1370 07:43:36.637580 USB3 port 4
1371 07:43:36.637663 PCI: 00:14.2
1372 07:43:36.647362 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 07:43:36.657449 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 07:43:36.660548 PCI: 00:14.3
1375 07:43:36.670809 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 07:43:36.673878 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 07:43:36.684130 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 07:43:36.687301 I2C: 01:15
1379 07:43:36.690554 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 07:43:36.700458 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 07:43:36.704130 I2C: 02:5d
1382 07:43:36.704213 GENERIC: 0.0
1383 07:43:36.707445 PCI: 00:16.0
1384 07:43:36.717272 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 07:43:36.717354 PCI: 00:17.0
1386 07:43:36.730358 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 07:43:36.740094 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 07:43:36.746769 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 07:43:36.757000 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 07:43:36.766633 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 07:43:36.776309 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 07:43:36.780242 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 07:43:36.789862 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 07:43:36.792913 I2C: 03:1a
1395 07:43:36.793007 I2C: 03:38
1396 07:43:36.796307 I2C: 03:39
1397 07:43:36.796417 I2C: 03:3a
1398 07:43:36.799423 I2C: 03:3b
1399 07:43:36.803243 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 07:43:36.813274 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 07:43:36.822797 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 07:43:36.832581 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 07:43:36.836518 PCI: 01:00.0
1404 07:43:36.846241 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 07:43:36.846325 PCI: 00:1e.0
1406 07:43:36.859290 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 07:43:36.869348 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 07:43:36.872316 PCI: 00:1e.2 child on link 0 SPI: 00
1409 07:43:36.882576 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 07:43:36.882685 SPI: 00
1411 07:43:36.889048 PCI: 00:1e.3 child on link 0 SPI: 01
1412 07:43:36.899123 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 07:43:36.899250 SPI: 01
1414 07:43:36.902293 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 07:43:36.911822 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 07:43:36.922311 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 07:43:36.922395 PNP: 0c09.0
1418 07:43:36.931719 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 07:43:36.931819 PCI: 00:1f.3
1420 07:43:36.945189 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 07:43:36.954723 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 07:43:36.954806 PCI: 00:1f.4
1423 07:43:36.964811 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 07:43:36.974573 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 07:43:36.978330 PCI: 00:1f.5
1426 07:43:36.987898 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 07:43:36.988015 Done allocating resources.
1428 07:43:36.994811 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 07:43:36.997898 Enabling resources...
1430 07:43:37.000944 PCI: 00:00.0 subsystem <- 8086/9b61
1431 07:43:37.004621 PCI: 00:00.0 cmd <- 06
1432 07:43:37.007796 PCI: 00:02.0 subsystem <- 8086/9b41
1433 07:43:37.010956 PCI: 00:02.0 cmd <- 03
1434 07:43:37.014147 PCI: 00:08.0 cmd <- 06
1435 07:43:37.017547 PCI: 00:12.0 subsystem <- 8086/02f9
1436 07:43:37.021218 PCI: 00:12.0 cmd <- 02
1437 07:43:37.024423 PCI: 00:14.0 subsystem <- 8086/02ed
1438 07:43:37.027765 PCI: 00:14.0 cmd <- 02
1439 07:43:37.027847 PCI: 00:14.2 cmd <- 02
1440 07:43:37.034688 PCI: 00:14.3 subsystem <- 8086/02f0
1441 07:43:37.034769 PCI: 00:14.3 cmd <- 02
1442 07:43:37.037826 PCI: 00:15.0 subsystem <- 8086/02e8
1443 07:43:37.040878 PCI: 00:15.0 cmd <- 02
1444 07:43:37.043926 PCI: 00:15.1 subsystem <- 8086/02e9
1445 07:43:37.047808 PCI: 00:15.1 cmd <- 02
1446 07:43:37.050781 PCI: 00:16.0 subsystem <- 8086/02e0
1447 07:43:37.054153 PCI: 00:16.0 cmd <- 02
1448 07:43:37.057366 PCI: 00:17.0 subsystem <- 8086/02d3
1449 07:43:37.060891 PCI: 00:17.0 cmd <- 03
1450 07:43:37.064383 PCI: 00:19.0 subsystem <- 8086/02c5
1451 07:43:37.067430 PCI: 00:19.0 cmd <- 02
1452 07:43:37.070613 PCI: 00:1d.0 bridge ctrl <- 0013
1453 07:43:37.073888 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 07:43:37.077284 PCI: 00:1d.0 cmd <- 06
1455 07:43:37.080485 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 07:43:37.080638 PCI: 00:1e.0 cmd <- 06
1457 07:43:37.087695 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 07:43:37.087847 PCI: 00:1e.2 cmd <- 06
1459 07:43:37.090828 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 07:43:37.094072 PCI: 00:1e.3 cmd <- 02
1461 07:43:37.097416 PCI: 00:1f.0 subsystem <- 8086/0284
1462 07:43:37.100733 PCI: 00:1f.0 cmd <- 407
1463 07:43:37.103693 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 07:43:37.107161 PCI: 00:1f.3 cmd <- 02
1465 07:43:37.110514 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 07:43:37.113704 PCI: 00:1f.4 cmd <- 03
1467 07:43:37.117203 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 07:43:37.120535 PCI: 00:1f.5 cmd <- 406
1469 07:43:37.128807 PCI: 01:00.0 cmd <- 02
1470 07:43:37.133648 done.
1471 07:43:37.147017 ME: Version: 14.0.39.1367
1472 07:43:37.153299 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 07:43:37.156527 Initializing devices...
1474 07:43:37.156647 Root Device init ...
1475 07:43:37.163856 Chrome EC: Set SMI mask to 0x0000000000000000
1476 07:43:37.167033 Chrome EC: clear events_b mask to 0x0000000000000000
1477 07:43:37.173060 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 07:43:37.179965 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 07:43:37.186620 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 07:43:37.189800 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 07:43:37.193053 Root Device init finished in 35162 usecs
1482 07:43:37.196732 CPU_CLUSTER: 0 init ...
1483 07:43:37.203206 CPU_CLUSTER: 0 init finished in 2449 usecs
1484 07:43:37.207810 PCI: 00:00.0 init ...
1485 07:43:37.210953 CPU TDP: 15 Watts
1486 07:43:37.214308 CPU PL2 = 64 Watts
1487 07:43:37.217667 PCI: 00:00.0 init finished in 7074 usecs
1488 07:43:37.220909 PCI: 00:02.0 init ...
1489 07:43:37.224178 PCI: 00:02.0 init finished in 2254 usecs
1490 07:43:37.227315 PCI: 00:08.0 init ...
1491 07:43:37.230644 PCI: 00:08.0 init finished in 2251 usecs
1492 07:43:37.234072 PCI: 00:12.0 init ...
1493 07:43:37.237426 PCI: 00:12.0 init finished in 2253 usecs
1494 07:43:37.240443 PCI: 00:14.0 init ...
1495 07:43:37.243909 PCI: 00:14.0 init finished in 2252 usecs
1496 07:43:37.247195 PCI: 00:14.2 init ...
1497 07:43:37.250906 PCI: 00:14.2 init finished in 2252 usecs
1498 07:43:37.253817 PCI: 00:14.3 init ...
1499 07:43:37.257356 PCI: 00:14.3 init finished in 2272 usecs
1500 07:43:37.260860 PCI: 00:15.0 init ...
1501 07:43:37.263773 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 07:43:37.266945 PCI: 00:15.0 init finished in 5975 usecs
1503 07:43:37.270431 PCI: 00:15.1 init ...
1504 07:43:37.273811 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 07:43:37.280388 PCI: 00:15.1 init finished in 5976 usecs
1506 07:43:37.280472 PCI: 00:16.0 init ...
1507 07:43:37.286594 PCI: 00:16.0 init finished in 2251 usecs
1508 07:43:37.290148 PCI: 00:19.0 init ...
1509 07:43:37.293224 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 07:43:37.296502 PCI: 00:19.0 init finished in 5978 usecs
1511 07:43:37.299788 PCI: 00:1d.0 init ...
1512 07:43:37.303092 Initializing PCH PCIe bridge.
1513 07:43:37.306257 PCI: 00:1d.0 init finished in 5283 usecs
1514 07:43:37.310090 PCI: 00:1f.0 init ...
1515 07:43:37.313351 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 07:43:37.319780 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 07:43:37.319886 IOAPIC: ID = 0x02
1518 07:43:37.323015 IOAPIC: Dumping registers
1519 07:43:37.326323 reg 0x0000: 0x02000000
1520 07:43:37.329823 reg 0x0001: 0x00770020
1521 07:43:37.329906 reg 0x0002: 0x00000000
1522 07:43:37.336171 PCI: 00:1f.0 init finished in 23552 usecs
1523 07:43:37.339332 PCI: 00:1f.4 init ...
1524 07:43:37.343019 PCI: 00:1f.4 init finished in 2263 usecs
1525 07:43:37.353902 PCI: 01:00.0 init ...
1526 07:43:37.357043 PCI: 01:00.0 init finished in 2252 usecs
1527 07:43:37.361221 PNP: 0c09.0 init ...
1528 07:43:37.364310 Google Chrome EC uptime: 11.092 seconds
1529 07:43:37.371600 Google Chrome AP resets since EC boot: 0
1530 07:43:37.374395 Google Chrome most recent AP reset causes:
1531 07:43:37.380886 Google Chrome EC reset flags at last EC boot: reset-pin
1532 07:43:37.384025 PNP: 0c09.0 init finished in 20581 usecs
1533 07:43:37.387659 Devices initialized
1534 07:43:37.390681 Show all devs... After init.
1535 07:43:37.390804 Root Device: enabled 1
1536 07:43:37.393959 CPU_CLUSTER: 0: enabled 1
1537 07:43:37.397766 DOMAIN: 0000: enabled 1
1538 07:43:37.397889 APIC: 00: enabled 1
1539 07:43:37.401036 PCI: 00:00.0: enabled 1
1540 07:43:37.404363 PCI: 00:02.0: enabled 1
1541 07:43:37.407816 PCI: 00:04.0: enabled 0
1542 07:43:37.407938 PCI: 00:05.0: enabled 0
1543 07:43:37.410635 PCI: 00:12.0: enabled 1
1544 07:43:37.414117 PCI: 00:12.5: enabled 0
1545 07:43:37.417579 PCI: 00:12.6: enabled 0
1546 07:43:37.417703 PCI: 00:14.0: enabled 1
1547 07:43:37.420771 PCI: 00:14.1: enabled 0
1548 07:43:37.424045 PCI: 00:14.3: enabled 1
1549 07:43:37.424176 PCI: 00:14.5: enabled 0
1550 07:43:37.427361 PCI: 00:15.0: enabled 1
1551 07:43:37.430650 PCI: 00:15.1: enabled 1
1552 07:43:37.433746 PCI: 00:15.2: enabled 0
1553 07:43:37.433856 PCI: 00:15.3: enabled 0
1554 07:43:37.436953 PCI: 00:16.0: enabled 1
1555 07:43:37.440430 PCI: 00:16.1: enabled 0
1556 07:43:37.444138 PCI: 00:16.2: enabled 0
1557 07:43:37.444254 PCI: 00:16.3: enabled 0
1558 07:43:37.447641 PCI: 00:16.4: enabled 0
1559 07:43:37.450668 PCI: 00:16.5: enabled 0
1560 07:43:37.454022 PCI: 00:17.0: enabled 1
1561 07:43:37.454143 PCI: 00:19.0: enabled 1
1562 07:43:37.457244 PCI: 00:19.1: enabled 0
1563 07:43:37.460566 PCI: 00:19.2: enabled 0
1564 07:43:37.460718 PCI: 00:1a.0: enabled 0
1565 07:43:37.463658 PCI: 00:1c.0: enabled 0
1566 07:43:37.466984 PCI: 00:1c.1: enabled 0
1567 07:43:37.470354 PCI: 00:1c.2: enabled 0
1568 07:43:37.470475 PCI: 00:1c.3: enabled 0
1569 07:43:37.473526 PCI: 00:1c.4: enabled 0
1570 07:43:37.476645 PCI: 00:1c.5: enabled 0
1571 07:43:37.480642 PCI: 00:1c.6: enabled 0
1572 07:43:37.480723 PCI: 00:1c.7: enabled 0
1573 07:43:37.483538 PCI: 00:1d.0: enabled 1
1574 07:43:37.486770 PCI: 00:1d.1: enabled 0
1575 07:43:37.490100 PCI: 00:1d.2: enabled 0
1576 07:43:37.490180 PCI: 00:1d.3: enabled 0
1577 07:43:37.493811 PCI: 00:1d.4: enabled 0
1578 07:43:37.497093 PCI: 00:1d.5: enabled 0
1579 07:43:37.500161 PCI: 00:1e.0: enabled 1
1580 07:43:37.500244 PCI: 00:1e.1: enabled 0
1581 07:43:37.503586 PCI: 00:1e.2: enabled 1
1582 07:43:37.506773 PCI: 00:1e.3: enabled 1
1583 07:43:37.506853 PCI: 00:1f.0: enabled 1
1584 07:43:37.510221 PCI: 00:1f.1: enabled 0
1585 07:43:37.513269 PCI: 00:1f.2: enabled 0
1586 07:43:37.516932 PCI: 00:1f.3: enabled 1
1587 07:43:37.517060 PCI: 00:1f.4: enabled 1
1588 07:43:37.519927 PCI: 00:1f.5: enabled 1
1589 07:43:37.523597 PCI: 00:1f.6: enabled 0
1590 07:43:37.526577 USB0 port 0: enabled 1
1591 07:43:37.526699 I2C: 01:15: enabled 1
1592 07:43:37.530016 I2C: 02:5d: enabled 1
1593 07:43:37.533220 GENERIC: 0.0: enabled 1
1594 07:43:37.533300 I2C: 03:1a: enabled 1
1595 07:43:37.536640 I2C: 03:38: enabled 1
1596 07:43:37.539809 I2C: 03:39: enabled 1
1597 07:43:37.539890 I2C: 03:3a: enabled 1
1598 07:43:37.543424 I2C: 03:3b: enabled 1
1599 07:43:37.546607 PCI: 00:00.0: enabled 1
1600 07:43:37.546687 SPI: 00: enabled 1
1601 07:43:37.549506 SPI: 01: enabled 1
1602 07:43:37.553283 PNP: 0c09.0: enabled 1
1603 07:43:37.553364 USB2 port 0: enabled 1
1604 07:43:37.556512 USB2 port 1: enabled 1
1605 07:43:37.559690 USB2 port 2: enabled 0
1606 07:43:37.559770 USB2 port 3: enabled 0
1607 07:43:37.562795 USB2 port 5: enabled 0
1608 07:43:37.566707 USB2 port 6: enabled 1
1609 07:43:37.569877 USB2 port 9: enabled 1
1610 07:43:37.569957 USB3 port 0: enabled 1
1611 07:43:37.573198 USB3 port 1: enabled 1
1612 07:43:37.576435 USB3 port 2: enabled 1
1613 07:43:37.576542 USB3 port 3: enabled 1
1614 07:43:37.579712 USB3 port 4: enabled 0
1615 07:43:37.582983 APIC: 05: enabled 1
1616 07:43:37.583064 APIC: 07: enabled 1
1617 07:43:37.586377 APIC: 01: enabled 1
1618 07:43:37.589443 APIC: 04: enabled 1
1619 07:43:37.589524 APIC: 06: enabled 1
1620 07:43:37.593180 APIC: 02: enabled 1
1621 07:43:37.593263 APIC: 03: enabled 1
1622 07:43:37.596435 PCI: 00:08.0: enabled 1
1623 07:43:37.599704 PCI: 00:14.2: enabled 1
1624 07:43:37.602902 PCI: 01:00.0: enabled 1
1625 07:43:37.606641 Disabling ACPI via APMC:
1626 07:43:37.606722 done.
1627 07:43:37.613188 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 07:43:37.616089 ELOG: NV offset 0xaf0000 size 0x4000
1629 07:43:37.622988 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 07:43:37.629986 ELOG: Event(17) added with size 13 at 2024-01-03 07:40:59 UTC
1631 07:43:37.636228 ELOG: Event(92) added with size 9 at 2024-01-03 07:40:59 UTC
1632 07:43:37.643294 ELOG: Event(93) added with size 9 at 2024-01-03 07:40:59 UTC
1633 07:43:37.649971 ELOG: Event(9A) added with size 9 at 2024-01-03 07:40:59 UTC
1634 07:43:37.655921 ELOG: Event(9E) added with size 10 at 2024-01-03 07:40:59 UTC
1635 07:43:37.662823 ELOG: Event(9F) added with size 14 at 2024-01-03 07:40:59 UTC
1636 07:43:37.666372 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1637 07:43:37.673154 ELOG: Event(A1) added with size 10 at 2024-01-03 07:40:59 UTC
1638 07:43:37.683484 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 07:43:37.689987 ELOG: Event(A0) added with size 9 at 2024-01-03 07:40:59 UTC
1640 07:43:37.693153 elog_add_boot_reason: Logged dev mode boot
1641 07:43:37.696421 Finalize devices...
1642 07:43:37.696523 PCI: 00:17.0 final
1643 07:43:37.699549 Devices finalized
1644 07:43:37.703066 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 07:43:37.709415 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 07:43:37.713129 ME: HFSTS1 : 0x90000245
1647 07:43:37.716476 ME: HFSTS2 : 0x3B850126
1648 07:43:37.722623 ME: HFSTS3 : 0x00000020
1649 07:43:37.726397 ME: HFSTS4 : 0x00004800
1650 07:43:37.729501 ME: HFSTS5 : 0x00000000
1651 07:43:37.732710 ME: HFSTS6 : 0x40400006
1652 07:43:37.735872 ME: Manufacturing Mode : NO
1653 07:43:37.739315 ME: FW Partition Table : OK
1654 07:43:37.742542 ME: Bringup Loader Failure : NO
1655 07:43:37.746113 ME: Firmware Init Complete : YES
1656 07:43:37.749392 ME: Boot Options Present : NO
1657 07:43:37.752863 ME: Update In Progress : NO
1658 07:43:37.755985 ME: D0i3 Support : YES
1659 07:43:37.759207 ME: Low Power State Enabled : NO
1660 07:43:37.762364 ME: CPU Replaced : NO
1661 07:43:37.766159 ME: CPU Replacement Valid : YES
1662 07:43:37.769213 ME: Current Working State : 5
1663 07:43:37.772224 ME: Current Operation State : 1
1664 07:43:37.776035 ME: Current Operation Mode : 0
1665 07:43:37.779502 ME: Error Code : 0
1666 07:43:37.782213 ME: CPU Debug Disabled : YES
1667 07:43:37.785814 ME: TXT Support : NO
1668 07:43:37.792362 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 07:43:37.799293 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 07:43:37.799408 CBFS @ c08000 size 3f8000
1671 07:43:37.805468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 07:43:37.809026 CBFS: Locating 'fallback/dsdt.aml'
1673 07:43:37.812485 CBFS: Found @ offset 10bb80 size 3fa5
1674 07:43:37.818681 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 07:43:37.822231 CBFS @ c08000 size 3f8000
1676 07:43:37.825236 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 07:43:37.828890 CBFS: Locating 'fallback/slic'
1678 07:43:37.833978 CBFS: 'fallback/slic' not found.
1679 07:43:37.840481 ACPI: Writing ACPI tables at 99b3e000.
1680 07:43:37.840562 ACPI: * FACS
1681 07:43:37.843714 ACPI: * DSDT
1682 07:43:37.847424 Ramoops buffer: 0x100000@0x99a3d000.
1683 07:43:37.850891 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 07:43:37.857332 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 07:43:37.860560 Google Chrome EC: version:
1686 07:43:37.863567 ro: helios_v2.0.2659-56403530b
1687 07:43:37.866650 rw: helios_v2.0.2849-c41de27e7d
1688 07:43:37.866749 running image: 1
1689 07:43:37.871207 ACPI: * FADT
1690 07:43:37.871305 SCI is IRQ9
1691 07:43:37.877874 ACPI: added table 1/32, length now 40
1692 07:43:37.877953 ACPI: * SSDT
1693 07:43:37.880926 Found 1 CPU(s) with 8 core(s) each.
1694 07:43:37.884603 Error: Could not locate 'wifi_sar' in VPD.
1695 07:43:37.890839 Checking CBFS for default SAR values
1696 07:43:37.894654 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 07:43:37.897772 CBFS @ c08000 size 3f8000
1698 07:43:37.904022 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 07:43:37.907768 CBFS: Locating 'wifi_sar_defaults.hex'
1700 07:43:37.911323 CBFS: Found @ offset 5fac0 size 77
1701 07:43:37.914031 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 07:43:37.920825 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 07:43:37.924163 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 07:43:37.930747 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 07:43:37.934079 failed to find key in VPD: dsm_calib_r0_0
1706 07:43:37.944405 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 07:43:37.947473 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 07:43:37.950664 failed to find key in VPD: dsm_calib_r0_1
1709 07:43:37.960424 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 07:43:37.967431 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 07:43:37.970411 failed to find key in VPD: dsm_calib_r0_2
1712 07:43:37.980473 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 07:43:37.983628 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 07:43:37.990116 failed to find key in VPD: dsm_calib_r0_3
1715 07:43:37.997271 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 07:43:38.004005 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 07:43:38.006873 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 07:43:38.010167 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 07:43:38.014270 EC returned error result code 1
1720 07:43:38.018155 EC returned error result code 1
1721 07:43:38.021966 EC returned error result code 1
1722 07:43:38.027993 PS2K: Bad resp from EC. Vivaldi disabled!
1723 07:43:38.031338 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 07:43:38.037935 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 07:43:38.044610 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 07:43:38.048182 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 07:43:38.054623 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 07:43:38.061388 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 07:43:38.067830 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 07:43:38.071197 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 07:43:38.078073 ACPI: added table 2/32, length now 44
1732 07:43:38.078161 ACPI: * MCFG
1733 07:43:38.081301 ACPI: added table 3/32, length now 48
1734 07:43:38.084600 ACPI: * TPM2
1735 07:43:38.087805 TPM2 log created at 99a2d000
1736 07:43:38.091023 ACPI: added table 4/32, length now 52
1737 07:43:38.091105 ACPI: * MADT
1738 07:43:38.094320 SCI is IRQ9
1739 07:43:38.097778 ACPI: added table 5/32, length now 56
1740 07:43:38.097883 current = 99b43ac0
1741 07:43:38.100834 ACPI: * DMAR
1742 07:43:38.104686 ACPI: added table 6/32, length now 60
1743 07:43:38.107820 ACPI: * IGD OpRegion
1744 07:43:38.107901 GMA: Found VBT in CBFS
1745 07:43:38.110890 GMA: Found valid VBT in CBFS
1746 07:43:38.114585 ACPI: added table 7/32, length now 64
1747 07:43:38.117521 ACPI: * HPET
1748 07:43:38.120641 ACPI: added table 8/32, length now 68
1749 07:43:38.120723 ACPI: done.
1750 07:43:38.124280 ACPI tables: 31744 bytes.
1751 07:43:38.127694 smbios_write_tables: 99a2c000
1752 07:43:38.130913 EC returned error result code 3
1753 07:43:38.134175 Couldn't obtain OEM name from CBI
1754 07:43:38.138020 Create SMBIOS type 17
1755 07:43:38.140983 PCI: 00:00.0 (Intel Cannonlake)
1756 07:43:38.144875 PCI: 00:14.3 (Intel WiFi)
1757 07:43:38.147670 SMBIOS tables: 939 bytes.
1758 07:43:38.151339 Writing table forward entry at 0x00000500
1759 07:43:38.157539 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 07:43:38.161046 Writing coreboot table at 0x99b62000
1761 07:43:38.167848 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 07:43:38.171024 1. 0000000000001000-000000000009ffff: RAM
1763 07:43:38.174370 2. 00000000000a0000-00000000000fffff: RESERVED
1764 07:43:38.180692 3. 0000000000100000-0000000099a2bfff: RAM
1765 07:43:38.184318 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 07:43:38.190675 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 07:43:38.197099 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 07:43:38.200679 7. 000000009a000000-000000009f7fffff: RESERVED
1769 07:43:38.207144 8. 00000000e0000000-00000000efffffff: RESERVED
1770 07:43:38.210381 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 07:43:38.213661 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 07:43:38.220836 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 07:43:38.223967 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 07:43:38.230640 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 07:43:38.233750 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 07:43:38.240151 15. 0000000100000000-000000045e7fffff: RAM
1777 07:43:38.243552 Graphics framebuffer located at 0xc0000000
1778 07:43:38.247178 Passing 5 GPIOs to payload:
1779 07:43:38.250277 NAME | PORT | POLARITY | VALUE
1780 07:43:38.257152 write protect | undefined | high | low
1781 07:43:38.260195 lid | undefined | high | high
1782 07:43:38.266795 power | undefined | high | low
1783 07:43:38.273712 oprom | undefined | high | low
1784 07:43:38.276691 EC in RW | 0x000000cb | high | low
1785 07:43:38.280325 Board ID: 4
1786 07:43:38.283440 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 07:43:38.286970 CBFS @ c08000 size 3f8000
1788 07:43:38.293682 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 07:43:38.296956 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1790 07:43:38.299940 coreboot table: 1492 bytes.
1791 07:43:38.303354 IMD ROOT 0. 99fff000 00001000
1792 07:43:38.306633 IMD SMALL 1. 99ffe000 00001000
1793 07:43:38.310122 FSP MEMORY 2. 99c4e000 003b0000
1794 07:43:38.313779 CONSOLE 3. 99c2e000 00020000
1795 07:43:38.316940 FMAP 4. 99c2d000 0000054e
1796 07:43:38.320122 TIME STAMP 5. 99c2c000 00000910
1797 07:43:38.323590 VBOOT WORK 6. 99c18000 00014000
1798 07:43:38.326751 MRC DATA 7. 99c16000 00001958
1799 07:43:38.330090 ROMSTG STCK 8. 99c15000 00001000
1800 07:43:38.333548 AFTER CAR 9. 99c0b000 0000a000
1801 07:43:38.336788 RAMSTAGE 10. 99baf000 0005c000
1802 07:43:38.339915 REFCODE 11. 99b7a000 00035000
1803 07:43:38.343568 SMM BACKUP 12. 99b6a000 00010000
1804 07:43:38.346790 COREBOOT 13. 99b62000 00008000
1805 07:43:38.349536 ACPI 14. 99b3e000 00024000
1806 07:43:38.353408 ACPI GNVS 15. 99b3d000 00001000
1807 07:43:38.356514 RAMOOPS 16. 99a3d000 00100000
1808 07:43:38.359675 TPM2 TCGLOG17. 99a2d000 00010000
1809 07:43:38.362841 SMBIOS 18. 99a2c000 00000800
1810 07:43:38.366832 IMD small region:
1811 07:43:38.369997 IMD ROOT 0. 99ffec00 00000400
1812 07:43:38.373033 FSP RUNTIME 1. 99ffebe0 00000004
1813 07:43:38.376318 EC HOSTEVENT 2. 99ffebc0 00000008
1814 07:43:38.379504 POWER STATE 3. 99ffeb80 00000040
1815 07:43:38.382896 ROMSTAGE 4. 99ffeb60 00000004
1816 07:43:38.386455 MEM INFO 5. 99ffe9a0 000001b9
1817 07:43:38.389715 VPD 6. 99ffe920 0000006c
1818 07:43:38.392837 MTRR: Physical address space:
1819 07:43:38.399614 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 07:43:38.405990 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 07:43:38.412989 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 07:43:38.419454 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 07:43:38.426080 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 07:43:38.432815 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 07:43:38.439179 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 07:43:38.442597 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 07:43:38.445701 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 07:43:38.448943 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 07:43:38.452888 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 07:43:38.459052 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 07:43:38.462406 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 07:43:38.465516 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 07:43:38.468696 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 07:43:38.475282 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 07:43:38.478705 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 07:43:38.481944 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 07:43:38.485297 call enable_fixed_mtrr()
1838 07:43:38.488853 CPU physical address size: 39 bits
1839 07:43:38.495272 MTRR: default type WB/UC MTRR counts: 6/8.
1840 07:43:38.498623 MTRR: WB selected as default type.
1841 07:43:38.502079 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 07:43:38.508764 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 07:43:38.514949 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 07:43:38.521760 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 07:43:38.528579 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 07:43:38.534915 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 07:43:38.538133 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 07:43:38.544618 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 07:43:38.548308 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 07:43:38.551431 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 07:43:38.554870 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 07:43:38.561176 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 07:43:38.564235 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 07:43:38.567677 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 07:43:38.571473 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 07:43:38.577935 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 07:43:38.581147 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 07:43:38.581269
1859 07:43:38.581388 MTRR check
1860 07:43:38.584697 Fixed MTRRs : Enabled
1861 07:43:38.587786 Variable MTRRs: Enabled
1862 07:43:38.587904
1863 07:43:38.590988 call enable_fixed_mtrr()
1864 07:43:38.594297 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 07:43:38.597349 CPU physical address size: 39 bits
1866 07:43:38.604685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 07:43:38.607567 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 07:43:38.611085 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 07:43:38.617950 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 07:43:38.620862 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 07:43:38.624331 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 07:43:38.627425 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 07:43:38.634044 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 07:43:38.637854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 07:43:38.641036 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 07:43:38.644330 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 07:43:38.647435 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 07:43:38.654007 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 07:43:38.657749 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 07:43:38.661295 call enable_fixed_mtrr()
1881 07:43:38.664297 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 07:43:38.667473 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 07:43:38.674073 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 07:43:38.677218 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 07:43:38.680412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 07:43:38.683769 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 07:43:38.686977 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 07:43:38.693807 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 07:43:38.697178 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 07:43:38.700943 CPU physical address size: 39 bits
1891 07:43:38.703907 call enable_fixed_mtrr()
1892 07:43:38.707142 CBFS @ c08000 size 3f8000
1893 07:43:38.710511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1894 07:43:38.717178 CPU physical address size: 39 bits
1895 07:43:38.720308 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 07:43:38.723366 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 07:43:38.726859 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 07:43:38.730415 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 07:43:38.737353 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 07:43:38.740376 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 07:43:38.743269 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 07:43:38.746825 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 07:43:38.753391 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 07:43:38.756835 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 07:43:38.760049 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 07:43:38.763017 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 07:43:38.769583 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 07:43:38.769730 call enable_fixed_mtrr()
1909 07:43:38.776779 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 07:43:38.779679 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 07:43:38.783060 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 07:43:38.786309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 07:43:38.792864 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 07:43:38.796653 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 07:43:38.799314 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 07:43:38.803069 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 07:43:38.809474 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 07:43:38.812754 CPU physical address size: 39 bits
1919 07:43:38.815988 call enable_fixed_mtrr()
1920 07:43:38.819118 CBFS: Locating 'fallback/payload'
1921 07:43:38.822808 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 07:43:38.826074 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 07:43:38.829895 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 07:43:38.836357 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 07:43:38.839571 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 07:43:38.842443 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 07:43:38.845669 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 07:43:38.852779 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 07:43:38.855802 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 07:43:38.859458 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 07:43:38.862704 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 07:43:38.865525 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 07:43:38.872698 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 07:43:38.875419 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 07:43:38.879230 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 07:43:38.885400 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 07:43:38.888739 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 07:43:38.892175 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 07:43:38.895319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 07:43:38.898579 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 07:43:38.905692 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 07:43:38.909014 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 07:43:38.912572 call enable_fixed_mtrr()
1944 07:43:38.915587 call enable_fixed_mtrr()
1945 07:43:38.918937 CBFS: Found @ offset 1c96c0 size 3f798
1946 07:43:38.922326 CPU physical address size: 39 bits
1947 07:43:38.925347 Checking segment from ROM address 0xffdd16f8
1948 07:43:38.928537 CPU physical address size: 39 bits
1949 07:43:38.932345 CPU physical address size: 39 bits
1950 07:43:38.938856 Checking segment from ROM address 0xffdd1714
1951 07:43:38.942409 Loading segment from ROM address 0xffdd16f8
1952 07:43:38.945381 code (compression=0)
1953 07:43:38.952185 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 07:43:38.961980 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 07:43:38.965196 it's not compressed!
1956 07:43:39.055890 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 07:43:39.062404 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 07:43:39.065575 Loading segment from ROM address 0xffdd1714
1959 07:43:39.069470 Entry Point 0x30000000
1960 07:43:39.071946 Loaded segments
1961 07:43:39.078303 Finalizing chipset.
1962 07:43:39.081643 Finalizing SMM.
1963 07:43:39.084299 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 07:43:39.088176 mp_park_aps done after 0 msecs.
1965 07:43:39.094782 Jumping to boot code at 30000000(99b62000)
1966 07:43:39.101256 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 07:43:39.101367
1968 07:43:39.101462
1969 07:43:39.101542
1970 07:43:39.104604 Starting depthcharge on Helios...
1971 07:43:39.104690
1972 07:43:39.105028 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 07:43:39.105132 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 07:43:39.105215 Setting prompt string to ['hatch:']
1975 07:43:39.105294 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 07:43:39.114279 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 07:43:39.114393
1978 07:43:39.120909 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 07:43:39.120995
1980 07:43:39.127377 board_setup: Info: eMMC controller not present; skipping
1981 07:43:39.127463
1982 07:43:39.131165 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 07:43:39.131253
1984 07:43:39.137837 board_setup: Info: SDHCI controller not present; skipping
1985 07:43:39.137921
1986 07:43:39.144000 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 07:43:39.144087
1988 07:43:39.144154 Wipe memory regions:
1989 07:43:39.144217
1990 07:43:39.147550 [0x00000000001000, 0x000000000a0000)
1991 07:43:39.147633
1992 07:43:39.150682 [0x00000000100000, 0x00000030000000)
1993 07:43:39.217380
1994 07:43:39.220343 [0x00000030657430, 0x00000099a2c000)
1995 07:43:39.357593
1996 07:43:39.360670 [0x00000100000000, 0x0000045e800000)
1997 07:43:40.743061
1998 07:43:40.743202 R8152: Initializing
1999 07:43:40.743272
2000 07:43:40.746663 Version 9 (ocp_data = 6010)
2001 07:43:40.750750
2002 07:43:40.750880 R8152: Done initializing
2003 07:43:40.750998
2004 07:43:40.754375 Adding net device
2005 07:43:41.236862
2006 07:43:41.236991 R8152: Initializing
2007 07:43:41.237072
2008 07:43:41.240399 Version 6 (ocp_data = 5c30)
2009 07:43:41.240477
2010 07:43:41.243475 R8152: Done initializing
2011 07:43:41.243585
2012 07:43:41.246726 net_add_device: Attemp to include the same device
2013 07:43:41.249848
2014 07:43:41.257212 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 07:43:41.257328
2016 07:43:41.257433
2017 07:43:41.257526
2018 07:43:41.257823 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 07:43:41.358265 hatch: tftpboot 192.168.201.1 12435190/tftp-deploy-rvszkn1b/kernel/bzImage 12435190/tftp-deploy-rvszkn1b/kernel/cmdline 12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
2021 07:43:41.358420 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 07:43:41.358510 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 07:43:41.363083 tftpboot 192.168.201.1 12435190/tftp-deploy-rvszkn1b/kernel/bzImaploy-rvszkn1b/kernel/cmdline 12435190/tftp-deploy-rvszkn1b/ramdisk/ramdisk.cpio.gz
2024 07:43:41.363171
2025 07:43:41.363237 Waiting for link
2026 07:43:41.563521
2027 07:43:41.563652 done.
2028 07:43:41.563725
2029 07:43:41.563787 MAC: 00:24:32:50:19:be
2030 07:43:41.563848
2031 07:43:41.566709 Sending DHCP discover... done.
2032 07:43:41.566795
2033 07:43:41.570076 Waiting for reply... done.
2034 07:43:41.570159
2035 07:43:41.573397 Sending DHCP request... done.
2036 07:43:41.573508
2037 07:43:41.576709 Waiting for reply... done.
2038 07:43:41.576793
2039 07:43:41.579894 My ip is 192.168.201.15
2040 07:43:41.580009
2041 07:43:41.583882 The DHCP server ip is 192.168.201.1
2042 07:43:41.583973
2043 07:43:41.586988 TFTP server IP predefined by user: 192.168.201.1
2044 07:43:41.590140
2045 07:43:41.596719 Bootfile predefined by user: 12435190/tftp-deploy-rvszkn1b/kernel/bzImage
2046 07:43:41.596804
2047 07:43:41.600059 Sending tftp read request... done.
2048 07:43:41.600168
2049 07:43:41.603002 Waiting for the transfer...
2050 07:43:41.603112
2051 07:43:42.130702 00000000 ################################################################
2052 07:43:42.130830
2053 07:43:42.653086 00080000 ################################################################
2054 07:43:42.653250
2055 07:43:43.193415 00100000 ################################################################
2056 07:43:43.193554
2057 07:43:43.751520 00180000 ################################################################
2058 07:43:43.751718
2059 07:43:44.394592 00200000 ################################################################
2060 07:43:44.394758
2061 07:43:44.948382 00280000 ################################################################
2062 07:43:44.948533
2063 07:43:45.514136 00300000 ################################################################
2064 07:43:45.514292
2065 07:43:46.057298 00380000 ################################################################
2066 07:43:46.057435
2067 07:43:46.594578 00400000 ################################################################
2068 07:43:46.594716
2069 07:43:47.136880 00480000 ################################################################
2070 07:43:47.137094
2071 07:43:47.669259 00500000 ################################################################
2072 07:43:47.669406
2073 07:43:48.197663 00580000 ################################################################
2074 07:43:48.197863
2075 07:43:48.725340 00600000 ################################################################
2076 07:43:48.725507
2077 07:43:49.264638 00680000 ################################################################
2078 07:43:49.264779
2079 07:43:49.801333 00700000 ################################################################
2080 07:43:49.801500
2081 07:43:50.325084 00780000 ################################################################
2082 07:43:50.325243
2083 07:43:50.512635 00800000 ####################### done.
2084 07:43:50.512839
2085 07:43:50.516038 The bootfile was 8572816 bytes long.
2086 07:43:50.516161
2087 07:43:50.519155 Sending tftp read request... done.
2088 07:43:50.519277
2089 07:43:50.522403 Waiting for the transfer...
2090 07:43:50.522520
2091 07:43:51.066364 00000000 ################################################################
2092 07:43:51.066503
2093 07:43:51.616036 00080000 ################################################################
2094 07:43:51.616209
2095 07:43:52.134294 00100000 ################################################################
2096 07:43:52.134453
2097 07:43:52.664493 00180000 ################################################################
2098 07:43:52.664652
2099 07:43:53.200063 00200000 ################################################################
2100 07:43:53.200195
2101 07:43:53.748581 00280000 ################################################################
2102 07:43:53.748716
2103 07:43:54.304178 00300000 ################################################################
2104 07:43:54.304370
2105 07:43:54.864844 00380000 ################################################################
2106 07:43:54.864981
2107 07:43:55.412879 00400000 ################################################################
2108 07:43:55.413017
2109 07:43:55.979384 00480000 ################################################################
2110 07:43:55.979533
2111 07:43:56.539390 00500000 ################################################################
2112 07:43:56.539557
2113 07:43:57.086269 00580000 ################################################################
2114 07:43:57.086421
2115 07:43:57.633291 00600000 ################################################################
2116 07:43:57.633481
2117 07:43:58.203810 00680000 ################################################################
2118 07:43:58.204014
2119 07:43:58.744642 00700000 ################################################################
2120 07:43:58.744800
2121 07:43:59.303697 00780000 ################################################################
2122 07:43:59.303891
2123 07:43:59.777483 00800000 ####################################################### done.
2124 07:43:59.777638
2125 07:43:59.780828 Sending tftp read request... done.
2126 07:43:59.780917
2127 07:43:59.784030 Waiting for the transfer...
2128 07:43:59.784117
2129 07:43:59.784220 00000000 # done.
2130 07:43:59.784330
2131 07:43:59.793809 Command line loaded dynamically from TFTP file: 12435190/tftp-deploy-rvszkn1b/kernel/cmdline
2132 07:43:59.793896
2133 07:43:59.813377 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 07:43:59.813473
2135 07:43:59.820226 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 07:43:59.824807
2137 07:43:59.827755 Shutting down all USB controllers.
2138 07:43:59.827839
2139 07:43:59.827924 Removing current net device
2140 07:43:59.831645
2141 07:43:59.831729 Finalizing coreboot
2142 07:43:59.831873
2143 07:43:59.838064 Exiting depthcharge with code 4 at timestamp: 28076715
2144 07:43:59.838148
2145 07:43:59.838233
2146 07:43:59.838313 Starting kernel ...
2147 07:43:59.838391
2148 07:43:59.838468
2149 07:43:59.839069 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2150 07:43:59.839204 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2151 07:43:59.839311 Setting prompt string to ['Linux version [0-9]']
2152 07:43:59.839416 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2153 07:43:59.839522 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2155 07:48:20.839579 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2157 07:48:20.839883 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2159 07:48:20.840130 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 07:48:20.840577 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 07:48:20.840926 Cleaning after the job
2165 07:48:20.841027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/ramdisk
2166 07:48:20.842410 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/kernel
2167 07:48:20.843794 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435190/tftp-deploy-rvszkn1b/modules
2168 07:48:20.844154 start: 5.1 power-off (timeout 00:00:30) [common]
2169 07:48:20.844361 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2170 07:48:20.924106 >> Command sent successfully.
2171 07:48:20.926806 Returned 0 in 0 seconds
2172 07:48:21.027176 end: 5.1 power-off (duration 00:00:00) [common]
2174 07:48:21.027511 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 07:48:21.027808 Listened to connection for namespace 'common' for up to 1s
2177 07:48:21.028187 Listened to connection for namespace 'common' for up to 1s
2178 07:48:22.028416 Finalising connection for namespace 'common'
2179 07:48:22.028613 Disconnecting from shell: Finalise
2180 07:48:22.028733
2181 07:48:22.129067 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 07:48:22.129212 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435190
2183 07:48:22.145645 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435190
2184 07:48:22.145811 JobError: Your job cannot terminate cleanly.