Boot log: dell-latitude-5400-8665U-sarien
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:43.303637 lava-dispatcher, installed at version: 2023.10
2 07:40:43.303868 start: 0 validate
3 07:40:43.304017 Start time: 2024-01-03 07:40:43.304008+00:00 (UTC)
4 07:40:43.304147 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:43.304298 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:40:43.573816 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:43.574500 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:43.843132 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:43.843381 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:40:47.834762 validate duration: 4.53
12 07:40:47.836073 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:40:47.836712 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:40:47.837202 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:40:47.837774 Not decompressing ramdisk as can be used compressed.
16 07:40:47.838228 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:40:47.838576 saving as /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/ramdisk/rootfs.cpio.gz
18 07:40:47.839060 total size: 8418130 (8 MB)
19 07:40:48.359099 progress 0 % (0 MB)
20 07:40:48.371436 progress 5 % (0 MB)
21 07:40:48.383336 progress 10 % (0 MB)
22 07:40:48.391756 progress 15 % (1 MB)
23 07:40:48.397605 progress 20 % (1 MB)
24 07:40:48.402180 progress 25 % (2 MB)
25 07:40:48.406199 progress 30 % (2 MB)
26 07:40:48.409492 progress 35 % (2 MB)
27 07:40:48.412713 progress 40 % (3 MB)
28 07:40:48.415796 progress 45 % (3 MB)
29 07:40:48.418615 progress 50 % (4 MB)
30 07:40:48.421390 progress 55 % (4 MB)
31 07:40:48.423898 progress 60 % (4 MB)
32 07:40:48.426237 progress 65 % (5 MB)
33 07:40:48.428780 progress 70 % (5 MB)
34 07:40:48.431278 progress 75 % (6 MB)
35 07:40:48.433810 progress 80 % (6 MB)
36 07:40:48.436282 progress 85 % (6 MB)
37 07:40:48.438780 progress 90 % (7 MB)
38 07:40:48.441262 progress 95 % (7 MB)
39 07:40:48.443579 progress 100 % (8 MB)
40 07:40:48.443840 8 MB downloaded in 0.60 s (13.27 MB/s)
41 07:40:48.444012 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:40:48.444278 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:40:48.444378 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:40:48.444472 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:40:48.444632 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:40:48.444716 saving as /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/kernel/bzImage
48 07:40:48.444784 total size: 8572816 (8 MB)
49 07:40:48.444852 No compression specified
50 07:40:48.446094 progress 0 % (0 MB)
51 07:40:48.448716 progress 5 % (0 MB)
52 07:40:48.451311 progress 10 % (0 MB)
53 07:40:48.453847 progress 15 % (1 MB)
54 07:40:48.456374 progress 20 % (1 MB)
55 07:40:48.458908 progress 25 % (2 MB)
56 07:40:48.461446 progress 30 % (2 MB)
57 07:40:48.463958 progress 35 % (2 MB)
58 07:40:48.466475 progress 40 % (3 MB)
59 07:40:48.469013 progress 45 % (3 MB)
60 07:40:48.471528 progress 50 % (4 MB)
61 07:40:48.474044 progress 55 % (4 MB)
62 07:40:48.476523 progress 60 % (4 MB)
63 07:40:48.479184 progress 65 % (5 MB)
64 07:40:48.481795 progress 70 % (5 MB)
65 07:40:48.484299 progress 75 % (6 MB)
66 07:40:48.486766 progress 80 % (6 MB)
67 07:40:48.489244 progress 85 % (6 MB)
68 07:40:48.491717 progress 90 % (7 MB)
69 07:40:48.494181 progress 95 % (7 MB)
70 07:40:48.496697 progress 100 % (8 MB)
71 07:40:48.496909 8 MB downloaded in 0.05 s (156.86 MB/s)
72 07:40:48.497076 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:40:48.497343 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:40:48.497446 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:40:48.497541 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:40:48.497682 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:40:48.497763 saving as /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/modules/modules.tar
79 07:40:48.497832 total size: 251144 (0 MB)
80 07:40:48.497901 Using unxz to decompress xz
81 07:40:48.506452 progress 13 % (0 MB)
82 07:40:48.506907 progress 26 % (0 MB)
83 07:40:48.507169 progress 39 % (0 MB)
84 07:40:48.508771 progress 52 % (0 MB)
85 07:40:48.510981 progress 65 % (0 MB)
86 07:40:48.513183 progress 78 % (0 MB)
87 07:40:48.515205 progress 91 % (0 MB)
88 07:40:48.517487 progress 100 % (0 MB)
89 07:40:48.523703 0 MB downloaded in 0.03 s (9.26 MB/s)
90 07:40:48.523961 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:40:48.524266 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:40:48.524374 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 07:40:48.524487 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 07:40:48.524583 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:40:48.524693 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 07:40:48.524928 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga
98 07:40:48.525078 makedir: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin
99 07:40:48.525196 makedir: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/tests
100 07:40:48.525309 makedir: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/results
101 07:40:48.525435 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-add-keys
102 07:40:48.525598 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-add-sources
103 07:40:48.525744 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-background-process-start
104 07:40:48.525888 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-background-process-stop
105 07:40:48.526029 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-common-functions
106 07:40:48.526170 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-echo-ipv4
107 07:40:48.526309 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-install-packages
108 07:40:48.526448 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-installed-packages
109 07:40:48.526591 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-os-build
110 07:40:48.526731 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-probe-channel
111 07:40:48.526871 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-probe-ip
112 07:40:48.527009 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-target-ip
113 07:40:48.527148 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-target-mac
114 07:40:48.527286 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-target-storage
115 07:40:48.527430 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-case
116 07:40:48.527571 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-event
117 07:40:48.527710 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-feedback
118 07:40:48.527849 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-raise
119 07:40:48.527989 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-reference
120 07:40:48.528151 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-runner
121 07:40:48.528292 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-set
122 07:40:48.528432 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-test-shell
123 07:40:48.528575 Updating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-install-packages (oe)
124 07:40:48.528765 Updating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/bin/lava-installed-packages (oe)
125 07:40:48.528908 Creating /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/environment
126 07:40:48.529025 LAVA metadata
127 07:40:48.529110 - LAVA_JOB_ID=12435177
128 07:40:48.529181 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:40:48.529293 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 07:40:48.529369 skipped lava-vland-overlay
131 07:40:48.529452 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:40:48.529540 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 07:40:48.529610 skipped lava-multinode-overlay
134 07:40:48.529699 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:40:48.529824 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 07:40:48.529947 Loading test definitions
137 07:40:48.530065 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 07:40:48.530152 Using /lava-12435177 at stage 0
139 07:40:48.530502 uuid=12435177_1.4.2.3.1 testdef=None
140 07:40:48.530601 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:40:48.530698 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 07:40:48.531289 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:40:48.531540 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 07:40:48.532332 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:40:48.532592 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 07:40:48.533300 runner path: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/0/tests/0_dmesg test_uuid 12435177_1.4.2.3.1
149 07:40:48.533472 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:40:48.533731 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 07:40:48.533813 Using /lava-12435177 at stage 1
153 07:40:48.534154 uuid=12435177_1.4.2.3.5 testdef=None
154 07:40:48.534253 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 07:40:48.534348 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 07:40:48.534883 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 07:40:48.535128 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 07:40:48.535908 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 07:40:48.536167 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 07:40:48.536879 runner path: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/1/tests/1_bootrr test_uuid 12435177_1.4.2.3.5
163 07:40:48.537050 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 07:40:48.537279 Creating lava-test-runner.conf files
166 07:40:48.537349 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/0 for stage 0
167 07:40:48.537448 - 0_dmesg
168 07:40:48.537536 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435177/lava-overlay-89bdu9ga/lava-12435177/1 for stage 1
169 07:40:48.537637 - 1_bootrr
170 07:40:48.537742 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 07:40:48.537836 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 07:40:48.547361 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 07:40:48.547487 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 07:40:48.547585 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 07:40:48.547682 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 07:40:48.547781 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 07:40:48.835743 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 07:40:48.836176 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 07:40:48.836307 extracting modules file /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435177/extract-overlay-ramdisk-2jx_eqh2/ramdisk
180 07:40:48.851316 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 07:40:48.851455 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 07:40:48.851555 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435177/compress-overlay-fs0ig_6s/overlay-1.4.2.4.tar.gz to ramdisk
183 07:40:48.851637 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435177/compress-overlay-fs0ig_6s/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435177/extract-overlay-ramdisk-2jx_eqh2/ramdisk
184 07:40:48.861524 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 07:40:48.861655 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 07:40:48.861756 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 07:40:48.861860 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 07:40:48.861952 Building ramdisk /var/lib/lava/dispatcher/tmp/12435177/extract-overlay-ramdisk-2jx_eqh2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435177/extract-overlay-ramdisk-2jx_eqh2/ramdisk
189 07:40:49.007165 >> 49790 blocks
190 07:40:50.010167 rename /var/lib/lava/dispatcher/tmp/12435177/extract-overlay-ramdisk-2jx_eqh2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
191 07:40:50.010661 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 07:40:50.010799 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 07:40:50.010914 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 07:40:50.011022 No mkimage arch provided, not using FIT.
195 07:40:50.011124 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 07:40:50.011221 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 07:40:50.011338 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 07:40:50.011443 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 07:40:50.011536 No LXC device requested
200 07:40:50.011627 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 07:40:50.011724 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 07:40:50.011821 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 07:40:50.011909 Checking files for TFTP limit of 4294967296 bytes.
204 07:40:50.012356 end: 1 tftp-deploy (duration 00:00:02) [common]
205 07:40:50.012476 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 07:40:50.012578 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 07:40:50.012726 substitutions:
208 07:40:50.012801 - {DTB}: None
209 07:40:50.012870 - {INITRD}: 12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
210 07:40:50.012937 - {KERNEL}: 12435177/tftp-deploy-4tjtrt7i/kernel/bzImage
211 07:40:50.013001 - {LAVA_MAC}: None
212 07:40:50.013064 - {PRESEED_CONFIG}: None
213 07:40:50.013126 - {PRESEED_LOCAL}: None
214 07:40:50.013186 - {RAMDISK}: 12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
215 07:40:50.013248 - {ROOT_PART}: None
216 07:40:50.013309 - {ROOT}: None
217 07:40:50.013370 - {SERVER_IP}: 192.168.201.1
218 07:40:50.013430 - {TEE}: None
219 07:40:50.013490 Parsed boot commands:
220 07:40:50.013550 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 07:40:50.013742 Parsed boot commands: tftpboot 192.168.201.1 12435177/tftp-deploy-4tjtrt7i/kernel/bzImage 12435177/tftp-deploy-4tjtrt7i/kernel/cmdline 12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
222 07:40:50.013840 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 07:40:50.013934 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 07:40:50.014038 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 07:40:50.014134 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 07:40:50.014213 Not connected, no need to disconnect.
227 07:40:50.014295 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 07:40:50.014389 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 07:40:50.014469 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-1'
230 07:40:50.019129 Setting prompt string to ['lava-test: # ']
231 07:40:50.019551 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 07:40:50.019679 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 07:40:50.019790 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 07:40:50.019894 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 07:40:50.020111 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-1' '--port=1' '--command=reboot'
236 07:41:06.926471 >> Command sent successfully.
237 07:41:06.929445 Returned 0 in 16 seconds
238 07:41:07.030213 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 07:41:07.031619 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 07:41:07.032117 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 07:41:07.032549 Setting prompt string to 'Starting depthcharge on sarien...'
243 07:41:07.032945 Changing prompt to 'Starting depthcharge on sarien...'
244 07:41:07.033314 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 07:41:07.034573 [Enter `^Ec?' for help]
246 07:41:07.034996
247 07:41:07.035347
248 07:41:07.035682 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 07:41:07.035996 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 07:41:07.036303 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 07:41:07.036591 CPU: AES supported, TXT supported, VT supported
252 07:41:07.037002 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 07:41:07.037295 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 07:41:07.037578 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 07:41:07.037873 VBOOT: Loading verstage.
256 07:41:07.038169 CBFS @ 1d00000 size 300000
257 07:41:07.038452 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 07:41:07.038733 CBFS: Locating 'fallback/verstage'
259 07:41:07.039013 CBFS: Found @ offset 10f6c0 size 1435c
260 07:41:07.039292
261 07:41:07.039564
262 07:41:07.039840 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 07:41:07.040122 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 07:41:07.040403 done! DID_VID 0x00281ae0
265 07:41:07.040722 TPM ready after 0 ms
266 07:41:07.041010 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 07:41:07.041288 tlcl_send_startup: Startup return code is 0
268 07:41:07.041567 TPM: setup succeeded
269 07:41:07.041844 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 07:41:07.042125 Checking cr50 for recovery request
271 07:41:07.042403 Phase 1
272 07:41:07.042680 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 07:41:07.042959 FMAP: base = fe000000 size = 2000000 #areas = 37
274 07:41:07.043239 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 07:41:07.043519 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 07:41:07.043799 Phase 2
277 07:41:07.044073 Phase 3
278 07:41:07.044346 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 07:41:07.044656 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 07:41:07.044959 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 07:41:07.045241 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 07:41:07.045519 VB2:vb2_verify_keyblock() Checking key block signature...
283 07:41:07.045795 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 07:41:07.046069 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 07:41:07.046348 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 07:41:07.046622 Phase 4
287 07:41:07.046897 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 07:41:07.047233 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 07:41:07.047516 VB2:vb2_rsa_verify_digest() Digest check failed!
290 07:41:07.047794 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 07:41:07.048067 Saving nvdata
292 07:41:07.048345 Reboot requested (10020007)
293 07:41:07.048651 board_reset() called!
294 07:41:07.048938 full_reset() called!
295 07:41:11.216146
296 07:41:11.216711
297 07:41:11.223960 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 07:41:11.229141 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 07:41:11.233250 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 07:41:11.237824 CPU: AES supported, TXT supported, VT supported
301 07:41:11.243333 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 07:41:11.248663 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 07:41:11.253995 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 07:41:11.257547 VBOOT: Loading verstage.
305 07:41:11.259845 CBFS @ 1d00000 size 300000
306 07:41:11.266322 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 07:41:11.269606 CBFS: Locating 'fallback/verstage'
308 07:41:11.274032 CBFS: Found @ offset 10f6c0 size 1435c
309 07:41:11.288303
310 07:41:11.288585
311 07:41:11.296951 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 07:41:11.303379 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 07:41:11.426677 .done! DID_VID 0x00281ae0
314 07:41:11.429039 TPM ready after 0 ms
315 07:41:11.433245 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 07:41:11.519203 tlcl_send_startup: Startup return code is 0
317 07:41:11.521378 TPM: setup succeeded
318 07:41:11.539455 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 07:41:11.543524 Checking cr50 for recovery request
320 07:41:11.553476 Phase 1
321 07:41:11.557690 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 07:41:11.562567 FMAP: base = fe000000 size = 2000000 #areas = 37
323 07:41:11.568111 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 07:41:11.574829 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 07:41:11.580838 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 07:41:11.584085 Recovery requested (1009000e)
327 07:41:11.586038 Saving nvdata
328 07:41:11.601723 tlcl_extend: response is 0
329 07:41:11.617397 tlcl_extend: response is 0
330 07:41:11.620801 CBFS @ 1d00000 size 300000
331 07:41:11.627645 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 07:41:11.630755 CBFS: Locating 'fallback/romstage'
333 07:41:11.635101 CBFS: Found @ offset 80 size 15b2c
334 07:41:11.636371
335 07:41:11.636465
336 07:41:11.644988 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 07:41:11.649458 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 07:41:11.653799 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 07:41:11.658349 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 07:41:11.663141 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 07:41:11.666386 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 07:41:11.668794 TCO_STS: 0000 0004
343 07:41:11.671350 GEN_PMCON: d0015209 00002200
344 07:41:11.675011 GBLRST_CAUSE: 00000000 00000000
345 07:41:11.676871 prev_sleep_state 5
346 07:41:11.680835 Boot Count incremented to 35905
347 07:41:11.684176 CBFS @ 1d00000 size 300000
348 07:41:11.690393 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 07:41:11.693032 CBFS: Locating 'fspm.bin'
350 07:41:11.696645 CBFS: Found @ offset 60fc0 size 70000
351 07:41:11.702000 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 07:41:11.706612 FMAP: base = fe000000 size = 2000000 #areas = 37
353 07:41:11.713472 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 07:41:11.719327 Probing TPM I2C: done! DID_VID 0x00281ae0
355 07:41:11.721281 Locality already claimed
356 07:41:11.724958 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 07:41:11.744050 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 07:41:11.751813 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 07:41:11.754445 MRC cache found, size 18e0
360 07:41:11.756385 bootmode is set to :2
361 07:41:11.848122 CBMEM:
362 07:41:11.852020 IMD: root @ 89fff000 254 entries.
363 07:41:11.854563 IMD: root @ 89ffec00 62 entries.
364 07:41:11.857501 External stage cache:
365 07:41:11.861230 IMD: root @ 8abff000 254 entries.
366 07:41:11.865177 IMD: root @ 8abfec00 62 entries.
367 07:41:11.870357 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 07:41:11.873425 creating vboot_handoff structure
369 07:41:11.894692 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 07:41:11.910915 tlcl_write: response is 0
371 07:41:11.930189 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 07:41:11.933663 MRC: TPM MRC hash updated successfully.
373 07:41:11.936326 1 DIMMs found
374 07:41:11.937752 top_of_ram = 0x8a000000
375 07:41:11.943482 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 07:41:11.948737 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 07:41:11.950501 CBFS @ 1d00000 size 300000
378 07:41:11.956754 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 07:41:11.959959 CBFS: Locating 'fallback/postcar'
380 07:41:11.964281 CBFS: Found @ offset 107000 size 41a4
381 07:41:11.970978 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 07:41:11.980575 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 07:41:11.985728 Processing 126 relocs. Offset value of 0x87cdd000
384 07:41:11.988653
385 07:41:11.989052
386 07:41:11.997765 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 07:41:11.999632 CBFS @ 1d00000 size 300000
388 07:41:12.006084 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 07:41:12.010031 CBFS: Locating 'fallback/ramstage'
390 07:41:12.013312 CBFS: Found @ offset 458c0 size 1a8a8
391 07:41:12.019928 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 07:41:12.049316 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 07:41:12.054202 Processing 3754 relocs. Offset value of 0x88e81000
394 07:41:12.061061
395 07:41:12.061690
396 07:41:12.069119 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 07:41:12.073753 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 07:41:12.078123 FMAP: base = fe000000 size = 2000000 #areas = 37
399 07:41:12.083846 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 07:41:12.087744 WARNING: RO_VPD is uninitialized or empty.
401 07:41:12.092224 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 07:41:12.097062 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 07:41:12.098369 Normal boot.
404 07:41:12.104792 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1160
405 07:41:12.107465 CBFS @ 1d00000 size 300000
406 07:41:12.113821 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 07:41:12.118478 CBFS: Locating 'cpu_microcode_blob.bin'
408 07:41:12.122023 CBFS: Found @ offset 15c40 size 2fc00
409 07:41:12.126012 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 07:41:12.129200 Skip microcode update
411 07:41:12.131839 CBFS @ 1d00000 size 300000
412 07:41:12.137565 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 07:41:12.140257 CBFS: Locating 'fsps.bin'
414 07:41:12.144317 CBFS: Found @ offset d1fc0 size 35000
415 07:41:12.179139 Detected 4 core, 8 thread CPU.
416 07:41:12.181207 Setting up SMI for CPU
417 07:41:12.183158 IED base = 0x8ac00000
418 07:41:12.185739 IED size = 0x00400000
419 07:41:12.188466 Will perform SMM setup.
420 07:41:12.193511 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 07:41:12.200649 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 07:41:12.206154 Processing 16 relocs. Offset value of 0x00030000
423 07:41:12.208809 Attempting to start 7 APs
424 07:41:12.212520 Waiting for 10ms after sending INIT.
425 07:41:12.226593 Waiting for 1st SIPI to complete...done.
426 07:41:12.228855 AP: slot 3 apic_id 1.
427 07:41:12.232849 Waiting for 2nd SIPI to complete...done.
428 07:41:12.235259 AP: slot 5 apic_id 5.
429 07:41:12.237431 AP: slot 2 apic_id 4.
430 07:41:12.239531 AP: slot 6 apic_id 7.
431 07:41:12.242775 AP: slot 7 apic_id 6.
432 07:41:12.243976 AP: slot 4 apic_id 3.
433 07:41:12.246718 AP: slot 1 apic_id 2.
434 07:41:12.254472 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 07:41:12.259594 Processing 13 relocs. Offset value of 0x00038000
436 07:41:12.265851 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 07:41:12.269025 Installing SMM handler to 0x8a000000
438 07:41:12.277405 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 07:41:12.283485 Processing 867 relocs. Offset value of 0x8a010000
440 07:41:12.290933 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 07:41:12.296201 Processing 13 relocs. Offset value of 0x8a008000
442 07:41:12.302324 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 07:41:12.307246 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 07:41:12.313605 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 07:41:12.319196 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 07:41:12.324477 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 07:41:12.330659 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 07:41:12.336045 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 07:41:12.342929 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 07:41:12.345981 Clearing SMI status registers
451 07:41:12.347305 SMI_STS: PM1
452 07:41:12.349738 PM1_STS: WAK PWRBTN
453 07:41:12.352118 TCO_STS: BOOT SECOND_TO
454 07:41:12.354404 GPE0 STD STS: eSPI
455 07:41:12.356939 New SMBASE 0x8a000000
456 07:41:12.360413 In relocation handler: CPU 0
457 07:41:12.363830 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 07:41:12.368697 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 07:41:12.370960 Relocation complete.
460 07:41:12.372630 New SMBASE 0x89fff400
461 07:41:12.376144 In relocation handler: CPU 3
462 07:41:12.379993 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
463 07:41:12.384770 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 07:41:12.387374 Relocation complete.
465 07:41:12.389926 New SMBASE 0x89ffe800
466 07:41:12.392681 In relocation handler: CPU 6
467 07:41:12.396646 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
468 07:41:12.401594 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 07:41:12.402888 Relocation complete.
470 07:41:12.405180 New SMBASE 0x89ffe400
471 07:41:12.408378 In relocation handler: CPU 7
472 07:41:12.413643 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
473 07:41:12.417448 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 07:41:12.420317 Relocation complete.
475 07:41:12.422237 New SMBASE 0x89fff800
476 07:41:12.424939 In relocation handler: CPU 2
477 07:41:12.429619 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
478 07:41:12.434455 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 07:41:12.436396 Relocation complete.
480 07:41:12.437965 New SMBASE 0x89ffec00
481 07:41:12.441278 In relocation handler: CPU 5
482 07:41:12.445406 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
483 07:41:12.450384 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 07:41:12.452839 Relocation complete.
485 07:41:12.454723 New SMBASE 0x89fffc00
486 07:41:12.456972 In relocation handler: CPU 1
487 07:41:12.461050 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
488 07:41:12.466692 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 07:41:12.468176 Relocation complete.
490 07:41:12.470919 New SMBASE 0x89fff000
491 07:41:12.473633 In relocation handler: CPU 4
492 07:41:12.477630 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
493 07:41:12.482557 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 07:41:12.484659 Relocation complete.
495 07:41:12.486880 Initializing CPU #0
496 07:41:12.489911 CPU: vendor Intel device 806ec
497 07:41:12.494199 CPU: family 06, model 8e, stepping 0c
498 07:41:12.496623 Clearing out pending MCEs
499 07:41:12.500655 Setting up local APIC... apic_id: 0x00 done.
500 07:41:12.504145 Turbo is available but hidden
501 07:41:12.506246 Turbo has been enabled
502 07:41:12.508217 VMX status: enabled
503 07:41:12.511745 IA32_FEATURE_CONTROL status: locked
504 07:41:12.514593 Skip microcode update
505 07:41:12.516694 CPU #0 initialized
506 07:41:12.518673 Initializing CPU #3
507 07:41:12.521019 Initializing CPU #5
508 07:41:12.522947 Initializing CPU #2
509 07:41:12.525455 CPU: vendor Intel device 806ec
510 07:41:12.529394 CPU: family 06, model 8e, stepping 0c
511 07:41:12.533412 CPU: vendor Intel device 806ec
512 07:41:12.536195 CPU: family 06, model 8e, stepping 0c
513 07:41:12.539359 Clearing out pending MCEs
514 07:41:12.541341 Clearing out pending MCEs
515 07:41:12.546196 Setting up local APIC...Initializing CPU #6
516 07:41:12.548098 Initializing CPU #7
517 07:41:12.551433 CPU: vendor Intel device 806ec
518 07:41:12.554625 CPU: family 06, model 8e, stepping 0c
519 07:41:12.557880 CPU: vendor Intel device 806ec
520 07:41:12.562521 CPU: family 06, model 8e, stepping 0c
521 07:41:12.564064 Clearing out pending MCEs
522 07:41:12.566803 Clearing out pending MCEs
523 07:41:12.571075 Setting up local APIC...Initializing CPU #4
524 07:41:12.573523 Initializing CPU #1
525 07:41:12.576347 CPU: vendor Intel device 806ec
526 07:41:12.580138 CPU: family 06, model 8e, stepping 0c
527 07:41:12.583115 CPU: vendor Intel device 806ec
528 07:41:12.587620 CPU: family 06, model 8e, stepping 0c
529 07:41:12.590368 Clearing out pending MCEs
530 07:41:12.593037 Clearing out pending MCEs
531 07:41:12.596774 Setting up local APIC... apic_id: 0x05 done.
532 07:41:12.604525 Setting up local APIC...Setting up local APIC...CPU: vendor Intel device 806ec
533 07:41:12.608902 CPU: family 06, model 8e, stepping 0c
534 07:41:12.610386 apic_id: 0x04 done.
535 07:41:12.612347 VMX status: enabled
536 07:41:12.614982 VMX status: enabled
537 07:41:12.618797 IA32_FEATURE_CONTROL status: locked
538 07:41:12.621578 IA32_FEATURE_CONTROL status: locked
539 07:41:12.624094 Skip microcode update
540 07:41:12.626041 Skip microcode update
541 07:41:12.629001 CPU #5 initialized
542 07:41:12.630887 CPU #2 initialized
543 07:41:12.632923 apic_id: 0x02 done.
544 07:41:12.635384 apic_id: 0x03 done.
545 07:41:12.636468 VMX status: enabled
546 07:41:12.638782 VMX status: enabled
547 07:41:12.642171 IA32_FEATURE_CONTROL status: locked
548 07:41:12.645729 IA32_FEATURE_CONTROL status: locked
549 07:41:12.647734 Skip microcode update
550 07:41:12.650109 Skip microcode update
551 07:41:12.652925 CPU #1 initialized
552 07:41:12.654375 CPU #4 initialized
553 07:41:12.656064 apic_id: 0x07 done.
554 07:41:12.661489 Setting up local APIC...Clearing out pending MCEs
555 07:41:12.663583 apic_id: 0x06 done.
556 07:41:12.665564 VMX status: enabled
557 07:41:12.667518 VMX status: enabled
558 07:41:12.671395 IA32_FEATURE_CONTROL status: locked
559 07:41:12.674993 IA32_FEATURE_CONTROL status: locked
560 07:41:12.677328 Skip microcode update
561 07:41:12.679854 Skip microcode update
562 07:41:12.681747 CPU #6 initialized
563 07:41:12.683068 CPU #7 initialized
564 07:41:12.687348 Setting up local APIC... apic_id: 0x01 done.
565 07:41:12.689344 VMX status: enabled
566 07:41:12.693756 IA32_FEATURE_CONTROL status: locked
567 07:41:12.695792 Skip microcode update
568 07:41:12.697307 CPU #3 initialized
569 07:41:12.702112 bsp_do_flight_plan done after 464 msecs.
570 07:41:12.704630 CPU: frequency set to 4800 MHz
571 07:41:12.706222 Enabling SMIs.
572 07:41:12.707978 Locking SMM.
573 07:41:12.710674 CBFS @ 1d00000 size 300000
574 07:41:12.716839 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 07:41:12.719383 CBFS: Locating 'vbt.bin'
576 07:41:12.723650 CBFS: Found @ offset 60a40 size 4a0
577 07:41:12.728507 Found a VBT of 4608 bytes after decompression
578 07:41:12.741806 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 07:41:12.802535 Detected 4 core, 8 thread CPU.
580 07:41:12.804820 Detected 4 core, 8 thread CPU.
581 07:41:13.031146 Display FSP Version Info HOB
582 07:41:13.035005 Reference Code - CPU = 7.0.5e.40
583 07:41:13.037003 uCode Version = 0.0.0.b8
584 07:41:13.040171 Display FSP Version Info HOB
585 07:41:13.043999 Reference Code - ME = 7.0.5e.40
586 07:41:13.045980 MEBx version = 0.0.0.0
587 07:41:13.049964 ME Firmware Version = Consumer SKU
588 07:41:13.052702 Display FSP Version Info HOB
589 07:41:13.056487 Reference Code - CNL PCH = 7.0.5e.40
590 07:41:13.058550 PCH-CRID Status = Disabled
591 07:41:13.062831 CNL PCH H A0 Hsio Version = 2.0.0.0
592 07:41:13.066138 CNL PCH H Ax Hsio Version = 9.0.0.0
593 07:41:13.070121 CNL PCH H Bx Hsio Version = a.0.0.0
594 07:41:13.073481 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 07:41:13.076496 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 07:41:13.080598 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 07:41:13.083531 Display FSP Version Info HOB
598 07:41:13.088387 Reference Code - SA - System Agent = 7.0.5e.40
599 07:41:13.091583 Reference Code - MRC = 0.7.1.68
600 07:41:13.094535 SA - PCIe Version = 7.0.5e.40
601 07:41:13.097685 SA-CRID Status = Disabled
602 07:41:13.101035 SA-CRID Original Value = 0.0.0.c
603 07:41:13.103239 SA-CRID New Value = 0.0.0.c
604 07:41:13.121733 RTC Init
605 07:41:13.125207 Set power off after power failure.
606 07:41:13.127369 Disabling Deep S3
607 07:41:13.129870 Disabling Deep S3
608 07:41:13.130980 Disabling Deep S4
609 07:41:13.132833 Disabling Deep S4
610 07:41:13.134526 Disabling Deep S5
611 07:41:13.136762 Disabling Deep S5
612 07:41:13.143625 BS: BS_DEV_INIT_CHIPS times (us): entry 602764 run 412692 exit 16252
613 07:41:13.145489 Enumerating buses...
614 07:41:13.150353 Show all devs... Before device enumeration.
615 07:41:13.152227 Root Device: enabled 1
616 07:41:13.155200 CPU_CLUSTER: 0: enabled 1
617 07:41:13.157820 DOMAIN: 0000: enabled 1
618 07:41:13.159873 APIC: 00: enabled 1
619 07:41:13.161819 PCI: 00:00.0: enabled 1
620 07:41:13.164651 PCI: 00:02.0: enabled 1
621 07:41:13.167081 PCI: 00:04.0: enabled 1
622 07:41:13.169780 PCI: 00:12.0: enabled 1
623 07:41:13.172395 PCI: 00:12.5: enabled 0
624 07:41:13.173882 PCI: 00:12.6: enabled 0
625 07:41:13.176904 PCI: 00:13.0: enabled 0
626 07:41:13.179011 PCI: 00:14.0: enabled 1
627 07:41:13.182020 PCI: 00:14.1: enabled 0
628 07:41:13.183953 PCI: 00:14.3: enabled 1
629 07:41:13.186583 PCI: 00:14.5: enabled 0
630 07:41:13.188780 PCI: 00:15.0: enabled 1
631 07:41:13.191470 PCI: 00:15.1: enabled 1
632 07:41:13.194004 PCI: 00:15.2: enabled 0
633 07:41:13.196018 PCI: 00:15.3: enabled 0
634 07:41:13.198671 PCI: 00:16.0: enabled 1
635 07:41:13.201240 PCI: 00:16.1: enabled 0
636 07:41:13.203478 PCI: 00:16.2: enabled 0
637 07:41:13.205518 PCI: 00:16.3: enabled 0
638 07:41:13.208092 PCI: 00:16.4: enabled 0
639 07:41:13.211348 PCI: 00:16.5: enabled 0
640 07:41:13.213370 PCI: 00:17.0: enabled 1
641 07:41:13.215200 PCI: 00:19.0: enabled 1
642 07:41:13.218218 PCI: 00:19.1: enabled 0
643 07:41:13.220802 PCI: 00:19.2: enabled 1
644 07:41:13.222782 PCI: 00:1a.0: enabled 0
645 07:41:13.225562 PCI: 00:1c.0: enabled 1
646 07:41:13.228125 PCI: 00:1c.1: enabled 0
647 07:41:13.229746 PCI: 00:1c.2: enabled 0
648 07:41:13.232857 PCI: 00:1c.3: enabled 0
649 07:41:13.235535 PCI: 00:1c.4: enabled 0
650 07:41:13.237543 PCI: 00:1c.5: enabled 0
651 07:41:13.239799 PCI: 00:1c.6: enabled 0
652 07:41:13.242790 PCI: 00:1c.7: enabled 1
653 07:41:13.244327 PCI: 00:1d.0: enabled 1
654 07:41:13.247404 PCI: 00:1d.1: enabled 1
655 07:41:13.249660 PCI: 00:1d.2: enabled 0
656 07:41:13.251787 PCI: 00:1d.3: enabled 0
657 07:41:13.254142 PCI: 00:1d.4: enabled 1
658 07:41:13.256429 PCI: 00:1e.0: enabled 0
659 07:41:13.259020 PCI: 00:1e.1: enabled 0
660 07:41:13.261585 PCI: 00:1e.2: enabled 0
661 07:41:13.264214 PCI: 00:1e.3: enabled 0
662 07:41:13.266475 PCI: 00:1f.0: enabled 1
663 07:41:13.268827 PCI: 00:1f.1: enabled 1
664 07:41:13.271627 PCI: 00:1f.2: enabled 1
665 07:41:13.273891 PCI: 00:1f.3: enabled 1
666 07:41:13.276397 PCI: 00:1f.4: enabled 1
667 07:41:13.278735 PCI: 00:1f.5: enabled 1
668 07:41:13.281150 PCI: 00:1f.6: enabled 1
669 07:41:13.284074 USB0 port 0: enabled 1
670 07:41:13.285437 I2C: 00:10: enabled 1
671 07:41:13.288325 I2C: 00:10: enabled 1
672 07:41:13.290227 I2C: 00:34: enabled 1
673 07:41:13.292198 I2C: 00:2c: enabled 1
674 07:41:13.294936 I2C: 00:50: enabled 1
675 07:41:13.297100 PNP: 0c09.0: enabled 1
676 07:41:13.299673 USB2 port 0: enabled 1
677 07:41:13.301548 USB2 port 1: enabled 1
678 07:41:13.304498 USB2 port 2: enabled 1
679 07:41:13.306108 USB2 port 4: enabled 1
680 07:41:13.309258 USB2 port 5: enabled 1
681 07:41:13.310754 USB2 port 6: enabled 1
682 07:41:13.313979 USB2 port 7: enabled 1
683 07:41:13.315534 USB2 port 8: enabled 1
684 07:41:13.317694 USB2 port 9: enabled 1
685 07:41:13.320744 USB3 port 0: enabled 1
686 07:41:13.323469 USB3 port 1: enabled 1
687 07:41:13.324836 USB3 port 2: enabled 1
688 07:41:13.327555 USB3 port 3: enabled 1
689 07:41:13.329640 USB3 port 4: enabled 1
690 07:41:13.332239 APIC: 02: enabled 1
691 07:41:13.333874 APIC: 04: enabled 1
692 07:41:13.335750 APIC: 01: enabled 1
693 07:41:13.338385 APIC: 03: enabled 1
694 07:41:13.339740 APIC: 05: enabled 1
695 07:41:13.341986 APIC: 07: enabled 1
696 07:41:13.343933 APIC: 06: enabled 1
697 07:41:13.346323 Compare with tree...
698 07:41:13.348919 Root Device: enabled 1
699 07:41:13.351610 CPU_CLUSTER: 0: enabled 1
700 07:41:13.353113 APIC: 00: enabled 1
701 07:41:13.355844 APIC: 02: enabled 1
702 07:41:13.357718 APIC: 04: enabled 1
703 07:41:13.359845 APIC: 01: enabled 1
704 07:41:13.362273 APIC: 03: enabled 1
705 07:41:13.365044 APIC: 05: enabled 1
706 07:41:13.366549 APIC: 07: enabled 1
707 07:41:13.369621 APIC: 06: enabled 1
708 07:41:13.371718 DOMAIN: 0000: enabled 1
709 07:41:13.374076 PCI: 00:00.0: enabled 1
710 07:41:13.377193 PCI: 00:02.0: enabled 1
711 07:41:13.379700 PCI: 00:04.0: enabled 1
712 07:41:13.382022 PCI: 00:12.0: enabled 1
713 07:41:13.384891 PCI: 00:12.5: enabled 0
714 07:41:13.387550 PCI: 00:12.6: enabled 0
715 07:41:13.389677 PCI: 00:13.0: enabled 0
716 07:41:13.393341 PCI: 00:14.0: enabled 1
717 07:41:13.395137 USB0 port 0: enabled 1
718 07:41:13.397701 USB2 port 0: enabled 1
719 07:41:13.400831 USB2 port 1: enabled 1
720 07:41:13.403763 USB2 port 2: enabled 1
721 07:41:13.406390 USB2 port 4: enabled 1
722 07:41:13.409324 USB2 port 5: enabled 1
723 07:41:13.411990 USB2 port 6: enabled 1
724 07:41:13.414915 USB2 port 7: enabled 1
725 07:41:13.417333 USB2 port 8: enabled 1
726 07:41:13.419547 USB2 port 9: enabled 1
727 07:41:13.422376 USB3 port 0: enabled 1
728 07:41:13.426105 USB3 port 1: enabled 1
729 07:41:13.427627 USB3 port 2: enabled 1
730 07:41:13.430439 USB3 port 3: enabled 1
731 07:41:13.433120 USB3 port 4: enabled 1
732 07:41:13.436219 PCI: 00:14.1: enabled 0
733 07:41:13.438242 PCI: 00:14.3: enabled 1
734 07:41:13.441604 PCI: 00:14.5: enabled 0
735 07:41:13.444261 PCI: 00:15.0: enabled 1
736 07:41:13.446519 I2C: 00:10: enabled 1
737 07:41:13.448905 I2C: 00:10: enabled 1
738 07:41:13.451660 I2C: 00:34: enabled 1
739 07:41:13.454274 PCI: 00:15.1: enabled 1
740 07:41:13.457069 I2C: 00:2c: enabled 1
741 07:41:13.459772 PCI: 00:15.2: enabled 0
742 07:41:13.462484 PCI: 00:15.3: enabled 0
743 07:41:13.465159 PCI: 00:16.0: enabled 1
744 07:41:13.467275 PCI: 00:16.1: enabled 0
745 07:41:13.469979 PCI: 00:16.2: enabled 0
746 07:41:13.473270 PCI: 00:16.3: enabled 0
747 07:41:13.475370 PCI: 00:16.4: enabled 0
748 07:41:13.477546 PCI: 00:16.5: enabled 0
749 07:41:13.480649 PCI: 00:17.0: enabled 1
750 07:41:13.482772 PCI: 00:19.0: enabled 1
751 07:41:13.485947 I2C: 00:50: enabled 1
752 07:41:13.487886 PCI: 00:19.1: enabled 0
753 07:41:13.491179 PCI: 00:19.2: enabled 1
754 07:41:13.493840 PCI: 00:1a.0: enabled 0
755 07:41:13.496491 PCI: 00:1c.0: enabled 1
756 07:41:13.498574 PCI: 00:1c.1: enabled 0
757 07:41:13.501869 PCI: 00:1c.2: enabled 0
758 07:41:13.504516 PCI: 00:1c.3: enabled 0
759 07:41:13.506658 PCI: 00:1c.4: enabled 0
760 07:41:13.509472 PCI: 00:1c.5: enabled 0
761 07:41:13.512006 PCI: 00:1c.6: enabled 0
762 07:41:13.514939 PCI: 00:1c.7: enabled 1
763 07:41:13.516951 PCI: 00:1d.0: enabled 1
764 07:41:13.519568 PCI: 00:1d.1: enabled 1
765 07:41:13.522794 PCI: 00:1d.2: enabled 0
766 07:41:13.524704 PCI: 00:1d.3: enabled 0
767 07:41:13.527819 PCI: 00:1d.4: enabled 1
768 07:41:13.530550 PCI: 00:1e.0: enabled 0
769 07:41:13.533117 PCI: 00:1e.1: enabled 0
770 07:41:13.535807 PCI: 00:1e.2: enabled 0
771 07:41:13.537975 PCI: 00:1e.3: enabled 0
772 07:41:13.540517 PCI: 00:1f.0: enabled 1
773 07:41:13.543160 PNP: 0c09.0: enabled 1
774 07:41:13.545922 PCI: 00:1f.1: enabled 1
775 07:41:13.548257 PCI: 00:1f.2: enabled 1
776 07:41:13.550933 PCI: 00:1f.3: enabled 1
777 07:41:13.554563 PCI: 00:1f.4: enabled 1
778 07:41:13.556491 PCI: 00:1f.5: enabled 1
779 07:41:13.558788 PCI: 00:1f.6: enabled 1
780 07:41:13.561355 Root Device scanning...
781 07:41:13.566025 root_dev_scan_bus for Root Device
782 07:41:13.567611 CPU_CLUSTER: 0 enabled
783 07:41:13.569589 DOMAIN: 0000 enabled
784 07:41:13.572284 DOMAIN: 0000 scanning...
785 07:41:13.575124 PCI: pci_scan_bus for bus 00
786 07:41:13.578581 PCI: 00:00.0 [8086/0000] ops
787 07:41:13.582618 PCI: 00:00.0 [8086/3e34] enabled
788 07:41:13.585157 PCI: 00:02.0 [8086/0000] ops
789 07:41:13.587893 PCI: 00:02.0 [8086/3ea0] enabled
790 07:41:13.591638 PCI: 00:04.0 [8086/1903] enabled
791 07:41:13.594858 PCI: 00:08.0 [8086/1911] enabled
792 07:41:13.598181 PCI: 00:12.0 [8086/9df9] enabled
793 07:41:13.602040 PCI: 00:14.0 [8086/0000] bus ops
794 07:41:13.604811 PCI: 00:14.0 [8086/9ded] enabled
795 07:41:13.607622 PCI: 00:14.2 [8086/9def] enabled
796 07:41:13.611183 PCI: 00:14.3 [8086/9df0] enabled
797 07:41:13.615364 PCI: 00:15.0 [8086/0000] bus ops
798 07:41:13.617932 PCI: 00:15.0 [8086/9de8] enabled
799 07:41:13.621347 PCI: 00:15.1 [8086/0000] bus ops
800 07:41:13.624639 PCI: 00:15.1 [8086/9de9] enabled
801 07:41:13.628382 PCI: 00:16.0 [8086/0000] ops
802 07:41:13.630676 PCI: 00:16.0 [8086/9de0] enabled
803 07:41:13.633861 PCI: 00:17.0 [8086/0000] ops
804 07:41:13.637500 PCI: 00:17.0 [8086/9dd3] enabled
805 07:41:13.640292 PCI: 00:19.0 [8086/0000] bus ops
806 07:41:13.643669 PCI: 00:19.0 [8086/9dc5] enabled
807 07:41:13.646733 PCI: 00:19.2 [8086/0000] ops
808 07:41:13.649915 PCI: 00:19.2 [8086/9dc7] enabled
809 07:41:13.653408 PCI: 00:1c.0 [8086/0000] bus ops
810 07:41:13.656793 PCI: 00:1c.0 [8086/9dbf] enabled
811 07:41:13.662335 PCI: Static device PCI: 00:1c.7 not found, disabling it.
812 07:41:13.665654 PCI: 00:1d.0 [8086/0000] bus ops
813 07:41:13.668836 PCI: 00:1d.0 [8086/9db4] enabled
814 07:41:13.674760 PCI: Static device PCI: 00:1d.1 not found, disabling it.
815 07:41:13.680601 PCI: Static device PCI: 00:1d.4 not found, disabling it.
816 07:41:13.683973 PCI: 00:1f.0 [8086/0000] bus ops
817 07:41:13.686874 PCI: 00:1f.0 [8086/9d84] enabled
818 07:41:13.692708 PCI: Static device PCI: 00:1f.1 not found, disabling it.
819 07:41:13.698750 PCI: Static device PCI: 00:1f.2 not found, disabling it.
820 07:41:13.701993 PCI: 00:1f.3 [8086/0000] bus ops
821 07:41:13.705205 PCI: 00:1f.3 [8086/9dc8] enabled
822 07:41:13.708336 PCI: 00:1f.4 [8086/0000] bus ops
823 07:41:13.711613 PCI: 00:1f.4 [8086/9da3] enabled
824 07:41:13.714962 PCI: 00:1f.5 [8086/0000] bus ops
825 07:41:13.718239 PCI: 00:1f.5 [8086/9da4] enabled
826 07:41:13.721556 PCI: 00:1f.6 [8086/15be] enabled
827 07:41:13.724302 PCI: Leftover static devices:
828 07:41:13.726139 PCI: 00:12.5
829 07:41:13.727448 PCI: 00:12.6
830 07:41:13.728535 PCI: 00:13.0
831 07:41:13.730237 PCI: 00:14.1
832 07:41:13.731551 PCI: 00:14.5
833 07:41:13.733512 PCI: 00:15.2
834 07:41:13.734324 PCI: 00:15.3
835 07:41:13.735188 PCI: 00:16.1
836 07:41:13.736657 PCI: 00:16.2
837 07:41:13.737819 PCI: 00:16.3
838 07:41:13.739308 PCI: 00:16.4
839 07:41:13.740864 PCI: 00:16.5
840 07:41:13.742718 PCI: 00:19.1
841 07:41:13.743602 PCI: 00:1a.0
842 07:41:13.744878 PCI: 00:1c.1
843 07:41:13.746170 PCI: 00:1c.2
844 07:41:13.747394 PCI: 00:1c.3
845 07:41:13.749243 PCI: 00:1c.4
846 07:41:13.750584 PCI: 00:1c.5
847 07:41:13.751980 PCI: 00:1c.6
848 07:41:13.753380 PCI: 00:1c.7
849 07:41:13.754168 PCI: 00:1d.1
850 07:41:13.756608 PCI: 00:1d.2
851 07:41:13.757530 PCI: 00:1d.3
852 07:41:13.758561 PCI: 00:1d.4
853 07:41:13.760539 PCI: 00:1e.0
854 07:41:13.761799 PCI: 00:1e.1
855 07:41:13.763162 PCI: 00:1e.2
856 07:41:13.763823 PCI: 00:1e.3
857 07:41:13.765713 PCI: 00:1f.1
858 07:41:13.766588 PCI: 00:1f.2
859 07:41:13.769778 PCI: Check your devicetree.cb.
860 07:41:13.772940 PCI: 00:14.0 scanning...
861 07:41:13.775565 scan_usb_bus for PCI: 00:14.0
862 07:41:13.777591 USB0 port 0 enabled
863 07:41:13.780298 USB0 port 0 scanning...
864 07:41:13.783912 scan_usb_bus for USB0 port 0
865 07:41:13.785922 USB2 port 0 enabled
866 07:41:13.788330 USB2 port 1 enabled
867 07:41:13.790225 USB2 port 2 enabled
868 07:41:13.791710 USB2 port 4 enabled
869 07:41:13.794345 USB2 port 5 enabled
870 07:41:13.796385 USB2 port 6 enabled
871 07:41:13.797427 USB2 port 7 enabled
872 07:41:13.800411 USB2 port 8 enabled
873 07:41:13.801920 USB2 port 9 enabled
874 07:41:13.804043 USB3 port 0 enabled
875 07:41:13.806154 USB3 port 1 enabled
876 07:41:13.808529 USB3 port 2 enabled
877 07:41:13.809976 USB3 port 3 enabled
878 07:41:13.811875 USB3 port 4 enabled
879 07:41:13.814470 USB2 port 0 scanning...
880 07:41:13.817326 scan_usb_bus for USB2 port 0
881 07:41:13.821207 scan_usb_bus for USB2 port 0 done
882 07:41:13.826562 scan_bus: scanning of bus USB2 port 0 took 9067 usecs
883 07:41:13.829068 USB2 port 1 scanning...
884 07:41:13.832828 scan_usb_bus for USB2 port 1
885 07:41:13.835881 scan_usb_bus for USB2 port 1 done
886 07:41:13.841367 scan_bus: scanning of bus USB2 port 1 took 9067 usecs
887 07:41:13.843301 USB2 port 2 scanning...
888 07:41:13.847326 scan_usb_bus for USB2 port 2
889 07:41:13.849766 scan_usb_bus for USB2 port 2 done
890 07:41:13.855554 scan_bus: scanning of bus USB2 port 2 took 9068 usecs
891 07:41:13.858218 USB2 port 4 scanning...
892 07:41:13.861500 scan_usb_bus for USB2 port 4
893 07:41:13.864774 scan_usb_bus for USB2 port 4 done
894 07:41:13.869532 scan_bus: scanning of bus USB2 port 4 took 9069 usecs
895 07:41:13.872515 USB2 port 5 scanning...
896 07:41:13.875455 scan_usb_bus for USB2 port 5
897 07:41:13.878868 scan_usb_bus for USB2 port 5 done
898 07:41:13.883905 scan_bus: scanning of bus USB2 port 5 took 9068 usecs
899 07:41:13.887303 USB2 port 6 scanning...
900 07:41:13.889776 scan_usb_bus for USB2 port 6
901 07:41:13.893625 scan_usb_bus for USB2 port 6 done
902 07:41:13.899293 scan_bus: scanning of bus USB2 port 6 took 9071 usecs
903 07:41:13.900674 USB2 port 7 scanning...
904 07:41:13.903869 scan_usb_bus for USB2 port 7
905 07:41:13.908387 scan_usb_bus for USB2 port 7 done
906 07:41:13.912771 scan_bus: scanning of bus USB2 port 7 took 9066 usecs
907 07:41:13.915285 USB2 port 8 scanning...
908 07:41:13.918917 scan_usb_bus for USB2 port 8
909 07:41:13.922749 scan_usb_bus for USB2 port 8 done
910 07:41:13.927527 scan_bus: scanning of bus USB2 port 8 took 9067 usecs
911 07:41:13.929633 USB2 port 9 scanning...
912 07:41:13.933376 scan_usb_bus for USB2 port 9
913 07:41:13.936117 scan_usb_bus for USB2 port 9 done
914 07:41:13.941682 scan_bus: scanning of bus USB2 port 9 took 9066 usecs
915 07:41:13.944708 USB3 port 0 scanning...
916 07:41:13.948111 scan_usb_bus for USB3 port 0
917 07:41:13.951383 scan_usb_bus for USB3 port 0 done
918 07:41:13.956796 scan_bus: scanning of bus USB3 port 0 took 9069 usecs
919 07:41:13.958252 USB3 port 1 scanning...
920 07:41:13.961845 scan_usb_bus for USB3 port 1
921 07:41:13.965815 scan_usb_bus for USB3 port 1 done
922 07:41:13.971121 scan_bus: scanning of bus USB3 port 1 took 9068 usecs
923 07:41:13.973155 USB3 port 2 scanning...
924 07:41:13.976993 scan_usb_bus for USB3 port 2
925 07:41:13.980389 scan_usb_bus for USB3 port 2 done
926 07:41:13.985164 scan_bus: scanning of bus USB3 port 2 took 9070 usecs
927 07:41:13.987371 USB3 port 3 scanning...
928 07:41:13.990458 scan_usb_bus for USB3 port 3
929 07:41:13.994563 scan_usb_bus for USB3 port 3 done
930 07:41:13.999493 scan_bus: scanning of bus USB3 port 3 took 9070 usecs
931 07:41:14.002507 USB3 port 4 scanning...
932 07:41:14.005273 scan_usb_bus for USB3 port 4
933 07:41:14.008928 scan_usb_bus for USB3 port 4 done
934 07:41:14.013853 scan_bus: scanning of bus USB3 port 4 took 9066 usecs
935 07:41:14.017761 scan_usb_bus for USB0 port 0 done
936 07:41:14.023761 scan_bus: scanning of bus USB0 port 0 took 239501 usecs
937 07:41:14.026666 scan_usb_bus for PCI: 00:14.0 done
938 07:41:14.031789 scan_bus: scanning of bus PCI: 00:14.0 took 256444 usecs
939 07:41:14.034504 PCI: 00:15.0 scanning...
940 07:41:14.038332 scan_generic_bus for PCI: 00:15.0
941 07:41:14.042640 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 07:41:14.046461 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 07:41:14.051081 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 07:41:14.054095 scan_generic_bus for PCI: 00:15.0 done
945 07:41:14.060026 scan_bus: scanning of bus PCI: 00:15.0 took 22393 usecs
946 07:41:14.062157 PCI: 00:15.1 scanning...
947 07:41:14.066399 scan_generic_bus for PCI: 00:15.1
948 07:41:14.070005 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 07:41:14.074695 scan_generic_bus for PCI: 00:15.1 done
950 07:41:14.079959 scan_bus: scanning of bus PCI: 00:15.1 took 14225 usecs
951 07:41:14.082500 PCI: 00:19.0 scanning...
952 07:41:14.086029 scan_generic_bus for PCI: 00:19.0
953 07:41:14.090544 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 07:41:14.094003 scan_generic_bus for PCI: 00:19.0 done
955 07:41:14.099373 scan_bus: scanning of bus PCI: 00:19.0 took 14225 usecs
956 07:41:14.101759 PCI: 00:1c.0 scanning...
957 07:41:14.106645 do_pci_scan_bridge for PCI: 00:1c.0
958 07:41:14.109298 PCI: pci_scan_bus for bus 01
959 07:41:14.112233 PCI: 01:00.0 [10ec/525a] enabled
960 07:41:14.114997 Capability: type 0x01 @ 0x80
961 07:41:14.118062 Capability: type 0x05 @ 0x90
962 07:41:14.121460 Capability: type 0x10 @ 0xb0
963 07:41:14.123894 Capability: type 0x10 @ 0x40
964 07:41:14.127582 Enabling Common Clock Configuration
965 07:41:14.131715 L1 Sub-State supported from root port 28
966 07:41:14.134763 L1 Sub-State Support = 0xf
967 07:41:14.138154 CommonModeRestoreTime = 0x3c
968 07:41:14.141750 Power On Value = 0x6, Power On Scale = 0x1
969 07:41:14.144607 ASPM: Enabled L0s and L1
970 07:41:14.148134 Capability: type 0x01 @ 0x80
971 07:41:14.150033 Capability: type 0x05 @ 0x90
972 07:41:14.152856 Capability: type 0x10 @ 0xb0
973 07:41:14.158502 scan_bus: scanning of bus PCI: 00:1c.0 took 53712 usecs
974 07:41:14.161113 PCI: 00:1d.0 scanning...
975 07:41:14.165778 do_pci_scan_bridge for PCI: 00:1d.0
976 07:41:14.168402 PCI: pci_scan_bus for bus 02
977 07:41:14.171574 PCI: 02:00.0 [1217/8620] enabled
978 07:41:14.174942 Capability: type 0x01 @ 0x6c
979 07:41:14.178054 Capability: type 0x05 @ 0x48
980 07:41:14.180718 Capability: type 0x10 @ 0x80
981 07:41:14.183524 Capability: type 0x10 @ 0x40
982 07:41:14.187466 L1 Sub-State supported from root port 29
983 07:41:14.190854 L1 Sub-State Support = 0xf
984 07:41:14.192910 CommonModeRestoreTime = 0x78
985 07:41:14.197764 Power On Value = 0x16, Power On Scale = 0x0
986 07:41:14.199231 ASPM: Enabled L1
987 07:41:14.203592 Capability: type 0x01 @ 0x6c
988 07:41:14.208512 Capability: type 0x05 @ 0x48
989 07:41:14.213074 Capability: type 0x10 @ 0x80
990 07:41:14.221242 scan_bus: scanning of bus PCI: 00:1d.0 took 56052 usecs
991 07:41:14.223073 PCI: 00:1f.0 scanning...
992 07:41:14.225768 scan_lpc_bus for PCI: 00:1f.0
993 07:41:14.228472 PNP: 0c09.0 enabled
994 07:41:14.231712 scan_lpc_bus for PCI: 00:1f.0 done
995 07:41:14.237499 scan_bus: scanning of bus PCI: 00:1f.0 took 11402 usecs
996 07:41:14.239953 PCI: 00:1f.3 scanning...
997 07:41:14.246180 scan_bus: scanning of bus PCI: 00:1f.3 took 2842 usecs
998 07:41:14.247986 PCI: 00:1f.4 scanning...
999 07:41:14.252331 scan_generic_bus for PCI: 00:1f.4
1000 07:41:14.256123 scan_generic_bus for PCI: 00:1f.4 done
1001 07:41:14.260955 scan_bus: scanning of bus PCI: 00:1f.4 took 10137 usecs
1002 07:41:14.263446 PCI: 00:1f.5 scanning...
1003 07:41:14.267154 scan_generic_bus for PCI: 00:1f.5
1004 07:41:14.271849 scan_generic_bus for PCI: 00:1f.5 done
1005 07:41:14.277367 scan_bus: scanning of bus PCI: 00:1f.5 took 10136 usecs
1006 07:41:14.282592 scan_bus: scanning of bus DOMAIN: 0000 took 707274 usecs
1007 07:41:14.286746 root_dev_scan_bus for Root Device done
1008 07:41:14.291895 scan_bus: scanning of bus Root Device took 727428 usecs
1009 07:41:14.292909 done
1010 07:41:14.299324 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 07:41:14.304490 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 07:41:14.312635 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 07:41:14.319299 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1014 07:41:14.322686 SPI flash protection: WPSW=0 SRP0=0
1015 07:41:14.328137 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1016 07:41:14.334563 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149452 exit 34831
1017 07:41:14.337341 found VGA at PCI: 00:02.0
1018 07:41:14.339643 Setting up VGA for PCI: 00:02.0
1019 07:41:14.344723 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1020 07:41:14.349894 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1021 07:41:14.352152 Allocating resources...
1022 07:41:14.354342 Reading resources...
1023 07:41:14.358678 Root Device read_resources bus 0 link: 0
1024 07:41:14.363350 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1025 07:41:14.368504 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1026 07:41:14.372857 DOMAIN: 0000 read_resources bus 0 link: 0
1027 07:41:14.379745 PCI: 00:14.0 read_resources bus 0 link: 0
1028 07:41:14.383659 USB0 port 0 read_resources bus 0 link: 0
1029 07:41:14.393224 USB0 port 0 read_resources bus 0 link: 0 done
1030 07:41:14.397852 PCI: 00:14.0 read_resources bus 0 link: 0 done
1031 07:41:14.403184 PCI: 00:15.0 read_resources bus 1 link: 0
1032 07:41:14.409161 PCI: 00:15.0 read_resources bus 1 link: 0 done
1033 07:41:14.413629 PCI: 00:15.1 read_resources bus 2 link: 0
1034 07:41:14.418727 PCI: 00:15.1 read_resources bus 2 link: 0 done
1035 07:41:14.424423 PCI: 00:19.0 read_resources bus 3 link: 0
1036 07:41:14.430426 PCI: 00:19.0 read_resources bus 3 link: 0 done
1037 07:41:14.434602 PCI: 00:1c.0 read_resources bus 1 link: 0
1038 07:41:14.440379 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1039 07:41:14.444541 PCI: 00:1d.0 read_resources bus 2 link: 0
1040 07:41:14.451548 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1041 07:41:14.455750 PCI: 00:1f.0 read_resources bus 0 link: 0
1042 07:41:14.460990 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1043 07:41:14.468050 DOMAIN: 0000 read_resources bus 0 link: 0 done
1044 07:41:14.472381 Root Device read_resources bus 0 link: 0 done
1045 07:41:14.474879 Done reading resources.
1046 07:41:14.480372 Show resources in subtree (Root Device)...After reading.
1047 07:41:14.485596 Root Device child on link 0 CPU_CLUSTER: 0
1048 07:41:14.489550 CPU_CLUSTER: 0 child on link 0 APIC: 00
1049 07:41:14.490888 APIC: 00
1050 07:41:14.492226 APIC: 02
1051 07:41:14.493608 APIC: 04
1052 07:41:14.494352 APIC: 01
1053 07:41:14.496180 APIC: 03
1054 07:41:14.496463 APIC: 05
1055 07:41:14.498380 APIC: 07
1056 07:41:14.499464 APIC: 06
1057 07:41:14.504009 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1058 07:41:14.512863 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1059 07:41:14.522743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1060 07:41:14.524769 PCI: 00:00.0
1061 07:41:14.534022 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1062 07:41:14.544051 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1063 07:41:14.553286 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1064 07:41:14.562039 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1065 07:41:14.571298 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1066 07:41:14.580362 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1067 07:41:14.589961 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1068 07:41:14.599445 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1069 07:41:14.608535 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1070 07:41:14.617784 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1071 07:41:14.627314 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1072 07:41:14.637231 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1073 07:41:14.646535 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1074 07:41:14.656386 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1075 07:41:14.657301 PCI: 00:02.0
1076 07:41:14.667455 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1077 07:41:14.678367 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1078 07:41:14.686969 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1079 07:41:14.688724 PCI: 00:04.0
1080 07:41:14.698115 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1081 07:41:14.699825 PCI: 00:08.0
1082 07:41:14.709939 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1083 07:41:14.711344 PCI: 00:12.0
1084 07:41:14.721319 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1085 07:41:14.725024 PCI: 00:14.0 child on link 0 USB0 port 0
1086 07:41:14.735543 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1087 07:41:14.740135 USB0 port 0 child on link 0 USB2 port 0
1088 07:41:14.742128 USB2 port 0
1089 07:41:14.743396 USB2 port 1
1090 07:41:14.744973 USB2 port 2
1091 07:41:14.747416 USB2 port 4
1092 07:41:14.748918 USB2 port 5
1093 07:41:14.749938 USB2 port 6
1094 07:41:14.751771 USB2 port 7
1095 07:41:14.754103 USB2 port 8
1096 07:41:14.755170 USB2 port 9
1097 07:41:14.757249 USB3 port 0
1098 07:41:14.759378 USB3 port 1
1099 07:41:14.760922 USB3 port 2
1100 07:41:14.762396 USB3 port 3
1101 07:41:14.764621 USB3 port 4
1102 07:41:14.765722 PCI: 00:14.2
1103 07:41:14.776553 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1104 07:41:14.785712 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1105 07:41:14.787808 PCI: 00:14.3
1106 07:41:14.798028 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1107 07:41:14.801969 PCI: 00:15.0 child on link 0 I2C: 01:10
1108 07:41:14.811445 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 07:41:14.813008 I2C: 01:10
1110 07:41:14.814954 I2C: 01:10
1111 07:41:14.816145 I2C: 01:34
1112 07:41:14.820599 PCI: 00:15.1 child on link 0 I2C: 02:2c
1113 07:41:14.831253 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1114 07:41:14.832052 I2C: 02:2c
1115 07:41:14.833446 PCI: 00:16.0
1116 07:41:14.843405 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1117 07:41:14.845942 PCI: 00:17.0
1118 07:41:14.855184 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1119 07:41:14.863949 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1120 07:41:14.871870 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1121 07:41:14.880048 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1122 07:41:14.888959 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1123 07:41:14.897347 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1124 07:41:14.901762 PCI: 00:19.0 child on link 0 I2C: 03:50
1125 07:41:14.912086 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 07:41:14.921667 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1127 07:41:14.922856 I2C: 03:50
1128 07:41:14.924707 PCI: 00:19.2
1129 07:41:14.935508 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1130 07:41:14.945430 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1131 07:41:14.949920 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1132 07:41:14.958921 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1133 07:41:14.968986 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1134 07:41:14.977617 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1135 07:41:14.980233 PCI: 01:00.0
1136 07:41:14.989033 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1137 07:41:14.993838 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1138 07:41:15.001862 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1139 07:41:15.012184 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1140 07:41:15.021405 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1141 07:41:15.022194 PCI: 02:00.0
1142 07:41:15.031434 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1143 07:41:15.041100 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1144 07:41:15.045592 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1145 07:41:15.053598 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1146 07:41:15.062748 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1147 07:41:15.064090 PNP: 0c09.0
1148 07:41:15.073330 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1149 07:41:15.081293 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1150 07:41:15.089876 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1151 07:41:15.091617 PCI: 00:1f.3
1152 07:41:15.101918 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 07:41:15.111398 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1154 07:41:15.113719 PCI: 00:1f.4
1155 07:41:15.122940 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1156 07:41:15.132416 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1157 07:41:15.133794 PCI: 00:1f.5
1158 07:41:15.143039 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1159 07:41:15.144422 PCI: 00:1f.6
1160 07:41:15.153942 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1161 07:41:15.160049 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1162 07:41:15.166684 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1163 07:41:15.173415 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1164 07:41:15.180256 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1165 07:41:15.186487 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1166 07:41:15.190419 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1167 07:41:15.193641 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1168 07:41:15.198019 PCI: 00:17.0 18 * [0x60 - 0x67] io
1169 07:41:15.201283 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1170 07:41:15.208150 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1171 07:41:15.214245 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1172 07:41:15.222688 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1173 07:41:15.230718 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1174 07:41:15.237758 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1175 07:41:15.241210 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1176 07:41:15.249447 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1177 07:41:15.257221 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 07:41:15.265944 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 07:41:15.272488 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 07:41:15.276128 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1181 07:41:15.280894 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1182 07:41:15.288209 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1183 07:41:15.292963 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1184 07:41:15.297957 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1185 07:41:15.302745 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1186 07:41:15.307942 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1187 07:41:15.313139 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1188 07:41:15.317164 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1189 07:41:15.321810 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1190 07:41:15.326995 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1191 07:41:15.332236 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1192 07:41:15.336471 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1193 07:41:15.342294 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1194 07:41:15.347093 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1195 07:41:15.351638 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1196 07:41:15.355826 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1197 07:41:15.361658 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1198 07:41:15.366467 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1199 07:41:15.370445 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1200 07:41:15.375542 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1201 07:41:15.380857 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1202 07:41:15.385541 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1203 07:41:15.389906 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1204 07:41:15.394907 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1205 07:41:15.399831 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1206 07:41:15.405076 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1207 07:41:15.409902 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1208 07:41:15.417985 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1209 07:41:15.421950 avoid_fixed_resources: DOMAIN: 0000
1210 07:41:15.427866 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1211 07:41:15.433646 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1212 07:41:15.441812 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1213 07:41:15.448703 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1214 07:41:15.456656 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1215 07:41:15.464010 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1216 07:41:15.472604 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1217 07:41:15.479744 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1218 07:41:15.487267 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1219 07:41:15.494781 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1220 07:41:15.502498 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1221 07:41:15.509193 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1222 07:41:15.511359 Setting resources...
1223 07:41:15.517913 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1224 07:41:15.521999 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1225 07:41:15.526361 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1226 07:41:15.529907 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1227 07:41:15.533816 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1228 07:41:15.540870 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1229 07:41:15.546308 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1230 07:41:15.552505 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1231 07:41:15.558539 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1232 07:41:15.564742 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1233 07:41:15.572392 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1234 07:41:15.578829 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1235 07:41:15.582975 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1236 07:41:15.588127 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1237 07:41:15.592858 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1238 07:41:15.597393 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1239 07:41:15.602644 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1240 07:41:15.607549 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1241 07:41:15.612405 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1242 07:41:15.616587 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1243 07:41:15.621573 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1244 07:41:15.626301 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1245 07:41:15.631381 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1246 07:41:15.636347 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1247 07:41:15.641241 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1248 07:41:15.646355 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1249 07:41:15.651108 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1250 07:41:15.656100 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1251 07:41:15.660826 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1252 07:41:15.665931 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1253 07:41:15.670684 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1254 07:41:15.676105 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1255 07:41:15.680681 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1256 07:41:15.685164 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1257 07:41:15.690624 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1258 07:41:15.694742 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1259 07:41:15.702086 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1260 07:41:15.710405 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1261 07:41:15.716658 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1262 07:41:15.724466 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1263 07:41:15.729621 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1264 07:41:15.736881 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1265 07:41:15.744453 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1266 07:41:15.751498 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1267 07:41:15.759195 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1268 07:41:15.763871 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1269 07:41:15.768391 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1270 07:41:15.775960 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1271 07:41:15.781182 Root Device assign_resources, bus 0 link: 0
1272 07:41:15.784900 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 07:41:15.793526 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 07:41:15.802684 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 07:41:15.809493 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 07:41:15.817709 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1277 07:41:15.826338 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1278 07:41:15.834571 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1279 07:41:15.843256 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1280 07:41:15.848112 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 07:41:15.851734 PCI: 00:14.0 assign_resources, bus 0 link: 0
1282 07:41:15.860078 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1283 07:41:15.868566 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1284 07:41:15.876651 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1285 07:41:15.884929 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1286 07:41:15.889109 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 07:41:15.894323 PCI: 00:15.0 assign_resources, bus 1 link: 0
1288 07:41:15.902524 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1289 07:41:15.907608 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 07:41:15.911823 PCI: 00:15.1 assign_resources, bus 2 link: 0
1291 07:41:15.920845 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1292 07:41:15.928323 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1293 07:41:15.935633 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1294 07:41:15.943361 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1295 07:41:15.951021 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1296 07:41:15.959509 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1297 07:41:15.966574 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1298 07:41:15.975311 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1299 07:41:15.983371 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1300 07:41:15.987624 PCI: 00:19.0 assign_resources, bus 3 link: 0
1301 07:41:15.992455 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 07:41:16.000241 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1303 07:41:16.009146 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1304 07:41:16.017836 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1305 07:41:16.026693 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1306 07:41:16.031375 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1307 07:41:16.038817 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1308 07:41:16.044559 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1309 07:41:16.052732 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1310 07:41:16.061214 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1311 07:41:16.069919 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1312 07:41:16.073982 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1313 07:41:16.083959 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1314 07:41:16.093353 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1315 07:41:16.100487 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1316 07:41:16.104649 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1317 07:41:16.110126 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 07:41:16.114289 LPC: Trying to open IO window from 930 size 8
1319 07:41:16.119814 LPC: Trying to open IO window from 940 size 8
1320 07:41:16.123411 LPC: Trying to open IO window from 950 size 10
1321 07:41:16.131795 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1322 07:41:16.139902 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1323 07:41:16.148491 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1324 07:41:16.156549 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1325 07:41:16.164774 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1326 07:41:16.170153 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 07:41:16.173691 Root Device assign_resources, bus 0 link: 0
1328 07:41:16.176355 Done setting resources.
1329 07:41:16.182976 Show resources in subtree (Root Device)...After assigning values.
1330 07:41:16.186899 Root Device child on link 0 CPU_CLUSTER: 0
1331 07:41:16.191174 CPU_CLUSTER: 0 child on link 0 APIC: 00
1332 07:41:16.193010 APIC: 00
1333 07:41:16.194287 APIC: 02
1334 07:41:16.195554 APIC: 04
1335 07:41:16.196471 APIC: 01
1336 07:41:16.198005 APIC: 03
1337 07:41:16.198939 APIC: 05
1338 07:41:16.200711 APIC: 07
1339 07:41:16.201548 APIC: 06
1340 07:41:16.206680 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1341 07:41:16.215842 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1342 07:41:16.227154 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1343 07:41:16.228779 PCI: 00:00.0
1344 07:41:16.238010 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1345 07:41:16.247120 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1346 07:41:16.257014 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1347 07:41:16.265959 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1348 07:41:16.275440 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1349 07:41:16.284494 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1350 07:41:16.293920 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1351 07:41:16.303389 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1352 07:41:16.313034 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1353 07:41:16.322254 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1354 07:41:16.331526 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1355 07:41:16.341924 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1356 07:41:16.351284 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1357 07:41:16.360005 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1358 07:41:16.362053 PCI: 00:02.0
1359 07:41:16.372633 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1360 07:41:16.382401 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1361 07:41:16.391859 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1362 07:41:16.393295 PCI: 00:04.0
1363 07:41:16.403652 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1364 07:41:16.405389 PCI: 00:08.0
1365 07:41:16.415579 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1366 07:41:16.418026 PCI: 00:12.0
1367 07:41:16.427537 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1368 07:41:16.432608 PCI: 00:14.0 child on link 0 USB0 port 0
1369 07:41:16.442863 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1370 07:41:16.446956 USB0 port 0 child on link 0 USB2 port 0
1371 07:41:16.448870 USB2 port 0
1372 07:41:16.450910 USB2 port 1
1373 07:41:16.452039 USB2 port 2
1374 07:41:16.454137 USB2 port 4
1375 07:41:16.455356 USB2 port 5
1376 07:41:16.457476 USB2 port 6
1377 07:41:16.459065 USB2 port 7
1378 07:41:16.460931 USB2 port 8
1379 07:41:16.462505 USB2 port 9
1380 07:41:16.464552 USB3 port 0
1381 07:41:16.466577 USB3 port 1
1382 07:41:16.468547 USB3 port 2
1383 07:41:16.469395 USB3 port 3
1384 07:41:16.471162 USB3 port 4
1385 07:41:16.473114 PCI: 00:14.2
1386 07:41:16.483579 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1387 07:41:16.494103 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1388 07:41:16.496150 PCI: 00:14.3
1389 07:41:16.505631 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1390 07:41:16.509845 PCI: 00:15.0 child on link 0 I2C: 01:10
1391 07:41:16.520090 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1392 07:41:16.522217 I2C: 01:10
1393 07:41:16.523576 I2C: 01:10
1394 07:41:16.525456 I2C: 01:34
1395 07:41:16.529563 PCI: 00:15.1 child on link 0 I2C: 02:2c
1396 07:41:16.539676 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1397 07:41:16.540834 I2C: 02:2c
1398 07:41:16.543111 PCI: 00:16.0
1399 07:41:16.553555 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1400 07:41:16.554557 PCI: 00:17.0
1401 07:41:16.564951 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1402 07:41:16.575171 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1403 07:41:16.583861 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1404 07:41:16.593800 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1405 07:41:16.603183 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1406 07:41:16.613287 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1407 07:41:16.617254 PCI: 00:19.0 child on link 0 I2C: 03:50
1408 07:41:16.626723 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1409 07:41:16.637744 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1410 07:41:16.639064 I2C: 03:50
1411 07:41:16.640859 PCI: 00:19.2
1412 07:41:16.651825 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1413 07:41:16.662279 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1414 07:41:16.666930 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1415 07:41:16.675670 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1416 07:41:16.685585 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1417 07:41:16.696228 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1418 07:41:16.698305 PCI: 01:00.0
1419 07:41:16.708990 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1420 07:41:16.713038 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1421 07:41:16.722152 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1422 07:41:16.731898 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1423 07:41:16.742919 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1424 07:41:16.744385 PCI: 02:00.0
1425 07:41:16.754926 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1426 07:41:16.764792 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1427 07:41:16.769232 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1428 07:41:16.778378 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1429 07:41:16.787264 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1430 07:41:16.788735 PNP: 0c09.0
1431 07:41:16.797483 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1432 07:41:16.806049 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1433 07:41:16.814282 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1434 07:41:16.816158 PCI: 00:1f.3
1435 07:41:16.826326 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1436 07:41:16.836552 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1437 07:41:16.838953 PCI: 00:1f.4
1438 07:41:16.848237 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1439 07:41:16.858157 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1440 07:41:16.859527 PCI: 00:1f.5
1441 07:41:16.870414 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1442 07:41:16.871677 PCI: 00:1f.6
1443 07:41:16.882234 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1444 07:41:16.884392 Done allocating resources.
1445 07:41:16.890391 BS: BS_DEV_RESOURCES times (us): entry 0 run 2550485 exit 14
1446 07:41:16.893007 Enabling resources...
1447 07:41:16.897936 PCI: 00:00.0 subsystem <- 1028/3e34
1448 07:41:16.900047 PCI: 00:00.0 cmd <- 06
1449 07:41:16.904582 PCI: 00:02.0 subsystem <- 1028/3ea0
1450 07:41:16.906319 PCI: 00:02.0 cmd <- 03
1451 07:41:16.911014 PCI: 00:04.0 subsystem <- 1028/1903
1452 07:41:16.912950 PCI: 00:04.0 cmd <- 02
1453 07:41:16.915208 PCI: 00:08.0 cmd <- 06
1454 07:41:16.919573 PCI: 00:12.0 subsystem <- 1028/9df9
1455 07:41:16.921547 PCI: 00:12.0 cmd <- 02
1456 07:41:16.925895 PCI: 00:14.0 subsystem <- 1028/9ded
1457 07:41:16.927778 PCI: 00:14.0 cmd <- 02
1458 07:41:16.930815 PCI: 00:14.2 cmd <- 02
1459 07:41:16.934208 PCI: 00:14.3 subsystem <- 1028/9df0
1460 07:41:16.936939 PCI: 00:14.3 cmd <- 02
1461 07:41:16.940654 PCI: 00:15.0 subsystem <- 1028/9de8
1462 07:41:16.942767 PCI: 00:15.0 cmd <- 02
1463 07:41:16.946728 PCI: 00:15.1 subsystem <- 1028/9de9
1464 07:41:16.949728 PCI: 00:15.1 cmd <- 02
1465 07:41:16.952966 PCI: 00:16.0 subsystem <- 1028/9de0
1466 07:41:16.955393 PCI: 00:16.0 cmd <- 02
1467 07:41:16.959847 PCI: 00:17.0 subsystem <- 1028/9dd3
1468 07:41:16.962594 PCI: 00:17.0 cmd <- 03
1469 07:41:16.966505 PCI: 00:19.0 subsystem <- 1028/9dc5
1470 07:41:16.968583 PCI: 00:19.0 cmd <- 06
1471 07:41:16.972559 PCI: 00:19.2 subsystem <- 1028/9dc7
1472 07:41:16.974585 PCI: 00:19.2 cmd <- 06
1473 07:41:16.978058 PCI: 00:1c.0 bridge ctrl <- 0003
1474 07:41:16.981452 PCI: 00:1c.0 subsystem <- 1028/9dbf
1475 07:41:16.984739 Capability: type 0x10 @ 0x40
1476 07:41:16.987379 Capability: type 0x05 @ 0x80
1477 07:41:16.991254 Capability: type 0x0d @ 0x90
1478 07:41:16.992538 PCI: 00:1c.0 cmd <- 06
1479 07:41:16.996606 PCI: 00:1d.0 bridge ctrl <- 0003
1480 07:41:17.000469 PCI: 00:1d.0 subsystem <- 1028/9db4
1481 07:41:17.003023 Capability: type 0x10 @ 0x40
1482 07:41:17.006070 Capability: type 0x05 @ 0x80
1483 07:41:17.009415 Capability: type 0x0d @ 0x90
1484 07:41:17.010846 PCI: 00:1d.0 cmd <- 06
1485 07:41:17.014618 PCI: 00:1f.0 subsystem <- 1028/9d84
1486 07:41:17.017688 PCI: 00:1f.0 cmd <- 407
1487 07:41:17.021366 PCI: 00:1f.3 subsystem <- 1028/9dc8
1488 07:41:17.023383 PCI: 00:1f.3 cmd <- 02
1489 07:41:17.028026 PCI: 00:1f.4 subsystem <- 1028/9da3
1490 07:41:17.030152 PCI: 00:1f.4 cmd <- 03
1491 07:41:17.033955 PCI: 00:1f.5 subsystem <- 1028/9da4
1492 07:41:17.035994 PCI: 00:1f.5 cmd <- 406
1493 07:41:17.040026 PCI: 00:1f.6 subsystem <- 1028/15be
1494 07:41:17.042701 PCI: 00:1f.6 cmd <- 02
1495 07:41:17.053023 PCI: 01:00.0 cmd <- 02
1496 07:41:17.057505 PCI: 02:00.0 cmd <- 06
1497 07:41:17.062271 done.
1498 07:41:17.067876 BS: BS_DEV_ENABLE times (us): entry 398 run 170666 exit 0
1499 07:41:17.070362 Initializing devices...
1500 07:41:17.071797 Root Device init ...
1501 07:41:17.076335 Root Device init finished in 2141 usecs
1502 07:41:17.079089 CPU_CLUSTER: 0 init ...
1503 07:41:17.083722 CPU_CLUSTER: 0 init finished in 2433 usecs
1504 07:41:17.089921 PCI: 00:00.0 init ...
1505 07:41:17.093174 CPU TDP: 15 Watts
1506 07:41:17.095295 CPU PL2 = 51 Watts
1507 07:41:17.098539 PCI: 00:00.0 init finished in 7043 usecs
1508 07:41:17.101480 PCI: 00:02.0 init ...
1509 07:41:17.105303 PCI: 00:02.0 init finished in 2238 usecs
1510 07:41:17.107679 PCI: 00:04.0 init ...
1511 07:41:17.112345 PCI: 00:04.0 init finished in 2238 usecs
1512 07:41:17.114490 PCI: 00:08.0 init ...
1513 07:41:17.118365 PCI: 00:08.0 init finished in 2238 usecs
1514 07:41:17.120938 PCI: 00:12.0 init ...
1515 07:41:17.125788 PCI: 00:12.0 init finished in 2238 usecs
1516 07:41:17.127836 PCI: 00:14.0 init ...
1517 07:41:17.131736 PCI: 00:14.0 init finished in 2237 usecs
1518 07:41:17.135403 PCI: 00:14.2 init ...
1519 07:41:17.139044 PCI: 00:14.2 init finished in 2238 usecs
1520 07:41:17.142127 PCI: 00:14.3 init ...
1521 07:41:17.145599 PCI: 00:14.3 init finished in 2234 usecs
1522 07:41:17.148253 PCI: 00:15.0 init ...
1523 07:41:17.152271 DW I2C bus 0 at 0xd1347000 (400 KHz)
1524 07:41:17.156357 PCI: 00:15.0 init finished in 5941 usecs
1525 07:41:17.158511 PCI: 00:15.1 init ...
1526 07:41:17.162105 DW I2C bus 1 at 0xd1348000 (400 KHz)
1527 07:41:17.166636 PCI: 00:15.1 init finished in 5939 usecs
1528 07:41:17.169179 PCI: 00:16.0 init ...
1529 07:41:17.173175 PCI: 00:16.0 init finished in 2238 usecs
1530 07:41:17.176178 PCI: 00:19.0 init ...
1531 07:41:17.180265 DW I2C bus 4 at 0xd134a000 (400 KHz)
1532 07:41:17.183604 PCI: 00:19.0 init finished in 5930 usecs
1533 07:41:17.187649 PCI: 00:1c.0 init ...
1534 07:41:17.190140 Initializing PCH PCIe bridge.
1535 07:41:17.194758 PCI: 00:1c.0 init finished in 5253 usecs
1536 07:41:17.196754 PCI: 00:1d.0 init ...
1537 07:41:17.200112 Initializing PCH PCIe bridge.
1538 07:41:17.203966 PCI: 00:1d.0 init finished in 5252 usecs
1539 07:41:17.206711 PCI: 00:1f.0 init ...
1540 07:41:17.210972 IOAPIC: Initializing IOAPIC at 0xfec00000
1541 07:41:17.215479 IOAPIC: Bootstrap Processor Local APIC = 0x00
1542 07:41:17.217397 IOAPIC: ID = 0x02
1543 07:41:17.219430 IOAPIC: Dumping registers
1544 07:41:17.222981 reg 0x0000: 0x02000000
1545 07:41:17.224933 reg 0x0001: 0x00770020
1546 07:41:17.227523 reg 0x0002: 0x00000000
1547 07:41:17.233282 PCI: 00:1f.0 init finished in 25055 usecs
1548 07:41:17.236348 PCI: 00:1f.3 init ...
1549 07:41:17.241098 HDA: codec_mask = 05
1550 07:41:17.244281 HDA: Initializing codec #2
1551 07:41:17.246396 HDA: codec viddid: 8086280b
1552 07:41:17.250201 HDA: No verb table entry found
1553 07:41:17.252225 HDA: Initializing codec #0
1554 07:41:17.256087 HDA: codec viddid: 10ec0236
1555 07:41:17.262026 HDA: verb loaded.
1556 07:41:17.266522 PCI: 00:1f.3 init finished in 28857 usecs
1557 07:41:17.269897 PCI: 00:1f.4 init ...
1558 07:41:17.273792 PCI: 00:1f.4 init finished in 2239 usecs
1559 07:41:17.277258 PCI: 00:1f.6 init ...
1560 07:41:17.281081 PCI: 00:1f.6 init finished in 2238 usecs
1561 07:41:17.292299 PCI: 01:00.0 init ...
1562 07:41:17.295626 PCI: 01:00.0 init finished in 2238 usecs
1563 07:41:17.298684 PCI: 02:00.0 init ...
1564 07:41:17.302087 PCI: 02:00.0 init finished in 2238 usecs
1565 07:41:17.304867 PNP: 0c09.0 init ...
1566 07:41:17.308703 EC Label : 00.00.20
1567 07:41:17.312516 EC Revision : 9ca674bba
1568 07:41:17.316082 EC Model Num : 08B9
1569 07:41:17.319943 EC Build Date : 05/10/19
1570 07:41:17.328631 PNP: 0c09.0 init finished in 21760 usecs
1571 07:41:17.330775 Devices initialized
1572 07:41:17.333518 Show all devs... After init.
1573 07:41:17.336229 Root Device: enabled 1
1574 07:41:17.338616 CPU_CLUSTER: 0: enabled 1
1575 07:41:17.341040 DOMAIN: 0000: enabled 1
1576 07:41:17.343257 APIC: 00: enabled 1
1577 07:41:17.345958 PCI: 00:00.0: enabled 1
1578 07:41:17.348486 PCI: 00:02.0: enabled 1
1579 07:41:17.350450 PCI: 00:04.0: enabled 1
1580 07:41:17.352915 PCI: 00:12.0: enabled 1
1581 07:41:17.355088 PCI: 00:12.5: enabled 0
1582 07:41:17.357719 PCI: 00:12.6: enabled 0
1583 07:41:17.360450 PCI: 00:13.0: enabled 0
1584 07:41:17.362623 PCI: 00:14.0: enabled 1
1585 07:41:17.365907 PCI: 00:14.1: enabled 0
1586 07:41:17.367511 PCI: 00:14.3: enabled 1
1587 07:41:17.370524 PCI: 00:14.5: enabled 0
1588 07:41:17.372571 PCI: 00:15.0: enabled 1
1589 07:41:17.375107 PCI: 00:15.1: enabled 1
1590 07:41:17.377160 PCI: 00:15.2: enabled 0
1591 07:41:17.379847 PCI: 00:15.3: enabled 0
1592 07:41:17.381915 PCI: 00:16.0: enabled 1
1593 07:41:17.384877 PCI: 00:16.1: enabled 0
1594 07:41:17.386967 PCI: 00:16.2: enabled 0
1595 07:41:17.389307 PCI: 00:16.3: enabled 0
1596 07:41:17.391681 PCI: 00:16.4: enabled 0
1597 07:41:17.394836 PCI: 00:16.5: enabled 0
1598 07:41:17.396923 PCI: 00:17.0: enabled 1
1599 07:41:17.399610 PCI: 00:19.0: enabled 1
1600 07:41:17.401932 PCI: 00:19.1: enabled 0
1601 07:41:17.403999 PCI: 00:19.2: enabled 1
1602 07:41:17.406746 PCI: 00:1a.0: enabled 0
1603 07:41:17.408777 PCI: 00:1c.0: enabled 1
1604 07:41:17.411495 PCI: 00:1c.1: enabled 0
1605 07:41:17.413974 PCI: 00:1c.2: enabled 0
1606 07:41:17.416201 PCI: 00:1c.3: enabled 0
1607 07:41:17.418813 PCI: 00:1c.4: enabled 0
1608 07:41:17.420912 PCI: 00:1c.5: enabled 0
1609 07:41:17.424002 PCI: 00:1c.6: enabled 0
1610 07:41:17.426769 PCI: 00:1c.7: enabled 0
1611 07:41:17.428794 PCI: 00:1d.0: enabled 1
1612 07:41:17.431424 PCI: 00:1d.1: enabled 0
1613 07:41:17.433147 PCI: 00:1d.2: enabled 0
1614 07:41:17.435870 PCI: 00:1d.3: enabled 0
1615 07:41:17.437840 PCI: 00:1d.4: enabled 0
1616 07:41:17.441113 PCI: 00:1e.0: enabled 0
1617 07:41:17.443092 PCI: 00:1e.1: enabled 0
1618 07:41:17.445713 PCI: 00:1e.2: enabled 0
1619 07:41:17.447839 PCI: 00:1e.3: enabled 0
1620 07:41:17.450379 PCI: 00:1f.0: enabled 1
1621 07:41:17.452612 PCI: 00:1f.1: enabled 0
1622 07:41:17.455548 PCI: 00:1f.2: enabled 0
1623 07:41:17.457993 PCI: 00:1f.3: enabled 1
1624 07:41:17.460125 PCI: 00:1f.4: enabled 1
1625 07:41:17.462553 PCI: 00:1f.5: enabled 1
1626 07:41:17.464766 PCI: 00:1f.6: enabled 1
1627 07:41:17.467390 USB0 port 0: enabled 1
1628 07:41:17.469519 I2C: 01:10: enabled 1
1629 07:41:17.471561 I2C: 01:10: enabled 1
1630 07:41:17.474054 I2C: 01:34: enabled 1
1631 07:41:17.476270 I2C: 02:2c: enabled 1
1632 07:41:17.478845 I2C: 03:50: enabled 1
1633 07:41:17.481517 PNP: 0c09.0: enabled 1
1634 07:41:17.483003 USB2 port 0: enabled 1
1635 07:41:17.486122 USB2 port 1: enabled 1
1636 07:41:17.487881 USB2 port 2: enabled 1
1637 07:41:17.490253 USB2 port 4: enabled 1
1638 07:41:17.492672 USB2 port 5: enabled 1
1639 07:41:17.494708 USB2 port 6: enabled 1
1640 07:41:17.496836 USB2 port 7: enabled 1
1641 07:41:17.499239 USB2 port 8: enabled 1
1642 07:41:17.501670 USB2 port 9: enabled 1
1643 07:41:17.503858 USB3 port 0: enabled 1
1644 07:41:17.506504 USB3 port 1: enabled 1
1645 07:41:17.508490 USB3 port 2: enabled 1
1646 07:41:17.511266 USB3 port 3: enabled 1
1647 07:41:17.514383 USB3 port 4: enabled 1
1648 07:41:17.516224 APIC: 02: enabled 1
1649 07:41:17.518130 APIC: 04: enabled 1
1650 07:41:17.520109 APIC: 01: enabled 1
1651 07:41:17.522099 APIC: 03: enabled 1
1652 07:41:17.523544 APIC: 05: enabled 1
1653 07:41:17.526101 APIC: 07: enabled 1
1654 07:41:17.528132 APIC: 06: enabled 1
1655 07:41:17.530840 PCI: 00:08.0: enabled 1
1656 07:41:17.532892 PCI: 00:14.2: enabled 1
1657 07:41:17.535240 PCI: 01:00.0: enabled 1
1658 07:41:17.537301 PCI: 02:00.0: enabled 1
1659 07:41:17.542512 Disabling ACPI via APMC:
1660 07:41:17.544401 done.
1661 07:41:17.549626 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1662 07:41:17.553289 ELOG: NV offset 0x1bf0000 size 0x4000
1663 07:41:17.560814 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1664 07:41:17.568276 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:17 UTC
1665 07:41:17.572488 POST: Unexpected post code in previous boot: 0x93
1666 07:41:17.579066 ELOG: Event(A3) added with size 11 at 2024-01-03 07:41:17 UTC
1667 07:41:17.585220 ELOG: Event(A6) added with size 13 at 2024-01-03 07:41:17 UTC
1668 07:41:17.591875 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:17 UTC
1669 07:41:17.597709 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:17 UTC
1670 07:41:17.604472 ELOG: Event(9A) added with size 9 at 2024-01-03 07:41:17 UTC
1671 07:41:17.610500 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:17 UTC
1672 07:41:17.616707 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:17 UTC
1673 07:41:17.623006 BS: BS_DEV_INIT times (us): entry 0 run 470062 exit 78901
1674 07:41:17.629429 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:17 UTC
1675 07:41:17.636473 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 07:41:17.642943 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:17 UTC
1677 07:41:17.647528 elog_add_boot_reason: Logged dev mode boot
1678 07:41:17.649884 Finalize devices...
1679 07:41:17.651352 PCI: 00:17.0 final
1680 07:41:17.653785 Devices finalized
1681 07:41:17.658491 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1682 07:41:17.664920 BS: BS_POST_DEVICE times (us): entry 24813 run 5942 exit 5371
1683 07:41:17.670750 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1684 07:41:17.679123 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1685 07:41:17.683426 disable_unused_touchscreen: Disable ACPI0C50
1686 07:41:17.687451 disable_unused_touchscreen: Enable ELAN900C
1687 07:41:17.691223 CBFS @ 1d00000 size 300000
1688 07:41:17.697435 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1689 07:41:17.700221 CBFS: Locating 'fallback/dsdt.aml'
1690 07:41:17.704474 CBFS: Found @ offset 10b200 size 4448
1691 07:41:17.707867 CBFS @ 1d00000 size 300000
1692 07:41:17.714084 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1693 07:41:17.717447 CBFS: Locating 'fallback/slic'
1694 07:41:17.721603 CBFS: 'fallback/slic' not found.
1695 07:41:17.725621 ACPI: Writing ACPI tables at 89c0f000.
1696 07:41:17.727613 ACPI: * FACS
1697 07:41:17.728976 ACPI: * DSDT
1698 07:41:17.733544 Ramoops buffer: 0x100000@0x89b0e000.
1699 07:41:17.737892 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1700 07:41:17.741913 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1701 07:41:17.745756 ACPI: * FADT
1702 07:41:17.747592 SCI is IRQ9
1703 07:41:17.750748 ACPI: added table 1/32, length now 40
1704 07:41:17.753156 ACPI: * SSDT
1705 07:41:17.756187 Found 1 CPU(s) with 8 core(s) each.
1706 07:41:17.760507 Error: Could not locate 'wifi_sar' in VPD.
1707 07:41:17.764431 Error: failed from getting SAR limits!
1708 07:41:17.769082 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1709 07:41:17.772963 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1710 07:41:17.777019 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1711 07:41:17.781125 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1712 07:41:17.786316 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1713 07:41:17.791160 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1714 07:41:17.796514 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1715 07:41:17.800297 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1716 07:41:17.806340 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1717 07:41:17.812409 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1718 07:41:17.818600 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1719 07:41:17.824604 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1720 07:41:17.828996 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1721 07:41:17.833554 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1722 07:41:17.838327 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1723 07:41:17.842904 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1724 07:41:17.848310 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1725 07:41:17.854142 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1726 07:41:17.859567 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1727 07:41:17.865987 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1728 07:41:17.871723 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1729 07:41:17.876369 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1730 07:41:17.880781 ACPI: added table 2/32, length now 44
1731 07:41:17.882509 ACPI: * MCFG
1732 07:41:17.885537 ACPI: added table 3/32, length now 48
1733 07:41:17.887109 ACPI: * TPM2
1734 07:41:17.890532 TPM2 log created at 89afe000
1735 07:41:17.893784 ACPI: added table 4/32, length now 52
1736 07:41:17.896351 ACPI: * MADT
1737 07:41:17.897694 SCI is IRQ9
1738 07:41:17.901095 ACPI: added table 5/32, length now 56
1739 07:41:17.902401 current = 89c14bd0
1740 07:41:17.905688 ACPI: * IGD OpRegion
1741 07:41:17.907753 GMA: Found VBT in CBFS
1742 07:41:17.910502 GMA: Found valid VBT in CBFS
1743 07:41:17.913871 ACPI: added table 6/32, length now 60
1744 07:41:17.915953 ACPI: * HPET
1745 07:41:17.919819 ACPI: added table 7/32, length now 64
1746 07:41:17.921070 ACPI: done.
1747 07:41:17.923747 ACPI tables: 31872 bytes.
1748 07:41:17.927024 smbios_write_tables: 89afd000
1749 07:41:17.928524 recv_ec_data: 0x01
1750 07:41:17.930629 Create SMBIOS type 17
1751 07:41:17.933327 PCI: 00:14.3 (Intel WiFi)
1752 07:41:17.936648 SMBIOS tables: 708 bytes.
1753 07:41:17.940364 Writing table forward entry at 0x00000500
1754 07:41:17.947360 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1755 07:41:17.949925 Writing coreboot table at 0x89c33000
1756 07:41:17.956308 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1757 07:41:17.960964 1. 0000000000001000-000000000009ffff: RAM
1758 07:41:17.965063 2. 00000000000a0000-00000000000fffff: RESERVED
1759 07:41:17.969671 3. 0000000000100000-0000000089afcfff: RAM
1760 07:41:17.975347 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1761 07:41:17.980348 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1762 07:41:17.985912 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1763 07:41:17.990815 7. 000000008a000000-000000008f7fffff: RESERVED
1764 07:41:17.995897 8. 00000000e0000000-00000000efffffff: RESERVED
1765 07:41:18.000294 9. 00000000fc000000-00000000fc000fff: RESERVED
1766 07:41:18.005672 10. 00000000fe000000-00000000fe00ffff: RESERVED
1767 07:41:18.010503 11. 00000000fed10000-00000000fed17fff: RESERVED
1768 07:41:18.014554 12. 00000000fed80000-00000000fed83fff: RESERVED
1769 07:41:18.019436 13. 00000000feda0000-00000000feda1fff: RESERVED
1770 07:41:18.023435 14. 0000000100000000-000000026e7fffff: RAM
1771 07:41:18.027999 Graphics framebuffer located at 0xc0000000
1772 07:41:18.030606 Passing 6 GPIOs to payload:
1773 07:41:18.036409 NAME | PORT | POLARITY | VALUE
1774 07:41:18.041339 write protect | 0x000000dc | high | low
1775 07:41:18.047136 recovery | 0x000000d5 | low | high
1776 07:41:18.052043 lid | undefined | high | high
1777 07:41:18.057353 power | undefined | high | low
1778 07:41:18.062578 oprom | undefined | high | low
1779 07:41:18.067690 EC in RW | undefined | high | low
1780 07:41:18.069696 recv_ec_data: 0x01
1781 07:41:18.070902 SKU ID: 3
1782 07:41:18.073598 CBFS @ 1d00000 size 300000
1783 07:41:18.079898 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1784 07:41:18.086282 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum c2a1
1785 07:41:18.089587 coreboot table: 1484 bytes.
1786 07:41:18.092187 IMD ROOT 0. 89fff000 00001000
1787 07:41:18.095777 IMD SMALL 1. 89ffe000 00001000
1788 07:41:18.098563 FSP MEMORY 2. 89d0e000 002f0000
1789 07:41:18.102794 CONSOLE 3. 89cee000 00020000
1790 07:41:18.105752 TIME STAMP 4. 89ced000 00000910
1791 07:41:18.109103 VBOOT WORK 5. 89cea000 00003000
1792 07:41:18.112531 VBOOT 6. 89ce9000 00000c0c
1793 07:41:18.115138 MRC DATA 7. 89ce7000 000018f0
1794 07:41:18.118612 ROMSTG STCK 8. 89ce6000 00000400
1795 07:41:18.122848 AFTER CAR 9. 89cdc000 0000a000
1796 07:41:18.125253 RAMSTAGE 10. 89c80000 0005c000
1797 07:41:18.129311 REFCODE 11. 89c4b000 00035000
1798 07:41:18.132631 SMM BACKUP 12. 89c3b000 00010000
1799 07:41:18.135929 COREBOOT 13. 89c33000 00008000
1800 07:41:18.139059 ACPI 14. 89c0f000 00024000
1801 07:41:18.141780 ACPI GNVS 15. 89c0e000 00001000
1802 07:41:18.145375 RAMOOPS 16. 89b0e000 00100000
1803 07:41:18.148500 TPM2 TCGLOG17. 89afe000 00010000
1804 07:41:18.152394 SMBIOS 18. 89afd000 00000800
1805 07:41:18.153506 IMD small region:
1806 07:41:18.157341 IMD ROOT 0. 89ffec00 00000400
1807 07:41:18.160593 FSP RUNTIME 1. 89ffebe0 00000004
1808 07:41:18.163955 POWER STATE 2. 89ffeba0 00000040
1809 07:41:18.167772 ROMSTAGE 3. 89ffeb80 00000004
1810 07:41:18.171907 MEM INFO 4. 89ffe9c0 000001a9
1811 07:41:18.174646 VPD 5. 89ffe940 0000006c
1812 07:41:18.178262 COREBOOTFWD 6. 89ffe900 00000028
1813 07:41:18.181313 MTRR: Physical address space:
1814 07:41:18.187870 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 07:41:18.193602 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 07:41:18.200129 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1817 07:41:18.206323 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1818 07:41:18.212463 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 07:41:18.218999 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 07:41:18.225509 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1821 07:41:18.229142 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 07:41:18.233209 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 07:41:18.237418 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 07:41:18.241218 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 07:41:18.245658 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 07:41:18.249823 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 07:41:18.253401 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 07:41:18.257981 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 07:41:18.262008 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 07:41:18.265968 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 07:41:18.269850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 07:41:18.273584 call enable_fixed_mtrr()
1833 07:41:18.277678 CPU physical address size: 39 bits
1834 07:41:18.281628 MTRR: default type WB/UC MTRR counts: 7/7.
1835 07:41:18.284920 MTRR: UC selected as default type.
1836 07:41:18.291061 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1837 07:41:18.297524 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1838 07:41:18.303330 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1839 07:41:18.309470 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1840 07:41:18.315870 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 07:41:18.321988 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1842 07:41:18.328336 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1843 07:41:18.329038
1844 07:41:18.330779 MTRR check
1845 07:41:18.332511 Fixed MTRRs : Enabled
1846 07:41:18.335227 Variable MTRRs: Enabled
1847 07:41:18.335979
1848 07:41:18.340238 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 07:41:18.343620 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 07:41:18.348316 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 07:41:18.352230 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 07:41:18.356093 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 07:41:18.359830 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 07:41:18.364496 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 07:41:18.368642 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 07:41:18.372110 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 07:41:18.376107 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 07:41:18.380629 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 07:41:18.387491 BS: BS_WRITE_TABLES times (us): entry 17212 run 490639 exit 157291
1860 07:41:18.390529 call enable_fixed_mtrr()
1861 07:41:18.393281 CBFS @ 1d00000 size 300000
1862 07:41:18.399407 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1863 07:41:18.402370 CPU physical address size: 39 bits
1864 07:41:18.406072 CBFS: Locating 'fallback/payload'
1865 07:41:18.410903 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 07:41:18.414198 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 07:41:18.418176 MTRR: Fixed MSR 0x258 0x0606060606060606
1868 07:41:18.422299 MTRR: Fixed MSR 0x259 0x0000000000000000
1869 07:41:18.426211 MTRR: Fixed MSR 0x268 0x0606060606060606
1870 07:41:18.430852 MTRR: Fixed MSR 0x269 0x0606060606060606
1871 07:41:18.435103 MTRR: Fixed MSR 0x26a 0x0606060606060606
1872 07:41:18.438794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1873 07:41:18.443470 MTRR: Fixed MSR 0x26c 0x0606060606060606
1874 07:41:18.447225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1875 07:41:18.451327 MTRR: Fixed MSR 0x26e 0x0606060606060606
1876 07:41:18.455252 MTRR: Fixed MSR 0x26f 0x0606060606060606
1877 07:41:18.459902 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 07:41:18.462234 call enable_fixed_mtrr()
1879 07:41:18.466056 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 07:41:18.471088 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 07:41:18.474276 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 07:41:18.478232 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 07:41:18.483309 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 07:41:18.486738 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 07:41:18.491252 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 07:41:18.494700 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 07:41:18.499126 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 07:41:18.503330 CPU physical address size: 39 bits
1889 07:41:18.506041 call enable_fixed_mtrr()
1890 07:41:18.509525 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 07:41:18.514005 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 07:41:18.518300 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 07:41:18.522100 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 07:41:18.525733 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 07:41:18.530678 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 07:41:18.534158 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 07:41:18.538674 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 07:41:18.542320 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 07:41:18.547168 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 07:41:18.551138 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 07:41:18.554391 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 07:41:18.558718 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 07:41:18.561527 call enable_fixed_mtrr()
1904 07:41:18.565835 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 07:41:18.569510 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 07:41:18.573498 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 07:41:18.577585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 07:41:18.582281 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 07:41:18.585719 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 07:41:18.590401 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 07:41:18.594531 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 07:41:18.598464 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 07:41:18.602250 CPU physical address size: 39 bits
1914 07:41:18.605628 CPU physical address size: 39 bits
1915 07:41:18.608347 call enable_fixed_mtrr()
1916 07:41:18.613046 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 07:41:18.616464 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 07:41:18.621028 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 07:41:18.624253 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 07:41:18.628663 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 07:41:18.633006 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 07:41:18.637100 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 07:41:18.640650 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 07:41:18.645187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 07:41:18.649007 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 07:41:18.653022 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 07:41:18.657057 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 07:41:18.662250 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 07:41:18.663967 call enable_fixed_mtrr()
1930 07:41:18.668320 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 07:41:18.672885 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 07:41:18.676503 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 07:41:18.680150 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 07:41:18.684901 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 07:41:18.688790 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 07:41:18.693063 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 07:41:18.697462 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 07:41:18.700606 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 07:41:18.704958 CPU physical address size: 39 bits
1940 07:41:18.708282 call enable_fixed_mtrr()
1941 07:41:18.712279 CBFS: Found @ offset 1cf4c0 size 3a954
1942 07:41:18.714941 CPU physical address size: 39 bits
1943 07:41:18.718505 CPU physical address size: 39 bits
1944 07:41:18.723094 Checking segment from ROM address 0xffecf4f8
1945 07:41:18.727316 Checking segment from ROM address 0xffecf514
1946 07:41:18.732162 Loading segment from ROM address 0xffecf4f8
1947 07:41:18.734695 code (compression=0)
1948 07:41:18.742537 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1949 07:41:18.750868 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1950 07:41:18.753563 it's not compressed!
1951 07:41:18.835573 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1952 07:41:18.841769 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1953 07:41:18.849597 Loading segment from ROM address 0xffecf514
1954 07:41:18.852394 Entry Point 0x30100018
1955 07:41:18.854396 Loaded segments
1956 07:41:18.864458 Finalizing chipset.
1957 07:41:18.865237 Finalizing SMM.
1958 07:41:18.871871 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466597 exit 11515
1959 07:41:18.874832 mp_park_aps done after 0 msecs.
1960 07:41:18.879718 Jumping to boot code at 30100018(89c33000)
1961 07:41:18.888025 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1962 07:41:18.888142
1963 07:41:18.888271
1964 07:41:18.888374
1965 07:41:18.891497 Starting depthcharge on sarien...
1966 07:41:18.891595
1967 07:41:18.892249 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
1968 07:41:18.892360 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
1969 07:41:18.892450 Setting prompt string to ['sarien:']
1970 07:41:18.892533 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
1971 07:41:18.899683 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1972 07:41:18.899775
1973 07:41:18.906972 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1974 07:41:18.907091
1975 07:41:18.915536 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1976 07:41:18.915652
1977 07:41:18.917336 BIOS MMAP details:
1978 07:41:18.917453
1979 07:41:18.920345 IFD Base Offset : 0x1000000
1980 07:41:18.920460
1981 07:41:18.922301 IFD End Offset : 0x2000000
1982 07:41:18.922598
1983 07:41:18.925571 MMAP Size : 0x1000000
1984 07:41:18.925676
1985 07:41:18.928216 MMAP Start : 0xff000000
1986 07:41:18.929259
1987 07:41:18.935861 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1988 07:41:18.939641
1989 07:41:18.943968 New NVMe Controller 0x3214e128 @ 00:1d:04
1990 07:41:18.944086
1991 07:41:18.947906 New NVMe Controller 0x3214e1f0 @ 00:1d:00
1992 07:41:18.949238
1993 07:41:18.953921 The GBB signature is at 0x30000014 and is: 24 47 42 42
1994 07:41:18.957633
1995 07:41:18.960452 Wipe memory regions:
1996 07:41:18.960544
1997 07:41:18.963388 [0x00000000001000, 0x000000000a0000)
1998 07:41:18.963479
1999 07:41:18.966936 [0x00000000100000, 0x00000030000000)
2000 07:41:19.049693
2001 07:41:19.053391 [0x00000032751910, 0x00000089afd000)
2002 07:41:19.203551
2003 07:41:19.207475 [0x00000100000000, 0x0000026e800000)
2004 07:41:20.218219
2005 07:41:20.220202 R8152: Initializing
2006 07:41:20.220753
2007 07:41:20.222490 Version 6 (ocp_data = 5c30)
2008 07:41:20.224237
2009 07:41:20.226944 R8152: Done initializing
2010 07:41:20.227364
2011 07:41:20.228328 Adding net device
2012 07:41:20.228884
2013 07:41:20.234244 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2014 07:41:20.234678
2015 07:41:20.235021
2016 07:41:20.235625
2017 07:41:20.236403 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 07:41:20.337574 sarien: tftpboot 192.168.201.1 12435177/tftp-deploy-4tjtrt7i/kernel/bzImage 12435177/tftp-deploy-4tjtrt7i/kernel/cmdline 12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
2020 07:41:20.338157 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2021 07:41:20.338791 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2022 07:41:20.381037 tftpboot 192.168.201.1 12435177/tftp-deploy-4tjtrt7i/kernel/bzImage 12435177/tftp-deploy-4tjtrt7i/kernel/cmdline 12435177/tftp-deploy-4tjtrt7i/ramdisk/ramdisk.cpio.gz
2023 07:41:20.381481
2024 07:41:20.381822 Waiting for link
2025 07:41:20.542004
2026 07:41:20.542726 done.
2027 07:41:20.543036
2028 07:41:20.544848 MAC: 00:24:32:30:78:08
2029 07:41:20.545558
2030 07:41:20.547909 Sending DHCP discover... done.
2031 07:41:20.548287
2032 07:41:20.551193 Waiting for reply... done.
2033 07:41:20.551491
2034 07:41:20.553368 Sending DHCP request... done.
2035 07:41:20.553659
2036 07:41:20.559194 Waiting for reply... done.
2037 07:41:20.559647
2038 07:41:20.561989 My ip is 192.168.201.222
2039 07:41:20.562353
2040 07:41:20.565233 The DHCP server ip is 192.168.201.1
2041 07:41:20.565515
2042 07:41:20.570025 TFTP server IP predefined by user: 192.168.201.1
2043 07:41:20.571276
2044 07:41:20.577430 Bootfile predefined by user: 12435177/tftp-deploy-4tjtrt7i/kernel/bzImage
2045 07:41:20.578268
2046 07:41:20.580948 Sending tftp read request... done.
2047 07:41:20.581542
2048 07:41:20.587308 Waiting for the transfer...
2049 07:41:20.587910
2050 07:41:21.195268 00000000 ################################################################
2051 07:41:21.195624
2052 07:41:21.850642 00080000 ################################################################
2053 07:41:21.851486
2054 07:41:22.470871 00100000 ################################################################
2055 07:41:22.471362
2056 07:41:23.051367 00180000 ################################################################
2057 07:41:23.051934
2058 07:41:23.611260 00200000 ################################################################
2059 07:41:23.611615
2060 07:41:24.201614 00280000 ################################################################
2061 07:41:24.202216
2062 07:41:24.776677 00300000 ################################################################
2063 07:41:24.777208
2064 07:41:25.431083 00380000 ################################################################
2065 07:41:25.432348
2066 07:41:26.009644 00400000 ################################################################
2067 07:41:26.011171
2068 07:41:26.596871 00480000 ################################################################
2069 07:41:26.597811
2070 07:41:27.242527 00500000 ################################################################
2071 07:41:27.243264
2072 07:41:27.864278 00580000 ################################################################
2073 07:41:27.864930
2074 07:41:28.500110 00600000 ################################################################
2075 07:41:28.500571
2076 07:41:29.139084 00680000 ################################################################
2077 07:41:29.139668
2078 07:41:29.779573 00700000 ################################################################
2079 07:41:29.780166
2080 07:41:30.371554 00780000 ################################################################
2081 07:41:30.372159
2082 07:41:30.574718 00800000 ####################### done.
2083 07:41:30.575071
2084 07:41:30.581929 The bootfile was 8572816 bytes long.
2085 07:41:30.582362
2086 07:41:30.582704 Sending tftp read request... done.
2087 07:41:30.583065
2088 07:41:30.583986 Waiting for the transfer...
2089 07:41:30.584985
2090 07:41:31.130496 00000000 ################################################################
2091 07:41:31.131663
2092 07:41:31.655156 00080000 ################################################################
2093 07:41:31.655687
2094 07:41:32.171274 00100000 ################################################################
2095 07:41:32.171832
2096 07:41:32.707353 00180000 ################################################################
2097 07:41:32.707749
2098 07:41:33.246653 00200000 ################################################################
2099 07:41:33.247929
2100 07:41:33.766737 00280000 ################################################################
2101 07:41:33.766902
2102 07:41:34.324684 00300000 ################################################################
2103 07:41:34.325308
2104 07:41:34.908484 00380000 ################################################################
2105 07:41:34.909108
2106 07:41:35.527590 00400000 ################################################################
2107 07:41:35.528124
2108 07:41:36.155758 00480000 ################################################################
2109 07:41:36.156350
2110 07:41:36.738091 00500000 ################################################################
2111 07:41:36.738495
2112 07:41:37.261051 00580000 ################################################################
2113 07:41:37.261448
2114 07:41:37.782366 00600000 ################################################################
2115 07:41:37.782961
2116 07:41:38.320279 00680000 ################################################################
2117 07:41:38.320874
2118 07:41:38.862130 00700000 ################################################################
2119 07:41:38.863049
2120 07:41:39.391662 00780000 ################################################################
2121 07:41:39.392320
2122 07:41:39.835750 00800000 ###################################################### done.
2123 07:41:39.835905
2124 07:41:39.838387 Sending tftp read request... done.
2125 07:41:39.839048
2126 07:41:39.842239 Waiting for the transfer...
2127 07:41:39.842332
2128 07:41:39.842911 00000000 # done.
2129 07:41:39.843583
2130 07:41:39.852882 Command line loaded dynamically from TFTP file: 12435177/tftp-deploy-4tjtrt7i/kernel/cmdline
2131 07:41:39.852984
2132 07:41:39.872361 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2133 07:41:39.876256
2134 07:41:39.879650 Shutting down all USB controllers.
2135 07:41:39.879742
2136 07:41:39.882807 Removing current net device
2137 07:41:39.883813
2138 07:41:39.887215 EC: exit firmware mode
2139 07:41:39.887308
2140 07:41:39.889113 Finalizing coreboot
2141 07:41:39.890947
2142 07:41:39.896370 Exiting depthcharge with code 4 at timestamp: 28701488
2143 07:41:39.896463
2144 07:41:39.896802
2145 07:41:39.898370 Starting kernel ...
2146 07:41:39.898461
2147 07:41:39.898534
2148 07:41:39.898935 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2149 07:41:39.899042 start: 2.2.5 auto-login-action (timeout 00:04:10) [common]
2150 07:41:39.899129 Setting prompt string to ['Linux version [0-9]']
2151 07:41:39.899206 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 07:41:39.899282 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2154 07:45:49.899377 end: 2.2.5 auto-login-action (duration 00:04:10) [common]
2156 07:45:49.899732 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 250 seconds'
2158 07:45:49.899976 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2161 07:45:49.900272 end: 2 depthcharge-action (duration 00:05:00) [common]
2163 07:45:49.900531 Cleaning after the job
2164 07:45:49.900701 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/ramdisk
2165 07:45:49.902344 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/kernel
2166 07:45:49.903892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435177/tftp-deploy-4tjtrt7i/modules
2167 07:45:49.904348 start: 5.1 power-off (timeout 00:00:30) [common]
2168 07:45:49.904657 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-1' '--port=1' '--command=off'
2169 07:45:55.044032 >> Command sent successfully.
2170 07:45:55.048079 Returned 0 in 5 seconds
2171 07:45:55.148479 end: 5.1 power-off (duration 00:00:05) [common]
2173 07:45:55.148861 start: 5.2 read-feedback (timeout 00:09:55) [common]
2174 07:45:55.149165 Listened to connection for namespace 'common' for up to 1s
2175 07:45:56.150205 Finalising connection for namespace 'common'
2176 07:45:56.150769 Disconnecting from shell: Finalise
2177 07:45:56.151085
2178 07:45:56.251991 end: 5.2 read-feedback (duration 00:00:01) [common]
2179 07:45:56.252569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435177
2180 07:45:56.305250 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435177
2181 07:45:56.305491 JobError: Your job cannot terminate cleanly.