Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:42.904966 lava-dispatcher, installed at version: 2023.10
2 07:40:42.905180 start: 0 validate
3 07:40:42.905312 Start time: 2024-01-03 07:40:42.905304+00:00 (UTC)
4 07:40:42.905436 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:42.905611 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:43.173146 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:43.173341 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:43.438155 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:43.438325 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:40:43.704872 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:40:43.705051 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:40:43.971547 validate duration: 1.07
14 07:40:43.971820 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:40:43.971919 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:40:43.972008 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:40:43.972140 Not decompressing ramdisk as can be used compressed.
18 07:40:43.972228 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 07:40:43.972294 saving as /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/ramdisk/initrd.cpio.gz
20 07:40:43.972358 total size: 5432690 (5 MB)
21 07:40:43.973546 progress 0 % (0 MB)
22 07:40:43.975361 progress 5 % (0 MB)
23 07:40:43.976900 progress 10 % (0 MB)
24 07:40:43.978384 progress 15 % (0 MB)
25 07:40:43.980041 progress 20 % (1 MB)
26 07:40:43.981580 progress 25 % (1 MB)
27 07:40:43.982994 progress 30 % (1 MB)
28 07:40:43.984604 progress 35 % (1 MB)
29 07:40:43.986145 progress 40 % (2 MB)
30 07:40:43.987535 progress 45 % (2 MB)
31 07:40:43.989053 progress 50 % (2 MB)
32 07:40:43.990721 progress 55 % (2 MB)
33 07:40:43.992169 progress 60 % (3 MB)
34 07:40:43.993677 progress 65 % (3 MB)
35 07:40:43.995313 progress 70 % (3 MB)
36 07:40:43.996734 progress 75 % (3 MB)
37 07:40:43.998226 progress 80 % (4 MB)
38 07:40:43.999612 progress 85 % (4 MB)
39 07:40:44.001267 progress 90 % (4 MB)
40 07:40:44.002700 progress 95 % (4 MB)
41 07:40:44.004104 progress 100 % (5 MB)
42 07:40:44.004347 5 MB downloaded in 0.03 s (161.96 MB/s)
43 07:40:44.004514 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:40:44.004762 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:40:44.004850 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:40:44.004935 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:40:44.005108 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:40:44.005182 saving as /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/kernel/bzImage
50 07:40:44.005243 total size: 8572816 (8 MB)
51 07:40:44.005304 No compression specified
52 07:40:44.006485 progress 0 % (0 MB)
53 07:40:44.008888 progress 5 % (0 MB)
54 07:40:44.011292 progress 10 % (0 MB)
55 07:40:44.013665 progress 15 % (1 MB)
56 07:40:44.015956 progress 20 % (1 MB)
57 07:40:44.018313 progress 25 % (2 MB)
58 07:40:44.020598 progress 30 % (2 MB)
59 07:40:44.023086 progress 35 % (2 MB)
60 07:40:44.025613 progress 40 % (3 MB)
61 07:40:44.027995 progress 45 % (3 MB)
62 07:40:44.030515 progress 50 % (4 MB)
63 07:40:44.032962 progress 55 % (4 MB)
64 07:40:44.035320 progress 60 % (4 MB)
65 07:40:44.037855 progress 65 % (5 MB)
66 07:40:44.040292 progress 70 % (5 MB)
67 07:40:44.042757 progress 75 % (6 MB)
68 07:40:44.045166 progress 80 % (6 MB)
69 07:40:44.047800 progress 85 % (6 MB)
70 07:40:44.050184 progress 90 % (7 MB)
71 07:40:44.052469 progress 95 % (7 MB)
72 07:40:44.054811 progress 100 % (8 MB)
73 07:40:44.055006 8 MB downloaded in 0.05 s (164.31 MB/s)
74 07:40:44.055155 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:40:44.055427 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:40:44.055513 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:40:44.055602 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:40:44.055775 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 07:40:44.055858 saving as /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/nfsrootfs/full.rootfs.tar
81 07:40:44.055935 total size: 133380384 (127 MB)
82 07:40:44.055996 Using unxz to decompress xz
83 07:40:44.060425 progress 0 % (0 MB)
84 07:40:44.414295 progress 5 % (6 MB)
85 07:40:44.776289 progress 10 % (12 MB)
86 07:40:45.072331 progress 15 % (19 MB)
87 07:40:45.267937 progress 20 % (25 MB)
88 07:40:45.519963 progress 25 % (31 MB)
89 07:40:45.888898 progress 30 % (38 MB)
90 07:40:46.256279 progress 35 % (44 MB)
91 07:40:46.716416 progress 40 % (50 MB)
92 07:40:47.150387 progress 45 % (57 MB)
93 07:40:47.550691 progress 50 % (63 MB)
94 07:40:47.967595 progress 55 % (69 MB)
95 07:40:48.346013 progress 60 % (76 MB)
96 07:40:48.721352 progress 65 % (82 MB)
97 07:40:49.101152 progress 70 % (89 MB)
98 07:40:49.480672 progress 75 % (95 MB)
99 07:40:49.929244 progress 80 % (101 MB)
100 07:40:50.384743 progress 85 % (108 MB)
101 07:40:50.659080 progress 90 % (114 MB)
102 07:40:51.021869 progress 95 % (120 MB)
103 07:40:51.425414 progress 100 % (127 MB)
104 07:40:51.430887 127 MB downloaded in 7.37 s (17.25 MB/s)
105 07:40:51.431250 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:40:51.431724 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:40:51.431878 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:40:51.432016 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:40:51.432213 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:40:51.432327 saving as /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/modules/modules.tar
112 07:40:51.432424 total size: 251144 (0 MB)
113 07:40:51.432532 Using unxz to decompress xz
114 07:40:51.438237 progress 13 % (0 MB)
115 07:40:51.438818 progress 26 % (0 MB)
116 07:40:51.439187 progress 39 % (0 MB)
117 07:40:51.440655 progress 52 % (0 MB)
118 07:40:51.442581 progress 65 % (0 MB)
119 07:40:51.444435 progress 78 % (0 MB)
120 07:40:51.446231 progress 91 % (0 MB)
121 07:40:51.448179 progress 100 % (0 MB)
122 07:40:51.453737 0 MB downloaded in 0.02 s (11.25 MB/s)
123 07:40:51.454167 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:40:51.454608 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:40:51.454764 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 07:40:51.454917 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 07:40:53.641323 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435163/extract-nfsrootfs-ny9srtni
129 07:40:53.641591 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 07:40:53.641715 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 07:40:53.641886 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98
132 07:40:53.642023 makedir: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin
133 07:40:53.642127 makedir: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/tests
134 07:40:53.642225 makedir: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/results
135 07:40:53.642326 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-add-keys
136 07:40:53.642467 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-add-sources
137 07:40:53.642595 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-background-process-start
138 07:40:53.642722 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-background-process-stop
139 07:40:53.642847 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-common-functions
140 07:40:53.642970 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-echo-ipv4
141 07:40:53.643094 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-install-packages
142 07:40:53.643217 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-installed-packages
143 07:40:53.643340 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-os-build
144 07:40:53.643464 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-probe-channel
145 07:40:53.643587 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-probe-ip
146 07:40:53.643711 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-target-ip
147 07:40:53.643835 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-target-mac
148 07:40:53.643957 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-target-storage
149 07:40:53.644081 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-case
150 07:40:53.644211 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-event
151 07:40:53.644339 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-feedback
152 07:40:53.644464 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-raise
153 07:40:53.644586 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-reference
154 07:40:53.644710 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-runner
155 07:40:53.644833 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-set
156 07:40:53.644984 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-test-shell
157 07:40:53.645117 Updating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-install-packages (oe)
158 07:40:53.645272 Updating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/bin/lava-installed-packages (oe)
159 07:40:53.645393 Creating /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/environment
160 07:40:53.645495 LAVA metadata
161 07:40:53.645566 - LAVA_JOB_ID=12435163
162 07:40:53.645628 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:40:53.645728 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 07:40:53.645794 skipped lava-vland-overlay
165 07:40:53.645866 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:40:53.645942 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 07:40:53.646000 skipped lava-multinode-overlay
168 07:40:53.646070 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:40:53.646145 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 07:40:53.646216 Loading test definitions
171 07:40:53.646303 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 07:40:53.646371 Using /lava-12435163 at stage 0
173 07:40:53.646688 uuid=12435163_1.5.2.3.1 testdef=None
174 07:40:53.646774 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 07:40:53.646855 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 07:40:53.647355 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 07:40:53.647579 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 07:40:53.648244 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 07:40:53.648511 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 07:40:53.649361 runner path: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/0/tests/0_dmesg test_uuid 12435163_1.5.2.3.1
183 07:40:53.649692 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 07:40:53.649913 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 07:40:53.649985 Using /lava-12435163 at stage 1
187 07:40:53.650286 uuid=12435163_1.5.2.3.5 testdef=None
188 07:40:53.650372 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 07:40:53.650454 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 07:40:53.650958 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 07:40:53.651207 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 07:40:53.651862 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 07:40:53.652108 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 07:40:53.653040 runner path: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/1/tests/1_bootrr test_uuid 12435163_1.5.2.3.5
197 07:40:53.653265 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 07:40:53.653583 Creating lava-test-runner.conf files
200 07:40:53.653646 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/0 for stage 0
201 07:40:53.653734 - 0_dmesg
202 07:40:53.653812 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435163/lava-overlay-bpauyw98/lava-12435163/1 for stage 1
203 07:40:53.653902 - 1_bootrr
204 07:40:53.653995 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 07:40:53.654078 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 07:40:53.661682 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 07:40:53.661801 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 07:40:53.661892 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 07:40:53.661976 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 07:40:53.662083 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 07:40:53.802409 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 07:40:53.802796 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 07:40:53.802909 extracting modules file /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435163/extract-nfsrootfs-ny9srtni
214 07:40:53.816939 extracting modules file /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435163/extract-overlay-ramdisk-15g0vx3t/ramdisk
215 07:40:53.830849 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 07:40:53.830981 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 07:40:53.831073 [common] Applying overlay to NFS
218 07:40:53.831142 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435163/compress-overlay-x_xfcjy9/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435163/extract-nfsrootfs-ny9srtni
219 07:40:53.839849 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 07:40:53.839963 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 07:40:53.840053 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 07:40:53.840139 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 07:40:53.840211 Building ramdisk /var/lib/lava/dispatcher/tmp/12435163/extract-overlay-ramdisk-15g0vx3t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435163/extract-overlay-ramdisk-15g0vx3t/ramdisk
224 07:40:53.912144 >> 26162 blocks
225 07:40:54.464974 rename /var/lib/lava/dispatcher/tmp/12435163/extract-overlay-ramdisk-15g0vx3t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
226 07:40:54.465439 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 07:40:54.465586 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 07:40:54.465688 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 07:40:54.465780 No mkimage arch provided, not using FIT.
230 07:40:54.465868 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 07:40:54.465952 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 07:40:54.466064 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 07:40:54.466154 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 07:40:54.466229 No LXC device requested
235 07:40:54.466308 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 07:40:54.466393 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 07:40:54.466472 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 07:40:54.466542 Checking files for TFTP limit of 4294967296 bytes.
239 07:40:54.466960 end: 1 tftp-deploy (duration 00:00:10) [common]
240 07:40:54.467067 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 07:40:54.467153 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 07:40:54.467271 substitutions:
243 07:40:54.467335 - {DTB}: None
244 07:40:54.467395 - {INITRD}: 12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
245 07:40:54.467455 - {KERNEL}: 12435163/tftp-deploy-946v50j8/kernel/bzImage
246 07:40:54.467512 - {LAVA_MAC}: None
247 07:40:54.467568 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435163/extract-nfsrootfs-ny9srtni
248 07:40:54.467623 - {NFS_SERVER_IP}: 192.168.201.1
249 07:40:54.467677 - {PRESEED_CONFIG}: None
250 07:40:54.467731 - {PRESEED_LOCAL}: None
251 07:40:54.467786 - {RAMDISK}: 12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
252 07:40:54.467840 - {ROOT_PART}: None
253 07:40:54.467894 - {ROOT}: None
254 07:40:54.467947 - {SERVER_IP}: 192.168.201.1
255 07:40:54.467999 - {TEE}: None
256 07:40:54.468051 Parsed boot commands:
257 07:40:54.468105 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 07:40:54.468289 Parsed boot commands: tftpboot 192.168.201.1 12435163/tftp-deploy-946v50j8/kernel/bzImage 12435163/tftp-deploy-946v50j8/kernel/cmdline 12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
259 07:40:54.468376 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 07:40:54.468460 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 07:40:54.468552 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 07:40:54.468633 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 07:40:54.468703 Not connected, no need to disconnect.
264 07:40:54.468775 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 07:40:54.468857 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 07:40:54.468921 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-8'
267 07:40:54.472858 Setting prompt string to ['lava-test: # ']
268 07:40:54.473226 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 07:40:54.473327 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 07:40:54.473422 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 07:40:54.473581 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 07:40:54.473774 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
273 07:40:59.615425 >> Command sent successfully.
274 07:40:59.617981 Returned 0 in 5 seconds
275 07:40:59.718368 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 07:40:59.718830 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 07:40:59.718988 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 07:40:59.719119 Setting prompt string to 'Starting depthcharge on Magolor...'
280 07:40:59.719234 Changing prompt to 'Starting depthcharge on Magolor...'
281 07:40:59.719340 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 07:40:59.719746 [Enter `^Ec?' for help]
283 07:41:00.861008
284 07:41:00.861165
285 07:41:00.871111 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 07:41:00.873988 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 07:41:00.880951 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 07:41:00.884316 CPU: AES supported, TXT NOT supported, VT supported
289 07:41:00.890917 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 07:41:00.893851 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 07:41:00.897228 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 07:41:00.901836 VBOOT: Loading verstage.
293 07:41:00.908735 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 07:41:00.912182 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 07:41:00.918596 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 07:41:00.921872 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 07:41:00.925107
298 07:41:00.925208
299 07:41:00.935122 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 07:41:00.949418 Probing TPM: . done!
301 07:41:00.952931 TPM ready after 0 ms
302 07:41:00.957164 Connected to device vid:did:rid of 1ae0:0028:00
303 07:41:00.967659 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
304 07:41:00.973887 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 07:41:00.977286 Initialized TPM device CR50 revision 0
306 07:41:01.034639 tlcl_send_startup: Startup return code is 0
307 07:41:01.034746 TPM: setup succeeded
308 07:41:01.048921 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 07:41:01.063514 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 07:41:01.071621 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 07:41:01.086420 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 07:41:01.090078 Chrome EC: UHEPI supported
313 07:41:01.093091 Phase 1
314 07:41:01.096522 FMAP: area GBB found @ c05000 (12288 bytes)
315 07:41:01.103810 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 07:41:01.110113 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 07:41:01.113654 Recovery requested (1009000e)
318 07:41:01.122337 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 07:41:01.128930 tlcl_extend: response is 0
320 07:41:01.135751 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 07:41:01.144606 tlcl_extend: response is 0
322 07:41:01.151524 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 07:41:01.154812 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 07:41:01.161496 BS: verstage times (exec / console): total (unknown) / 124 ms
325 07:41:01.165213
326 07:41:01.165289
327 07:41:01.175484 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 07:41:01.178340 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 07:41:01.185654 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 07:41:01.189235 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 07:41:01.192153 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 07:41:01.199129 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 07:41:01.202024 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
334 07:41:01.205644 TCO_STS: 0000 0001
335 07:41:01.208925 GEN_PMCON: d0015038 00002200
336 07:41:01.212116 GBLRST_CAUSE: 00000000 00000000
337 07:41:01.212201 prev_sleep_state 5
338 07:41:01.215389 Boot Count incremented to 5146
339 07:41:01.222168 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 07:41:01.225081 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 07:41:01.229250 Chrome EC: UHEPI supported
342 07:41:01.235631 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 07:41:01.242384 Probing TPM: done!
344 07:41:01.248765 Connected to device vid:did:rid of 1ae0:0028:00
345 07:41:01.258758 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
346 07:41:01.262226 Initialized TPM device CR50 revision 0
347 07:41:01.277610 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 07:41:01.281123 MRC: Hash idx 0x100b comparison successful.
349 07:41:01.284286 MRC cache found, size 5458
350 07:41:01.287726 bootmode is set to: 2
351 07:41:01.291630 SPD INDEX = 0
352 07:41:01.294865 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 07:41:01.294950 SPD: module type is LPDDR4X
354 07:41:01.302019 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 07:41:01.308476 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 07:41:01.312020 SPD: device width 16 bits, bus width 32 bits
357 07:41:01.315434 SPD: module size is 4096 MB (per channel)
358 07:41:01.321862 meminit_channels: DRAM half-populated
359 07:41:01.402358 CBMEM:
360 07:41:01.405768 IMD: root @ 0x76fff000 254 entries.
361 07:41:01.409097 IMD: root @ 0x76ffec00 62 entries.
362 07:41:01.412786 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 07:41:01.419102 WARNING: RO_VPD is uninitialized or empty.
364 07:41:01.422673 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 07:41:01.426164 External stage cache:
366 07:41:01.429630 IMD: root @ 0x7b3ff000 254 entries.
367 07:41:01.432478 IMD: root @ 0x7b3fec00 62 entries.
368 07:41:01.442706 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 07:41:01.449450 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 07:41:01.455746 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 07:41:01.463965 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 07:41:01.470411 cse_lite: Skip switching to RW in the recovery path
373 07:41:01.470491 1 DIMMs found
374 07:41:01.470600 SMM Memory Map
375 07:41:01.474070 SMRAM : 0x7b000000 0x800000
376 07:41:01.480371 Subregion 0: 0x7b000000 0x200000
377 07:41:01.483793 Subregion 1: 0x7b200000 0x200000
378 07:41:01.487180 Subregion 2: 0x7b400000 0x400000
379 07:41:01.487263 top_of_ram = 0x77000000
380 07:41:01.493712 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 07:41:01.500785 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 07:41:01.504099 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 07:41:01.510219 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 07:41:01.516938 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 07:41:01.526707 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 07:41:01.529933 Processing 188 relocs. Offset value of 0x74c0e000
387 07:41:01.539602 BS: romstage times (exec / console): total (unknown) / 255 ms
388 07:41:01.544199
389 07:41:01.544283
390 07:41:01.553978 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 07:41:01.560179 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 07:41:01.563478 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 07:41:01.570496 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 07:41:01.627153 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 07:41:01.633316 Processing 4805 relocs. Offset value of 0x75da8000
396 07:41:01.639950 BS: postcar times (exec / console): total (unknown) / 42 ms
397 07:41:01.640100
398 07:41:01.640199
399 07:41:01.649979 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 07:41:01.650068 Normal boot
401 07:41:01.654020 EC returned error result code 3
402 07:41:01.657328 FW_CONFIG value is 0x204
403 07:41:01.660164 GENERIC: 0.0 disabled by fw_config
404 07:41:01.667171 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 07:41:01.670420 I2C: 00:10 disabled by fw_config
406 07:41:01.673731 I2C: 00:10 disabled by fw_config
407 07:41:01.676713 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 07:41:01.683633 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 07:41:01.686488 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 07:41:01.693447 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 07:41:01.696933 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 07:41:01.699814 I2C: 00:10 disabled by fw_config
413 07:41:01.706556 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 07:41:01.712972 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 07:41:01.716481 I2C: 00:1a disabled by fw_config
416 07:41:01.719757 I2C: 00:1a disabled by fw_config
417 07:41:01.726200 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 07:41:01.729712 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 07:41:01.733294 GENERIC: 0.0 disabled by fw_config
420 07:41:01.739821 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 07:41:01.742849 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 07:41:01.749630 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 07:41:01.752791 microcode: Update skipped, already up-to-date
424 07:41:01.759502 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 07:41:01.785193 Detected 2 core, 2 thread CPU.
426 07:41:01.788787 Setting up SMI for CPU
427 07:41:01.792153 IED base = 0x7b400000
428 07:41:01.792257 IED size = 0x00400000
429 07:41:01.795590 Will perform SMM setup.
430 07:41:01.798496 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 07:41:01.808413 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 07:41:01.812023 Processing 16 relocs. Offset value of 0x00030000
433 07:41:01.815566 Attempting to start 1 APs
434 07:41:01.819114 Waiting for 10ms after sending INIT.
435 07:41:01.835076 Waiting for 1st SIPI to complete...done.
436 07:41:01.835208 AP: slot 1 apic_id 2.
437 07:41:01.841700 Waiting for 2nd SIPI to complete...done.
438 07:41:01.848721 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 07:41:01.855265 Processing 13 relocs. Offset value of 0x00038000
440 07:41:01.855375 Unable to locate Global NVS
441 07:41:01.865087 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 07:41:01.868325 Installing permanent SMM handler to 0x7b000000
443 07:41:01.878037 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 07:41:01.881788 Processing 704 relocs. Offset value of 0x7b010000
445 07:41:01.891247 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 07:41:01.894823 Processing 13 relocs. Offset value of 0x7b008000
447 07:41:01.901204 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 07:41:01.904369 Unable to locate Global NVS
449 07:41:01.911295 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 07:41:01.914350 Clearing SMI status registers
451 07:41:01.914456 SMI_STS: PM1
452 07:41:01.917877 PM1_STS: PWRBTN
453 07:41:01.917953 TCO_STS: INTRD_DET
454 07:41:01.927922 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
455 07:41:01.931371 In relocation handler: CPU 0
456 07:41:01.934499 New SMBASE=0x7b000000 IEDBASE=0x7b400000
457 07:41:01.937876 Writing SMRR. base = 0x7b000006, mask=0xff800800
458 07:41:01.941011 Relocation complete.
459 07:41:01.947855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
460 07:41:01.951542 In relocation handler: CPU 1
461 07:41:01.955131 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
462 07:41:01.958636 Writing SMRR. base = 0x7b000006, mask=0xff800800
463 07:41:01.961934 Relocation complete.
464 07:41:01.965375 Initializing CPU #0
465 07:41:01.968448 CPU: vendor Intel device 906c0
466 07:41:01.972045 CPU: family 06, model 9c, stepping 00
467 07:41:01.974892 Clearing out pending MCEs
468 07:41:01.975013 Setting up local APIC...
469 07:41:01.978215 apic_id: 0x00 done.
470 07:41:01.981973 Turbo is available but hidden
471 07:41:01.984799 Turbo is available and visible
472 07:41:01.988295 microcode: Update skipped, already up-to-date
473 07:41:01.991703 CPU #0 initialized
474 07:41:01.995040 Initializing CPU #1
475 07:41:01.998295 CPU: vendor Intel device 906c0
476 07:41:02.001333 CPU: family 06, model 9c, stepping 00
477 07:41:02.001417 Clearing out pending MCEs
478 07:41:02.004846 Setting up local APIC...
479 07:41:02.008041 apic_id: 0x02 done.
480 07:41:02.011612 microcode: Update skipped, already up-to-date
481 07:41:02.014965 CPU #1 initialized
482 07:41:02.018087 bsp_do_flight_plan done after 173 msecs.
483 07:41:02.021644 CPU: frequency set to 2800 MHz
484 07:41:02.024631 Enabling SMIs.
485 07:41:02.028069 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
486 07:41:02.039767 Probing TPM: done!
487 07:41:02.045835 Connected to device vid:did:rid of 1ae0:0028:00
488 07:41:02.055824 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
489 07:41:02.059387 Initialized TPM device CR50 revision 0
490 07:41:02.062924 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
491 07:41:02.069820 Found a VBT of 7680 bytes after decompression
492 07:41:02.076252 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
493 07:41:02.111244 Detected 2 core, 2 thread CPU.
494 07:41:02.114384 Detected 2 core, 2 thread CPU.
495 07:41:02.477429 Display FSP Version Info HOB
496 07:41:02.481043 Reference Code - CPU = 8.7.22.30
497 07:41:02.484648 uCode Version = 24.0.0.1f
498 07:41:02.487818 TXT ACM version = ff.ff.ff.ffff
499 07:41:02.490740 Reference Code - ME = 8.7.22.30
500 07:41:02.494204 MEBx version = 0.0.0.0
501 07:41:02.497163 ME Firmware Version = Consumer SKU
502 07:41:02.500655 Reference Code - PCH = 8.7.22.30
503 07:41:02.504308 PCH-CRID Status = Disabled
504 07:41:02.507099 PCH-CRID Original Value = ff.ff.ff.ffff
505 07:41:02.510688 PCH-CRID New Value = ff.ff.ff.ffff
506 07:41:02.513657 OPROM - RST - RAID = ff.ff.ff.ffff
507 07:41:02.517080 PCH Hsio Version = 4.0.0.0
508 07:41:02.520285 Reference Code - SA - System Agent = 8.7.22.30
509 07:41:02.524028 Reference Code - MRC = 0.0.4.68
510 07:41:02.526906 SA - PCIe Version = 8.7.22.30
511 07:41:02.530999 SA-CRID Status = Disabled
512 07:41:02.534589 SA-CRID Original Value = 0.0.0.0
513 07:41:02.538105 SA-CRID New Value = 0.0.0.0
514 07:41:02.538208 OPROM - VBIOS = ff.ff.ff.ffff
515 07:41:02.544989 IO Manageability Engine FW Version = ff.ff.ff.ffff
516 07:41:02.548443 PHY Build Version = ff.ff.ff.ffff
517 07:41:02.551963 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
518 07:41:02.558929 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
519 07:41:02.562351 ITSS IRQ Polarities Before:
520 07:41:02.562464 IPC0: 0xffffffff
521 07:41:02.565159 IPC1: 0xffffffff
522 07:41:02.565265 IPC2: 0xffffffff
523 07:41:02.568594 IPC3: 0xffffffff
524 07:41:02.571887 ITSS IRQ Polarities After:
525 07:41:02.572004 IPC0: 0xffffffff
526 07:41:02.575241 IPC1: 0xffffffff
527 07:41:02.575348 IPC2: 0xffffffff
528 07:41:02.578772 IPC3: 0xffffffff
529 07:41:02.588457 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
530 07:41:02.594899 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
531 07:41:02.598412 Enumerating buses...
532 07:41:02.601924 Show all devs... Before device enumeration.
533 07:41:02.604952 Root Device: enabled 1
534 07:41:02.608261 CPU_CLUSTER: 0: enabled 1
535 07:41:02.611789 DOMAIN: 0000: enabled 1
536 07:41:02.611907 PCI: 00:00.0: enabled 1
537 07:41:02.614849 PCI: 00:02.0: enabled 1
538 07:41:02.618312 PCI: 00:04.0: enabled 1
539 07:41:02.621171 PCI: 00:05.0: enabled 1
540 07:41:02.621283 PCI: 00:09.0: enabled 0
541 07:41:02.624569 PCI: 00:12.6: enabled 0
542 07:41:02.628000 PCI: 00:14.0: enabled 1
543 07:41:02.628110 PCI: 00:14.1: enabled 0
544 07:41:02.631138 PCI: 00:14.2: enabled 0
545 07:41:02.634660 PCI: 00:14.3: enabled 1
546 07:41:02.637575 PCI: 00:14.5: enabled 1
547 07:41:02.637656 PCI: 00:15.0: enabled 1
548 07:41:02.641072 PCI: 00:15.1: enabled 1
549 07:41:02.644581 PCI: 00:15.2: enabled 1
550 07:41:02.647442 PCI: 00:15.3: enabled 1
551 07:41:02.647527 PCI: 00:16.0: enabled 1
552 07:41:02.650803 PCI: 00:16.1: enabled 0
553 07:41:02.654424 PCI: 00:16.4: enabled 0
554 07:41:02.657642 PCI: 00:16.5: enabled 0
555 07:41:02.657727 PCI: 00:17.0: enabled 0
556 07:41:02.660966 PCI: 00:19.0: enabled 1
557 07:41:02.664177 PCI: 00:19.1: enabled 0
558 07:41:02.666974 PCI: 00:19.2: enabled 1
559 07:41:02.667086 PCI: 00:1a.0: enabled 1
560 07:41:02.670849 PCI: 00:1c.0: enabled 0
561 07:41:02.673603 PCI: 00:1c.1: enabled 0
562 07:41:02.677115 PCI: 00:1c.2: enabled 0
563 07:41:02.677220 PCI: 00:1c.3: enabled 0
564 07:41:02.680198 PCI: 00:1c.4: enabled 0
565 07:41:02.683878 PCI: 00:1c.5: enabled 0
566 07:41:02.683964 PCI: 00:1c.6: enabled 0
567 07:41:02.686767 PCI: 00:1c.7: enabled 1
568 07:41:02.690366 PCI: 00:1e.0: enabled 0
569 07:41:02.693760 PCI: 00:1e.1: enabled 0
570 07:41:02.693873 PCI: 00:1e.2: enabled 1
571 07:41:02.697145 PCI: 00:1e.3: enabled 0
572 07:41:02.699900 PCI: 00:1f.0: enabled 1
573 07:41:02.703262 PCI: 00:1f.1: enabled 1
574 07:41:02.703348 PCI: 00:1f.2: enabled 1
575 07:41:02.706626 PCI: 00:1f.3: enabled 1
576 07:41:02.710043 PCI: 00:1f.4: enabled 0
577 07:41:02.713627 PCI: 00:1f.5: enabled 1
578 07:41:02.713712 PCI: 00:1f.7: enabled 0
579 07:41:02.716698 GENERIC: 0.0: enabled 1
580 07:41:02.720198 GENERIC: 0.0: enabled 1
581 07:41:02.723107 USB0 port 0: enabled 1
582 07:41:02.723194 GENERIC: 0.0: enabled 1
583 07:41:02.726564 I2C: 00:2c: enabled 1
584 07:41:02.730102 I2C: 00:15: enabled 1
585 07:41:02.730191 GENERIC: 0.0: enabled 0
586 07:41:02.732967 I2C: 00:15: enabled 1
587 07:41:02.736267 I2C: 00:10: enabled 0
588 07:41:02.736352 I2C: 00:10: enabled 0
589 07:41:02.739980 I2C: 00:2c: enabled 1
590 07:41:02.742979 I2C: 00:40: enabled 1
591 07:41:02.743065 I2C: 00:10: enabled 1
592 07:41:02.746389 I2C: 00:39: enabled 1
593 07:41:02.749888 I2C: 00:36: enabled 1
594 07:41:02.749974 I2C: 00:10: enabled 0
595 07:41:02.753293 I2C: 00:0c: enabled 1
596 07:41:02.756481 I2C: 00:50: enabled 1
597 07:41:02.756567 I2C: 00:1a: enabled 1
598 07:41:02.759848 I2C: 00:1a: enabled 0
599 07:41:02.762872 I2C: 00:1a: enabled 0
600 07:41:02.762980 I2C: 00:28: enabled 1
601 07:41:02.766349 I2C: 00:29: enabled 1
602 07:41:02.769516 PCI: 00:00.0: enabled 1
603 07:41:02.769606 SPI: 00: enabled 1
604 07:41:02.772804 PNP: 0c09.0: enabled 1
605 07:41:02.776294 GENERIC: 0.0: enabled 0
606 07:41:02.779606 USB2 port 0: enabled 1
607 07:41:02.779724 USB2 port 1: enabled 1
608 07:41:02.782506 USB2 port 2: enabled 1
609 07:41:02.785996 USB2 port 3: enabled 1
610 07:41:02.786109 USB2 port 4: enabled 0
611 07:41:02.789462 USB2 port 5: enabled 1
612 07:41:02.792750 USB2 port 6: enabled 0
613 07:41:02.795708 USB2 port 7: enabled 1
614 07:41:02.795794 USB3 port 0: enabled 1
615 07:41:02.799570 USB3 port 1: enabled 1
616 07:41:02.802311 USB3 port 2: enabled 1
617 07:41:02.802401 USB3 port 3: enabled 1
618 07:41:02.805773 APIC: 00: enabled 1
619 07:41:02.809156 APIC: 02: enabled 1
620 07:41:02.809241 Compare with tree...
621 07:41:02.812292 Root Device: enabled 1
622 07:41:02.815815 CPU_CLUSTER: 0: enabled 1
623 07:41:02.815901 APIC: 00: enabled 1
624 07:41:02.818875 APIC: 02: enabled 1
625 07:41:02.822352 DOMAIN: 0000: enabled 1
626 07:41:02.825876 PCI: 00:00.0: enabled 1
627 07:41:02.828795 PCI: 00:02.0: enabled 1
628 07:41:02.828880 PCI: 00:04.0: enabled 1
629 07:41:02.832198 GENERIC: 0.0: enabled 1
630 07:41:02.835755 PCI: 00:05.0: enabled 1
631 07:41:02.838624 GENERIC: 0.0: enabled 1
632 07:41:02.842052 PCI: 00:09.0: enabled 0
633 07:41:02.842138 PCI: 00:12.6: enabled 0
634 07:41:02.845420 PCI: 00:14.0: enabled 1
635 07:41:02.848598 USB0 port 0: enabled 1
636 07:41:02.852146 USB2 port 0: enabled 1
637 07:41:02.855119 USB2 port 1: enabled 1
638 07:41:02.855205 USB2 port 2: enabled 1
639 07:41:02.858598 USB2 port 3: enabled 1
640 07:41:02.861990 USB2 port 4: enabled 0
641 07:41:02.865213 USB2 port 5: enabled 1
642 07:41:02.868760 USB2 port 6: enabled 0
643 07:41:02.872134 USB2 port 7: enabled 1
644 07:41:02.872217 USB3 port 0: enabled 1
645 07:41:02.875307 USB3 port 1: enabled 1
646 07:41:02.878679 USB3 port 2: enabled 1
647 07:41:02.882058 USB3 port 3: enabled 1
648 07:41:02.885338 PCI: 00:14.1: enabled 0
649 07:41:02.885456 PCI: 00:14.2: enabled 0
650 07:41:02.888262 PCI: 00:14.3: enabled 1
651 07:41:02.891943 GENERIC: 0.0: enabled 1
652 07:41:02.894790 PCI: 00:14.5: enabled 1
653 07:41:02.898280 PCI: 00:15.0: enabled 1
654 07:41:02.898366 I2C: 00:2c: enabled 1
655 07:41:02.901621 I2C: 00:15: enabled 1
656 07:41:02.904672 PCI: 00:15.1: enabled 1
657 07:41:02.908071 PCI: 00:15.2: enabled 1
658 07:41:02.911541 GENERIC: 0.0: enabled 0
659 07:41:02.911628 I2C: 00:15: enabled 1
660 07:41:02.914929 I2C: 00:10: enabled 0
661 07:41:02.918268 I2C: 00:10: enabled 0
662 07:41:02.921553 I2C: 00:2c: enabled 1
663 07:41:02.921640 I2C: 00:40: enabled 1
664 07:41:02.924570 I2C: 00:10: enabled 1
665 07:41:02.928148 I2C: 00:39: enabled 1
666 07:41:02.931175 PCI: 00:15.3: enabled 1
667 07:41:02.931289 I2C: 00:36: enabled 1
668 07:41:02.934790 I2C: 00:10: enabled 0
669 07:41:02.937773 I2C: 00:0c: enabled 1
670 07:41:02.941073 I2C: 00:50: enabled 1
671 07:41:02.944619 PCI: 00:16.0: enabled 1
672 07:41:02.944733 PCI: 00:16.1: enabled 0
673 07:41:02.947540 PCI: 00:16.4: enabled 0
674 07:41:02.951033 PCI: 00:16.5: enabled 0
675 07:41:02.954290 PCI: 00:17.0: enabled 0
676 07:41:02.957710 PCI: 00:19.0: enabled 1
677 07:41:02.957819 I2C: 00:1a: enabled 1
678 07:41:02.961171 I2C: 00:1a: enabled 0
679 07:41:02.964049 I2C: 00:1a: enabled 0
680 07:41:02.967582 I2C: 00:28: enabled 1
681 07:41:02.967668 I2C: 00:29: enabled 1
682 07:41:02.970843 PCI: 00:19.1: enabled 0
683 07:41:02.974251 PCI: 00:19.2: enabled 1
684 07:41:02.977574 PCI: 00:1a.0: enabled 1
685 07:41:02.980894 PCI: 00:1e.0: enabled 0
686 07:41:02.980979 PCI: 00:1e.1: enabled 0
687 07:41:02.984026 PCI: 00:1e.2: enabled 1
688 07:41:02.987476 SPI: 00: enabled 1
689 07:41:02.990877 PCI: 00:1e.3: enabled 0
690 07:41:02.990965 PCI: 00:1f.0: enabled 1
691 07:41:02.993760 PNP: 0c09.0: enabled 1
692 07:41:02.997222 PCI: 00:1f.1: enabled 1
693 07:41:03.000651 PCI: 00:1f.2: enabled 1
694 07:41:03.003974 PCI: 00:1f.3: enabled 1
695 07:41:03.004088 GENERIC: 0.0: enabled 0
696 07:41:03.007334 PCI: 00:1f.4: enabled 0
697 07:41:03.010253 PCI: 00:1f.5: enabled 1
698 07:41:03.013742 PCI: 00:1f.7: enabled 0
699 07:41:03.013850 Root Device scanning...
700 07:41:03.017082 scan_static_bus for Root Device
701 07:41:03.020555 CPU_CLUSTER: 0 enabled
702 07:41:03.023794 DOMAIN: 0000 enabled
703 07:41:03.027202 DOMAIN: 0000 scanning...
704 07:41:03.030160 PCI: pci_scan_bus for bus 00
705 07:41:03.030246 PCI: 00:00.0 [8086/0000] ops
706 07:41:03.033775 PCI: 00:00.0 [8086/4e22] enabled
707 07:41:03.037354 PCI: 00:02.0 [8086/0000] bus ops
708 07:41:03.040358 PCI: 00:02.0 [8086/4e55] enabled
709 07:41:03.043847 PCI: 00:04.0 [8086/0000] bus ops
710 07:41:03.046902 PCI: 00:04.0 [8086/4e03] enabled
711 07:41:03.050414 PCI: 00:05.0 [8086/0000] bus ops
712 07:41:03.053396 PCI: 00:05.0 [8086/4e19] enabled
713 07:41:03.056959 PCI: 00:08.0 [8086/4e11] enabled
714 07:41:03.060288 PCI: 00:14.0 [8086/0000] bus ops
715 07:41:03.063433 PCI: 00:14.0 [8086/4ded] enabled
716 07:41:03.066691 PCI: 00:14.2 [8086/4def] disabled
717 07:41:03.070200 PCI: 00:14.3 [8086/0000] bus ops
718 07:41:03.073615 PCI: 00:14.3 [8086/4df0] enabled
719 07:41:03.076905 PCI: 00:14.5 [8086/0000] ops
720 07:41:03.079789 PCI: 00:14.5 [8086/4df8] enabled
721 07:41:03.083349 PCI: 00:15.0 [8086/0000] bus ops
722 07:41:03.086775 PCI: 00:15.0 [8086/4de8] enabled
723 07:41:03.090045 PCI: 00:15.1 [8086/0000] bus ops
724 07:41:03.093077 PCI: 00:15.1 [8086/4de9] enabled
725 07:41:03.096546 PCI: 00:15.2 [8086/0000] bus ops
726 07:41:03.099998 PCI: 00:15.2 [8086/4dea] enabled
727 07:41:03.103156 PCI: 00:15.3 [8086/0000] bus ops
728 07:41:03.106518 PCI: 00:15.3 [8086/4deb] enabled
729 07:41:03.110030 PCI: 00:16.0 [8086/0000] ops
730 07:41:03.113209 PCI: 00:16.0 [8086/4de0] enabled
731 07:41:03.116117 PCI: 00:19.0 [8086/0000] bus ops
732 07:41:03.120010 PCI: 00:19.0 [8086/4dc5] enabled
733 07:41:03.123222 PCI: 00:19.2 [8086/0000] ops
734 07:41:03.126043 PCI: 00:19.2 [8086/4dc7] enabled
735 07:41:03.129599 PCI: 00:1a.0 [8086/0000] ops
736 07:41:03.132668 PCI: 00:1a.0 [8086/4dc4] enabled
737 07:41:03.136261 PCI: 00:1e.0 [8086/0000] ops
738 07:41:03.139776 PCI: 00:1e.0 [8086/4da8] disabled
739 07:41:03.142752 PCI: 00:1e.2 [8086/0000] bus ops
740 07:41:03.146377 PCI: 00:1e.2 [8086/4daa] enabled
741 07:41:03.149417 PCI: 00:1f.0 [8086/0000] bus ops
742 07:41:03.152531 PCI: 00:1f.0 [8086/4d87] enabled
743 07:41:03.159669 PCI: Static device PCI: 00:1f.1 not found, disabling it.
744 07:41:03.159758 RTC Init
745 07:41:03.162586 Set power on after power failure.
746 07:41:03.166025 Disabling Deep S3
747 07:41:03.166112 Disabling Deep S3
748 07:41:03.169331 Disabling Deep S4
749 07:41:03.169447 Disabling Deep S4
750 07:41:03.172414 Disabling Deep S5
751 07:41:03.172501 Disabling Deep S5
752 07:41:03.175787 PCI: 00:1f.2 [0000/0000] hidden
753 07:41:03.179301 PCI: 00:1f.3 [8086/0000] bus ops
754 07:41:03.182591 PCI: 00:1f.3 [8086/4dc8] enabled
755 07:41:03.185943 PCI: 00:1f.5 [8086/0000] bus ops
756 07:41:03.188929 PCI: 00:1f.5 [8086/4da4] enabled
757 07:41:03.192452 PCI: Leftover static devices:
758 07:41:03.196054 PCI: 00:12.6
759 07:41:03.196140 PCI: 00:09.0
760 07:41:03.198951 PCI: 00:14.1
761 07:41:03.199037 PCI: 00:16.1
762 07:41:03.199104 PCI: 00:16.4
763 07:41:03.202700 PCI: 00:16.5
764 07:41:03.202787 PCI: 00:17.0
765 07:41:03.205750 PCI: 00:19.1
766 07:41:03.205836 PCI: 00:1e.1
767 07:41:03.205904 PCI: 00:1e.3
768 07:41:03.209185 PCI: 00:1f.1
769 07:41:03.209271 PCI: 00:1f.4
770 07:41:03.212968 PCI: 00:1f.7
771 07:41:03.213056 PCI: Check your devicetree.cb.
772 07:41:03.216276 PCI: 00:02.0 scanning...
773 07:41:03.219689 scan_generic_bus for PCI: 00:02.0
774 07:41:03.223154 scan_generic_bus for PCI: 00:02.0 done
775 07:41:03.229918 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
776 07:41:03.232899 PCI: 00:04.0 scanning...
777 07:41:03.236242 scan_generic_bus for PCI: 00:04.0
778 07:41:03.236329 GENERIC: 0.0 enabled
779 07:41:03.243070 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
780 07:41:03.249543 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
781 07:41:03.249653 PCI: 00:05.0 scanning...
782 07:41:03.252595 scan_generic_bus for PCI: 00:05.0
783 07:41:03.256006 GENERIC: 0.0 enabled
784 07:41:03.262556 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
785 07:41:03.266047 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
786 07:41:03.269062 PCI: 00:14.0 scanning...
787 07:41:03.272695 scan_static_bus for PCI: 00:14.0
788 07:41:03.276122 USB0 port 0 enabled
789 07:41:03.276208 USB0 port 0 scanning...
790 07:41:03.279456 scan_static_bus for USB0 port 0
791 07:41:03.282632 USB2 port 0 enabled
792 07:41:03.285961 USB2 port 1 enabled
793 07:41:03.286074 USB2 port 2 enabled
794 07:41:03.289330 USB2 port 3 enabled
795 07:41:03.292892 USB2 port 4 disabled
796 07:41:03.292978 USB2 port 5 enabled
797 07:41:03.295654 USB2 port 6 disabled
798 07:41:03.295772 USB2 port 7 enabled
799 07:41:03.299219 USB3 port 0 enabled
800 07:41:03.302271 USB3 port 1 enabled
801 07:41:03.302357 USB3 port 2 enabled
802 07:41:03.305908 USB3 port 3 enabled
803 07:41:03.309225 USB2 port 0 scanning...
804 07:41:03.312533 scan_static_bus for USB2 port 0
805 07:41:03.315752 scan_static_bus for USB2 port 0 done
806 07:41:03.318963 scan_bus: bus USB2 port 0 finished in 6 msecs
807 07:41:03.322499 USB2 port 1 scanning...
808 07:41:03.325719 scan_static_bus for USB2 port 1
809 07:41:03.328965 scan_static_bus for USB2 port 1 done
810 07:41:03.332309 scan_bus: bus USB2 port 1 finished in 6 msecs
811 07:41:03.335510 USB2 port 2 scanning...
812 07:41:03.338600 scan_static_bus for USB2 port 2
813 07:41:03.342020 scan_static_bus for USB2 port 2 done
814 07:41:03.348838 scan_bus: bus USB2 port 2 finished in 6 msecs
815 07:41:03.348925 USB2 port 3 scanning...
816 07:41:03.351841 scan_static_bus for USB2 port 3
817 07:41:03.358924 scan_static_bus for USB2 port 3 done
818 07:41:03.361818 scan_bus: bus USB2 port 3 finished in 6 msecs
819 07:41:03.365296 USB2 port 5 scanning...
820 07:41:03.368807 scan_static_bus for USB2 port 5
821 07:41:03.371691 scan_static_bus for USB2 port 5 done
822 07:41:03.375142 scan_bus: bus USB2 port 5 finished in 6 msecs
823 07:41:03.378753 USB2 port 7 scanning...
824 07:41:03.381743 scan_static_bus for USB2 port 7
825 07:41:03.385109 scan_static_bus for USB2 port 7 done
826 07:41:03.388323 scan_bus: bus USB2 port 7 finished in 6 msecs
827 07:41:03.391522 USB3 port 0 scanning...
828 07:41:03.395028 scan_static_bus for USB3 port 0
829 07:41:03.398423 scan_static_bus for USB3 port 0 done
830 07:41:03.404878 scan_bus: bus USB3 port 0 finished in 6 msecs
831 07:41:03.405016 USB3 port 1 scanning...
832 07:41:03.408300 scan_static_bus for USB3 port 1
833 07:41:03.414674 scan_static_bus for USB3 port 1 done
834 07:41:03.418160 scan_bus: bus USB3 port 1 finished in 6 msecs
835 07:41:03.421308 USB3 port 2 scanning...
836 07:41:03.424615 scan_static_bus for USB3 port 2
837 07:41:03.428185 scan_static_bus for USB3 port 2 done
838 07:41:03.431739 scan_bus: bus USB3 port 2 finished in 6 msecs
839 07:41:03.434495 USB3 port 3 scanning...
840 07:41:03.437726 scan_static_bus for USB3 port 3
841 07:41:03.441071 scan_static_bus for USB3 port 3 done
842 07:41:03.444392 scan_bus: bus USB3 port 3 finished in 6 msecs
843 07:41:03.450917 scan_static_bus for USB0 port 0 done
844 07:41:03.454725 scan_bus: bus USB0 port 0 finished in 172 msecs
845 07:41:03.457861 scan_static_bus for PCI: 00:14.0 done
846 07:41:03.464607 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
847 07:41:03.464696 PCI: 00:14.3 scanning...
848 07:41:03.467614 scan_static_bus for PCI: 00:14.3
849 07:41:03.471023 GENERIC: 0.0 enabled
850 07:41:03.474392 scan_static_bus for PCI: 00:14.3 done
851 07:41:03.481011 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
852 07:41:03.481099 PCI: 00:15.0 scanning...
853 07:41:03.484455 scan_static_bus for PCI: 00:15.0
854 07:41:03.487395 I2C: 00:2c enabled
855 07:41:03.490962 I2C: 00:15 enabled
856 07:41:03.494361 scan_static_bus for PCI: 00:15.0 done
857 07:41:03.497442 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
858 07:41:03.500686 PCI: 00:15.1 scanning...
859 07:41:03.504155 scan_static_bus for PCI: 00:15.1
860 07:41:03.507718 scan_static_bus for PCI: 00:15.1 done
861 07:41:03.514019 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
862 07:41:03.514107 PCI: 00:15.2 scanning...
863 07:41:03.517420 scan_static_bus for PCI: 00:15.2
864 07:41:03.521003 GENERIC: 0.0 disabled
865 07:41:03.523944 I2C: 00:15 enabled
866 07:41:03.524031 I2C: 00:10 disabled
867 07:41:03.527132 I2C: 00:10 disabled
868 07:41:03.530876 I2C: 00:2c enabled
869 07:41:03.530963 I2C: 00:40 enabled
870 07:41:03.534233 I2C: 00:10 enabled
871 07:41:03.534317 I2C: 00:39 enabled
872 07:41:03.537277 scan_static_bus for PCI: 00:15.2 done
873 07:41:03.544013 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
874 07:41:03.547143 PCI: 00:15.3 scanning...
875 07:41:03.550433 scan_static_bus for PCI: 00:15.3
876 07:41:03.550516 I2C: 00:36 enabled
877 07:41:03.553414 I2C: 00:10 disabled
878 07:41:03.556745 I2C: 00:0c enabled
879 07:41:03.556842 I2C: 00:50 enabled
880 07:41:03.560309 scan_static_bus for PCI: 00:15.3 done
881 07:41:03.566927 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
882 07:41:03.567009 PCI: 00:19.0 scanning...
883 07:41:03.570117 scan_static_bus for PCI: 00:19.0
884 07:41:03.573577 I2C: 00:1a enabled
885 07:41:03.577059 I2C: 00:1a disabled
886 07:41:03.577137 I2C: 00:1a disabled
887 07:41:03.579938 I2C: 00:28 enabled
888 07:41:03.580015 I2C: 00:29 enabled
889 07:41:03.586552 scan_static_bus for PCI: 00:19.0 done
890 07:41:03.590110 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
891 07:41:03.593088 PCI: 00:1e.2 scanning...
892 07:41:03.596565 scan_generic_bus for PCI: 00:1e.2
893 07:41:03.596649 SPI: 00 enabled
894 07:41:03.603406 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
895 07:41:03.609824 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
896 07:41:03.609912 PCI: 00:1f.0 scanning...
897 07:41:03.613174 scan_static_bus for PCI: 00:1f.0
898 07:41:03.616782 PNP: 0c09.0 enabled
899 07:41:03.619703 PNP: 0c09.0 scanning...
900 07:41:03.623099 scan_static_bus for PNP: 0c09.0
901 07:41:03.626530 scan_static_bus for PNP: 0c09.0 done
902 07:41:03.629932 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
903 07:41:03.636407 scan_static_bus for PCI: 00:1f.0 done
904 07:41:03.639607 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
905 07:41:03.643273 PCI: 00:1f.3 scanning...
906 07:41:03.646512 scan_static_bus for PCI: 00:1f.3
907 07:41:03.646611 GENERIC: 0.0 disabled
908 07:41:03.652815 scan_static_bus for PCI: 00:1f.3 done
909 07:41:03.656240 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
910 07:41:03.659642 PCI: 00:1f.5 scanning...
911 07:41:03.663045 scan_generic_bus for PCI: 00:1f.5
912 07:41:03.666478 scan_generic_bus for PCI: 00:1f.5 done
913 07:41:03.669453 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
914 07:41:03.676168 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
915 07:41:03.679259 scan_static_bus for Root Device done
916 07:41:03.686111 scan_bus: bus Root Device finished in 664 msecs
917 07:41:03.686196 done
918 07:41:03.692687 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
919 07:41:03.692771 Chrome EC: UHEPI supported
920 07:41:03.699760 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
921 07:41:03.706250 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
922 07:41:03.709076 SPI flash protection: WPSW=0 SRP0=0
923 07:41:03.715895 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
924 07:41:03.719332 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
925 07:41:03.722781 found VGA at PCI: 00:02.0
926 07:41:03.725689 Setting up VGA for PCI: 00:02.0
927 07:41:03.732633 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
928 07:41:03.735634 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
929 07:41:03.739071 Allocating resources...
930 07:41:03.742301 Reading resources...
931 07:41:03.745513 Root Device read_resources bus 0 link: 0
932 07:41:03.748832 CPU_CLUSTER: 0 read_resources bus 0 link: 0
933 07:41:03.755662 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
934 07:41:03.758930 DOMAIN: 0000 read_resources bus 0 link: 0
935 07:41:03.765437 PCI: 00:04.0 read_resources bus 1 link: 0
936 07:41:03.769053 PCI: 00:04.0 read_resources bus 1 link: 0 done
937 07:41:03.775458 PCI: 00:05.0 read_resources bus 2 link: 0
938 07:41:03.778312 PCI: 00:05.0 read_resources bus 2 link: 0 done
939 07:41:03.781982 PCI: 00:14.0 read_resources bus 0 link: 0
940 07:41:03.789047 USB0 port 0 read_resources bus 0 link: 0
941 07:41:03.792426 USB0 port 0 read_resources bus 0 link: 0 done
942 07:41:03.799991 PCI: 00:14.0 read_resources bus 0 link: 0 done
943 07:41:03.855226 PCI: 00:14.3 read_resources bus 0 link: 0
944 07:41:03.855561 PCI: 00:14.3 read_resources bus 0 link: 0 done
945 07:41:03.855646 PCI: 00:15.0 read_resources bus 0 link: 0
946 07:41:03.855746 PCI: 00:15.0 read_resources bus 0 link: 0 done
947 07:41:03.855849 PCI: 00:15.2 read_resources bus 0 link: 0
948 07:41:03.855941 PCI: 00:15.2 read_resources bus 0 link: 0 done
949 07:41:03.856043 PCI: 00:15.3 read_resources bus 0 link: 0
950 07:41:03.856150 PCI: 00:15.3 read_resources bus 0 link: 0 done
951 07:41:03.856248 PCI: 00:19.0 read_resources bus 0 link: 0
952 07:41:03.856345 PCI: 00:19.0 read_resources bus 0 link: 0 done
953 07:41:03.856433 PCI: 00:1e.2 read_resources bus 3 link: 0
954 07:41:03.871685 PCI: 00:1e.2 read_resources bus 3 link: 0 done
955 07:41:03.871788 PCI: 00:1f.0 read_resources bus 0 link: 0
956 07:41:03.872071 PCI: 00:1f.0 read_resources bus 0 link: 0 done
957 07:41:03.876217 PCI: 00:1f.3 read_resources bus 0 link: 0
958 07:41:03.879271 PCI: 00:1f.3 read_resources bus 0 link: 0 done
959 07:41:03.882729 DOMAIN: 0000 read_resources bus 0 link: 0 done
960 07:41:03.885801 Root Device read_resources bus 0 link: 0 done
961 07:41:03.889401 Done reading resources.
962 07:41:03.896176 Show resources in subtree (Root Device)...After reading.
963 07:41:03.899143 Root Device child on link 0 CPU_CLUSTER: 0
964 07:41:03.902538 CPU_CLUSTER: 0 child on link 0 APIC: 00
965 07:41:03.906079 APIC: 00
966 07:41:03.906160 APIC: 02
967 07:41:03.908917 DOMAIN: 0000 child on link 0 PCI: 00:00.0
968 07:41:03.919008 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
969 07:41:03.929221 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
970 07:41:03.932006 PCI: 00:00.0
971 07:41:03.941995 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
972 07:41:03.948563 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
973 07:41:03.958416 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
974 07:41:03.968780 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
975 07:41:03.978279 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
976 07:41:03.988325 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
977 07:41:03.997866 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
978 07:41:04.004743 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
979 07:41:04.014391 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
980 07:41:04.024425 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
981 07:41:04.034542 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
982 07:41:04.044415 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
983 07:41:04.053993 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
984 07:41:04.060976 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
985 07:41:04.070908 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
986 07:41:04.080294 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
987 07:41:04.090530 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
988 07:41:04.100503 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
989 07:41:04.110486 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
990 07:41:04.110586 PCI: 00:02.0
991 07:41:04.120045 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
992 07:41:04.130164 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
993 07:41:04.139907 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
994 07:41:04.143389 PCI: 00:04.0 child on link 0 GENERIC: 0.0
995 07:41:04.152831 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
996 07:41:04.156191 GENERIC: 0.0
997 07:41:04.159675 PCI: 00:05.0 child on link 0 GENERIC: 0.0
998 07:41:04.169418 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
999 07:41:04.173050 GENERIC: 0.0
1000 07:41:04.173137 PCI: 00:08.0
1001 07:41:04.182431 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 07:41:04.189453 PCI: 00:14.0 child on link 0 USB0 port 0
1003 07:41:04.198854 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1004 07:41:04.202377 USB0 port 0 child on link 0 USB2 port 0
1005 07:41:04.202466 USB2 port 0
1006 07:41:04.205606 USB2 port 1
1007 07:41:04.209048 USB2 port 2
1008 07:41:04.209159 USB2 port 3
1009 07:41:04.212011 USB2 port 4
1010 07:41:04.212090 USB2 port 5
1011 07:41:04.215469 USB2 port 6
1012 07:41:04.215555 USB2 port 7
1013 07:41:04.219519 USB3 port 0
1014 07:41:04.219633 USB3 port 1
1015 07:41:04.222499 USB3 port 2
1016 07:41:04.222578 USB3 port 3
1017 07:41:04.225465 PCI: 00:14.2
1018 07:41:04.228694 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1019 07:41:04.238467 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1020 07:41:04.242208 GENERIC: 0.0
1021 07:41:04.242298 PCI: 00:14.5
1022 07:41:04.252143 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 07:41:04.255081 PCI: 00:15.0 child on link 0 I2C: 00:2c
1024 07:41:04.265455 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 07:41:04.268218 I2C: 00:2c
1026 07:41:04.268304 I2C: 00:15
1027 07:41:04.271698 PCI: 00:15.1
1028 07:41:04.281717 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 07:41:04.285231 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1030 07:41:04.295094 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 07:41:04.298139 GENERIC: 0.0
1032 07:41:04.298225 I2C: 00:15
1033 07:41:04.301495 I2C: 00:10
1034 07:41:04.301578 I2C: 00:10
1035 07:41:04.304835 I2C: 00:2c
1036 07:41:04.304914 I2C: 00:40
1037 07:41:04.307983 I2C: 00:10
1038 07:41:04.308059 I2C: 00:39
1039 07:41:04.311456 PCI: 00:15.3 child on link 0 I2C: 00:36
1040 07:41:04.321560 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 07:41:04.324503 I2C: 00:36
1042 07:41:04.324611 I2C: 00:10
1043 07:41:04.327996 I2C: 00:0c
1044 07:41:04.328101 I2C: 00:50
1045 07:41:04.331423 PCI: 00:16.0
1046 07:41:04.341307 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1047 07:41:04.344160 PCI: 00:19.0 child on link 0 I2C: 00:1a
1048 07:41:04.354192 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 07:41:04.357419 I2C: 00:1a
1050 07:41:04.357516 I2C: 00:1a
1051 07:41:04.357586 I2C: 00:1a
1052 07:41:04.361130 I2C: 00:28
1053 07:41:04.361225 I2C: 00:29
1054 07:41:04.364502 PCI: 00:19.2
1055 07:41:04.374061 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1056 07:41:04.384170 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1057 07:41:04.387672 PCI: 00:1a.0
1058 07:41:04.397165 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1059 07:41:04.397253 PCI: 00:1e.0
1060 07:41:04.400818 PCI: 00:1e.2 child on link 0 SPI: 00
1061 07:41:04.410256 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 07:41:04.413604 SPI: 00
1063 07:41:04.417011 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1064 07:41:04.427004 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1065 07:41:04.427137 PNP: 0c09.0
1066 07:41:04.436875 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1067 07:41:04.437007 PCI: 00:1f.2
1068 07:41:04.447042 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1069 07:41:04.456308 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1070 07:41:04.460067 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1071 07:41:04.469981 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1072 07:41:04.480667 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1073 07:41:04.483736 GENERIC: 0.0
1074 07:41:04.483828 PCI: 00:1f.5
1075 07:41:04.493514 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1076 07:41:04.500618 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1077 07:41:04.507117 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1078 07:41:04.513659 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1079 07:41:04.523334 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1080 07:41:04.530074 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1081 07:41:04.536657 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1082 07:41:04.540151 DOMAIN: 0000: Resource ranges:
1083 07:41:04.543086 * Base: 1000, Size: 800, Tag: 100
1084 07:41:04.546749 * Base: 1900, Size: e700, Tag: 100
1085 07:41:04.553180 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1086 07:41:04.559729 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1087 07:41:04.566450 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1088 07:41:04.573023 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1089 07:41:04.582865 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1090 07:41:04.589615 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1091 07:41:04.595853 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1092 07:41:04.605696 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1093 07:41:04.612439 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1094 07:41:04.619407 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1095 07:41:04.629205 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1096 07:41:04.635820 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1097 07:41:04.642138 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1098 07:41:04.652274 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1099 07:41:04.658722 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1100 07:41:04.665080 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1101 07:41:04.675361 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1102 07:41:04.681705 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1103 07:41:04.688059 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1104 07:41:04.698302 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1105 07:41:04.704811 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1106 07:41:04.711147 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1107 07:41:04.720914 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1108 07:41:04.727775 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1109 07:41:04.731034 DOMAIN: 0000: Resource ranges:
1110 07:41:04.734270 * Base: 7fc00000, Size: 40400000, Tag: 200
1111 07:41:04.741049 * Base: d0000000, Size: 2b000000, Tag: 200
1112 07:41:04.744198 * Base: fb001000, Size: 2fff000, Tag: 200
1113 07:41:04.747740 * Base: fe010000, Size: 22000, Tag: 200
1114 07:41:04.750655 * Base: fe033000, Size: a4d000, Tag: 200
1115 07:41:04.757678 * Base: fea88000, Size: 2f8000, Tag: 200
1116 07:41:04.760702 * Base: fed88000, Size: 8000, Tag: 200
1117 07:41:04.764234 * Base: fed93000, Size: d000, Tag: 200
1118 07:41:04.767112 * Base: feda2000, Size: 125e000, Tag: 200
1119 07:41:04.773882 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1120 07:41:04.780221 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1121 07:41:04.787139 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1122 07:41:04.793671 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1123 07:41:04.800090 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1124 07:41:04.807172 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1125 07:41:04.813694 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1126 07:41:04.820253 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1127 07:41:04.826785 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1128 07:41:04.832970 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1129 07:41:04.839952 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1130 07:41:04.846486 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1131 07:41:04.853164 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1132 07:41:04.859312 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1133 07:41:04.865914 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1134 07:41:04.872456 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1135 07:41:04.879541 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1136 07:41:04.886013 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1137 07:41:04.892255 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1138 07:41:04.898743 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1139 07:41:04.905736 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1140 07:41:04.912149 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1141 07:41:04.918764 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1142 07:41:04.925063 Root Device assign_resources, bus 0 link: 0
1143 07:41:04.928690 DOMAIN: 0000 assign_resources, bus 0 link: 0
1144 07:41:04.938298 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1145 07:41:04.945267 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1146 07:41:04.951547 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1147 07:41:04.961921 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1148 07:41:04.965207 PCI: 00:04.0 assign_resources, bus 1 link: 0
1149 07:41:04.971938 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 07:41:04.978279 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1151 07:41:04.981325 PCI: 00:05.0 assign_resources, bus 2 link: 0
1152 07:41:04.988303 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 07:41:04.994798 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1154 07:41:05.004784 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1155 07:41:05.008192 PCI: 00:14.0 assign_resources, bus 0 link: 0
1156 07:41:05.014639 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 07:41:05.021056 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1158 07:41:05.024633 PCI: 00:14.3 assign_resources, bus 0 link: 0
1159 07:41:05.031037 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 07:41:05.037659 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1161 07:41:05.047905 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1162 07:41:05.051543 PCI: 00:15.0 assign_resources, bus 0 link: 0
1163 07:41:05.054976 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 07:41:05.064926 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1165 07:41:05.071287 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1166 07:41:05.077997 PCI: 00:15.2 assign_resources, bus 0 link: 0
1167 07:41:05.081393 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 07:41:05.087723 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1169 07:41:05.094390 PCI: 00:15.3 assign_resources, bus 0 link: 0
1170 07:41:05.097906 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 07:41:05.107855 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1172 07:41:05.114110 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1173 07:41:05.120640 PCI: 00:19.0 assign_resources, bus 0 link: 0
1174 07:41:05.124146 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 07:41:05.130677 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1176 07:41:05.140818 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1177 07:41:05.147035 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1178 07:41:05.153981 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1179 07:41:05.156907 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 07:41:05.163880 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1181 07:41:05.166774 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 07:41:05.170201 LPC: Trying to open IO window from 800 size 1ff
1183 07:41:05.180285 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1184 07:41:05.186961 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1185 07:41:05.193425 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1186 07:41:05.196833 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 07:41:05.203276 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1188 07:41:05.210214 DOMAIN: 0000 assign_resources, bus 0 link: 0
1189 07:41:05.213347 Root Device assign_resources, bus 0 link: 0
1190 07:41:05.216536 Done setting resources.
1191 07:41:05.223366 Show resources in subtree (Root Device)...After assigning values.
1192 07:41:05.226806 Root Device child on link 0 CPU_CLUSTER: 0
1193 07:41:05.233277 CPU_CLUSTER: 0 child on link 0 APIC: 00
1194 07:41:05.233388 APIC: 00
1195 07:41:05.233489 APIC: 02
1196 07:41:05.239753 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1197 07:41:05.246717 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1198 07:41:05.256718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1199 07:41:05.259661 PCI: 00:00.0
1200 07:41:05.269710 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1201 07:41:05.279538 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1202 07:41:05.286337 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1203 07:41:05.295980 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1204 07:41:05.306130 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1205 07:41:05.315929 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1206 07:41:05.325745 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1207 07:41:05.335531 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1208 07:41:05.342115 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1209 07:41:05.351890 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1210 07:41:05.361772 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1211 07:41:05.371864 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1212 07:41:05.381267 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1213 07:41:05.387787 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1214 07:41:05.397827 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1215 07:41:05.407754 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1216 07:41:05.417910 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1217 07:41:05.427625 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1218 07:41:05.437136 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1219 07:41:05.437224 PCI: 00:02.0
1220 07:41:05.450804 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1221 07:41:05.460436 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1222 07:41:05.470048 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1223 07:41:05.473606 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1224 07:41:05.483536 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1225 07:41:05.486565 GENERIC: 0.0
1226 07:41:05.489539 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1227 07:41:05.499592 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1228 07:41:05.502869 GENERIC: 0.0
1229 07:41:05.502947 PCI: 00:08.0
1230 07:41:05.512804 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1231 07:41:05.519641 PCI: 00:14.0 child on link 0 USB0 port 0
1232 07:41:05.529738 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1233 07:41:05.532581 USB0 port 0 child on link 0 USB2 port 0
1234 07:41:05.536191 USB2 port 0
1235 07:41:05.536290 USB2 port 1
1236 07:41:05.539244 USB2 port 2
1237 07:41:05.539317 USB2 port 3
1238 07:41:05.542771 USB2 port 4
1239 07:41:05.542876 USB2 port 5
1240 07:41:05.545710 USB2 port 6
1241 07:41:05.545807 USB2 port 7
1242 07:41:05.549082 USB3 port 0
1243 07:41:05.549171 USB3 port 1
1244 07:41:05.552694 USB3 port 2
1245 07:41:05.555668 USB3 port 3
1246 07:41:05.555750 PCI: 00:14.2
1247 07:41:05.559063 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1248 07:41:05.568792 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1249 07:41:05.572001 GENERIC: 0.0
1250 07:41:05.575368 PCI: 00:14.5
1251 07:41:05.585698 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1252 07:41:05.588442 PCI: 00:15.0 child on link 0 I2C: 00:2c
1253 07:41:05.598556 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1254 07:41:05.602090 I2C: 00:2c
1255 07:41:05.602174 I2C: 00:15
1256 07:41:05.602309 PCI: 00:15.1
1257 07:41:05.614839 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1258 07:41:05.618185 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1259 07:41:05.628401 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1260 07:41:05.631344 GENERIC: 0.0
1261 07:41:05.631429 I2C: 00:15
1262 07:41:05.634590 I2C: 00:10
1263 07:41:05.634674 I2C: 00:10
1264 07:41:05.638027 I2C: 00:2c
1265 07:41:05.638111 I2C: 00:40
1266 07:41:05.638177 I2C: 00:10
1267 07:41:05.641420 I2C: 00:39
1268 07:41:05.644453 PCI: 00:15.3 child on link 0 I2C: 00:36
1269 07:41:05.654309 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1270 07:41:05.657916 I2C: 00:36
1271 07:41:05.658000 I2C: 00:10
1272 07:41:05.660861 I2C: 00:0c
1273 07:41:05.660945 I2C: 00:50
1274 07:41:05.664434 PCI: 00:16.0
1275 07:41:05.674547 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1276 07:41:05.677407 PCI: 00:19.0 child on link 0 I2C: 00:1a
1277 07:41:05.687441 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1278 07:41:05.690553 I2C: 00:1a
1279 07:41:05.690637 I2C: 00:1a
1280 07:41:05.693873 I2C: 00:1a
1281 07:41:05.693956 I2C: 00:28
1282 07:41:05.697413 I2C: 00:29
1283 07:41:05.697507 PCI: 00:19.2
1284 07:41:05.710464 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1285 07:41:05.720420 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1286 07:41:05.720510 PCI: 00:1a.0
1287 07:41:05.730269 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1288 07:41:05.733819 PCI: 00:1e.0
1289 07:41:05.736862 PCI: 00:1e.2 child on link 0 SPI: 00
1290 07:41:05.747150 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1291 07:41:05.747238 SPI: 00
1292 07:41:05.753571 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1293 07:41:05.759947 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1294 07:41:05.763707 PNP: 0c09.0
1295 07:41:05.773181 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1296 07:41:05.773264 PCI: 00:1f.2
1297 07:41:05.783176 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1298 07:41:05.793127 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1299 07:41:05.796799 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1300 07:41:05.806201 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1301 07:41:05.816171 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1302 07:41:05.819553 GENERIC: 0.0
1303 07:41:05.819635 PCI: 00:1f.5
1304 07:41:05.829406 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1305 07:41:05.832587 Done allocating resources.
1306 07:41:05.839402 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1307 07:41:05.842187 Enabling resources...
1308 07:41:05.845939 PCI: 00:00.0 subsystem <- 8086/4e22
1309 07:41:05.849092 PCI: 00:00.0 cmd <- 06
1310 07:41:05.852447 PCI: 00:02.0 subsystem <- 8086/4e55
1311 07:41:05.855957 PCI: 00:02.0 cmd <- 03
1312 07:41:05.859266 PCI: 00:04.0 subsystem <- 8086/4e03
1313 07:41:05.862138 PCI: 00:04.0 cmd <- 02
1314 07:41:05.865745 PCI: 00:05.0 bridge ctrl <- 0003
1315 07:41:05.869105 PCI: 00:05.0 subsystem <- 8086/4e19
1316 07:41:05.869187 PCI: 00:05.0 cmd <- 02
1317 07:41:05.872594 PCI: 00:08.0 cmd <- 06
1318 07:41:05.875618 PCI: 00:14.0 subsystem <- 8086/4ded
1319 07:41:05.879172 PCI: 00:14.0 cmd <- 02
1320 07:41:05.882049 PCI: 00:14.3 subsystem <- 8086/4df0
1321 07:41:05.885604 PCI: 00:14.3 cmd <- 02
1322 07:41:05.888561 PCI: 00:14.5 subsystem <- 8086/4df8
1323 07:41:05.892008 PCI: 00:14.5 cmd <- 06
1324 07:41:05.895612 PCI: 00:15.0 subsystem <- 8086/4de8
1325 07:41:05.898589 PCI: 00:15.0 cmd <- 02
1326 07:41:05.902125 PCI: 00:15.1 subsystem <- 8086/4de9
1327 07:41:05.902213 PCI: 00:15.1 cmd <- 02
1328 07:41:05.908597 PCI: 00:15.2 subsystem <- 8086/4dea
1329 07:41:05.908698 PCI: 00:15.2 cmd <- 02
1330 07:41:05.912009 PCI: 00:15.3 subsystem <- 8086/4deb
1331 07:41:05.915363 PCI: 00:15.3 cmd <- 02
1332 07:41:05.918830 PCI: 00:16.0 subsystem <- 8086/4de0
1333 07:41:05.921797 PCI: 00:16.0 cmd <- 02
1334 07:41:05.925293 PCI: 00:19.0 subsystem <- 8086/4dc5
1335 07:41:05.928642 PCI: 00:19.0 cmd <- 02
1336 07:41:05.931981 PCI: 00:19.2 subsystem <- 8086/4dc7
1337 07:41:05.934898 PCI: 00:19.2 cmd <- 06
1338 07:41:05.938383 PCI: 00:1a.0 subsystem <- 8086/4dc4
1339 07:41:05.941677 PCI: 00:1a.0 cmd <- 06
1340 07:41:05.944646 PCI: 00:1e.2 subsystem <- 8086/4daa
1341 07:41:05.944728 PCI: 00:1e.2 cmd <- 06
1342 07:41:05.951666 PCI: 00:1f.0 subsystem <- 8086/4d87
1343 07:41:05.951750 PCI: 00:1f.0 cmd <- 407
1344 07:41:05.954561 PCI: 00:1f.3 subsystem <- 8086/4dc8
1345 07:41:05.957978 PCI: 00:1f.3 cmd <- 02
1346 07:41:05.961311 PCI: 00:1f.5 subsystem <- 8086/4da4
1347 07:41:05.964395 PCI: 00:1f.5 cmd <- 406
1348 07:41:05.969067 done.
1349 07:41:05.972729 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1350 07:41:05.975716 Initializing devices...
1351 07:41:05.979165 Root Device init
1352 07:41:05.979248 mainboard: EC init
1353 07:41:05.985455 Chrome EC: Set SMI mask to 0x0000000000000000
1354 07:41:05.988906 Chrome EC: clear events_b mask to 0x0000000000000000
1355 07:41:05.995442 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1356 07:41:06.002059 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1357 07:41:06.008945 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1358 07:41:06.012338 Chrome EC: Set WAKE mask to 0x0000000000000000
1359 07:41:06.018642 Root Device init finished in 35 msecs
1360 07:41:06.018741 PCI: 00:00.0 init
1361 07:41:06.022725 CPU TDP = 6 Watts
1362 07:41:06.026102 CPU PL1 = 7 Watts
1363 07:41:06.026184 CPU PL2 = 12 Watts
1364 07:41:06.029464 PCI: 00:00.0 init finished in 6 msecs
1365 07:41:06.032933 PCI: 00:02.0 init
1366 07:41:06.036299 GMA: Found VBT in CBFS
1367 07:41:06.039484 GMA: Found valid VBT in CBFS
1368 07:41:06.042942 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1369 07:41:06.052381 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1370 07:41:06.055872 PCI: 00:02.0 init finished in 18 msecs
1371 07:41:06.059034 PCI: 00:08.0 init
1372 07:41:06.062683 PCI: 00:08.0 init finished in 0 msecs
1373 07:41:06.062807 PCI: 00:14.0 init
1374 07:41:06.069347 XHCI: Updated LFPS sampling OFF time to 9 ms
1375 07:41:06.072669 PCI: 00:14.0 init finished in 4 msecs
1376 07:41:06.075736 PCI: 00:15.0 init
1377 07:41:06.079227 I2C bus 0 version 0x3230302a
1378 07:41:06.082234 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1379 07:41:06.085699 PCI: 00:15.0 init finished in 6 msecs
1380 07:41:06.085782 PCI: 00:15.1 init
1381 07:41:06.089069 I2C bus 1 version 0x3230302a
1382 07:41:06.092467 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1383 07:41:06.098827 PCI: 00:15.1 init finished in 6 msecs
1384 07:41:06.098911 PCI: 00:15.2 init
1385 07:41:06.102304 I2C bus 2 version 0x3230302a
1386 07:41:06.105303 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1387 07:41:06.108782 PCI: 00:15.2 init finished in 6 msecs
1388 07:41:06.112196 PCI: 00:15.3 init
1389 07:41:06.115097 I2C bus 3 version 0x3230302a
1390 07:41:06.118635 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1391 07:41:06.122133 PCI: 00:15.3 init finished in 6 msecs
1392 07:41:06.125012 PCI: 00:16.0 init
1393 07:41:06.128482 PCI: 00:16.0 init finished in 0 msecs
1394 07:41:06.131884 PCI: 00:19.0 init
1395 07:41:06.134864 I2C bus 4 version 0x3230302a
1396 07:41:06.138663 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1397 07:41:06.141395 PCI: 00:19.0 init finished in 6 msecs
1398 07:41:06.141539 PCI: 00:1a.0 init
1399 07:41:06.148330 PCI: 00:1a.0 init finished in 0 msecs
1400 07:41:06.148413 PCI: 00:1f.0 init
1401 07:41:06.154620 IOAPIC: Initializing IOAPIC at 0xfec00000
1402 07:41:06.158203 IOAPIC: Bootstrap Processor Local APIC = 0x00
1403 07:41:06.161751 IOAPIC: ID = 0x02
1404 07:41:06.161833 IOAPIC: Dumping registers
1405 07:41:06.164685 reg 0x0000: 0x02000000
1406 07:41:06.167909 reg 0x0001: 0x00770020
1407 07:41:06.171615 reg 0x0002: 0x00000000
1408 07:41:06.174697 PCI: 00:1f.0 init finished in 21 msecs
1409 07:41:06.178059 PCI: 00:1f.2 init
1410 07:41:06.178141 Disabling ACPI via APMC.
1411 07:41:06.183200 APMC done.
1412 07:41:06.186769 PCI: 00:1f.2 init finished in 6 msecs
1413 07:41:06.197359 PNP: 0c09.0 init
1414 07:41:06.201002 Google Chrome EC uptime: 6.531 seconds
1415 07:41:06.207390 Google Chrome AP resets since EC boot: 0
1416 07:41:06.210987 Google Chrome most recent AP reset causes:
1417 07:41:06.217400 Google Chrome EC reset flags at last EC boot: reset-pin
1418 07:41:06.220698 PNP: 0c09.0 init finished in 18 msecs
1419 07:41:06.220781 Devices initialized
1420 07:41:06.224177 Show all devs... After init.
1421 07:41:06.227737 Root Device: enabled 1
1422 07:41:06.230699 CPU_CLUSTER: 0: enabled 1
1423 07:41:06.234094 DOMAIN: 0000: enabled 1
1424 07:41:06.234175 PCI: 00:00.0: enabled 1
1425 07:41:06.237495 PCI: 00:02.0: enabled 1
1426 07:41:06.240359 PCI: 00:04.0: enabled 1
1427 07:41:06.240440 PCI: 00:05.0: enabled 1
1428 07:41:06.243859 PCI: 00:09.0: enabled 0
1429 07:41:06.247251 PCI: 00:12.6: enabled 0
1430 07:41:06.250737 PCI: 00:14.0: enabled 1
1431 07:41:06.250818 PCI: 00:14.1: enabled 0
1432 07:41:06.253698 PCI: 00:14.2: enabled 0
1433 07:41:06.256899 PCI: 00:14.3: enabled 1
1434 07:41:06.260410 PCI: 00:14.5: enabled 1
1435 07:41:06.260493 PCI: 00:15.0: enabled 1
1436 07:41:06.263943 PCI: 00:15.1: enabled 1
1437 07:41:06.266883 PCI: 00:15.2: enabled 1
1438 07:41:06.270302 PCI: 00:15.3: enabled 1
1439 07:41:06.270384 PCI: 00:16.0: enabled 1
1440 07:41:06.273849 PCI: 00:16.1: enabled 0
1441 07:41:06.276553 PCI: 00:16.4: enabled 0
1442 07:41:06.280381 PCI: 00:16.5: enabled 0
1443 07:41:06.280463 PCI: 00:17.0: enabled 0
1444 07:41:06.283671 PCI: 00:19.0: enabled 1
1445 07:41:06.286563 PCI: 00:19.1: enabled 0
1446 07:41:06.286645 PCI: 00:19.2: enabled 1
1447 07:41:06.290048 PCI: 00:1a.0: enabled 1
1448 07:41:06.293618 PCI: 00:1c.0: enabled 0
1449 07:41:06.296934 PCI: 00:1c.1: enabled 0
1450 07:41:06.297016 PCI: 00:1c.2: enabled 0
1451 07:41:06.299818 PCI: 00:1c.3: enabled 0
1452 07:41:06.303305 PCI: 00:1c.4: enabled 0
1453 07:41:06.306899 PCI: 00:1c.5: enabled 0
1454 07:41:06.306982 PCI: 00:1c.6: enabled 0
1455 07:41:06.309705 PCI: 00:1c.7: enabled 1
1456 07:41:06.313057 PCI: 00:1e.0: enabled 0
1457 07:41:06.316417 PCI: 00:1e.1: enabled 0
1458 07:41:06.316499 PCI: 00:1e.2: enabled 1
1459 07:41:06.319861 PCI: 00:1e.3: enabled 0
1460 07:41:06.322970 PCI: 00:1f.0: enabled 1
1461 07:41:06.323051 PCI: 00:1f.1: enabled 0
1462 07:41:06.326236 PCI: 00:1f.2: enabled 1
1463 07:41:06.329886 PCI: 00:1f.3: enabled 1
1464 07:41:06.332989 PCI: 00:1f.4: enabled 0
1465 07:41:06.333074 PCI: 00:1f.5: enabled 1
1466 07:41:06.336253 PCI: 00:1f.7: enabled 0
1467 07:41:06.339451 GENERIC: 0.0: enabled 1
1468 07:41:06.342876 GENERIC: 0.0: enabled 1
1469 07:41:06.342957 USB0 port 0: enabled 1
1470 07:41:06.345889 GENERIC: 0.0: enabled 1
1471 07:41:06.349413 I2C: 00:2c: enabled 1
1472 07:41:06.349520 I2C: 00:15: enabled 1
1473 07:41:06.353022 GENERIC: 0.0: enabled 0
1474 07:41:06.355979 I2C: 00:15: enabled 1
1475 07:41:06.359293 I2C: 00:10: enabled 0
1476 07:41:06.359374 I2C: 00:10: enabled 0
1477 07:41:06.362611 I2C: 00:2c: enabled 1
1478 07:41:06.365931 I2C: 00:40: enabled 1
1479 07:41:06.366011 I2C: 00:10: enabled 1
1480 07:41:06.369502 I2C: 00:39: enabled 1
1481 07:41:06.372439 I2C: 00:36: enabled 1
1482 07:41:06.372520 I2C: 00:10: enabled 0
1483 07:41:06.375933 I2C: 00:0c: enabled 1
1484 07:41:06.379328 I2C: 00:50: enabled 1
1485 07:41:06.379409 I2C: 00:1a: enabled 1
1486 07:41:06.382286 I2C: 00:1a: enabled 0
1487 07:41:06.385634 I2C: 00:1a: enabled 0
1488 07:41:06.385741 I2C: 00:28: enabled 1
1489 07:41:06.388875 I2C: 00:29: enabled 1
1490 07:41:06.392494 PCI: 00:00.0: enabled 1
1491 07:41:06.392574 SPI: 00: enabled 1
1492 07:41:06.395949 PNP: 0c09.0: enabled 1
1493 07:41:06.398736 GENERIC: 0.0: enabled 0
1494 07:41:06.398817 USB2 port 0: enabled 1
1495 07:41:06.402139 USB2 port 1: enabled 1
1496 07:41:06.405552 USB2 port 2: enabled 1
1497 07:41:06.409043 USB2 port 3: enabled 1
1498 07:41:06.409123 USB2 port 4: enabled 0
1499 07:41:06.411934 USB2 port 5: enabled 1
1500 07:41:06.415340 USB2 port 6: enabled 0
1501 07:41:06.415421 USB2 port 7: enabled 1
1502 07:41:06.418681 USB3 port 0: enabled 1
1503 07:41:06.422344 USB3 port 1: enabled 1
1504 07:41:06.425705 USB3 port 2: enabled 1
1505 07:41:06.425786 USB3 port 3: enabled 1
1506 07:41:06.428673 APIC: 00: enabled 1
1507 07:41:06.428786 APIC: 02: enabled 1
1508 07:41:06.432196 PCI: 00:08.0: enabled 1
1509 07:41:06.438442 BS: BS_DEV_INIT run times (exec / console): 23 / 436 ms
1510 07:41:06.441884 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1511 07:41:06.445011 ELOG: NV offset 0xbfa000 size 0x1000
1512 07:41:06.453544 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1513 07:41:06.460089 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:05 UTC
1514 07:41:06.466716 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:05 UTC
1515 07:41:06.473185 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:05 UTC
1516 07:41:06.479411 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:05 UTC
1517 07:41:06.486386 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:05 UTC
1518 07:41:06.492646 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1519 07:41:06.495896 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:05 UTC
1520 07:41:06.505975 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1521 07:41:06.512359 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:05 UTC
1522 07:41:06.516116 elog_add_boot_reason: Logged dev mode boot
1523 07:41:06.522271 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1524 07:41:06.522355 Finalize devices...
1525 07:41:06.525819 Devices finalized
1526 07:41:06.532648 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1527 07:41:06.535450 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1528 07:41:06.542018 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1529 07:41:06.545455 ME: HFSTS1 : 0x80030045
1530 07:41:06.549102 ME: HFSTS2 : 0x30280136
1531 07:41:06.555397 ME: HFSTS3 : 0x00000050
1532 07:41:06.558872 ME: HFSTS4 : 0x00004000
1533 07:41:06.562230 ME: HFSTS5 : 0x00000000
1534 07:41:06.565622 ME: HFSTS6 : 0x40400006
1535 07:41:06.568542 ME: Manufacturing Mode : NO
1536 07:41:06.571833 ME: FW Partition Table : OK
1537 07:41:06.575374 ME: Bringup Loader Failure : NO
1538 07:41:06.578316 ME: Firmware Init Complete : NO
1539 07:41:06.581737 ME: Boot Options Present : NO
1540 07:41:06.585327 ME: Update In Progress : NO
1541 07:41:06.588718 ME: D0i3 Support : YES
1542 07:41:06.591541 ME: Low Power State Enabled : NO
1543 07:41:06.595007 ME: CPU Replaced : YES
1544 07:41:06.598442 ME: CPU Replacement Valid : YES
1545 07:41:06.601791 ME: Current Working State : 5
1546 07:41:06.605152 ME: Current Operation State : 1
1547 07:41:06.608180 ME: Current Operation Mode : 3
1548 07:41:06.611607 ME: Error Code : 0
1549 07:41:06.615014 ME: CPU Debug Disabled : YES
1550 07:41:06.617833 ME: TXT Support : NO
1551 07:41:06.624545 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1552 07:41:06.631611 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1553 07:41:06.634472 ACPI: Writing ACPI tables at 76b27000.
1554 07:41:06.638097 ACPI: * FACS
1555 07:41:06.638180 ACPI: * DSDT
1556 07:41:06.641491 Ramoops buffer: 0x100000@0x76a26000.
1557 07:41:06.648007 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1558 07:41:06.650984 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1559 07:41:06.654421 Google Chrome EC: version:
1560 07:41:06.657786 ro: magolor_1.1.9999-103b6f9
1561 07:41:06.661168 rw: magolor_1.1.9999-103b6f9
1562 07:41:06.664026 running image: 1
1563 07:41:06.667587 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1564 07:41:06.672208 ACPI: * FADT
1565 07:41:06.672289 SCI is IRQ9
1566 07:41:06.679019 ACPI: added table 1/32, length now 40
1567 07:41:06.679101 ACPI: * SSDT
1568 07:41:06.682361 Found 1 CPU(s) with 2 core(s) each.
1569 07:41:06.685820 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1570 07:41:06.692026 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1571 07:41:06.695420 Could not locate 'wifi_sar' in VPD.
1572 07:41:06.698793 Checking CBFS for default SAR values
1573 07:41:06.706226 wifi_sar_defaults.hex has bad len in CBFS
1574 07:41:06.709231 failed from getting SAR limits!
1575 07:41:06.712693 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1576 07:41:06.719578 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1577 07:41:06.722519 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1578 07:41:06.729413 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1579 07:41:06.732421 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1580 07:41:06.739259 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1581 07:41:06.742255 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1582 07:41:06.749275 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1583 07:41:06.755730 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1584 07:41:06.762086 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1585 07:41:06.765608 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1586 07:41:06.771901 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1587 07:41:06.779175 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1588 07:41:06.781919 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1589 07:41:06.785489 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1590 07:41:06.793150 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1591 07:41:06.796729 PS2K: Passing 101 keymaps to kernel
1592 07:41:06.803182 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1593 07:41:06.809746 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1594 07:41:06.812702 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1595 07:41:06.819745 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1596 07:41:06.826202 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1597 07:41:06.829412 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1598 07:41:06.836356 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1599 07:41:06.842696 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1600 07:41:06.846101 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1601 07:41:06.852581 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1602 07:41:06.856144 ACPI: added table 2/32, length now 44
1603 07:41:06.859191 ACPI: * MCFG
1604 07:41:06.862679 ACPI: added table 3/32, length now 48
1605 07:41:06.862761 ACPI: * TPM2
1606 07:41:06.865602 TPM2 log created at 0x76a16000
1607 07:41:06.869040 ACPI: added table 4/32, length now 52
1608 07:41:06.872565 ACPI: * MADT
1609 07:41:06.872647 SCI is IRQ9
1610 07:41:06.875673 ACPI: added table 5/32, length now 56
1611 07:41:06.879132 current = 76b2d580
1612 07:41:06.882641 ACPI: * DMAR
1613 07:41:06.885611 ACPI: added table 6/32, length now 60
1614 07:41:06.888954 ACPI: added table 7/32, length now 64
1615 07:41:06.889036 ACPI: * HPET
1616 07:41:06.895416 ACPI: added table 8/32, length now 68
1617 07:41:06.895497 ACPI: done.
1618 07:41:06.898924 ACPI tables: 26304 bytes.
1619 07:41:06.902381 smbios_write_tables: 76a15000
1620 07:41:06.905357 EC returned error result code 3
1621 07:41:06.908731 Couldn't obtain OEM name from CBI
1622 07:41:06.912189 Create SMBIOS type 16
1623 07:41:06.915153 Create SMBIOS type 17
1624 07:41:06.915234 GENERIC: 0.0 (WIFI Device)
1625 07:41:06.918618 SMBIOS tables: 913 bytes.
1626 07:41:06.924948 Writing table forward entry at 0x00000500
1627 07:41:06.928342 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1628 07:41:06.935275 Writing coreboot table at 0x76b4b000
1629 07:41:06.938406 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1630 07:41:06.944829 1. 0000000000001000-000000000009ffff: RAM
1631 07:41:06.948073 2. 00000000000a0000-00000000000fffff: RESERVED
1632 07:41:06.951326 3. 0000000000100000-0000000076a14fff: RAM
1633 07:41:06.958181 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1634 07:41:06.964609 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1635 07:41:06.968156 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1636 07:41:06.974477 7. 0000000077000000-000000007fbfffff: RESERVED
1637 07:41:06.978007 8. 00000000c0000000-00000000cfffffff: RESERVED
1638 07:41:06.984543 9. 00000000fb000000-00000000fb000fff: RESERVED
1639 07:41:06.987441 10. 00000000fe000000-00000000fe00ffff: RESERVED
1640 07:41:06.994182 11. 00000000fea80000-00000000fea87fff: RESERVED
1641 07:41:06.997605 12. 00000000fed80000-00000000fed87fff: RESERVED
1642 07:41:07.004180 13. 00000000fed90000-00000000fed92fff: RESERVED
1643 07:41:07.007465 14. 00000000feda0000-00000000feda1fff: RESERVED
1644 07:41:07.010927 15. 0000000100000000-00000001803fffff: RAM
1645 07:41:07.014319 Passing 4 GPIOs to payload:
1646 07:41:07.020809 NAME | PORT | POLARITY | VALUE
1647 07:41:07.024148 lid | undefined | high | high
1648 07:41:07.030346 power | undefined | high | low
1649 07:41:07.033802 oprom | undefined | high | low
1650 07:41:07.040782 EC in RW | 0x000000b9 | high | low
1651 07:41:07.046992 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 1e9a
1652 07:41:07.050766 coreboot table: 1504 bytes.
1653 07:41:07.053679 IMD ROOT 0. 0x76fff000 0x00001000
1654 07:41:07.057135 IMD SMALL 1. 0x76ffe000 0x00001000
1655 07:41:07.060380 FSP MEMORY 2. 0x76c4e000 0x003b0000
1656 07:41:07.063547 CONSOLE 3. 0x76c2e000 0x00020000
1657 07:41:07.067149 FMAP 4. 0x76c2d000 0x00000578
1658 07:41:07.073689 TIME STAMP 5. 0x76c2c000 0x00000910
1659 07:41:07.077058 VBOOT WORK 6. 0x76c18000 0x00014000
1660 07:41:07.080522 ROMSTG STCK 7. 0x76c17000 0x00001000
1661 07:41:07.083383 AFTER CAR 8. 0x76c0d000 0x0000a000
1662 07:41:07.086869 RAMSTAGE 9. 0x76ba7000 0x00066000
1663 07:41:07.090548 REFCODE 10. 0x76b67000 0x00040000
1664 07:41:07.093444 SMM BACKUP 11. 0x76b57000 0x00010000
1665 07:41:07.096872 4f444749 12. 0x76b55000 0x00002000
1666 07:41:07.100223 EXT VBT13. 0x76b53000 0x00001c43
1667 07:41:07.103177 COREBOOT 14. 0x76b4b000 0x00008000
1668 07:41:07.110162 ACPI 15. 0x76b27000 0x00024000
1669 07:41:07.113105 ACPI GNVS 16. 0x76b26000 0x00001000
1670 07:41:07.116450 RAMOOPS 17. 0x76a26000 0x00100000
1671 07:41:07.119951 TPM2 TCGLOG18. 0x76a16000 0x00010000
1672 07:41:07.123385 SMBIOS 19. 0x76a15000 0x00000800
1673 07:41:07.126311 IMD small region:
1674 07:41:07.129858 IMD ROOT 0. 0x76ffec00 0x00000400
1675 07:41:07.133117 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1676 07:41:07.136564 VPD 2. 0x76ffeb60 0x0000006c
1677 07:41:07.139517 POWER STATE 3. 0x76ffeb20 0x00000040
1678 07:41:07.146534 ROMSTAGE 4. 0x76ffeb00 0x00000004
1679 07:41:07.149945 MEM INFO 5. 0x76ffe920 0x000001e0
1680 07:41:07.152870 BS: BS_WRITE_TABLES run times (exec / console): 8 / 516 ms
1681 07:41:07.156119 MTRR: Physical address space:
1682 07:41:07.163142 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1683 07:41:07.169383 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1684 07:41:07.176241 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1685 07:41:07.182536 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1686 07:41:07.189356 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1687 07:41:07.195576 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1688 07:41:07.202604 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1689 07:41:07.205788 MTRR: Fixed MSR 0x250 0x0606060606060606
1690 07:41:07.208769 MTRR: Fixed MSR 0x258 0x0606060606060606
1691 07:41:07.212215 MTRR: Fixed MSR 0x259 0x0000000000000000
1692 07:41:07.218686 MTRR: Fixed MSR 0x268 0x0606060606060606
1693 07:41:07.222071 MTRR: Fixed MSR 0x269 0x0606060606060606
1694 07:41:07.225657 MTRR: Fixed MSR 0x26a 0x0606060606060606
1695 07:41:07.228571 MTRR: Fixed MSR 0x26b 0x0606060606060606
1696 07:41:07.232112 MTRR: Fixed MSR 0x26c 0x0606060606060606
1697 07:41:07.238878 MTRR: Fixed MSR 0x26d 0x0606060606060606
1698 07:41:07.241801 MTRR: Fixed MSR 0x26e 0x0606060606060606
1699 07:41:07.245256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1700 07:41:07.248732 call enable_fixed_mtrr()
1701 07:41:07.251758 CPU physical address size: 39 bits
1702 07:41:07.255271 MTRR: default type WB/UC MTRR counts: 6/5.
1703 07:41:07.261691 MTRR: UC selected as default type.
1704 07:41:07.265047 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1705 07:41:07.271803 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1706 07:41:07.278463 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1707 07:41:07.284851 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1708 07:41:07.291747 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1709 07:41:07.291831
1710 07:41:07.291897 MTRR check
1711 07:41:07.294673 Fixed MTRRs : Enabled
1712 07:41:07.298409 Variable MTRRs: Enabled
1713 07:41:07.298492
1714 07:41:07.301443 MTRR: Fixed MSR 0x250 0x0606060606060606
1715 07:41:07.304555 MTRR: Fixed MSR 0x258 0x0606060606060606
1716 07:41:07.311566 MTRR: Fixed MSR 0x259 0x0000000000000000
1717 07:41:07.314553 MTRR: Fixed MSR 0x268 0x0606060606060606
1718 07:41:07.317674 MTRR: Fixed MSR 0x269 0x0606060606060606
1719 07:41:07.321114 MTRR: Fixed MSR 0x26a 0x0606060606060606
1720 07:41:07.327890 MTRR: Fixed MSR 0x26b 0x0606060606060606
1721 07:41:07.331315 MTRR: Fixed MSR 0x26c 0x0606060606060606
1722 07:41:07.334274 MTRR: Fixed MSR 0x26d 0x0606060606060606
1723 07:41:07.337721 MTRR: Fixed MSR 0x26e 0x0606060606060606
1724 07:41:07.344121 MTRR: Fixed MSR 0x26f 0x0606060606060606
1725 07:41:07.347599 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1726 07:41:07.351046 call enable_fixed_mtrr()
1727 07:41:07.355155 Checking cr50 for pending updates
1728 07:41:07.358719 CPU physical address size: 39 bits
1729 07:41:07.362097 Reading cr50 TPM mode
1730 07:41:07.372127 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1731 07:41:07.378992 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1732 07:41:07.382515 Checking segment from ROM address 0xfff9d5b8
1733 07:41:07.389355 Checking segment from ROM address 0xfff9d5d4
1734 07:41:07.392715 Loading segment from ROM address 0xfff9d5b8
1735 07:41:07.395612 code (compression=0)
1736 07:41:07.402005 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1737 07:41:07.412222 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1738 07:41:07.415194 it's not compressed!
1739 07:41:07.540039 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1740 07:41:07.546939 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1741 07:41:07.554462 Loading segment from ROM address 0xfff9d5d4
1742 07:41:07.557584 Entry Point 0x30000000
1743 07:41:07.557666 Loaded segments
1744 07:41:07.564041 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1745 07:41:07.580098 Finalizing chipset.
1746 07:41:07.583635 Finalizing SMM.
1747 07:41:07.583719 APMC done.
1748 07:41:07.590141 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1749 07:41:07.593734 mp_park_aps done after 0 msecs.
1750 07:41:07.596647 Jumping to boot code at 0x30000000(0x76b4b000)
1751 07:41:07.606631 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1752 07:41:07.606714
1753 07:41:07.606779
1754 07:41:07.606838
1755 07:41:07.610118 Starting depthcharge on Magolor...
1756 07:41:07.610467 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1757 07:41:07.610568 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1758 07:41:07.610650 Setting prompt string to ['dedede:']
1759 07:41:07.610731 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1760 07:41:07.613414
1761 07:41:07.619691 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1762 07:41:07.619788
1763 07:41:07.626643 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1764 07:41:07.626727
1765 07:41:07.630011 fw_config match found: AUDIO_AMP=UNPROVISIONED
1766 07:41:07.632958
1767 07:41:07.633038 Wipe memory regions:
1768 07:41:07.633102
1769 07:41:07.636595 [0x00000000001000, 0x000000000a0000)
1770 07:41:07.636678
1771 07:41:07.639518 [0x00000000100000, 0x00000030000000)
1772 07:41:07.768416
1773 07:41:07.771901 [0x00000031062170, 0x00000076a15000)
1774 07:41:07.940607
1775 07:41:07.944079 [0x00000100000000, 0x00000180400000)
1776 07:41:09.006457
1777 07:41:09.006604 R8152: Initializing
1778 07:41:09.006672
1779 07:41:09.009774 Version 6 (ocp_data = 5c30)
1780 07:41:09.012809
1781 07:41:09.012886 R8152: Done initializing
1782 07:41:09.012977
1783 07:41:09.016398 Adding net device
1784 07:41:09.016493
1785 07:41:09.019890 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1786 07:41:09.022700
1787 07:41:09.022816
1788 07:41:09.022916
1789 07:41:09.023224 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1791 07:41:09.123568 dedede: tftpboot 192.168.201.1 12435163/tftp-deploy-946v50j8/kernel/bzImage 12435163/tftp-deploy-946v50j8/kernel/cmdline 12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
1792 07:41:09.123729 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1793 07:41:09.123822 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1794 07:41:09.128082 tftpboot 192.168.201.1 12435163/tftp-deploy-946v50j8/kernel/bzIploy-946v50j8/kernel/cmdline 12435163/tftp-deploy-946v50j8/ramdisk/ramdisk.cpio.gz
1795 07:41:09.128171
1796 07:41:09.128237 Waiting for link
1797 07:41:09.329750
1798 07:41:09.329889 done.
1799 07:41:09.329960
1800 07:41:09.330022 MAC: 00:24:32:30:7b:c4
1801 07:41:09.330083
1802 07:41:09.333148 Sending DHCP discover... done.
1803 07:41:09.333253
1804 07:41:09.336500 Waiting for reply... done.
1805 07:41:09.336573
1806 07:41:09.340463 Sending DHCP request... done.
1807 07:41:09.340574
1808 07:41:09.342995 Waiting for reply... done.
1809 07:41:09.343097
1810 07:41:09.346603 My ip is 192.168.201.12
1811 07:41:09.346708
1812 07:41:09.349491 The DHCP server ip is 192.168.201.1
1813 07:41:09.349562
1814 07:41:09.356030 TFTP server IP predefined by user: 192.168.201.1
1815 07:41:09.356139
1816 07:41:09.362821 Bootfile predefined by user: 12435163/tftp-deploy-946v50j8/kernel/bzImage
1817 07:41:09.362929
1818 07:41:09.366065 Sending tftp read request... done.
1819 07:41:09.366164
1820 07:41:09.369291 Waiting for the transfer...
1821 07:41:09.369399
1822 07:41:09.896606 00000000 ################################################################
1823 07:41:09.896743
1824 07:41:10.419806 00080000 ################################################################
1825 07:41:10.419947
1826 07:41:10.946197 00100000 ################################################################
1827 07:41:10.946362
1828 07:41:11.481001 00180000 ################################################################
1829 07:41:11.481138
1830 07:41:12.000501 00200000 ################################################################
1831 07:41:12.000640
1832 07:41:12.524021 00280000 ################################################################
1833 07:41:12.524184
1834 07:41:13.050167 00300000 ################################################################
1835 07:41:13.050315
1836 07:41:13.570263 00380000 ################################################################
1837 07:41:13.570417
1838 07:41:14.091868 00400000 ################################################################
1839 07:41:14.092016
1840 07:41:14.614824 00480000 ################################################################
1841 07:41:14.614987
1842 07:41:15.137341 00500000 ################################################################
1843 07:41:15.137490
1844 07:41:15.666779 00580000 ################################################################
1845 07:41:15.666917
1846 07:41:16.191389 00600000 ################################################################
1847 07:41:16.191553
1848 07:41:16.714811 00680000 ################################################################
1849 07:41:16.714970
1850 07:41:17.238571 00700000 ################################################################
1851 07:41:17.238735
1852 07:41:17.760557 00780000 ################################################################
1853 07:41:17.760710
1854 07:41:17.943898 00800000 ####################### done.
1855 07:41:17.944068
1856 07:41:17.947558 The bootfile was 8572816 bytes long.
1857 07:41:17.947673
1858 07:41:17.950755 Sending tftp read request... done.
1859 07:41:17.950839
1860 07:41:17.953962 Waiting for the transfer...
1861 07:41:17.954043
1862 07:41:18.474500 00000000 ################################################################
1863 07:41:18.474638
1864 07:41:18.996713 00080000 ################################################################
1865 07:41:18.996881
1866 07:41:19.515981 00100000 ################################################################
1867 07:41:19.516117
1868 07:41:20.033935 00180000 ################################################################
1869 07:41:20.034087
1870 07:41:20.553092 00200000 ################################################################
1871 07:41:20.553272
1872 07:41:21.084519 00280000 ################################################################
1873 07:41:21.084678
1874 07:41:21.630859 00300000 ################################################################
1875 07:41:21.631030
1876 07:41:22.168295 00380000 ################################################################
1877 07:41:22.168465
1878 07:41:22.706133 00400000 ################################################################
1879 07:41:22.706306
1880 07:41:23.239609 00480000 ################################################################
1881 07:41:23.239813
1882 07:41:23.772849 00500000 ################################################################ done.
1883 07:41:23.773022
1884 07:41:23.776265 Sending tftp read request... done.
1885 07:41:23.776375
1886 07:41:23.779608 Waiting for the transfer...
1887 07:41:23.779689
1888 07:41:23.779752 00000000 # done.
1889 07:41:23.779813
1890 07:41:23.789848 Command line loaded dynamically from TFTP file: 12435163/tftp-deploy-946v50j8/kernel/cmdline
1891 07:41:23.789931
1892 07:41:23.812681 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435163/extract-nfsrootfs-ny9srtni,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1893 07:41:23.812782
1894 07:41:23.819094 ec_init: CrosEC protocol v3 supported (256, 256)
1895 07:41:23.825098
1896 07:41:23.828300 Shutting down all USB controllers.
1897 07:41:23.828382
1898 07:41:23.828462 Removing current net device
1899 07:41:23.828524
1900 07:41:23.831785 Finalizing coreboot
1901 07:41:23.831882
1902 07:41:23.838182 Exiting depthcharge with code 4 at timestamp: 23017162
1903 07:41:23.838291
1904 07:41:23.838381
1905 07:41:23.838468 Starting kernel ...
1906 07:41:23.838563
1907 07:41:23.838647
1908 07:41:23.839094 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
1909 07:41:23.839191 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
1910 07:41:23.839300 Setting prompt string to ['Linux version [0-9]']
1911 07:41:23.839396 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1912 07:41:23.839502 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1914 07:45:54.839444 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
1916 07:45:54.839645 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
1918 07:45:54.839795 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1921 07:45:54.840046 end: 2 depthcharge-action (duration 00:05:00) [common]
1923 07:45:54.840322 Cleaning after the job
1924 07:45:54.840409 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/ramdisk
1925 07:45:54.841263 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/kernel
1926 07:45:54.842601 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/nfsrootfs
1927 07:45:54.919614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435163/tftp-deploy-946v50j8/modules
1928 07:45:54.920055 start: 5.1 power-off (timeout 00:00:30) [common]
1929 07:45:54.920224 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1930 07:45:54.996270 >> Command sent successfully.
1931 07:45:54.998812 Returned 0 in 0 seconds
1932 07:45:55.099238 end: 5.1 power-off (duration 00:00:00) [common]
1934 07:45:55.099594 start: 5.2 read-feedback (timeout 00:10:00) [common]
1935 07:45:55.099871 Listened to connection for namespace 'common' for up to 1s
1937 07:45:55.100256 Listened to connection for namespace 'common' for up to 1s
1938 07:45:56.101077 Finalising connection for namespace 'common'
1939 07:45:56.101777 Disconnecting from shell: Finalise
1940 07:45:56.102191
1941 07:45:56.203336 end: 5.2 read-feedback (duration 00:00:01) [common]
1942 07:45:56.203942 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435163
1943 07:45:56.564920 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435163
1944 07:45:56.565115 JobError: Your job cannot terminate cleanly.