Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:22.783719 lava-dispatcher, installed at version: 2023.10
2 07:40:22.783929 start: 0 validate
3 07:40:22.784063 Start time: 2024-01-03 07:40:22.784056+00:00 (UTC)
4 07:40:22.784180 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:22.784313 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:23.069108 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:23.069914 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:23.340200 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:23.340948 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:40:26.231752 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:40:26.232472 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:40:26.512162 validate duration: 3.73
14 07:40:26.513796 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:40:26.514594 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:40:26.515126 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:40:26.515766 Not decompressing ramdisk as can be used compressed.
18 07:40:26.516257 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 07:40:26.516624 saving as /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/ramdisk/initrd.cpio.gz
20 07:40:26.517248 total size: 5432690 (5 MB)
21 07:40:27.036608 progress 0 % (0 MB)
22 07:40:27.047003 progress 5 % (0 MB)
23 07:40:27.055928 progress 10 % (0 MB)
24 07:40:27.062772 progress 15 % (0 MB)
25 07:40:27.067658 progress 20 % (1 MB)
26 07:40:27.071476 progress 25 % (1 MB)
27 07:40:27.074619 progress 30 % (1 MB)
28 07:40:27.077620 progress 35 % (1 MB)
29 07:40:27.080209 progress 40 % (2 MB)
30 07:40:27.082514 progress 45 % (2 MB)
31 07:40:27.084700 progress 50 % (2 MB)
32 07:40:27.086930 progress 55 % (2 MB)
33 07:40:27.089029 progress 60 % (3 MB)
34 07:40:27.090806 progress 65 % (3 MB)
35 07:40:27.092809 progress 70 % (3 MB)
36 07:40:27.094530 progress 75 % (3 MB)
37 07:40:27.096254 progress 80 % (4 MB)
38 07:40:27.097858 progress 85 % (4 MB)
39 07:40:27.099574 progress 90 % (4 MB)
40 07:40:27.101037 progress 95 % (4 MB)
41 07:40:27.102501 progress 100 % (5 MB)
42 07:40:27.102724 5 MB downloaded in 0.59 s (8.85 MB/s)
43 07:40:27.102893 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:40:27.103145 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:40:27.103234 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:40:27.103321 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:40:27.103463 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:40:27.103540 saving as /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/kernel/bzImage
50 07:40:27.103603 total size: 8572816 (8 MB)
51 07:40:27.103666 No compression specified
52 07:40:27.104886 progress 0 % (0 MB)
53 07:40:27.107247 progress 5 % (0 MB)
54 07:40:27.109534 progress 10 % (0 MB)
55 07:40:27.111774 progress 15 % (1 MB)
56 07:40:27.114189 progress 20 % (1 MB)
57 07:40:27.116456 progress 25 % (2 MB)
58 07:40:27.118751 progress 30 % (2 MB)
59 07:40:27.121206 progress 35 % (2 MB)
60 07:40:27.123473 progress 40 % (3 MB)
61 07:40:27.125772 progress 45 % (3 MB)
62 07:40:27.128077 progress 50 % (4 MB)
63 07:40:27.130579 progress 55 % (4 MB)
64 07:40:27.132784 progress 60 % (4 MB)
65 07:40:27.135197 progress 65 % (5 MB)
66 07:40:27.137533 progress 70 % (5 MB)
67 07:40:27.139732 progress 75 % (6 MB)
68 07:40:27.142128 progress 80 % (6 MB)
69 07:40:27.144327 progress 85 % (6 MB)
70 07:40:27.146651 progress 90 % (7 MB)
71 07:40:27.148862 progress 95 % (7 MB)
72 07:40:27.151109 progress 100 % (8 MB)
73 07:40:27.151298 8 MB downloaded in 0.05 s (171.43 MB/s)
74 07:40:27.151441 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:40:27.151673 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:40:27.151759 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:40:27.151847 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:40:27.151982 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 07:40:27.152051 saving as /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/nfsrootfs/full.rootfs.tar
81 07:40:27.152111 total size: 133380384 (127 MB)
82 07:40:27.152172 Using unxz to decompress xz
83 07:40:27.156240 progress 0 % (0 MB)
84 07:40:27.505383 progress 5 % (6 MB)
85 07:40:27.862774 progress 10 % (12 MB)
86 07:40:28.155324 progress 15 % (19 MB)
87 07:40:28.350294 progress 20 % (25 MB)
88 07:40:28.604846 progress 25 % (31 MB)
89 07:40:28.960764 progress 30 % (38 MB)
90 07:40:29.331516 progress 35 % (44 MB)
91 07:40:29.749749 progress 40 % (50 MB)
92 07:40:30.170466 progress 45 % (57 MB)
93 07:40:30.537818 progress 50 % (63 MB)
94 07:40:30.913176 progress 55 % (69 MB)
95 07:40:31.275017 progress 60 % (76 MB)
96 07:40:31.638841 progress 65 % (82 MB)
97 07:40:32.004261 progress 70 % (89 MB)
98 07:40:32.370292 progress 75 % (95 MB)
99 07:40:32.827935 progress 80 % (101 MB)
100 07:40:33.274477 progress 85 % (108 MB)
101 07:40:33.548169 progress 90 % (114 MB)
102 07:40:33.907137 progress 95 % (120 MB)
103 07:40:34.315288 progress 100 % (127 MB)
104 07:40:34.320881 127 MB downloaded in 7.17 s (17.74 MB/s)
105 07:40:34.321177 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:40:34.321443 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:40:34.321555 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:40:34.321675 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:40:34.321833 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:40:34.321907 saving as /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/modules/modules.tar
112 07:40:34.321969 total size: 251144 (0 MB)
113 07:40:34.322032 Using unxz to decompress xz
114 07:40:34.325869 progress 13 % (0 MB)
115 07:40:34.326265 progress 26 % (0 MB)
116 07:40:34.326500 progress 39 % (0 MB)
117 07:40:34.328167 progress 52 % (0 MB)
118 07:40:34.330121 progress 65 % (0 MB)
119 07:40:34.332008 progress 78 % (0 MB)
120 07:40:34.333865 progress 91 % (0 MB)
121 07:40:34.335804 progress 100 % (0 MB)
122 07:40:34.341328 0 MB downloaded in 0.02 s (12.38 MB/s)
123 07:40:34.341569 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:40:34.341835 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:40:34.341932 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 07:40:34.342027 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 07:40:36.465627 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435143/extract-nfsrootfs-y_lxlzp0
129 07:40:36.465829 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 07:40:36.465930 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 07:40:36.466100 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v
132 07:40:36.466238 makedir: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin
133 07:40:36.466345 makedir: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/tests
134 07:40:36.466447 makedir: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/results
135 07:40:36.466550 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-add-keys
136 07:40:36.466694 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-add-sources
137 07:40:36.466823 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-background-process-start
138 07:40:36.466951 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-background-process-stop
139 07:40:36.467078 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-common-functions
140 07:40:36.467204 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-echo-ipv4
141 07:40:36.467330 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-install-packages
142 07:40:36.467455 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-installed-packages
143 07:40:36.467578 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-os-build
144 07:40:36.467702 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-probe-channel
145 07:40:36.467828 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-probe-ip
146 07:40:36.467953 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-target-ip
147 07:40:36.468076 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-target-mac
148 07:40:36.468199 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-target-storage
149 07:40:36.468325 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-case
150 07:40:36.468452 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-event
151 07:40:36.468578 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-feedback
152 07:40:36.468702 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-raise
153 07:40:36.468824 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-reference
154 07:40:36.468949 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-runner
155 07:40:36.469213 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-set
156 07:40:36.469339 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-test-shell
157 07:40:36.469468 Updating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-install-packages (oe)
158 07:40:36.469621 Updating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/bin/lava-installed-packages (oe)
159 07:40:36.469745 Creating /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/environment
160 07:40:36.469840 LAVA metadata
161 07:40:36.469911 - LAVA_JOB_ID=12435143
162 07:40:36.469974 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:40:36.470074 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 07:40:36.470140 skipped lava-vland-overlay
165 07:40:36.470213 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:40:36.470293 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 07:40:36.470354 skipped lava-multinode-overlay
168 07:40:36.470425 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:40:36.470502 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 07:40:36.470575 Loading test definitions
171 07:40:36.470663 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 07:40:36.470735 Using /lava-12435143 at stage 0
173 07:40:36.471060 uuid=12435143_1.5.2.3.1 testdef=None
174 07:40:36.471149 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 07:40:36.471232 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 07:40:36.471733 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 07:40:36.471952 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 07:40:36.472581 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 07:40:36.472809 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 07:40:36.473438 runner path: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/0/tests/0_dmesg test_uuid 12435143_1.5.2.3.1
183 07:40:36.473594 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 07:40:36.473815 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 07:40:36.473885 Using /lava-12435143 at stage 1
187 07:40:36.474186 uuid=12435143_1.5.2.3.5 testdef=None
188 07:40:36.474273 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 07:40:36.474356 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 07:40:36.474820 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 07:40:36.475032 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 07:40:36.475668 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 07:40:36.475893 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 07:40:36.476515 runner path: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/1/tests/1_bootrr test_uuid 12435143_1.5.2.3.5
197 07:40:36.476668 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 07:40:36.476869 Creating lava-test-runner.conf files
200 07:40:36.476931 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/0 for stage 0
201 07:40:36.477093 - 0_dmesg
202 07:40:36.477172 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435143/lava-overlay-9nf5yo8v/lava-12435143/1 for stage 1
203 07:40:36.477261 - 1_bootrr
204 07:40:36.477356 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 07:40:36.477443 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 07:40:36.484526 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 07:40:36.484627 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 07:40:36.484710 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 07:40:36.484793 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 07:40:36.484877 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 07:40:36.619067 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 07:40:36.619455 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 07:40:36.619567 extracting modules file /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435143/extract-nfsrootfs-y_lxlzp0
214 07:40:36.632876 extracting modules file /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435143/extract-overlay-ramdisk-x_c__9ny/ramdisk
215 07:40:36.645965 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 07:40:36.646088 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 07:40:36.646176 [common] Applying overlay to NFS
218 07:40:36.646244 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435143/compress-overlay-9l8ffyun/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435143/extract-nfsrootfs-y_lxlzp0
219 07:40:36.654282 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 07:40:36.654389 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 07:40:36.654476 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 07:40:36.654564 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 07:40:36.654639 Building ramdisk /var/lib/lava/dispatcher/tmp/12435143/extract-overlay-ramdisk-x_c__9ny/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435143/extract-overlay-ramdisk-x_c__9ny/ramdisk
224 07:40:36.721342 >> 26162 blocks
225 07:40:37.257977 rename /var/lib/lava/dispatcher/tmp/12435143/extract-overlay-ramdisk-x_c__9ny/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
226 07:40:37.258424 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 07:40:37.258559 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 07:40:37.258662 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 07:40:37.258754 No mkimage arch provided, not using FIT.
230 07:40:37.258840 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 07:40:37.258920 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 07:40:37.259024 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 07:40:37.259113 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 07:40:37.259191 No LXC device requested
235 07:40:37.259268 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 07:40:37.259352 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 07:40:37.259432 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 07:40:37.259509 Checking files for TFTP limit of 4294967296 bytes.
239 07:40:37.259917 end: 1 tftp-deploy (duration 00:00:11) [common]
240 07:40:37.260022 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 07:40:37.260111 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 07:40:37.260234 substitutions:
243 07:40:37.260300 - {DTB}: None
244 07:40:37.260364 - {INITRD}: 12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
245 07:40:37.260424 - {KERNEL}: 12435143/tftp-deploy-qc_knxz7/kernel/bzImage
246 07:40:37.260489 - {LAVA_MAC}: None
247 07:40:37.260547 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435143/extract-nfsrootfs-y_lxlzp0
248 07:40:37.260603 - {NFS_SERVER_IP}: 192.168.201.1
249 07:40:37.260658 - {PRESEED_CONFIG}: None
250 07:40:37.260712 - {PRESEED_LOCAL}: None
251 07:40:37.260766 - {RAMDISK}: 12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
252 07:40:37.260821 - {ROOT_PART}: None
253 07:40:37.260877 - {ROOT}: None
254 07:40:37.260931 - {SERVER_IP}: 192.168.201.1
255 07:40:37.261017 - {TEE}: None
256 07:40:37.261088 Parsed boot commands:
257 07:40:37.261141 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 07:40:37.261319 Parsed boot commands: tftpboot 192.168.201.1 12435143/tftp-deploy-qc_knxz7/kernel/bzImage 12435143/tftp-deploy-qc_knxz7/kernel/cmdline 12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
259 07:40:37.261409 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 07:40:37.261497 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 07:40:37.261591 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 07:40:37.261680 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 07:40:37.261748 Not connected, no need to disconnect.
264 07:40:37.261821 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 07:40:37.261904 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 07:40:37.261969 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
267 07:40:37.265623 Setting prompt string to ['lava-test: # ']
268 07:40:37.265972 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 07:40:37.266076 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 07:40:37.266180 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 07:40:37.266275 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 07:40:37.266463 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
273 07:40:42.422123 >> Command sent successfully.
274 07:40:42.434150 Returned 0 in 5 seconds
275 07:40:42.535537 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 07:40:42.536890 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 07:40:42.537462 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 07:40:42.537957 Setting prompt string to 'Starting depthcharge on Volmar...'
280 07:40:42.538379 Changing prompt to 'Starting depthcharge on Volmar...'
281 07:40:42.538758 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 07:40:42.540084 [Enter `^Ec?' for help]
283 07:40:43.935570
284 07:40:43.935739
285 07:40:43.943009 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 07:40:43.947120 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 07:40:43.950166 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 07:40:43.957882 CPU: AES supported, TXT NOT supported, VT supported
289 07:40:43.965798 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 07:40:43.965885 Cache size = 10 MiB
291 07:40:43.972470 MCH: device id 4609 (rev 04) is Alderlake-P
292 07:40:43.976380 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 07:40:43.979898 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 07:40:43.983822 VBOOT: Loading verstage.
295 07:40:43.987301 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 07:40:43.994827 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 07:40:43.998507 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 07:40:44.005994 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 07:40:44.012357 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 07:40:44.016311
301 07:40:44.016386
302 07:40:44.023219 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 07:40:44.030524 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 07:40:44.033888 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 07:40:44.036925 I2C TX abort detected (00000001)
306 07:40:44.040431 cr50_i2c_read: Address write failed
307 07:40:44.051812 .done! DID_VID 0x00281ae0
308 07:40:44.055302 TPM ready after 0 ms
309 07:40:44.058318 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 07:40:44.072504 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 07:40:44.079137 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 07:40:44.131471 tlcl_send_startup: Startup return code is 0
313 07:40:44.131611 TPM: setup succeeded
314 07:40:44.152921 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 07:40:44.174492 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 07:40:44.178860 Chrome EC: UHEPI supported
317 07:40:44.181770 Reading cr50 boot mode
318 07:40:44.196696 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 07:40:44.196804 Phase 1
320 07:40:44.200829 FMAP: area GBB found @ 1805000 (458752 bytes)
321 07:40:44.211381 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 07:40:44.218725 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 07:40:44.224729 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
324 07:40:44.224833 Phase 2
325 07:40:44.224928 Phase 3
326 07:40:44.231547 FMAP: area GBB found @ 1805000 (458752 bytes)
327 07:40:44.234990 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 07:40:44.241487 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 07:40:44.248417 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 07:40:44.254686 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
331 07:40:44.262234 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
332 07:40:44.268909 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
333 07:40:44.281980 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 07:40:44.285615 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 07:40:44.292500 VB2:vb2_verify_fw_preamble() Verifying preamble.
336 07:40:44.298840 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
337 07:40:44.305676 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
338 07:40:44.312115 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
339 07:40:44.316029 Phase 4
340 07:40:44.319297 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
341 07:40:44.325733 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
342 07:40:44.539259 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
343 07:40:44.545629 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
344 07:40:44.549193 Saving vboot hash.
345 07:40:44.555363 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
346 07:40:44.571551 tlcl_extend: response is 0
347 07:40:44.578054 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
348 07:40:44.584869 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
349 07:40:44.599109 tlcl_extend: response is 0
350 07:40:44.605755 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
351 07:40:44.625780 tlcl_lock_nv_write: response is 0
352 07:40:44.647728 tlcl_lock_nv_write: response is 0
353 07:40:44.648229 Slot A is selected
354 07:40:44.654084 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
355 07:40:44.660711 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
356 07:40:44.667972 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
357 07:40:44.674359 BS: verstage times (exec / console): total (unknown) / 264 ms
358 07:40:44.674875
359 07:40:44.675297
360 07:40:44.680857 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
361 07:40:44.685970 Google Chrome EC: version:
362 07:40:44.689517 ro: volmar_v2.0.14126-e605144e9c
363 07:40:44.693042 rw: volmar_v0.0.55-22d1557
364 07:40:44.695923 running image: 2
365 07:40:44.699227 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
366 07:40:44.709027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 07:40:44.715723 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 07:40:44.722863 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
369 07:40:44.732283 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
370 07:40:44.742182 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 07:40:44.745671 EC took 946us to calculate image hash
372 07:40:44.755603 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
373 07:40:44.758933 VB2:sync_ec() select_rw=RW(active)
374 07:40:44.771004 Waited 275us to clear limit power flag.
375 07:40:44.774305 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 07:40:44.777510 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 07:40:44.781089 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 07:40:44.787749 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 07:40:44.791183 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 07:40:44.794345 TCO_STS: 0000 0000
381 07:40:44.794428 GEN_PMCON: d0015038 00002200
382 07:40:44.797749 GBLRST_CAUSE: 00000000 00000000
383 07:40:44.800804 HPR_CAUSE0: 00000000
384 07:40:44.804397 prev_sleep_state 5
385 07:40:44.807651 Abort disabling TXT, as CPU is not TXT capable.
386 07:40:44.815724 cse_lite: Number of partitions = 3
387 07:40:44.818625 cse_lite: Current partition = RO
388 07:40:44.818723 cse_lite: Next partition = RO
389 07:40:44.822343 cse_lite: Flags = 0x7
390 07:40:44.828733 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
391 07:40:44.838951 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
392 07:40:44.842068 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 07:40:44.849004 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 07:40:44.855585 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
395 07:40:44.862315 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
396 07:40:44.865528 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 07:40:44.871907 cse_lite: Set Boot Partition Info Command (RW)
398 07:40:44.875272 HECI: Global Reset(Type:1) Command
399 07:40:46.316146 � 64 Sets = 16384
400 07:40:46.319564 Cache size = 10 MiB
401 07:40:46.322906 MCH: device id 4609 (rev 04) is Alderlake-P
402 07:40:46.326455 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
403 07:40:46.333049 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
404 07:40:46.336509 VBOOT: Loading verstage.
405 07:40:46.340270 FMAP: Found "FLASH" version 1.1 at 0x1804000.
406 07:40:46.343877 FMAP: base = 0x0 size = 0x2000000 #areas = 37
407 07:40:46.350344 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
408 07:40:46.356957 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
409 07:40:46.366902 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
410 07:40:46.366989
411 07:40:46.367075
412 07:40:46.373445 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
413 07:40:46.381574 Probing TPM I2C: I2C bus 1 version 0x3230302a
414 07:40:46.385173 DW I2C bus 1 at 0xfe022000 (400 KHz)
415 07:40:46.388230 done! DID_VID 0x00281ae0
416 07:40:46.391755 TPM ready after 0 ms
417 07:40:46.394737 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
418 07:40:46.407700 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
419 07:40:46.411098 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
420 07:40:46.463579 tlcl_send_startup: Startup return code is 0
421 07:40:46.463676 TPM: setup succeeded
422 07:40:46.486692 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
423 07:40:46.508414 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
424 07:40:46.512437 Chrome EC: UHEPI supported
425 07:40:46.515375 Reading cr50 boot mode
426 07:40:46.530618 Cr50 says boot_mode is VERIFIED_RW(0x00).
427 07:40:46.531104 Phase 1
428 07:40:46.536776 FMAP: area GBB found @ 1805000 (458752 bytes)
429 07:40:46.543324 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 07:40:46.549924 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 07:40:46.556358 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
432 07:40:46.559970 Phase 2
433 07:40:46.560067 Phase 3
434 07:40:46.563029 FMAP: area GBB found @ 1805000 (458752 bytes)
435 07:40:46.569799 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
436 07:40:46.573306 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 07:40:46.579997 VB2:vb2_verify_keyblock() Checking keyblock signature...
438 07:40:46.586427 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
439 07:40:46.593026 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
440 07:40:46.603087 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
441 07:40:46.615118 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
442 07:40:46.618711 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 07:40:46.625371 VB2:vb2_verify_fw_preamble() Verifying preamble.
444 07:40:46.631973 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
445 07:40:46.638606 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
446 07:40:46.645339 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
447 07:40:46.649096 Phase 4
448 07:40:46.652736 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
449 07:40:46.659366 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
450 07:40:46.872079 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
451 07:40:46.878805 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
452 07:40:46.881782 Saving vboot hash.
453 07:40:46.888941 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
454 07:40:46.904743 tlcl_extend: response is 0
455 07:40:46.911590 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
456 07:40:46.918139 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
457 07:40:46.932635 tlcl_extend: response is 0
458 07:40:46.939172 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
459 07:40:46.958998 tlcl_lock_nv_write: response is 0
460 07:40:46.978026 tlcl_lock_nv_write: response is 0
461 07:40:46.978592 Slot A is selected
462 07:40:46.984594 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
463 07:40:46.991406 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
464 07:40:46.998022 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
465 07:40:47.005145 BS: verstage times (exec / console): total (unknown) / 256 ms
466 07:40:47.005628
467 07:40:47.006127
468 07:40:47.011520 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
469 07:40:47.015530 Google Chrome EC: version:
470 07:40:47.018932 ro: volmar_v2.0.14126-e605144e9c
471 07:40:47.021864 rw: volmar_v0.0.55-22d1557
472 07:40:47.025381 running image: 2
473 07:40:47.028748 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
474 07:40:47.038443 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
475 07:40:47.045636 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
476 07:40:47.051617 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
477 07:40:47.061808 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
478 07:40:47.071806 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
479 07:40:47.075166 EC took 941us to calculate image hash
480 07:40:47.084794 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
481 07:40:47.091199 VB2:sync_ec() select_rw=RW(active)
482 07:40:47.100331 Waited 270us to clear limit power flag.
483 07:40:47.103898 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
484 07:40:47.107094 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
485 07:40:47.110483 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
486 07:40:47.116843 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
487 07:40:47.120505 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
488 07:40:47.123922 TCO_STS: 0000 0000
489 07:40:47.127035 GEN_PMCON: d1001038 00002200
490 07:40:47.130319 GBLRST_CAUSE: 00000040 00000000
491 07:40:47.130789 HPR_CAUSE0: 00000000
492 07:40:47.133423 prev_sleep_state 5
493 07:40:47.136872 Abort disabling TXT, as CPU is not TXT capable.
494 07:40:47.142124 cse_lite: Number of partitions = 3
495 07:40:47.145990 cse_lite: Current partition = RW
496 07:40:47.149466 cse_lite: Next partition = RW
497 07:40:47.153069 cse_lite: Flags = 0x7
498 07:40:47.159494 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
499 07:40:47.166001 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
500 07:40:47.172533 FMAP: area SI_ME found @ 1000 (5238784 bytes)
501 07:40:47.179092 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
502 07:40:47.182738 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
503 07:40:47.192653 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
504 07:40:47.196148 cse_lite: CSE CBFS RW version : 16.1.25.2049
505 07:40:47.199412 Boot Count incremented to 5273
506 07:40:47.205647 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
507 07:40:47.212456 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 07:40:47.224330 Probing TPM I2C: done! DID_VID 0x00281ae0
509 07:40:47.227976 Locality already claimed
510 07:40:47.230805 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
511 07:40:47.250501 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
512 07:40:47.257068 MRC: Hash idx 0x100d comparison successful.
513 07:40:47.260570 MRC cache found, size f6c8
514 07:40:47.261093 bootmode is set to: 2
515 07:40:47.264209 EC returned error result code 3
516 07:40:47.267506 FW_CONFIG value from CBI is 0x131
517 07:40:47.274159 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
518 07:40:47.277200 SPD index = 0
519 07:40:47.283792 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
520 07:40:47.284262 SPD: module type is LPDDR4X
521 07:40:47.292172 SPD: module part number is K4U6E3S4AB-MGCL
522 07:40:47.298564 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
523 07:40:47.302029 SPD: device width 16 bits, bus width 16 bits
524 07:40:47.304959 SPD: module size is 1024 MB (per channel)
525 07:40:47.374523 CBMEM:
526 07:40:47.377862 IMD: root @ 0x76fff000 254 entries.
527 07:40:47.381182 IMD: root @ 0x76ffec00 62 entries.
528 07:40:47.388791 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
529 07:40:47.392302 RO_VPD is uninitialized or empty.
530 07:40:47.395874 FMAP: area RW_VPD found @ f29000 (8192 bytes)
531 07:40:47.402291 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
532 07:40:47.405699 External stage cache:
533 07:40:47.408935 IMD: root @ 0x7bbff000 254 entries.
534 07:40:47.411705 IMD: root @ 0x7bbfec00 62 entries.
535 07:40:47.419094 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
536 07:40:47.425510 MRC: Checking cached data update for 'RW_MRC_CACHE'.
537 07:40:47.428840 MRC: 'RW_MRC_CACHE' does not need update.
538 07:40:47.429481 8 DIMMs found
539 07:40:47.432057 SMM Memory Map
540 07:40:47.435721 SMRAM : 0x7b800000 0x800000
541 07:40:47.439206 Subregion 0: 0x7b800000 0x200000
542 07:40:47.441915 Subregion 1: 0x7ba00000 0x200000
543 07:40:47.445696 Subregion 2: 0x7bc00000 0x400000
544 07:40:47.449092 top_of_ram = 0x77000000
545 07:40:47.452336 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
546 07:40:47.459123 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
547 07:40:47.465567 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
548 07:40:47.469096 MTRR Range: Start=ff000000 End=0 (Size 1000000)
549 07:40:47.469677 Normal boot
550 07:40:47.478576 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
551 07:40:47.485208 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
552 07:40:47.492411 Processing 237 relocs. Offset value of 0x74ab9000
553 07:40:47.500087 BS: romstage times (exec / console): total (unknown) / 377 ms
554 07:40:47.507797
555 07:40:47.508357
556 07:40:47.514395 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
557 07:40:47.514972 Normal boot
558 07:40:47.521046 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
559 07:40:47.527192 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
560 07:40:47.534110 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
561 07:40:47.544013 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
562 07:40:47.591519 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
563 07:40:47.598148 Processing 5931 relocs. Offset value of 0x72a2f000
564 07:40:47.601118 BS: postcar times (exec / console): total (unknown) / 51 ms
565 07:40:47.605052
566 07:40:47.605638
567 07:40:47.611329 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
568 07:40:47.615214 Reserving BERT start 76a1e000, size 10000
569 07:40:47.618163 Normal boot
570 07:40:47.621721 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
571 07:40:47.628119 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
572 07:40:47.637934 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
573 07:40:47.641076 FMAP: area RW_VPD found @ f29000 (8192 bytes)
574 07:40:47.644615 Google Chrome EC: version:
575 07:40:47.647553 ro: volmar_v2.0.14126-e605144e9c
576 07:40:47.651398 rw: volmar_v0.0.55-22d1557
577 07:40:47.654749 running image: 2
578 07:40:47.658009 ACPI _SWS is PM1 Index 8 GPE Index -1
579 07:40:47.661032 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
580 07:40:47.665721 EC returned error result code 3
581 07:40:47.669059 FW_CONFIG value from CBI is 0x131
582 07:40:47.675768 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
583 07:40:47.678836 PCI: 00:1c.2 disabled by fw_config
584 07:40:47.685436 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
585 07:40:47.688834 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 07:40:47.695368 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
587 07:40:47.698905 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
588 07:40:47.705842 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
589 07:40:47.712270 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
590 07:40:47.719219 microcode: sig=0x906a4 pf=0x80 revision=0x423
591 07:40:47.722021 microcode: Update skipped, already up-to-date
592 07:40:47.729110 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
593 07:40:47.761562 Detected 6 core, 8 thread CPU.
594 07:40:47.765080 Setting up SMI for CPU
595 07:40:47.768241 IED base = 0x7bc00000
596 07:40:47.768718 IED size = 0x00400000
597 07:40:47.771664 Will perform SMM setup.
598 07:40:47.774787 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
599 07:40:47.778442 LAPIC 0x0 in XAPIC mode.
600 07:40:47.788393 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
601 07:40:47.791508 Processing 18 relocs. Offset value of 0x00030000
602 07:40:47.796260 Attempting to start 7 APs
603 07:40:47.799161 Waiting for 10ms after sending INIT.
604 07:40:47.812558 Waiting for SIPI to complete...
605 07:40:47.815968 done.
606 07:40:47.816440 LAPIC 0x1 in XAPIC mode.
607 07:40:47.818910 LAPIC 0x16 in XAPIC mode.
608 07:40:47.822525 Waiting for SIPI to complete...
609 07:40:47.825625 AP: slot 6 apic_id 1, MCU rev: 0x00000423
610 07:40:47.829061 LAPIC 0x14 in XAPIC mode.
611 07:40:47.829535 done.
612 07:40:47.835466 AP: slot 1 apic_id 14, MCU rev: 0x00000423
613 07:40:47.839077 AP: slot 2 apic_id 16, MCU rev: 0x00000423
614 07:40:47.842469 LAPIC 0x12 in XAPIC mode.
615 07:40:47.845504 LAPIC 0x10 in XAPIC mode.
616 07:40:47.849102 AP: slot 3 apic_id 12, MCU rev: 0x00000423
617 07:40:47.852084 AP: slot 4 apic_id 10, MCU rev: 0x00000423
618 07:40:47.855515 LAPIC 0x9 in XAPIC mode.
619 07:40:47.858998 LAPIC 0x8 in XAPIC mode.
620 07:40:47.861890 AP: slot 5 apic_id 9, MCU rev: 0x00000423
621 07:40:47.865556 AP: slot 7 apic_id 8, MCU rev: 0x00000423
622 07:40:47.868509 smm_setup_relocation_handler: enter
623 07:40:47.872209 smm_setup_relocation_handler: exit
624 07:40:47.882004 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
625 07:40:47.885317 Processing 11 relocs. Offset value of 0x00038000
626 07:40:47.892173 smm_module_setup_stub: stack_top = 0x7b804000
627 07:40:47.895273 smm_module_setup_stub: per cpu stack_size = 0x800
628 07:40:47.901816 smm_module_setup_stub: runtime.start32_offset = 0x4c
629 07:40:47.905193 smm_module_setup_stub: runtime.smm_size = 0x10000
630 07:40:47.911925 SMM Module: stub loaded at 38000. Will call 0x76a52094
631 07:40:47.915070 Installing permanent SMM handler to 0x7b800000
632 07:40:47.921987 smm_load_module: total_smm_space_needed e468, available -> 200000
633 07:40:47.931642 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
634 07:40:47.934996 Processing 255 relocs. Offset value of 0x7b9f6000
635 07:40:47.941483 smm_load_module: smram_start: 0x7b800000
636 07:40:47.945235 smm_load_module: smram_end: 7ba00000
637 07:40:47.948178 smm_load_module: handler start 0x7b9f6d5f
638 07:40:47.951779 smm_load_module: handler_size 98d0
639 07:40:47.954905 smm_load_module: fxsave_area 0x7b9ff000
640 07:40:47.958391 smm_load_module: fxsave_size 1000
641 07:40:47.961365 smm_load_module: CONFIG_MSEG_SIZE 0x0
642 07:40:47.968102 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
643 07:40:47.974610 smm_load_module: handler_mod_params.smbase = 0x7b800000
644 07:40:47.978333 smm_load_module: per_cpu_save_state_size = 0x400
645 07:40:47.981154 smm_load_module: num_cpus = 0x8
646 07:40:47.988069 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
647 07:40:47.991184 smm_load_module: total_save_state_size = 0x2000
648 07:40:47.997907 smm_load_module: cpu0 entry: 7b9e6000
649 07:40:48.001416 smm_create_map: cpus allowed in one segment 30
650 07:40:48.005338 smm_create_map: min # of segments needed 1
651 07:40:48.005814 CPU 0x0
652 07:40:48.011668 smbase 7b9e6000 entry 7b9ee000
653 07:40:48.014607 ss_start 7b9f5c00 code_end 7b9ee208
654 07:40:48.015082 CPU 0x1
655 07:40:48.018381 smbase 7b9e5c00 entry 7b9edc00
656 07:40:48.024657 ss_start 7b9f5800 code_end 7b9ede08
657 07:40:48.025189 CPU 0x2
658 07:40:48.028230 smbase 7b9e5800 entry 7b9ed800
659 07:40:48.034886 ss_start 7b9f5400 code_end 7b9eda08
660 07:40:48.035360 CPU 0x3
661 07:40:48.037911 smbase 7b9e5400 entry 7b9ed400
662 07:40:48.041469 ss_start 7b9f5000 code_end 7b9ed608
663 07:40:48.044443 CPU 0x4
664 07:40:48.047973 smbase 7b9e5000 entry 7b9ed000
665 07:40:48.051238 ss_start 7b9f4c00 code_end 7b9ed208
666 07:40:48.051692 CPU 0x5
667 07:40:48.057932 smbase 7b9e4c00 entry 7b9ecc00
668 07:40:48.061444 ss_start 7b9f4800 code_end 7b9ece08
669 07:40:48.061919 CPU 0x6
670 07:40:48.064498 smbase 7b9e4800 entry 7b9ec800
671 07:40:48.071586 ss_start 7b9f4400 code_end 7b9eca08
672 07:40:48.072061 CPU 0x7
673 07:40:48.074583 smbase 7b9e4400 entry 7b9ec400
674 07:40:48.081188 ss_start 7b9f4000 code_end 7b9ec608
675 07:40:48.087964 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
676 07:40:48.091327 Processing 11 relocs. Offset value of 0x7b9ee000
677 07:40:48.097454 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
678 07:40:48.104171 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
679 07:40:48.111204 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
680 07:40:48.118036 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
681 07:40:48.124485 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
682 07:40:48.131309 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
683 07:40:48.137898 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
684 07:40:48.141210 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
685 07:40:48.147961 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
686 07:40:48.154558 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
687 07:40:48.161069 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
688 07:40:48.167649 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
689 07:40:48.174429 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
690 07:40:48.180794 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
691 07:40:48.187584 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
692 07:40:48.191185 smm_module_setup_stub: stack_top = 0x7b804000
693 07:40:48.197567 smm_module_setup_stub: per cpu stack_size = 0x800
694 07:40:48.200477 smm_module_setup_stub: runtime.start32_offset = 0x4c
695 07:40:48.207371 smm_module_setup_stub: runtime.smm_size = 0x200000
696 07:40:48.210929 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
697 07:40:48.216055 Clearing SMI status registers
698 07:40:48.219526 SMI_STS: PM1
699 07:40:48.222611 PM1_STS: WAK PWRBTN
700 07:40:48.229520 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
701 07:40:48.233154 In relocation handler: CPU 0
702 07:40:48.236141 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
703 07:40:48.239869 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 07:40:48.242739 Relocation complete.
705 07:40:48.249313 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
706 07:40:48.252645 In relocation handler: CPU 6
707 07:40:48.256258 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
708 07:40:48.259011 Relocation complete.
709 07:40:48.266237 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
710 07:40:48.269271 In relocation handler: CPU 2
711 07:40:48.272762 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
712 07:40:48.279286 Writing SMRR. base = 0x7b800006, mask=0xff800c00
713 07:40:48.279824 Relocation complete.
714 07:40:48.285787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
715 07:40:48.289073 In relocation handler: CPU 1
716 07:40:48.292544 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
717 07:40:48.299153 Writing SMRR. base = 0x7b800006, mask=0xff800c00
718 07:40:48.302740 Relocation complete.
719 07:40:48.309253 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
720 07:40:48.312325 In relocation handler: CPU 3
721 07:40:48.315751 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
722 07:40:48.319070 Writing SMRR. base = 0x7b800006, mask=0xff800c00
723 07:40:48.322153 Relocation complete.
724 07:40:48.328863 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
725 07:40:48.332444 In relocation handler: CPU 4
726 07:40:48.335720 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
727 07:40:48.342371 Writing SMRR. base = 0x7b800006, mask=0xff800c00
728 07:40:48.342842 Relocation complete.
729 07:40:48.352088 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
730 07:40:48.352557 In relocation handler: CPU 7
731 07:40:48.359010 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
732 07:40:48.362199 Writing SMRR. base = 0x7b800006, mask=0xff800c00
733 07:40:48.365056 Relocation complete.
734 07:40:48.371917 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
735 07:40:48.375038 In relocation handler: CPU 5
736 07:40:48.378239 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
737 07:40:48.381947 Relocation complete.
738 07:40:48.382414 Initializing CPU #0
739 07:40:48.384925 CPU: vendor Intel device 906a4
740 07:40:48.391600 CPU: family 06, model 9a, stepping 04
741 07:40:48.392026 Clearing out pending MCEs
742 07:40:48.395006 cpu: energy policy set to 7
743 07:40:48.398700 Turbo is available but hidden
744 07:40:48.401838 Turbo is available and visible
745 07:40:48.405267 microcode: Update skipped, already up-to-date
746 07:40:48.408169 CPU #0 initialized
747 07:40:48.411501 Initializing CPU #6
748 07:40:48.411949 Initializing CPU #4
749 07:40:48.415135 Initializing CPU #3
750 07:40:48.418638 Initializing CPU #1
751 07:40:48.419108 Initializing CPU #2
752 07:40:48.421479 CPU: vendor Intel device 906a4
753 07:40:48.424860 CPU: family 06, model 9a, stepping 04
754 07:40:48.428302 CPU: vendor Intel device 906a4
755 07:40:48.431786 CPU: family 06, model 9a, stepping 04
756 07:40:48.434692 Initializing CPU #7
757 07:40:48.438531 Clearing out pending MCEs
758 07:40:48.441478 CPU: vendor Intel device 906a4
759 07:40:48.445030 CPU: family 06, model 9a, stepping 04
760 07:40:48.448508 CPU: vendor Intel device 906a4
761 07:40:48.451596 CPU: family 06, model 9a, stepping 04
762 07:40:48.454887 Clearing out pending MCEs
763 07:40:48.458204 cpu: energy policy set to 7
764 07:40:48.458672 Initializing CPU #5
765 07:40:48.464638 microcode: Update skipped, already up-to-date
766 07:40:48.465180 CPU #1 initialized
767 07:40:48.468246 CPU: vendor Intel device 906a4
768 07:40:48.471740 CPU: family 06, model 9a, stepping 04
769 07:40:48.474975 cpu: energy policy set to 7
770 07:40:48.478327 Clearing out pending MCEs
771 07:40:48.481386 Clearing out pending MCEs
772 07:40:48.481812 Clearing out pending MCEs
773 07:40:48.484717 cpu: energy policy set to 7
774 07:40:48.491703 microcode: Update skipped, already up-to-date
775 07:40:48.492124 CPU #2 initialized
776 07:40:48.495126 cpu: energy policy set to 7
777 07:40:48.498663 microcode: Update skipped, already up-to-date
778 07:40:48.501382 CPU #4 initialized
779 07:40:48.504882 microcode: Update skipped, already up-to-date
780 07:40:48.508171 CPU #3 initialized
781 07:40:48.511857 cpu: energy policy set to 7
782 07:40:48.515035 CPU: vendor Intel device 906a4
783 07:40:48.518502 CPU: family 06, model 9a, stepping 04
784 07:40:48.521450 CPU: vendor Intel device 906a4
785 07:40:48.524748 CPU: family 06, model 9a, stepping 04
786 07:40:48.528131 Clearing out pending MCEs
787 07:40:48.531486 Clearing out pending MCEs
788 07:40:48.532048 cpu: energy policy set to 7
789 07:40:48.534476 cpu: energy policy set to 7
790 07:40:48.541479 microcode: Update skipped, already up-to-date
791 07:40:48.541995 CPU #6 initialized
792 07:40:48.548128 microcode: Update skipped, already up-to-date
793 07:40:48.548555 CPU #7 initialized
794 07:40:48.554813 microcode: Update skipped, already up-to-date
795 07:40:48.555242 CPU #5 initialized
796 07:40:48.557850 bsp_do_flight_plan done after 724 msecs.
797 07:40:48.561658 CPU: frequency set to 4400 MHz
798 07:40:48.564765 Enabling SMIs.
799 07:40:48.571075 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
800 07:40:48.586802 Probing TPM I2C: done! DID_VID 0x00281ae0
801 07:40:48.589932 Locality already claimed
802 07:40:48.593178 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
803 07:40:48.604814 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
804 07:40:48.608017 Enabling GPIO PM b/c CR50 has long IRQ pulse support
805 07:40:48.614533 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
806 07:40:48.621519 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
807 07:40:48.624960 Found a VBT of 9216 bytes after decompression
808 07:40:48.627830 PCI 1.0, PIN A, using IRQ #16
809 07:40:48.631287 PCI 2.0, PIN A, using IRQ #17
810 07:40:48.634727 PCI 4.0, PIN A, using IRQ #18
811 07:40:48.638122 PCI 5.0, PIN A, using IRQ #16
812 07:40:48.641497 PCI 6.0, PIN A, using IRQ #16
813 07:40:48.644933 PCI 6.2, PIN C, using IRQ #18
814 07:40:48.647986 PCI 7.0, PIN A, using IRQ #19
815 07:40:48.651516 PCI 7.1, PIN B, using IRQ #20
816 07:40:48.654800 PCI 7.2, PIN C, using IRQ #21
817 07:40:48.657912 PCI 7.3, PIN D, using IRQ #22
818 07:40:48.661079 PCI 8.0, PIN A, using IRQ #23
819 07:40:48.664571 PCI D.0, PIN A, using IRQ #17
820 07:40:48.667638 PCI D.1, PIN B, using IRQ #19
821 07:40:48.670996 PCI 10.0, PIN A, using IRQ #24
822 07:40:48.671428 PCI 10.1, PIN B, using IRQ #25
823 07:40:48.674418 PCI 10.6, PIN C, using IRQ #20
824 07:40:48.677799 PCI 10.7, PIN D, using IRQ #21
825 07:40:48.680938 PCI 11.0, PIN A, using IRQ #26
826 07:40:48.684247 PCI 11.1, PIN B, using IRQ #27
827 07:40:48.687466 PCI 11.2, PIN C, using IRQ #28
828 07:40:48.691189 PCI 11.3, PIN D, using IRQ #29
829 07:40:48.694523 PCI 12.0, PIN A, using IRQ #30
830 07:40:48.697540 PCI 12.6, PIN B, using IRQ #31
831 07:40:48.701025 PCI 12.7, PIN C, using IRQ #22
832 07:40:48.704098 PCI 13.0, PIN A, using IRQ #32
833 07:40:48.707518 PCI 13.1, PIN B, using IRQ #33
834 07:40:48.711074 PCI 13.2, PIN C, using IRQ #34
835 07:40:48.714144 PCI 13.3, PIN D, using IRQ #35
836 07:40:48.717428 PCI 14.0, PIN B, using IRQ #23
837 07:40:48.720952 PCI 14.1, PIN A, using IRQ #36
838 07:40:48.723847 PCI 14.3, PIN C, using IRQ #17
839 07:40:48.724273 PCI 15.0, PIN A, using IRQ #37
840 07:40:48.727376 PCI 15.1, PIN B, using IRQ #38
841 07:40:48.730843 PCI 15.2, PIN C, using IRQ #39
842 07:40:48.734013 PCI 15.3, PIN D, using IRQ #40
843 07:40:48.737292 PCI 16.0, PIN A, using IRQ #18
844 07:40:48.740434 PCI 16.1, PIN B, using IRQ #19
845 07:40:48.743658 PCI 16.2, PIN C, using IRQ #20
846 07:40:48.747386 PCI 16.3, PIN D, using IRQ #21
847 07:40:48.750813 PCI 16.4, PIN A, using IRQ #18
848 07:40:48.753886 PCI 16.5, PIN B, using IRQ #19
849 07:40:48.757350 PCI 17.0, PIN A, using IRQ #22
850 07:40:48.760321 PCI 19.0, PIN A, using IRQ #41
851 07:40:48.764072 PCI 19.1, PIN B, using IRQ #42
852 07:40:48.767202 PCI 19.2, PIN C, using IRQ #43
853 07:40:48.770284 PCI 1C.0, PIN A, using IRQ #16
854 07:40:48.773877 PCI 1C.1, PIN B, using IRQ #17
855 07:40:48.777406 PCI 1C.2, PIN C, using IRQ #18
856 07:40:48.777861 PCI 1C.3, PIN D, using IRQ #19
857 07:40:48.780305 PCI 1C.4, PIN A, using IRQ #16
858 07:40:48.783877 PCI 1C.5, PIN B, using IRQ #17
859 07:40:48.786835 PCI 1C.6, PIN C, using IRQ #18
860 07:40:48.790542 PCI 1C.7, PIN D, using IRQ #19
861 07:40:48.793608 PCI 1D.0, PIN A, using IRQ #16
862 07:40:48.797179 PCI 1D.1, PIN B, using IRQ #17
863 07:40:48.800085 PCI 1D.2, PIN C, using IRQ #18
864 07:40:48.803774 PCI 1D.3, PIN D, using IRQ #19
865 07:40:48.807252 PCI 1E.0, PIN A, using IRQ #23
866 07:40:48.810329 PCI 1E.1, PIN B, using IRQ #20
867 07:40:48.813935 PCI 1E.2, PIN C, using IRQ #44
868 07:40:48.816925 PCI 1E.3, PIN D, using IRQ #45
869 07:40:48.820531 PCI 1F.3, PIN B, using IRQ #22
870 07:40:48.823482 PCI 1F.4, PIN C, using IRQ #23
871 07:40:48.826935 PCI 1F.6, PIN D, using IRQ #20
872 07:40:48.830321 PCI 1F.7, PIN A, using IRQ #21
873 07:40:48.833715 IRQ: Using dynamically assigned PCI IO-APIC IRQs
874 07:40:48.840100 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
875 07:40:49.016643 FSPS returned 0
876 07:40:49.019885 Executing Phase 1 of FspMultiPhaseSiInit
877 07:40:49.029420 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
878 07:40:49.032927 port C0 DISC req: usage 1 usb3 1 usb2 1
879 07:40:49.035972 Raw Buffer output 0 00000111
880 07:40:49.039479 Raw Buffer output 1 00000000
881 07:40:49.043020 pmc_send_ipc_cmd succeeded
882 07:40:49.049850 port C1 DISC req: usage 1 usb3 3 usb2 3
883 07:40:49.049934 Raw Buffer output 0 00000331
884 07:40:49.052910 Raw Buffer output 1 00000000
885 07:40:49.057247 pmc_send_ipc_cmd succeeded
886 07:40:49.060926 Detected 6 core, 8 thread CPU.
887 07:40:49.064323 Detected 6 core, 8 thread CPU.
888 07:40:49.069541 Detected 6 core, 8 thread CPU.
889 07:40:49.072956 Detected 6 core, 8 thread CPU.
890 07:40:49.076460 Detected 6 core, 8 thread CPU.
891 07:40:49.079501 Detected 6 core, 8 thread CPU.
892 07:40:49.083226 Detected 6 core, 8 thread CPU.
893 07:40:49.086297 Detected 6 core, 8 thread CPU.
894 07:40:49.089604 Detected 6 core, 8 thread CPU.
895 07:40:49.092833 Detected 6 core, 8 thread CPU.
896 07:40:49.096075 Detected 6 core, 8 thread CPU.
897 07:40:49.099354 Detected 6 core, 8 thread CPU.
898 07:40:49.103031 Detected 6 core, 8 thread CPU.
899 07:40:49.106030 Detected 6 core, 8 thread CPU.
900 07:40:49.109469 Detected 6 core, 8 thread CPU.
901 07:40:49.113019 Detected 6 core, 8 thread CPU.
902 07:40:49.115990 Detected 6 core, 8 thread CPU.
903 07:40:49.119830 Detected 6 core, 8 thread CPU.
904 07:40:49.122838 Detected 6 core, 8 thread CPU.
905 07:40:49.126546 Detected 6 core, 8 thread CPU.
906 07:40:49.129483 Detected 6 core, 8 thread CPU.
907 07:40:49.132427 Detected 6 core, 8 thread CPU.
908 07:40:49.422042 Detected 6 core, 8 thread CPU.
909 07:40:49.425481 Detected 6 core, 8 thread CPU.
910 07:40:49.428640 Detected 6 core, 8 thread CPU.
911 07:40:49.431947 Detected 6 core, 8 thread CPU.
912 07:40:49.435339 Detected 6 core, 8 thread CPU.
913 07:40:49.438703 Detected 6 core, 8 thread CPU.
914 07:40:49.441805 Detected 6 core, 8 thread CPU.
915 07:40:49.445652 Detected 6 core, 8 thread CPU.
916 07:40:49.448526 Detected 6 core, 8 thread CPU.
917 07:40:49.452120 Detected 6 core, 8 thread CPU.
918 07:40:49.455212 Detected 6 core, 8 thread CPU.
919 07:40:49.458880 Detected 6 core, 8 thread CPU.
920 07:40:49.461830 Detected 6 core, 8 thread CPU.
921 07:40:49.465337 Detected 6 core, 8 thread CPU.
922 07:40:49.468420 Detected 6 core, 8 thread CPU.
923 07:40:49.471974 Detected 6 core, 8 thread CPU.
924 07:40:49.475360 Detected 6 core, 8 thread CPU.
925 07:40:49.478475 Detected 6 core, 8 thread CPU.
926 07:40:49.482000 Detected 6 core, 8 thread CPU.
927 07:40:49.485132 Detected 6 core, 8 thread CPU.
928 07:40:49.488634 Display FSP Version Info HOB
929 07:40:49.491680 Reference Code - CPU = c.0.65.70
930 07:40:49.491764 uCode Version = 0.0.4.23
931 07:40:49.495220 TXT ACM version = ff.ff.ff.ffff
932 07:40:49.498194 Reference Code - ME = c.0.65.70
933 07:40:49.501500 MEBx version = 0.0.0.0
934 07:40:49.504563 ME Firmware Version = Lite SKU
935 07:40:49.507910 Reference Code - PCH = c.0.65.70
936 07:40:49.511355 PCH-CRID Status = Disabled
937 07:40:49.514850 PCH-CRID Original Value = ff.ff.ff.ffff
938 07:40:49.517987 PCH-CRID New Value = ff.ff.ff.ffff
939 07:40:49.521530 OPROM - RST - RAID = ff.ff.ff.ffff
940 07:40:49.524574 PCH Hsio Version = 4.0.0.0
941 07:40:49.528295 Reference Code - SA - System Agent = c.0.65.70
942 07:40:49.531301 Reference Code - MRC = 0.0.3.80
943 07:40:49.534770 SA - PCIe Version = c.0.65.70
944 07:40:49.538181 SA-CRID Status = Disabled
945 07:40:49.541574 SA-CRID Original Value = 0.0.0.4
946 07:40:49.544811 SA-CRID New Value = 0.0.0.4
947 07:40:49.547853 OPROM - VBIOS = ff.ff.ff.ffff
948 07:40:49.551419 IO Manageability Engine FW Version = 24.0.4.0
949 07:40:49.554806 PHY Build Version = 0.0.0.2016
950 07:40:49.557972 Thunderbolt(TM) FW Version = 0.0.0.0
951 07:40:49.564698 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
952 07:40:49.571466 BS: BS_DEV_INIT_CHIPS run times (exec / console): 487 / 507 ms
953 07:40:49.574583 Enumerating buses...
954 07:40:49.577972 Show all devs... Before device enumeration.
955 07:40:49.581333 Root Device: enabled 1
956 07:40:49.584428 CPU_CLUSTER: 0: enabled 1
957 07:40:49.584511 DOMAIN: 0000: enabled 1
958 07:40:49.587956 GPIO: 0: enabled 1
959 07:40:49.591514 PCI: 00:00.0: enabled 1
960 07:40:49.591597 PCI: 00:01.0: enabled 0
961 07:40:49.594489 PCI: 00:01.1: enabled 0
962 07:40:49.598063 PCI: 00:02.0: enabled 1
963 07:40:49.601511 PCI: 00:04.0: enabled 1
964 07:40:49.601594 PCI: 00:05.0: enabled 0
965 07:40:49.604486 PCI: 00:06.0: enabled 1
966 07:40:49.607779 PCI: 00:06.2: enabled 0
967 07:40:49.607862 PCI: 00:07.0: enabled 0
968 07:40:49.611216 PCI: 00:07.1: enabled 0
969 07:40:49.614703 PCI: 00:07.2: enabled 0
970 07:40:49.617755 PCI: 00:07.3: enabled 0
971 07:40:49.617837 PCI: 00:08.0: enabled 0
972 07:40:49.621296 PCI: 00:09.0: enabled 0
973 07:40:49.624316 PCI: 00:0a.0: enabled 1
974 07:40:49.627898 PCI: 00:0d.0: enabled 1
975 07:40:49.627982 PCI: 00:0d.1: enabled 0
976 07:40:49.631306 PCI: 00:0d.2: enabled 0
977 07:40:49.634757 PCI: 00:0d.3: enabled 0
978 07:40:49.637662 PCI: 00:0e.0: enabled 0
979 07:40:49.637744 PCI: 00:10.0: enabled 0
980 07:40:49.641264 PCI: 00:10.1: enabled 0
981 07:40:49.644299 PCI: 00:10.6: enabled 0
982 07:40:49.644382 PCI: 00:10.7: enabled 0
983 07:40:49.647795 PCI: 00:12.0: enabled 0
984 07:40:49.650877 PCI: 00:12.6: enabled 0
985 07:40:49.654534 PCI: 00:12.7: enabled 0
986 07:40:49.654616 PCI: 00:13.0: enabled 0
987 07:40:49.657996 PCI: 00:14.0: enabled 1
988 07:40:49.661002 PCI: 00:14.1: enabled 0
989 07:40:49.664201 PCI: 00:14.2: enabled 1
990 07:40:49.664284 PCI: 00:14.3: enabled 1
991 07:40:49.667907 PCI: 00:15.0: enabled 1
992 07:40:49.671203 PCI: 00:15.1: enabled 1
993 07:40:49.674187 PCI: 00:15.2: enabled 0
994 07:40:49.674270 PCI: 00:15.3: enabled 1
995 07:40:49.677465 PCI: 00:16.0: enabled 1
996 07:40:49.680950 PCI: 00:16.1: enabled 0
997 07:40:49.684213 PCI: 00:16.2: enabled 0
998 07:40:49.684297 PCI: 00:16.3: enabled 0
999 07:40:49.687970 PCI: 00:16.4: enabled 0
1000 07:40:49.691008 PCI: 00:16.5: enabled 0
1001 07:40:49.691090 PCI: 00:17.0: enabled 1
1002 07:40:49.694248 PCI: 00:19.0: enabled 0
1003 07:40:49.697422 PCI: 00:19.1: enabled 1
1004 07:40:49.701045 PCI: 00:19.2: enabled 0
1005 07:40:49.701128 PCI: 00:1a.0: enabled 0
1006 07:40:49.704086 PCI: 00:1c.0: enabled 0
1007 07:40:49.707735 PCI: 00:1c.1: enabled 0
1008 07:40:49.711094 PCI: 00:1c.2: enabled 0
1009 07:40:49.711177 PCI: 00:1c.3: enabled 0
1010 07:40:49.714075 PCI: 00:1c.4: enabled 0
1011 07:40:49.717397 PCI: 00:1c.5: enabled 0
1012 07:40:49.720916 PCI: 00:1c.6: enabled 0
1013 07:40:49.721054 PCI: 00:1c.7: enabled 0
1014 07:40:49.724019 PCI: 00:1d.0: enabled 0
1015 07:40:49.727492 PCI: 00:1d.1: enabled 0
1016 07:40:49.727575 PCI: 00:1d.2: enabled 0
1017 07:40:49.730577 PCI: 00:1d.3: enabled 0
1018 07:40:49.734015 PCI: 00:1e.0: enabled 1
1019 07:40:49.737290 PCI: 00:1e.1: enabled 0
1020 07:40:49.737373 PCI: 00:1e.2: enabled 0
1021 07:40:49.740888 PCI: 00:1e.3: enabled 1
1022 07:40:49.743905 PCI: 00:1f.0: enabled 1
1023 07:40:49.747512 PCI: 00:1f.1: enabled 0
1024 07:40:49.747596 PCI: 00:1f.2: enabled 1
1025 07:40:49.750488 PCI: 00:1f.3: enabled 1
1026 07:40:49.754018 PCI: 00:1f.4: enabled 0
1027 07:40:49.757583 PCI: 00:1f.5: enabled 1
1028 07:40:49.757665 PCI: 00:1f.6: enabled 0
1029 07:40:49.760524 PCI: 00:1f.7: enabled 0
1030 07:40:49.764080 GENERIC: 0.0: enabled 1
1031 07:40:49.767095 GENERIC: 0.0: enabled 1
1032 07:40:49.767178 GENERIC: 1.0: enabled 1
1033 07:40:49.770824 GENERIC: 0.0: enabled 1
1034 07:40:49.774135 GENERIC: 1.0: enabled 1
1035 07:40:49.774218 USB0 port 0: enabled 1
1036 07:40:49.777231 USB0 port 0: enabled 1
1037 07:40:49.780740 GENERIC: 0.0: enabled 1
1038 07:40:49.783825 I2C: 00:1a: enabled 1
1039 07:40:49.783924 I2C: 00:31: enabled 1
1040 07:40:49.787426 I2C: 00:32: enabled 1
1041 07:40:49.790444 I2C: 00:50: enabled 1
1042 07:40:49.790531 I2C: 00:10: enabled 1
1043 07:40:49.793968 I2C: 00:15: enabled 1
1044 07:40:49.797276 I2C: 00:2c: enabled 1
1045 07:40:49.797358 GENERIC: 0.0: enabled 1
1046 07:40:49.800452 SPI: 00: enabled 1
1047 07:40:49.803776 PNP: 0c09.0: enabled 1
1048 07:40:49.803859 GENERIC: 0.0: enabled 1
1049 07:40:49.807069 USB3 port 0: enabled 1
1050 07:40:49.810424 USB3 port 1: enabled 0
1051 07:40:49.810506 USB3 port 2: enabled 1
1052 07:40:49.813785 USB3 port 3: enabled 0
1053 07:40:49.817167 USB2 port 0: enabled 1
1054 07:40:49.820428 USB2 port 1: enabled 0
1055 07:40:49.820511 USB2 port 2: enabled 1
1056 07:40:49.823605 USB2 port 3: enabled 0
1057 07:40:49.826949 USB2 port 4: enabled 0
1058 07:40:49.827079 USB2 port 5: enabled 1
1059 07:40:49.830326 USB2 port 6: enabled 0
1060 07:40:49.833804 USB2 port 7: enabled 0
1061 07:40:49.833887 USB2 port 8: enabled 1
1062 07:40:49.837210 USB2 port 9: enabled 1
1063 07:40:49.840732 USB3 port 0: enabled 1
1064 07:40:49.844169 USB3 port 1: enabled 0
1065 07:40:49.844252 USB3 port 2: enabled 0
1066 07:40:49.847146 USB3 port 3: enabled 0
1067 07:40:49.850707 GENERIC: 0.0: enabled 1
1068 07:40:49.850789 GENERIC: 1.0: enabled 1
1069 07:40:49.853761 APIC: 00: enabled 1
1070 07:40:49.857468 APIC: 14: enabled 1
1071 07:40:49.857550 APIC: 16: enabled 1
1072 07:40:49.860584 APIC: 12: enabled 1
1073 07:40:49.864097 APIC: 10: enabled 1
1074 07:40:49.864179 APIC: 09: enabled 1
1075 07:40:49.867211 APIC: 01: enabled 1
1076 07:40:49.867293 APIC: 08: enabled 1
1077 07:40:49.870234 Compare with tree...
1078 07:40:49.873676 Root Device: enabled 1
1079 07:40:49.877174 CPU_CLUSTER: 0: enabled 1
1080 07:40:49.877257 APIC: 00: enabled 1
1081 07:40:49.880308 APIC: 14: enabled 1
1082 07:40:49.883837 APIC: 16: enabled 1
1083 07:40:49.883920 APIC: 12: enabled 1
1084 07:40:49.886891 APIC: 10: enabled 1
1085 07:40:49.890532 APIC: 09: enabled 1
1086 07:40:49.890629 APIC: 01: enabled 1
1087 07:40:49.893509 APIC: 08: enabled 1
1088 07:40:49.896942 DOMAIN: 0000: enabled 1
1089 07:40:49.897069 GPIO: 0: enabled 1
1090 07:40:49.900216 PCI: 00:00.0: enabled 1
1091 07:40:49.903525 PCI: 00:01.0: enabled 0
1092 07:40:49.907101 PCI: 00:01.1: enabled 0
1093 07:40:49.910167 PCI: 00:02.0: enabled 1
1094 07:40:49.910253 PCI: 00:04.0: enabled 1
1095 07:40:49.913812 GENERIC: 0.0: enabled 1
1096 07:40:49.916752 PCI: 00:05.0: enabled 0
1097 07:40:49.920181 PCI: 00:06.0: enabled 1
1098 07:40:49.923608 PCI: 00:06.2: enabled 0
1099 07:40:49.923696 PCI: 00:08.0: enabled 0
1100 07:40:49.926824 PCI: 00:09.0: enabled 0
1101 07:40:49.930123 PCI: 00:0a.0: enabled 1
1102 07:40:49.933374 PCI: 00:0d.0: enabled 1
1103 07:40:49.936921 USB0 port 0: enabled 1
1104 07:40:49.937043 USB3 port 0: enabled 1
1105 07:40:49.940294 USB3 port 1: enabled 0
1106 07:40:49.943456 USB3 port 2: enabled 1
1107 07:40:49.946662 USB3 port 3: enabled 0
1108 07:40:49.949990 PCI: 00:0d.1: enabled 0
1109 07:40:49.950074 PCI: 00:0d.2: enabled 0
1110 07:40:49.953653 PCI: 00:0d.3: enabled 0
1111 07:40:49.956933 PCI: 00:0e.0: enabled 0
1112 07:40:49.960317 PCI: 00:10.0: enabled 0
1113 07:40:49.963894 PCI: 00:10.1: enabled 0
1114 07:40:49.964078 PCI: 00:10.6: enabled 0
1115 07:40:49.966912 PCI: 00:10.7: enabled 0
1116 07:40:49.970111 PCI: 00:12.0: enabled 0
1117 07:40:49.973600 PCI: 00:12.6: enabled 0
1118 07:40:49.977223 PCI: 00:12.7: enabled 0
1119 07:40:49.977461 PCI: 00:13.0: enabled 0
1120 07:40:49.980511 PCI: 00:14.0: enabled 1
1121 07:40:49.983754 USB0 port 0: enabled 1
1122 07:40:49.987103 USB2 port 0: enabled 1
1123 07:40:49.990132 USB2 port 1: enabled 0
1124 07:40:49.990358 USB2 port 2: enabled 1
1125 07:40:49.993958 USB2 port 3: enabled 0
1126 07:40:49.996804 USB2 port 4: enabled 0
1127 07:40:50.000297 USB2 port 5: enabled 1
1128 07:40:50.003417 USB2 port 6: enabled 0
1129 07:40:50.007150 USB2 port 7: enabled 0
1130 07:40:50.007643 USB2 port 8: enabled 1
1131 07:40:50.010566 USB2 port 9: enabled 1
1132 07:40:50.013561 USB3 port 0: enabled 1
1133 07:40:50.017280 USB3 port 1: enabled 0
1134 07:40:50.020553 USB3 port 2: enabled 0
1135 07:40:50.024070 USB3 port 3: enabled 0
1136 07:40:50.024585 PCI: 00:14.1: enabled 0
1137 07:40:50.026960 PCI: 00:14.2: enabled 1
1138 07:40:50.030372 PCI: 00:14.3: enabled 1
1139 07:40:50.033784 GENERIC: 0.0: enabled 1
1140 07:40:50.034289 PCI: 00:15.0: enabled 1
1141 07:40:50.037468 I2C: 00:1a: enabled 1
1142 07:40:50.040733 I2C: 00:31: enabled 1
1143 07:40:50.044263 I2C: 00:32: enabled 1
1144 07:40:50.047595 PCI: 00:15.1: enabled 1
1145 07:40:50.048163 I2C: 00:50: enabled 1
1146 07:40:50.050999 PCI: 00:15.2: enabled 0
1147 07:40:50.053922 PCI: 00:15.3: enabled 1
1148 07:40:50.057501 I2C: 00:10: enabled 1
1149 07:40:50.058095 PCI: 00:16.0: enabled 1
1150 07:40:50.060309 PCI: 00:16.1: enabled 0
1151 07:40:50.064067 PCI: 00:16.2: enabled 0
1152 07:40:50.067214 PCI: 00:16.3: enabled 0
1153 07:40:50.070360 PCI: 00:16.4: enabled 0
1154 07:40:50.070829 PCI: 00:16.5: enabled 0
1155 07:40:50.074182 PCI: 00:17.0: enabled 1
1156 07:40:50.076958 PCI: 00:19.0: enabled 0
1157 07:40:50.080917 PCI: 00:19.1: enabled 1
1158 07:40:50.083984 I2C: 00:15: enabled 1
1159 07:40:50.084627 I2C: 00:2c: enabled 1
1160 07:40:50.087310 PCI: 00:19.2: enabled 0
1161 07:40:50.090348 PCI: 00:1a.0: enabled 0
1162 07:40:50.094042 PCI: 00:1e.0: enabled 1
1163 07:40:50.097047 PCI: 00:1e.1: enabled 0
1164 07:40:50.097615 PCI: 00:1e.2: enabled 0
1165 07:40:50.100063 PCI: 00:1e.3: enabled 1
1166 07:40:50.103489 SPI: 00: enabled 1
1167 07:40:50.107090 PCI: 00:1f.0: enabled 1
1168 07:40:50.107652 PNP: 0c09.0: enabled 1
1169 07:40:50.110059 PCI: 00:1f.1: enabled 0
1170 07:40:50.113504 PCI: 00:1f.2: enabled 1
1171 07:40:50.116892 GENERIC: 0.0: enabled 1
1172 07:40:50.120081 GENERIC: 0.0: enabled 1
1173 07:40:50.123507 GENERIC: 1.0: enabled 1
1174 07:40:50.124037 PCI: 00:1f.3: enabled 1
1175 07:40:50.126968 PCI: 00:1f.4: enabled 0
1176 07:40:50.130007 PCI: 00:1f.5: enabled 1
1177 07:40:50.133598 PCI: 00:1f.6: enabled 0
1178 07:40:50.134127 PCI: 00:1f.7: enabled 0
1179 07:40:50.137082 Root Device scanning...
1180 07:40:50.140205 scan_static_bus for Root Device
1181 07:40:50.143389 CPU_CLUSTER: 0 enabled
1182 07:40:50.147011 DOMAIN: 0000 enabled
1183 07:40:50.147482 DOMAIN: 0000 scanning...
1184 07:40:50.149886 PCI: pci_scan_bus for bus 00
1185 07:40:50.153506 PCI: 00:00.0 [8086/0000] ops
1186 07:40:50.157013 PCI: 00:00.0 [8086/4609] enabled
1187 07:40:50.159986 PCI: 00:02.0 [8086/0000] bus ops
1188 07:40:50.163886 PCI: 00:02.0 [8086/46b3] enabled
1189 07:40:50.167054 PCI: 00:04.0 [8086/0000] bus ops
1190 07:40:50.170513 PCI: 00:04.0 [8086/461d] enabled
1191 07:40:50.173504 PCI: 00:06.0 [8086/0000] bus ops
1192 07:40:50.176942 PCI: 00:06.0 [8086/464d] enabled
1193 07:40:50.180103 PCI: 00:08.0 [8086/464f] disabled
1194 07:40:50.183998 PCI: 00:0a.0 [8086/467d] enabled
1195 07:40:50.187025 PCI: 00:0d.0 [8086/0000] bus ops
1196 07:40:50.190585 PCI: 00:0d.0 [8086/461e] enabled
1197 07:40:50.193642 PCI: 00:14.0 [8086/0000] bus ops
1198 07:40:50.197200 PCI: 00:14.0 [8086/51ed] enabled
1199 07:40:50.200156 PCI: 00:14.2 [8086/51ef] enabled
1200 07:40:50.203400 PCI: 00:14.3 [8086/0000] bus ops
1201 07:40:50.206886 PCI: 00:14.3 [8086/51f0] enabled
1202 07:40:50.210338 PCI: 00:15.0 [8086/0000] bus ops
1203 07:40:50.213527 PCI: 00:15.0 [8086/51e8] enabled
1204 07:40:50.217165 PCI: 00:15.1 [8086/0000] bus ops
1205 07:40:50.220320 PCI: 00:15.1 [8086/51e9] enabled
1206 07:40:50.223820 PCI: 00:15.2 [8086/0000] bus ops
1207 07:40:50.227051 PCI: 00:15.2 [8086/51ea] disabled
1208 07:40:50.230083 PCI: 00:15.3 [8086/0000] bus ops
1209 07:40:50.233709 PCI: 00:15.3 [8086/51eb] enabled
1210 07:40:50.237095 PCI: 00:16.0 [8086/0000] ops
1211 07:40:50.240170 PCI: 00:16.0 [8086/51e0] enabled
1212 07:40:50.246903 PCI: Static device PCI: 00:17.0 not found, disabling it.
1213 07:40:50.250197 PCI: 00:19.0 [8086/0000] bus ops
1214 07:40:50.253722 PCI: 00:19.0 [8086/51c5] disabled
1215 07:40:50.256588 PCI: 00:19.1 [8086/0000] bus ops
1216 07:40:50.260244 PCI: 00:19.1 [8086/51c6] enabled
1217 07:40:50.263821 PCI: 00:1e.0 [8086/0000] ops
1218 07:40:50.266815 PCI: 00:1e.0 [8086/51a8] enabled
1219 07:40:50.270088 PCI: 00:1e.3 [8086/0000] bus ops
1220 07:40:50.273759 PCI: 00:1e.3 [8086/51ab] enabled
1221 07:40:50.276734 PCI: 00:1f.0 [8086/0000] bus ops
1222 07:40:50.280499 PCI: 00:1f.0 [8086/5182] enabled
1223 07:40:50.283260 RTC Init
1224 07:40:50.286284 Set power on after power failure.
1225 07:40:50.286371 Disabling Deep S3
1226 07:40:50.289795 Disabling Deep S3
1227 07:40:50.289878 Disabling Deep S4
1228 07:40:50.292833 Disabling Deep S4
1229 07:40:50.296172 Disabling Deep S5
1230 07:40:50.296255 Disabling Deep S5
1231 07:40:50.299753 PCI: 00:1f.2 [0000/0000] hidden
1232 07:40:50.302878 PCI: 00:1f.3 [8086/0000] bus ops
1233 07:40:50.306633 PCI: 00:1f.3 [8086/51c8] enabled
1234 07:40:50.309508 PCI: 00:1f.5 [8086/0000] bus ops
1235 07:40:50.313085 PCI: 00:1f.5 [8086/51a4] enabled
1236 07:40:50.316474 GPIO: 0 enabled
1237 07:40:50.319585 PCI: Leftover static devices:
1238 07:40:50.319720 PCI: 00:01.0
1239 07:40:50.319836 PCI: 00:01.1
1240 07:40:50.323470 PCI: 00:05.0
1241 07:40:50.324075 PCI: 00:06.2
1242 07:40:50.327048 PCI: 00:09.0
1243 07:40:50.327517 PCI: 00:0d.1
1244 07:40:50.327886 PCI: 00:0d.2
1245 07:40:50.329968 PCI: 00:0d.3
1246 07:40:50.330436 PCI: 00:0e.0
1247 07:40:50.333556 PCI: 00:10.0
1248 07:40:50.334022 PCI: 00:10.1
1249 07:40:50.334391 PCI: 00:10.6
1250 07:40:50.336559 PCI: 00:10.7
1251 07:40:50.337062 PCI: 00:12.0
1252 07:40:50.340189 PCI: 00:12.6
1253 07:40:50.340739 PCI: 00:12.7
1254 07:40:50.343718 PCI: 00:13.0
1255 07:40:50.344273 PCI: 00:14.1
1256 07:40:50.344645 PCI: 00:16.1
1257 07:40:50.346993 PCI: 00:16.2
1258 07:40:50.347459 PCI: 00:16.3
1259 07:40:50.349908 PCI: 00:16.4
1260 07:40:50.350402 PCI: 00:16.5
1261 07:40:50.350773 PCI: 00:17.0
1262 07:40:50.353281 PCI: 00:19.2
1263 07:40:50.353751 PCI: 00:1a.0
1264 07:40:50.356682 PCI: 00:1e.1
1265 07:40:50.357184 PCI: 00:1e.2
1266 07:40:50.357556 PCI: 00:1f.1
1267 07:40:50.360050 PCI: 00:1f.4
1268 07:40:50.360563 PCI: 00:1f.6
1269 07:40:50.363493 PCI: 00:1f.7
1270 07:40:50.366480 PCI: Check your devicetree.cb.
1271 07:40:50.367011 PCI: 00:02.0 scanning...
1272 07:40:50.370245 scan_generic_bus for PCI: 00:02.0
1273 07:40:50.376354 scan_generic_bus for PCI: 00:02.0 done
1274 07:40:50.379968 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1275 07:40:50.382959 PCI: 00:04.0 scanning...
1276 07:40:50.386462 scan_generic_bus for PCI: 00:04.0
1277 07:40:50.387038 GENERIC: 0.0 enabled
1278 07:40:50.393041 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1279 07:40:50.399951 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1280 07:40:50.400451 PCI: 00:06.0 scanning...
1281 07:40:50.406248 do_pci_scan_bridge for PCI: 00:06.0
1282 07:40:50.406717 PCI: pci_scan_bus for bus 01
1283 07:40:50.409880 PCI: 01:00.0 [15b7/5009] enabled
1284 07:40:50.416171 Enabling Common Clock Configuration
1285 07:40:50.419464 L1 Sub-State supported from root port 6
1286 07:40:50.423245 L1 Sub-State Support = 0x5
1287 07:40:50.426649 CommonModeRestoreTime = 0x6e
1288 07:40:50.429519 Power On Value = 0x5, Power On Scale = 0x2
1289 07:40:50.429985 ASPM: Enabled L1
1290 07:40:50.436158 PCIe: Max_Payload_Size adjusted to 256
1291 07:40:50.436631 PCI: 01:00.0: Enabled LTR
1292 07:40:50.443197 PCI: 01:00.0: Programmed LTR max latencies
1293 07:40:50.446256 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1294 07:40:50.449748 PCI: 00:0d.0 scanning...
1295 07:40:50.453154 scan_static_bus for PCI: 00:0d.0
1296 07:40:50.453696 USB0 port 0 enabled
1297 07:40:50.456321 USB0 port 0 scanning...
1298 07:40:50.460089 scan_static_bus for USB0 port 0
1299 07:40:50.463100 USB3 port 0 enabled
1300 07:40:50.463567 USB3 port 1 disabled
1301 07:40:50.466227 USB3 port 2 enabled
1302 07:40:50.469510 USB3 port 3 disabled
1303 07:40:50.469977 USB3 port 0 scanning...
1304 07:40:50.473104 scan_static_bus for USB3 port 0
1305 07:40:50.476328 scan_static_bus for USB3 port 0 done
1306 07:40:50.483215 scan_bus: bus USB3 port 0 finished in 6 msecs
1307 07:40:50.486169 USB3 port 2 scanning...
1308 07:40:50.489957 scan_static_bus for USB3 port 2
1309 07:40:50.492937 scan_static_bus for USB3 port 2 done
1310 07:40:50.496423 scan_bus: bus USB3 port 2 finished in 6 msecs
1311 07:40:50.499322 scan_static_bus for USB0 port 0 done
1312 07:40:50.506538 scan_bus: bus USB0 port 0 finished in 43 msecs
1313 07:40:50.509511 scan_static_bus for PCI: 00:0d.0 done
1314 07:40:50.513505 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1315 07:40:50.515947 PCI: 00:14.0 scanning...
1316 07:40:50.519424 scan_static_bus for PCI: 00:14.0
1317 07:40:50.522897 USB0 port 0 enabled
1318 07:40:50.523451 USB0 port 0 scanning...
1319 07:40:50.526233 scan_static_bus for USB0 port 0
1320 07:40:50.529360 USB2 port 0 enabled
1321 07:40:50.532921 USB2 port 1 disabled
1322 07:40:50.533440 USB2 port 2 enabled
1323 07:40:50.536424 USB2 port 3 disabled
1324 07:40:50.536849 USB2 port 4 disabled
1325 07:40:50.539559 USB2 port 5 enabled
1326 07:40:50.542647 USB2 port 6 disabled
1327 07:40:50.543073 USB2 port 7 disabled
1328 07:40:50.545952 USB2 port 8 enabled
1329 07:40:50.549377 USB2 port 9 enabled
1330 07:40:50.550004 USB3 port 0 enabled
1331 07:40:50.553191 USB3 port 1 disabled
1332 07:40:50.553753 USB3 port 2 disabled
1333 07:40:50.556259 USB3 port 3 disabled
1334 07:40:50.559297 USB2 port 0 scanning...
1335 07:40:50.562741 scan_static_bus for USB2 port 0
1336 07:40:50.566163 scan_static_bus for USB2 port 0 done
1337 07:40:50.569490 scan_bus: bus USB2 port 0 finished in 6 msecs
1338 07:40:50.572475 USB2 port 2 scanning...
1339 07:40:50.576015 scan_static_bus for USB2 port 2
1340 07:40:50.579613 scan_static_bus for USB2 port 2 done
1341 07:40:50.586169 scan_bus: bus USB2 port 2 finished in 6 msecs
1342 07:40:50.586600 USB2 port 5 scanning...
1343 07:40:50.589086 scan_static_bus for USB2 port 5
1344 07:40:50.592655 scan_static_bus for USB2 port 5 done
1345 07:40:50.599161 scan_bus: bus USB2 port 5 finished in 6 msecs
1346 07:40:50.599729 USB2 port 8 scanning...
1347 07:40:50.602677 scan_static_bus for USB2 port 8
1348 07:40:50.609428 scan_static_bus for USB2 port 8 done
1349 07:40:50.612378 scan_bus: bus USB2 port 8 finished in 6 msecs
1350 07:40:50.615990 USB2 port 9 scanning...
1351 07:40:50.618972 scan_static_bus for USB2 port 9
1352 07:40:50.622524 scan_static_bus for USB2 port 9 done
1353 07:40:50.626173 scan_bus: bus USB2 port 9 finished in 6 msecs
1354 07:40:50.629151 USB3 port 0 scanning...
1355 07:40:50.632402 scan_static_bus for USB3 port 0
1356 07:40:50.636089 scan_static_bus for USB3 port 0 done
1357 07:40:50.639415 scan_bus: bus USB3 port 0 finished in 6 msecs
1358 07:40:50.642830 scan_static_bus for USB0 port 0 done
1359 07:40:50.649092 scan_bus: bus USB0 port 0 finished in 120 msecs
1360 07:40:50.652535 scan_static_bus for PCI: 00:14.0 done
1361 07:40:50.659079 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1362 07:40:50.659552 PCI: 00:14.3 scanning...
1363 07:40:50.662467 scan_static_bus for PCI: 00:14.3
1364 07:40:50.665645 GENERIC: 0.0 enabled
1365 07:40:50.668869 scan_static_bus for PCI: 00:14.3 done
1366 07:40:50.675607 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1367 07:40:50.676075 PCI: 00:15.0 scanning...
1368 07:40:50.679117 scan_static_bus for PCI: 00:15.0
1369 07:40:50.682909 I2C: 00:1a enabled
1370 07:40:50.683477 I2C: 00:31 enabled
1371 07:40:50.685734 I2C: 00:32 enabled
1372 07:40:50.688771 scan_static_bus for PCI: 00:15.0 done
1373 07:40:50.695734 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1374 07:40:50.696316 PCI: 00:15.1 scanning...
1375 07:40:50.699030 scan_static_bus for PCI: 00:15.1
1376 07:40:50.702323 I2C: 00:50 enabled
1377 07:40:50.705721 scan_static_bus for PCI: 00:15.1 done
1378 07:40:50.712103 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1379 07:40:50.712661 PCI: 00:15.3 scanning...
1380 07:40:50.716024 scan_static_bus for PCI: 00:15.3
1381 07:40:50.718715 I2C: 00:10 enabled
1382 07:40:50.722145 scan_static_bus for PCI: 00:15.3 done
1383 07:40:50.725280 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1384 07:40:50.728855 PCI: 00:19.1 scanning...
1385 07:40:50.732319 scan_static_bus for PCI: 00:19.1
1386 07:40:50.735651 I2C: 00:15 enabled
1387 07:40:50.736117 I2C: 00:2c enabled
1388 07:40:50.742100 scan_static_bus for PCI: 00:19.1 done
1389 07:40:50.745309 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1390 07:40:50.748841 PCI: 00:1e.3 scanning...
1391 07:40:50.751857 scan_generic_bus for PCI: 00:1e.3
1392 07:40:50.752323 SPI: 00 enabled
1393 07:40:50.758885 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1394 07:40:50.765379 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1395 07:40:50.765850 PCI: 00:1f.0 scanning...
1396 07:40:50.768913 scan_static_bus for PCI: 00:1f.0
1397 07:40:50.772224 PNP: 0c09.0 enabled
1398 07:40:50.775249 PNP: 0c09.0 scanning...
1399 07:40:50.778753 scan_static_bus for PNP: 0c09.0
1400 07:40:50.781927 scan_static_bus for PNP: 0c09.0 done
1401 07:40:50.785364 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1402 07:40:50.788428 scan_static_bus for PCI: 00:1f.0 done
1403 07:40:50.795073 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1404 07:40:50.795542 PCI: 00:1f.2 scanning...
1405 07:40:50.798621 scan_static_bus for PCI: 00:1f.2
1406 07:40:50.801684 GENERIC: 0.0 enabled
1407 07:40:50.805107 GENERIC: 0.0 scanning...
1408 07:40:50.808262 scan_static_bus for GENERIC: 0.0
1409 07:40:50.811747 GENERIC: 0.0 enabled
1410 07:40:50.812213 GENERIC: 1.0 enabled
1411 07:40:50.815178 scan_static_bus for GENERIC: 0.0 done
1412 07:40:50.821766 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1413 07:40:50.825159 scan_static_bus for PCI: 00:1f.2 done
1414 07:40:50.828394 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1415 07:40:50.831887 PCI: 00:1f.3 scanning...
1416 07:40:50.834858 scan_static_bus for PCI: 00:1f.3
1417 07:40:50.838593 scan_static_bus for PCI: 00:1f.3 done
1418 07:40:50.844764 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1419 07:40:50.845325 PCI: 00:1f.5 scanning...
1420 07:40:50.848117 scan_generic_bus for PCI: 00:1f.5
1421 07:40:50.854982 scan_generic_bus for PCI: 00:1f.5 done
1422 07:40:50.858540 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1423 07:40:50.865043 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1424 07:40:50.868454 scan_static_bus for Root Device done
1425 07:40:50.871491 scan_bus: bus Root Device finished in 729 msecs
1426 07:40:50.871965 done
1427 07:40:50.878158 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1428 07:40:50.885026 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1429 07:40:50.891442 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1430 07:40:50.894883 SPI flash protection: WPSW=1 SRP0=0
1431 07:40:50.898174 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1432 07:40:50.905006 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1433 07:40:50.908209 found VGA at PCI: 00:02.0
1434 07:40:50.911901 Setting up VGA for PCI: 00:02.0
1435 07:40:50.915145 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1436 07:40:50.921666 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1437 07:40:50.922125 Allocating resources...
1438 07:40:50.925138 Reading resources...
1439 07:40:50.928322 Root Device read_resources bus 0 link: 0
1440 07:40:50.934933 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1441 07:40:50.937992 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1442 07:40:50.941439 DOMAIN: 0000 read_resources bus 0 link: 0
1443 07:40:50.948228 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1444 07:40:50.954866 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1445 07:40:50.961515 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1446 07:40:50.968030 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1447 07:40:50.974960 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1448 07:40:50.981640 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1449 07:40:50.988365 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1450 07:40:50.994633 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1451 07:40:50.997623 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1452 07:40:51.007469 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1453 07:40:51.011043 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1454 07:40:51.017896 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1455 07:40:51.024271 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1456 07:40:51.030742 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1457 07:40:51.037545 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1458 07:40:51.044201 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1459 07:40:51.051126 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1460 07:40:51.057700 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1461 07:40:51.064078 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1462 07:40:51.067745 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1463 07:40:51.074106 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1464 07:40:51.081131 PCI: 00:04.0 read_resources bus 1 link: 0
1465 07:40:51.084195 PCI: 00:04.0 read_resources bus 1 link: 0 done
1466 07:40:51.087380 PCI: 00:06.0 read_resources bus 1 link: 0
1467 07:40:51.094150 PCI: 00:06.0 read_resources bus 1 link: 0 done
1468 07:40:51.097642 PCI: 00:0d.0 read_resources bus 0 link: 0
1469 07:40:51.101062 USB0 port 0 read_resources bus 0 link: 0
1470 07:40:51.107458 USB0 port 0 read_resources bus 0 link: 0 done
1471 07:40:51.110712 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1472 07:40:51.114298 PCI: 00:14.0 read_resources bus 0 link: 0
1473 07:40:51.117611 USB0 port 0 read_resources bus 0 link: 0
1474 07:40:51.124365 USB0 port 0 read_resources bus 0 link: 0 done
1475 07:40:51.127520 PCI: 00:14.0 read_resources bus 0 link: 0 done
1476 07:40:51.134272 PCI: 00:14.3 read_resources bus 0 link: 0
1477 07:40:51.137567 PCI: 00:14.3 read_resources bus 0 link: 0 done
1478 07:40:51.140549 PCI: 00:15.0 read_resources bus 0 link: 0
1479 07:40:51.147355 PCI: 00:15.0 read_resources bus 0 link: 0 done
1480 07:40:51.151012 PCI: 00:15.1 read_resources bus 0 link: 0
1481 07:40:51.154060 PCI: 00:15.1 read_resources bus 0 link: 0 done
1482 07:40:51.160896 PCI: 00:15.3 read_resources bus 0 link: 0
1483 07:40:51.163686 PCI: 00:15.3 read_resources bus 0 link: 0 done
1484 07:40:51.170374 PCI: 00:19.1 read_resources bus 0 link: 0
1485 07:40:51.174127 PCI: 00:19.1 read_resources bus 0 link: 0 done
1486 07:40:51.177238 PCI: 00:1e.3 read_resources bus 2 link: 0
1487 07:40:51.183790 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1488 07:40:51.187295 PCI: 00:1f.0 read_resources bus 0 link: 0
1489 07:40:51.190340 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1490 07:40:51.197406 PCI: 00:1f.2 read_resources bus 0 link: 0
1491 07:40:51.200742 GENERIC: 0.0 read_resources bus 0 link: 0
1492 07:40:51.203754 GENERIC: 0.0 read_resources bus 0 link: 0 done
1493 07:40:51.210399 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1494 07:40:51.213604 DOMAIN: 0000 read_resources bus 0 link: 0 done
1495 07:40:51.220580 Root Device read_resources bus 0 link: 0 done
1496 07:40:51.221049 Done reading resources.
1497 07:40:51.227287 Show resources in subtree (Root Device)...After reading.
1498 07:40:51.230427 Root Device child on link 0 CPU_CLUSTER: 0
1499 07:40:51.236998 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 07:40:51.237457 APIC: 00
1501 07:40:51.237851 APIC: 14
1502 07:40:51.240456 APIC: 16
1503 07:40:51.241083 APIC: 12
1504 07:40:51.243832 APIC: 10
1505 07:40:51.244437 APIC: 09
1506 07:40:51.244787 APIC: 01
1507 07:40:51.247214 APIC: 08
1508 07:40:51.250326 DOMAIN: 0000 child on link 0 GPIO: 0
1509 07:40:51.260257 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1510 07:40:51.270658 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1511 07:40:51.271163 GPIO: 0
1512 07:40:51.271649 PCI: 00:00.0
1513 07:40:51.280694 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1514 07:40:51.290442 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1515 07:40:51.300432 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1516 07:40:51.310199 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1517 07:40:51.320348 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1518 07:40:51.326628 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1519 07:40:51.336799 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1520 07:40:51.346878 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1521 07:40:51.356667 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1522 07:40:51.366740 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1523 07:40:51.376707 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1524 07:40:51.386913 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1525 07:40:51.393010 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1526 07:40:51.402671 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1527 07:40:51.412715 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1528 07:40:51.422863 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1529 07:40:51.432843 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1530 07:40:51.443013 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1531 07:40:51.452582 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1532 07:40:51.462642 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1533 07:40:51.469142 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1534 07:40:51.479521 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1535 07:40:51.489088 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1536 07:40:51.499209 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1537 07:40:51.509010 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1538 07:40:51.519351 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1539 07:40:51.528950 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1540 07:40:51.535473 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1541 07:40:51.538833 PCI: 00:02.0
1542 07:40:51.548895 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1543 07:40:51.558908 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1544 07:40:51.568825 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1545 07:40:51.572191 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1546 07:40:51.582090 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1547 07:40:51.585306 GENERIC: 0.0
1548 07:40:51.588625 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1549 07:40:51.598683 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1550 07:40:51.608610 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1551 07:40:51.615170 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1552 07:40:51.618732 PCI: 01:00.0
1553 07:40:51.628859 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 07:40:51.638643 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1555 07:40:51.638721 PCI: 00:08.0
1556 07:40:51.641928 PCI: 00:0a.0
1557 07:40:51.652075 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1558 07:40:51.655515 PCI: 00:0d.0 child on link 0 USB0 port 0
1559 07:40:51.665423 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1560 07:40:51.668891 USB0 port 0 child on link 0 USB3 port 0
1561 07:40:51.671803 USB3 port 0
1562 07:40:51.675076 USB3 port 1
1563 07:40:51.675159 USB3 port 2
1564 07:40:51.678711 USB3 port 3
1565 07:40:51.681672 PCI: 00:14.0 child on link 0 USB0 port 0
1566 07:40:51.691643 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1567 07:40:51.695196 USB0 port 0 child on link 0 USB2 port 0
1568 07:40:51.698603 USB2 port 0
1569 07:40:51.698687 USB2 port 1
1570 07:40:51.701860 USB2 port 2
1571 07:40:51.701943 USB2 port 3
1572 07:40:51.704837 USB2 port 4
1573 07:40:51.704920 USB2 port 5
1574 07:40:51.708472 USB2 port 6
1575 07:40:51.711502 USB2 port 7
1576 07:40:51.711585 USB2 port 8
1577 07:40:51.715029 USB2 port 9
1578 07:40:51.715111 USB3 port 0
1579 07:40:51.718129 USB3 port 1
1580 07:40:51.718211 USB3 port 2
1581 07:40:51.721587 USB3 port 3
1582 07:40:51.721670 PCI: 00:14.2
1583 07:40:51.731819 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1584 07:40:51.741624 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1585 07:40:51.748143 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1586 07:40:51.758001 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1587 07:40:51.758080 GENERIC: 0.0
1588 07:40:51.761450 PCI: 00:15.0 child on link 0 I2C: 00:1a
1589 07:40:51.771082 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1590 07:40:51.774597 I2C: 00:1a
1591 07:40:51.774670 I2C: 00:31
1592 07:40:51.777783 I2C: 00:32
1593 07:40:51.781091 PCI: 00:15.1 child on link 0 I2C: 00:50
1594 07:40:51.791104 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1595 07:40:51.794783 I2C: 00:50
1596 07:40:51.794855 PCI: 00:15.2
1597 07:40:51.798109 PCI: 00:15.3 child on link 0 I2C: 00:10
1598 07:40:51.807878 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1599 07:40:51.811409 I2C: 00:10
1600 07:40:51.811485 PCI: 00:16.0
1601 07:40:51.821000 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 07:40:51.824592 PCI: 00:19.0
1603 07:40:51.827987 PCI: 00:19.1 child on link 0 I2C: 00:15
1604 07:40:51.838008 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1605 07:40:51.841097 I2C: 00:15
1606 07:40:51.841224 I2C: 00:2c
1607 07:40:51.844501 PCI: 00:1e.0
1608 07:40:51.854458 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1609 07:40:51.858264 PCI: 00:1e.3 child on link 0 SPI: 00
1610 07:40:51.867806 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1611 07:40:51.871231 SPI: 00
1612 07:40:51.874869 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1613 07:40:51.881115 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1614 07:40:51.884510 PNP: 0c09.0
1615 07:40:51.894698 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1616 07:40:51.897897 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1617 07:40:51.908070 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1618 07:40:51.918087 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1619 07:40:51.921261 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1620 07:40:51.924668 GENERIC: 0.0
1621 07:40:51.925123 GENERIC: 1.0
1622 07:40:51.927669 PCI: 00:1f.3
1623 07:40:51.938201 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1624 07:40:51.948137 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1625 07:40:51.948580 PCI: 00:1f.5
1626 07:40:51.957748 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1627 07:40:51.964703 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1628 07:40:51.971364 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1629 07:40:51.977627 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1630 07:40:51.981094 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1631 07:40:51.987611 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1632 07:40:51.990893 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1633 07:40:51.997757 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1634 07:40:52.004352 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1635 07:40:52.014756 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1636 07:40:52.020899 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1637 07:40:52.028069 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1638 07:40:52.034400 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1639 07:40:52.040608 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1640 07:40:52.051238 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1641 07:40:52.054698 DOMAIN: 0000: Resource ranges:
1642 07:40:52.057352 * Base: 1000, Size: 800, Tag: 100
1643 07:40:52.061199 * Base: 1900, Size: e700, Tag: 100
1644 07:40:52.063982 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1645 07:40:52.071433 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1646 07:40:52.077926 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1647 07:40:52.087843 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1648 07:40:52.094028 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1649 07:40:52.100417 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1650 07:40:52.110529 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1651 07:40:52.117150 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1652 07:40:52.123912 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1653 07:40:52.133805 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1654 07:40:52.140501 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1655 07:40:52.147526 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1656 07:40:52.157084 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1657 07:40:52.163623 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1658 07:40:52.170070 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1659 07:40:52.180214 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1660 07:40:52.186571 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1661 07:40:52.193393 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1662 07:40:52.203092 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1663 07:40:52.209944 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1664 07:40:52.216458 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1665 07:40:52.226619 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1666 07:40:52.233294 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1667 07:40:52.239814 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1668 07:40:52.247087 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1669 07:40:52.256475 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1670 07:40:52.263680 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1671 07:40:52.270036 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1672 07:40:52.279801 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1673 07:40:52.286440 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1674 07:40:52.292941 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1675 07:40:52.303045 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1676 07:40:52.309820 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1677 07:40:52.313224 DOMAIN: 0000: Resource ranges:
1678 07:40:52.316651 * Base: 80400000, Size: 3fc00000, Tag: 200
1679 07:40:52.323176 * Base: d0000000, Size: 28000000, Tag: 200
1680 07:40:52.326369 * Base: fa000000, Size: 1000000, Tag: 200
1681 07:40:52.329894 * Base: fb001000, Size: 17ff000, Tag: 200
1682 07:40:52.336278 * Base: fe800000, Size: 300000, Tag: 200
1683 07:40:52.339678 * Base: feb80000, Size: 80000, Tag: 200
1684 07:40:52.342861 * Base: fed00000, Size: 40000, Tag: 200
1685 07:40:52.346000 * Base: fed70000, Size: 10000, Tag: 200
1686 07:40:52.349563 * Base: fed88000, Size: 8000, Tag: 200
1687 07:40:52.356290 * Base: fed93000, Size: d000, Tag: 200
1688 07:40:52.359435 * Base: feda2000, Size: 1e000, Tag: 200
1689 07:40:52.363018 * Base: fede0000, Size: 1220000, Tag: 200
1690 07:40:52.369466 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1691 07:40:52.376105 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1692 07:40:52.382560 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1693 07:40:52.389163 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1694 07:40:52.395997 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1695 07:40:52.402386 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1696 07:40:52.409085 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1697 07:40:52.415614 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1698 07:40:52.422334 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1699 07:40:52.429104 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1700 07:40:52.435872 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1701 07:40:52.442274 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1702 07:40:52.449186 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1703 07:40:52.455728 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1704 07:40:52.462340 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1705 07:40:52.469089 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1706 07:40:52.475401 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1707 07:40:52.481836 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1708 07:40:52.488873 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1709 07:40:52.495355 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1710 07:40:52.501994 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1711 07:40:52.508564 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1712 07:40:52.511622 PCI: 00:06.0: Resource ranges:
1713 07:40:52.518705 * Base: 80400000, Size: 100000, Tag: 200
1714 07:40:52.525077 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1715 07:40:52.531614 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1716 07:40:52.538371 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1717 07:40:52.545112 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1718 07:40:52.551893 Root Device assign_resources, bus 0 link: 0
1719 07:40:52.554992 DOMAIN: 0000 assign_resources, bus 0 link: 0
1720 07:40:52.564625 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1721 07:40:52.571307 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1722 07:40:52.578002 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1723 07:40:52.587843 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1724 07:40:52.591282 PCI: 00:04.0 assign_resources, bus 1 link: 0
1725 07:40:52.597665 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1726 07:40:52.604192 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1727 07:40:52.614247 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1728 07:40:52.624244 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1729 07:40:52.627676 PCI: 00:06.0 assign_resources, bus 1 link: 0
1730 07:40:52.637404 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1731 07:40:52.643852 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1732 07:40:52.647491 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1733 07:40:52.657502 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1734 07:40:52.664178 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1735 07:40:52.670507 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1736 07:40:52.674073 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1737 07:40:52.683984 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1738 07:40:52.687472 PCI: 00:14.0 assign_resources, bus 0 link: 0
1739 07:40:52.691004 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1740 07:40:52.700779 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1741 07:40:52.707494 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1742 07:40:52.717580 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1743 07:40:52.720560 PCI: 00:14.3 assign_resources, bus 0 link: 0
1744 07:40:52.727312 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1745 07:40:52.734281 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1746 07:40:52.737378 PCI: 00:15.0 assign_resources, bus 0 link: 0
1747 07:40:52.743880 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1748 07:40:52.750285 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1749 07:40:52.757336 PCI: 00:15.1 assign_resources, bus 0 link: 0
1750 07:40:52.760320 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1751 07:40:52.767509 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1752 07:40:52.773676 PCI: 00:15.3 assign_resources, bus 0 link: 0
1753 07:40:52.777124 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1754 07:40:52.787539 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1755 07:40:52.793584 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1756 07:40:52.800545 PCI: 00:19.1 assign_resources, bus 0 link: 0
1757 07:40:52.803755 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1758 07:40:52.810237 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1759 07:40:52.816929 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1760 07:40:52.820526 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1761 07:40:52.826955 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1762 07:40:52.830068 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1763 07:40:52.836847 LPC: Trying to open IO window from 800 size 1ff
1764 07:40:52.843477 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1765 07:40:52.850102 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1766 07:40:52.859802 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1767 07:40:52.863410 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1768 07:40:52.870345 Root Device assign_resources, bus 0 link: 0 done
1769 07:40:52.870935 Done setting resources.
1770 07:40:52.876756 Show resources in subtree (Root Device)...After assigning values.
1771 07:40:52.883435 Root Device child on link 0 CPU_CLUSTER: 0
1772 07:40:52.886948 CPU_CLUSTER: 0 child on link 0 APIC: 00
1773 07:40:52.887417 APIC: 00
1774 07:40:52.889783 APIC: 14
1775 07:40:52.890247 APIC: 16
1776 07:40:52.893247 APIC: 12
1777 07:40:52.893711 APIC: 10
1778 07:40:52.894078 APIC: 09
1779 07:40:52.896661 APIC: 01
1780 07:40:52.897231 APIC: 08
1781 07:40:52.899878 DOMAIN: 0000 child on link 0 GPIO: 0
1782 07:40:52.910176 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1783 07:40:52.919957 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1784 07:40:52.920420 GPIO: 0
1785 07:40:52.923088 PCI: 00:00.0
1786 07:40:52.933217 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1787 07:40:52.942915 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1788 07:40:52.949748 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1789 07:40:52.959474 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1790 07:40:52.969533 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1791 07:40:52.979009 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1792 07:40:52.989369 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1793 07:40:52.999207 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1794 07:40:53.008956 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1795 07:40:53.018932 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1796 07:40:53.025697 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1797 07:40:53.035526 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1798 07:40:53.045381 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1799 07:40:53.055301 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1800 07:40:53.065294 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1801 07:40:53.075188 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1802 07:40:53.081880 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1803 07:40:53.092214 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1804 07:40:53.101816 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1805 07:40:53.111748 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1806 07:40:53.121604 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1807 07:40:53.131363 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1808 07:40:53.141188 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1809 07:40:53.151236 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1810 07:40:53.161475 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1811 07:40:53.168333 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1812 07:40:53.177849 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1813 07:40:53.188010 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1814 07:40:53.191270 PCI: 00:02.0
1815 07:40:53.201104 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1816 07:40:53.211303 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1817 07:40:53.220848 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1818 07:40:53.224369 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1819 07:40:53.234197 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1820 07:40:53.237603 GENERIC: 0.0
1821 07:40:53.241418 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1822 07:40:53.250700 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1823 07:40:53.264360 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1824 07:40:53.273967 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1825 07:40:53.274442 PCI: 01:00.0
1826 07:40:53.284302 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1827 07:40:53.293832 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1828 07:40:53.297108 PCI: 00:08.0
1829 07:40:53.297569 PCI: 00:0a.0
1830 07:40:53.310739 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1831 07:40:53.314096 PCI: 00:0d.0 child on link 0 USB0 port 0
1832 07:40:53.324213 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1833 07:40:53.327212 USB0 port 0 child on link 0 USB3 port 0
1834 07:40:53.330607 USB3 port 0
1835 07:40:53.331158 USB3 port 1
1836 07:40:53.333566 USB3 port 2
1837 07:40:53.337259 USB3 port 3
1838 07:40:53.340328 PCI: 00:14.0 child on link 0 USB0 port 0
1839 07:40:53.350179 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1840 07:40:53.353695 USB0 port 0 child on link 0 USB2 port 0
1841 07:40:53.357046 USB2 port 0
1842 07:40:53.357554 USB2 port 1
1843 07:40:53.360476 USB2 port 2
1844 07:40:53.360946 USB2 port 3
1845 07:40:53.363804 USB2 port 4
1846 07:40:53.367043 USB2 port 5
1847 07:40:53.367579 USB2 port 6
1848 07:40:53.370266 USB2 port 7
1849 07:40:53.370737 USB2 port 8
1850 07:40:53.373622 USB2 port 9
1851 07:40:53.374117 USB3 port 0
1852 07:40:53.377265 USB3 port 1
1853 07:40:53.377824 USB3 port 2
1854 07:40:53.380423 USB3 port 3
1855 07:40:53.381031 PCI: 00:14.2
1856 07:40:53.390317 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1857 07:40:53.400218 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1858 07:40:53.407087 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1859 07:40:53.417216 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1860 07:40:53.417783 GENERIC: 0.0
1861 07:40:53.423677 PCI: 00:15.0 child on link 0 I2C: 00:1a
1862 07:40:53.433461 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1863 07:40:53.434018 I2C: 00:1a
1864 07:40:53.437091 I2C: 00:31
1865 07:40:53.437645 I2C: 00:32
1866 07:40:53.443311 PCI: 00:15.1 child on link 0 I2C: 00:50
1867 07:40:53.453421 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1868 07:40:53.453942 I2C: 00:50
1869 07:40:53.455999 PCI: 00:15.2
1870 07:40:53.459277 PCI: 00:15.3 child on link 0 I2C: 00:10
1871 07:40:53.469266 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1872 07:40:53.473132 I2C: 00:10
1873 07:40:53.473592 PCI: 00:16.0
1874 07:40:53.483596 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1875 07:40:53.486978 PCI: 00:19.0
1876 07:40:53.490034 PCI: 00:19.1 child on link 0 I2C: 00:15
1877 07:40:53.499647 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1878 07:40:53.503163 I2C: 00:15
1879 07:40:53.503721 I2C: 00:2c
1880 07:40:53.506335 PCI: 00:1e.0
1881 07:40:53.516208 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1882 07:40:53.519684 PCI: 00:1e.3 child on link 0 SPI: 00
1883 07:40:53.529398 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1884 07:40:53.532629 SPI: 00
1885 07:40:53.536182 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1886 07:40:53.546454 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1887 07:40:53.547023 PNP: 0c09.0
1888 07:40:53.556238 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1889 07:40:53.559533 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1890 07:40:53.569667 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1891 07:40:53.579575 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1892 07:40:53.583019 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1893 07:40:53.586123 GENERIC: 0.0
1894 07:40:53.586580 GENERIC: 1.0
1895 07:40:53.589092 PCI: 00:1f.3
1896 07:40:53.599314 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1897 07:40:53.609123 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1898 07:40:53.612605 PCI: 00:1f.5
1899 07:40:53.622613 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1900 07:40:53.623292 Done allocating resources.
1901 07:40:53.629222 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1902 07:40:53.635706 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1903 07:40:53.638856 Configure audio over I2S with MAX98373 NAU88L25B.
1904 07:40:53.644806 Enabling BT offload
1905 07:40:53.652459 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1906 07:40:53.655529 Enabling resources...
1907 07:40:53.658983 PCI: 00:00.0 subsystem <- 8086/4609
1908 07:40:53.661910 PCI: 00:00.0 cmd <- 06
1909 07:40:53.665682 PCI: 00:02.0 subsystem <- 8086/46b3
1910 07:40:53.668935 PCI: 00:02.0 cmd <- 03
1911 07:40:53.672143 PCI: 00:04.0 subsystem <- 8086/461d
1912 07:40:53.672605 PCI: 00:04.0 cmd <- 02
1913 07:40:53.675571 PCI: 00:06.0 bridge ctrl <- 0013
1914 07:40:53.678917 PCI: 00:06.0 subsystem <- 8086/464d
1915 07:40:53.682538 PCI: 00:06.0 cmd <- 106
1916 07:40:53.685522 PCI: 00:0a.0 subsystem <- 8086/467d
1917 07:40:53.688795 PCI: 00:0a.0 cmd <- 02
1918 07:40:53.692396 PCI: 00:0d.0 subsystem <- 8086/461e
1919 07:40:53.695883 PCI: 00:0d.0 cmd <- 02
1920 07:40:53.698767 PCI: 00:14.0 subsystem <- 8086/51ed
1921 07:40:53.702057 PCI: 00:14.0 cmd <- 02
1922 07:40:53.705693 PCI: 00:14.2 subsystem <- 8086/51ef
1923 07:40:53.706263 PCI: 00:14.2 cmd <- 02
1924 07:40:53.708810 PCI: 00:14.3 subsystem <- 8086/51f0
1925 07:40:53.712215 PCI: 00:14.3 cmd <- 02
1926 07:40:53.715905 PCI: 00:15.0 subsystem <- 8086/51e8
1927 07:40:53.718635 PCI: 00:15.0 cmd <- 02
1928 07:40:53.722108 PCI: 00:15.1 subsystem <- 8086/51e9
1929 07:40:53.725894 PCI: 00:15.1 cmd <- 06
1930 07:40:53.728718 PCI: 00:15.3 subsystem <- 8086/51eb
1931 07:40:53.732193 PCI: 00:15.3 cmd <- 02
1932 07:40:53.735241 PCI: 00:16.0 subsystem <- 8086/51e0
1933 07:40:53.735325 PCI: 00:16.0 cmd <- 02
1934 07:40:53.738139 PCI: 00:19.1 subsystem <- 8086/51c6
1935 07:40:53.741646 PCI: 00:19.1 cmd <- 02
1936 07:40:53.745252 PCI: 00:1e.0 subsystem <- 8086/51a8
1937 07:40:53.748250 PCI: 00:1e.0 cmd <- 06
1938 07:40:53.751809 PCI: 00:1e.3 subsystem <- 8086/51ab
1939 07:40:53.755566 PCI: 00:1e.3 cmd <- 02
1940 07:40:53.758582 PCI: 00:1f.0 subsystem <- 8086/5182
1941 07:40:53.761987 PCI: 00:1f.0 cmd <- 407
1942 07:40:53.765311 PCI: 00:1f.3 subsystem <- 8086/51c8
1943 07:40:53.765527 PCI: 00:1f.3 cmd <- 02
1944 07:40:53.768702 PCI: 00:1f.5 subsystem <- 8086/51a4
1945 07:40:53.771793 PCI: 00:1f.5 cmd <- 406
1946 07:40:53.774863 PCI: 01:00.0 cmd <- 02
1947 07:40:53.775098 done.
1948 07:40:53.781495 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1949 07:40:53.785272 ME: Version: Unavailable
1950 07:40:53.788719 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1951 07:40:53.791760 Initializing devices...
1952 07:40:53.794975 Root Device init
1953 07:40:53.795459 mainboard: EC init
1954 07:40:53.801915 Chrome EC: Set SMI mask to 0x0000000000000000
1955 07:40:53.805218 Chrome EC: UHEPI supported
1956 07:40:53.808375 Chrome EC: clear events_b mask to 0x0000000000000000
1957 07:40:53.815337 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1958 07:40:53.821582 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1959 07:40:53.828411 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1960 07:40:53.831531 Chrome EC: Set WAKE mask to 0x0000000000000000
1961 07:40:53.838430 Root Device init finished in 39 msecs
1962 07:40:53.839143 PCI: 00:00.0 init
1963 07:40:53.841555 CPU TDP = 15 Watts
1964 07:40:53.844952 CPU PL1 = 15 Watts
1965 07:40:53.845454 CPU PL2 = 55 Watts
1966 07:40:53.848287 CPU PL4 = 123 Watts
1967 07:40:53.851788 PCI: 00:00.0 init finished in 8 msecs
1968 07:40:53.855014 PCI: 00:02.0 init
1969 07:40:53.855570 GMA: Found VBT in CBFS
1970 07:40:53.858190 GMA: Found valid VBT in CBFS
1971 07:40:53.864746 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1972 07:40:53.871683 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1973 07:40:53.874621 PCI: 00:02.0 init finished in 18 msecs
1974 07:40:53.878053 PCI: 00:06.0 init
1975 07:40:53.881319 Initializing PCH PCIe bridge.
1976 07:40:53.885080 PCI: 00:06.0 init finished in 3 msecs
1977 07:40:53.887972 PCI: 00:0a.0 init
1978 07:40:53.891316 PCI: 00:0a.0 init finished in 0 msecs
1979 07:40:53.891777 PCI: 00:14.0 init
1980 07:40:53.894682 PCI: 00:14.0 init finished in 0 msecs
1981 07:40:53.898049 PCI: 00:14.2 init
1982 07:40:53.901385 PCI: 00:14.2 init finished in 0 msecs
1983 07:40:53.904761 PCI: 00:15.0 init
1984 07:40:53.907763 I2C bus 0 version 0x3230302a
1985 07:40:53.911068 DW I2C bus 0 at 0x80655000 (400 KHz)
1986 07:40:53.914196 PCI: 00:15.0 init finished in 6 msecs
1987 07:40:53.914353 PCI: 00:15.1 init
1988 07:40:53.917709 I2C bus 1 version 0x3230302a
1989 07:40:53.921077 DW I2C bus 1 at 0x80656000 (400 KHz)
1990 07:40:53.927521 PCI: 00:15.1 init finished in 6 msecs
1991 07:40:53.927639 PCI: 00:15.3 init
1992 07:40:53.930904 I2C bus 3 version 0x3230302a
1993 07:40:53.934247 DW I2C bus 3 at 0x80657000 (400 KHz)
1994 07:40:53.937236 PCI: 00:15.3 init finished in 6 msecs
1995 07:40:53.940857 PCI: 00:16.0 init
1996 07:40:53.943975 PCI: 00:16.0 init finished in 0 msecs
1997 07:40:53.947550 PCI: 00:19.1 init
1998 07:40:53.947634 I2C bus 5 version 0x3230302a
1999 07:40:53.953862 DW I2C bus 5 at 0x80659000 (400 KHz)
2000 07:40:53.957209 PCI: 00:19.1 init finished in 6 msecs
2001 07:40:53.957292 PCI: 00:1f.0 init
2002 07:40:53.963904 IOAPIC: Initializing IOAPIC at 0xfec00000
2003 07:40:53.963987 IOAPIC: ID = 0x02
2004 07:40:53.967088 IOAPIC: Dumping registers
2005 07:40:53.970732 reg 0x0000: 0x02000000
2006 07:40:53.970814 reg 0x0001: 0x00770020
2007 07:40:53.973874 reg 0x0002: 0x00000000
2008 07:40:53.976911 IOAPIC: 120 interrupts
2009 07:40:53.980283 IOAPIC: Clearing IOAPIC at 0xfec00000
2010 07:40:53.987049 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2011 07:40:53.990446 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2012 07:40:53.993455 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2013 07:40:54.000691 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2014 07:40:54.003748 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2015 07:40:54.010500 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2016 07:40:54.013868 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2017 07:40:54.020283 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2018 07:40:54.023421 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2019 07:40:54.030347 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2020 07:40:54.033759 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2021 07:40:54.036762 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2022 07:40:54.043617 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2023 07:40:54.046938 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2024 07:40:54.053514 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2025 07:40:54.056871 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2026 07:40:54.063529 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2027 07:40:54.066928 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2028 07:40:54.073195 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2029 07:40:54.076743 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2030 07:40:54.080258 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2031 07:40:54.086668 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2032 07:40:54.089929 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2033 07:40:54.096765 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2034 07:40:54.100254 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2035 07:40:54.106513 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2036 07:40:54.110076 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2037 07:40:54.116391 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2038 07:40:54.119830 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2039 07:40:54.123371 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2040 07:40:54.129910 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2041 07:40:54.133268 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2042 07:40:54.139826 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2043 07:40:54.143156 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2044 07:40:54.149719 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2045 07:40:54.152939 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2046 07:40:54.160136 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2047 07:40:54.163071 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2048 07:40:54.166480 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2049 07:40:54.173429 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2050 07:40:54.176841 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2051 07:40:54.183297 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2052 07:40:54.186256 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2053 07:40:54.192941 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2054 07:40:54.196503 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2055 07:40:54.203151 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2056 07:40:54.206445 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2057 07:40:54.209806 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2058 07:40:54.216557 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2059 07:40:54.219918 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2060 07:40:54.226650 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2061 07:40:54.229573 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2062 07:40:54.236479 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2063 07:40:54.239288 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2064 07:40:54.242677 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2065 07:40:54.249200 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2066 07:40:54.252673 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2067 07:40:54.259228 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2068 07:40:54.262771 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2069 07:40:54.269333 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2070 07:40:54.272738 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2071 07:40:54.279586 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2072 07:40:54.283050 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2073 07:40:54.286183 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2074 07:40:54.293146 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2075 07:40:54.295963 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2076 07:40:54.302688 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2077 07:40:54.305852 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2078 07:40:54.312626 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2079 07:40:54.315845 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2080 07:40:54.322354 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2081 07:40:54.326028 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2082 07:40:54.329248 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2083 07:40:54.335712 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2084 07:40:54.339420 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2085 07:40:54.346111 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2086 07:40:54.349358 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2087 07:40:54.356423 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2088 07:40:54.359083 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2089 07:40:54.366325 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2090 07:40:54.369761 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2091 07:40:54.372677 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2092 07:40:54.379990 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2093 07:40:54.382595 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2094 07:40:54.389221 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2095 07:40:54.392298 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2096 07:40:54.399199 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2097 07:40:54.402820 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2098 07:40:54.409374 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2099 07:40:54.412684 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2100 07:40:54.415909 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2101 07:40:54.422287 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2102 07:40:54.425527 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2103 07:40:54.432290 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2104 07:40:54.435452 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2105 07:40:54.442303 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2106 07:40:54.445869 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2107 07:40:54.452541 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2108 07:40:54.455745 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2109 07:40:54.459123 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2110 07:40:54.465861 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2111 07:40:54.469097 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2112 07:40:54.475661 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2113 07:40:54.479348 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2114 07:40:54.485682 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2115 07:40:54.488908 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2116 07:40:54.495652 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2117 07:40:54.499267 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2118 07:40:54.502025 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2119 07:40:54.509062 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2120 07:40:54.512361 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2121 07:40:54.518933 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2122 07:40:54.522250 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2123 07:40:54.528759 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2124 07:40:54.531923 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2125 07:40:54.535640 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2126 07:40:54.542088 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2127 07:40:54.545551 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2128 07:40:54.552020 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2129 07:40:54.555493 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2130 07:40:54.562196 IOAPIC: Bootstrap Processor Local APIC = 0x00
2131 07:40:54.565466 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2132 07:40:54.569034 PCI: 00:1f.0 init finished in 607 msecs
2133 07:40:54.572429 PCI: 00:1f.2 init
2134 07:40:54.575440 apm_control: Disabling ACPI.
2135 07:40:54.580187 APMC done.
2136 07:40:54.583348 PCI: 00:1f.2 init finished in 7 msecs
2137 07:40:54.586691 PCI: 00:1f.3 init
2138 07:40:54.590340 PCI: 00:1f.3 init finished in 0 msecs
2139 07:40:54.590915 PCI: 01:00.0 init
2140 07:40:54.593267 PCI: 01:00.0 init finished in 0 msecs
2141 07:40:54.596506 PNP: 0c09.0 init
2142 07:40:54.603163 Google Chrome EC uptime: 12.025 seconds
2143 07:40:54.606396 Google Chrome AP resets since EC boot: 1
2144 07:40:54.610027 Google Chrome most recent AP reset causes:
2145 07:40:54.613049 0.370: 32775 shutdown: entering G3
2146 07:40:54.619484 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2147 07:40:54.623327 PNP: 0c09.0 init finished in 24 msecs
2148 07:40:54.626061 GENERIC: 0.0 init
2149 07:40:54.629516 GENERIC: 0.0 init finished in 0 msecs
2150 07:40:54.632918 GENERIC: 1.0 init
2151 07:40:54.636072 GENERIC: 1.0 init finished in 0 msecs
2152 07:40:54.636530 Devices initialized
2153 07:40:54.639407 Show all devs... After init.
2154 07:40:54.643158 Root Device: enabled 1
2155 07:40:54.646371 CPU_CLUSTER: 0: enabled 1
2156 07:40:54.649579 DOMAIN: 0000: enabled 1
2157 07:40:54.650039 GPIO: 0: enabled 1
2158 07:40:54.653163 PCI: 00:00.0: enabled 1
2159 07:40:54.656028 PCI: 00:01.0: enabled 0
2160 07:40:54.656484 PCI: 00:01.1: enabled 0
2161 07:40:54.659722 PCI: 00:02.0: enabled 1
2162 07:40:54.662707 PCI: 00:04.0: enabled 1
2163 07:40:54.666254 PCI: 00:05.0: enabled 0
2164 07:40:54.666710 PCI: 00:06.0: enabled 1
2165 07:40:54.669413 PCI: 00:06.2: enabled 0
2166 07:40:54.672863 PCI: 00:07.0: enabled 0
2167 07:40:54.675891 PCI: 00:07.1: enabled 0
2168 07:40:54.676345 PCI: 00:07.2: enabled 0
2169 07:40:54.679173 PCI: 00:07.3: enabled 0
2170 07:40:54.682855 PCI: 00:08.0: enabled 0
2171 07:40:54.686165 PCI: 00:09.0: enabled 0
2172 07:40:54.686724 PCI: 00:0a.0: enabled 1
2173 07:40:54.689940 PCI: 00:0d.0: enabled 1
2174 07:40:54.692641 PCI: 00:0d.1: enabled 0
2175 07:40:54.693266 PCI: 00:0d.2: enabled 0
2176 07:40:54.696254 PCI: 00:0d.3: enabled 0
2177 07:40:54.699725 PCI: 00:0e.0: enabled 0
2178 07:40:54.702907 PCI: 00:10.0: enabled 0
2179 07:40:54.703470 PCI: 00:10.1: enabled 0
2180 07:40:54.705896 PCI: 00:10.6: enabled 0
2181 07:40:54.709186 PCI: 00:10.7: enabled 0
2182 07:40:54.712907 PCI: 00:12.0: enabled 0
2183 07:40:54.713547 PCI: 00:12.6: enabled 0
2184 07:40:54.715697 PCI: 00:12.7: enabled 0
2185 07:40:54.719059 PCI: 00:13.0: enabled 0
2186 07:40:54.722460 PCI: 00:14.0: enabled 1
2187 07:40:54.722934 PCI: 00:14.1: enabled 0
2188 07:40:54.725661 PCI: 00:14.2: enabled 1
2189 07:40:54.728885 PCI: 00:14.3: enabled 1
2190 07:40:54.729400 PCI: 00:15.0: enabled 1
2191 07:40:54.732505 PCI: 00:15.1: enabled 1
2192 07:40:54.735600 PCI: 00:15.2: enabled 0
2193 07:40:54.738924 PCI: 00:15.3: enabled 1
2194 07:40:54.739466 PCI: 00:16.0: enabled 1
2195 07:40:54.742763 PCI: 00:16.1: enabled 0
2196 07:40:54.745755 PCI: 00:16.2: enabled 0
2197 07:40:54.749074 PCI: 00:16.3: enabled 0
2198 07:40:54.749534 PCI: 00:16.4: enabled 0
2199 07:40:54.752566 PCI: 00:16.5: enabled 0
2200 07:40:54.755546 PCI: 00:17.0: enabled 0
2201 07:40:54.759424 PCI: 00:19.0: enabled 0
2202 07:40:54.759881 PCI: 00:19.1: enabled 1
2203 07:40:54.762064 PCI: 00:19.2: enabled 0
2204 07:40:54.765795 PCI: 00:1a.0: enabled 0
2205 07:40:54.768955 PCI: 00:1c.0: enabled 0
2206 07:40:54.769461 PCI: 00:1c.1: enabled 0
2207 07:40:54.772381 PCI: 00:1c.2: enabled 0
2208 07:40:54.775592 PCI: 00:1c.3: enabled 0
2209 07:40:54.776050 PCI: 00:1c.4: enabled 0
2210 07:40:54.779038 PCI: 00:1c.5: enabled 0
2211 07:40:54.782291 PCI: 00:1c.6: enabled 0
2212 07:40:54.785593 PCI: 00:1c.7: enabled 0
2213 07:40:54.786053 PCI: 00:1d.0: enabled 0
2214 07:40:54.788917 PCI: 00:1d.1: enabled 0
2215 07:40:54.792221 PCI: 00:1d.2: enabled 0
2216 07:40:54.795548 PCI: 00:1d.3: enabled 0
2217 07:40:54.796006 PCI: 00:1e.0: enabled 1
2218 07:40:54.798963 PCI: 00:1e.1: enabled 0
2219 07:40:54.802560 PCI: 00:1e.2: enabled 0
2220 07:40:54.805487 PCI: 00:1e.3: enabled 1
2221 07:40:54.805949 PCI: 00:1f.0: enabled 1
2222 07:40:54.808622 PCI: 00:1f.1: enabled 0
2223 07:40:54.812122 PCI: 00:1f.2: enabled 1
2224 07:40:54.815443 PCI: 00:1f.3: enabled 1
2225 07:40:54.815896 PCI: 00:1f.4: enabled 0
2226 07:40:54.818817 PCI: 00:1f.5: enabled 1
2227 07:40:54.821924 PCI: 00:1f.6: enabled 0
2228 07:40:54.822384 PCI: 00:1f.7: enabled 0
2229 07:40:54.825292 GENERIC: 0.0: enabled 1
2230 07:40:54.828795 GENERIC: 0.0: enabled 1
2231 07:40:54.832195 GENERIC: 1.0: enabled 1
2232 07:40:54.832758 GENERIC: 0.0: enabled 1
2233 07:40:54.835212 GENERIC: 1.0: enabled 1
2234 07:40:54.838582 USB0 port 0: enabled 1
2235 07:40:54.842334 USB0 port 0: enabled 1
2236 07:40:54.842896 GENERIC: 0.0: enabled 1
2237 07:40:54.845436 I2C: 00:1a: enabled 1
2238 07:40:54.848660 I2C: 00:31: enabled 1
2239 07:40:54.849157 I2C: 00:32: enabled 1
2240 07:40:54.852019 I2C: 00:50: enabled 1
2241 07:40:54.855446 I2C: 00:10: enabled 1
2242 07:40:54.856004 I2C: 00:15: enabled 1
2243 07:40:54.858526 I2C: 00:2c: enabled 1
2244 07:40:54.861885 GENERIC: 0.0: enabled 1
2245 07:40:54.862448 SPI: 00: enabled 1
2246 07:40:54.865231 PNP: 0c09.0: enabled 1
2247 07:40:54.869012 GENERIC: 0.0: enabled 1
2248 07:40:54.872198 USB3 port 0: enabled 1
2249 07:40:54.872767 USB3 port 1: enabled 0
2250 07:40:54.875187 USB3 port 2: enabled 1
2251 07:40:54.878173 USB3 port 3: enabled 0
2252 07:40:54.878783 USB2 port 0: enabled 1
2253 07:40:54.881901 USB2 port 1: enabled 0
2254 07:40:54.885228 USB2 port 2: enabled 1
2255 07:40:54.885687 USB2 port 3: enabled 0
2256 07:40:54.888434 USB2 port 4: enabled 0
2257 07:40:54.891700 USB2 port 5: enabled 1
2258 07:40:54.894907 USB2 port 6: enabled 0
2259 07:40:54.895371 USB2 port 7: enabled 0
2260 07:40:54.898759 USB2 port 8: enabled 1
2261 07:40:54.901569 USB2 port 9: enabled 1
2262 07:40:54.902033 USB3 port 0: enabled 1
2263 07:40:54.904658 USB3 port 1: enabled 0
2264 07:40:54.907960 USB3 port 2: enabled 0
2265 07:40:54.911877 USB3 port 3: enabled 0
2266 07:40:54.912440 GENERIC: 0.0: enabled 1
2267 07:40:54.915092 GENERIC: 1.0: enabled 1
2268 07:40:54.918348 APIC: 00: enabled 1
2269 07:40:54.918908 APIC: 14: enabled 1
2270 07:40:54.921771 APIC: 16: enabled 1
2271 07:40:54.922457 APIC: 12: enabled 1
2272 07:40:54.924868 APIC: 10: enabled 1
2273 07:40:54.928378 APIC: 09: enabled 1
2274 07:40:54.929010 APIC: 01: enabled 1
2275 07:40:54.931613 APIC: 08: enabled 1
2276 07:40:54.934605 PCI: 01:00.0: enabled 1
2277 07:40:54.937983 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2278 07:40:54.945029 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2279 07:40:54.948374 ELOG: NV offset 0xf20000 size 0x4000
2280 07:40:54.954740 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2281 07:40:54.961825 ELOG: Event(17) added with size 13 at 2024-01-03 07:40:55 UTC
2282 07:40:54.968307 ELOG: Event(9E) added with size 10 at 2024-01-03 07:40:55 UTC
2283 07:40:54.975004 ELOG: Event(9F) added with size 14 at 2024-01-03 07:40:55 UTC
2284 07:40:54.981502 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2285 07:40:54.987989 ELOG: Event(A0) added with size 9 at 2024-01-03 07:40:55 UTC
2286 07:40:54.991449 elog_add_boot_reason: Logged dev mode boot
2287 07:40:54.998124 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2288 07:40:55.001258 Finalize devices...
2289 07:40:55.001717 PCI: 00:16.0 final
2290 07:40:55.004739 PCI: 00:1f.2 final
2291 07:40:55.005349 GENERIC: 0.0 final
2292 07:40:55.011482 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2293 07:40:55.014347 GENERIC: 1.0 final
2294 07:40:55.021045 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2295 07:40:55.021511 Devices finalized
2296 07:40:55.027988 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2297 07:40:55.030941 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2298 07:40:55.037577 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2299 07:40:55.044379 ME: HFSTS1 : 0x90000245
2300 07:40:55.047674 ME: HFSTS2 : 0x82100116
2301 07:40:55.051163 ME: HFSTS3 : 0x00000050
2302 07:40:55.057578 ME: HFSTS4 : 0x00004000
2303 07:40:55.060732 ME: HFSTS5 : 0x00000000
2304 07:40:55.064246 ME: HFSTS6 : 0x40600006
2305 07:40:55.067671 ME: Manufacturing Mode : NO
2306 07:40:55.074086 ME: SPI Protection Mode Enabled : YES
2307 07:40:55.077749 ME: FPFs Committed : YES
2308 07:40:55.080753 ME: Manufacturing Vars Locked : YES
2309 07:40:55.084385 ME: FW Partition Table : OK
2310 07:40:55.087839 ME: Bringup Loader Failure : NO
2311 07:40:55.091433 ME: Firmware Init Complete : YES
2312 07:40:55.094242 ME: Boot Options Present : NO
2313 07:40:55.097625 ME: Update In Progress : NO
2314 07:40:55.103913 ME: D0i3 Support : YES
2315 07:40:55.107376 ME: Low Power State Enabled : NO
2316 07:40:55.110702 ME: CPU Replaced : YES
2317 07:40:55.113902 ME: CPU Replacement Valid : YES
2318 07:40:55.117616 ME: Current Working State : 5
2319 07:40:55.120834 ME: Current Operation State : 1
2320 07:40:55.124161 ME: Current Operation Mode : 0
2321 07:40:55.127576 ME: Error Code : 0
2322 07:40:55.133999 ME: Enhanced Debug Mode : NO
2323 07:40:55.137115 ME: CPU Debug Disabled : YES
2324 07:40:55.140593 ME: TXT Support : NO
2325 07:40:55.143905 ME: WP for RO is enabled : YES
2326 07:40:55.150643 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2327 07:40:55.157654 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2328 07:40:55.160892 Ramoops buffer: 0x100000@0x76899000.
2329 07:40:55.163952 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2330 07:40:55.174020 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2331 07:40:55.177060 CBFS: 'fallback/slic' not found.
2332 07:40:55.180386 ACPI: Writing ACPI tables at 7686d000.
2333 07:40:55.180844 ACPI: * FACS
2334 07:40:55.184247 ACPI: * DSDT
2335 07:40:55.190315 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2336 07:40:55.194141 ACPI: * FADT
2337 07:40:55.194724 SCI is IRQ9
2338 07:40:55.197058 ACPI: added table 1/32, length now 40
2339 07:40:55.200441 ACPI: * SSDT
2340 07:40:55.207059 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2341 07:40:55.210129 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2342 07:40:55.216656 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2343 07:40:55.219939 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2344 07:40:55.226911 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2345 07:40:55.230247 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2346 07:40:55.236736 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2347 07:40:55.243469 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2348 07:40:55.246930 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2349 07:40:55.253299 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2350 07:40:55.256637 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2351 07:40:55.263586 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2352 07:40:55.266500 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2353 07:40:55.273244 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2354 07:40:55.280156 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2355 07:40:55.283300 PS2K: Passing 80 keymaps to kernel
2356 07:40:55.290304 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2357 07:40:55.296925 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2358 07:40:55.303131 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2359 07:40:55.309786 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2360 07:40:55.313512 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2361 07:40:55.319849 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2362 07:40:55.326222 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2363 07:40:55.333237 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2364 07:40:55.339760 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2365 07:40:55.346696 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2366 07:40:55.349767 ACPI: added table 2/32, length now 44
2367 07:40:55.352851 ACPI: * MCFG
2368 07:40:55.356494 ACPI: added table 3/32, length now 48
2369 07:40:55.356953 ACPI: * TPM2
2370 07:40:55.359510 TPM2 log created at 0x7685d000
2371 07:40:55.362953 ACPI: added table 4/32, length now 52
2372 07:40:55.366138 ACPI: * LPIT
2373 07:40:55.369800 ACPI: added table 5/32, length now 56
2374 07:40:55.370264 ACPI: * MADT
2375 07:40:55.372905 SCI is IRQ9
2376 07:40:55.376364 ACPI: added table 6/32, length now 60
2377 07:40:55.379712 cmd_reg from pmc_make_ipc_cmd 1052838
2378 07:40:55.386399 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2379 07:40:55.392709 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2380 07:40:55.399264 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2381 07:40:55.402577 PMC CrashLog size in discovery mode: 0xC00
2382 07:40:55.406024 cpu crashlog bar addr: 0x80640000
2383 07:40:55.409377 cpu discovery table offset: 0x6030
2384 07:40:55.412281 cpu_crashlog_discovery_table buffer count: 0x3
2385 07:40:55.419305 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2386 07:40:55.425652 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2387 07:40:55.432672 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2388 07:40:55.439138 PMC crashLog size in discovery mode : 0xC00
2389 07:40:55.445973 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2390 07:40:55.449172 discover mode PMC crashlog size adjusted to: 0x200
2391 07:40:55.455800 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2392 07:40:55.462389 discover mode PMC crashlog size adjusted to: 0x0
2393 07:40:55.465807 m_cpu_crashLog_size : 0x3480 bytes
2394 07:40:55.469070 CPU crashLog present.
2395 07:40:55.472632 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2396 07:40:55.479181 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2397 07:40:55.482823 current = 76876550
2398 07:40:55.483392 ACPI: * DMAR
2399 07:40:55.488957 ACPI: added table 7/32, length now 64
2400 07:40:55.492437 ACPI: added table 8/32, length now 68
2401 07:40:55.492894 ACPI: * HPET
2402 07:40:55.495511 ACPI: added table 9/32, length now 72
2403 07:40:55.499177 ACPI: done.
2404 07:40:55.499634 ACPI tables: 38528 bytes.
2405 07:40:55.502397 smbios_write_tables: 76857000
2406 07:40:55.506670 EC returned error result code 3
2407 07:40:55.510201 Couldn't obtain OEM name from CBI
2408 07:40:55.517126 Create SMBIOS type 16
2409 07:40:55.517594 Create SMBIOS type 17
2410 07:40:55.519710 Create SMBIOS type 20
2411 07:40:55.520165 GENERIC: 0.0 (WIFI Device)
2412 07:40:55.523271 SMBIOS tables: 2156 bytes.
2413 07:40:55.526381 Writing table forward entry at 0x00000500
2414 07:40:55.532903 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2415 07:40:55.536363 Writing coreboot table at 0x76891000
2416 07:40:55.543017 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2417 07:40:55.549522 1. 0000000000001000-000000000009ffff: RAM
2418 07:40:55.553043 2. 00000000000a0000-00000000000fffff: RESERVED
2419 07:40:55.556171 3. 0000000000100000-0000000076856fff: RAM
2420 07:40:55.562223 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2421 07:40:55.568865 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2422 07:40:55.572346 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2423 07:40:55.578892 7. 0000000077000000-00000000803fffff: RESERVED
2424 07:40:55.582259 8. 00000000c0000000-00000000cfffffff: RESERVED
2425 07:40:55.589189 9. 00000000f8000000-00000000f9ffffff: RESERVED
2426 07:40:55.592345 10. 00000000fb000000-00000000fb000fff: RESERVED
2427 07:40:55.598700 11. 00000000fc800000-00000000fe7fffff: RESERVED
2428 07:40:55.602311 12. 00000000feb00000-00000000feb7ffff: RESERVED
2429 07:40:55.605834 13. 00000000fec00000-00000000fecfffff: RESERVED
2430 07:40:55.612084 14. 00000000fed40000-00000000fed6ffff: RESERVED
2431 07:40:55.615524 15. 00000000fed80000-00000000fed87fff: RESERVED
2432 07:40:55.622547 16. 00000000fed90000-00000000fed92fff: RESERVED
2433 07:40:55.625717 17. 00000000feda0000-00000000feda1fff: RESERVED
2434 07:40:55.631961 18. 00000000fedc0000-00000000feddffff: RESERVED
2435 07:40:55.635271 19. 0000000100000000-000000027fbfffff: RAM
2436 07:40:55.638898 Passing 4 GPIOs to payload:
2437 07:40:55.641950 NAME | PORT | POLARITY | VALUE
2438 07:40:55.648869 lid | undefined | high | high
2439 07:40:55.655529 power | undefined | high | low
2440 07:40:55.658546 oprom | undefined | high | low
2441 07:40:55.665856 EC in RW | 0x00000151 | high | high
2442 07:40:55.666238 Board ID: 3
2443 07:40:55.668756 FW config: 0x131
2444 07:40:55.675361 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 3d0c
2445 07:40:55.675778 coreboot table: 1788 bytes.
2446 07:40:55.682133 IMD ROOT 0. 0x76fff000 0x00001000
2447 07:40:55.685511 IMD SMALL 1. 0x76ffe000 0x00001000
2448 07:40:55.689159 FSP MEMORY 2. 0x76afe000 0x00500000
2449 07:40:55.692229 CONSOLE 3. 0x76ade000 0x00020000
2450 07:40:55.695668 RW MCACHE 4. 0x76add000 0x0000043c
2451 07:40:55.698515 RO MCACHE 5. 0x76adc000 0x00000fd8
2452 07:40:55.702075 FMAP 6. 0x76adb000 0x0000064a
2453 07:40:55.705562 TIME STAMP 7. 0x76ada000 0x00000910
2454 07:40:55.712293 VBOOT WORK 8. 0x76ac6000 0x00014000
2455 07:40:55.715623 MEM INFO 9. 0x76ac5000 0x000003b8
2456 07:40:55.718687 ROMSTG STCK10. 0x76ac4000 0x00001000
2457 07:40:55.722357 AFTER CAR 11. 0x76ab8000 0x0000c000
2458 07:40:55.725337 RAMSTAGE 12. 0x76a2e000 0x0008a000
2459 07:40:55.728522 ACPI BERT 13. 0x76a1e000 0x00010000
2460 07:40:55.732307 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2461 07:40:55.738650 REFCODE 15. 0x769ae000 0x0006f000
2462 07:40:55.742246 SMM BACKUP 16. 0x7699e000 0x00010000
2463 07:40:55.744953 IGD OPREGION17. 0x76999000 0x00004203
2464 07:40:55.748472 RAMOOPS 18. 0x76899000 0x00100000
2465 07:40:55.751563 COREBOOT 19. 0x76891000 0x00008000
2466 07:40:55.754901 ACPI 20. 0x7686d000 0x00024000
2467 07:40:55.758491 TPM2 TCGLOG21. 0x7685d000 0x00010000
2468 07:40:55.761812 PMC CRASHLOG22. 0x7685c000 0x00000c00
2469 07:40:55.768162 CPU CRASHLOG23. 0x76858000 0x00003480
2470 07:40:55.771708 SMBIOS 24. 0x76857000 0x00001000
2471 07:40:55.772165 IMD small region:
2472 07:40:55.775310 IMD ROOT 0. 0x76ffec00 0x00000400
2473 07:40:55.781848 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2474 07:40:55.785061 VPD 2. 0x76ffeb60 0x0000006c
2475 07:40:55.788118 POWER STATE 3. 0x76ffeb00 0x00000044
2476 07:40:55.791779 ROMSTAGE 4. 0x76ffeae0 0x00000004
2477 07:40:55.794898 ACPI GNVS 5. 0x76ffea80 0x00000048
2478 07:40:55.801473 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2479 07:40:55.804845 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2480 07:40:55.808432 MTRR: Physical address space:
2481 07:40:55.815098 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2482 07:40:55.821680 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2483 07:40:55.828083 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2484 07:40:55.834814 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2485 07:40:55.841351 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2486 07:40:55.848277 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2487 07:40:55.851654 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2488 07:40:55.858184 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 07:40:55.861200 MTRR: Fixed MSR 0x258 0x0606060606060606
2490 07:40:55.864650 MTRR: Fixed MSR 0x259 0x0000000000000000
2491 07:40:55.868081 MTRR: Fixed MSR 0x268 0x0606060606060606
2492 07:40:55.874824 MTRR: Fixed MSR 0x269 0x0606060606060606
2493 07:40:55.878099 MTRR: Fixed MSR 0x26a 0x0606060606060606
2494 07:40:55.881312 MTRR: Fixed MSR 0x26b 0x0606060606060606
2495 07:40:55.884690 MTRR: Fixed MSR 0x26c 0x0606060606060606
2496 07:40:55.891001 MTRR: Fixed MSR 0x26d 0x0606060606060606
2497 07:40:55.894531 MTRR: Fixed MSR 0x26e 0x0606060606060606
2498 07:40:55.897885 MTRR: Fixed MSR 0x26f 0x0606060606060606
2499 07:40:55.901370 call enable_fixed_mtrr()
2500 07:40:55.904096 CPU physical address size: 39 bits
2501 07:40:55.910880 MTRR: default type WB/UC MTRR counts: 6/6.
2502 07:40:55.914201 MTRR: UC selected as default type.
2503 07:40:55.920647 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2504 07:40:55.924721 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2505 07:40:55.930975 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2506 07:40:55.937755 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2507 07:40:55.943995 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2508 07:40:55.950945 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2509 07:40:55.957286 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 07:40:55.961123 MTRR: Fixed MSR 0x258 0x0606060606060606
2511 07:40:55.963834 MTRR: Fixed MSR 0x259 0x0000000000000000
2512 07:40:55.967365 MTRR: Fixed MSR 0x268 0x0606060606060606
2513 07:40:55.973912 MTRR: Fixed MSR 0x269 0x0606060606060606
2514 07:40:55.977607 MTRR: Fixed MSR 0x26a 0x0606060606060606
2515 07:40:55.980818 MTRR: Fixed MSR 0x26b 0x0606060606060606
2516 07:40:55.983951 MTRR: Fixed MSR 0x26c 0x0606060606060606
2517 07:40:55.990518 MTRR: Fixed MSR 0x26d 0x0606060606060606
2518 07:40:55.993818 MTRR: Fixed MSR 0x26e 0x0606060606060606
2519 07:40:55.997544 MTRR: Fixed MSR 0x26f 0x0606060606060606
2520 07:40:56.000326 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 07:40:56.003955 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 07:40:56.010232 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 07:40:56.013573 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 07:40:56.017268 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 07:40:56.020843 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 07:40:56.023448 call enable_fixed_mtrr()
2527 07:40:56.027119 MTRR: Fixed MSR 0x250 0x0606060606060606
2528 07:40:56.033602 MTRR: Fixed MSR 0x250 0x0606060606060606
2529 07:40:56.037119 CPU physical address size: 39 bits
2530 07:40:56.040218 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 07:40:56.043896 MTRR: Fixed MSR 0x258 0x0606060606060606
2532 07:40:56.046816 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 07:40:56.053596 MTRR: Fixed MSR 0x268 0x0606060606060606
2534 07:40:56.056712 MTRR: Fixed MSR 0x269 0x0606060606060606
2535 07:40:56.060306 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 07:40:56.063594 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 07:40:56.070311 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 07:40:56.073511 MTRR: Fixed MSR 0x269 0x0606060606060606
2539 07:40:56.076693 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 07:40:56.080064 MTRR: Fixed MSR 0x26b 0x0606060606060606
2541 07:40:56.087101 MTRR: Fixed MSR 0x26c 0x0606060606060606
2542 07:40:56.090559 MTRR: Fixed MSR 0x26d 0x0606060606060606
2543 07:40:56.093652 MTRR: Fixed MSR 0x26e 0x0606060606060606
2544 07:40:56.096732 MTRR: Fixed MSR 0x26f 0x0606060606060606
2545 07:40:56.100253 MTRR: Fixed MSR 0x26a 0x0606060606060606
2546 07:40:56.103538 call enable_fixed_mtrr()
2547 07:40:56.107118 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 07:40:56.113383 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 07:40:56.117139 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 07:40:56.120189 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 07:40:56.123497 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 07:40:56.130493 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 07:40:56.133616 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 07:40:56.136759 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 07:40:56.140075 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 07:40:56.143414 CPU physical address size: 39 bits
2557 07:40:56.149849 MTRR: Fixed MSR 0x26c 0x0606060606060606
2558 07:40:56.150427 call enable_fixed_mtrr()
2559 07:40:56.156862 MTRR: Fixed MSR 0x250 0x0606060606060606
2560 07:40:56.159997 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 07:40:56.163415 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 07:40:56.166522 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 07:40:56.173118 MTRR: Fixed MSR 0x269 0x0606060606060606
2564 07:40:56.176364 CPU physical address size: 39 bits
2565 07:40:56.179679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2566 07:40:56.183163 call enable_fixed_mtrr()
2567 07:40:56.186989 MTRR: Fixed MSR 0x26b 0x0606060606060606
2568 07:40:56.189829 MTRR: Fixed MSR 0x26c 0x0606060606060606
2569 07:40:56.192876 MTRR: Fixed MSR 0x26d 0x0606060606060606
2570 07:40:56.199803 MTRR: Fixed MSR 0x26e 0x0606060606060606
2571 07:40:56.203093 MTRR: Fixed MSR 0x26f 0x0606060606060606
2572 07:40:56.206432 CPU physical address size: 39 bits
2573 07:40:56.209726 call enable_fixed_mtrr()
2574 07:40:56.213117 MTRR: Fixed MSR 0x250 0x0606060606060606
2575 07:40:56.216252 CPU physical address size: 39 bits
2576 07:40:56.219876 MTRR: Fixed MSR 0x258 0x0606060606060606
2577 07:40:56.223242 MTRR: Fixed MSR 0x258 0x0606060606060606
2578 07:40:56.229510 MTRR: Fixed MSR 0x259 0x0000000000000000
2579 07:40:56.232617 MTRR: Fixed MSR 0x268 0x0606060606060606
2580 07:40:56.236415 MTRR: Fixed MSR 0x269 0x0606060606060606
2581 07:40:56.239214 MTRR: Fixed MSR 0x259 0x0000000000000000
2582 07:40:56.246197 MTRR: Fixed MSR 0x268 0x0606060606060606
2583 07:40:56.249706 MTRR: Fixed MSR 0x269 0x0606060606060606
2584 07:40:56.252497 MTRR: Fixed MSR 0x26a 0x0606060606060606
2585 07:40:56.256363 MTRR: Fixed MSR 0x26b 0x0606060606060606
2586 07:40:56.262557 MTRR: Fixed MSR 0x26c 0x0606060606060606
2587 07:40:56.266119 MTRR: Fixed MSR 0x26d 0x0606060606060606
2588 07:40:56.269450 MTRR: Fixed MSR 0x26e 0x0606060606060606
2589 07:40:56.272659 MTRR: Fixed MSR 0x26f 0x0606060606060606
2590 07:40:56.276518 MTRR: Fixed MSR 0x26a 0x0606060606060606
2591 07:40:56.280230 call enable_fixed_mtrr()
2592 07:40:56.283364 MTRR: Fixed MSR 0x26b 0x0606060606060606
2593 07:40:56.289664 MTRR: Fixed MSR 0x26c 0x0606060606060606
2594 07:40:56.293064 MTRR: Fixed MSR 0x26d 0x0606060606060606
2595 07:40:56.295772 MTRR: Fixed MSR 0x26e 0x0606060606060606
2596 07:40:56.299411 MTRR: Fixed MSR 0x26f 0x0606060606060606
2597 07:40:56.305782 CPU physical address size: 39 bits
2598 07:40:56.309340 call enable_fixed_mtrr()
2599 07:40:56.312532 CPU physical address size: 39 bits
2600 07:40:56.312618
2601 07:40:56.316269 MTRR check
2602 07:40:56.316743 Fixed MTRRs : Enabled
2603 07:40:56.319169 Variable MTRRs: Enabled
2604 07:40:56.319593
2605 07:40:56.326019 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2606 07:40:56.329084 Checking cr50 for pending updates
2607 07:40:56.341084 Reading cr50 TPM mode
2608 07:40:56.356138 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2609 07:40:56.365246 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2610 07:40:56.368797 Checking segment from ROM address 0xf96cbe6c
2611 07:40:56.372284 Checking segment from ROM address 0xf96cbe88
2612 07:40:56.378811 Loading segment from ROM address 0xf96cbe6c
2613 07:40:56.378893 code (compression=1)
2614 07:40:56.388709 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2615 07:40:56.398851 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2616 07:40:56.399051 using LZMA
2617 07:40:56.421236 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2618 07:40:56.428083 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2619 07:40:56.435708 Loading segment from ROM address 0xf96cbe88
2620 07:40:56.439457 Entry Point 0x30000000
2621 07:40:56.439542 Loaded segments
2622 07:40:56.445871 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2623 07:40:56.452609 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2624 07:40:56.456028 Finalizing chipset.
2625 07:40:56.456170 apm_control: Finalizing SMM.
2626 07:40:56.459909 APMC done.
2627 07:40:56.462744 HECI: CSE device 16.1 is disabled
2628 07:40:56.466042 HECI: CSE device 16.2 is disabled
2629 07:40:56.469797 HECI: CSE device 16.3 is disabled
2630 07:40:56.472653 HECI: CSE device 16.4 is disabled
2631 07:40:56.476037 HECI: CSE device 16.5 is disabled
2632 07:40:56.479487 HECI: Sending End-of-Post
2633 07:40:56.487367 CSE: EOP requested action: continue boot
2634 07:40:56.490671 CSE EOP successful, continuing boot
2635 07:40:56.497969 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2636 07:40:56.501540 mp_park_aps done after 0 msecs.
2637 07:40:56.504592 Jumping to boot code at 0x30000000(0x76891000)
2638 07:40:56.514344 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2639 07:40:56.518587
2640 07:40:56.519142
2641 07:40:56.519504
2642 07:40:56.521696 Starting depthcharge on Volmar...
2643 07:40:56.522171
2644 07:40:56.524138 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2645 07:40:56.524698 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2646 07:40:56.525189 Setting prompt string to ['brya:']
2647 07:40:56.525665 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2648 07:40:56.528411 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2649 07:40:56.529062
2650 07:40:56.535291 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2651 07:40:56.535867
2652 07:40:56.541752 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2653 07:40:56.542314
2654 07:40:56.545027 configure_storage: Failed to remap 1C:2
2655 07:40:56.545509
2656 07:40:56.548627 Wipe memory regions:
2657 07:40:56.549232
2658 07:40:56.551816 [0x00000000001000, 0x000000000a0000)
2659 07:40:56.552269
2660 07:40:56.555246 [0x00000000100000, 0x00000030000000)
2661 07:40:56.662720
2662 07:40:56.665902 [0x00000032668e60, 0x00000076857000)
2663 07:40:56.817807
2664 07:40:56.820697 [0x00000100000000, 0x0000027fc00000)
2665 07:40:57.665605
2666 07:40:57.669109 ec_init: CrosEC protocol v3 supported (256, 256)
2667 07:40:58.279006
2668 07:40:58.279605 R8152: Initializing
2669 07:40:58.279978
2670 07:40:58.282302 Version 9 (ocp_data = 6010)
2671 07:40:58.282863
2672 07:40:58.285292 R8152: Done initializing
2673 07:40:58.285853
2674 07:40:58.288798 Adding net device
2675 07:40:58.589310
2676 07:40:58.592286 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2677 07:40:58.592459
2678 07:40:58.592543
2679 07:40:58.592618
2680 07:40:58.592928 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2682 07:40:58.693454 brya: tftpboot 192.168.201.1 12435143/tftp-deploy-qc_knxz7/kernel/bzImage 12435143/tftp-deploy-qc_knxz7/kernel/cmdline 12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
2683 07:40:58.694268 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2684 07:40:58.694899 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2685 07:40:58.699194 tftpboot 192.168.201.1 12435143/tftp-deploy-qc_knxz7/kernel/bzImploy-qc_knxz7/kernel/cmdline 12435143/tftp-deploy-qc_knxz7/ramdisk/ramdisk.cpio.gz
2686 07:40:58.699303
2687 07:40:58.699394 Waiting for link
2688 07:40:58.902472
2689 07:40:58.902980 done.
2690 07:40:58.903311
2691 07:40:58.903613 MAC: 00:e0:4c:68:05:70
2692 07:40:58.904174
2693 07:40:58.905448 Sending DHCP discover... done.
2694 07:40:58.905878
2695 07:40:58.908608 Waiting for reply... done.
2696 07:40:58.909064
2697 07:40:58.912385 Sending DHCP request... done.
2698 07:40:58.912801
2699 07:40:58.915428 Waiting for reply... done.
2700 07:40:58.918840
2701 07:40:58.919316 My ip is 192.168.201.16
2702 07:40:58.919649
2703 07:40:58.922076 The DHCP server ip is 192.168.201.1
2704 07:40:58.922597
2705 07:40:58.929131 TFTP server IP predefined by user: 192.168.201.1
2706 07:40:58.929827
2707 07:40:58.935453 Bootfile predefined by user: 12435143/tftp-deploy-qc_knxz7/kernel/bzImage
2708 07:40:58.936096
2709 07:40:58.938834 Sending tftp read request... done.
2710 07:40:58.939414
2711 07:40:58.947308 Waiting for the transfer...
2712 07:40:58.947879
2713 07:40:59.308785 00000000 ################################################################
2714 07:40:59.308950
2715 07:40:59.602196 00080000 ################################################################
2716 07:40:59.602339
2717 07:40:59.895151 00100000 ################################################################
2718 07:40:59.895291
2719 07:41:00.193254 00180000 ################################################################
2720 07:41:00.193394
2721 07:41:00.483631 00200000 ################################################################
2722 07:41:00.483771
2723 07:41:00.765215 00280000 ################################################################
2724 07:41:00.765361
2725 07:41:01.061329 00300000 ################################################################
2726 07:41:01.061465
2727 07:41:01.399316 00380000 ################################################################
2728 07:41:01.399830
2729 07:41:01.727593 00400000 ################################################################
2730 07:41:01.727730
2731 07:41:02.022851 00480000 ################################################################
2732 07:41:02.022992
2733 07:41:02.289449 00500000 ################################################################
2734 07:41:02.289582
2735 07:41:02.564905 00580000 ################################################################
2736 07:41:02.565052
2737 07:41:02.819526 00600000 ################################################################
2738 07:41:02.819660
2739 07:41:03.104994 00680000 ################################################################
2740 07:41:03.105129
2741 07:41:03.402548 00700000 ################################################################
2742 07:41:03.402694
2743 07:41:03.693597 00780000 ################################################################
2744 07:41:03.693736
2745 07:41:03.812209 00800000 ####################### done.
2746 07:41:03.815758
2747 07:41:03.818917 The bootfile was 8572816 bytes long.
2748 07:41:03.819054
2749 07:41:03.822061 Sending tftp read request... done.
2750 07:41:03.822195
2751 07:41:03.825602 Waiting for the transfer...
2752 07:41:03.825841
2753 07:41:04.207616 00000000 ################################################################
2754 07:41:04.208155
2755 07:41:04.586119 00080000 ################################################################
2756 07:41:04.586259
2757 07:41:04.886286 00100000 ################################################################
2758 07:41:04.886425
2759 07:41:05.185921 00180000 ################################################################
2760 07:41:05.186056
2761 07:41:05.483336 00200000 ################################################################
2762 07:41:05.483474
2763 07:41:05.777392 00280000 ################################################################
2764 07:41:05.777536
2765 07:41:06.064464 00300000 ################################################################
2766 07:41:06.064612
2767 07:41:06.362615 00380000 ################################################################
2768 07:41:06.362761
2769 07:41:06.660513 00400000 ################################################################
2770 07:41:06.660656
2771 07:41:06.957297 00480000 ################################################################
2772 07:41:06.957435
2773 07:41:07.203234 00500000 ################################################################ done.
2774 07:41:07.203387
2775 07:41:07.206687 Sending tftp read request... done.
2776 07:41:07.206771
2777 07:41:07.210234 Waiting for the transfer...
2778 07:41:07.210323
2779 07:41:07.210392 00000000 # done.
2780 07:41:07.210458
2781 07:41:07.220427 Command line loaded dynamically from TFTP file: 12435143/tftp-deploy-qc_knxz7/kernel/cmdline
2782 07:41:07.220532
2783 07:41:07.243231 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435143/extract-nfsrootfs-y_lxlzp0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2784 07:41:07.250779
2785 07:41:07.253713 Shutting down all USB controllers.
2786 07:41:07.253901
2787 07:41:07.254082 Removing current net device
2788 07:41:07.254254
2789 07:41:07.257233 Finalizing coreboot
2790 07:41:07.257416
2791 07:41:07.263596 Exiting depthcharge with code 4 at timestamp: 20986856
2792 07:41:07.263769
2793 07:41:07.263906
2794 07:41:07.264033 Starting kernel ...
2795 07:41:07.264155
2796 07:41:07.264274
2797 07:41:07.264835 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2798 07:41:07.265045 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2799 07:41:07.265207 Setting prompt string to ['Linux version [0-9]']
2800 07:41:07.265347 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2801 07:41:07.265487 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2803 07:45:37.265958 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2805 07:45:37.267049 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2807 07:45:37.267909 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2810 07:45:37.269374 end: 2 depthcharge-action (duration 00:05:00) [common]
2812 07:45:37.270565 Cleaning after the job
2813 07:45:37.271034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/ramdisk
2814 07:45:37.275608 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/kernel
2815 07:45:37.282309 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/nfsrootfs
2816 07:45:37.380310 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435143/tftp-deploy-qc_knxz7/modules
2817 07:45:37.380839 start: 5.1 power-off (timeout 00:00:30) [common]
2818 07:45:37.381082 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2819 07:45:37.458250 >> Command sent successfully.
2820 07:45:37.462792 Returned 0 in 0 seconds
2821 07:45:37.563631 end: 5.1 power-off (duration 00:00:00) [common]
2823 07:45:37.565375 start: 5.2 read-feedback (timeout 00:10:00) [common]
2824 07:45:37.566742 Listened to connection for namespace 'common' for up to 1s
2826 07:45:37.568258 Listened to connection for namespace 'common' for up to 1s
2827 07:45:38.567433 Finalising connection for namespace 'common'
2828 07:45:38.568156 Disconnecting from shell: Finalise
2829 07:45:38.568682
2830 07:45:38.669916 end: 5.2 read-feedback (duration 00:00:01) [common]
2831 07:45:38.670607 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435143
2832 07:45:38.976940 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435143
2833 07:45:38.977343 JobError: Your job cannot terminate cleanly.