Boot log: acer-chromebox-cxi5-brask
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:22.854932 lava-dispatcher, installed at version: 2023.10
2 07:40:22.855103 start: 0 validate
3 07:40:22.855234 Start time: 2024-01-03 07:40:22.855228+00:00 (UTC)
4 07:40:22.855352 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:22.855481 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:23.125863 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:23.126437 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:23.396149 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:23.396714 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:40:30.164652 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:40:30.165197 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:40:30.437561 validate duration: 7.58
14 07:40:30.438312 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:40:30.438400 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:40:30.438475 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:40:30.438577 Not decompressing ramdisk as can be used compressed.
18 07:40:30.438653 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 07:40:30.438708 saving as /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/ramdisk/initrd.cpio.gz
20 07:40:30.438762 total size: 5432690 (5 MB)
21 07:40:30.965204 progress 0 % (0 MB)
22 07:40:30.969487 progress 5 % (0 MB)
23 07:40:30.970471 progress 10 % (0 MB)
24 07:40:30.971439 progress 15 % (0 MB)
25 07:40:30.972508 progress 20 % (1 MB)
26 07:40:30.973474 progress 25 % (1 MB)
27 07:40:30.974420 progress 30 % (1 MB)
28 07:40:30.975479 progress 35 % (1 MB)
29 07:40:30.976422 progress 40 % (2 MB)
30 07:40:30.977378 progress 45 % (2 MB)
31 07:40:30.978310 progress 50 % (2 MB)
32 07:40:30.979349 progress 55 % (2 MB)
33 07:40:30.980316 progress 60 % (3 MB)
34 07:40:30.981302 progress 65 % (3 MB)
35 07:40:30.982352 progress 70 % (3 MB)
36 07:40:30.983284 progress 75 % (3 MB)
37 07:40:30.984242 progress 80 % (4 MB)
38 07:40:30.985174 progress 85 % (4 MB)
39 07:40:30.986210 progress 90 % (4 MB)
40 07:40:30.987142 progress 95 % (4 MB)
41 07:40:30.988115 progress 100 % (5 MB)
42 07:40:30.988266 5 MB downloaded in 0.55 s (9.43 MB/s)
43 07:40:30.988405 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:40:30.988599 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:40:30.988664 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:40:30.988724 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:40:30.988828 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:40:30.988884 saving as /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/kernel/bzImage
50 07:40:30.988929 total size: 8572816 (8 MB)
51 07:40:30.988975 No compression specified
52 07:40:30.989988 progress 0 % (0 MB)
53 07:40:30.991632 progress 5 % (0 MB)
54 07:40:30.993199 progress 10 % (0 MB)
55 07:40:30.994720 progress 15 % (1 MB)
56 07:40:30.996261 progress 20 % (1 MB)
57 07:40:30.997774 progress 25 % (2 MB)
58 07:40:30.999278 progress 30 % (2 MB)
59 07:40:31.000807 progress 35 % (2 MB)
60 07:40:31.002319 progress 40 % (3 MB)
61 07:40:31.003853 progress 45 % (3 MB)
62 07:40:31.005355 progress 50 % (4 MB)
63 07:40:31.006856 progress 55 % (4 MB)
64 07:40:31.008365 progress 60 % (4 MB)
65 07:40:31.009947 progress 65 % (5 MB)
66 07:40:31.011435 progress 70 % (5 MB)
67 07:40:31.012934 progress 75 % (6 MB)
68 07:40:31.014406 progress 80 % (6 MB)
69 07:40:31.015906 progress 85 % (6 MB)
70 07:40:31.017389 progress 90 % (7 MB)
71 07:40:31.018864 progress 95 % (7 MB)
72 07:40:31.020362 progress 100 % (8 MB)
73 07:40:31.020496 8 MB downloaded in 0.03 s (259.03 MB/s)
74 07:40:31.020609 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:40:31.020801 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:40:31.020865 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:40:31.020930 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:40:31.021028 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 07:40:31.021083 saving as /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/nfsrootfs/full.rootfs.tar
81 07:40:31.021129 total size: 133380384 (127 MB)
82 07:40:31.021176 Using unxz to decompress xz
83 07:40:31.024257 progress 0 % (0 MB)
84 07:40:31.313731 progress 5 % (6 MB)
85 07:40:31.617956 progress 10 % (12 MB)
86 07:40:31.860470 progress 15 % (19 MB)
87 07:40:32.024317 progress 20 % (25 MB)
88 07:40:32.235440 progress 25 % (31 MB)
89 07:40:32.537733 progress 30 % (38 MB)
90 07:40:32.841433 progress 35 % (44 MB)
91 07:40:33.189720 progress 40 % (50 MB)
92 07:40:33.529114 progress 45 % (57 MB)
93 07:40:33.842217 progress 50 % (63 MB)
94 07:40:34.170605 progress 55 % (69 MB)
95 07:40:34.491227 progress 60 % (76 MB)
96 07:40:34.805545 progress 65 % (82 MB)
97 07:40:35.122619 progress 70 % (89 MB)
98 07:40:35.435542 progress 75 % (95 MB)
99 07:40:35.812992 progress 80 % (101 MB)
100 07:40:36.184649 progress 85 % (108 MB)
101 07:40:36.411108 progress 90 % (114 MB)
102 07:40:36.709355 progress 95 % (120 MB)
103 07:40:37.050229 progress 100 % (127 MB)
104 07:40:37.054896 127 MB downloaded in 6.03 s (21.08 MB/s)
105 07:40:37.055115 end: 1.3.1 http-download (duration 00:00:06) [common]
107 07:40:37.055334 end: 1.3 download-retry (duration 00:00:06) [common]
108 07:40:37.055405 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:40:37.055483 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:40:37.055611 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:40:37.055671 saving as /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/modules/modules.tar
112 07:40:37.055720 total size: 251144 (0 MB)
113 07:40:37.055772 Using unxz to decompress xz
114 07:40:37.058764 progress 13 % (0 MB)
115 07:40:37.059047 progress 26 % (0 MB)
116 07:40:37.059226 progress 39 % (0 MB)
117 07:40:37.060518 progress 52 % (0 MB)
118 07:40:37.062174 progress 65 % (0 MB)
119 07:40:37.063997 progress 78 % (0 MB)
120 07:40:37.065497 progress 91 % (0 MB)
121 07:40:37.067141 progress 100 % (0 MB)
122 07:40:37.071737 0 MB downloaded in 0.02 s (14.96 MB/s)
123 07:40:37.071914 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:40:37.072134 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:40:37.072209 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 07:40:37.072296 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 07:40:38.292295 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435137/extract-nfsrootfs-2zh8lfer
129 07:40:38.292496 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 07:40:38.292594 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
131 07:40:38.292740 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln
132 07:40:38.292846 makedir: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin
133 07:40:38.292938 makedir: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/tests
134 07:40:38.293036 makedir: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/results
135 07:40:38.293130 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-add-keys
136 07:40:38.293245 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-add-sources
137 07:40:38.293346 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-background-process-start
138 07:40:38.293443 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-background-process-stop
139 07:40:38.293538 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-common-functions
140 07:40:38.293631 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-echo-ipv4
141 07:40:38.293725 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-install-packages
142 07:40:38.293819 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-installed-packages
143 07:40:38.293913 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-os-build
144 07:40:38.294018 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-probe-channel
145 07:40:38.294106 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-probe-ip
146 07:40:38.294195 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-target-ip
147 07:40:38.294282 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-target-mac
148 07:40:38.294370 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-target-storage
149 07:40:38.294461 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-case
150 07:40:38.294550 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-event
151 07:40:38.294643 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-feedback
152 07:40:38.294731 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-raise
153 07:40:38.294819 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-reference
154 07:40:38.294906 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-runner
155 07:40:38.294994 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-set
156 07:40:38.295081 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-test-shell
157 07:40:38.295171 Updating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-install-packages (oe)
158 07:40:38.295291 Updating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/bin/lava-installed-packages (oe)
159 07:40:38.295382 Creating /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/environment
160 07:40:38.295462 LAVA metadata
161 07:40:38.295526 - LAVA_JOB_ID=12435137
162 07:40:38.295577 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:40:38.295656 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
164 07:40:38.295710 skipped lava-vland-overlay
165 07:40:38.295768 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:40:38.295827 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
167 07:40:38.295876 skipped lava-multinode-overlay
168 07:40:38.295931 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:40:38.295990 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
170 07:40:38.296047 Loading test definitions
171 07:40:38.296116 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
172 07:40:38.296174 Using /lava-12435137 at stage 0
173 07:40:38.296394 uuid=12435137_1.5.2.3.1 testdef=None
174 07:40:38.296462 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 07:40:38.296527 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
176 07:40:38.296916 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 07:40:38.297110 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
179 07:40:38.297610 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 07:40:38.297783 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
182 07:40:38.298236 runner path: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/0/tests/0_dmesg test_uuid 12435137_1.5.2.3.1
183 07:40:38.298350 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 07:40:38.298528 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
186 07:40:38.298581 Using /lava-12435137 at stage 1
187 07:40:38.298794 uuid=12435137_1.5.2.3.5 testdef=None
188 07:40:38.298860 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 07:40:38.298921 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
190 07:40:38.299280 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 07:40:38.299452 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
193 07:40:38.299942 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 07:40:38.300116 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
196 07:40:38.300598 runner path: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/1/tests/1_bootrr test_uuid 12435137_1.5.2.3.5
197 07:40:38.300749 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 07:40:38.300934 Creating lava-test-runner.conf files
200 07:40:38.300981 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/0 for stage 0
201 07:40:38.301056 - 0_dmesg
202 07:40:38.301123 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435137/lava-overlay-4ov8kzln/lava-12435137/1 for stage 1
203 07:40:38.301192 - 1_bootrr
204 07:40:38.301266 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 07:40:38.301332 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
206 07:40:38.307140 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 07:40:38.307229 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
208 07:40:38.307299 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 07:40:38.307365 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 07:40:38.307439 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
211 07:40:38.397157 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 07:40:38.397405 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
213 07:40:38.397493 extracting modules file /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435137/extract-nfsrootfs-2zh8lfer
214 07:40:38.405787 extracting modules file /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435137/extract-overlay-ramdisk-29xabepa/ramdisk
215 07:40:38.413636 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 07:40:38.413740 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
217 07:40:38.413808 [common] Applying overlay to NFS
218 07:40:38.413862 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435137/compress-overlay-ynethc9y/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435137/extract-nfsrootfs-2zh8lfer
219 07:40:38.419231 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 07:40:38.419325 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
221 07:40:38.419399 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 07:40:38.419535 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
223 07:40:38.419596 Building ramdisk /var/lib/lava/dispatcher/tmp/12435137/extract-overlay-ramdisk-29xabepa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435137/extract-overlay-ramdisk-29xabepa/ramdisk
224 07:40:38.448139 >> 26162 blocks
225 07:40:38.913680 rename /var/lib/lava/dispatcher/tmp/12435137/extract-overlay-ramdisk-29xabepa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
226 07:40:38.913973 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
227 07:40:38.914086 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
228 07:40:38.914171 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
229 07:40:38.914251 No mkimage arch provided, not using FIT.
230 07:40:38.914324 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 07:40:38.914395 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 07:40:38.914475 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 07:40:38.914548 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:52) [common]
234 07:40:38.914613 No LXC device requested
235 07:40:38.914680 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 07:40:38.914753 start: 1.7 deploy-device-env (timeout 00:09:52) [common]
237 07:40:38.914824 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 07:40:38.914887 Checking files for TFTP limit of 4294967296 bytes.
239 07:40:38.915192 end: 1 tftp-deploy (duration 00:00:08) [common]
240 07:40:38.915272 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 07:40:38.915335 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 07:40:38.915432 substitutions:
243 07:40:38.915486 - {DTB}: None
244 07:40:38.915534 - {INITRD}: 12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
245 07:40:38.915580 - {KERNEL}: 12435137/tftp-deploy-v7qu1gt6/kernel/bzImage
246 07:40:38.915626 - {LAVA_MAC}: None
247 07:40:38.915670 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435137/extract-nfsrootfs-2zh8lfer
248 07:40:38.915715 - {NFS_SERVER_IP}: 192.168.201.1
249 07:40:38.915764 - {PRESEED_CONFIG}: None
250 07:40:38.915816 - {PRESEED_LOCAL}: None
251 07:40:38.915865 - {RAMDISK}: 12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
252 07:40:38.915908 - {ROOT_PART}: None
253 07:40:38.915950 - {ROOT}: None
254 07:40:38.915993 - {SERVER_IP}: 192.168.201.1
255 07:40:38.916036 - {TEE}: None
256 07:40:38.916077 Parsed boot commands:
257 07:40:38.916119 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 07:40:38.916251 Parsed boot commands: tftpboot 192.168.201.1 12435137/tftp-deploy-v7qu1gt6/kernel/bzImage 12435137/tftp-deploy-v7qu1gt6/kernel/cmdline 12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
259 07:40:38.916327 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 07:40:38.916394 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 07:40:38.916464 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 07:40:38.916529 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 07:40:38.916581 Not connected, no need to disconnect.
264 07:40:38.916636 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 07:40:38.916697 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 07:40:38.916749 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-5'
267 07:40:38.919201 Setting prompt string to ['lava-test: # ']
268 07:40:38.919428 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 07:40:38.919529 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 07:40:38.919607 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 07:40:38.919682 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 07:40:38.919840 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-5' '--port=1' '--command=reboot'
273 07:40:44.050658 >> Command sent successfully.
274 07:40:44.052714 Returned 0 in 5 seconds
275 07:40:44.153111 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 07:40:44.153405 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 07:40:44.153482 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 07:40:44.153557 Setting prompt string to 'Starting depthcharge on Moli...'
280 07:40:44.153614 Changing prompt to 'Starting depthcharge on Moli...'
281 07:40:44.153671 depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
282 07:40:44.153878 [Enter `^Ec?' for help]
283 07:40:45.367078
284 07:40:45.367594
285 07:40:45.376991 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
286 07:40:45.380264 CPU: Intel(R) Celeron(R) 7305
287 07:40:45.383438 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 07:40:45.389764 CPU: AES supported, TXT NOT supported, VT supported
289 07:40:45.396516 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
290 07:40:45.399921 Cache size = 8 MiB
291 07:40:45.403379 MCH: device id 4619 (rev 04) is Alderlake-P
292 07:40:45.410435 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 07:40:45.413151 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 07:40:45.416648 VBOOT: Loading verstage.
295 07:40:45.420063 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 07:40:45.426823 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 07:40:45.430022 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 07:40:45.440451 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
299 07:40:45.447119 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
300 07:40:45.447619
301 07:40:45.447907
302 07:40:45.460450 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
303 07:40:45.464039 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 07:40:45.470722 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 07:40:45.471200 done! DID_VID 0x00281ae0
306 07:40:45.474108 TPM ready after 0 ms
307 07:40:45.477344 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
308 07:40:45.491221 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
309 07:40:45.497771 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
310 07:40:45.547593 tlcl_send_startup: Startup return code is 0
311 07:40:45.548065 TPM: setup succeeded
312 07:40:45.568436 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
313 07:40:45.589815 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
314 07:40:45.593539 Chrome EC: UHEPI supported
315 07:40:45.596563 Reading cr50 boot mode
316 07:40:45.611509 Cr50 says boot_mode is VERIFIED_RW(0x00).
317 07:40:45.611992 Phase 1
318 07:40:45.618538 FMAP: area GBB found @ 1805000 (458752 bytes)
319 07:40:45.624720 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
320 07:40:45.632005 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
321 07:40:45.638175 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 07:40:45.638645 Phase 2
323 07:40:45.641564 Phase 3
324 07:40:45.644653 FMAP: area GBB found @ 1805000 (458752 bytes)
325 07:40:45.651867 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
326 07:40:45.654887 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
327 07:40:45.661554 VB2:vb2_verify_keyblock() Checking keyblock signature...
328 07:40:45.668507 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
329 07:40:45.674876 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
330 07:40:45.684733 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
331 07:40:45.697623 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
332 07:40:45.701052 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
333 07:40:45.707821 VB2:vb2_verify_fw_preamble() Verifying preamble.
334 07:40:45.713854 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
335 07:40:45.720721 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
336 07:40:45.727240 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
337 07:40:45.732048 Phase 4
338 07:40:45.735257 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
339 07:40:45.741803 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
340 07:40:45.970201 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
341 07:40:45.976524 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
342 07:40:45.979626 Saving vboot hash.
343 07:40:45.986805 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
344 07:40:46.002895 tlcl_extend: response is 0
345 07:40:46.009350 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
346 07:40:46.012450 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
347 07:40:46.030274 tlcl_extend: response is 0
348 07:40:46.036848 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
349 07:40:46.055720 tlcl_lock_nv_write: response is 0
350 07:40:46.073505 tlcl_lock_nv_write: response is 0
351 07:40:46.073963 Slot B is selected
352 07:40:46.080069 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
353 07:40:46.086873 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
354 07:40:46.093437 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
355 07:40:46.099939 BS: verstage times (exec / console): total (unknown) / 260 ms
356 07:40:46.100393
357 07:40:46.100658
358 07:40:46.109840 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
359 07:40:46.113873 Google Chrome EC: version:
360 07:40:46.117046 ro: moli_v2.0.19454-8a70cbdcf0
361 07:40:46.120565 rw: moli_v2.0.22464-d4ba27cabb
362 07:40:46.123668 running image: 2
363 07:40:46.127256 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
364 07:40:46.136881 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 07:40:46.143763 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 07:40:46.150508 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
367 07:40:46.160144 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
368 07:40:46.170385 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
369 07:40:46.173437 EC took 944us to calculate image hash
370 07:40:46.183810 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
371 07:40:46.189918 VB2:sync_ec() select_rw=RW(active)
372 07:40:46.195319 EC returned error result code 1
373 07:40:46.202602 PARAM_LIMIT_POWER not supported by EC.
374 07:40:46.205831 Waited 7382us to clear limit power flag.
375 07:40:46.209238 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 07:40:46.212429 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 07:40:46.219266 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 07:40:46.222468 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 07:40:46.226362 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
380 07:40:46.230016 TCO_STS: 0000 0000
381 07:40:46.233803 GEN_PMCON: d0015038 00002200
382 07:40:46.234281 GBLRST_CAUSE: 00000000 00000000
383 07:40:46.237215 HPR_CAUSE0: 00000000
384 07:40:46.240274 prev_sleep_state 5
385 07:40:46.243510 Abort disabling TXT, as CPU is not TXT capable.
386 07:40:46.251724 cse_lite: Number of partitions = 3
387 07:40:46.255220 cse_lite: Current partition = RO
388 07:40:46.255745 cse_lite: Next partition = RO
389 07:40:46.258327 cse_lite: Flags = 0x7
390 07:40:46.265365 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
391 07:40:46.274886 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
392 07:40:46.278002 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 07:40:46.285395 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 07:40:46.291547 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
395 07:40:46.298582 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
396 07:40:46.301811 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 07:40:46.304877 CSE Sub-partition update not required
398 07:40:46.311525 cse_lite: Set Boot Partition Info Command (RW)
399 07:40:46.314791 HECI: Global Reset(Type:1) Command
400 07:40:47.734472
401 07:40:47.734987
402 07:40:47.739044 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
403 07:40:47.789395 CPU: Intel(R) Celeron(R) 7305
404 07:40:47.789963 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
405 07:40:47.790574 CPU: AES supported, TXT NOT supported, VT supported
406 07:40:47.790859 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
407 07:40:47.791107 Cache size = 8 MiB
408 07:40:47.791346 MCH: device id 4619 (rev 04) is Alderlake-P
409 07:40:47.791609 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
410 07:40:47.791838 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
411 07:40:47.792048 VBOOT: Loading verstage.
412 07:40:47.792257 FMAP: Found "FLASH" version 1.1 at 0x1804000.
413 07:40:47.792466 FMAP: base = 0x0 size = 0x2000000 #areas = 37
414 07:40:47.879088 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 07:40:47.879640 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
416 07:40:47.880233 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
417 07:40:47.880535
418 07:40:47.880777
419 07:40:47.881015 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
420 07:40:47.881256 Probing TPM I2C: I2C bus 1 version 0x3230302a
421 07:40:47.884979 DW I2C bus 1 at 0xfe022000 (400 KHz)
422 07:40:47.964242 Cr50 i2c TPM IRQ timeout!
423 07:40:47.977398 .done! DID_VID 0x00281ae0
424 07:40:47.980288 TPM ready after 0 ms
425 07:40:47.983630 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
426 07:40:47.997314 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
427 07:40:48.003931 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
428 07:40:48.052522 tlcl_send_startup: Startup return code is 0
429 07:40:48.052991 TPM: setup succeeded
430 07:40:48.074463 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
431 07:40:48.095566 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
432 07:40:48.099581 Chrome EC: UHEPI supported
433 07:40:48.102988 Reading cr50 boot mode
434 07:40:48.117840 Cr50 says boot_mode is VERIFIED_RW(0x00).
435 07:40:48.118313 Phase 1
436 07:40:48.124421 FMAP: area GBB found @ 1805000 (458752 bytes)
437 07:40:48.130844 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 07:40:48.137752 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 07:40:48.144290 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
440 07:40:48.147587 Phase 2
441 07:40:48.147946 Phase 3
442 07:40:48.151100 FMAP: area GBB found @ 1805000 (458752 bytes)
443 07:40:48.157917 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
444 07:40:48.161014 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
445 07:40:48.167784 VB2:vb2_verify_keyblock() Checking keyblock signature...
446 07:40:48.174428 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
447 07:40:48.181461 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
448 07:40:48.191261 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
449 07:40:48.203742 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
450 07:40:48.207167 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
451 07:40:48.214042 VB2:vb2_verify_fw_preamble() Verifying preamble.
452 07:40:48.220899 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
453 07:40:48.227262 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
454 07:40:48.233944 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
455 07:40:48.238296 Phase 4
456 07:40:48.241349 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
457 07:40:48.248181 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
458 07:40:48.476314 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
459 07:40:48.482765 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
460 07:40:48.485927 Saving vboot hash.
461 07:40:48.492550 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
462 07:40:48.508880 tlcl_extend: response is 0
463 07:40:48.515298 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
464 07:40:48.521802 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
465 07:40:48.536488 tlcl_extend: response is 0
466 07:40:48.542933 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
467 07:40:48.561402 tlcl_lock_nv_write: response is 0
468 07:40:48.579584 tlcl_lock_nv_write: response is 0
469 07:40:48.580090 Slot B is selected
470 07:40:48.586004 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
471 07:40:48.592698 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
472 07:40:48.599384 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
473 07:40:48.605951 BS: verstage times (exec / console): total (unknown) / 263 ms
474 07:40:48.606444
475 07:40:48.606742
476 07:40:48.616211 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
477 07:40:48.619150 Google Chrome EC: version:
478 07:40:48.622725 ro: moli_v2.0.19454-8a70cbdcf0
479 07:40:48.626308 rw: moli_v2.0.22464-d4ba27cabb
480 07:40:48.629280 running image: 2
481 07:40:48.632578 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
482 07:40:48.642923 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
483 07:40:48.648907 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
484 07:40:48.655890 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
485 07:40:48.665966 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
486 07:40:48.676192 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
487 07:40:48.679524 EC took 945us to calculate image hash
488 07:40:48.689464 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
489 07:40:48.692678 VB2:sync_ec() select_rw=RW(active)
490 07:40:48.700561 EC returned error result code 1
491 07:40:48.704545 PARAM_LIMIT_POWER not supported by EC.
492 07:40:48.711175 Waited 7368us to clear limit power flag.
493 07:40:48.714706 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
494 07:40:48.717911 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
495 07:40:48.724613 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
496 07:40:48.727514 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
497 07:40:48.732014 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
498 07:40:48.735235 TCO_STS: 0000 0000
499 07:40:48.735773 GEN_PMCON: d1001038 00002200
500 07:40:48.738320 GBLRST_CAUSE: 00000040 00000000
501 07:40:48.741828 HPR_CAUSE0: 00000000
502 07:40:48.745155 prev_sleep_state 5
503 07:40:48.748698 Abort disabling TXT, as CPU is not TXT capable.
504 07:40:48.755587 cse_lite: Number of partitions = 3
505 07:40:48.759298 cse_lite: Current partition = RW
506 07:40:48.759809 cse_lite: Next partition = RW
507 07:40:48.762273 cse_lite: Flags = 0x7
508 07:40:48.768917 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
509 07:40:48.779133 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
510 07:40:48.782366 FMAP: area SI_ME found @ 1000 (5238784 bytes)
511 07:40:48.788953 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
512 07:40:48.795377 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
513 07:40:48.802155 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
514 07:40:48.805432 cse_lite: CSE CBFS RW version : 16.1.25.2049
515 07:40:48.808818 CSE Sub-partition update not required
516 07:40:48.814009 Boot Count incremented to 1982
517 07:40:48.820653 CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868
518 07:40:48.827180 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
519 07:40:48.840563 Probing TPM I2C: done! DID_VID 0x00281ae0
520 07:40:48.844295 Locality already claimed
521 07:40:48.847216 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
522 07:40:48.866702 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
523 07:40:48.873572 MRC: Hash idx 0x100d comparison successful.
524 07:40:48.876300 MRC cache found, size f6c8
525 07:40:48.876677 bootmode is set to: 2
526 07:40:48.880199 FW_CONFIG value from CBI is 0x64
527 07:40:48.886828 fw_config match found: STORAGE=STORAGE_EMMC
528 07:40:48.889963 FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)
529 07:40:48.893059 SPD_CACHE: cache found, size 0x1000
530 07:40:48.900797 SPD_CACHE: DIMM0 is the same
531 07:40:48.904163 No memory dimm at address 51
532 07:40:48.907236 SPD_CACHE: DIMM1 is not present
533 07:40:48.910782 No memory dimm at address 52
534 07:40:48.914198 SPD_CACHE: DIMM2 is not present
535 07:40:48.917262 No memory dimm at address 53
536 07:40:48.920233 SPD_CACHE: DIMM3 is not present
537 07:40:48.923656 Use the SPD cache data
538 07:40:48.927011 SPD: module type is DDR4
539 07:40:48.930646 SPD: module part number is M471A5244CB0-CWE
540 07:40:48.937250 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
541 07:40:48.940208 SPD: device width 16 bits, bus width 64 bits
542 07:40:48.943654 SPD: module size is 4096 MB (per channel)
543 07:40:48.997615 CBMEM:
544 07:40:49.001139 IMD: root @ 0x76fff000 254 entries.
545 07:40:49.004157 IMD: root @ 0x76ffec00 62 entries.
546 07:40:49.013674 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
547 07:40:49.017229 FMAP: area RW_VPD found @ f29000 (8192 bytes)
548 07:40:49.019991 RW_VPD is uninitialized or empty.
549 07:40:49.027159 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
550 07:40:49.030634 External stage cache:
551 07:40:49.033599 IMD: root @ 0x7bbff000 254 entries.
552 07:40:49.036589 IMD: root @ 0x7bbfec00 62 entries.
553 07:40:49.044350 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
554 07:40:49.051060 MRC: Checking cached data update for 'RW_MRC_CACHE'.
555 07:40:49.054483 MRC: 'RW_MRC_CACHE' does not need update.
556 07:40:49.054954 1 DIMMs found
557 07:40:49.057688 SMM Memory Map
558 07:40:49.061278 SMRAM : 0x7b800000 0x800000
559 07:40:49.064322 Subregion 0: 0x7b800000 0x200000
560 07:40:49.067877 Subregion 1: 0x7ba00000 0x200000
561 07:40:49.070886 Subregion 2: 0x7bc00000 0x400000
562 07:40:49.074371 top_of_ram = 0x77000000
563 07:40:49.077704 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
564 07:40:49.084020 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
565 07:40:49.090840 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
566 07:40:49.093898 MTRR Range: Start=ff000000 End=0 (Size 1000000)
567 07:40:49.094309 Normal boot
568 07:40:49.104123 CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc
569 07:40:49.113979 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60
570 07:40:49.117426 Processing 237 relocs. Offset value of 0x74ab9000
571 07:40:49.120375 CLFLUSH [0x76ab9000, 0x76ac3e60]
572 07:40:49.124004 CLFLUSH [0x76abea80, 0x76abea84]
573 07:40:49.134268 BS: romstage times (exec / console): total (unknown) / 418 ms
574 07:40:49.137647 CLFLUSH [0x76ab8000, 0x77000000]
575 07:40:49.148246 CLFLUSH [0x7ba00000, 0x7bc00000]
576 07:40:49.159764
577 07:40:49.160226
578 07:40:49.169974 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 postcar starting (log level: 8)...
579 07:40:49.170444 Normal boot
580 07:40:49.176333 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
581 07:40:49.183088 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
582 07:40:49.189792 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
583 07:40:49.199351 CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0
584 07:40:49.247215 Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50
585 07:40:49.254210 Processing 5882 relocs. Offset value of 0x72a2e000
586 07:40:49.257304 BS: postcar times (exec / console): total (unknown) / 54 ms
587 07:40:49.260635
588 07:40:49.261103
589 07:40:49.270709 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 ramstage starting (log level: 8)...
590 07:40:49.273984 Reserving BERT start 76a1d000, size 10000
591 07:40:49.274462 Normal boot
592 07:40:49.280687 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
593 07:40:49.287378 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
594 07:40:49.294005 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
595 07:40:49.300763 FMAP: area RW_VPD found @ f29000 (8192 bytes)
596 07:40:49.303799 Google Chrome EC: version:
597 07:40:49.307150 ro: moli_v2.0.19454-8a70cbdcf0
598 07:40:49.310774 rw: moli_v2.0.22464-d4ba27cabb
599 07:40:49.311149 running image: 2
600 07:40:49.314567 ACPI _SWS is PM1 Index 8 GPE Index -1
601 07:40:49.321242 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
602 07:40:49.324317 FW_CONFIG value from CBI is 0x64
603 07:40:49.327999 PCI: 00:06.0 disabled by fw_config
604 07:40:49.331408 fw_config match found: STORAGE=STORAGE_EMMC
605 07:40:49.337938 fw_config match found: STORAGE=STORAGE_EMMC
606 07:40:49.341358 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
607 07:40:49.350884 CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080
608 07:40:49.354349 microcode: sig=0x906a4 pf=0x80 revision=0x423
609 07:40:49.361211 microcode: Update skipped, already up-to-date
610 07:40:49.367737 CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8
611 07:40:49.398974 Detected 5 core, 5 thread CPU.
612 07:40:49.402272 Setting up SMI for CPU
613 07:40:49.405967 IED base = 0x7bc00000
614 07:40:49.408972 IED size = 0x00400000
615 07:40:49.409439 Will perform SMM setup.
616 07:40:49.412200 CPU: Intel(R) Celeron(R) 7305.
617 07:40:49.415641 LAPIC 0x0 in XAPIC mode.
618 07:40:49.422131 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
619 07:40:49.428713 Processing 18 relocs. Offset value of 0x00030000
620 07:40:49.433273 Attempting to start 4 APs
621 07:40:49.436235 Waiting for 10ms after sending INIT.
622 07:40:49.449584 Waiting for SIPI to complete...
623 07:40:49.452744 done.
624 07:40:49.453204 LAPIC 0x10 in XAPIC mode.
625 07:40:49.455891 Waiting for SIPI to complete...
626 07:40:49.459178 done.
627 07:40:49.459557 LAPIC 0x16 in XAPIC mode.
628 07:40:49.462545 LAPIC 0x12 in XAPIC mode.
629 07:40:49.469306 AP: slot 2 apic_id 16, MCU rev: 0x00000423
630 07:40:49.469781 LAPIC 0x14 in XAPIC mode.
631 07:40:49.476067 AP: slot 3 apic_id 10, MCU rev: 0x00000423
632 07:40:49.478953 AP: slot 4 apic_id 12, MCU rev: 0x00000423
633 07:40:49.482984 AP: slot 1 apic_id 14, MCU rev: 0x00000423
634 07:40:49.485802 smm_setup_relocation_handler: enter
635 07:40:49.489292 smm_setup_relocation_handler: exit
636 07:40:49.499232 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
637 07:40:49.502684 Processing 11 relocs. Offset value of 0x00038000
638 07:40:49.509099 smm_module_setup_stub: stack_top = 0x7b802800
639 07:40:49.512686 smm_module_setup_stub: per cpu stack_size = 0x800
640 07:40:49.519301 smm_module_setup_stub: runtime.start32_offset = 0x4c
641 07:40:49.522469 smm_module_setup_stub: runtime.smm_size = 0x10000
642 07:40:49.529070 SMM Module: stub loaded at 38000. Will call 0x76a5220d
643 07:40:49.532338 Installing permanent SMM handler to 0x7b800000
644 07:40:49.535496 FX_SAVE [0x7b9ff600-0x7ba00000]
645 07:40:49.542258 HANDLER [0x7b9f6000-0x7b9ff528]
646 07:40:49.542728
647 07:40:49.543011 CPU 0
648 07:40:49.546007 ss0 [0x7b9f5c00-0x7b9f6000]
649 07:40:49.549034 stub0 [0x7b9ee000-0x7b9ee208]
650 07:40:49.549533
651 07:40:49.549821 CPU 1
652 07:40:49.552250 ss1 [0x7b9f5800-0x7b9f5c00]
653 07:40:49.558952 stub1 [0x7b9edc00-0x7b9ede08]
654 07:40:49.559439
655 07:40:49.559760 CPU 2
656 07:40:49.562306 ss2 [0x7b9f5400-0x7b9f5800]
657 07:40:49.565749 stub2 [0x7b9ed800-0x7b9eda08]
658 07:40:49.566221
659 07:40:49.566494 CPU 3
660 07:40:49.568939 ss3 [0x7b9f5000-0x7b9f5400]
661 07:40:49.575351 stub3 [0x7b9ed400-0x7b9ed608]
662 07:40:49.575859
663 07:40:49.576120 CPU 4
664 07:40:49.578750 ss4 [0x7b9f4c00-0x7b9f5000]
665 07:40:49.582462 stub4 [0x7b9ed000-0x7b9ed208]
666 07:40:49.582930
667 07:40:49.585518 stacks [0x7b800000-0x7b802800]
668 07:40:49.595492 Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528
669 07:40:49.598997 Processing 255 relocs. Offset value of 0x7b9f6000
670 07:40:49.608845 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
671 07:40:49.611986 Processing 11 relocs. Offset value of 0x7b9ee000
672 07:40:49.615537 smm_module_setup_stub: stack_top = 0x7b802800
673 07:40:49.621887 smm_module_setup_stub: per cpu stack_size = 0x800
674 07:40:49.628968 smm_module_setup_stub: runtime.start32_offset = 0x4c
675 07:40:49.632158 smm_module_setup_stub: runtime.smm_size = 0x200000
676 07:40:49.638761 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
677 07:40:49.645669 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
678 07:40:49.652287 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
679 07:40:49.658796 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
680 07:40:49.662003 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
681 07:40:49.668551 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
682 07:40:49.675361 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
683 07:40:49.682143 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
684 07:40:49.688784 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c
685 07:40:49.692790 Clearing SMI status registers
686 07:40:49.695911 SMI_STS: PM1
687 07:40:49.696280 PM1_STS: WAK PWRBTN
688 07:40:49.706251 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
689 07:40:49.709568 In relocation handler: CPU 0
690 07:40:49.712565 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
691 07:40:49.715785 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 07:40:49.719254 Relocation complete.
693 07:40:49.726435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
694 07:40:49.729425 In relocation handler: CPU 1
695 07:40:49.732888 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
696 07:40:49.739143 Writing SMRR. base = 0x7b800006, mask=0xff800c00
697 07:40:49.739617 Relocation complete.
698 07:40:49.745838 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
699 07:40:49.749406 In relocation handler: CPU 3
700 07:40:49.752594 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
701 07:40:49.759528 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 07:40:49.762907 Relocation complete.
703 07:40:49.769537 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
704 07:40:49.772834 In relocation handler: CPU 2
705 07:40:49.776205 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
706 07:40:49.779125 Writing SMRR. base = 0x7b800006, mask=0xff800c00
707 07:40:49.782971 Relocation complete.
708 07:40:49.789555 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
709 07:40:49.793062 In relocation handler: CPU 4
710 07:40:49.796541 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
711 07:40:49.803265 Writing SMRR. base = 0x7b800006, mask=0xff800c00
712 07:40:49.803778 Relocation complete.
713 07:40:49.806096 Initializing CPU #0
714 07:40:49.809661 CPU: vendor Intel device 906a4
715 07:40:49.812744 CPU: family 06, model 9a, stepping 04
716 07:40:49.816268 Clearing out pending MCEs
717 07:40:49.819284 cpu: energy policy set to 7
718 07:40:49.819365 Turbo is unavailable
719 07:40:49.826409 microcode: Update skipped, already up-to-date
720 07:40:49.826884 CPU #0 initialized
721 07:40:49.829786 Initializing CPU #4
722 07:40:49.832833 Initializing CPU #3
723 07:40:49.833188 Initializing CPU #1
724 07:40:49.836032 CPU: vendor Intel device 906a4
725 07:40:49.839352 CPU: family 06, model 9a, stepping 04
726 07:40:49.842342 Initializing CPU #2
727 07:40:49.846020 CPU: vendor Intel device 906a4
728 07:40:49.849209 CPU: family 06, model 9a, stepping 04
729 07:40:49.852489 Clearing out pending MCEs
730 07:40:49.855893 Clearing out pending MCEs
731 07:40:49.856214 cpu: energy policy set to 7
732 07:40:49.859034 CPU: vendor Intel device 906a4
733 07:40:49.862321 CPU: family 06, model 9a, stepping 04
734 07:40:49.865869 CPU: vendor Intel device 906a4
735 07:40:49.872518 CPU: family 06, model 9a, stepping 04
736 07:40:49.872930 Clearing out pending MCEs
737 07:40:49.875558 cpu: energy policy set to 7
738 07:40:49.878883 cpu: energy policy set to 7
739 07:40:49.882788 Clearing out pending MCEs
740 07:40:49.885803 microcode: Update skipped, already up-to-date
741 07:40:49.889092 CPU #3 initialized
742 07:40:49.892387 cpu: energy policy set to 7
743 07:40:49.895461 microcode: Update skipped, already up-to-date
744 07:40:49.899176 CPU #1 initialized
745 07:40:49.902859 microcode: Update skipped, already up-to-date
746 07:40:49.906092 CPU #4 initialized
747 07:40:49.909320 microcode: Update skipped, already up-to-date
748 07:40:49.912382 CPU #2 initialized
749 07:40:49.915675 bsp_do_flight_plan done after 453 msecs.
750 07:40:49.916035 Enabling SMIs.
751 07:40:49.922043 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 244 / 352 ms
752 07:40:49.939313 Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)
753 07:40:49.945984 Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)
754 07:40:49.952758 Probing TPM I2C: done! DID_VID 0x00281ae0
755 07:40:49.956025 Locality already claimed
756 07:40:49.959509 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
757 07:40:49.970587 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
758 07:40:49.973689 Enabling GPIO PM b/c CR50 has long IRQ pulse support
759 07:40:49.980092 fw_config match found: AUDIO=NAU88L25B_I2S
760 07:40:49.983639 CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4
761 07:40:49.990256 Found a VBT of 8704 bytes after decompression
762 07:40:49.990702 PsysPmax = 214W
763 07:40:49.994040 PCI 1.0, PIN A, using IRQ #16
764 07:40:49.997249 PCI 2.0, PIN A, using IRQ #17
765 07:40:50.000685 PCI 4.0, PIN A, using IRQ #18
766 07:40:50.004005 PCI 5.0, PIN A, using IRQ #16
767 07:40:50.007142 PCI 6.0, PIN A, using IRQ #16
768 07:40:50.010264 PCI 6.2, PIN C, using IRQ #18
769 07:40:50.014008 PCI 7.0, PIN A, using IRQ #19
770 07:40:50.017217 PCI 7.1, PIN B, using IRQ #20
771 07:40:50.020535 PCI 7.2, PIN C, using IRQ #21
772 07:40:50.023613 PCI 7.3, PIN D, using IRQ #22
773 07:40:50.027067 PCI 8.0, PIN A, using IRQ #23
774 07:40:50.030447 PCI D.0, PIN A, using IRQ #17
775 07:40:50.034508 PCI D.1, PIN B, using IRQ #19
776 07:40:50.037055 PCI 10.0, PIN A, using IRQ #24
777 07:40:50.040435 PCI 10.1, PIN B, using IRQ #25
778 07:40:50.041027 PCI 10.6, PIN C, using IRQ #20
779 07:40:50.043365 PCI 10.7, PIN D, using IRQ #21
780 07:40:50.047071 PCI 11.0, PIN A, using IRQ #26
781 07:40:50.050450 PCI 11.1, PIN B, using IRQ #27
782 07:40:50.053548 PCI 11.2, PIN C, using IRQ #28
783 07:40:50.056855 PCI 11.3, PIN D, using IRQ #29
784 07:40:50.060031 PCI 12.0, PIN A, using IRQ #30
785 07:40:50.063891 PCI 12.6, PIN B, using IRQ #31
786 07:40:50.066824 PCI 12.7, PIN C, using IRQ #22
787 07:40:50.070264 PCI 13.0, PIN A, using IRQ #32
788 07:40:50.073828 PCI 13.1, PIN B, using IRQ #33
789 07:40:50.076823 PCI 13.2, PIN C, using IRQ #34
790 07:40:50.079942 PCI 13.3, PIN D, using IRQ #35
791 07:40:50.083569 PCI 14.0, PIN B, using IRQ #23
792 07:40:50.087258 PCI 14.1, PIN A, using IRQ #36
793 07:40:50.090179 PCI 14.3, PIN C, using IRQ #17
794 07:40:50.093472 PCI 15.0, PIN A, using IRQ #37
795 07:40:50.093850 PCI 15.1, PIN B, using IRQ #38
796 07:40:50.096735 PCI 15.2, PIN C, using IRQ #39
797 07:40:50.100122 PCI 15.3, PIN D, using IRQ #40
798 07:40:50.103729 PCI 16.0, PIN A, using IRQ #18
799 07:40:50.106745 PCI 16.1, PIN B, using IRQ #19
800 07:40:50.110142 PCI 16.2, PIN C, using IRQ #20
801 07:40:50.113530 PCI 16.3, PIN D, using IRQ #21
802 07:40:50.116611 PCI 16.4, PIN A, using IRQ #18
803 07:40:50.120000 PCI 16.5, PIN B, using IRQ #19
804 07:40:50.123133 PCI 17.0, PIN A, using IRQ #22
805 07:40:50.126881 PCI 19.0, PIN A, using IRQ #41
806 07:40:50.130026 PCI 19.1, PIN B, using IRQ #42
807 07:40:50.133505 PCI 19.2, PIN C, using IRQ #43
808 07:40:50.136603 PCI 1C.0, PIN A, using IRQ #16
809 07:40:50.139981 PCI 1C.1, PIN B, using IRQ #17
810 07:40:50.142985 PCI 1C.2, PIN C, using IRQ #18
811 07:40:50.146686 PCI 1C.3, PIN D, using IRQ #19
812 07:40:50.147152 PCI 1C.4, PIN A, using IRQ #16
813 07:40:50.149961 PCI 1C.5, PIN B, using IRQ #17
814 07:40:50.152996 PCI 1C.6, PIN C, using IRQ #18
815 07:40:50.156563 PCI 1C.7, PIN D, using IRQ #19
816 07:40:50.160090 PCI 1D.0, PIN A, using IRQ #16
817 07:40:50.163724 PCI 1D.1, PIN B, using IRQ #17
818 07:40:50.166464 PCI 1D.2, PIN C, using IRQ #18
819 07:40:50.170314 PCI 1D.3, PIN D, using IRQ #19
820 07:40:50.173514 PCI 1E.0, PIN A, using IRQ #23
821 07:40:50.176692 PCI 1E.1, PIN B, using IRQ #20
822 07:40:50.180042 PCI 1E.2, PIN C, using IRQ #44
823 07:40:50.183375 PCI 1E.3, PIN D, using IRQ #45
824 07:40:50.186962 PCI 1F.3, PIN B, using IRQ #22
825 07:40:50.190158 PCI 1F.4, PIN C, using IRQ #23
826 07:40:50.192878 PCI 1F.6, PIN D, using IRQ #20
827 07:40:50.196620 PCI 1F.7, PIN A, using IRQ #21
828 07:40:50.199688 IRQ: Using dynamically assigned PCI IO-APIC IRQs
829 07:40:50.206622 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
830 07:40:50.271474 FSPS returned 0
831 07:40:50.275018 Executing Phase 1 of FspMultiPhaseSiInit
832 07:40:50.284925 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
833 07:40:50.288189 port C0 DISC req: usage 1 usb3 1 usb2 1
834 07:40:50.291929 Raw Buffer output 0 00000111
835 07:40:50.294992 Raw Buffer output 1 00000000
836 07:40:50.298640 pmc_send_ipc_cmd succeeded
837 07:40:50.302130 port C1 DISC req: usage 1 usb3 3 usb2 3
838 07:40:50.305201 Raw Buffer output 0 00000331
839 07:40:50.308580 Raw Buffer output 1 00000000
840 07:40:50.312714 pmc_send_ipc_cmd succeeded
841 07:40:50.319135 AP Mode Entry enabled, skip waiting for DisplayPort connection
842 07:40:50.325785 Detected 5 core, 5 thread CPU.
843 07:40:50.328797 Detected 5 core, 5 thread CPU.
844 07:40:50.334225 Detected 5 core, 5 thread CPU.
845 07:40:50.337325 Detected 5 core, 5 thread CPU.
846 07:40:50.340285 Detected 5 core, 5 thread CPU.
847 07:40:50.343526 Detected 5 core, 5 thread CPU.
848 07:40:50.346874 Detected 5 core, 5 thread CPU.
849 07:40:50.350222 Detected 5 core, 5 thread CPU.
850 07:40:50.353892 Detected 5 core, 5 thread CPU.
851 07:40:50.357587 Detected 5 core, 5 thread CPU.
852 07:40:50.360832 Detected 5 core, 5 thread CPU.
853 07:40:50.364144 Detected 5 core, 5 thread CPU.
854 07:40:50.367342 Detected 5 core, 5 thread CPU.
855 07:40:50.370741 Detected 5 core, 5 thread CPU.
856 07:40:50.374204 Detected 5 core, 5 thread CPU.
857 07:40:50.377311 Detected 5 core, 5 thread CPU.
858 07:40:50.475494 Detected 5 core, 5 thread CPU.
859 07:40:50.478600 Detected 5 core, 5 thread CPU.
860 07:40:50.482068 Detected 5 core, 5 thread CPU.
861 07:40:50.485179 Detected 5 core, 5 thread CPU.
862 07:40:50.488657 Detected 5 core, 5 thread CPU.
863 07:40:50.492214 Detected 5 core, 5 thread CPU.
864 07:40:50.495245 Detected 5 core, 5 thread CPU.
865 07:40:50.498725 Detected 5 core, 5 thread CPU.
866 07:40:50.502137 Detected 5 core, 5 thread CPU.
867 07:40:50.505475 Detected 5 core, 5 thread CPU.
868 07:40:50.508748 Detected 5 core, 5 thread CPU.
869 07:40:50.512164 Detected 5 core, 5 thread CPU.
870 07:40:50.515513 Detected 5 core, 5 thread CPU.
871 07:40:50.518796 Detected 5 core, 5 thread CPU.
872 07:40:50.521752 Display FSP Version Info HOB
873 07:40:50.525380 Reference Code - CPU = c.0.65.70
874 07:40:50.525893 uCode Version = 0.0.4.23
875 07:40:50.528708 TXT ACM version = ff.ff.ff.ffff
876 07:40:50.532199 Reference Code - ME = c.0.65.70
877 07:40:50.535549 MEBx version = 0.0.0.0
878 07:40:50.538829 ME Firmware Version = Lite SKU
879 07:40:50.542263 Reference Code - PCH = c.0.65.70
880 07:40:50.545208 PCH-CRID Status = Disabled
881 07:40:50.548817 PCH-CRID Original Value = ff.ff.ff.ffff
882 07:40:50.552037 PCH-CRID New Value = ff.ff.ff.ffff
883 07:40:50.555641 OPROM - RST - RAID = ff.ff.ff.ffff
884 07:40:50.558713 PCH Hsio Version = 4.0.0.0
885 07:40:50.562263 Reference Code - SA - System Agent = c.0.65.70
886 07:40:50.565716 Reference Code - MRC = 0.0.3.80
887 07:40:50.568795 SA - PCIe Version = c.0.65.70
888 07:40:50.572162 SA-CRID Status = Disabled
889 07:40:50.575715 SA-CRID Original Value = 0.0.0.4
890 07:40:50.578839 SA-CRID New Value = 0.0.0.4
891 07:40:50.581997 OPROM - VBIOS = ff.ff.ff.ffff
892 07:40:50.585226 IO Manageability Engine FW Version = 24.0.4.0
893 07:40:50.588987 PHY Build Version = 0.0.0.2016
894 07:40:50.592188 Thunderbolt(TM) FW Version = 11.5.0.0
895 07:40:50.598700 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
896 07:40:50.602262 Found PCIe Root Port #7 at PCI: 00:1c.0.
897 07:40:50.608480 Found PCIe Root Port #8 at PCI: 00:1c.7.
898 07:40:50.611787 Found PCIe Root Port #12 at PCI: 00:1d.0.
899 07:40:50.624966 pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.
900 07:40:50.632044 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
901 07:40:50.638779 Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.
902 07:40:50.641885 Found PCIe Root Port #1 at PCI: 00:07.0.
903 07:40:50.645206 Found PCIe Root Port #2 at PCI: 00:07.1.
904 07:40:50.652028 Found PCIe Root Port #3 at PCI: 00:07.2.
905 07:40:50.652497 Sending EOP early from SoC
906 07:40:50.655321 HECI: Sending End-of-Post
907 07:40:50.661936 BS: BS_DEV_INIT_CHIPS run times (exec / console): 186 / 545 ms
908 07:40:50.665414 Enumerating buses...
909 07:40:50.668732 Show all devs... Before device enumeration.
910 07:40:50.672032 Root Device: enabled 1
911 07:40:50.675379 CPU_CLUSTER: 0: enabled 1
912 07:40:50.675875 DOMAIN: 0000: enabled 1
913 07:40:50.678568 GPIO: 0: enabled 1
914 07:40:50.681881 PCI: 00:00.0: enabled 1
915 07:40:50.682351 PCI: 00:01.0: enabled 0
916 07:40:50.685206 PCI: 00:01.1: enabled 0
917 07:40:50.688622 PCI: 00:02.0: enabled 1
918 07:40:50.692048 PCI: 00:04.0: enabled 1
919 07:40:50.692500 PCI: 00:05.0: enabled 0
920 07:40:50.695166 PCI: 00:06.0: enabled 0
921 07:40:50.698581 PCI: 00:06.2: enabled 0
922 07:40:50.699049 PCI: 00:07.0: enabled 1
923 07:40:50.702055 PCI: 00:07.1: enabled 1
924 07:40:50.705230 PCI: 00:07.2: enabled 1
925 07:40:50.708547 PCI: 00:07.3: enabled 0
926 07:40:50.709012 PCI: 00:08.0: enabled 0
927 07:40:50.712038 PCI: 00:09.0: enabled 0
928 07:40:50.715249 PCI: 00:0a.0: enabled 1
929 07:40:50.718596 PCI: 00:0d.0: enabled 1
930 07:40:50.719023 PCI: 00:0d.1: enabled 0
931 07:40:50.721829 PCI: 00:0d.2: enabled 1
932 07:40:50.725113 PCI: 00:0d.3: enabled 1
933 07:40:50.728319 PCI: 00:0e.0: enabled 0
934 07:40:50.728712 PCI: 00:10.0: enabled 0
935 07:40:50.731836 PCI: 00:10.1: enabled 0
936 07:40:50.735128 PCI: 00:10.6: enabled 0
937 07:40:50.735548 PCI: 00:10.7: enabled 0
938 07:40:50.738295 PCI: 00:12.0: enabled 0
939 07:40:50.741877 PCI: 00:12.6: enabled 0
940 07:40:50.745040 PCI: 00:12.7: enabled 0
941 07:40:50.745133 PCI: 00:13.0: enabled 0
942 07:40:50.748622 PCI: 00:14.0: enabled 1
943 07:40:50.751979 PCI: 00:14.1: enabled 0
944 07:40:50.755403 PCI: 00:14.2: enabled 1
945 07:40:50.755837 PCI: 00:14.3: enabled 1
946 07:40:50.758617 PCI: 00:15.0: enabled 1
947 07:40:50.761803 PCI: 00:15.1: enabled 1
948 07:40:50.762209 PCI: 00:15.2: enabled 0
949 07:40:50.765424 PCI: 00:15.3: enabled 0
950 07:40:50.768438 PCI: 00:16.0: enabled 1
951 07:40:50.771970 PCI: 00:16.1: enabled 0
952 07:40:50.772328 PCI: 00:16.2: enabled 0
953 07:40:50.775310 PCI: 00:16.3: enabled 0
954 07:40:50.778537 PCI: 00:16.4: enabled 0
955 07:40:50.782111 PCI: 00:16.5: enabled 0
956 07:40:50.782621 PCI: 00:17.0: enabled 1
957 07:40:50.785323 PCI: 00:19.0: enabled 0
958 07:40:50.788497 PCI: 00:19.1: enabled 0
959 07:40:50.791935 PCI: 00:19.2: enabled 0
960 07:40:50.792398 PCI: 00:1a.0: enabled 0
961 07:40:50.794949 PCI: 00:1c.0: enabled 0
962 07:40:50.798793 PCI: 00:1c.1: enabled 0
963 07:40:50.799266 PCI: 00:1c.2: enabled 0
964 07:40:50.801957 PCI: 00:1c.3: enabled 0
965 07:40:50.805302 PCI: 00:1c.4: enabled 0
966 07:40:50.808641 PCI: 00:1c.5: enabled 1
967 07:40:50.809020 PCI: 00:1c.0: enabled 1
968 07:40:50.811596 PCI: 00:1c.7: enabled 1
969 07:40:50.815160 PCI: 00:1d.0: enabled 0
970 07:40:50.818863 PCI: 00:1d.1: enabled 0
971 07:40:50.819334 PCI: 00:1d.2: enabled 0
972 07:40:50.821670 PCI: 00:1d.0: enabled 1
973 07:40:50.825177 PCI: 00:1e.0: enabled 1
974 07:40:50.828417 PCI: 00:1e.1: enabled 0
975 07:40:50.828812 PCI: 00:1e.2: enabled 0
976 07:40:50.831792 PCI: 00:1e.3: enabled 1
977 07:40:50.834874 PCI: 00:1f.0: enabled 1
978 07:40:50.835227 PCI: 00:1f.1: enabled 0
979 07:40:50.838438 PCI: 00:1f.2: enabled 1
980 07:40:50.842011 PCI: 00:1f.3: enabled 1
981 07:40:50.845116 PCI: 00:1f.4: enabled 1
982 07:40:50.845490 PCI: 00:1f.5: enabled 1
983 07:40:50.848285 PCI: 00:1f.6: enabled 0
984 07:40:50.851966 PCI: 00:1f.7: enabled 0
985 07:40:50.854796 GENERIC: 0.0: enabled 1
986 07:40:50.855164 GENERIC: 0.0: enabled 1
987 07:40:50.858339 GENERIC: 1.0: enabled 1
988 07:40:50.861604 GENERIC: 0.0: enabled 1
989 07:40:50.865021 GENERIC: 1.0: enabled 1
990 07:40:50.865382 USB0 port 0: enabled 1
991 07:40:50.868279 GENERIC: 0.0: enabled 1
992 07:40:50.871855 GENERIC: 0.0: enabled 1
993 07:40:50.872336 USB0 port 0: enabled 1
994 07:40:50.875152 GENERIC: 0.0: enabled 1
995 07:40:50.878623 I2C: 00:1a: enabled 1
996 07:40:50.879095 I2C: 00:50: enabled 1
997 07:40:50.881664 PCI: 00:00.0: enabled 1
998 07:40:50.884947 PCI: 00:00.0: enabled 1
999 07:40:50.888475 GENERIC: 0.0: enabled 1
1000 07:40:50.888950 GENERIC: 0.0: enabled 1
1001 07:40:50.892231 PNP: 0c09.0: enabled 1
1002 07:40:50.895291 GENERIC: 0.0: enabled 1
1003 07:40:50.931787 USB3 port 0: enabled 1
1004 07:40:50.932331 USB3 port 1: enabled 0
1005 07:40:50.932684 USB3 port 2: enabled 1
1006 07:40:50.932961 USB3 port 3: enabled 0
1007 07:40:50.933234 USB2 port 0: enabled 1
1008 07:40:50.933492 USB2 port 1: enabled 0
1009 07:40:50.934053 USB2 port 2: enabled 1
1010 07:40:50.934318 USB2 port 3: enabled 1
1011 07:40:50.934598 USB2 port 4: enabled 1
1012 07:40:50.934867 USB2 port 5: enabled 1
1013 07:40:50.935127 USB2 port 6: enabled 1
1014 07:40:50.935386 USB2 port 7: enabled 1
1015 07:40:50.935677 USB2 port 8: enabled 0
1016 07:40:50.935943 USB2 port 9: enabled 1
1017 07:40:50.936262 USB3 port 0: enabled 1
1018 07:40:50.936518 USB3 port 1: enabled 1
1019 07:40:50.938666 USB3 port 2: enabled 1
1020 07:40:50.939030 USB3 port 3: enabled 1
1021 07:40:50.939356 GENERIC: 0.0: enabled 1
1022 07:40:50.941804 GENERIC: 1.0: enabled 1
1023 07:40:50.942126 APIC: 00: enabled 1
1024 07:40:50.945840 APIC: 14: enabled 1
1025 07:40:50.948704 APIC: 16: enabled 1
1026 07:40:50.949145 APIC: 10: enabled 1
1027 07:40:50.952049 APIC: 12: enabled 1
1028 07:40:50.955289 Compare with tree...
1029 07:40:50.955648 Root Device: enabled 1
1030 07:40:50.958712 CPU_CLUSTER: 0: enabled 1
1031 07:40:50.962149 APIC: 00: enabled 1
1032 07:40:50.962665 APIC: 14: enabled 1
1033 07:40:50.965688 APIC: 16: enabled 1
1034 07:40:50.968693 APIC: 10: enabled 1
1035 07:40:50.971796 APIC: 12: enabled 1
1036 07:40:50.972196 DOMAIN: 0000: enabled 1
1037 07:40:50.975073 GPIO: 0: enabled 1
1038 07:40:50.978598 PCI: 00:00.0: enabled 1
1039 07:40:50.981656 PCI: 00:01.0: enabled 0
1040 07:40:50.981901 PCI: 00:01.1: enabled 0
1041 07:40:50.985237 PCI: 00:02.0: enabled 1
1042 07:40:50.988766 PCI: 00:04.0: enabled 1
1043 07:40:50.992210 GENERIC: 0.0: enabled 1
1044 07:40:50.995035 PCI: 00:05.0: enabled 0
1045 07:40:50.995397 PCI: 00:06.0: enabled 0
1046 07:40:50.998787 PCI: 00:06.2: enabled 0
1047 07:40:51.001685 PCI: 00:07.0: enabled 1
1048 07:40:51.005147 GENERIC: 0.0: enabled 1
1049 07:40:51.005459 PCI: 00:07.1: enabled 1
1050 07:40:51.008785 GENERIC: 1.0: enabled 1
1051 07:40:51.011999 PCI: 00:07.2: enabled 1
1052 07:40:51.015256 GENERIC: 0.0: enabled 1
1053 07:40:51.018689 PCI: 00:08.0: enabled 0
1054 07:40:51.021641 PCI: 00:09.0: enabled 0
1055 07:40:51.021984 PCI: 00:0a.0: enabled 1
1056 07:40:51.025012 PCI: 00:0d.0: enabled 1
1057 07:40:51.028617 USB0 port 0: enabled 1
1058 07:40:51.031611 USB3 port 0: enabled 1
1059 07:40:51.035099 USB3 port 1: enabled 0
1060 07:40:51.035590 USB3 port 2: enabled 1
1061 07:40:51.038559 USB3 port 3: enabled 0
1062 07:40:51.041774 PCI: 00:0d.1: enabled 0
1063 07:40:51.045056 PCI: 00:0d.2: enabled 1
1064 07:40:51.048532 GENERIC: 0.0: enabled 1
1065 07:40:51.048939 PCI: 00:0d.3: enabled 1
1066 07:40:51.051851 GENERIC: 0.0: enabled 1
1067 07:40:51.055590 PCI: 00:0e.0: enabled 0
1068 07:40:51.058537 PCI: 00:10.0: enabled 0
1069 07:40:51.061894 PCI: 00:10.1: enabled 0
1070 07:40:51.062346 PCI: 00:10.6: enabled 0
1071 07:40:51.065441 PCI: 00:10.7: enabled 0
1072 07:40:51.068522 PCI: 00:12.0: enabled 0
1073 07:40:51.072024 PCI: 00:12.6: enabled 0
1074 07:40:51.075116 PCI: 00:12.7: enabled 0
1075 07:40:51.075591 PCI: 00:13.0: enabled 0
1076 07:40:51.078665 PCI: 00:14.0: enabled 1
1077 07:40:51.081886 USB0 port 0: enabled 1
1078 07:40:51.085142 USB2 port 0: enabled 1
1079 07:40:51.088510 USB2 port 1: enabled 0
1080 07:40:51.088958 USB2 port 2: enabled 1
1081 07:40:51.091923 USB2 port 3: enabled 1
1082 07:40:51.094958 USB2 port 4: enabled 1
1083 07:40:51.098610 USB2 port 5: enabled 1
1084 07:40:51.102026 USB2 port 6: enabled 1
1085 07:40:51.105381 USB2 port 7: enabled 1
1086 07:40:51.105833 USB2 port 8: enabled 0
1087 07:40:51.108205 USB2 port 9: enabled 1
1088 07:40:51.111782 USB3 port 0: enabled 1
1089 07:40:51.115076 USB3 port 1: enabled 1
1090 07:40:51.118511 USB3 port 2: enabled 1
1091 07:40:51.118968 USB3 port 3: enabled 1
1092 07:40:51.121828 PCI: 00:14.1: enabled 0
1093 07:40:51.124812 PCI: 00:14.2: enabled 1
1094 07:40:51.128207 PCI: 00:14.3: enabled 1
1095 07:40:51.131365 GENERIC: 0.0: enabled 1
1096 07:40:51.131749 PCI: 00:15.0: enabled 1
1097 07:40:51.135086 I2C: 00:1a: enabled 1
1098 07:40:51.138297 PCI: 00:15.1: enabled 1
1099 07:40:51.141569 I2C: 00:50: enabled 1
1100 07:40:51.144665 PCI: 00:15.2: enabled 0
1101 07:40:51.145128 PCI: 00:15.3: enabled 0
1102 07:40:51.147972 PCI: 00:16.0: enabled 1
1103 07:40:51.151528 PCI: 00:16.1: enabled 0
1104 07:40:51.154571 PCI: 00:16.2: enabled 0
1105 07:40:51.158208 PCI: 00:16.3: enabled 0
1106 07:40:51.158664 PCI: 00:16.4: enabled 0
1107 07:40:51.161332 PCI: 00:16.5: enabled 0
1108 07:40:51.164858 PCI: 00:17.0: enabled 1
1109 07:40:51.167829 PCI: 00:19.0: enabled 0
1110 07:40:51.171574 PCI: 00:19.1: enabled 0
1111 07:40:51.172020 PCI: 00:19.2: enabled 0
1112 07:40:51.174722 PCI: 00:1a.0: enabled 0
1113 07:40:51.178178 PCI: 00:1c.0: enabled 1
1114 07:40:51.181412 PCI: 00:00.0: enabled 1
1115 07:40:51.184974 PCI: 00:1c.7: enabled 1
1116 07:40:51.185445 GENERIC: 0.0: enabled 1
1117 07:40:51.187981 PCI: 00:1d.0: enabled 1
1118 07:40:51.191274 GENERIC: 0.0: enabled 1
1119 07:40:51.194791 PCI: 00:1e.0: enabled 1
1120 07:40:51.197921 PCI: 00:1e.1: enabled 0
1121 07:40:51.198380 PCI: 00:1e.2: enabled 0
1122 07:40:51.201475 PCI: 00:1e.3: enabled 1
1123 07:40:51.204633 PCI: 00:1f.0: enabled 1
1124 07:40:51.208198 PNP: 0c09.0: enabled 1
1125 07:40:51.211123 PCI: 00:1f.1: enabled 0
1126 07:40:51.211650 PCI: 00:1f.2: enabled 1
1127 07:40:51.214227 GENERIC: 0.0: enabled 1
1128 07:40:51.217755 GENERIC: 0.0: enabled 1
1129 07:40:51.221386 GENERIC: 1.0: enabled 1
1130 07:40:51.224644 PCI: 00:1f.3: enabled 1
1131 07:40:51.225012 PCI: 00:1f.4: enabled 1
1132 07:40:51.228001 PCI: 00:1f.5: enabled 1
1133 07:40:51.231126 PCI: 00:1f.6: enabled 0
1134 07:40:51.234628 PCI: 00:1f.7: enabled 0
1135 07:40:51.237977 Root Device scanning...
1136 07:40:51.238441 scan_static_bus for Root Device
1137 07:40:51.241286 CPU_CLUSTER: 0 enabled
1138 07:40:51.244175 DOMAIN: 0000 enabled
1139 07:40:51.247490 DOMAIN: 0000 scanning...
1140 07:40:51.247842 PCI: pci_scan_bus for bus 00
1141 07:40:51.250910 PCI: 00:00.0 [8086/0000] ops
1142 07:40:51.254596 PCI: 00:00.0 [8086/4619] enabled
1143 07:40:51.257792 PCI: 00:02.0 [8086/0000] bus ops
1144 07:40:51.261261 PCI: 00:02.0 [8086/46b3] enabled
1145 07:40:51.264826 PCI: 00:04.0 [8086/0000] bus ops
1146 07:40:51.267744 PCI: 00:04.0 [8086/461d] enabled
1147 07:40:51.274491 PCI: 00:07.0 subordinate bus PCI Express
1148 07:40:51.277832 PCI: 00:07.0 hot-plug capable
1149 07:40:51.281452 PCI: 00:07.0 [8086/466e] enabled
1150 07:40:51.284216 PCI: 00:07.1 subordinate bus PCI Express
1151 07:40:51.288092 PCI: 00:07.1 hot-plug capable
1152 07:40:51.291297 PCI: 00:07.1 [8086/463f] enabled
1153 07:40:51.294575 PCI: 00:07.2 subordinate bus PCI Express
1154 07:40:51.297896 PCI: 00:07.2 hot-plug capable
1155 07:40:51.301444 PCI: 00:07.2 [8086/462f] enabled
1156 07:40:51.304502 PCI: 00:08.0 [8086/464f] disabled
1157 07:40:51.307806 PCI: 00:0a.0 [8086/467d] enabled
1158 07:40:51.310997 PCI: 00:0d.0 [8086/0000] bus ops
1159 07:40:51.314810 PCI: 00:0d.0 [8086/461e] enabled
1160 07:40:51.317686 PCI: 00:0d.2 [8086/0000] bus ops
1161 07:40:51.321159 PCI: 00:0d.2 [8086/463e] enabled
1162 07:40:51.323765 PCI: 00:0d.3 [8086/0000] bus ops
1163 07:40:51.327438 PCI: 00:0d.3 [8086/466d] enabled
1164 07:40:51.331227 PCI: 00:14.0 [8086/0000] bus ops
1165 07:40:51.334150 PCI: 00:14.0 [8086/51ed] enabled
1166 07:40:51.337621 PCI: 00:14.2 [8086/51ef] enabled
1167 07:40:51.340957 PCI: 00:14.3 [8086/0000] bus ops
1168 07:40:51.344228 PCI: 00:14.3 [8086/51f0] enabled
1169 07:40:51.347385 PCI: 00:15.0 [8086/0000] bus ops
1170 07:40:51.350993 PCI: 00:15.0 [8086/51e8] enabled
1171 07:40:51.354297 PCI: 00:15.1 [8086/0000] bus ops
1172 07:40:51.357920 PCI: 00:15.1 [8086/51e9] enabled
1173 07:40:51.361355 PCI: 00:16.0 [8086/0000] ops
1174 07:40:51.364356 PCI: 00:16.0 [8086/51e0] enabled
1175 07:40:51.367477 PCI: Static device PCI: 00:17.0 not found, disabling it.
1176 07:40:51.371039 PCI: 00:1c.0 [8086/0000] bus ops
1177 07:40:51.374642 PCI: 00:1c.0 [8086/51be] enabled
1178 07:40:51.377699 PCI: 00:1c.7 [8086/0000] bus ops
1179 07:40:51.381110 PCI: 00:1c.7 [8086/51bf] enabled
1180 07:40:51.384479 PCI: 00:1d.0 [8086/0000] bus ops
1181 07:40:51.387852 PCI: 00:1d.0 [8086/51b3] enabled
1182 07:40:51.390914 PCI: 00:1e.0 [8086/0000] ops
1183 07:40:51.394727 PCI: 00:1e.0 [8086/51a8] enabled
1184 07:40:51.398038 PCI: 00:1e.3 [8086/0000] bus ops
1185 07:40:51.401481 PCI: 00:1e.3 [8086/51ab] enabled
1186 07:40:51.404605 PCI: 00:1f.0 [8086/0000] bus ops
1187 07:40:51.408118 PCI: 00:1f.0 [8086/5182] enabled
1188 07:40:51.411284 RTC Init
1189 07:40:51.414947 Set power on after power failure.
1190 07:40:51.415410 Disabling Deep S3
1191 07:40:51.418048 Disabling Deep S3
1192 07:40:51.421202 Disabling Deep S4
1193 07:40:51.421644 Disabling Deep S4
1194 07:40:51.424364 Disabling Deep S5
1195 07:40:51.424810 Disabling Deep S5
1196 07:40:51.428161 PCI: 00:1f.2 [0000/0000] hidden
1197 07:40:51.431478 PCI: 00:1f.3 [8086/0000] bus ops
1198 07:40:51.434328 PCI: 00:1f.3 [8086/51c8] enabled
1199 07:40:51.437641 PCI: 00:1f.4 [8086/0000] bus ops
1200 07:40:51.441209 PCI: 00:1f.4 [8086/51a3] enabled
1201 07:40:51.444243 PCI: 00:1f.5 [8086/0000] bus ops
1202 07:40:51.447366 PCI: 00:1f.5 [8086/51a4] enabled
1203 07:40:51.451276 GPIO: 0 enabled
1204 07:40:51.454434 PCI: Leftover static devices:
1205 07:40:51.454898 PCI: 00:01.0
1206 07:40:51.455160 PCI: 00:01.1
1207 07:40:51.457700 PCI: 00:05.0
1208 07:40:51.458284 PCI: 00:06.0
1209 07:40:51.460856 PCI: 00:06.2
1210 07:40:51.461238 PCI: 00:09.0
1211 07:40:51.464477 PCI: 00:0d.1
1212 07:40:51.464965 PCI: 00:0e.0
1213 07:40:51.465309 PCI: 00:10.0
1214 07:40:51.467451 PCI: 00:10.1
1215 07:40:51.467826 PCI: 00:10.6
1216 07:40:51.471092 PCI: 00:10.7
1217 07:40:51.471584 PCI: 00:12.0
1218 07:40:51.471857 PCI: 00:12.6
1219 07:40:51.474304 PCI: 00:12.7
1220 07:40:51.474768 PCI: 00:13.0
1221 07:40:51.477542 PCI: 00:14.1
1222 07:40:51.478016 PCI: 00:15.2
1223 07:40:51.478279 PCI: 00:15.3
1224 07:40:51.481071 PCI: 00:16.1
1225 07:40:51.481534 PCI: 00:16.2
1226 07:40:51.484367 PCI: 00:16.3
1227 07:40:51.484828 PCI: 00:16.4
1228 07:40:51.487330 PCI: 00:16.5
1229 07:40:51.487706 PCI: 00:17.0
1230 07:40:51.487958 PCI: 00:19.0
1231 07:40:51.490821 PCI: 00:19.1
1232 07:40:51.491172 PCI: 00:19.2
1233 07:40:51.494063 PCI: 00:1a.0
1234 07:40:51.494454 PCI: 00:1e.1
1235 07:40:51.494704 PCI: 00:1e.2
1236 07:40:51.497992 PCI: 00:1f.1
1237 07:40:51.498452 PCI: 00:1f.6
1238 07:40:51.501171 PCI: 00:1f.7
1239 07:40:51.504551 PCI: Check your devicetree.cb.
1240 07:40:51.505037 PCI: 00:02.0 scanning...
1241 07:40:51.507868 scan_generic_bus for PCI: 00:02.0
1242 07:40:51.514344 scan_generic_bus for PCI: 00:02.0 done
1243 07:40:51.517573 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1244 07:40:51.521034 PCI: 00:04.0 scanning...
1245 07:40:51.524146 scan_generic_bus for PCI: 00:04.0
1246 07:40:51.524586 GENERIC: 0.0 enabled
1247 07:40:51.530767 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1248 07:40:51.537523 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1249 07:40:51.537936 PCI: 00:07.0 scanning...
1250 07:40:51.544366 do_pci_scan_bridge for PCI: 00:07.0
1251 07:40:51.544844 PCI: pci_scan_bus for bus 01
1252 07:40:51.547292 GENERIC: 0.0 enabled
1253 07:40:51.550679 scan_bus: bus PCI: 00:07.0 finished in 8 msecs
1254 07:40:51.554549 PCI: 00:07.1 scanning...
1255 07:40:51.557505 do_pci_scan_bridge for PCI: 00:07.1
1256 07:40:51.561057 PCI: pci_scan_bus for bus 2c
1257 07:40:51.564237 GENERIC: 1.0 enabled
1258 07:40:51.567149 scan_bus: bus PCI: 00:07.1 finished in 8 msecs
1259 07:40:51.571123 PCI: 00:07.2 scanning...
1260 07:40:51.573947 do_pci_scan_bridge for PCI: 00:07.2
1261 07:40:51.577797 PCI: pci_scan_bus for bus 57
1262 07:40:51.581194 GENERIC: 0.0 enabled
1263 07:40:51.584534 scan_bus: bus PCI: 00:07.2 finished in 8 msecs
1264 07:40:51.587823 PCI: 00:0d.0 scanning...
1265 07:40:51.591062 scan_static_bus for PCI: 00:0d.0
1266 07:40:51.591523 USB0 port 0 enabled
1267 07:40:51.594000 USB0 port 0 scanning...
1268 07:40:51.597278 scan_static_bus for USB0 port 0
1269 07:40:51.600644 USB3 port 0 enabled
1270 07:40:51.601027 USB3 port 1 disabled
1271 07:40:51.603815 USB3 port 2 enabled
1272 07:40:51.607583 USB3 port 3 disabled
1273 07:40:51.608056 USB3 port 0 scanning...
1274 07:40:51.610544 scan_static_bus for USB3 port 0
1275 07:40:51.614353 scan_static_bus for USB3 port 0 done
1276 07:40:51.620912 scan_bus: bus USB3 port 0 finished in 6 msecs
1277 07:40:51.624028 USB3 port 2 scanning...
1278 07:40:51.627085 scan_static_bus for USB3 port 2
1279 07:40:51.630835 scan_static_bus for USB3 port 2 done
1280 07:40:51.633958 scan_bus: bus USB3 port 2 finished in 6 msecs
1281 07:40:51.637546 scan_static_bus for USB0 port 0 done
1282 07:40:51.644260 scan_bus: bus USB0 port 0 finished in 43 msecs
1283 07:40:51.647210 scan_static_bus for PCI: 00:0d.0 done
1284 07:40:51.650782 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1285 07:40:51.653884 PCI: 00:0d.2 scanning...
1286 07:40:51.657804 scan_generic_bus for PCI: 00:0d.2
1287 07:40:51.661061 GENERIC: 0.0 enabled
1288 07:40:51.664667 bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done
1289 07:40:51.670532 scan_bus: bus PCI: 00:0d.2 finished in 11 msecs
1290 07:40:51.674024 PCI: 00:0d.3 scanning...
1291 07:40:51.677521 scan_generic_bus for PCI: 00:0d.3
1292 07:40:51.677894 GENERIC: 0.0 enabled
1293 07:40:51.684320 bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done
1294 07:40:51.690623 scan_bus: bus PCI: 00:0d.3 finished in 11 msecs
1295 07:40:51.691149 PCI: 00:14.0 scanning...
1296 07:40:51.694179 scan_static_bus for PCI: 00:14.0
1297 07:40:51.697210 USB0 port 0 enabled
1298 07:40:51.700881 USB0 port 0 scanning...
1299 07:40:51.703907 scan_static_bus for USB0 port 0
1300 07:40:51.704335 USB2 port 0 enabled
1301 07:40:51.707127 USB2 port 1 disabled
1302 07:40:51.707515 USB2 port 2 enabled
1303 07:40:51.710606 USB2 port 3 enabled
1304 07:40:51.714168 USB2 port 4 enabled
1305 07:40:51.714643 USB2 port 5 enabled
1306 07:40:51.717193 USB2 port 6 enabled
1307 07:40:51.720735 USB2 port 7 enabled
1308 07:40:51.721194 USB2 port 8 disabled
1309 07:40:51.723893 USB2 port 9 enabled
1310 07:40:51.724351 USB3 port 0 enabled
1311 07:40:51.727133 USB3 port 1 enabled
1312 07:40:51.730585 USB3 port 2 enabled
1313 07:40:51.731068 USB3 port 3 enabled
1314 07:40:51.733939 USB2 port 0 scanning...
1315 07:40:51.737344 scan_static_bus for USB2 port 0
1316 07:40:51.740487 scan_static_bus for USB2 port 0 done
1317 07:40:51.743792 scan_bus: bus USB2 port 0 finished in 6 msecs
1318 07:40:51.747165 USB2 port 2 scanning...
1319 07:40:51.750528 scan_static_bus for USB2 port 2
1320 07:40:51.753962 scan_static_bus for USB2 port 2 done
1321 07:40:51.760625 scan_bus: bus USB2 port 2 finished in 6 msecs
1322 07:40:51.761131 USB2 port 3 scanning...
1323 07:40:51.763850 scan_static_bus for USB2 port 3
1324 07:40:51.770489 scan_static_bus for USB2 port 3 done
1325 07:40:51.774045 scan_bus: bus USB2 port 3 finished in 6 msecs
1326 07:40:51.776687 USB2 port 4 scanning...
1327 07:40:51.780366 scan_static_bus for USB2 port 4
1328 07:40:51.783250 scan_static_bus for USB2 port 4 done
1329 07:40:51.787146 scan_bus: bus USB2 port 4 finished in 6 msecs
1330 07:40:51.790327 USB2 port 5 scanning...
1331 07:40:51.793756 scan_static_bus for USB2 port 5
1332 07:40:51.797131 scan_static_bus for USB2 port 5 done
1333 07:40:51.800230 scan_bus: bus USB2 port 5 finished in 6 msecs
1334 07:40:51.803769 USB2 port 6 scanning...
1335 07:40:51.806755 scan_static_bus for USB2 port 6
1336 07:40:51.810193 scan_static_bus for USB2 port 6 done
1337 07:40:51.817223 scan_bus: bus USB2 port 6 finished in 6 msecs
1338 07:40:51.817692 USB2 port 7 scanning...
1339 07:40:51.820138 scan_static_bus for USB2 port 7
1340 07:40:51.823624 scan_static_bus for USB2 port 7 done
1341 07:40:51.830651 scan_bus: bus USB2 port 7 finished in 6 msecs
1342 07:40:51.831115 USB2 port 9 scanning...
1343 07:40:51.833808 scan_static_bus for USB2 port 9
1344 07:40:51.837235 scan_static_bus for USB2 port 9 done
1345 07:40:51.843790 scan_bus: bus USB2 port 9 finished in 6 msecs
1346 07:40:51.846827 USB3 port 0 scanning...
1347 07:40:51.850475 scan_static_bus for USB3 port 0
1348 07:40:51.853672 scan_static_bus for USB3 port 0 done
1349 07:40:51.857036 scan_bus: bus USB3 port 0 finished in 6 msecs
1350 07:40:51.860342 USB3 port 1 scanning...
1351 07:40:51.863491 scan_static_bus for USB3 port 1
1352 07:40:51.866955 scan_static_bus for USB3 port 1 done
1353 07:40:51.870031 scan_bus: bus USB3 port 1 finished in 6 msecs
1354 07:40:51.873161 USB3 port 2 scanning...
1355 07:40:51.876750 scan_static_bus for USB3 port 2
1356 07:40:51.880270 scan_static_bus for USB3 port 2 done
1357 07:40:51.883461 scan_bus: bus USB3 port 2 finished in 6 msecs
1358 07:40:51.886816 USB3 port 3 scanning...
1359 07:40:51.890565 scan_static_bus for USB3 port 3
1360 07:40:51.893693 scan_static_bus for USB3 port 3 done
1361 07:40:51.900126 scan_bus: bus USB3 port 3 finished in 6 msecs
1362 07:40:51.903737 scan_static_bus for USB0 port 0 done
1363 07:40:51.906611 scan_bus: bus USB0 port 0 finished in 203 msecs
1364 07:40:51.909784 scan_static_bus for PCI: 00:14.0 done
1365 07:40:51.917159 scan_bus: bus PCI: 00:14.0 finished in 219 msecs
1366 07:40:51.920046 PCI: 00:14.3 scanning...
1367 07:40:51.923252 scan_static_bus for PCI: 00:14.3
1368 07:40:51.923667 GENERIC: 0.0 enabled
1369 07:40:51.926700 scan_static_bus for PCI: 00:14.3 done
1370 07:40:51.933470 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1371 07:40:51.936848 PCI: 00:15.0 scanning...
1372 07:40:51.939863 scan_static_bus for PCI: 00:15.0
1373 07:40:51.940256 I2C: 00:1a enabled
1374 07:40:51.943211 scan_static_bus for PCI: 00:15.0 done
1375 07:40:51.949605 scan_bus: bus PCI: 00:15.0 finished in 9 msecs
1376 07:40:51.953295 PCI: 00:15.1 scanning...
1377 07:40:51.956316 scan_static_bus for PCI: 00:15.1
1378 07:40:51.956681 I2C: 00:50 enabled
1379 07:40:51.959965 scan_static_bus for PCI: 00:15.1 done
1380 07:40:51.966704 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1381 07:40:51.967167 PCI: 00:1c.0 scanning...
1382 07:40:51.973463 do_pci_scan_bridge for PCI: 00:1c.0
1383 07:40:51.973926 PCI: pci_scan_bus for bus 82
1384 07:40:51.976781 PCI: 82:00.0 [10ec/0000] ops
1385 07:40:51.979893 PCI: 82:00.0 [10ec/8168] enabled
1386 07:40:51.983334 Enabling Common Clock Configuration
1387 07:40:51.990231 L1 Sub-State supported from root port 28
1388 07:40:51.990702 L1 Sub-State Support = 0xf
1389 07:40:51.993475 CommonModeRestoreTime = 0x96
1390 07:40:51.999833 Power On Value = 0xf, Power On Scale = 0x1
1391 07:40:52.000298 ASPM: Enabled L1
1392 07:40:52.003263 PCIe: Max_Payload_Size adjusted to 128
1393 07:40:52.006978 PCI: 82:00.0: Enabled LTR
1394 07:40:52.010167 PCI: 82:00.0: Programmed LTR max latencies
1395 07:40:52.016717 scan_bus: bus PCI: 00:1c.0 finished in 43 msecs
1396 07:40:52.020127 PCI: 00:1c.7 scanning...
1397 07:40:52.023166 do_pci_scan_bridge for PCI: 00:1c.7
1398 07:40:52.026727 PCI: pci_scan_bus for bus 83
1399 07:40:52.030113 PCI: 83:00.0 [17a0/9755] enabled
1400 07:40:52.030559 GENERIC: 0.0 enabled
1401 07:40:52.033599 Enabling Common Clock Configuration
1402 07:40:52.039962 L1 Sub-State supported from root port 28
1403 07:40:52.040411 L1 Sub-State Support = 0xf
1404 07:40:52.043061 CommonModeRestoreTime = 0xff
1405 07:40:52.049857 Power On Value = 0x1f, Power On Scale = 0x2
1406 07:40:52.050278 ASPM: Enabled L0s and L1
1407 07:40:52.056254 PCIe: Max_Payload_Size adjusted to 128
1408 07:40:52.056683 PCI: 83:00.0: Enabled LTR
1409 07:40:52.062887 PCI: 83:00.0: Programmed LTR max latencies
1410 07:40:52.066601 scan_bus: bus PCI: 00:1c.7 finished in 43 msecs
1411 07:40:52.070222 PCI: 00:1d.0 scanning...
1412 07:40:52.073347 do_pci_scan_bridge for PCI: 00:1d.0
1413 07:40:52.076568 PCI: pci_scan_bus for bus 84
1414 07:40:52.080039 PCI: 84:00.0 [1217/8760] enabled
1415 07:40:52.080516 GENERIC: 0.0 enabled
1416 07:40:52.086476 L1 Sub-State supported from root port 29
1417 07:40:52.089988 L1 Sub-State Support = 0xa
1418 07:40:52.090557 CommonModeRestoreTime = 0x78
1419 07:40:52.096327 Power On Value = 0x16, Power On Scale = 0x0
1420 07:40:52.096779 ASPM: Enabled L1
1421 07:40:52.099388 PCIe: Max_Payload_Size adjusted to 128
1422 07:40:52.102973 PCI: 84:00.0: Enabled LTR
1423 07:40:52.109880 PCI: 84:00.0: Programmed LTR max latencies
1424 07:40:52.113423 scan_bus: bus PCI: 00:1d.0 finished in 38 msecs
1425 07:40:52.116344 PCI: 00:1e.3 scanning...
1426 07:40:52.119554 scan_generic_bus for PCI: 00:1e.3
1427 07:40:52.123209 scan_generic_bus for PCI: 00:1e.3 done
1428 07:40:52.126532 scan_bus: bus PCI: 00:1e.3 finished in 7 msecs
1429 07:40:52.130239 PCI: 00:1f.0 scanning...
1430 07:40:52.133071 scan_static_bus for PCI: 00:1f.0
1431 07:40:52.136402 PNP: 0c09.0 enabled
1432 07:40:52.136487 PNP: 0c09.0 scanning...
1433 07:40:52.139560 scan_static_bus for PNP: 0c09.0
1434 07:40:52.146607 scan_static_bus for PNP: 0c09.0 done
1435 07:40:52.149610 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1436 07:40:52.153036 scan_static_bus for PCI: 00:1f.0 done
1437 07:40:52.156518 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1438 07:40:52.159482 PCI: 00:1f.2 scanning...
1439 07:40:52.162962 scan_static_bus for PCI: 00:1f.2
1440 07:40:52.166331 GENERIC: 0.0 enabled
1441 07:40:52.169735 GENERIC: 0.0 scanning...
1442 07:40:52.173479 scan_static_bus for GENERIC: 0.0
1443 07:40:52.173960 GENERIC: 0.0 enabled
1444 07:40:52.177012 GENERIC: 1.0 enabled
1445 07:40:52.179985 scan_static_bus for GENERIC: 0.0 done
1446 07:40:52.183475 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1447 07:40:52.190234 scan_static_bus for PCI: 00:1f.2 done
1448 07:40:52.193314 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1449 07:40:52.196675 PCI: 00:1f.3 scanning...
1450 07:40:52.200093 scan_static_bus for PCI: 00:1f.3
1451 07:40:52.203039 scan_static_bus for PCI: 00:1f.3 done
1452 07:40:52.206814 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1453 07:40:52.209963 PCI: 00:1f.4 scanning...
1454 07:40:52.213345 scan_generic_bus for PCI: 00:1f.4
1455 07:40:52.216486 scan_generic_bus for PCI: 00:1f.4 done
1456 07:40:52.223017 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
1457 07:40:52.225888 PCI: 00:1f.5 scanning...
1458 07:40:52.229792 scan_generic_bus for PCI: 00:1f.5
1459 07:40:52.233111 scan_generic_bus for PCI: 00:1f.5 done
1460 07:40:52.236107 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1461 07:40:52.243057 scan_bus: bus DOMAIN: 0000 finished in 990 msecs
1462 07:40:52.246325 scan_static_bus for Root Device done
1463 07:40:52.249611 scan_bus: bus Root Device finished in 1009 msecs
1464 07:40:52.249967 done
1465 07:40:52.256328 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms
1466 07:40:52.263022 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1467 07:40:52.269560 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1468 07:40:52.273400 SPI flash protection: WPSW=0 SRP0=1
1469 07:40:52.276420 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1470 07:40:52.282969 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1471 07:40:52.286352 found VGA at PCI: 00:02.0
1472 07:40:52.289758 Setting up VGA for PCI: 00:02.0
1473 07:40:52.292857 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1474 07:40:52.299763 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1475 07:40:52.302919 Allocating resources...
1476 07:40:52.303379 Reading resources...
1477 07:40:52.309644 Root Device read_resources bus 0 link: 0
1478 07:40:52.313067 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1479 07:40:52.316189 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1480 07:40:52.323009 DOMAIN: 0000 read_resources bus 0 link: 0
1481 07:40:52.326200 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1482 07:40:52.332774 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1483 07:40:52.339734 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1484 07:40:52.346343 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1485 07:40:52.352938 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1486 07:40:52.359298 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1487 07:40:52.366378 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1488 07:40:52.372830 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1489 07:40:52.379760 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1490 07:40:52.386169 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1491 07:40:52.393061 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1492 07:40:52.396074 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1493 07:40:52.402899 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1494 07:40:52.409449 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1495 07:40:52.416204 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1496 07:40:52.422505 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1497 07:40:52.429266 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1498 07:40:52.435987 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1499 07:40:52.442581 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1500 07:40:52.449292 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1501 07:40:52.453182 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1502 07:40:52.459236 PCI: 00:04.0 read_resources bus 1 link: 0
1503 07:40:52.462353 PCI: 00:04.0 read_resources bus 1 link: 0 done
1504 07:40:52.466405 PCI: 00:07.0 read_resources bus 1 link: 0
1505 07:40:52.472732 PCI: 00:07.0 read_resources bus 1 link: 0 done
1506 07:40:52.475864 PCI: 00:07.1 read_resources bus 44 link: 0
1507 07:40:52.482727 PCI: 00:07.1 read_resources bus 44 link: 0 done
1508 07:40:52.485983 PCI: 00:07.2 read_resources bus 87 link: 0
1509 07:40:52.489306 PCI: 00:07.2 read_resources bus 87 link: 0 done
1510 07:40:52.495884 PCI: 00:0d.0 read_resources bus 0 link: 0
1511 07:40:52.499369 USB0 port 0 read_resources bus 0 link: 0
1512 07:40:52.502511 USB0 port 0 read_resources bus 0 link: 0 done
1513 07:40:52.509364 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1514 07:40:52.512456 PCI: 00:0d.2 read_resources bus 2 link: 0
1515 07:40:52.515883 PCI: 00:0d.2 read_resources bus 2 link: 0 done
1516 07:40:52.522476 PCI: 00:0d.3 read_resources bus 3 link: 0
1517 07:40:52.525495 PCI: 00:0d.3 read_resources bus 3 link: 0 done
1518 07:40:52.529023 PCI: 00:14.0 read_resources bus 0 link: 0
1519 07:40:52.532349 USB0 port 0 read_resources bus 0 link: 0
1520 07:40:52.539114 USB0 port 0 read_resources bus 0 link: 0 done
1521 07:40:52.542641 PCI: 00:14.0 read_resources bus 0 link: 0 done
1522 07:40:52.549168 PCI: 00:14.3 read_resources bus 0 link: 0
1523 07:40:52.552417 PCI: 00:14.3 read_resources bus 0 link: 0 done
1524 07:40:52.555762 PCI: 00:15.0 read_resources bus 0 link: 0
1525 07:40:52.562258 PCI: 00:15.0 read_resources bus 0 link: 0 done
1526 07:40:52.565473 PCI: 00:15.1 read_resources bus 0 link: 0
1527 07:40:52.568875 PCI: 00:15.1 read_resources bus 0 link: 0 done
1528 07:40:52.575796 PCI: 00:1c.0 read_resources bus 130 link: 0
1529 07:40:52.579128 PCI: 00:1c.0 read_resources bus 130 link: 0 done
1530 07:40:52.585825 PCI: 00:1c.7 read_resources bus 131 link: 0
1531 07:40:52.589373 PCI: 00:1c.7 read_resources bus 131 link: 0 done
1532 07:40:52.595699 PCI: 00:1d.0 read_resources bus 132 link: 0
1533 07:40:52.598931 PCI: 00:1d.0 read_resources bus 132 link: 0 done
1534 07:40:52.602669 PCI: 00:1f.0 read_resources bus 0 link: 0
1535 07:40:52.608959 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1536 07:40:52.612194 PCI: 00:1f.2 read_resources bus 0 link: 0
1537 07:40:52.615542 GENERIC: 0.0 read_resources bus 0 link: 0
1538 07:40:52.622610 GENERIC: 0.0 read_resources bus 0 link: 0 done
1539 07:40:52.625408 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1540 07:40:52.632380 DOMAIN: 0000 read_resources bus 0 link: 0 done
1541 07:40:52.635414 Root Device read_resources bus 0 link: 0 done
1542 07:40:52.639068 Done reading resources.
1543 07:40:52.645766 Show resources in subtree (Root Device)...After reading.
1544 07:40:52.648756 Root Device child on link 0 CPU_CLUSTER: 0
1545 07:40:52.652327 CPU_CLUSTER: 0 child on link 0 APIC: 00
1546 07:40:52.655376 APIC: 00
1547 07:40:52.655813 APIC: 14
1548 07:40:52.656071 APIC: 16
1549 07:40:52.658766 APIC: 10
1550 07:40:52.659171 APIC: 12
1551 07:40:52.662224 DOMAIN: 0000 child on link 0 GPIO: 0
1552 07:40:52.672419 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1553 07:40:52.682377 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1554 07:40:52.682851 GPIO: 0
1555 07:40:52.685790 PCI: 00:00.0
1556 07:40:52.695504 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1557 07:40:52.702331 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1558 07:40:52.712107 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1559 07:40:52.721857 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1560 07:40:52.731893 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1561 07:40:52.741909 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1562 07:40:52.751822 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1563 07:40:52.761569 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1564 07:40:52.768177 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1565 07:40:52.778254 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1566 07:40:52.788112 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1567 07:40:52.798047 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1568 07:40:52.807916 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1569 07:40:52.817998 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1570 07:40:52.824417 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1571 07:40:52.834469 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1572 07:40:52.844686 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1573 07:40:52.854301 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1574 07:40:52.864166 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1575 07:40:52.874011 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1576 07:40:52.884127 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1577 07:40:52.894004 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1578 07:40:52.900819 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1579 07:40:52.910647 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1580 07:40:52.920284 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1581 07:40:52.930058 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1582 07:40:52.940084 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1583 07:40:52.950207 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1584 07:40:52.953467 PCI: 00:02.0
1585 07:40:52.963461 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1586 07:40:52.973541 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1587 07:40:52.980064 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1588 07:40:52.986788 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1589 07:40:52.996773 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1590 07:40:52.997227 GENERIC: 0.0
1591 07:40:53.003618 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1592 07:40:53.009962 PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1593 07:40:53.019866 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1594 07:40:53.029905 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1595 07:40:53.030432 GENERIC: 0.0
1596 07:40:53.033169 NONE
1597 07:40:53.039965 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1598 07:40:53.049971 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1599 07:40:53.059548 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1600 07:40:53.063461 PCI: 00:07.1 child on link 0 GENERIC: 1.0
1601 07:40:53.073188 PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1602 07:40:53.083462 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1603 07:40:53.089896 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1604 07:40:53.093781 GENERIC: 1.0
1605 07:40:53.094259 NONE
1606 07:40:53.102921 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1607 07:40:53.112874 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1608 07:40:53.119888 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1609 07:40:53.126394 PCI: 00:07.2 child on link 0 GENERIC: 0.0
1610 07:40:53.132823 PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1611 07:40:53.142907 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1612 07:40:53.152645 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1613 07:40:53.156046 GENERIC: 0.0
1614 07:40:53.156449 NONE
1615 07:40:53.162840 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1616 07:40:53.172697 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1617 07:40:53.182572 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1618 07:40:53.183069 PCI: 00:08.0
1619 07:40:53.186050 PCI: 00:0a.0
1620 07:40:53.195741 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1621 07:40:53.199379 PCI: 00:0d.0 child on link 0 USB0 port 0
1622 07:40:53.209074 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1623 07:40:53.216001 USB0 port 0 child on link 0 USB3 port 0
1624 07:40:53.216485 USB3 port 0
1625 07:40:53.218683 USB3 port 1
1626 07:40:53.218989 USB3 port 2
1627 07:40:53.221992 USB3 port 3
1628 07:40:53.225825 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
1629 07:40:53.235533 PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1630 07:40:53.245698 PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1631 07:40:53.249063 GENERIC: 0.0
1632 07:40:53.252485 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
1633 07:40:53.262458 PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1634 07:40:53.272386 PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1635 07:40:53.272852 GENERIC: 0.0
1636 07:40:53.279513 PCI: 00:14.0 child on link 0 USB0 port 0
1637 07:40:53.289235 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1638 07:40:53.292247 USB0 port 0 child on link 0 USB2 port 0
1639 07:40:53.295515 USB2 port 0
1640 07:40:53.295905 USB2 port 1
1641 07:40:53.298977 USB2 port 2
1642 07:40:53.299467 USB2 port 3
1643 07:40:53.302442 USB2 port 4
1644 07:40:53.302924 USB2 port 5
1645 07:40:53.305808 USB2 port 6
1646 07:40:53.306271 USB2 port 7
1647 07:40:53.309208 USB2 port 8
1648 07:40:53.309668 USB2 port 9
1649 07:40:53.312410 USB3 port 0
1650 07:40:53.312863 USB3 port 1
1651 07:40:53.315443 USB3 port 2
1652 07:40:53.318915 USB3 port 3
1653 07:40:53.319276 PCI: 00:14.2
1654 07:40:53.329185 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1655 07:40:53.338743 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1656 07:40:53.342244 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1657 07:40:53.352441 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1658 07:40:53.355309 GENERIC: 0.0
1659 07:40:53.358738 PCI: 00:15.0 child on link 0 I2C: 00:1a
1660 07:40:53.369307 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1661 07:40:53.372441 I2C: 00:1a
1662 07:40:53.375851 PCI: 00:15.1 child on link 0 I2C: 00:50
1663 07:40:53.385689 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1664 07:40:53.386140 I2C: 00:50
1665 07:40:53.388910 PCI: 00:16.0
1666 07:40:53.399118 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1667 07:40:53.402220 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
1668 07:40:53.412302 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1669 07:40:53.422268 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1670 07:40:53.432177 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1671 07:40:53.432651 PCI: 82:00.0
1672 07:40:53.442249 PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
1673 07:40:53.452039 PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1674 07:40:53.462152 PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
1675 07:40:53.465489 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
1676 07:40:53.475297 PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1677 07:40:53.485636 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1678 07:40:53.492042 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1679 07:40:53.495495 GENERIC: 0.0
1680 07:40:53.495985 PCI: 83:00.0
1681 07:40:53.505729 PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1682 07:40:53.508632 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1683 07:40:53.518731 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1684 07:40:53.528537 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1685 07:40:53.538466 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1686 07:40:53.538912 GENERIC: 0.0
1687 07:40:53.541831 PCI: 84:00.0
1688 07:40:53.551738 PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1689 07:40:53.552205 PCI: 00:1e.0
1690 07:40:53.565276 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1691 07:40:53.565749 PCI: 00:1e.3
1692 07:40:53.575205 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1693 07:40:53.582029 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1694 07:40:53.588198 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1695 07:40:53.591722 PNP: 0c09.0
1696 07:40:53.598330 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1697 07:40:53.604877 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1698 07:40:53.615134 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1699 07:40:53.621371 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1700 07:40:53.627859 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1701 07:40:53.628379 GENERIC: 0.0
1702 07:40:53.631382 GENERIC: 1.0
1703 07:40:53.631762 PCI: 00:1f.3
1704 07:40:53.641320 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1705 07:40:53.651347 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1706 07:40:53.654941 PCI: 00:1f.4
1707 07:40:53.664804 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1708 07:40:53.674556 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1709 07:40:53.675026 PCI: 00:1f.5
1710 07:40:53.684355 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1711 07:40:53.691099 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1712 07:40:53.697674 PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff
1713 07:40:53.700983 NONE 18 * [0x0 - 0x1fff] io
1714 07:40:53.707625 PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
1715 07:40:53.714399 PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1716 07:40:53.717454 NONE 10 * [0x0 - 0xc1fffff] mem
1717 07:40:53.724245 PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1718 07:40:53.730860 PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1719 07:40:53.734547 NONE 14 * [0x0 - 0x1bffffff] prefmem
1720 07:40:53.744236 PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1721 07:40:53.747500 PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff
1722 07:40:53.750817 NONE 18 * [0x0 - 0x1fff] io
1723 07:40:53.757254 PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done
1724 07:40:53.764029 PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1725 07:40:53.767764 NONE 10 * [0x0 - 0xc1fffff] mem
1726 07:40:53.774325 PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1727 07:40:53.784120 PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1728 07:40:53.787566 NONE 14 * [0x0 - 0x1bffffff] prefmem
1729 07:40:53.794470 PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1730 07:40:53.800683 PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff
1731 07:40:53.803863 NONE 18 * [0x0 - 0x1fff] io
1732 07:40:53.810904 PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
1733 07:40:53.817470 PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1734 07:40:53.820837 NONE 10 * [0x0 - 0xc1fffff] mem
1735 07:40:53.827441 PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1736 07:40:53.834388 PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1737 07:40:53.837554 NONE 14 * [0x0 - 0x1bffffff] prefmem
1738 07:40:53.847409 PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1739 07:40:53.854259 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
1740 07:40:53.857247 PCI: 82:00.0 10 * [0x0 - 0xff] io
1741 07:40:53.864181 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
1742 07:40:53.870540 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1743 07:40:53.873975 PCI: 82:00.0 20 * [0x0 - 0x3fff] mem
1744 07:40:53.876959 PCI: 82:00.0 18 * [0x4000 - 0x4fff] mem
1745 07:40:53.883496 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1746 07:40:53.890362 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1747 07:40:53.900595 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1748 07:40:53.903776 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff
1749 07:40:53.910387 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done
1750 07:40:53.917265 PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1751 07:40:53.920265 PCI: 83:00.0 10 * [0x0 - 0xfff] mem
1752 07:40:53.926855 PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1753 07:40:53.936929 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1754 07:40:53.943853 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1755 07:40:53.950243 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1756 07:40:53.956697 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1757 07:40:53.959954 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1758 07:40:53.967277 PCI: 84:00.0 10 * [0x0 - 0x3fff] mem
1759 07:40:53.973602 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1760 07:40:53.980210 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1761 07:40:53.987064 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1762 07:40:53.993802 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1763 07:40:54.000209 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1764 07:40:54.010241 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1765 07:40:54.016841 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1766 07:40:54.023219 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1767 07:40:54.029989 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1768 07:40:54.033492 DOMAIN: 0000: Resource ranges:
1769 07:40:54.040230 * Base: 1000, Size: 800, Tag: 100
1770 07:40:54.043183 * Base: 1900, Size: d6a0, Tag: 100
1771 07:40:54.046596 * Base: efc0, Size: 1040, Tag: 100
1772 07:40:54.049972 PCI: 00:07.0 1c * [0x2000 - 0x3fff] limit: 3fff io
1773 07:40:54.056403 PCI: 00:07.1 1c * [0x4000 - 0x5fff] limit: 5fff io
1774 07:40:54.063457 PCI: 00:07.2 1c * [0x6000 - 0x7fff] limit: 7fff io
1775 07:40:54.066611 PCI: 00:1c.0 1c * [0x8000 - 0x8fff] limit: 8fff io
1776 07:40:54.073241 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1777 07:40:54.079870 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1778 07:40:54.086762 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1779 07:40:54.093392 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1780 07:40:54.099785 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1781 07:40:54.109735 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1782 07:40:54.116529 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1783 07:40:54.122903 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1784 07:40:54.132937 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1785 07:40:54.139677 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1786 07:40:54.146333 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1787 07:40:54.156337 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1788 07:40:54.162679 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1789 07:40:54.169404 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1790 07:40:54.179363 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1791 07:40:54.185997 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1792 07:40:54.192707 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1793 07:40:54.202705 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1794 07:40:54.209396 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1795 07:40:54.215957 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1796 07:40:54.225605 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1797 07:40:54.232209 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1798 07:40:54.239113 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1799 07:40:54.249172 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1800 07:40:54.255744 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1801 07:40:54.262126 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1802 07:40:54.272117 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1803 07:40:54.278859 update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)
1804 07:40:54.285379 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1805 07:40:54.295307 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1806 07:40:54.301908 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1807 07:40:54.308614 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1808 07:40:54.318701 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1809 07:40:54.322122 DOMAIN: 0000: Resource ranges:
1810 07:40:54.325444 * Base: 80400000, Size: 3fc00000, Tag: 200
1811 07:40:54.328368 * Base: d0000000, Size: 28000000, Tag: 200
1812 07:40:54.335001 * Base: fa000000, Size: 1000000, Tag: 200
1813 07:40:54.338741 * Base: fb001000, Size: 17ff000, Tag: 200
1814 07:40:54.341867 * Base: fe800000, Size: 300000, Tag: 200
1815 07:40:54.345033 * Base: feb80000, Size: 80000, Tag: 200
1816 07:40:54.351495 * Base: fed00000, Size: 40000, Tag: 200
1817 07:40:54.354768 * Base: fed70000, Size: 10000, Tag: 200
1818 07:40:54.358454 * Base: fed88000, Size: 8000, Tag: 200
1819 07:40:54.361723 * Base: fed93000, Size: d000, Tag: 200
1820 07:40:54.364995 * Base: feda2000, Size: 1e000, Tag: 200
1821 07:40:54.371522 * Base: fede0000, Size: 1220000, Tag: 200
1822 07:40:54.374843 * Base: 17fc00000, Size: 7e80400000, Tag: 100200
1823 07:40:54.381752 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1824 07:40:54.388434 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1825 07:40:54.395029 PCI: 00:07.0 20 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1826 07:40:54.401399 PCI: 00:07.1 20 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1827 07:40:54.408652 PCI: 00:07.2 20 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1828 07:40:54.415196 PCI: 00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1829 07:40:54.421520 PCI: 00:1c.7 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1830 07:40:54.428006 PCI: 00:1d.0 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem
1831 07:40:54.434921 PCI: 00:1f.3 20 * [0x80700000 - 0x807fffff] limit: 807fffff mem
1832 07:40:54.441538 PCI: 00:0d.2 10 * [0x80800000 - 0x8083ffff] limit: 8083ffff mem
1833 07:40:54.448001 PCI: 00:0d.3 10 * [0x80840000 - 0x8087ffff] limit: 8087ffff mem
1834 07:40:54.454669 PCI: 00:04.0 10 * [0x80880000 - 0x8089ffff] limit: 8089ffff mem
1835 07:40:54.460972 PCI: 00:0d.0 10 * [0x808a0000 - 0x808affff] limit: 808affff mem
1836 07:40:54.467738 PCI: 00:14.0 10 * [0x808b0000 - 0x808bffff] limit: 808bffff mem
1837 07:40:54.474140 PCI: 00:0a.0 10 * [0x808c0000 - 0x808c7fff] limit: 808c7fff mem
1838 07:40:54.480996 PCI: 00:14.2 10 * [0x808c8000 - 0x808cbfff] limit: 808cbfff mem
1839 07:40:54.487512 PCI: 00:14.3 10 * [0x808cc000 - 0x808cffff] limit: 808cffff mem
1840 07:40:54.494333 PCI: 00:1f.3 10 * [0x808d0000 - 0x808d3fff] limit: 808d3fff mem
1841 07:40:54.500800 PCI: 00:0d.2 18 * [0x808d4000 - 0x808d4fff] limit: 808d4fff mem
1842 07:40:54.507528 PCI: 00:0d.3 18 * [0x808d5000 - 0x808d5fff] limit: 808d5fff mem
1843 07:40:54.514288 PCI: 00:14.2 18 * [0x808d6000 - 0x808d6fff] limit: 808d6fff mem
1844 07:40:54.520980 PCI: 00:15.0 10 * [0x808d7000 - 0x808d7fff] limit: 808d7fff mem
1845 07:40:54.527261 PCI: 00:15.1 10 * [0x808d8000 - 0x808d8fff] limit: 808d8fff mem
1846 07:40:54.534320 PCI: 00:16.0 10 * [0x808d9000 - 0x808d9fff] limit: 808d9fff mem
1847 07:40:54.540806 PCI: 00:1e.3 10 * [0x808da000 - 0x808dafff] limit: 808dafff mem
1848 07:40:54.547491 PCI: 00:1f.5 10 * [0x808db000 - 0x808dbfff] limit: 808dbfff mem
1849 07:40:54.554115 PCI: 00:1f.4 10 * [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem
1850 07:40:54.563659 PCI: 00:07.0 24 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1851 07:40:54.570630 PCI: 00:07.1 24 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1852 07:40:54.577250 PCI: 00:07.2 24 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1853 07:40:54.583868 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1854 07:40:54.590445 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
1855 07:40:54.593800 PCI: 00:07.0: Resource ranges:
1856 07:40:54.596961 * Base: 2000, Size: 2000, Tag: 100
1857 07:40:54.603447 NONE 18 * [0x2000 - 0x3fff] limit: 3fff io
1858 07:40:54.610222 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
1859 07:40:54.620112 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff
1860 07:40:54.623601 PCI: 00:07.0: Resource ranges:
1861 07:40:54.626713 * Base: 17fc00000, Size: 1c000000, Tag: 1200
1862 07:40:54.632946 NONE 14 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1863 07:40:54.643368 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done
1864 07:40:54.649721 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff
1865 07:40:54.652698 PCI: 00:07.0: Resource ranges:
1866 07:40:54.659580 * Base: 82000000, Size: c200000, Tag: 200
1867 07:40:54.663064 NONE 10 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1868 07:40:54.673253 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done
1869 07:40:54.679404 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
1870 07:40:54.682864 PCI: 00:07.1: Resource ranges:
1871 07:40:54.685967 * Base: 4000, Size: 2000, Tag: 100
1872 07:40:54.689475 NONE 18 * [0x4000 - 0x5fff] limit: 5fff io
1873 07:40:54.699722 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
1874 07:40:54.705831 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff
1875 07:40:54.709618 PCI: 00:07.1: Resource ranges:
1876 07:40:54.715735 * Base: 19bc00000, Size: 1c000000, Tag: 1200
1877 07:40:54.722633 NONE 14 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1878 07:40:54.729220 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done
1879 07:40:54.739242 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff
1880 07:40:54.742361 PCI: 00:07.1: Resource ranges:
1881 07:40:54.745692 * Base: a0000000, Size: c200000, Tag: 200
1882 07:40:54.752468 NONE 10 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1883 07:40:54.762116 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done
1884 07:40:54.768884 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
1885 07:40:54.772055 PCI: 00:07.2: Resource ranges:
1886 07:40:54.775529 * Base: 6000, Size: 2000, Tag: 100
1887 07:40:54.778750 NONE 18 * [0x6000 - 0x7fff] limit: 7fff io
1888 07:40:54.785461 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
1889 07:40:54.795524 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff
1890 07:40:54.798994 PCI: 00:07.2: Resource ranges:
1891 07:40:54.801985 * Base: 1b7c00000, Size: 1c000000, Tag: 1200
1892 07:40:54.808491 NONE 14 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1893 07:40:54.818546 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done
1894 07:40:54.828327 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff
1895 07:40:54.831432 PCI: 00:07.2: Resource ranges:
1896 07:40:54.834770 * Base: ac200000, Size: c200000, Tag: 200
1897 07:40:54.841391 NONE 10 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1898 07:40:54.848231 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done
1899 07:40:54.855201 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff
1900 07:40:54.858176 PCI: 00:1c.0: Resource ranges:
1901 07:40:54.861457 * Base: 8000, Size: 1000, Tag: 100
1902 07:40:54.868057 PCI: 82:00.0 10 * [0x8000 - 0x80ff] limit: 80ff io
1903 07:40:54.875062 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done
1904 07:40:54.885084 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1905 07:40:54.888111 PCI: 00:1c.0: Resource ranges:
1906 07:40:54.891123 * Base: 80400000, Size: 100000, Tag: 200
1907 07:40:54.898157 PCI: 82:00.0 20 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1908 07:40:54.904790 PCI: 82:00.0 18 * [0x80404000 - 0x80404fff] limit: 80404fff mem
1909 07:40:54.911162 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1910 07:40:54.921438 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff
1911 07:40:54.924430 PCI: 00:1c.7: Resource ranges:
1912 07:40:54.927749 * Base: 80500000, Size: 100000, Tag: 200
1913 07:40:54.934101 PCI: 83:00.0 10 * [0x80500000 - 0x80500fff] limit: 80500fff mem
1914 07:40:54.944371 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done
1915 07:40:54.950914 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff
1916 07:40:54.954319 PCI: 00:1d.0: Resource ranges:
1917 07:40:54.957833 * Base: 80600000, Size: 100000, Tag: 200
1918 07:40:54.964281 PCI: 84:00.0 10 * [0x80600000 - 0x80603fff] limit: 80603fff mem
1919 07:40:54.974225 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done
1920 07:40:54.981042 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1921 07:40:54.984163 Root Device assign_resources, bus 0 link: 0
1922 07:40:54.990965 DOMAIN: 0000 assign_resources, bus 0 link: 0
1923 07:40:54.997385 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1924 07:40:55.007138 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1925 07:40:55.013907 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1926 07:40:55.020513 PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64
1927 07:40:55.027141 PCI: 00:04.0 assign_resources, bus 1 link: 0
1928 07:40:55.030058 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1929 07:40:55.040057 PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io
1930 07:40:55.046834 PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem
1931 07:40:55.057024 PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem
1932 07:40:55.060218 PCI: 00:07.0 assign_resources, bus 1 link: 0
1933 07:40:55.066998 PCI: 00:07.0 assign_resources, bus 1 link: 0 done
1934 07:40:55.073351 PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io
1935 07:40:55.083041 PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem
1936 07:40:55.093371 PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem
1937 07:40:55.096468 PCI: 00:07.1 assign_resources, bus 44 link: 0
1938 07:40:55.103052 PCI: 00:07.1 assign_resources, bus 44 link: 0 done
1939 07:40:55.109983 PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io
1940 07:40:55.119696 PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem
1941 07:40:55.126388 PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem
1942 07:40:55.132976 PCI: 00:07.2 assign_resources, bus 87 link: 0
1943 07:40:55.136492 PCI: 00:07.2 assign_resources, bus 87 link: 0 done
1944 07:40:55.146320 PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64
1945 07:40:55.152735 PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64
1946 07:40:55.159335 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1947 07:40:55.162473 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1948 07:40:55.169281 PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64
1949 07:40:55.178967 PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64
1950 07:40:55.182422 PCI: 00:0d.2 assign_resources, bus 2 link: 0
1951 07:40:55.189146 PCI: 00:0d.2 assign_resources, bus 2 link: 0 done
1952 07:40:55.195897 PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64
1953 07:40:55.205579 PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64
1954 07:40:55.209017 PCI: 00:0d.3 assign_resources, bus 3 link: 0
1955 07:40:55.212501 PCI: 00:0d.3 assign_resources, bus 3 link: 0 done
1956 07:40:55.222066 PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64
1957 07:40:55.225943 PCI: 00:14.0 assign_resources, bus 0 link: 0
1958 07:40:55.232329 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1959 07:40:55.239006 PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64
1960 07:40:55.248770 PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64
1961 07:40:55.255552 PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64
1962 07:40:55.259024 PCI: 00:14.3 assign_resources, bus 0 link: 0
1963 07:40:55.265591 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1964 07:40:55.271883 PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64
1965 07:40:55.278649 PCI: 00:15.0 assign_resources, bus 0 link: 0
1966 07:40:55.282105 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1967 07:40:55.292176 PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64
1968 07:40:55.295382 PCI: 00:15.1 assign_resources, bus 0 link: 0
1969 07:40:55.298787 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1970 07:40:55.308555 PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64
1971 07:40:55.315196 PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io
1972 07:40:55.325306 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem
1973 07:40:55.335041 PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem
1974 07:40:55.338200 PCI: 00:1c.0 assign_resources, bus 130 link: 0
1975 07:40:55.347971 PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io
1976 07:40:55.354739 PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64
1977 07:40:55.364849 PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1978 07:40:55.367976 PCI: 00:1c.0 assign_resources, bus 130 link: 0 done
1979 07:40:55.377853 PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io
1980 07:40:55.387720 PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem
1981 07:40:55.394914 PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem
1982 07:40:55.401323 PCI: 00:1c.7 assign_resources, bus 131 link: 0
1983 07:40:55.407888 PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem
1984 07:40:55.414671 PCI: 00:1c.7 assign_resources, bus 131 link: 0 done
1985 07:40:55.421404 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io
1986 07:40:55.431007 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem
1987 07:40:55.441249 PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem
1988 07:40:55.444477 PCI: 00:1d.0 assign_resources, bus 132 link: 0
1989 07:40:55.450692 PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64
1990 07:40:55.457788 PCI: 00:1d.0 assign_resources, bus 132 link: 0 done
1991 07:40:55.464216 PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64
1992 07:40:55.470903 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1993 07:40:55.474304 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1994 07:40:55.480898 LPC: Trying to open IO window from 800 size 1ff
1995 07:40:55.487349 PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64
1996 07:40:55.497742 PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64
1997 07:40:55.504181 PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64
1998 07:40:55.511009 PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem
1999 07:40:55.517785 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
2000 07:40:55.520733 Root Device assign_resources, bus 0 link: 0 done
2001 07:40:55.523797 Done setting resources.
2002 07:40:55.530309 Show resources in subtree (Root Device)...After assigning values.
2003 07:40:55.533935 Root Device child on link 0 CPU_CLUSTER: 0
2004 07:40:55.540864 CPU_CLUSTER: 0 child on link 0 APIC: 00
2005 07:40:55.541329 APIC: 00
2006 07:40:55.541699 APIC: 14
2007 07:40:55.543704 APIC: 16
2008 07:40:55.544063 APIC: 10
2009 07:40:55.547219 APIC: 12
2010 07:40:55.550671 DOMAIN: 0000 child on link 0 GPIO: 0
2011 07:40:55.557536 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
2012 07:40:55.567108 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
2013 07:40:55.570294 GPIO: 0
2014 07:40:55.570716 PCI: 00:00.0
2015 07:40:55.580364 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
2016 07:40:55.590240 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
2017 07:40:55.600395 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
2018 07:40:55.610247 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
2019 07:40:55.620140 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
2020 07:40:55.626776 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
2021 07:40:55.636730 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
2022 07:40:55.646538 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
2023 07:40:55.656491 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
2024 07:40:55.666437 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
2025 07:40:55.676297 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
2026 07:40:55.686605 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
2027 07:40:55.692958 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
2028 07:40:55.702830 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
2029 07:40:55.713044 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
2030 07:40:55.723081 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
2031 07:40:55.732902 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
2032 07:40:55.743061 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
2033 07:40:55.752635 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
2034 07:40:55.759500 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
2035 07:40:55.769646 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
2036 07:40:55.779322 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
2037 07:40:55.789125 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
2038 07:40:55.799416 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
2039 07:40:55.809195 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
2040 07:40:55.818835 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
2041 07:40:55.825570 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
2042 07:40:55.835679 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
2043 07:40:55.838605 PCI: 00:02.0
2044 07:40:55.849124 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
2045 07:40:55.858834 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
2046 07:40:55.868666 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
2047 07:40:55.872201 PCI: 00:04.0 child on link 0 GENERIC: 0.0
2048 07:40:55.885215 PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10
2049 07:40:55.885623 GENERIC: 0.0
2050 07:40:55.891963 PCI: 00:07.0 child on link 0 GENERIC: 0.0
2051 07:40:55.898782 PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
2052 07:40:55.911997 PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24
2053 07:40:55.921974 PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20
2054 07:40:55.922427 GENERIC: 0.0
2055 07:40:55.925316 NONE
2056 07:40:55.934969 NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10
2057 07:40:55.945292 NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14
2058 07:40:55.952061 NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18
2059 07:40:55.958359 PCI: 00:07.1 child on link 0 GENERIC: 1.0
2060 07:40:55.968465 PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c
2061 07:40:55.978553 PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24
2062 07:40:55.988413 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20
2063 07:40:55.991683 GENERIC: 1.0
2064 07:40:55.992049 NONE
2065 07:40:56.001528 NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10
2066 07:40:56.011521 NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14
2067 07:40:56.021294 NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18
2068 07:40:56.024820 PCI: 00:07.2 child on link 0 GENERIC: 0.0
2069 07:40:56.034413 PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c
2070 07:40:56.044674 PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24
2071 07:40:56.057874 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20
2072 07:40:56.058207 GENERIC: 0.0
2073 07:40:56.058436 NONE
2074 07:40:56.067397 NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10
2075 07:40:56.077883 NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14
2076 07:40:56.087779 NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18
2077 07:40:56.091202 PCI: 00:08.0
2078 07:40:56.091596 PCI: 00:0a.0
2079 07:40:56.101434 PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10
2080 07:40:56.108078 PCI: 00:0d.0 child on link 0 USB0 port 0
2081 07:40:56.117793 PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10
2082 07:40:56.121229 USB0 port 0 child on link 0 USB3 port 0
2083 07:40:56.124937 USB3 port 0
2084 07:40:56.125387 USB3 port 1
2085 07:40:56.127509 USB3 port 2
2086 07:40:56.127865 USB3 port 3
2087 07:40:56.134544 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
2088 07:40:56.144424 PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10
2089 07:40:56.154705 PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18
2090 07:40:56.155174 GENERIC: 0.0
2091 07:40:56.161124 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
2092 07:40:56.170882 PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10
2093 07:40:56.181157 PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18
2094 07:40:56.181618 GENERIC: 0.0
2095 07:40:56.187763 PCI: 00:14.0 child on link 0 USB0 port 0
2096 07:40:56.197613 PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10
2097 07:40:56.200863 USB0 port 0 child on link 0 USB2 port 0
2098 07:40:56.204268 USB2 port 0
2099 07:40:56.204799 USB2 port 1
2100 07:40:56.207414 USB2 port 2
2101 07:40:56.207933 USB2 port 3
2102 07:40:56.210849 USB2 port 4
2103 07:40:56.211351 USB2 port 5
2104 07:40:56.214270 USB2 port 6
2105 07:40:56.214764 USB2 port 7
2106 07:40:56.217826 USB2 port 8
2107 07:40:56.220564 USB2 port 9
2108 07:40:56.220926 USB3 port 0
2109 07:40:56.224178 USB3 port 1
2110 07:40:56.224612 USB3 port 2
2111 07:40:56.227131 USB3 port 3
2112 07:40:56.227508 PCI: 00:14.2
2113 07:40:56.237200 PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10
2114 07:40:56.247355 PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18
2115 07:40:56.253979 PCI: 00:14.3 child on link 0 GENERIC: 0.0
2116 07:40:56.263760 PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10
2117 07:40:56.264171 GENERIC: 0.0
2118 07:40:56.270599 PCI: 00:15.0 child on link 0 I2C: 00:1a
2119 07:40:56.280946 PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10
2120 07:40:56.281368 I2C: 00:1a
2121 07:40:56.285007 PCI: 00:15.1 child on link 0 I2C: 00:50
2122 07:40:56.296205 PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10
2123 07:40:56.296863 I2C: 00:50
2124 07:40:56.299582 PCI: 00:16.0
2125 07:40:56.311722 PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10
2126 07:40:56.315120 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
2127 07:40:56.322997 PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c
2128 07:40:56.334124 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2129 07:40:56.347249 PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
2130 07:40:56.347641 PCI: 82:00.0
2131 07:40:56.357383 PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10
2132 07:40:56.366951 PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18
2133 07:40:56.377153 PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20
2134 07:40:56.383724 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
2135 07:40:56.390393 PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2136 07:40:56.403579 PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2137 07:40:56.413426 PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20
2138 07:40:56.416939 GENERIC: 0.0
2139 07:40:56.417288 PCI: 83:00.0
2140 07:40:56.426621 PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10
2141 07:40:56.433205 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
2142 07:40:56.440068 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2143 07:40:56.453471 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2144 07:40:56.463169 PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20
2145 07:40:56.466166 GENERIC: 0.0
2146 07:40:56.466524 PCI: 84:00.0
2147 07:40:56.476515 PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10
2148 07:40:56.479841 PCI: 00:1e.0
2149 07:40:56.489838 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
2150 07:40:56.492926 PCI: 00:1e.3
2151 07:40:56.502988 PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10
2152 07:40:56.506508 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
2153 07:40:56.516338 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
2154 07:40:56.516783 PNP: 0c09.0
2155 07:40:56.526351 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
2156 07:40:56.530010 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
2157 07:40:56.540007 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
2158 07:40:56.549715 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
2159 07:40:56.553019 GENERIC: 0.0 child on link 0 GENERIC: 0.0
2160 07:40:56.556203 GENERIC: 0.0
2161 07:40:56.556577 GENERIC: 1.0
2162 07:40:56.559282 PCI: 00:1f.3
2163 07:40:56.569646 PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10
2164 07:40:56.579238 PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20
2165 07:40:56.583013 PCI: 00:1f.4
2166 07:40:56.592642 PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10
2167 07:40:56.599366 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
2168 07:40:56.602885 PCI: 00:1f.5
2169 07:40:56.612658 PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10
2170 07:40:56.615764 Done allocating resources.
2171 07:40:56.622733 BS: BS_DEV_RESOURCES run times (exec / console): 5 / 4329 ms
2172 07:40:56.626057 coreboot skipped calling FSP notify phase: 00000020.
2173 07:40:56.632506 fw_config match found: AUDIO=NAU88L25B_I2S
2174 07:40:56.635861 BT offload enabled over I2S with NAU88L25B
2175 07:40:56.642318 BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms
2176 07:40:56.645886 Enabling resources...
2177 07:40:56.649069 PCI: 00:00.0 subsystem <- 8086/4619
2178 07:40:56.649454 PCI: 00:00.0 cmd <- 06
2179 07:40:56.656148 PCI: 00:02.0 subsystem <- 8086/46b3
2180 07:40:56.656626 PCI: 00:02.0 cmd <- 03
2181 07:40:56.659196 PCI: 00:04.0 subsystem <- 8086/461d
2182 07:40:56.662518 PCI: 00:04.0 cmd <- 02
2183 07:40:56.665627 PCI: 00:07.0 bridge ctrl <- 0013
2184 07:40:56.668957 PCI: 00:07.0 cmd <- 07
2185 07:40:56.672561 PCI: 00:07.1 bridge ctrl <- 0013
2186 07:40:56.673027 PCI: 00:07.1 cmd <- 07
2187 07:40:56.675729 PCI: 00:07.2 bridge ctrl <- 0013
2188 07:40:56.679230 PCI: 00:07.2 cmd <- 07
2189 07:40:56.682569 PCI: 00:0a.0 subsystem <- 8086/467d
2190 07:40:56.686016 PCI: 00:0a.0 cmd <- 02
2191 07:40:56.689171 PCI: 00:0d.0 subsystem <- 8086/461e
2192 07:40:56.692276 PCI: 00:0d.0 cmd <- 02
2193 07:40:56.695832 PCI: 00:0d.2 subsystem <- 8086/463e
2194 07:40:56.699308 PCI: 00:0d.2 cmd <- 02
2195 07:40:56.702945 PCI: 00:0d.3 subsystem <- 8086/466d
2196 07:40:56.703449 PCI: 00:0d.3 cmd <- 02
2197 07:40:56.705845 PCI: 00:14.0 subsystem <- 8086/51ed
2198 07:40:56.709206 PCI: 00:14.0 cmd <- 02
2199 07:40:56.712523 PCI: 00:14.2 subsystem <- 8086/51ef
2200 07:40:56.715982 PCI: 00:14.2 cmd <- 02
2201 07:40:56.718725 PCI: 00:14.3 subsystem <- 8086/51f0
2202 07:40:56.722314 PCI: 00:14.3 cmd <- 02
2203 07:40:56.725685 PCI: 00:15.0 subsystem <- 8086/51e8
2204 07:40:56.728909 PCI: 00:15.0 cmd <- 02
2205 07:40:56.732221 PCI: 00:15.1 subsystem <- 8086/51e9
2206 07:40:56.732776 PCI: 00:15.1 cmd <- 06
2207 07:40:56.735476 PCI: 00:16.0 subsystem <- 8086/51e0
2208 07:40:56.738935 PCI: 00:16.0 cmd <- 02
2209 07:40:56.742433 PCI: 00:1c.0 bridge ctrl <- 0013
2210 07:40:56.745517 PCI: 00:1c.0 subsystem <- 8086/51be
2211 07:40:56.748891 PCI: 00:1c.0 cmd <- 07
2212 07:40:56.751922 PCI: 00:1c.7 bridge ctrl <- 0013
2213 07:40:56.755790 PCI: 00:1c.7 subsystem <- 8086/51bf
2214 07:40:56.759230 PCI: 00:1c.7 cmd <- 06
2215 07:40:56.762457 PCI: 00:1d.0 bridge ctrl <- 0013
2216 07:40:56.765749 PCI: 00:1d.0 subsystem <- 8086/51b3
2217 07:40:56.768794 PCI: 00:1d.0 cmd <- 06
2218 07:40:56.771976 PCI: 00:1e.0 subsystem <- 8086/51a8
2219 07:40:56.772298 PCI: 00:1e.0 cmd <- 06
2220 07:40:56.775413 PCI: 00:1e.3 subsystem <- 8086/51ab
2221 07:40:56.778890 PCI: 00:1e.3 cmd <- 02
2222 07:40:56.782270 PCI: 00:1f.0 subsystem <- 8086/5182
2223 07:40:56.785851 PCI: 00:1f.0 cmd <- 407
2224 07:40:56.789086 PCI: 00:1f.3 subsystem <- 8086/51c8
2225 07:40:56.792137 PCI: 00:1f.3 cmd <- 02
2226 07:40:56.795355 PCI: 00:1f.4 subsystem <- 8086/51a3
2227 07:40:56.798797 PCI: 00:1f.4 cmd <- 03
2228 07:40:56.802300 PCI: 00:1f.5 subsystem <- 8086/51a4
2229 07:40:56.802765 PCI: 00:1f.5 cmd <- 406
2230 07:40:56.805526 PCI: 82:00.0 cmd <- 03
2231 07:40:56.808608 PCI: 83:00.0 cmd <- 06
2232 07:40:56.812274 PCI: 84:00.0 cmd <- 02
2233 07:40:56.812743 done.
2234 07:40:56.815345 BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms
2235 07:40:56.818603 ME: Version: Unavailable
2236 07:40:56.825359 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
2237 07:40:56.828953 Initializing devices...
2238 07:40:56.829420 Root Device init
2239 07:40:56.831788 mainboard: EC init
2240 07:40:56.834951 Chrome EC: Set SMI mask to 0x0000000000000000
2241 07:40:56.838640 Chrome EC: UHEPI supported
2242 07:40:56.845435 Chrome EC: clear events_b mask to 0x0000000000000000
2243 07:40:56.851649 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
2244 07:40:56.855206 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
2245 07:40:56.862115 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004
2246 07:40:56.868436 Chrome EC: Set WAKE mask to 0x0000000000000000
2247 07:40:56.871544 Root Device init finished in 38 msecs
2248 07:40:56.871912 PCI: 00:00.0 init
2249 07:40:56.874839 CPU TDP = 15 Watts
2250 07:40:56.878582 CPU PL1 = 55 Watts
2251 07:40:56.879054 CPU PL2 = 55 Watts
2252 07:40:56.881901 CPU PsysPL2 = 90 Watts
2253 07:40:56.885211 CPU PL4 = 123 Watts
2254 07:40:56.888492 PCI: 00:00.0 init finished in 10 msecs
2255 07:40:56.888875 PCI: 00:02.0 init
2256 07:40:56.891919 GMA: Found VBT in CBFS
2257 07:40:56.895235 GMA: Found valid VBT in CBFS
2258 07:40:56.898732 Graphics hand-off block not found
2259 07:40:56.901881 PCI: 00:02.0 init finished in 8 msecs
2260 07:40:56.905128 PCI: 00:0a.0 init
2261 07:40:56.908327 PCI: 00:0a.0 init finished in 0 msecs
2262 07:40:56.908705 PCI: 00:14.0 init
2263 07:40:56.911753 PCI: 00:14.0 init finished in 0 msecs
2264 07:40:56.915280 PCI: 00:14.2 init
2265 07:40:56.918658 PCI: 00:14.2 init finished in 0 msecs
2266 07:40:56.921504 PCI: 00:15.0 init
2267 07:40:56.925281 I2C bus 0 version 0x3230302a
2268 07:40:56.928330 DW I2C bus 0 at 0x808d7000 (400 KHz)
2269 07:40:56.931628 PCI: 00:15.0 init finished in 6 msecs
2270 07:40:56.932009 PCI: 00:15.1 init
2271 07:40:56.934902 I2C bus 1 version 0x3230302a
2272 07:40:56.938663 DW I2C bus 1 at 0x808d8000 (400 KHz)
2273 07:40:56.945177 PCI: 00:15.1 init finished in 6 msecs
2274 07:40:56.945604 PCI: 00:16.0 init
2275 07:40:56.948475 PCI: 00:16.0 init finished in 0 msecs
2276 07:40:56.951479 PCI: 00:1c.0 init
2277 07:40:56.955107 Initializing PCH PCIe bridge.
2278 07:40:56.958372 PCI: 00:1c.0 init finished in 3 msecs
2279 07:40:56.958873 PCI: 00:1c.7 init
2280 07:40:56.961830 Initializing PCH PCIe bridge.
2281 07:40:56.964867 PCI: 00:1c.7 init finished in 3 msecs
2282 07:40:56.968333 PCI: 00:1d.0 init
2283 07:40:56.971335 Initializing PCH PCIe bridge.
2284 07:40:56.975004 PCI: 00:1d.0 init finished in 3 msecs
2285 07:40:56.978540 PCI: 00:1f.0 init
2286 07:40:56.981677 IOAPIC: Initializing IOAPIC at 0xfec00000
2287 07:40:56.982060 IOAPIC: ID = 0x02
2288 07:40:56.985214 IOAPIC: Dumping registers
2289 07:40:56.988478 reg 0x0000: 0x02000000
2290 07:40:56.991478 reg 0x0001: 0x00770020
2291 07:40:56.995334 reg 0x0002: 0x00000000
2292 07:40:56.995847 IOAPIC: 120 interrupts
2293 07:40:56.998476 IOAPIC: Clearing IOAPIC at 0xfec00000
2294 07:40:57.005204 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2295 07:40:57.008355 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2296 07:40:57.014945 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2297 07:40:57.018386 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2298 07:40:57.024932 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2299 07:40:57.028336 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2300 07:40:57.034556 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2301 07:40:57.038098 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2302 07:40:57.041760 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2303 07:40:57.047885 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2304 07:40:57.051229 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2305 07:40:57.057717 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2306 07:40:57.061172 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2307 07:40:57.067589 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2308 07:40:57.070983 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2309 07:40:57.078062 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2310 07:40:57.081429 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2311 07:40:57.084788 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2312 07:40:57.090759 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2313 07:40:57.094071 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2314 07:40:57.100979 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2315 07:40:57.104406 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2316 07:40:57.110754 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2317 07:40:57.114032 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2318 07:40:57.120551 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2319 07:40:57.124080 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2320 07:40:57.127197 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2321 07:40:57.133742 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2322 07:40:57.137404 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2323 07:40:57.143931 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2324 07:40:57.146907 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2325 07:40:57.153974 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2326 07:40:57.157080 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2327 07:40:57.163676 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2328 07:40:57.167073 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2329 07:40:57.173725 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2330 07:40:57.177066 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2331 07:40:57.180092 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2332 07:40:57.186892 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2333 07:40:57.190188 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2334 07:40:57.197010 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2335 07:40:57.200077 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2336 07:40:57.206872 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2337 07:40:57.210037 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2338 07:40:57.216812 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2339 07:40:57.220025 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2340 07:40:57.223252 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2341 07:40:57.230201 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2342 07:40:57.232974 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2343 07:40:57.240130 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2344 07:40:57.243178 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2345 07:40:57.249668 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2346 07:40:57.253158 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2347 07:40:57.260084 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2348 07:40:57.263014 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2349 07:40:57.266533 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2350 07:40:57.272926 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2351 07:40:57.276625 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2352 07:40:57.282684 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2353 07:40:57.285819 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2354 07:40:57.292759 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2355 07:40:57.295919 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2356 07:40:57.302456 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2357 07:40:57.305710 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2358 07:40:57.309563 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2359 07:40:57.315810 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2360 07:40:57.319014 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2361 07:40:57.325792 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2362 07:40:57.329123 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2363 07:40:57.335449 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2364 07:40:57.338933 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2365 07:40:57.345566 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2366 07:40:57.348913 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2367 07:40:57.355576 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2368 07:40:57.359030 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2369 07:40:57.362380 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2370 07:40:57.368955 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2371 07:40:57.372314 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2372 07:40:57.378910 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2373 07:40:57.382101 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2374 07:40:57.388875 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2375 07:40:57.392016 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2376 07:40:57.398908 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2377 07:40:57.402171 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2378 07:40:57.405709 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2379 07:40:57.411918 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2380 07:40:57.415001 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2381 07:40:57.422149 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2382 07:40:57.425328 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2383 07:40:57.431948 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2384 07:40:57.435209 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2385 07:40:57.442273 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2386 07:40:57.444968 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2387 07:40:57.448254 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2388 07:40:57.455153 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2389 07:40:57.458085 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2390 07:40:57.464895 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2391 07:40:57.468252 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2392 07:40:57.474982 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2393 07:40:57.478428 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2394 07:40:57.484900 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2395 07:40:57.488140 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2396 07:40:57.491670 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2397 07:40:57.498230 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2398 07:40:57.501581 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2399 07:40:57.508152 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2400 07:40:57.511742 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2401 07:40:57.518036 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2402 07:40:57.521455 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2403 07:40:57.528004 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2404 07:40:57.531444 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2405 07:40:57.534393 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2406 07:40:57.541227 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2407 07:40:57.544633 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2408 07:40:57.551209 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2409 07:40:57.554770 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2410 07:40:57.561323 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2411 07:40:57.564548 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2412 07:40:57.571537 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2413 07:40:57.574610 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2414 07:40:57.578172 IOAPIC: Bootstrap Processor Local APIC = 0x00
2415 07:40:57.584329 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2416 07:40:57.587737 PCI: 00:1f.0 init finished in 607 msecs
2417 07:40:57.591206 PCI: 00:1f.2 init
2418 07:40:57.594875 apm_control: Disabling ACPI.
2419 07:40:57.595371 APMC done.
2420 07:40:57.598147 PCI: 00:1f.2 init finished in 5 msecs
2421 07:40:57.601510 PCI: 00:1f.3 init
2422 07:40:57.604996 PCI: 00:1f.3 init finished in 0 msecs
2423 07:40:57.608403 PCI: 00:1f.4 init
2424 07:40:57.611761 PCI: 00:1f.4 init finished in 0 msecs
2425 07:40:57.612221 PCI: 82:00.0 init
2426 07:40:57.618013 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
2427 07:40:57.621156 Located 'ethernet_mac0' in VPD
2428 07:40:57.624720 r8168: Resetting NIC...done
2429 07:40:57.628023 r8168: Programming MAC Address...done
2430 07:40:57.631653 r8168: Customized LED 0x482
2431 07:40:57.634384 r8168: read back LED setting as 0x482
2432 07:40:57.638382 PCI: 82:00.0 init finished in 21 msecs
2433 07:40:57.641397 PCI: 83:00.0 init
2434 07:40:57.644544 PCI: 83:00.0 init finished in 0 msecs
2435 07:40:57.644989 PCI: 84:00.0 init
2436 07:40:57.651213 PCI: 84:00.0 init finished in 0 msecs
2437 07:40:57.651805 PNP: 0c09.0 init
2438 07:40:57.658024 Google Chrome EC uptime: 13.535 seconds
2439 07:40:57.661408 Google Chrome AP resets since EC boot: 1
2440 07:40:57.664653 Google Chrome most recent AP reset causes:
2441 07:40:57.667985 0.311: 32775 shutdown: entering G3
2442 07:40:57.674698 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2443 07:40:57.677940 PNP: 0c09.0 init finished in 23 msecs
2444 07:40:57.681366 GENERIC: 0.0 init
2445 07:40:57.684438 GENERIC: 0.0 init finished in 0 msecs
2446 07:40:57.687695 GENERIC: 1.0 init
2447 07:40:57.691028 GENERIC: 1.0 init finished in 0 msecs
2448 07:40:57.691382 Devices initialized
2449 07:40:57.694500 Show all devs... After init.
2450 07:40:57.697885 Root Device: enabled 1
2451 07:40:57.701193 CPU_CLUSTER: 0: enabled 1
2452 07:40:57.701689 DOMAIN: 0000: enabled 1
2453 07:40:57.704561 GPIO: 0: enabled 1
2454 07:40:57.707937 PCI: 00:00.0: enabled 1
2455 07:40:57.708420 PCI: 00:01.0: enabled 0
2456 07:40:57.711055 PCI: 00:01.1: enabled 0
2457 07:40:57.714407 PCI: 00:02.0: enabled 1
2458 07:40:57.717706 PCI: 00:04.0: enabled 1
2459 07:40:57.718105 PCI: 00:05.0: enabled 0
2460 07:40:57.720964 PCI: 00:06.0: enabled 0
2461 07:40:57.724058 PCI: 00:06.2: enabled 0
2462 07:40:57.727514 PCI: 00:07.0: enabled 1
2463 07:40:57.727885 PCI: 00:07.1: enabled 1
2464 07:40:57.730970 PCI: 00:07.2: enabled 1
2465 07:40:57.734113 PCI: 00:07.3: enabled 0
2466 07:40:57.738234 PCI: 00:08.0: enabled 0
2467 07:40:57.738604 PCI: 00:09.0: enabled 0
2468 07:40:57.741151 PCI: 00:0a.0: enabled 1
2469 07:40:57.744304 PCI: 00:0d.0: enabled 1
2470 07:40:57.744686 PCI: 00:0d.1: enabled 0
2471 07:40:57.747709 PCI: 00:0d.2: enabled 1
2472 07:40:57.750755 PCI: 00:0d.3: enabled 1
2473 07:40:57.754727 PCI: 00:0e.0: enabled 0
2474 07:40:57.755243 PCI: 00:10.0: enabled 0
2475 07:40:57.757521 PCI: 00:10.1: enabled 0
2476 07:40:57.760652 PCI: 00:10.6: enabled 0
2477 07:40:57.764521 PCI: 00:10.7: enabled 0
2478 07:40:57.765005 PCI: 00:12.0: enabled 0
2479 07:40:57.767573 PCI: 00:12.6: enabled 0
2480 07:40:57.771149 PCI: 00:12.7: enabled 0
2481 07:40:57.774366 PCI: 00:13.0: enabled 0
2482 07:40:57.774756 PCI: 00:14.0: enabled 1
2483 07:40:57.777808 PCI: 00:14.1: enabled 0
2484 07:40:57.781077 PCI: 00:14.2: enabled 1
2485 07:40:57.784063 PCI: 00:14.3: enabled 1
2486 07:40:57.784437 PCI: 00:15.0: enabled 1
2487 07:40:57.787780 PCI: 00:15.1: enabled 1
2488 07:40:57.790572 PCI: 00:15.2: enabled 0
2489 07:40:57.790953 PCI: 00:15.3: enabled 0
2490 07:40:57.794075 PCI: 00:16.0: enabled 1
2491 07:40:57.797453 PCI: 00:16.1: enabled 0
2492 07:40:57.801067 PCI: 00:16.2: enabled 0
2493 07:40:57.801542 PCI: 00:16.3: enabled 0
2494 07:40:57.803928 PCI: 00:16.4: enabled 0
2495 07:40:57.807368 PCI: 00:16.5: enabled 0
2496 07:40:57.810510 PCI: 00:17.0: enabled 0
2497 07:40:57.810885 PCI: 00:19.0: enabled 0
2498 07:40:57.814133 PCI: 00:19.1: enabled 0
2499 07:40:57.817462 PCI: 00:19.2: enabled 0
2500 07:40:57.820765 PCI: 00:1a.0: enabled 0
2501 07:40:57.821143 PCI: 00:1c.0: enabled 0
2502 07:40:57.823953 PCI: 00:1c.1: enabled 0
2503 07:40:57.827289 PCI: 00:1c.2: enabled 0
2504 07:40:57.827688 PCI: 00:1c.3: enabled 0
2505 07:40:57.830687 PCI: 00:1c.4: enabled 0
2506 07:40:57.833632 PCI: 00:1c.5: enabled 1
2507 07:40:57.837434 PCI: 00:1c.0: enabled 1
2508 07:40:57.837902 PCI: 00:1c.7: enabled 1
2509 07:40:57.840503 PCI: 00:1d.0: enabled 0
2510 07:40:57.843897 PCI: 00:1d.1: enabled 0
2511 07:40:57.847263 PCI: 00:1d.2: enabled 0
2512 07:40:57.847787 PCI: 00:1d.0: enabled 1
2513 07:40:57.850505 PCI: 00:1e.0: enabled 1
2514 07:40:57.853993 PCI: 00:1e.1: enabled 0
2515 07:40:57.857353 PCI: 00:1e.2: enabled 0
2516 07:40:57.857838 PCI: 00:1e.3: enabled 1
2517 07:40:57.860788 PCI: 00:1f.0: enabled 1
2518 07:40:57.863717 PCI: 00:1f.1: enabled 0
2519 07:40:57.867134 PCI: 00:1f.2: enabled 1
2520 07:40:57.867528 PCI: 00:1f.3: enabled 1
2521 07:40:57.870666 PCI: 00:1f.4: enabled 1
2522 07:40:57.873573 PCI: 00:1f.5: enabled 1
2523 07:40:57.873998 PCI: 00:1f.6: enabled 0
2524 07:40:57.877256 PCI: 00:1f.7: enabled 0
2525 07:40:57.880270 GENERIC: 0.0: enabled 1
2526 07:40:57.883701 GENERIC: 0.0: enabled 1
2527 07:40:57.884051 GENERIC: 1.0: enabled 1
2528 07:40:57.887276 GENERIC: 0.0: enabled 1
2529 07:40:57.890286 GENERIC: 1.0: enabled 1
2530 07:40:57.893810 USB0 port 0: enabled 1
2531 07:40:57.894268 GENERIC: 0.0: enabled 1
2532 07:40:57.896905 GENERIC: 0.0: enabled 1
2533 07:40:57.900036 USB0 port 0: enabled 1
2534 07:40:57.900387 GENERIC: 0.0: enabled 1
2535 07:40:57.903571 I2C: 00:1a: enabled 1
2536 07:40:57.906899 I2C: 00:50: enabled 1
2537 07:40:57.910426 PCI: 00:00.0: enabled 1
2538 07:40:57.910884 PCI: 82:00.0: enabled 1
2539 07:40:57.913783 GENERIC: 0.0: enabled 1
2540 07:40:57.917486 GENERIC: 0.0: enabled 1
2541 07:40:57.917971 PNP: 0c09.0: enabled 1
2542 07:40:57.920298 GENERIC: 0.0: enabled 1
2543 07:40:57.923274 USB3 port 0: enabled 1
2544 07:40:57.927072 USB3 port 1: enabled 0
2545 07:40:57.927563 USB3 port 2: enabled 1
2546 07:40:57.930776 USB3 port 3: enabled 0
2547 07:40:57.933609 USB2 port 0: enabled 1
2548 07:40:57.933939 USB2 port 1: enabled 0
2549 07:40:57.936858 USB2 port 2: enabled 1
2550 07:40:57.940243 USB2 port 3: enabled 1
2551 07:40:57.943734 USB2 port 4: enabled 1
2552 07:40:57.944228 USB2 port 5: enabled 1
2553 07:40:57.947156 USB2 port 6: enabled 1
2554 07:40:57.949928 USB2 port 7: enabled 1
2555 07:40:57.950304 USB2 port 8: enabled 0
2556 07:40:57.953653 USB2 port 9: enabled 1
2557 07:40:57.956610 USB3 port 0: enabled 1
2558 07:40:57.960067 USB3 port 1: enabled 1
2559 07:40:57.960512 USB3 port 2: enabled 1
2560 07:40:57.963628 USB3 port 3: enabled 1
2561 07:40:57.967108 GENERIC: 0.0: enabled 1
2562 07:40:57.967621 GENERIC: 1.0: enabled 1
2563 07:40:57.970421 APIC: 00: enabled 1
2564 07:40:57.973271 APIC: 14: enabled 1
2565 07:40:57.973654 APIC: 16: enabled 1
2566 07:40:57.977166 APIC: 10: enabled 1
2567 07:40:57.977655 APIC: 12: enabled 1
2568 07:40:57.980057 NONE: enabled 1
2569 07:40:57.980419 NONE: enabled 1
2570 07:40:57.982948 NONE: enabled 1
2571 07:40:57.986943 PCI: 83:00.0: enabled 1
2572 07:40:57.987442 PCI: 84:00.0: enabled 1
2573 07:40:57.993727 BS: BS_DEV_INIT run times (exec / console): 6 / 1157 ms
2574 07:40:57.999906 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2575 07:40:58.002952 ELOG: NV offset 0xf20000 size 0x4000
2576 07:40:58.010105 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2577 07:40:58.016560 ELOG: Event(17) added with size 13 at 2024-01-03 07:40:58 UTC
2578 07:40:58.023390 ELOG: Event(9E) added with size 10 at 2024-01-03 07:40:58 UTC
2579 07:40:58.029881 ELOG: Event(9F) added with size 14 at 2024-01-03 07:40:58 UTC
2580 07:40:58.036988 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2581 07:40:58.043121 ELOG: Event(A0) added with size 9 at 2024-01-03 07:40:58 UTC
2582 07:40:58.046620 elog_add_boot_reason: Logged dev mode boot
2583 07:40:58.053483 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2584 07:40:58.053968 Finalize devices...
2585 07:40:58.056147 PCI: 00:16.0 final
2586 07:40:58.059764 CSE RW Firmware Version: 16.1.25.2049
2587 07:40:58.063351 PCI: 00:1f.2 final
2588 07:40:58.063736 PCI: 00:1f.4 final
2589 07:40:58.066235 GENERIC: 0.0 final
2590 07:40:58.073098 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2591 07:40:58.073558 GENERIC: 1.0 final
2592 07:40:58.079358 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2593 07:40:58.083297 Devices finalized
2594 07:40:58.086368 BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
2595 07:40:58.093128 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2596 07:40:58.099771 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2597 07:40:58.102610 ME: HFSTS1 : 0x90000245
2598 07:40:58.106447 ME: HFSTS2 : 0x32850116
2599 07:40:58.112684 ME: HFSTS3 : 0x00000050
2600 07:40:58.116052 ME: HFSTS4 : 0x00004000
2601 07:40:58.119225 ME: HFSTS5 : 0x00000000
2602 07:40:58.126184 ME: HFSTS6 : 0x40600006
2603 07:40:58.129536 ME: Manufacturing Mode : NO
2604 07:40:58.132450 ME: SPI Protection Mode Enabled : YES
2605 07:40:58.135730 ME: FPFs Committed : YES
2606 07:40:58.139117 ME: Manufacturing Vars Locked : YES
2607 07:40:58.145784 ME: FW Partition Table : OK
2608 07:40:58.148988 ME: Bringup Loader Failure : NO
2609 07:40:58.152452 ME: Firmware Init Complete : YES
2610 07:40:58.155975 ME: Boot Options Present : NO
2611 07:40:58.159188 ME: Update In Progress : NO
2612 07:40:58.162672 ME: D0i3 Support : YES
2613 07:40:58.165835 ME: Low Power State Enabled : NO
2614 07:40:58.168780 ME: CPU Replaced : YES
2615 07:40:58.175183 ME: CPU Replacement Valid : YES
2616 07:40:58.178553 ME: Current Working State : 5
2617 07:40:58.182199 ME: Current Operation State : 1
2618 07:40:58.185755 ME: Current Operation Mode : 0
2619 07:40:58.188746 ME: Error Code : 0
2620 07:40:58.192019 ME: Enhanced Debug Mode : NO
2621 07:40:58.195299 ME: CPU Debug Disabled : YES
2622 07:40:58.198812 ME: TXT Support : NO
2623 07:40:58.205796 ME: WP for RO is enabled : YES
2624 07:40:58.208786 ME: RO write protection scope - Start=0x1000, End=0x1A6FFF
2625 07:40:58.215313 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2626 07:40:58.218917 Ramoops buffer: 0x100000@0x76898000.
2627 07:40:58.225469 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2628 07:40:58.232099 CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c
2629 07:40:58.235032 CBFS: 'fallback/slic' not found.
2630 07:40:58.241671 ACPI: Writing ACPI tables at 7686c000.
2631 07:40:58.242095 ACPI: * FACS
2632 07:40:58.245046 ACPI: * DSDT
2633 07:40:58.248180 PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000
2634 07:40:58.253800 ACPI: * FADT
2635 07:40:58.254258 SCI is IRQ9
2636 07:40:58.260419 ACPI: added table 1/32, length now 40
2637 07:40:58.260896 ACPI: * SSDT
2638 07:40:58.267166 Found 1 CPU(s) with 5/5 physical/logical core(s) each.
2639 07:40:58.270397 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2640 07:40:58.277219 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2641 07:40:58.280656 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2642 07:40:58.286973 \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0
2643 07:40:58.290532 \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1
2644 07:40:58.297290 \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2
2645 07:40:58.300340 USB Type-C 0 mapped to EC port 0
2646 07:40:58.307105 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2647 07:40:58.310305 \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0
2648 07:40:58.313557 USB Type-C 2 mapped to EC port 1
2649 07:40:58.320176 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2650 07:40:58.326755 \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0
2651 07:40:58.330113 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2652 07:40:58.336243 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2653 07:40:58.340170 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2654 07:40:58.346878 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0
2655 07:40:58.353304 \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)
2656 07:40:58.360444 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
2657 07:40:58.363456 \_SB.PCI0.RP09: Added StorageD3Enable property
2658 07:40:58.368179 EC returned error result code 1
2659 07:40:58.374867 PS2K: Bad resp from EC. Vivaldi disabled!
2660 07:40:58.381578 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2661 07:40:58.388070 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2
2662 07:40:58.394780 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2663 07:40:58.401451 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2
2664 07:40:58.407962 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3
2665 07:40:58.411511 \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4
2666 07:40:58.418499 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5
2667 07:40:58.425006 \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6
2668 07:40:58.431316 \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7
2669 07:40:58.437938 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2670 07:40:58.444592 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0
2671 07:40:58.451139 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1
2672 07:40:58.457807 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2
2673 07:40:58.464596 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3
2674 07:40:58.470942 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2675 07:40:58.477681 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2676 07:40:58.481019 ACPI: added table 2/32, length now 44
2677 07:40:58.484444 ACPI: * MCFG
2678 07:40:58.487288 ACPI: added table 3/32, length now 48
2679 07:40:58.487590 ACPI: * TPM2
2680 07:40:58.490790 TPM2 log created at 0x7685c000
2681 07:40:58.494328 ACPI: added table 4/32, length now 52
2682 07:40:58.497619 ACPI: * LPIT
2683 07:40:58.500924 ACPI: added table 5/32, length now 56
2684 07:40:58.501252 ACPI: * MADT
2685 07:40:58.504198 SCI is IRQ9
2686 07:40:58.507343 ACPI: added table 6/32, length now 60
2687 07:40:58.510861 cmd_reg from pmc_make_ipc_cmd 1052838
2688 07:40:58.517490 CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc
2689 07:40:58.523885 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2690 07:40:58.530912 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2691 07:40:58.534025 PMC CrashLog size in discovery mode: 0xC00
2692 07:40:58.537371 cpu crashlog bar addr: 0x808C0000
2693 07:40:58.540860 cpu discovery table offset: 0x6030
2694 07:40:58.543983 cpu_crashlog_discovery_table buffer count: 0x3
2695 07:40:58.550509 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2696 07:40:58.557514 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2697 07:40:58.564313 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2698 07:40:58.570744 PMC crashLog size in discovery mode : 0xC00
2699 07:40:58.577548 Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.
2700 07:40:58.580624 discover mode PMC crashlog size adjusted to: 0x200
2701 07:40:58.587141 Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.
2702 07:40:58.593866 discover mode PMC crashlog size adjusted to: 0x0
2703 07:40:58.597052 m_cpu_crashLog_size : 0x3480 bytes
2704 07:40:58.600522 CPU crashLog present.
2705 07:40:58.604320 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2706 07:40:58.610324 Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.
2707 07:40:58.613792 current = 76875cf0
2708 07:40:58.614309 ACPI: * DMAR
2709 07:40:58.616891 ACPI: added table 7/32, length now 64
2710 07:40:58.623764 ACPI: added table 8/32, length now 68
2711 07:40:58.624227 ACPI: * HPET
2712 07:40:58.627190 ACPI: added table 9/32, length now 72
2713 07:40:58.630598 ACPI: done.
2714 07:40:58.631053 ACPI tables: 40480 bytes.
2715 07:40:58.633711 smbios_write_tables: 76856000
2716 07:40:58.637377 EC returned error result code 3
2717 07:40:58.640601 Couldn't obtain OEM name from CBI
2718 07:40:58.644117 Create SMBIOS type 16
2719 07:40:58.647197 Create SMBIOS type 17
2720 07:40:58.650722 Create SMBIOS type 20
2721 07:40:58.651215 GENERIC: 0.0 (WIFI Device)
2722 07:40:58.654184 SMBIOS tables: 982 bytes.
2723 07:40:58.657477 Writing table forward entry at 0x00000500
2724 07:40:58.664013 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955
2725 07:40:58.667396 Writing coreboot table at 0x76890000
2726 07:40:58.674242 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2727 07:40:58.677273 1. 0000000000001000-000000000009ffff: RAM
2728 07:40:58.684060 2. 00000000000a0000-00000000000fffff: RESERVED
2729 07:40:58.687034 3. 0000000000100000-0000000076855fff: RAM
2730 07:40:58.694041 4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES
2731 07:40:58.697428 5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE
2732 07:40:58.703788 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2733 07:40:58.710417 7. 0000000077000000-00000000803fffff: RESERVED
2734 07:40:58.714467 8. 00000000c0000000-00000000cfffffff: RESERVED
2735 07:40:58.720363 9. 00000000f8000000-00000000f9ffffff: RESERVED
2736 07:40:58.723778 10. 00000000fb000000-00000000fb000fff: RESERVED
2737 07:40:58.727022 11. 00000000fc800000-00000000fe7fffff: RESERVED
2738 07:40:58.733531 12. 00000000feb00000-00000000feb7ffff: RESERVED
2739 07:40:58.736915 13. 00000000fec00000-00000000fecfffff: RESERVED
2740 07:40:58.743487 14. 00000000fed40000-00000000fed6ffff: RESERVED
2741 07:40:58.746968 15. 00000000fed80000-00000000fed87fff: RESERVED
2742 07:40:58.753615 16. 00000000fed90000-00000000fed92fff: RESERVED
2743 07:40:58.757122 17. 00000000feda0000-00000000feda1fff: RESERVED
2744 07:40:58.763548 18. 00000000fedc0000-00000000feddffff: RESERVED
2745 07:40:58.767133 19. 0000000100000000-000000017fbfffff: RAM
2746 07:40:58.770305 Passing 4 GPIOs to payload:
2747 07:40:58.773548 NAME | PORT | POLARITY | VALUE
2748 07:40:58.780162 lid | undefined | high | high
2749 07:40:58.783531 power | undefined | high | low
2750 07:40:58.790034 oprom | undefined | high | low
2751 07:40:58.796827 EC in RW | 0x00000151 | high | high
2752 07:40:58.797321 Board ID: 3
2753 07:40:58.800331 FW config: 0x64
2754 07:40:58.803580 Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum 274a
2755 07:40:58.806879 coreboot table: 1788 bytes.
2756 07:40:58.810310 IMD ROOT 0. 0x76fff000 0x00001000
2757 07:40:58.813927 IMD SMALL 1. 0x76ffe000 0x00001000
2758 07:40:58.820430 FSP MEMORY 2. 0x76afe000 0x00500000
2759 07:40:58.823529 CONSOLE 3. 0x76ade000 0x00020000
2760 07:40:58.827300 RW MCACHE 4. 0x76add000 0x00000464
2761 07:40:58.830392 RO MCACHE 5. 0x76adc000 0x00001000
2762 07:40:58.833751 FMAP 6. 0x76adb000 0x0000064a
2763 07:40:58.836775 TIME STAMP 7. 0x76ada000 0x00000910
2764 07:40:58.840300 VBOOT WORK 8. 0x76ac6000 0x00014000
2765 07:40:58.844062 MEM INFO 9. 0x76ac5000 0x000003b8
2766 07:40:58.850543 ROMSTG STCK10. 0x76ac4000 0x00001000
2767 07:40:58.853579 AFTER CAR 11. 0x76ab8000 0x0000c000
2768 07:40:58.857225 RAMSTAGE 12. 0x76a2d000 0x0008b000
2769 07:40:58.860506 ACPI BERT 13. 0x76a1d000 0x00010000
2770 07:40:58.863719 CHROMEOS NVS14. 0x76a1c000 0x00000f00
2771 07:40:58.867194 REFCODE 15. 0x769ad000 0x0006f000
2772 07:40:58.870802 SMM BACKUP 16. 0x7699d000 0x00010000
2773 07:40:58.873935 IGD OPREGION17. 0x76998000 0x000041fd
2774 07:40:58.880341 RAMOOPS 18. 0x76898000 0x00100000
2775 07:40:58.883542 COREBOOT 19. 0x76890000 0x00008000
2776 07:40:58.887244 ACPI 20. 0x7686c000 0x00024000
2777 07:40:58.890424 TPM2 TCGLOG21. 0x7685c000 0x00010000
2778 07:40:58.893582 PMC CRASHLOG22. 0x7685b000 0x00000c00
2779 07:40:58.897425 CPU CRASHLOG23. 0x76857000 0x00003480
2780 07:40:58.900210 SMBIOS 24. 0x76856000 0x00001000
2781 07:40:58.903529 IMD small region:
2782 07:40:58.906897 IMD ROOT 0. 0x76ffec00 0x00000400
2783 07:40:58.910212 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2784 07:40:58.916824 VPD 2. 0x76ffeba0 0x00000032
2785 07:40:58.920599 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020
2786 07:40:58.923904 POWER STATE 4. 0x76ffeb20 0x00000044
2787 07:40:58.926852 ROMSTAGE 5. 0x76ffeb00 0x00000004
2788 07:40:58.933756 ACPI GNVS 6. 0x76ffeaa0 0x00000048
2789 07:40:58.936814 TYPE_C INFO 7. 0x76ffea80 0x0000000c
2790 07:40:58.943410 BS: BS_WRITE_TABLES run times (exec / console): 7 / 704 ms
2791 07:40:58.943887 MTRR: Physical address space:
2792 07:40:58.950349 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2793 07:40:58.957193 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2794 07:40:58.963412 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2795 07:40:58.970008 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2796 07:40:58.976830 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2797 07:40:58.983293 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2798 07:40:58.990336 0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6
2799 07:40:58.996958 0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0
2800 07:40:58.999977 MTRR: Fixed MSR 0x250 0x0606060606060606
2801 07:40:59.003389 MTRR: Fixed MSR 0x258 0x0606060606060606
2802 07:40:59.006565 MTRR: Fixed MSR 0x259 0x0000000000000000
2803 07:40:59.009904 MTRR: Fixed MSR 0x268 0x0606060606060606
2804 07:40:59.016781 MTRR: Fixed MSR 0x269 0x0606060606060606
2805 07:40:59.019866 MTRR: Fixed MSR 0x26a 0x0606060606060606
2806 07:40:59.023135 MTRR: Fixed MSR 0x26b 0x0606060606060606
2807 07:40:59.026735 MTRR: Fixed MSR 0x26c 0x0606060606060606
2808 07:40:59.033238 MTRR: Fixed MSR 0x26d 0x0606060606060606
2809 07:40:59.036393 MTRR: Fixed MSR 0x26e 0x0606060606060606
2810 07:40:59.040171 MTRR: Fixed MSR 0x26f 0x0606060606060606
2811 07:40:59.043124 call enable_fixed_mtrr()
2812 07:40:59.046499 CPU physical address size: 39 bits
2813 07:40:59.049944 MTRR: default type WB/UC MTRR counts: 13/6.
2814 07:40:59.053325 MTRR: UC selected as default type.
2815 07:40:59.059990 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2816 07:40:59.066533 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2817 07:40:59.073256 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2818 07:40:59.079416 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2819 07:40:59.086373 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6
2820 07:40:59.093084 MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0
2821 07:40:59.096272 MTRR: Fixed MSR 0x250 0x0606060606060606
2822 07:40:59.099402 MTRR: Fixed MSR 0x258 0x0606060606060606
2823 07:40:59.103033 MTRR: Fixed MSR 0x259 0x0000000000000000
2824 07:40:59.109302 MTRR: Fixed MSR 0x268 0x0606060606060606
2825 07:40:59.113179 MTRR: Fixed MSR 0x269 0x0606060606060606
2826 07:40:59.116228 MTRR: Fixed MSR 0x26a 0x0606060606060606
2827 07:40:59.119376 MTRR: Fixed MSR 0x26b 0x0606060606060606
2828 07:40:59.126139 MTRR: Fixed MSR 0x26c 0x0606060606060606
2829 07:40:59.129444 MTRR: Fixed MSR 0x26d 0x0606060606060606
2830 07:40:59.132725 MTRR: Fixed MSR 0x26e 0x0606060606060606
2831 07:40:59.135659 MTRR: Fixed MSR 0x26f 0x0606060606060606
2832 07:40:59.142574 MTRR: Fixed MSR 0x250 0x0606060606060606
2833 07:40:59.146209 MTRR: Fixed MSR 0x258 0x0606060606060606
2834 07:40:59.149452 MTRR: Fixed MSR 0x259 0x0000000000000000
2835 07:40:59.152631 MTRR: Fixed MSR 0x268 0x0606060606060606
2836 07:40:59.156272 MTRR: Fixed MSR 0x269 0x0606060606060606
2837 07:40:59.162818 MTRR: Fixed MSR 0x26a 0x0606060606060606
2838 07:40:59.166081 MTRR: Fixed MSR 0x26b 0x0606060606060606
2839 07:40:59.169236 MTRR: Fixed MSR 0x26c 0x0606060606060606
2840 07:40:59.172519 MTRR: Fixed MSR 0x26d 0x0606060606060606
2841 07:40:59.179238 MTRR: Fixed MSR 0x26e 0x0606060606060606
2842 07:40:59.182374 MTRR: Fixed MSR 0x26f 0x0606060606060606
2843 07:40:59.185729 MTRR: Fixed MSR 0x250 0x0606060606060606
2844 07:40:59.189167 MTRR: Fixed MSR 0x258 0x0606060606060606
2845 07:40:59.195997 MTRR: Fixed MSR 0x259 0x0000000000000000
2846 07:40:59.198791 MTRR: Fixed MSR 0x268 0x0606060606060606
2847 07:40:59.202395 MTRR: Fixed MSR 0x269 0x0606060606060606
2848 07:40:59.205636 MTRR: Fixed MSR 0x26a 0x0606060606060606
2849 07:40:59.212330 MTRR: Fixed MSR 0x26b 0x0606060606060606
2850 07:40:59.215672 MTRR: Fixed MSR 0x26c 0x0606060606060606
2851 07:40:59.218913 MTRR: Fixed MSR 0x26d 0x0606060606060606
2852 07:40:59.222408 MTRR: Fixed MSR 0x26e 0x0606060606060606
2853 07:40:59.225469 MTRR: Fixed MSR 0x26f 0x0606060606060606
2854 07:40:59.228923 call enable_fixed_mtrr()
2855 07:40:59.232294 call enable_fixed_mtrr()
2856 07:40:59.235261 call enable_fixed_mtrr()
2857 07:40:59.238824 CPU physical address size: 39 bits
2858 07:40:59.242328 CPU physical address size: 39 bits
2859 07:40:59.245603 CPU physical address size: 39 bits
2860 07:40:59.248848 MTRR: Fixed MSR 0x250 0x0606060606060606
2861 07:40:59.252172 MTRR: Fixed MSR 0x258 0x0606060606060606
2862 07:40:59.258995 MTRR: Fixed MSR 0x259 0x0000000000000000
2863 07:40:59.262211 MTRR: Fixed MSR 0x268 0x0606060606060606
2864 07:40:59.265497 MTRR: Fixed MSR 0x269 0x0606060606060606
2865 07:40:59.268681 MTRR: Fixed MSR 0x26a 0x0606060606060606
2866 07:40:59.275189 MTRR: Fixed MSR 0x26b 0x0606060606060606
2867 07:40:59.278863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2868 07:40:59.281929 MTRR: Fixed MSR 0x26d 0x0606060606060606
2869 07:40:59.285100 MTRR: Fixed MSR 0x26e 0x0606060606060606
2870 07:40:59.291913 MTRR: Fixed MSR 0x26f 0x0606060606060606
2871 07:40:59.292265 call enable_fixed_mtrr()
2872 07:40:59.295412 CPU physical address size: 39 bits
2873 07:40:59.295890
2874 07:40:59.298369 MTRR check
2875 07:40:59.298825 Fixed MTRRs : Enabled
2876 07:40:59.301950 Variable MTRRs: Enabled
2877 07:40:59.302316
2878 07:40:59.308614 BS: BS_WRITE_TABLES exit times (exec / console): 140 / 156 ms
2879 07:40:59.311917 Checking cr50 for pending updates
2880 07:40:59.323898 Reading cr50 TPM mode
2881 07:40:59.339113 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2882 07:40:59.348903 CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434
2883 07:40:59.352185 Checking segment from ROM address 0xff1f03ac
2884 07:40:59.355473 Checking segment from ROM address 0xff1f03c8
2885 07:40:59.362233 Loading segment from ROM address 0xff1f03ac
2886 07:40:59.362676 code (compression=1)
2887 07:40:59.371804 New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226
2888 07:40:59.378661 Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226
2889 07:40:59.381715 using LZMA
2890 07:40:59.425981 [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4
2891 07:40:59.432701 Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88
2892 07:40:59.443398 Loading segment from ROM address 0xff1f03c8
2893 07:40:59.446959 Entry Point 0x30000000
2894 07:40:59.447458 Loaded segments
2895 07:40:59.453786 BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms
2896 07:40:59.457232 coreboot skipped calling FSP notify phase: 00000040.
2897 07:40:59.464088 coreboot skipped calling FSP notify phase: 000000f0.
2898 07:40:59.470786 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2899 07:40:59.471289 Finalizing chipset.
2900 07:40:59.473939 apm_control: Finalizing SMM.
2901 07:40:59.477031 APMC done.
2902 07:40:59.480472 CSE: EOP requested action: continue boot
2903 07:40:59.483820 HECI: CSE device 16.1 is disabled
2904 07:40:59.487160 HECI: CSE device 16.2 is disabled
2905 07:40:59.490373 HECI: CSE device 16.3 is disabled
2906 07:40:59.493835 HECI: CSE device 16.4 is disabled
2907 07:40:59.497371 HECI: CSE device 16.5 is disabled
2908 07:40:59.504058 BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 27 ms
2909 07:40:59.507036 mp_park_aps done after 0 msecs.
2910 07:40:59.510297 Jumping to boot code at 0x30000000(0x76890000)
2911 07:40:59.520228 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2912 07:40:59.525612
2913 07:40:59.526025
2914 07:40:59.526275
2915 07:40:59.529176 Starting depthcharge on Moli...
2916 07:40:59.529650
2917 07:40:59.530636 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
2918 07:40:59.531003 start: 2.2.4 bootloader-commands (timeout 00:04:39) [common]
2919 07:40:59.531303 Setting prompt string to ['brask:']
2920 07:40:59.531622 bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:39)
2921 07:40:59.535305 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2922 07:40:59.535763
2923 07:40:59.542595 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2924 07:40:59.542975
2925 07:40:59.549009 Looking for NVMe Controller 0x30062398 @ 00:06:00
2926 07:40:59.549366
2927 07:40:59.552271 Looking for NVMe Controller 0x30062440 @ 00:1d:00
2928 07:40:59.552699
2929 07:40:59.555448 Wipe memory regions:
2930 07:40:59.555898
2931 07:40:59.559220 [0x00000000001000, 0x000000000a0000)
2932 07:40:59.559752
2933 07:40:59.562299 [0x00000000100000, 0x00000030000000)
2934 07:40:59.930590
2935 07:40:59.933783 [0x00000032665e30, 0x00000076856000)
2936 07:41:00.454849
2937 07:41:00.458401 [0x00000100000000, 0x0000017fc00000)
2938 07:41:01.436732
2939 07:41:01.439720 ec_init: CrosEC protocol v3 supported (256, 256)
2940 07:41:01.872025
2941 07:41:01.872525 R8152: Initializing
2942 07:41:01.872815
2943 07:41:01.875301 Version 6 (ocp_data = 5c30)
2944 07:41:01.875903
2945 07:41:01.878740 R8152: Done initializing
2946 07:41:01.879285
2947 07:41:01.881900 Adding net device
2948 07:41:02.182835
2949 07:41:02.185888 [firmware-brya-14505.B-collabora] Sep 8 2023 15:56:17
2950 07:41:02.186366
2951 07:41:02.186700
2952 07:41:02.186999
2953 07:41:02.187647 Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2955 07:41:02.288579 brask: tftpboot 192.168.201.1 12435137/tftp-deploy-v7qu1gt6/kernel/bzImage 12435137/tftp-deploy-v7qu1gt6/kernel/cmdline 12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
2956 07:41:02.289104 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2957 07:41:02.289418 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2958 07:41:02.293851 tftpboot 192.168.201.1 12435137/tftp-deploy-v7qu1gt6/kernel/bzImploy-v7qu1gt6/kernel/cmdline 12435137/tftp-deploy-v7qu1gt6/ramdisk/ramdisk.cpio.gz
2959 07:41:02.294226
2960 07:41:02.294474 Waiting for link
2961 07:41:02.497062
2962 07:41:02.497485 done.
2963 07:41:02.497742
2964 07:41:02.497970 MAC: 00:13:3b:00:10:71
2965 07:41:02.498186
2966 07:41:02.500464 Sending DHCP discover... done.
2967 07:41:02.500824
2968 07:41:02.503336 Waiting for reply... done.
2969 07:41:02.503712
2970 07:41:02.506999 Sending DHCP request... done.
2971 07:41:02.507356
2972 07:41:02.513730 Waiting for reply... done.
2973 07:41:02.514087
2974 07:41:02.514336 My ip is 192.168.201.187
2975 07:41:02.514558
2976 07:41:02.520435 The DHCP server ip is 192.168.201.1
2977 07:41:02.520824
2978 07:41:02.523383 TFTP server IP predefined by user: 192.168.201.1
2979 07:41:02.523733
2980 07:41:02.530213 Bootfile predefined by user: 12435137/tftp-deploy-v7qu1gt6/kernel/bzImage
2981 07:41:02.530601
2982 07:41:02.533315 Sending tftp read request... done.
2983 07:41:02.533638
2984 07:41:02.540875 Waiting for the transfer...
2985 07:41:02.541195
2986 07:41:03.074921 00000000 ################################################################
2987 07:41:03.075043
2988 07:41:03.639324 00080000 ################################################################
2989 07:41:03.639452
2990 07:41:04.188768 00100000 ################################################################
2991 07:41:04.188917
2992 07:41:04.714531 00180000 ################################################################
2993 07:41:04.714650
2994 07:41:05.231875 00200000 ################################################################
2995 07:41:05.231995
2996 07:41:05.810482 00280000 ################################################################
2997 07:41:05.810907
2998 07:41:06.363720 00300000 ################################################################
2999 07:41:06.364081
3000 07:41:06.943414 00380000 ################################################################
3001 07:41:06.943805
3002 07:41:07.546661 00400000 ################################################################
3003 07:41:07.546798
3004 07:41:08.153470 00480000 ################################################################
3005 07:41:08.153912
3006 07:41:08.767972 00500000 ################################################################
3007 07:41:08.768114
3008 07:41:09.376144 00580000 ################################################################
3009 07:41:09.376571
3010 07:41:09.977875 00600000 ################################################################
3011 07:41:09.978288
3012 07:41:10.531031 00680000 ################################################################
3013 07:41:10.531485
3014 07:41:11.115970 00700000 ################################################################
3015 07:41:11.116401
3016 07:41:11.659114 00780000 ################################################################
3017 07:41:11.659255
3018 07:41:11.857901 00800000 ####################### done.
3019 07:41:11.858014
3020 07:41:11.861169 The bootfile was 8572816 bytes long.
3021 07:41:11.861242
3022 07:41:11.864715 Sending tftp read request... done.
3023 07:41:11.864782
3024 07:41:11.867859 Waiting for the transfer...
3025 07:41:11.867920
3026 07:41:12.413755 00000000 ################################################################
3027 07:41:12.413905
3028 07:41:12.961260 00080000 ################################################################
3029 07:41:12.961400
3030 07:41:13.510739 00100000 ################################################################
3031 07:41:13.510888
3032 07:41:14.048851 00180000 ################################################################
3033 07:41:14.048989
3034 07:41:14.590735 00200000 ################################################################
3035 07:41:14.590862
3036 07:41:15.139241 00280000 ################################################################
3037 07:41:15.139364
3038 07:41:15.678807 00300000 ################################################################
3039 07:41:15.678933
3040 07:41:16.201496 00380000 ################################################################
3041 07:41:16.201641
3042 07:41:16.748949 00400000 ################################################################
3043 07:41:16.749118
3044 07:41:17.313124 00480000 ################################################################
3045 07:41:17.313249
3046 07:41:17.863290 00500000 ############################################################### done.
3047 07:41:17.863444
3048 07:41:17.866340 Sending tftp read request... done.
3049 07:41:17.866432
3050 07:41:17.869448 Waiting for the transfer...
3051 07:41:17.869532
3052 07:41:17.869586 00000000 # done.
3053 07:41:17.869648
3054 07:41:17.879554 Command line loaded dynamically from TFTP file: 12435137/tftp-deploy-v7qu1gt6/kernel/cmdline
3055 07:41:17.879628
3056 07:41:17.902747 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435137/extract-nfsrootfs-2zh8lfer,tcp,hard ip=dhcp tftpserverip=192.168.201.1
3057 07:41:17.910318
3058 07:41:17.913943 Shutting down all USB controllers.
3059 07:41:17.914019
3060 07:41:17.914072 Removing current net device
3061 07:41:17.914120
3062 07:41:17.917096 Finalizing coreboot
3063 07:41:17.917171
3064 07:41:17.923409 Exiting depthcharge with code 4 at timestamp: 30220593
3065 07:41:17.923500
3066 07:41:17.923553
3067 07:41:17.923601 Starting kernel ...
3068 07:41:17.923647
3069 07:41:17.923691
3070 07:41:17.923995 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
3071 07:41:17.924071 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
3072 07:41:17.924131 Setting prompt string to ['Linux version [0-9]']
3073 07:41:17.924184 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
3074 07:41:17.924236 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
3076 07:45:38.924885 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
3078 07:45:38.925658 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
3080 07:45:38.926214 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
3083 07:45:38.927115 end: 2 depthcharge-action (duration 00:05:00) [common]
3085 07:45:38.927921 Cleaning after the job
3086 07:45:38.928211 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/ramdisk
3087 07:45:38.929401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/kernel
3088 07:45:38.930178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/nfsrootfs
3089 07:45:38.972317 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435137/tftp-deploy-v7qu1gt6/modules
3090 07:45:38.972686 start: 5.1 power-off (timeout 00:00:30) [common]
3091 07:45:38.972851 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-5' '--port=1' '--command=off'
3092 07:45:39.051115 >> Command sent successfully.
3093 07:45:39.057261 Returned 0 in 0 seconds
3094 07:45:39.157916 end: 5.1 power-off (duration 00:00:00) [common]
3096 07:45:39.159302 start: 5.2 read-feedback (timeout 00:10:00) [common]
3097 07:45:39.160172 Listened to connection for namespace 'common' for up to 1s
3098 07:45:40.161119 Finalising connection for namespace 'common'
3099 07:45:40.161659 Disconnecting from shell: Finalise
3100 07:45:40.161996
3101 07:45:40.262881 end: 5.2 read-feedback (duration 00:00:01) [common]
3102 07:45:40.263461 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435137
3103 07:45:40.418269 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435137
3104 07:45:40.418451 JobError: Your job cannot terminate cleanly.