Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:46:55.362425 lava-dispatcher, installed at version: 2023.10
2 07:46:55.362654 start: 0 validate
3 07:46:55.362801 Start time: 2024-01-03 07:46:55.362792+00:00 (UTC)
4 07:46:55.362929 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:46:55.363074 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:46:55.637910 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:46:55.638096 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:46:55.903614 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:46:55.903884 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:46:56.169707 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:46:56.169899 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:46:56.438142 validate duration: 1.08
14 07:46:56.438565 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:46:56.438729 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:46:56.438871 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:46:56.439060 Not decompressing ramdisk as can be used compressed.
18 07:46:56.439199 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 07:46:56.439319 saving as /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/ramdisk/initrd.cpio.gz
20 07:46:56.439429 total size: 5432690 (5 MB)
21 07:46:56.441127 progress 0 % (0 MB)
22 07:46:56.444005 progress 5 % (0 MB)
23 07:46:56.446621 progress 10 % (0 MB)
24 07:46:56.449226 progress 15 % (0 MB)
25 07:46:56.452068 progress 20 % (1 MB)
26 07:46:56.454568 progress 25 % (1 MB)
27 07:46:56.457110 progress 30 % (1 MB)
28 07:46:56.459949 progress 35 % (1 MB)
29 07:46:56.462419 progress 40 % (2 MB)
30 07:46:56.464812 progress 45 % (2 MB)
31 07:46:56.467351 progress 50 % (2 MB)
32 07:46:56.470163 progress 55 % (2 MB)
33 07:46:56.472523 progress 60 % (3 MB)
34 07:46:56.474119 progress 65 % (3 MB)
35 07:46:56.475900 progress 70 % (3 MB)
36 07:46:56.477496 progress 75 % (3 MB)
37 07:46:56.479071 progress 80 % (4 MB)
38 07:46:56.480669 progress 85 % (4 MB)
39 07:46:56.482464 progress 90 % (4 MB)
40 07:46:56.484097 progress 95 % (4 MB)
41 07:46:56.485696 progress 100 % (5 MB)
42 07:46:56.485945 5 MB downloaded in 0.05 s (111.38 MB/s)
43 07:46:56.486132 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:46:56.486418 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:46:56.486515 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:46:56.486607 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:46:56.486765 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:46:56.486855 saving as /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/kernel/bzImage
50 07:46:56.486922 total size: 8572816 (8 MB)
51 07:46:56.486997 No compression specified
52 07:46:56.488225 progress 0 % (0 MB)
53 07:46:56.490851 progress 5 % (0 MB)
54 07:46:56.493480 progress 10 % (0 MB)
55 07:46:56.496121 progress 15 % (1 MB)
56 07:46:56.498718 progress 20 % (1 MB)
57 07:46:56.501389 progress 25 % (2 MB)
58 07:46:56.503968 progress 30 % (2 MB)
59 07:46:56.506637 progress 35 % (2 MB)
60 07:46:56.509242 progress 40 % (3 MB)
61 07:46:56.511844 progress 45 % (3 MB)
62 07:46:56.514439 progress 50 % (4 MB)
63 07:46:56.517021 progress 55 % (4 MB)
64 07:46:56.519544 progress 60 % (4 MB)
65 07:46:56.522247 progress 65 % (5 MB)
66 07:46:56.524783 progress 70 % (5 MB)
67 07:46:56.527340 progress 75 % (6 MB)
68 07:46:56.529936 progress 80 % (6 MB)
69 07:46:56.532540 progress 85 % (6 MB)
70 07:46:56.535172 progress 90 % (7 MB)
71 07:46:56.537920 progress 95 % (7 MB)
72 07:46:56.540594 progress 100 % (8 MB)
73 07:46:56.540822 8 MB downloaded in 0.05 s (151.69 MB/s)
74 07:46:56.540995 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:46:56.541272 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:46:56.541377 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:46:56.541485 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:46:56.541645 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 07:46:56.541720 saving as /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/nfsrootfs/full.rootfs.tar
81 07:46:56.541790 total size: 133380384 (127 MB)
82 07:46:56.541858 Using unxz to decompress xz
83 07:46:56.546516 progress 0 % (0 MB)
84 07:46:56.930467 progress 5 % (6 MB)
85 07:46:57.327114 progress 10 % (12 MB)
86 07:46:57.649922 progress 15 % (19 MB)
87 07:46:57.856812 progress 20 % (25 MB)
88 07:46:58.131243 progress 25 % (31 MB)
89 07:46:58.523451 progress 30 % (38 MB)
90 07:46:58.914098 progress 35 % (44 MB)
91 07:46:59.367371 progress 40 % (50 MB)
92 07:46:59.800582 progress 45 % (57 MB)
93 07:47:00.205705 progress 50 % (63 MB)
94 07:47:00.629366 progress 55 % (69 MB)
95 07:47:01.040934 progress 60 % (76 MB)
96 07:47:01.455485 progress 65 % (82 MB)
97 07:47:01.880950 progress 70 % (89 MB)
98 07:47:02.316776 progress 75 % (95 MB)
99 07:47:02.829278 progress 80 % (101 MB)
100 07:47:03.331667 progress 85 % (108 MB)
101 07:47:03.643111 progress 90 % (114 MB)
102 07:47:04.040658 progress 95 % (120 MB)
103 07:47:04.483811 progress 100 % (127 MB)
104 07:47:04.489769 127 MB downloaded in 7.95 s (16.00 MB/s)
105 07:47:04.490059 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:47:04.490362 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:47:04.490464 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:47:04.490561 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:47:04.490727 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:47:04.490810 saving as /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/modules/modules.tar
112 07:47:04.490879 total size: 251144 (0 MB)
113 07:47:04.490951 Using unxz to decompress xz
114 07:47:04.495688 progress 13 % (0 MB)
115 07:47:04.496157 progress 26 % (0 MB)
116 07:47:04.496443 progress 39 % (0 MB)
117 07:47:04.498216 progress 52 % (0 MB)
118 07:47:04.500343 progress 65 % (0 MB)
119 07:47:04.502458 progress 78 % (0 MB)
120 07:47:04.504448 progress 91 % (0 MB)
121 07:47:04.506590 progress 100 % (0 MB)
122 07:47:04.512662 0 MB downloaded in 0.02 s (11.00 MB/s)
123 07:47:04.512929 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:47:04.513228 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:47:04.513334 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 07:47:04.513445 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 07:47:06.921088 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435185/extract-nfsrootfs-h7ix86tx
129 07:47:06.921299 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 07:47:06.921420 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 07:47:06.921601 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi
132 07:47:06.921748 makedir: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin
133 07:47:06.921865 makedir: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/tests
134 07:47:06.921976 makedir: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/results
135 07:47:06.922088 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-add-keys
136 07:47:06.922256 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-add-sources
137 07:47:06.922411 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-background-process-start
138 07:47:06.922559 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-background-process-stop
139 07:47:06.922704 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-common-functions
140 07:47:06.922847 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-echo-ipv4
141 07:47:06.922990 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-install-packages
142 07:47:06.923133 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-installed-packages
143 07:47:06.923273 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-os-build
144 07:47:06.923418 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-probe-channel
145 07:47:06.923559 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-probe-ip
146 07:47:06.923701 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-target-ip
147 07:47:06.923842 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-target-mac
148 07:47:06.923984 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-target-storage
149 07:47:06.924128 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-case
150 07:47:06.924282 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-event
151 07:47:06.924426 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-feedback
152 07:47:06.924569 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-raise
153 07:47:06.924712 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-reference
154 07:47:06.924855 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-runner
155 07:47:06.924997 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-set
156 07:47:06.925140 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-test-shell
157 07:47:06.925283 Updating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-install-packages (oe)
158 07:47:06.925457 Updating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/bin/lava-installed-packages (oe)
159 07:47:06.925597 Creating /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/environment
160 07:47:06.925705 LAVA metadata
161 07:47:06.925785 - LAVA_JOB_ID=12435185
162 07:47:06.925856 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:47:06.925969 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 07:47:06.926044 skipped lava-vland-overlay
165 07:47:06.926127 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:47:06.926215 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 07:47:06.926283 skipped lava-multinode-overlay
168 07:47:06.926364 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:47:06.926451 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 07:47:06.926531 Loading test definitions
171 07:47:06.926640 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 07:47:06.926720 Using /lava-12435185 at stage 0
173 07:47:06.927061 uuid=12435185_1.5.2.3.1 testdef=None
174 07:47:06.927160 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 07:47:06.927254 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 07:47:06.927817 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 07:47:06.928060 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 07:47:06.929025 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 07:47:06.929284 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 07:47:06.929988 runner path: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/0/tests/0_dmesg test_uuid 12435185_1.5.2.3.1
183 07:47:06.930164 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 07:47:06.930412 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 07:47:06.930492 Using /lava-12435185 at stage 1
187 07:47:06.930829 uuid=12435185_1.5.2.3.5 testdef=None
188 07:47:06.930926 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 07:47:06.931020 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 07:47:06.931548 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 07:47:06.931788 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 07:47:06.932517 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 07:47:06.932772 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 07:47:06.933477 runner path: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/1/tests/1_bootrr test_uuid 12435185_1.5.2.3.5
197 07:47:06.933649 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 07:47:06.933876 Creating lava-test-runner.conf files
200 07:47:06.933947 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/0 for stage 0
201 07:47:06.934049 - 0_dmesg
202 07:47:06.934138 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435185/lava-overlay-8770zvzi/lava-12435185/1 for stage 1
203 07:47:06.934240 - 1_bootrr
204 07:47:06.934346 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 07:47:06.934440 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 07:47:06.942726 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 07:47:06.942839 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 07:47:06.942934 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 07:47:06.943027 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 07:47:06.943122 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 07:47:07.096042 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 07:47:07.096502 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 07:47:07.096637 extracting modules file /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435185/extract-nfsrootfs-h7ix86tx
214 07:47:07.115379 extracting modules file /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435185/extract-overlay-ramdisk-03s3f689/ramdisk
215 07:47:07.132200 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 07:47:07.132364 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 07:47:07.132475 [common] Applying overlay to NFS
218 07:47:07.132561 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435185/compress-overlay-7c6uyyar/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435185/extract-nfsrootfs-h7ix86tx
219 07:47:07.143594 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 07:47:07.143720 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 07:47:07.143823 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 07:47:07.143926 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 07:47:07.144014 Building ramdisk /var/lib/lava/dispatcher/tmp/12435185/extract-overlay-ramdisk-03s3f689/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435185/extract-overlay-ramdisk-03s3f689/ramdisk
224 07:47:07.229172 >> 26162 blocks
225 07:47:07.826089 rename /var/lib/lava/dispatcher/tmp/12435185/extract-overlay-ramdisk-03s3f689/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
226 07:47:07.826595 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 07:47:07.826730 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 07:47:07.826845 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 07:47:07.826950 No mkimage arch provided, not using FIT.
230 07:47:07.827050 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 07:47:07.827142 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 07:47:07.827258 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 07:47:07.827361 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 07:47:07.827455 No LXC device requested
235 07:47:07.827546 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 07:47:07.827645 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 07:47:07.827739 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 07:47:07.827824 Checking files for TFTP limit of 4294967296 bytes.
239 07:47:07.828297 end: 1 tftp-deploy (duration 00:00:11) [common]
240 07:47:07.828417 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 07:47:07.828520 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 07:47:07.828657 substitutions:
243 07:47:07.828732 - {DTB}: None
244 07:47:07.828800 - {INITRD}: 12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
245 07:47:07.828868 - {KERNEL}: 12435185/tftp-deploy-myngupq8/kernel/bzImage
246 07:47:07.828932 - {LAVA_MAC}: None
247 07:47:07.828994 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435185/extract-nfsrootfs-h7ix86tx
248 07:47:07.829059 - {NFS_SERVER_IP}: 192.168.201.1
249 07:47:07.829121 - {PRESEED_CONFIG}: None
250 07:47:07.829183 - {PRESEED_LOCAL}: None
251 07:47:07.829245 - {RAMDISK}: 12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
252 07:47:07.829306 - {ROOT_PART}: None
253 07:47:07.829367 - {ROOT}: None
254 07:47:07.829428 - {SERVER_IP}: 192.168.201.1
255 07:47:07.829488 - {TEE}: None
256 07:47:07.829548 Parsed boot commands:
257 07:47:07.829607 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 07:47:07.829812 Parsed boot commands: tftpboot 192.168.201.1 12435185/tftp-deploy-myngupq8/kernel/bzImage 12435185/tftp-deploy-myngupq8/kernel/cmdline 12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
259 07:47:07.829915 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 07:47:07.830013 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 07:47:07.830120 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 07:47:07.830216 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 07:47:07.830296 Not connected, no need to disconnect.
264 07:47:07.830378 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 07:47:07.830471 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 07:47:07.830544 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 07:47:07.834881 Setting prompt string to ['lava-test: # ']
268 07:47:07.835289 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 07:47:07.835402 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 07:47:07.835514 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 07:47:07.835613 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 07:47:07.835830 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 07:47:12.974247 >> Command sent successfully.
274 07:47:12.977022 Returned 0 in 5 seconds
275 07:47:13.077552 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 07:47:13.078226 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 07:47:13.078433 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 07:47:13.078617 Setting prompt string to 'Starting depthcharge on Helios...'
280 07:47:13.078772 Changing prompt to 'Starting depthcharge on Helios...'
281 07:47:13.078931 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 07:47:13.079457 [Enter `^Ec?' for help]
283 07:47:13.700219
284 07:47:13.700495
285 07:47:13.710600 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 07:47:13.713704 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 07:47:13.720108 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 07:47:13.723979 CPU: AES supported, TXT NOT supported, VT supported
289 07:47:13.730315 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 07:47:13.733536 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 07:47:13.740428 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 07:47:13.743464 VBOOT: Loading verstage.
293 07:47:13.747257 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 07:47:13.753517 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 07:47:13.757032 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 07:47:13.760274 CBFS @ c08000 size 3f8000
297 07:47:13.766644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 07:47:13.770493 CBFS: Locating 'fallback/verstage'
299 07:47:13.774067 CBFS: Found @ offset 10fb80 size 1072c
300 07:47:13.776935
301 07:47:13.777107
302 07:47:13.787579 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 07:47:13.801745 Probing TPM: . done!
304 07:47:13.805039 TPM ready after 0 ms
305 07:47:13.808589 Connected to device vid:did:rid of 1ae0:0028:00
306 07:47:13.818190 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 07:47:13.821985 Initialized TPM device CR50 revision 0
308 07:47:13.867408 tlcl_send_startup: Startup return code is 0
309 07:47:13.867571 TPM: setup succeeded
310 07:47:13.880152 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 07:47:13.883728 Chrome EC: UHEPI supported
312 07:47:13.887612 Phase 1
313 07:47:13.890780 FMAP: area GBB found @ c05000 (12288 bytes)
314 07:47:13.897809 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 07:47:13.897948 Phase 2
316 07:47:13.900766 Phase 3
317 07:47:13.903901 FMAP: area GBB found @ c05000 (12288 bytes)
318 07:47:13.910812 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 07:47:13.917176 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 07:47:13.920392 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 07:47:13.926984 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 07:47:13.942921 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 07:47:13.945965 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 07:47:13.952852 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 07:47:13.957190 Phase 4
326 07:47:13.960387 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 07:47:13.966632 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 07:47:14.146033 VB2:vb2_rsa_verify_digest() Digest check failed!
329 07:47:14.153024 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 07:47:14.153152 Saving nvdata
331 07:47:14.156064 Reboot requested (10020007)
332 07:47:14.159571 board_reset() called!
333 07:47:14.159675 full_reset() called!
334 07:47:18.667312
335 07:47:18.667481
336 07:47:18.677368 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 07:47:18.680642 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 07:47:18.687045 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 07:47:18.690915 CPU: AES supported, TXT NOT supported, VT supported
340 07:47:18.697291 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 07:47:18.700323 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 07:47:18.707130 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 07:47:18.710967 VBOOT: Loading verstage.
344 07:47:18.713827 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 07:47:18.720933 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 07:47:18.724196 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 07:47:18.727335 CBFS @ c08000 size 3f8000
348 07:47:18.734067 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 07:47:18.737155 CBFS: Locating 'fallback/verstage'
350 07:47:18.740785 CBFS: Found @ offset 10fb80 size 1072c
351 07:47:18.744071
352 07:47:18.744166
353 07:47:18.754142 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 07:47:18.768366 Probing TPM: . done!
355 07:47:18.771561 TPM ready after 0 ms
356 07:47:18.774853 Connected to device vid:did:rid of 1ae0:0028:00
357 07:47:18.785151 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 07:47:18.789005 Initialized TPM device CR50 revision 0
359 07:47:18.834489 tlcl_send_startup: Startup return code is 0
360 07:47:18.834665 TPM: setup succeeded
361 07:47:18.847552 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 07:47:18.851211 Chrome EC: UHEPI supported
363 07:47:18.854536 Phase 1
364 07:47:18.857885 FMAP: area GBB found @ c05000 (12288 bytes)
365 07:47:18.864191 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 07:47:18.871444 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 07:47:18.874608 Recovery requested (1009000e)
368 07:47:18.874701 Saving nvdata
369 07:47:18.886289 tlcl_extend: response is 0
370 07:47:18.895045 tlcl_extend: response is 0
371 07:47:18.901699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 07:47:18.905270 CBFS @ c08000 size 3f8000
373 07:47:18.911623 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 07:47:18.914878 CBFS: Locating 'fallback/romstage'
375 07:47:18.918563 CBFS: Found @ offset 80 size 145fc
376 07:47:18.921659 Accumulated console time in verstage 98 ms
377 07:47:18.921756
378 07:47:18.921835
379 07:47:18.934652 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 07:47:18.942123 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 07:47:18.944999 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 07:47:18.948059 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 07:47:18.955161 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 07:47:18.958317 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 07:47:18.961605 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
386 07:47:18.964766 TCO_STS: 0000 0000
387 07:47:18.968099 GEN_PMCON: e0015238 00000200
388 07:47:18.971342 GBLRST_CAUSE: 00000000 00000000
389 07:47:18.971436 prev_sleep_state 5
390 07:47:18.974504 Boot Count incremented to 67992
391 07:47:18.981732 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 07:47:18.984998 CBFS @ c08000 size 3f8000
393 07:47:18.991534 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 07:47:18.991636 CBFS: Locating 'fspm.bin'
395 07:47:18.998026 CBFS: Found @ offset 5ffc0 size 71000
396 07:47:19.001426 Chrome EC: UHEPI supported
397 07:47:19.007983 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 07:47:19.011418 Probing TPM: done!
399 07:47:19.018112 Connected to device vid:did:rid of 1ae0:0028:00
400 07:47:19.028433 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 07:47:19.034138 Initialized TPM device CR50 revision 0
402 07:47:19.042907 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 07:47:19.049543 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 07:47:19.053330 MRC cache found, size 1948
405 07:47:19.056616 bootmode is set to: 2
406 07:47:19.059793 PRMRR disabled by config.
407 07:47:19.063076 SPD INDEX = 1
408 07:47:19.066318 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 07:47:19.069588 CBFS @ c08000 size 3f8000
410 07:47:19.075962 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 07:47:19.076093 CBFS: Locating 'spd.bin'
412 07:47:19.079879 CBFS: Found @ offset 5fb80 size 400
413 07:47:19.083142 SPD: module type is LPDDR3
414 07:47:19.086434 SPD: module part is
415 07:47:19.093011 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 07:47:19.096177 SPD: device width 4 bits, bus width 8 bits
417 07:47:19.099581 SPD: module size is 4096 MB (per channel)
418 07:47:19.102689 memory slot: 0 configuration done.
419 07:47:19.105837 memory slot: 2 configuration done.
420 07:47:19.157584 CBMEM:
421 07:47:19.161234 IMD: root @ 99fff000 254 entries.
422 07:47:19.164775 IMD: root @ 99ffec00 62 entries.
423 07:47:19.167851 External stage cache:
424 07:47:19.171043 IMD: root @ 9abff000 254 entries.
425 07:47:19.174467 IMD: root @ 9abfec00 62 entries.
426 07:47:19.177683 Chrome EC: clear events_b mask to 0x0000000020004000
427 07:47:19.194091 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 07:47:19.206764 tlcl_write: response is 0
429 07:47:19.216000 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 07:47:19.222521 MRC: TPM MRC hash updated successfully.
431 07:47:19.222629 2 DIMMs found
432 07:47:19.225571 SMM Memory Map
433 07:47:19.229427 SMRAM : 0x9a000000 0x1000000
434 07:47:19.232740 Subregion 0: 0x9a000000 0xa00000
435 07:47:19.235776 Subregion 1: 0x9aa00000 0x200000
436 07:47:19.238950 Subregion 2: 0x9ac00000 0x400000
437 07:47:19.242477 top_of_ram = 0x9a000000
438 07:47:19.246023 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 07:47:19.252457 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 07:47:19.255662 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 07:47:19.262675 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 07:47:19.265672 CBFS @ c08000 size 3f8000
443 07:47:19.268761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 07:47:19.272417 CBFS: Locating 'fallback/postcar'
445 07:47:19.278880 CBFS: Found @ offset 107000 size 4b44
446 07:47:19.282102 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 07:47:19.294998 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 07:47:19.298225 Processing 180 relocs. Offset value of 0x97c0c000
449 07:47:19.306513 Accumulated console time in romstage 286 ms
450 07:47:19.306613
451 07:47:19.306711
452 07:47:19.316771 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 07:47:19.323196 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 07:47:19.326214 CBFS @ c08000 size 3f8000
455 07:47:19.329951 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 07:47:19.336007 CBFS: Locating 'fallback/ramstage'
457 07:47:19.339735 CBFS: Found @ offset 43380 size 1b9e8
458 07:47:19.346302 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 07:47:19.378536 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 07:47:19.381551 Processing 3976 relocs. Offset value of 0x98db0000
461 07:47:19.388188 Accumulated console time in postcar 52 ms
462 07:47:19.388297
463 07:47:19.388397
464 07:47:19.398039 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 07:47:19.405051 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 07:47:19.408248 WARNING: RO_VPD is uninitialized or empty.
467 07:47:19.411707 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 07:47:19.418162 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 07:47:19.418261 Normal boot.
470 07:47:19.424733 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 07:47:19.428005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 07:47:19.431723 CBFS @ c08000 size 3f8000
473 07:47:19.437906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 07:47:19.441611 CBFS: Locating 'cpu_microcode_blob.bin'
475 07:47:19.444780 CBFS: Found @ offset 14700 size 2ec00
476 07:47:19.447971 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 07:47:19.451207 Skip microcode update
478 07:47:19.454624 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 07:47:19.458438 CBFS @ c08000 size 3f8000
480 07:47:19.464642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 07:47:19.468032 CBFS: Locating 'fsps.bin'
482 07:47:19.471339 CBFS: Found @ offset d1fc0 size 35000
483 07:47:19.496187 Detected 4 core, 8 thread CPU.
484 07:47:19.499940 Setting up SMI for CPU
485 07:47:19.503197 IED base = 0x9ac00000
486 07:47:19.503295 IED size = 0x00400000
487 07:47:19.506111 Will perform SMM setup.
488 07:47:19.512623 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 07:47:19.519715 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 07:47:19.523003 Processing 16 relocs. Offset value of 0x00030000
491 07:47:19.526886 Attempting to start 7 APs
492 07:47:19.530159 Waiting for 10ms after sending INIT.
493 07:47:19.546145 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 07:47:19.546259 done.
495 07:47:19.549247 AP: slot 7 apic_id 6.
496 07:47:19.553048 AP: slot 2 apic_id 7.
497 07:47:19.556154 Waiting for 2nd SIPI to complete...done.
498 07:47:19.559447 AP: slot 5 apic_id 5.
499 07:47:19.559544 AP: slot 6 apic_id 4.
500 07:47:19.562790 AP: slot 1 apic_id 3.
501 07:47:19.566189 AP: slot 4 apic_id 2.
502 07:47:19.572466 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 07:47:19.578982 Processing 13 relocs. Offset value of 0x00038000
504 07:47:19.585525 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 07:47:19.589209 Installing SMM handler to 0x9a000000
506 07:47:19.595685 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 07:47:19.602125 Processing 658 relocs. Offset value of 0x9a010000
508 07:47:19.609167 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 07:47:19.612297 Processing 13 relocs. Offset value of 0x9a008000
510 07:47:19.618641 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 07:47:19.625561 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 07:47:19.632035 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 07:47:19.635205 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 07:47:19.642456 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 07:47:19.648814 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 07:47:19.651932 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 07:47:19.658747 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 07:47:19.662490 Clearing SMI status registers
519 07:47:19.665665 SMI_STS: PM1
520 07:47:19.665759 PM1_STS: PWRBTN
521 07:47:19.669058 TCO_STS: SECOND_TO
522 07:47:19.672170 New SMBASE 0x9a000000
523 07:47:19.675432 In relocation handler: CPU 0
524 07:47:19.678674 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 07:47:19.682545 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 07:47:19.685559 Relocation complete.
527 07:47:19.688699 New SMBASE 0x99fff400
528 07:47:19.688794 In relocation handler: CPU 3
529 07:47:19.695452 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 07:47:19.699017 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 07:47:19.702423 Relocation complete.
532 07:47:19.705512 New SMBASE 0x99fffc00
533 07:47:19.705636 In relocation handler: CPU 1
534 07:47:19.712483 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
535 07:47:19.715405 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 07:47:19.719079 Relocation complete.
537 07:47:19.719203 New SMBASE 0x99fff000
538 07:47:19.722191 In relocation handler: CPU 4
539 07:47:19.728929 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 07:47:19.732430 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 07:47:19.735276 Relocation complete.
542 07:47:19.735396 New SMBASE 0x99ffec00
543 07:47:19.738913 In relocation handler: CPU 5
544 07:47:19.742123 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
545 07:47:19.748456 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 07:47:19.751708 Relocation complete.
547 07:47:19.751802 New SMBASE 0x99ffe800
548 07:47:19.755648 In relocation handler: CPU 6
549 07:47:19.758852 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
550 07:47:19.764934 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 07:47:19.768553 Relocation complete.
552 07:47:19.768647 New SMBASE 0x99ffe400
553 07:47:19.771683 In relocation handler: CPU 7
554 07:47:19.775127 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
555 07:47:19.782090 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 07:47:19.782186 Relocation complete.
557 07:47:19.785321 New SMBASE 0x99fff800
558 07:47:19.788410 In relocation handler: CPU 2
559 07:47:19.792118 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
560 07:47:19.798534 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 07:47:19.798631 Relocation complete.
562 07:47:19.801693 Initializing CPU #0
563 07:47:19.804814 CPU: vendor Intel device 806ec
564 07:47:19.808463 CPU: family 06, model 8e, stepping 0c
565 07:47:19.811413 Clearing out pending MCEs
566 07:47:19.814985 Setting up local APIC...
567 07:47:19.815080 apic_id: 0x00 done.
568 07:47:19.818318 Turbo is available but hidden
569 07:47:19.821351 Turbo is available and visible
570 07:47:19.824762 VMX status: enabled
571 07:47:19.827967 IA32_FEATURE_CONTROL status: locked
572 07:47:19.831863 Skip microcode update
573 07:47:19.831957 CPU #0 initialized
574 07:47:19.835101 Initializing CPU #3
575 07:47:19.838184 Initializing CPU #1
576 07:47:19.838279 Initializing CPU #4
577 07:47:19.841807 CPU: vendor Intel device 806ec
578 07:47:19.844916 CPU: family 06, model 8e, stepping 0c
579 07:47:19.848508 CPU: vendor Intel device 806ec
580 07:47:19.851632 CPU: family 06, model 8e, stepping 0c
581 07:47:19.854730 Clearing out pending MCEs
582 07:47:19.857945 Clearing out pending MCEs
583 07:47:19.861837 Setting up local APIC...
584 07:47:19.861931 Initializing CPU #6
585 07:47:19.865083 Initializing CPU #5
586 07:47:19.865177 Initializing CPU #7
587 07:47:19.868159 Initializing CPU #2
588 07:47:19.871407 CPU: vendor Intel device 806ec
589 07:47:19.874682 CPU: family 06, model 8e, stepping 0c
590 07:47:19.878353 CPU: vendor Intel device 806ec
591 07:47:19.881133 CPU: family 06, model 8e, stepping 0c
592 07:47:19.884809 Clearing out pending MCEs
593 07:47:19.887933 Clearing out pending MCEs
594 07:47:19.891041 Setting up local APIC...
595 07:47:19.894690 CPU: vendor Intel device 806ec
596 07:47:19.897953 CPU: family 06, model 8e, stepping 0c
597 07:47:19.898048 Clearing out pending MCEs
598 07:47:19.901206 Setting up local APIC...
599 07:47:19.904898 apic_id: 0x02 done.
600 07:47:19.908040 Setting up local APIC...
601 07:47:19.908133 Setting up local APIC...
602 07:47:19.911236 CPU: vendor Intel device 806ec
603 07:47:19.917658 CPU: family 06, model 8e, stepping 0c
604 07:47:19.917754 apic_id: 0x07 done.
605 07:47:19.921332 apic_id: 0x06 done.
606 07:47:19.921427 VMX status: enabled
607 07:47:19.924366 VMX status: enabled
608 07:47:19.927786 apic_id: 0x01 done.
609 07:47:19.930851 IA32_FEATURE_CONTROL status: locked
610 07:47:19.934809 IA32_FEATURE_CONTROL status: locked
611 07:47:19.937949 Skip microcode update
612 07:47:19.938043 Skip microcode update
613 07:47:19.941040 CPU #2 initialized
614 07:47:19.941133 CPU #7 initialized
615 07:47:19.944266 apic_id: 0x03 done.
616 07:47:19.947447 VMX status: enabled
617 07:47:19.947540 VMX status: enabled
618 07:47:19.951393 IA32_FEATURE_CONTROL status: locked
619 07:47:19.954492 IA32_FEATURE_CONTROL status: locked
620 07:47:19.957766 Skip microcode update
621 07:47:19.960774 Skip microcode update
622 07:47:19.960868 CPU #4 initialized
623 07:47:19.964119 CPU #1 initialized
624 07:47:19.967384 CPU: vendor Intel device 806ec
625 07:47:19.970702 CPU: family 06, model 8e, stepping 0c
626 07:47:19.973954 Clearing out pending MCEs
627 07:47:19.977426 Clearing out pending MCEs
628 07:47:19.977519 Setting up local APIC...
629 07:47:19.980727 VMX status: enabled
630 07:47:19.984556 apic_id: 0x04 done.
631 07:47:19.984651 Setting up local APIC...
632 07:47:19.990623 IA32_FEATURE_CONTROL status: locked
633 07:47:19.990719 apic_id: 0x05 done.
634 07:47:19.994049 VMX status: enabled
635 07:47:19.994144 VMX status: enabled
636 07:47:19.997542 Skip microcode update
637 07:47:20.000573 IA32_FEATURE_CONTROL status: locked
638 07:47:20.003913 IA32_FEATURE_CONTROL status: locked
639 07:47:20.007604 Skip microcode update
640 07:47:20.010826 Skip microcode update
641 07:47:20.010921 CPU #5 initialized
642 07:47:20.014022 CPU #6 initialized
643 07:47:20.014116 CPU #3 initialized
644 07:47:20.020260 bsp_do_flight_plan done after 461 msecs.
645 07:47:20.023530 CPU: frequency set to 4200 MHz
646 07:47:20.023625 Enabling SMIs.
647 07:47:20.023701 Locking SMM.
648 07:47:20.040190 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 07:47:20.043296 CBFS @ c08000 size 3f8000
650 07:47:20.050322 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 07:47:20.050422 CBFS: Locating 'vbt.bin'
652 07:47:20.053550 CBFS: Found @ offset 5f5c0 size 499
653 07:47:20.060700 Found a VBT of 4608 bytes after decompression
654 07:47:20.242436 Display FSP Version Info HOB
655 07:47:20.245648 Reference Code - CPU = 9.0.1e.30
656 07:47:20.248982 uCode Version = 0.0.0.ca
657 07:47:20.252886 TXT ACM version = ff.ff.ff.ffff
658 07:47:20.255888 Display FSP Version Info HOB
659 07:47:20.258970 Reference Code - ME = 9.0.1e.30
660 07:47:20.262331 MEBx version = 0.0.0.0
661 07:47:20.265777 ME Firmware Version = Consumer SKU
662 07:47:20.269221 Display FSP Version Info HOB
663 07:47:20.272270 Reference Code - CML PCH = 9.0.1e.30
664 07:47:20.275461 PCH-CRID Status = Disabled
665 07:47:20.278666 PCH-CRID Original Value = ff.ff.ff.ffff
666 07:47:20.282498 PCH-CRID New Value = ff.ff.ff.ffff
667 07:47:20.285749 OPROM - RST - RAID = ff.ff.ff.ffff
668 07:47:20.289061 ChipsetInit Base Version = ff.ff.ff.ffff
669 07:47:20.292115 ChipsetInit Oem Version = ff.ff.ff.ffff
670 07:47:20.295824 Display FSP Version Info HOB
671 07:47:20.302430 Reference Code - SA - System Agent = 9.0.1e.30
672 07:47:20.305626 Reference Code - MRC = 0.7.1.6c
673 07:47:20.305721 SA - PCIe Version = 9.0.1e.30
674 07:47:20.308822 SA-CRID Status = Disabled
675 07:47:20.312084 SA-CRID Original Value = 0.0.0.c
676 07:47:20.315780 SA-CRID New Value = 0.0.0.c
677 07:47:20.319057 OPROM - VBIOS = ff.ff.ff.ffff
678 07:47:20.322209 RTC Init
679 07:47:20.325288 Set power on after power failure.
680 07:47:20.325382 Disabling Deep S3
681 07:47:20.328383 Disabling Deep S3
682 07:47:20.328477 Disabling Deep S4
683 07:47:20.332103 Disabling Deep S4
684 07:47:20.332197 Disabling Deep S5
685 07:47:20.335586 Disabling Deep S5
686 07:47:20.342154 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
687 07:47:20.342249 Enumerating buses...
688 07:47:20.348631 Show all devs... Before device enumeration.
689 07:47:20.348726 Root Device: enabled 1
690 07:47:20.351876 CPU_CLUSTER: 0: enabled 1
691 07:47:20.355075 DOMAIN: 0000: enabled 1
692 07:47:20.358919 APIC: 00: enabled 1
693 07:47:20.359047 PCI: 00:00.0: enabled 1
694 07:47:20.362261 PCI: 00:02.0: enabled 1
695 07:47:20.365339 PCI: 00:04.0: enabled 0
696 07:47:20.365433 PCI: 00:05.0: enabled 0
697 07:47:20.368351 PCI: 00:12.0: enabled 1
698 07:47:20.371852 PCI: 00:12.5: enabled 0
699 07:47:20.375207 PCI: 00:12.6: enabled 0
700 07:47:20.375302 PCI: 00:14.0: enabled 1
701 07:47:20.378224 PCI: 00:14.1: enabled 0
702 07:47:20.381705 PCI: 00:14.3: enabled 1
703 07:47:20.385316 PCI: 00:14.5: enabled 0
704 07:47:20.385410 PCI: 00:15.0: enabled 1
705 07:47:20.388169 PCI: 00:15.1: enabled 1
706 07:47:20.391995 PCI: 00:15.2: enabled 0
707 07:47:20.394980 PCI: 00:15.3: enabled 0
708 07:47:20.395115 PCI: 00:16.0: enabled 1
709 07:47:20.398610 PCI: 00:16.1: enabled 0
710 07:47:20.401893 PCI: 00:16.2: enabled 0
711 07:47:20.404998 PCI: 00:16.3: enabled 0
712 07:47:20.405091 PCI: 00:16.4: enabled 0
713 07:47:20.408300 PCI: 00:16.5: enabled 0
714 07:47:20.411367 PCI: 00:17.0: enabled 1
715 07:47:20.411461 PCI: 00:19.0: enabled 1
716 07:47:20.414509 PCI: 00:19.1: enabled 0
717 07:47:20.418472 PCI: 00:19.2: enabled 0
718 07:47:20.421706 PCI: 00:1a.0: enabled 0
719 07:47:20.421803 PCI: 00:1c.0: enabled 0
720 07:47:20.424961 PCI: 00:1c.1: enabled 0
721 07:47:20.428193 PCI: 00:1c.2: enabled 0
722 07:47:20.431307 PCI: 00:1c.3: enabled 0
723 07:47:20.431414 PCI: 00:1c.4: enabled 0
724 07:47:20.434410 PCI: 00:1c.5: enabled 0
725 07:47:20.438404 PCI: 00:1c.6: enabled 0
726 07:47:20.441407 PCI: 00:1c.7: enabled 0
727 07:47:20.441501 PCI: 00:1d.0: enabled 1
728 07:47:20.444515 PCI: 00:1d.1: enabled 0
729 07:47:20.448134 PCI: 00:1d.2: enabled 0
730 07:47:20.448260 PCI: 00:1d.3: enabled 0
731 07:47:20.451158 PCI: 00:1d.4: enabled 0
732 07:47:20.454709 PCI: 00:1d.5: enabled 1
733 07:47:20.457944 PCI: 00:1e.0: enabled 1
734 07:47:20.458031 PCI: 00:1e.1: enabled 0
735 07:47:20.461147 PCI: 00:1e.2: enabled 1
736 07:47:20.464378 PCI: 00:1e.3: enabled 1
737 07:47:20.467579 PCI: 00:1f.0: enabled 1
738 07:47:20.467673 PCI: 00:1f.1: enabled 1
739 07:47:20.471469 PCI: 00:1f.2: enabled 1
740 07:47:20.474635 PCI: 00:1f.3: enabled 1
741 07:47:20.477748 PCI: 00:1f.4: enabled 1
742 07:47:20.477843 PCI: 00:1f.5: enabled 1
743 07:47:20.480701 PCI: 00:1f.6: enabled 0
744 07:47:20.484145 USB0 port 0: enabled 1
745 07:47:20.484273 I2C: 00:15: enabled 1
746 07:47:20.487386 I2C: 00:5d: enabled 1
747 07:47:20.490968 GENERIC: 0.0: enabled 1
748 07:47:20.494580 I2C: 00:1a: enabled 1
749 07:47:20.494675 I2C: 00:38: enabled 1
750 07:47:20.497636 I2C: 00:39: enabled 1
751 07:47:20.500708 I2C: 00:3a: enabled 1
752 07:47:20.500847 I2C: 00:3b: enabled 1
753 07:47:20.504591 PCI: 00:00.0: enabled 1
754 07:47:20.507736 SPI: 00: enabled 1
755 07:47:20.507863 SPI: 01: enabled 1
756 07:47:20.510724 PNP: 0c09.0: enabled 1
757 07:47:20.513895 USB2 port 0: enabled 1
758 07:47:20.513989 USB2 port 1: enabled 1
759 07:47:20.517540 USB2 port 2: enabled 0
760 07:47:20.520666 USB2 port 3: enabled 0
761 07:47:20.520761 USB2 port 5: enabled 0
762 07:47:20.523916 USB2 port 6: enabled 1
763 07:47:20.527220 USB2 port 9: enabled 1
764 07:47:20.530479 USB3 port 0: enabled 1
765 07:47:20.530603 USB3 port 1: enabled 1
766 07:47:20.533700 USB3 port 2: enabled 1
767 07:47:20.537418 USB3 port 3: enabled 1
768 07:47:20.537516 USB3 port 4: enabled 0
769 07:47:20.540605 APIC: 03: enabled 1
770 07:47:20.543737 APIC: 07: enabled 1
771 07:47:20.543834 APIC: 01: enabled 1
772 07:47:20.547482 APIC: 02: enabled 1
773 07:47:20.547578 APIC: 05: enabled 1
774 07:47:20.550208 APIC: 04: enabled 1
775 07:47:20.554085 APIC: 06: enabled 1
776 07:47:20.554182 Compare with tree...
777 07:47:20.557068 Root Device: enabled 1
778 07:47:20.560214 CPU_CLUSTER: 0: enabled 1
779 07:47:20.564044 APIC: 00: enabled 1
780 07:47:20.564141 APIC: 03: enabled 1
781 07:47:20.567283 APIC: 07: enabled 1
782 07:47:20.570649 APIC: 01: enabled 1
783 07:47:20.570738 APIC: 02: enabled 1
784 07:47:20.573828 APIC: 05: enabled 1
785 07:47:20.576957 APIC: 04: enabled 1
786 07:47:20.577054 APIC: 06: enabled 1
787 07:47:20.580178 DOMAIN: 0000: enabled 1
788 07:47:20.583385 PCI: 00:00.0: enabled 1
789 07:47:20.587273 PCI: 00:02.0: enabled 1
790 07:47:20.587370 PCI: 00:04.0: enabled 0
791 07:47:20.590512 PCI: 00:05.0: enabled 0
792 07:47:20.594110 PCI: 00:12.0: enabled 1
793 07:47:20.596730 PCI: 00:12.5: enabled 0
794 07:47:20.600181 PCI: 00:12.6: enabled 0
795 07:47:20.600283 PCI: 00:14.0: enabled 1
796 07:47:20.603717 USB0 port 0: enabled 1
797 07:47:20.606860 USB2 port 0: enabled 1
798 07:47:20.610303 USB2 port 1: enabled 1
799 07:47:20.613335 USB2 port 2: enabled 0
800 07:47:20.613432 USB2 port 3: enabled 0
801 07:47:20.616843 USB2 port 5: enabled 0
802 07:47:20.620036 USB2 port 6: enabled 1
803 07:47:20.623449 USB2 port 9: enabled 1
804 07:47:20.626845 USB3 port 0: enabled 1
805 07:47:20.630010 USB3 port 1: enabled 1
806 07:47:20.630106 USB3 port 2: enabled 1
807 07:47:20.633186 USB3 port 3: enabled 1
808 07:47:20.636847 USB3 port 4: enabled 0
809 07:47:20.639872 PCI: 00:14.1: enabled 0
810 07:47:20.643053 PCI: 00:14.3: enabled 1
811 07:47:20.643150 PCI: 00:14.5: enabled 0
812 07:47:20.646983 PCI: 00:15.0: enabled 1
813 07:47:20.649999 I2C: 00:15: enabled 1
814 07:47:20.653325 PCI: 00:15.1: enabled 1
815 07:47:20.653422 I2C: 00:5d: enabled 1
816 07:47:20.656467 GENERIC: 0.0: enabled 1
817 07:47:20.659862 PCI: 00:15.2: enabled 0
818 07:47:20.663510 PCI: 00:15.3: enabled 0
819 07:47:20.666526 PCI: 00:16.0: enabled 1
820 07:47:20.666623 PCI: 00:16.1: enabled 0
821 07:47:20.670261 PCI: 00:16.2: enabled 0
822 07:47:20.673448 PCI: 00:16.3: enabled 0
823 07:47:20.676702 PCI: 00:16.4: enabled 0
824 07:47:20.679990 PCI: 00:16.5: enabled 0
825 07:47:20.680086 PCI: 00:17.0: enabled 1
826 07:47:20.683304 PCI: 00:19.0: enabled 1
827 07:47:20.686475 I2C: 00:1a: enabled 1
828 07:47:20.690272 I2C: 00:38: enabled 1
829 07:47:20.690369 I2C: 00:39: enabled 1
830 07:47:20.693611 I2C: 00:3a: enabled 1
831 07:47:20.696718 I2C: 00:3b: enabled 1
832 07:47:20.699926 PCI: 00:19.1: enabled 0
833 07:47:20.703225 PCI: 00:19.2: enabled 0
834 07:47:20.703323 PCI: 00:1a.0: enabled 0
835 07:47:20.706390 PCI: 00:1c.0: enabled 0
836 07:47:20.709977 PCI: 00:1c.1: enabled 0
837 07:47:20.713056 PCI: 00:1c.2: enabled 0
838 07:47:20.713154 PCI: 00:1c.3: enabled 0
839 07:47:20.716879 PCI: 00:1c.4: enabled 0
840 07:47:20.719681 PCI: 00:1c.5: enabled 0
841 07:47:20.723311 PCI: 00:1c.6: enabled 0
842 07:47:20.726225 PCI: 00:1c.7: enabled 0
843 07:47:20.726321 PCI: 00:1d.0: enabled 1
844 07:47:20.729495 PCI: 00:1d.1: enabled 0
845 07:47:20.733402 PCI: 00:1d.2: enabled 0
846 07:47:20.736530 PCI: 00:1d.3: enabled 0
847 07:47:20.739588 PCI: 00:1d.4: enabled 0
848 07:47:20.739682 PCI: 00:1d.5: enabled 1
849 07:47:20.743387 PCI: 00:00.0: enabled 1
850 07:47:20.746450 PCI: 00:1e.0: enabled 1
851 07:47:20.749845 PCI: 00:1e.1: enabled 0
852 07:47:20.752742 PCI: 00:1e.2: enabled 1
853 07:47:20.752836 SPI: 00: enabled 1
854 07:47:20.755901 PCI: 00:1e.3: enabled 1
855 07:47:20.759434 SPI: 01: enabled 1
856 07:47:20.762693 PCI: 00:1f.0: enabled 1
857 07:47:20.762820 PNP: 0c09.0: enabled 1
858 07:47:20.766416 PCI: 00:1f.1: enabled 1
859 07:47:20.769541 PCI: 00:1f.2: enabled 1
860 07:47:20.772592 PCI: 00:1f.3: enabled 1
861 07:47:20.776225 PCI: 00:1f.4: enabled 1
862 07:47:20.776331 PCI: 00:1f.5: enabled 1
863 07:47:20.779595 PCI: 00:1f.6: enabled 0
864 07:47:20.782766 Root Device scanning...
865 07:47:20.786092 scan_static_bus for Root Device
866 07:47:20.789316 CPU_CLUSTER: 0 enabled
867 07:47:20.789410 DOMAIN: 0000 enabled
868 07:47:20.792580 DOMAIN: 0000 scanning...
869 07:47:20.795934 PCI: pci_scan_bus for bus 00
870 07:47:20.799697 PCI: 00:00.0 [8086/0000] ops
871 07:47:20.802928 PCI: 00:00.0 [8086/9b61] enabled
872 07:47:20.806158 PCI: 00:02.0 [8086/0000] bus ops
873 07:47:20.809345 PCI: 00:02.0 [8086/9b41] enabled
874 07:47:20.812598 PCI: 00:04.0 [8086/1903] disabled
875 07:47:20.816198 PCI: 00:08.0 [8086/1911] enabled
876 07:47:20.819337 PCI: 00:12.0 [8086/02f9] enabled
877 07:47:20.823114 PCI: 00:14.0 [8086/0000] bus ops
878 07:47:20.826403 PCI: 00:14.0 [8086/02ed] enabled
879 07:47:20.829654 PCI: 00:14.2 [8086/02ef] enabled
880 07:47:20.832506 PCI: 00:14.3 [8086/02f0] enabled
881 07:47:20.836200 PCI: 00:15.0 [8086/0000] bus ops
882 07:47:20.839504 PCI: 00:15.0 [8086/02e8] enabled
883 07:47:20.842848 PCI: 00:15.1 [8086/0000] bus ops
884 07:47:20.846126 PCI: 00:15.1 [8086/02e9] enabled
885 07:47:20.849308 PCI: 00:16.0 [8086/0000] ops
886 07:47:20.852487 PCI: 00:16.0 [8086/02e0] enabled
887 07:47:20.855808 PCI: 00:17.0 [8086/0000] ops
888 07:47:20.859560 PCI: 00:17.0 [8086/02d3] enabled
889 07:47:20.862566 PCI: 00:19.0 [8086/0000] bus ops
890 07:47:20.866149 PCI: 00:19.0 [8086/02c5] enabled
891 07:47:20.869575 PCI: 00:1d.0 [8086/0000] bus ops
892 07:47:20.872493 PCI: 00:1d.0 [8086/02b0] enabled
893 07:47:20.876298 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 07:47:20.879416 PCI: 00:1e.0 [8086/0000] ops
895 07:47:20.882702 PCI: 00:1e.0 [8086/02a8] enabled
896 07:47:20.886251 PCI: 00:1e.2 [8086/0000] bus ops
897 07:47:20.889556 PCI: 00:1e.2 [8086/02aa] enabled
898 07:47:20.892748 PCI: 00:1e.3 [8086/0000] bus ops
899 07:47:20.895746 PCI: 00:1e.3 [8086/02ab] enabled
900 07:47:20.899621 PCI: 00:1f.0 [8086/0000] bus ops
901 07:47:20.902776 PCI: 00:1f.0 [8086/0284] enabled
902 07:47:20.909315 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 07:47:20.915994 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 07:47:20.919185 PCI: 00:1f.3 [8086/0000] bus ops
905 07:47:20.923044 PCI: 00:1f.3 [8086/02c8] enabled
906 07:47:20.926083 PCI: 00:1f.4 [8086/0000] bus ops
907 07:47:20.929259 PCI: 00:1f.4 [8086/02a3] enabled
908 07:47:20.932459 PCI: 00:1f.5 [8086/0000] bus ops
909 07:47:20.935745 PCI: 00:1f.5 [8086/02a4] enabled
910 07:47:20.939447 PCI: Leftover static devices:
911 07:47:20.939546 PCI: 00:05.0
912 07:47:20.939625 PCI: 00:12.5
913 07:47:20.942515 PCI: 00:12.6
914 07:47:20.942607 PCI: 00:14.1
915 07:47:20.945712 PCI: 00:14.5
916 07:47:20.945797 PCI: 00:15.2
917 07:47:20.945871 PCI: 00:15.3
918 07:47:20.949467 PCI: 00:16.1
919 07:47:20.949584 PCI: 00:16.2
920 07:47:20.952655 PCI: 00:16.3
921 07:47:20.952773 PCI: 00:16.4
922 07:47:20.952875 PCI: 00:16.5
923 07:47:20.955807 PCI: 00:19.1
924 07:47:20.955898 PCI: 00:19.2
925 07:47:20.959019 PCI: 00:1a.0
926 07:47:20.959103 PCI: 00:1c.0
927 07:47:20.959173 PCI: 00:1c.1
928 07:47:20.962307 PCI: 00:1c.2
929 07:47:20.962390 PCI: 00:1c.3
930 07:47:20.965506 PCI: 00:1c.4
931 07:47:20.965590 PCI: 00:1c.5
932 07:47:20.968682 PCI: 00:1c.6
933 07:47:20.968776 PCI: 00:1c.7
934 07:47:20.968851 PCI: 00:1d.1
935 07:47:20.972080 PCI: 00:1d.2
936 07:47:20.972173 PCI: 00:1d.3
937 07:47:20.975847 PCI: 00:1d.4
938 07:47:20.975941 PCI: 00:1d.5
939 07:47:20.976020 PCI: 00:1e.1
940 07:47:20.979017 PCI: 00:1f.1
941 07:47:20.979110 PCI: 00:1f.2
942 07:47:20.982530 PCI: 00:1f.6
943 07:47:20.985724 PCI: Check your devicetree.cb.
944 07:47:20.985853 PCI: 00:02.0 scanning...
945 07:47:20.989170 scan_generic_bus for PCI: 00:02.0
946 07:47:20.995672 scan_generic_bus for PCI: 00:02.0 done
947 07:47:20.999348 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
948 07:47:21.002343 PCI: 00:14.0 scanning...
949 07:47:21.005853 scan_static_bus for PCI: 00:14.0
950 07:47:21.008704 USB0 port 0 enabled
951 07:47:21.012209 USB0 port 0 scanning...
952 07:47:21.015501 scan_static_bus for USB0 port 0
953 07:47:21.015596 USB2 port 0 enabled
954 07:47:21.018759 USB2 port 1 enabled
955 07:47:21.018854 USB2 port 2 disabled
956 07:47:21.022392 USB2 port 3 disabled
957 07:47:21.025751 USB2 port 5 disabled
958 07:47:21.025849 USB2 port 6 enabled
959 07:47:21.028832 USB2 port 9 enabled
960 07:47:21.031862 USB3 port 0 enabled
961 07:47:21.031962 USB3 port 1 enabled
962 07:47:21.035150 USB3 port 2 enabled
963 07:47:21.035247 USB3 port 3 enabled
964 07:47:21.039135 USB3 port 4 disabled
965 07:47:21.042234 USB2 port 0 scanning...
966 07:47:21.045400 scan_static_bus for USB2 port 0
967 07:47:21.048390 scan_static_bus for USB2 port 0 done
968 07:47:21.055454 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
969 07:47:21.055590 USB2 port 1 scanning...
970 07:47:21.058677 scan_static_bus for USB2 port 1
971 07:47:21.061850 scan_static_bus for USB2 port 1 done
972 07:47:21.068573 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
973 07:47:21.071705 USB2 port 6 scanning...
974 07:47:21.075021 scan_static_bus for USB2 port 6
975 07:47:21.078821 scan_static_bus for USB2 port 6 done
976 07:47:21.085145 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
977 07:47:21.085240 USB2 port 9 scanning...
978 07:47:21.088170 scan_static_bus for USB2 port 9
979 07:47:21.095364 scan_static_bus for USB2 port 9 done
980 07:47:21.098351 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
981 07:47:21.102003 USB3 port 0 scanning...
982 07:47:21.105219 scan_static_bus for USB3 port 0
983 07:47:21.108502 scan_static_bus for USB3 port 0 done
984 07:47:21.114857 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
985 07:47:21.114981 USB3 port 1 scanning...
986 07:47:21.118822 scan_static_bus for USB3 port 1
987 07:47:21.124846 scan_static_bus for USB3 port 1 done
988 07:47:21.128450 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
989 07:47:21.131893 USB3 port 2 scanning...
990 07:47:21.134960 scan_static_bus for USB3 port 2
991 07:47:21.138745 scan_static_bus for USB3 port 2 done
992 07:47:21.145049 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
993 07:47:21.145146 USB3 port 3 scanning...
994 07:47:21.148459 scan_static_bus for USB3 port 3
995 07:47:21.155059 scan_static_bus for USB3 port 3 done
996 07:47:21.158173 scan_bus: scanning of bus USB3 port 3 took 9691 usecs
997 07:47:21.161832 scan_static_bus for USB0 port 0 done
998 07:47:21.168498 scan_bus: scanning of bus USB0 port 0 took 155318 usecs
999 07:47:21.171754 scan_static_bus for PCI: 00:14.0 done
1000 07:47:21.178142 scan_bus: scanning of bus PCI: 00:14.0 took 172925 usecs
1001 07:47:21.181813 PCI: 00:15.0 scanning...
1002 07:47:21.185196 scan_generic_bus for PCI: 00:15.0
1003 07:47:21.187969 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 07:47:21.191667 scan_generic_bus for PCI: 00:15.0 done
1005 07:47:21.198126 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1006 07:47:21.201293 PCI: 00:15.1 scanning...
1007 07:47:21.204450 scan_generic_bus for PCI: 00:15.1
1008 07:47:21.208191 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 07:47:21.211438 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 07:47:21.214678 scan_generic_bus for PCI: 00:15.1 done
1011 07:47:21.221593 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
1012 07:47:21.224801 PCI: 00:19.0 scanning...
1013 07:47:21.228138 scan_generic_bus for PCI: 00:19.0
1014 07:47:21.231382 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 07:47:21.234894 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 07:47:21.241021 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 07:47:21.244848 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 07:47:21.248054 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 07:47:21.251104 scan_generic_bus for PCI: 00:19.0 done
1020 07:47:21.257995 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1021 07:47:21.261201 PCI: 00:1d.0 scanning...
1022 07:47:21.264510 do_pci_scan_bridge for PCI: 00:1d.0
1023 07:47:21.267869 PCI: pci_scan_bus for bus 01
1024 07:47:21.270968 PCI: 01:00.0 [1c5c/1327] enabled
1025 07:47:21.274561 Enabling Common Clock Configuration
1026 07:47:21.277890 L1 Sub-State supported from root port 29
1027 07:47:21.281230 L1 Sub-State Support = 0xf
1028 07:47:21.284461 CommonModeRestoreTime = 0x28
1029 07:47:21.287467 Power On Value = 0x16, Power On Scale = 0x0
1030 07:47:21.291384 ASPM: Enabled L1
1031 07:47:21.294382 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1032 07:47:21.297630 PCI: 00:1e.2 scanning...
1033 07:47:21.300776 scan_generic_bus for PCI: 00:1e.2
1034 07:47:21.304013 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 07:47:21.310720 scan_generic_bus for PCI: 00:1e.2 done
1036 07:47:21.314080 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1037 07:47:21.317182 PCI: 00:1e.3 scanning...
1038 07:47:21.320983 scan_generic_bus for PCI: 00:1e.3
1039 07:47:21.324164 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 07:47:21.330424 scan_generic_bus for PCI: 00:1e.3 done
1041 07:47:21.334268 scan_bus: scanning of bus PCI: 00:1e.3 took 14015 usecs
1042 07:47:21.337478 PCI: 00:1f.0 scanning...
1043 07:47:21.340760 scan_static_bus for PCI: 00:1f.0
1044 07:47:21.343868 PNP: 0c09.0 enabled
1045 07:47:21.347135 scan_static_bus for PCI: 00:1f.0 done
1046 07:47:21.350282 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1047 07:47:21.354228 PCI: 00:1f.3 scanning...
1048 07:47:21.360726 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1049 07:47:21.364013 PCI: 00:1f.4 scanning...
1050 07:47:21.367138 scan_generic_bus for PCI: 00:1f.4
1051 07:47:21.370383 scan_generic_bus for PCI: 00:1f.4 done
1052 07:47:21.376783 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1053 07:47:21.379937 PCI: 00:1f.5 scanning...
1054 07:47:21.383561 scan_generic_bus for PCI: 00:1f.5
1055 07:47:21.386811 scan_generic_bus for PCI: 00:1f.5 done
1056 07:47:21.393505 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1057 07:47:21.396995 scan_bus: scanning of bus DOMAIN: 0000 took 604876 usecs
1058 07:47:21.399952 scan_static_bus for Root Device done
1059 07:47:21.406262 scan_bus: scanning of bus Root Device took 624741 usecs
1060 07:47:21.406357 done
1061 07:47:21.409884 Chrome EC: UHEPI supported
1062 07:47:21.416604 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 07:47:21.423357 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 07:47:21.429957 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 07:47:21.436388 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 07:47:21.439747 SPI flash protection: WPSW=0 SRP0=0
1067 07:47:21.442997 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 07:47:21.449665 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1069 07:47:21.453563 found VGA at PCI: 00:02.0
1070 07:47:21.456710 Setting up VGA for PCI: 00:02.0
1071 07:47:21.459910 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 07:47:21.466330 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 07:47:21.469560 Allocating resources...
1074 07:47:21.469654 Reading resources...
1075 07:47:21.476096 Root Device read_resources bus 0 link: 0
1076 07:47:21.479311 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 07:47:21.485967 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 07:47:21.489122 DOMAIN: 0000 read_resources bus 0 link: 0
1079 07:47:21.495702 PCI: 00:14.0 read_resources bus 0 link: 0
1080 07:47:21.499569 USB0 port 0 read_resources bus 0 link: 0
1081 07:47:21.506993 USB0 port 0 read_resources bus 0 link: 0 done
1082 07:47:21.510256 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 07:47:21.517984 PCI: 00:15.0 read_resources bus 1 link: 0
1084 07:47:21.521007 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 07:47:21.528078 PCI: 00:15.1 read_resources bus 2 link: 0
1086 07:47:21.531311 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 07:47:21.538559 PCI: 00:19.0 read_resources bus 3 link: 0
1088 07:47:21.545014 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 07:47:21.548543 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 07:47:21.555134 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 07:47:21.558206 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 07:47:21.565304 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 07:47:21.568627 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 07:47:21.575158 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 07:47:21.578318 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 07:47:21.584971 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 07:47:21.591381 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 07:47:21.595219 Root Device read_resources bus 0 link: 0 done
1099 07:47:21.598480 Done reading resources.
1100 07:47:21.601676 Show resources in subtree (Root Device)...After reading.
1101 07:47:21.608083 Root Device child on link 0 CPU_CLUSTER: 0
1102 07:47:21.611233 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 07:47:21.611324 APIC: 00
1104 07:47:21.615137 APIC: 03
1105 07:47:21.615241 APIC: 07
1106 07:47:21.618063 APIC: 01
1107 07:47:21.618157 APIC: 02
1108 07:47:21.618231 APIC: 05
1109 07:47:21.621201 APIC: 04
1110 07:47:21.621293 APIC: 06
1111 07:47:21.624675 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 07:47:21.634648 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 07:47:21.687835 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 07:47:21.688259 PCI: 00:00.0
1115 07:47:21.688550 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 07:47:21.688964 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 07:47:21.689254 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 07:47:21.689995 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 07:47:21.735493 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 07:47:21.736295 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 07:47:21.736438 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 07:47:21.736573 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 07:47:21.736723 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 07:47:21.743265 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 07:47:21.750428 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 07:47:21.759682 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 07:47:21.769969 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 07:47:21.780030 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 07:47:21.786676 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 07:47:21.845435 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 07:47:21.845635 PCI: 00:02.0
1132 07:47:21.845728 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 07:47:21.845800 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 07:47:21.845950 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 07:47:21.846090 PCI: 00:04.0
1136 07:47:21.846217 PCI: 00:08.0
1137 07:47:21.846353 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 07:47:21.846492 PCI: 00:12.0
1139 07:47:21.892375 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 07:47:21.892748 PCI: 00:14.0 child on link 0 USB0 port 0
1141 07:47:21.892832 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 07:47:21.892904 USB0 port 0 child on link 0 USB2 port 0
1143 07:47:21.892981 USB2 port 0
1144 07:47:21.936336 USB2 port 1
1145 07:47:21.936523 USB2 port 2
1146 07:47:21.936614 USB2 port 3
1147 07:47:21.936686 USB2 port 5
1148 07:47:21.936760 USB2 port 6
1149 07:47:21.936827 USB2 port 9
1150 07:47:21.936890 USB3 port 0
1151 07:47:21.936962 USB3 port 1
1152 07:47:21.937027 USB3 port 2
1153 07:47:21.937088 USB3 port 3
1154 07:47:21.937161 USB3 port 4
1155 07:47:21.937223 PCI: 00:14.2
1156 07:47:21.937284 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 07:47:21.937354 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 07:47:21.937417 PCI: 00:14.3
1159 07:47:21.937676 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 07:47:21.937766 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 07:47:21.980365 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 07:47:21.980512 I2C: 01:15
1163 07:47:21.980595 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 07:47:21.980666 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 07:47:21.980734 I2C: 02:5d
1166 07:47:21.980800 GENERIC: 0.0
1167 07:47:21.980864 PCI: 00:16.0
1168 07:47:21.988369 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:47:21.988461 PCI: 00:17.0
1170 07:47:21.988531 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 07:47:21.989068 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 07:47:21.998452 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 07:47:22.005563 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 07:47:22.015423 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 07:47:22.025302 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 07:47:22.028350 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 07:47:22.038291 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 07:47:22.038425 I2C: 03:1a
1179 07:47:22.041623 I2C: 03:38
1180 07:47:22.041717 I2C: 03:39
1181 07:47:22.045133 I2C: 03:3a
1182 07:47:22.045226 I2C: 03:3b
1183 07:47:22.052040 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 07:47:22.058442 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 07:47:22.068413 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 07:47:22.078062 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 07:47:22.078167 PCI: 01:00.0
1188 07:47:22.087978 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 07:47:22.091808 PCI: 00:1e.0
1190 07:47:22.101486 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 07:47:22.111823 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 07:47:22.115003 PCI: 00:1e.2 child on link 0 SPI: 00
1193 07:47:22.124617 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 07:47:22.127895 SPI: 00
1195 07:47:22.131662 PCI: 00:1e.3 child on link 0 SPI: 01
1196 07:47:22.141408 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 07:47:22.141501 SPI: 01
1198 07:47:22.148350 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 07:47:22.154793 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 07:47:22.164396 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 07:47:22.164536 PNP: 0c09.0
1202 07:47:22.174492 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 07:47:22.178141 PCI: 00:1f.3
1204 07:47:22.188073 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 07:47:22.198129 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 07:47:22.198278 PCI: 00:1f.4
1207 07:47:22.208413 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 07:47:22.217725 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 07:47:22.217927 PCI: 00:1f.5
1210 07:47:22.227927 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 07:47:22.234727 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 07:47:22.240974 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 07:47:22.247926 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 07:47:22.251148 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 07:47:22.254383 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 07:47:22.257794 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 07:47:22.260846 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 07:47:22.267451 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 07:47:22.274035 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 07:47:22.283744 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 07:47:22.290421 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 07:47:22.297539 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 07:47:22.304069 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 07:47:22.310482 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 07:47:22.314174 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 07:47:22.320385 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 07:47:22.324082 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 07:47:22.330777 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 07:47:22.334179 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 07:47:22.340755 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 07:47:22.343820 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 07:47:22.350301 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 07:47:22.353562 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 07:47:22.356849 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 07:47:22.363879 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 07:47:22.367040 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 07:47:22.373510 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 07:47:22.376764 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 07:47:22.383609 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 07:47:22.386810 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 07:47:22.393342 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 07:47:22.396881 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 07:47:22.403506 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 07:47:22.406696 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 07:47:22.413426 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 07:47:22.416522 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 07:47:22.423540 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 07:47:22.430243 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 07:47:22.433115 avoid_fixed_resources: DOMAIN: 0000
1250 07:47:22.439948 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 07:47:22.446469 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 07:47:22.452906 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 07:47:22.459866 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 07:47:22.469413 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 07:47:22.476486 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 07:47:22.482751 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 07:47:22.492912 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 07:47:22.499252 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 07:47:22.505844 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 07:47:22.515891 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 07:47:22.522595 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 07:47:22.522718 Setting resources...
1263 07:47:22.528946 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 07:47:22.535926 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 07:47:22.538823 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 07:47:22.542084 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 07:47:22.545660 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 07:47:22.552144 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 07:47:22.559009 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 07:47:22.565448 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 07:47:22.571868 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 07:47:22.578855 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 07:47:22.582145 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 07:47:22.588465 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 07:47:22.591638 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 07:47:22.598731 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 07:47:22.602218 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 07:47:22.608973 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 07:47:22.612002 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 07:47:22.615146 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 07:47:22.621705 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 07:47:22.625003 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 07:47:22.631983 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 07:47:22.634753 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 07:47:22.641395 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 07:47:22.644784 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 07:47:22.651269 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 07:47:22.655004 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 07:47:22.661769 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 07:47:22.665109 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 07:47:22.671889 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 07:47:22.674782 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 07:47:22.678207 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 07:47:22.684607 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 07:47:22.691731 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 07:47:22.697979 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 07:47:22.708376 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 07:47:22.714864 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 07:47:22.718074 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 07:47:22.728107 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 07:47:22.731570 Root Device assign_resources, bus 0 link: 0
1302 07:47:22.734501 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 07:47:22.744546 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 07:47:22.751602 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 07:47:22.761022 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 07:47:22.767949 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 07:47:22.778089 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 07:47:22.784237 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 07:47:22.791311 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 07:47:22.794428 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 07:47:22.801307 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 07:47:22.811412 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 07:47:22.818069 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 07:47:22.827838 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 07:47:22.830745 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 07:47:22.838181 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 07:47:22.844220 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 07:47:22.850727 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 07:47:22.854426 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 07:47:22.860919 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 07:47:22.871220 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 07:47:22.877850 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 07:47:22.884272 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 07:47:22.894751 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 07:47:22.901012 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 07:47:22.907399 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 07:47:22.917599 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 07:47:22.920924 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 07:47:22.927396 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 07:47:22.934455 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 07:47:22.944476 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 07:47:22.954348 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 07:47:22.957633 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 07:47:22.964091 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 07:47:22.970473 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 07:47:22.977337 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 07:47:22.987258 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 07:47:22.990753 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 07:47:22.997418 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 07:47:23.003873 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 07:47:23.007178 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 07:47:23.014157 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 07:47:23.017262 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 07:47:23.024092 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 07:47:23.027171 LPC: Trying to open IO window from 800 size 1ff
1346 07:47:23.037477 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 07:47:23.043826 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 07:47:23.054102 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 07:47:23.060550 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 07:47:23.066977 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 07:47:23.070159 Root Device assign_resources, bus 0 link: 0
1352 07:47:23.074121 Done setting resources.
1353 07:47:23.080468 Show resources in subtree (Root Device)...After assigning values.
1354 07:47:23.083679 Root Device child on link 0 CPU_CLUSTER: 0
1355 07:47:23.087084 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 07:47:23.090408 APIC: 00
1357 07:47:23.090528 APIC: 03
1358 07:47:23.090632 APIC: 07
1359 07:47:23.093616 APIC: 01
1360 07:47:23.093708 APIC: 02
1361 07:47:23.096871 APIC: 05
1362 07:47:23.096963 APIC: 04
1363 07:47:23.097036 APIC: 06
1364 07:47:23.103457 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 07:47:23.113807 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 07:47:23.123205 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 07:47:23.123329 PCI: 00:00.0
1368 07:47:23.133390 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 07:47:23.143206 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 07:47:23.153442 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 07:47:23.163257 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 07:47:23.172963 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 07:47:23.179393 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 07:47:23.189991 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 07:47:23.199277 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 07:47:23.209620 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 07:47:23.219585 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 07:47:23.226007 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 07:47:23.235765 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 07:47:23.245852 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 07:47:23.256141 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 07:47:23.265778 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 07:47:23.275466 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 07:47:23.275629 PCI: 00:02.0
1385 07:47:23.285832 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 07:47:23.298706 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 07:47:23.305740 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 07:47:23.308790 PCI: 00:04.0
1389 07:47:23.308952 PCI: 00:08.0
1390 07:47:23.321544 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 07:47:23.321674 PCI: 00:12.0
1392 07:47:23.331863 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 07:47:23.338361 PCI: 00:14.0 child on link 0 USB0 port 0
1394 07:47:23.348662 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 07:47:23.351397 USB0 port 0 child on link 0 USB2 port 0
1396 07:47:23.355160 USB2 port 0
1397 07:47:23.355280 USB2 port 1
1398 07:47:23.358443 USB2 port 2
1399 07:47:23.358557 USB2 port 3
1400 07:47:23.361658 USB2 port 5
1401 07:47:23.361751 USB2 port 6
1402 07:47:23.364905 USB2 port 9
1403 07:47:23.364996 USB3 port 0
1404 07:47:23.367954 USB3 port 1
1405 07:47:23.368046 USB3 port 2
1406 07:47:23.371476 USB3 port 3
1407 07:47:23.371574 USB3 port 4
1408 07:47:23.374956 PCI: 00:14.2
1409 07:47:23.384808 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 07:47:23.394493 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 07:47:23.397710 PCI: 00:14.3
1412 07:47:23.407795 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 07:47:23.411000 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 07:47:23.421359 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 07:47:23.424202 I2C: 01:15
1416 07:47:23.427695 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 07:47:23.437281 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 07:47:23.441152 I2C: 02:5d
1419 07:47:23.441304 GENERIC: 0.0
1420 07:47:23.444403 PCI: 00:16.0
1421 07:47:23.453933 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 07:47:23.454098 PCI: 00:17.0
1423 07:47:23.463951 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 07:47:23.473482 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 07:47:23.483748 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 07:47:23.493438 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 07:47:23.503245 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 07:47:23.513505 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 07:47:23.516712 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 07:47:23.526929 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 07:47:23.530058 I2C: 03:1a
1432 07:47:23.530153 I2C: 03:38
1433 07:47:23.533005 I2C: 03:39
1434 07:47:23.533098 I2C: 03:3a
1435 07:47:23.533171 I2C: 03:3b
1436 07:47:23.540027 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 07:47:23.550071 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 07:47:23.559630 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 07:47:23.569717 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 07:47:23.569830 PCI: 01:00.0
1441 07:47:23.582431 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 07:47:23.582534 PCI: 00:1e.0
1443 07:47:23.592818 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 07:47:23.605826 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 07:47:23.609325 PCI: 00:1e.2 child on link 0 SPI: 00
1446 07:47:23.619335 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 07:47:23.619526 SPI: 00
1448 07:47:23.622144 PCI: 00:1e.3 child on link 0 SPI: 01
1449 07:47:23.635374 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 07:47:23.635514 SPI: 01
1451 07:47:23.638648 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 07:47:23.648982 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 07:47:23.658453 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 07:47:23.658589 PNP: 0c09.0
1455 07:47:23.668670 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 07:47:23.668777 PCI: 00:1f.3
1457 07:47:23.678896 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 07:47:23.691893 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 07:47:23.692005 PCI: 00:1f.4
1460 07:47:23.701650 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 07:47:23.711198 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 07:47:23.711315 PCI: 00:1f.5
1463 07:47:23.724419 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 07:47:23.724561 Done allocating resources.
1465 07:47:23.731355 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 07:47:23.734760 Enabling resources...
1467 07:47:23.737730 PCI: 00:00.0 subsystem <- 8086/9b61
1468 07:47:23.741208 PCI: 00:00.0 cmd <- 06
1469 07:47:23.744379 PCI: 00:02.0 subsystem <- 8086/9b41
1470 07:47:23.747583 PCI: 00:02.0 cmd <- 03
1471 07:47:23.750867 PCI: 00:08.0 cmd <- 06
1472 07:47:23.754029 PCI: 00:12.0 subsystem <- 8086/02f9
1473 07:47:23.757829 PCI: 00:12.0 cmd <- 02
1474 07:47:23.760949 PCI: 00:14.0 subsystem <- 8086/02ed
1475 07:47:23.761054 PCI: 00:14.0 cmd <- 02
1476 07:47:23.764472 PCI: 00:14.2 cmd <- 02
1477 07:47:23.767256 PCI: 00:14.3 subsystem <- 8086/02f0
1478 07:47:23.770899 PCI: 00:14.3 cmd <- 02
1479 07:47:23.774562 PCI: 00:15.0 subsystem <- 8086/02e8
1480 07:47:23.777658 PCI: 00:15.0 cmd <- 02
1481 07:47:23.780725 PCI: 00:15.1 subsystem <- 8086/02e9
1482 07:47:23.784071 PCI: 00:15.1 cmd <- 02
1483 07:47:23.787172 PCI: 00:16.0 subsystem <- 8086/02e0
1484 07:47:23.790538 PCI: 00:16.0 cmd <- 02
1485 07:47:23.793928 PCI: 00:17.0 subsystem <- 8086/02d3
1486 07:47:23.797091 PCI: 00:17.0 cmd <- 03
1487 07:47:23.800892 PCI: 00:19.0 subsystem <- 8086/02c5
1488 07:47:23.804096 PCI: 00:19.0 cmd <- 02
1489 07:47:23.807399 PCI: 00:1d.0 bridge ctrl <- 0013
1490 07:47:23.810576 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 07:47:23.810664 PCI: 00:1d.0 cmd <- 06
1492 07:47:23.817154 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 07:47:23.817244 PCI: 00:1e.0 cmd <- 06
1494 07:47:23.824011 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 07:47:23.824130 PCI: 00:1e.2 cmd <- 06
1496 07:47:23.827246 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 07:47:23.830489 PCI: 00:1e.3 cmd <- 02
1498 07:47:23.834219 PCI: 00:1f.0 subsystem <- 8086/0284
1499 07:47:23.837210 PCI: 00:1f.0 cmd <- 407
1500 07:47:23.840603 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 07:47:23.843611 PCI: 00:1f.3 cmd <- 02
1502 07:47:23.847143 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 07:47:23.850365 PCI: 00:1f.4 cmd <- 03
1504 07:47:23.853567 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 07:47:23.856980 PCI: 00:1f.5 cmd <- 406
1506 07:47:23.864938 PCI: 01:00.0 cmd <- 02
1507 07:47:23.870029 done.
1508 07:47:23.881367 ME: Version: 14.0.39.1367
1509 07:47:23.887932 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 07:47:23.891327 Initializing devices...
1511 07:47:23.891416 Root Device init ...
1512 07:47:23.898009 Chrome EC: Set SMI mask to 0x0000000000000000
1513 07:47:23.901379 Chrome EC: clear events_b mask to 0x0000000000000000
1514 07:47:23.907856 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 07:47:23.915078 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 07:47:23.921726 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 07:47:23.924814 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 07:47:23.927952 Root Device init finished in 35220 usecs
1519 07:47:23.931741 CPU_CLUSTER: 0 init ...
1520 07:47:23.937980 CPU_CLUSTER: 0 init finished in 2446 usecs
1521 07:47:23.942529 PCI: 00:00.0 init ...
1522 07:47:23.945750 CPU TDP: 15 Watts
1523 07:47:23.949126 CPU PL2 = 64 Watts
1524 07:47:23.952195 PCI: 00:00.0 init finished in 7081 usecs
1525 07:47:23.955245 PCI: 00:02.0 init ...
1526 07:47:23.958783 PCI: 00:02.0 init finished in 2253 usecs
1527 07:47:23.962251 PCI: 00:08.0 init ...
1528 07:47:23.965634 PCI: 00:08.0 init finished in 2252 usecs
1529 07:47:23.968779 PCI: 00:12.0 init ...
1530 07:47:23.971870 PCI: 00:12.0 init finished in 2251 usecs
1531 07:47:23.975225 PCI: 00:14.0 init ...
1532 07:47:23.979058 PCI: 00:14.0 init finished in 2251 usecs
1533 07:47:23.982245 PCI: 00:14.2 init ...
1534 07:47:23.985201 PCI: 00:14.2 init finished in 2252 usecs
1535 07:47:23.988619 PCI: 00:14.3 init ...
1536 07:47:23.991884 PCI: 00:14.3 init finished in 2272 usecs
1537 07:47:23.995827 PCI: 00:15.0 init ...
1538 07:47:23.999006 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 07:47:24.001823 PCI: 00:15.0 init finished in 5974 usecs
1540 07:47:24.005727 PCI: 00:15.1 init ...
1541 07:47:24.008807 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 07:47:24.011769 PCI: 00:15.1 init finished in 5973 usecs
1543 07:47:24.015270 PCI: 00:16.0 init ...
1544 07:47:24.018530 PCI: 00:16.0 init finished in 2251 usecs
1545 07:47:24.022382 PCI: 00:19.0 init ...
1546 07:47:24.026274 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 07:47:24.032923 PCI: 00:19.0 init finished in 5976 usecs
1548 07:47:24.033010 PCI: 00:1d.0 init ...
1549 07:47:24.036025 Initializing PCH PCIe bridge.
1550 07:47:24.038944 PCI: 00:1d.0 init finished in 5283 usecs
1551 07:47:24.044023 PCI: 00:1f.0 init ...
1552 07:47:24.047171 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 07:47:24.054375 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 07:47:24.054465 IOAPIC: ID = 0x02
1555 07:47:24.057567 IOAPIC: Dumping registers
1556 07:47:24.060879 reg 0x0000: 0x02000000
1557 07:47:24.063984 reg 0x0001: 0x00770020
1558 07:47:24.064075 reg 0x0002: 0x00000000
1559 07:47:24.070969 PCI: 00:1f.0 init finished in 23543 usecs
1560 07:47:24.074297 PCI: 00:1f.4 init ...
1561 07:47:24.077573 PCI: 00:1f.4 init finished in 2261 usecs
1562 07:47:24.088353 PCI: 01:00.0 init ...
1563 07:47:24.091974 PCI: 01:00.0 init finished in 2252 usecs
1564 07:47:24.095960 PNP: 0c09.0 init ...
1565 07:47:24.099207 Google Chrome EC uptime: 11.061 seconds
1566 07:47:24.106022 Google Chrome AP resets since EC boot: 0
1567 07:47:24.109215 Google Chrome most recent AP reset causes:
1568 07:47:24.115564 Google Chrome EC reset flags at last EC boot: reset-pin
1569 07:47:24.119099 PNP: 0c09.0 init finished in 20567 usecs
1570 07:47:24.122510 Devices initialized
1571 07:47:24.122650 Show all devs... After init.
1572 07:47:24.126072 Root Device: enabled 1
1573 07:47:24.129063 CPU_CLUSTER: 0: enabled 1
1574 07:47:24.132230 DOMAIN: 0000: enabled 1
1575 07:47:24.132368 APIC: 00: enabled 1
1576 07:47:24.135441 PCI: 00:00.0: enabled 1
1577 07:47:24.138731 PCI: 00:02.0: enabled 1
1578 07:47:24.142027 PCI: 00:04.0: enabled 0
1579 07:47:24.142135 PCI: 00:05.0: enabled 0
1580 07:47:24.145658 PCI: 00:12.0: enabled 1
1581 07:47:24.148967 PCI: 00:12.5: enabled 0
1582 07:47:24.149060 PCI: 00:12.6: enabled 0
1583 07:47:24.152096 PCI: 00:14.0: enabled 1
1584 07:47:24.155415 PCI: 00:14.1: enabled 0
1585 07:47:24.159286 PCI: 00:14.3: enabled 1
1586 07:47:24.159380 PCI: 00:14.5: enabled 0
1587 07:47:24.162443 PCI: 00:15.0: enabled 1
1588 07:47:24.165594 PCI: 00:15.1: enabled 1
1589 07:47:24.168710 PCI: 00:15.2: enabled 0
1590 07:47:24.168802 PCI: 00:15.3: enabled 0
1591 07:47:24.171898 PCI: 00:16.0: enabled 1
1592 07:47:24.175590 PCI: 00:16.1: enabled 0
1593 07:47:24.179015 PCI: 00:16.2: enabled 0
1594 07:47:24.179121 PCI: 00:16.3: enabled 0
1595 07:47:24.182211 PCI: 00:16.4: enabled 0
1596 07:47:24.185489 PCI: 00:16.5: enabled 0
1597 07:47:24.185582 PCI: 00:17.0: enabled 1
1598 07:47:24.188730 PCI: 00:19.0: enabled 1
1599 07:47:24.191981 PCI: 00:19.1: enabled 0
1600 07:47:24.195273 PCI: 00:19.2: enabled 0
1601 07:47:24.195366 PCI: 00:1a.0: enabled 0
1602 07:47:24.198458 PCI: 00:1c.0: enabled 0
1603 07:47:24.202094 PCI: 00:1c.1: enabled 0
1604 07:47:24.205462 PCI: 00:1c.2: enabled 0
1605 07:47:24.205555 PCI: 00:1c.3: enabled 0
1606 07:47:24.208553 PCI: 00:1c.4: enabled 0
1607 07:47:24.211973 PCI: 00:1c.5: enabled 0
1608 07:47:24.214866 PCI: 00:1c.6: enabled 0
1609 07:47:24.214985 PCI: 00:1c.7: enabled 0
1610 07:47:24.218703 PCI: 00:1d.0: enabled 1
1611 07:47:24.221981 PCI: 00:1d.1: enabled 0
1612 07:47:24.225303 PCI: 00:1d.2: enabled 0
1613 07:47:24.225429 PCI: 00:1d.3: enabled 0
1614 07:47:24.228562 PCI: 00:1d.4: enabled 0
1615 07:47:24.231623 PCI: 00:1d.5: enabled 0
1616 07:47:24.231736 PCI: 00:1e.0: enabled 1
1617 07:47:24.235296 PCI: 00:1e.1: enabled 0
1618 07:47:24.238264 PCI: 00:1e.2: enabled 1
1619 07:47:24.241894 PCI: 00:1e.3: enabled 1
1620 07:47:24.242012 PCI: 00:1f.0: enabled 1
1621 07:47:24.245304 PCI: 00:1f.1: enabled 0
1622 07:47:24.248151 PCI: 00:1f.2: enabled 0
1623 07:47:24.251442 PCI: 00:1f.3: enabled 1
1624 07:47:24.251530 PCI: 00:1f.4: enabled 1
1625 07:47:24.254972 PCI: 00:1f.5: enabled 1
1626 07:47:24.257817 PCI: 00:1f.6: enabled 0
1627 07:47:24.261705 USB0 port 0: enabled 1
1628 07:47:24.261792 I2C: 01:15: enabled 1
1629 07:47:24.264865 I2C: 02:5d: enabled 1
1630 07:47:24.268098 GENERIC: 0.0: enabled 1
1631 07:47:24.268210 I2C: 03:1a: enabled 1
1632 07:47:24.271347 I2C: 03:38: enabled 1
1633 07:47:24.274595 I2C: 03:39: enabled 1
1634 07:47:24.274681 I2C: 03:3a: enabled 1
1635 07:47:24.277780 I2C: 03:3b: enabled 1
1636 07:47:24.281546 PCI: 00:00.0: enabled 1
1637 07:47:24.281635 SPI: 00: enabled 1
1638 07:47:24.284805 SPI: 01: enabled 1
1639 07:47:24.288117 PNP: 0c09.0: enabled 1
1640 07:47:24.288227 USB2 port 0: enabled 1
1641 07:47:24.291275 USB2 port 1: enabled 1
1642 07:47:24.294402 USB2 port 2: enabled 0
1643 07:47:24.294487 USB2 port 3: enabled 0
1644 07:47:24.297569 USB2 port 5: enabled 0
1645 07:47:24.300936 USB2 port 6: enabled 1
1646 07:47:24.304747 USB2 port 9: enabled 1
1647 07:47:24.304843 USB3 port 0: enabled 1
1648 07:47:24.308113 USB3 port 1: enabled 1
1649 07:47:24.311168 USB3 port 2: enabled 1
1650 07:47:24.311262 USB3 port 3: enabled 1
1651 07:47:24.314336 USB3 port 4: enabled 0
1652 07:47:24.317952 APIC: 03: enabled 1
1653 07:47:24.318073 APIC: 07: enabled 1
1654 07:47:24.321003 APIC: 01: enabled 1
1655 07:47:24.324463 APIC: 02: enabled 1
1656 07:47:24.324583 APIC: 05: enabled 1
1657 07:47:24.327728 APIC: 04: enabled 1
1658 07:47:24.327877 APIC: 06: enabled 1
1659 07:47:24.330908 PCI: 00:08.0: enabled 1
1660 07:47:24.334128 PCI: 00:14.2: enabled 1
1661 07:47:24.337387 PCI: 01:00.0: enabled 1
1662 07:47:24.341201 Disabling ACPI via APMC:
1663 07:47:24.341321 done.
1664 07:47:24.347710 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 07:47:24.350867 ELOG: NV offset 0xaf0000 size 0x4000
1666 07:47:24.357838 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 07:47:24.364044 ELOG: Event(17) added with size 13 at 2024-01-03 07:46:52 UTC
1668 07:47:24.370939 ELOG: Event(92) added with size 9 at 2024-01-03 07:46:52 UTC
1669 07:47:24.377920 ELOG: Event(93) added with size 9 at 2024-01-03 07:46:52 UTC
1670 07:47:24.384157 ELOG: Event(9A) added with size 9 at 2024-01-03 07:46:52 UTC
1671 07:47:24.390687 ELOG: Event(9E) added with size 10 at 2024-01-03 07:46:52 UTC
1672 07:47:24.397799 ELOG: Event(9F) added with size 14 at 2024-01-03 07:46:52 UTC
1673 07:47:24.400893 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1674 07:47:24.407429 ELOG: Event(A1) added with size 10 at 2024-01-03 07:46:52 UTC
1675 07:47:24.418013 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 07:47:24.424215 ELOG: Event(A0) added with size 9 at 2024-01-03 07:46:52 UTC
1677 07:47:24.427305 elog_add_boot_reason: Logged dev mode boot
1678 07:47:24.427421 Finalize devices...
1679 07:47:24.431122 PCI: 00:17.0 final
1680 07:47:24.434446 Devices finalized
1681 07:47:24.437526 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 07:47:24.443969 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 07:47:24.447244 ME: HFSTS1 : 0x90000245
1684 07:47:24.450873 ME: HFSTS2 : 0x3B850126
1685 07:47:24.457577 ME: HFSTS3 : 0x00000020
1686 07:47:24.460398 ME: HFSTS4 : 0x00004800
1687 07:47:24.464033 ME: HFSTS5 : 0x00000000
1688 07:47:24.467157 ME: HFSTS6 : 0x40400006
1689 07:47:24.470439 ME: Manufacturing Mode : NO
1690 07:47:24.474081 ME: FW Partition Table : OK
1691 07:47:24.477105 ME: Bringup Loader Failure : NO
1692 07:47:24.480343 ME: Firmware Init Complete : YES
1693 07:47:24.484084 ME: Boot Options Present : NO
1694 07:47:24.487170 ME: Update In Progress : NO
1695 07:47:24.490302 ME: D0i3 Support : YES
1696 07:47:24.493495 ME: Low Power State Enabled : NO
1697 07:47:24.496743 ME: CPU Replaced : NO
1698 07:47:24.500466 ME: CPU Replacement Valid : YES
1699 07:47:24.503614 ME: Current Working State : 5
1700 07:47:24.506900 ME: Current Operation State : 1
1701 07:47:24.510189 ME: Current Operation Mode : 0
1702 07:47:24.513345 ME: Error Code : 0
1703 07:47:24.516532 ME: CPU Debug Disabled : YES
1704 07:47:24.520032 ME: TXT Support : NO
1705 07:47:24.526795 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 07:47:24.533750 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 07:47:24.533860 CBFS @ c08000 size 3f8000
1708 07:47:24.539949 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 07:47:24.543202 CBFS: Locating 'fallback/dsdt.aml'
1710 07:47:24.546290 CBFS: Found @ offset 10bb80 size 3fa5
1711 07:47:24.553357 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 07:47:24.556696 CBFS @ c08000 size 3f8000
1713 07:47:24.559564 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 07:47:24.563171 CBFS: Locating 'fallback/slic'
1715 07:47:24.567856 CBFS: 'fallback/slic' not found.
1716 07:47:24.574965 ACPI: Writing ACPI tables at 99b3e000.
1717 07:47:24.575090 ACPI: * FACS
1718 07:47:24.577974 ACPI: * DSDT
1719 07:47:24.581629 Ramoops buffer: 0x100000@0x99a3d000.
1720 07:47:24.584507 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 07:47:24.591338 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 07:47:24.594812 Google Chrome EC: version:
1723 07:47:24.597675 ro: helios_v2.0.2659-56403530b
1724 07:47:24.601432 rw: helios_v2.0.2849-c41de27e7d
1725 07:47:24.601529 running image: 1
1726 07:47:24.605303 ACPI: * FADT
1727 07:47:24.605401 SCI is IRQ9
1728 07:47:24.611847 ACPI: added table 1/32, length now 40
1729 07:47:24.611994 ACPI: * SSDT
1730 07:47:24.615102 Found 1 CPU(s) with 8 core(s) each.
1731 07:47:24.618956 Error: Could not locate 'wifi_sar' in VPD.
1732 07:47:24.625592 Checking CBFS for default SAR values
1733 07:47:24.628797 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 07:47:24.632033 CBFS @ c08000 size 3f8000
1735 07:47:24.638332 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 07:47:24.641948 CBFS: Locating 'wifi_sar_defaults.hex'
1737 07:47:24.645165 CBFS: Found @ offset 5fac0 size 77
1738 07:47:24.648379 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 07:47:24.655408 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 07:47:24.658621 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 07:47:24.664796 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 07:47:24.668023 failed to find key in VPD: dsm_calib_r0_0
1743 07:47:24.678285 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 07:47:24.681234 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 07:47:24.684889 failed to find key in VPD: dsm_calib_r0_1
1746 07:47:24.694829 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 07:47:24.701178 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 07:47:24.704628 failed to find key in VPD: dsm_calib_r0_2
1749 07:47:24.714505 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 07:47:24.717707 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 07:47:24.724538 failed to find key in VPD: dsm_calib_r0_3
1752 07:47:24.731099 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 07:47:24.737500 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 07:47:24.740825 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 07:47:24.744093 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 07:47:24.748336 EC returned error result code 1
1757 07:47:24.751998 EC returned error result code 1
1758 07:47:24.755945 EC returned error result code 1
1759 07:47:24.762436 PS2K: Bad resp from EC. Vivaldi disabled!
1760 07:47:24.765850 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 07:47:24.772586 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 07:47:24.779266 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 07:47:24.782490 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 07:47:24.789125 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 07:47:24.795452 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 07:47:24.802283 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 07:47:24.805282 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 07:47:24.808978 ACPI: added table 2/32, length now 44
1769 07:47:24.812043 ACPI: * MCFG
1770 07:47:24.815694 ACPI: added table 3/32, length now 48
1771 07:47:24.818563 ACPI: * TPM2
1772 07:47:24.821864 TPM2 log created at 99a2d000
1773 07:47:24.825608 ACPI: added table 4/32, length now 52
1774 07:47:24.825732 ACPI: * MADT
1775 07:47:24.828498 SCI is IRQ9
1776 07:47:24.832024 ACPI: added table 5/32, length now 56
1777 07:47:24.832118 current = 99b43ac0
1778 07:47:24.835282 ACPI: * DMAR
1779 07:47:24.838724 ACPI: added table 6/32, length now 60
1780 07:47:24.842092 ACPI: * IGD OpRegion
1781 07:47:24.842212 GMA: Found VBT in CBFS
1782 07:47:24.845282 GMA: Found valid VBT in CBFS
1783 07:47:24.848558 ACPI: added table 7/32, length now 64
1784 07:47:24.851948 ACPI: * HPET
1785 07:47:24.855086 ACPI: added table 8/32, length now 68
1786 07:47:24.855175 ACPI: done.
1787 07:47:24.858668 ACPI tables: 31744 bytes.
1788 07:47:24.862421 smbios_write_tables: 99a2c000
1789 07:47:24.865685 EC returned error result code 3
1790 07:47:24.868896 Couldn't obtain OEM name from CBI
1791 07:47:24.872092 Create SMBIOS type 17
1792 07:47:24.875183 PCI: 00:00.0 (Intel Cannonlake)
1793 07:47:24.878834 PCI: 00:14.3 (Intel WiFi)
1794 07:47:24.882113 SMBIOS tables: 939 bytes.
1795 07:47:24.885423 Writing table forward entry at 0x00000500
1796 07:47:24.892044 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 07:47:24.895233 Writing coreboot table at 0x99b62000
1798 07:47:24.901706 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 07:47:24.905480 1. 0000000000001000-000000000009ffff: RAM
1800 07:47:24.908775 2. 00000000000a0000-00000000000fffff: RESERVED
1801 07:47:24.914904 3. 0000000000100000-0000000099a2bfff: RAM
1802 07:47:24.918504 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 07:47:24.924991 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 07:47:24.931604 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 07:47:24.934972 7. 000000009a000000-000000009f7fffff: RESERVED
1806 07:47:24.941734 8. 00000000e0000000-00000000efffffff: RESERVED
1807 07:47:24.944686 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 07:47:24.948203 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 07:47:24.954841 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 07:47:24.958158 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 07:47:24.964569 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 07:47:24.968165 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 07:47:24.971109 15. 0000000100000000-000000045e7fffff: RAM
1814 07:47:24.978458 Graphics framebuffer located at 0xc0000000
1815 07:47:24.981621 Passing 5 GPIOs to payload:
1816 07:47:24.984591 NAME | PORT | POLARITY | VALUE
1817 07:47:24.991013 write protect | undefined | high | low
1818 07:47:24.994267 lid | undefined | high | high
1819 07:47:25.001154 power | undefined | high | low
1820 07:47:25.007607 oprom | undefined | high | low
1821 07:47:25.011030 EC in RW | 0x000000cb | high | low
1822 07:47:25.014167 Board ID: 4
1823 07:47:25.018037 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 07:47:25.021032 CBFS @ c08000 size 3f8000
1825 07:47:25.027753 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 07:47:25.030780 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 07:47:25.034360 coreboot table: 1492 bytes.
1828 07:47:25.037462 IMD ROOT 0. 99fff000 00001000
1829 07:47:25.040680 IMD SMALL 1. 99ffe000 00001000
1830 07:47:25.044008 FSP MEMORY 2. 99c4e000 003b0000
1831 07:47:25.047243 CONSOLE 3. 99c2e000 00020000
1832 07:47:25.050787 FMAP 4. 99c2d000 0000054e
1833 07:47:25.054360 TIME STAMP 5. 99c2c000 00000910
1834 07:47:25.057742 VBOOT WORK 6. 99c18000 00014000
1835 07:47:25.061005 MRC DATA 7. 99c16000 00001958
1836 07:47:25.064165 ROMSTG STCK 8. 99c15000 00001000
1837 07:47:25.067319 AFTER CAR 9. 99c0b000 0000a000
1838 07:47:25.070555 RAMSTAGE 10. 99baf000 0005c000
1839 07:47:25.073956 REFCODE 11. 99b7a000 00035000
1840 07:47:25.077573 SMM BACKUP 12. 99b6a000 00010000
1841 07:47:25.080815 COREBOOT 13. 99b62000 00008000
1842 07:47:25.084067 ACPI 14. 99b3e000 00024000
1843 07:47:25.087575 ACPI GNVS 15. 99b3d000 00001000
1844 07:47:25.091143 RAMOOPS 16. 99a3d000 00100000
1845 07:47:25.094201 TPM2 TCGLOG17. 99a2d000 00010000
1846 07:47:25.097553 SMBIOS 18. 99a2c000 00000800
1847 07:47:25.100964 IMD small region:
1848 07:47:25.104056 IMD ROOT 0. 99ffec00 00000400
1849 07:47:25.107189 FSP RUNTIME 1. 99ffebe0 00000004
1850 07:47:25.110578 EC HOSTEVENT 2. 99ffebc0 00000008
1851 07:47:25.113904 POWER STATE 3. 99ffeb80 00000040
1852 07:47:25.117118 ROMSTAGE 4. 99ffeb60 00000004
1853 07:47:25.120469 MEM INFO 5. 99ffe9a0 000001b9
1854 07:47:25.124152 VPD 6. 99ffe920 0000006c
1855 07:47:25.127791 MTRR: Physical address space:
1856 07:47:25.133877 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 07:47:25.140281 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 07:47:25.147287 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 07:47:25.153678 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 07:47:25.160494 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 07:47:25.163742 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 07:47:25.170139 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 07:47:25.177346 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 07:47:25.180562 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 07:47:25.183800 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 07:47:25.186870 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 07:47:25.193590 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 07:47:25.196995 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 07:47:25.200064 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 07:47:25.203794 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 07:47:25.206570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 07:47:25.213350 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 07:47:25.216494 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 07:47:25.220324 call enable_fixed_mtrr()
1875 07:47:25.223472 CPU physical address size: 39 bits
1876 07:47:25.226841 MTRR: default type WB/UC MTRR counts: 6/8.
1877 07:47:25.230059 MTRR: WB selected as default type.
1878 07:47:25.236924 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 07:47:25.242916 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 07:47:25.249636 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 07:47:25.256753 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 07:47:25.262977 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 07:47:25.269943 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 07:47:25.273256 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 07:47:25.276651 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 07:47:25.282988 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 07:47:25.286177 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 07:47:25.289364 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 07:47:25.292571 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 07:47:25.299267 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 07:47:25.302513 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 07:47:25.306127 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 07:47:25.309273 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 07:47:25.315711 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 07:47:25.315841
1896 07:47:25.315948 MTRR check
1897 07:47:25.319727 Fixed MTRRs : Enabled
1898 07:47:25.322771 Variable MTRRs: Enabled
1899 07:47:25.322892
1900 07:47:25.322995 call enable_fixed_mtrr()
1901 07:47:25.328947 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 07:47:25.332665 CPU physical address size: 39 bits
1903 07:47:25.338963 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 07:47:25.342294 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 07:47:25.345440 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 07:47:25.349092 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 07:47:25.355963 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 07:47:25.358815 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 07:47:25.362022 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 07:47:25.365339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 07:47:25.372043 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 07:47:25.375228 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 07:47:25.378533 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 07:47:25.382445 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 07:47:25.385788 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 07:47:25.392220 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 07:47:25.395509 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 07:47:25.398756 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 07:47:25.405235 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 07:47:25.408601 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 07:47:25.412391 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 07:47:25.415625 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 07:47:25.418925 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 07:47:25.425248 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 07:47:25.428372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 07:47:25.431689 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 07:47:25.435270 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 07:47:25.441809 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 07:47:25.441980 call enable_fixed_mtrr()
1930 07:47:25.448328 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 07:47:25.451755 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 07:47:25.455195 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 07:47:25.458506 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 07:47:25.465164 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 07:47:25.468534 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 07:47:25.471564 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 07:47:25.475293 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 07:47:25.481773 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 07:47:25.485164 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 07:47:25.488319 CPU physical address size: 39 bits
1941 07:47:25.491598 call enable_fixed_mtrr()
1942 07:47:25.494690 CBFS @ c08000 size 3f8000
1943 07:47:25.498073 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1944 07:47:25.501300 call enable_fixed_mtrr()
1945 07:47:25.504543 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 07:47:25.508454 CPU physical address size: 39 bits
1947 07:47:25.514931 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 07:47:25.518161 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 07:47:25.521561 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 07:47:25.524830 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 07:47:25.531218 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 07:47:25.534412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 07:47:25.537788 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 07:47:25.541524 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 07:47:25.544507 CPU physical address size: 39 bits
1956 07:47:25.547817 call enable_fixed_mtrr()
1957 07:47:25.550852 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 07:47:25.557465 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 07:47:25.561243 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 07:47:25.564205 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 07:47:25.567734 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 07:47:25.573936 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 07:47:25.577889 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 07:47:25.580820 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 07:47:25.584186 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 07:47:25.590742 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 07:47:25.594145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 07:47:25.597559 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 07:47:25.601151 call enable_fixed_mtrr()
1970 07:47:25.604077 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 07:47:25.607474 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 07:47:25.613907 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 07:47:25.617692 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 07:47:25.620807 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 07:47:25.624121 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 07:47:25.630558 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 07:47:25.633933 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 07:47:25.636998 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 07:47:25.640725 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 07:47:25.643980 CPU physical address size: 39 bits
1981 07:47:25.647254 call enable_fixed_mtrr()
1982 07:47:25.650271 CBFS: Locating 'fallback/payload'
1983 07:47:25.653942 CPU physical address size: 39 bits
1984 07:47:25.657069 CPU physical address size: 39 bits
1985 07:47:25.663577 CBFS: Found @ offset 1c96c0 size 3f798
1986 07:47:25.666684 Checking segment from ROM address 0xffdd16f8
1987 07:47:25.670121 Checking segment from ROM address 0xffdd1714
1988 07:47:25.677152 Loading segment from ROM address 0xffdd16f8
1989 07:47:25.677270 code (compression=0)
1990 07:47:25.686639 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 07:47:25.693543 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 07:47:25.696705 it's not compressed!
1993 07:47:25.789450 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 07:47:25.796180 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 07:47:25.799439 Loading segment from ROM address 0xffdd1714
1996 07:47:25.802723 Entry Point 0x30000000
1997 07:47:25.805855 Loaded segments
1998 07:47:25.811565 Finalizing chipset.
1999 07:47:25.814820 Finalizing SMM.
2000 07:47:25.818169 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 07:47:25.821816 mp_park_aps done after 0 msecs.
2002 07:47:25.828283 Jumping to boot code at 30000000(99b62000)
2003 07:47:25.834588 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 07:47:25.834727
2005 07:47:25.834834
2006 07:47:25.834934
2007 07:47:25.837915 Starting depthcharge on Helios...
2008 07:47:25.838036
2009 07:47:25.838472 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 07:47:25.838616 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 07:47:25.838738 Setting prompt string to ['hatch:']
2012 07:47:25.838858 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 07:47:25.848108 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 07:47:25.848202
2015 07:47:25.854370 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 07:47:25.854465
2017 07:47:25.861393 board_setup: Info: eMMC controller not present; skipping
2018 07:47:25.861487
2019 07:47:25.864388 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 07:47:25.864482
2021 07:47:25.871003 board_setup: Info: SDHCI controller not present; skipping
2022 07:47:25.871096
2023 07:47:25.874723 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 07:47:25.877995
2025 07:47:25.878087 Wipe memory regions:
2026 07:47:25.878160
2027 07:47:25.881226 [0x00000000001000, 0x000000000a0000)
2028 07:47:25.881318
2029 07:47:25.884471 [0x00000000100000, 0x00000030000000)
2030 07:47:25.950456
2031 07:47:25.954144 [0x00000030657430, 0x00000099a2c000)
2032 07:47:26.100225
2033 07:47:26.103667 [0x00000100000000, 0x0000045e800000)
2034 07:47:27.560489
2035 07:47:27.560637 R8152: Initializing
2036 07:47:27.560714
2037 07:47:27.563659 Version 9 (ocp_data = 6010)
2038 07:47:27.568100
2039 07:47:27.568197 R8152: Done initializing
2040 07:47:27.568285
2041 07:47:27.571200 Adding net device
2042 07:47:28.054228
2043 07:47:28.054371 R8152: Initializing
2044 07:47:28.054448
2045 07:47:28.057183 Version 6 (ocp_data = 5c30)
2046 07:47:28.057276
2047 07:47:28.060362 R8152: Done initializing
2048 07:47:28.060456
2049 07:47:28.064042 net_add_device: Attemp to include the same device
2050 07:47:28.067360
2051 07:47:28.074269 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 07:47:28.074364
2053 07:47:28.074436
2054 07:47:28.074503
2055 07:47:28.074793 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 07:47:28.175164 hatch: tftpboot 192.168.201.1 12435185/tftp-deploy-myngupq8/kernel/bzImage 12435185/tftp-deploy-myngupq8/kernel/cmdline 12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
2058 07:47:28.175347 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 07:47:28.175442 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 07:47:28.179981 tftpboot 192.168.201.1 12435185/tftp-deploy-myngupq8/kernel/bzIploy-myngupq8/kernel/cmdline 12435185/tftp-deploy-myngupq8/ramdisk/ramdisk.cpio.gz
2061 07:47:28.180082
2062 07:47:28.180155 Waiting for link
2063 07:47:28.380708
2064 07:47:28.380842 done.
2065 07:47:28.380916
2066 07:47:28.380984 MAC: 00:24:32:50:1a:59
2067 07:47:28.381049
2068 07:47:28.384467 Sending DHCP discover... done.
2069 07:47:28.384564
2070 07:47:28.387681 Waiting for reply... done.
2071 07:47:28.387773
2072 07:47:28.390913 Sending DHCP request... done.
2073 07:47:28.391009
2074 07:47:28.405192 Waiting for reply... done.
2075 07:47:28.405307
2076 07:47:28.405382 My ip is 192.168.201.14
2077 07:47:28.405450
2078 07:47:28.408329 The DHCP server ip is 192.168.201.1
2079 07:47:28.411275
2080 07:47:28.414879 TFTP server IP predefined by user: 192.168.201.1
2081 07:47:28.415002
2082 07:47:28.421417 Bootfile predefined by user: 12435185/tftp-deploy-myngupq8/kernel/bzImage
2083 07:47:28.421538
2084 07:47:28.424767 Sending tftp read request... done.
2085 07:47:28.424889
2086 07:47:28.431306 Waiting for the transfer...
2087 07:47:28.431411
2088 07:47:28.974959 00000000 ################################################################
2089 07:47:28.975109
2090 07:47:29.523872 00080000 ################################################################
2091 07:47:29.524042
2092 07:47:30.050515 00100000 ################################################################
2093 07:47:30.050675
2094 07:47:30.563112 00180000 ################################################################
2095 07:47:30.563272
2096 07:47:31.088448 00200000 ################################################################
2097 07:47:31.088656
2098 07:47:31.599952 00280000 ################################################################
2099 07:47:31.600151
2100 07:47:32.116998 00300000 ################################################################
2101 07:47:32.117204
2102 07:47:32.642493 00380000 ################################################################
2103 07:47:32.642683
2104 07:47:33.177224 00400000 ################################################################
2105 07:47:33.177384
2106 07:47:33.715448 00480000 ################################################################
2107 07:47:33.715628
2108 07:47:34.252985 00500000 ################################################################
2109 07:47:34.253154
2110 07:47:34.766212 00580000 ################################################################
2111 07:47:34.766367
2112 07:47:35.280835 00600000 ################################################################
2113 07:47:35.280999
2114 07:47:35.802047 00680000 ################################################################
2115 07:47:35.802204
2116 07:47:36.337928 00700000 ################################################################
2117 07:47:36.338084
2118 07:47:36.890812 00780000 ################################################################
2119 07:47:36.890993
2120 07:47:37.078948 00800000 ####################### done.
2121 07:47:37.079100
2122 07:47:37.082178 The bootfile was 8572816 bytes long.
2123 07:47:37.082271
2124 07:47:37.086094 Sending tftp read request... done.
2125 07:47:37.086188
2126 07:47:37.089330 Waiting for the transfer...
2127 07:47:37.089423
2128 07:47:37.643495 00000000 ################################################################
2129 07:47:37.643646
2130 07:47:38.183775 00080000 ################################################################
2131 07:47:38.183922
2132 07:47:38.726851 00100000 ################################################################
2133 07:47:38.726999
2134 07:47:39.265997 00180000 ################################################################
2135 07:47:39.266177
2136 07:47:39.806981 00200000 ################################################################
2137 07:47:39.807129
2138 07:47:40.366281 00280000 ################################################################
2139 07:47:40.366428
2140 07:47:40.918943 00300000 ################################################################
2141 07:47:40.919091
2142 07:47:41.459912 00380000 ################################################################
2143 07:47:41.460067
2144 07:47:41.992930 00400000 ################################################################
2145 07:47:41.993089
2146 07:47:42.561569 00480000 ################################################################
2147 07:47:42.561732
2148 07:47:43.094233 00500000 ############################################################### done.
2149 07:47:43.094456
2150 07:47:43.097672 Sending tftp read request... done.
2151 07:47:43.097772
2152 07:47:43.100837 Waiting for the transfer...
2153 07:47:43.100934
2154 07:47:43.101007 00000000 # done.
2155 07:47:43.101077
2156 07:47:43.110763 Command line loaded dynamically from TFTP file: 12435185/tftp-deploy-myngupq8/kernel/cmdline
2157 07:47:43.110946
2158 07:47:43.140226 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435185/extract-nfsrootfs-h7ix86tx,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 07:47:43.140390
2160 07:47:43.143964 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 07:47:43.149515
2162 07:47:43.153215 Shutting down all USB controllers.
2163 07:47:43.153302
2164 07:47:43.153372 Removing current net device
2165 07:47:43.156991
2166 07:47:43.157082 Finalizing coreboot
2167 07:47:43.157157
2168 07:47:43.163848 Exiting depthcharge with code 4 at timestamp: 24649526
2169 07:47:43.163985
2170 07:47:43.164103
2171 07:47:43.164223 Starting kernel ...
2172 07:47:43.164318
2173 07:47:43.164398
2174 07:47:43.164898 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2175 07:47:43.165061 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2176 07:47:43.165199 Setting prompt string to ['Linux version [0-9]']
2177 07:47:43.165325 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 07:47:43.165453 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 07:52:08.165987 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2182 07:52:08.167065 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2184 07:52:08.167854 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 07:52:08.169339 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 07:52:08.170761 Cleaning after the job
2190 07:52:08.171218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/ramdisk
2191 07:52:08.175940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/kernel
2192 07:52:08.182349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/nfsrootfs
2193 07:52:08.287726 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435185/tftp-deploy-myngupq8/modules
2194 07:52:08.288229 start: 5.1 power-off (timeout 00:00:30) [common]
2195 07:52:08.288437 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2196 07:52:08.369203 >> Command sent successfully.
2197 07:52:08.376134 Returned 0 in 0 seconds
2198 07:52:08.477328 end: 5.1 power-off (duration 00:00:00) [common]
2200 07:52:08.478746 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 07:52:08.479934 Listened to connection for namespace 'common' for up to 1s
2203 07:52:08.481276 Listened to connection for namespace 'common' for up to 1s
2204 07:52:09.480540 Finalising connection for namespace 'common'
2205 07:52:09.481172 Disconnecting from shell: Finalise
2206 07:52:09.481544
2207 07:52:09.582558 end: 5.2 read-feedback (duration 00:00:01) [common]
2208 07:52:09.583251 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435185
2209 07:52:09.956552 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435185
2210 07:52:09.956761 JobError: Your job cannot terminate cleanly.