Boot log: dell-latitude-5400-4305U-sarien
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:55.183839 lava-dispatcher, installed at version: 2023.10
2 07:40:55.184080 start: 0 validate
3 07:40:55.184225 Start time: 2024-01-03 07:40:55.184217+00:00 (UTC)
4 07:40:55.184369 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:55.184516 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:55.464216 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:55.464421 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:55.731730 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:55.732012 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:41:00.116943 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:41:00.117718 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:41:00.392715 validate duration: 5.21
14 07:41:00.393955 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:41:00.394472 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:41:00.394938 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:41:00.395526 Not decompressing ramdisk as can be used compressed.
18 07:41:00.395993 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 07:41:00.396377 saving as /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/ramdisk/initrd.cpio.gz
20 07:41:00.396712 total size: 5432690 (5 MB)
21 07:41:00.912856 progress 0 % (0 MB)
22 07:41:00.916422 progress 5 % (0 MB)
23 07:41:00.919295 progress 10 % (0 MB)
24 07:41:00.922210 progress 15 % (0 MB)
25 07:41:00.925564 progress 20 % (1 MB)
26 07:41:00.928544 progress 25 % (1 MB)
27 07:41:00.931427 progress 30 % (1 MB)
28 07:41:00.934639 progress 35 % (1 MB)
29 07:41:00.937474 progress 40 % (2 MB)
30 07:41:00.940289 progress 45 % (2 MB)
31 07:41:00.943018 progress 50 % (2 MB)
32 07:41:00.945717 progress 55 % (2 MB)
33 07:41:00.948049 progress 60 % (3 MB)
34 07:41:00.950177 progress 65 % (3 MB)
35 07:41:00.952456 progress 70 % (3 MB)
36 07:41:00.954292 progress 75 % (3 MB)
37 07:41:00.956123 progress 80 % (4 MB)
38 07:41:00.957895 progress 85 % (4 MB)
39 07:41:00.959752 progress 90 % (4 MB)
40 07:41:00.961442 progress 95 % (4 MB)
41 07:41:00.963131 progress 100 % (5 MB)
42 07:41:00.963403 5 MB downloaded in 0.57 s (9.14 MB/s)
43 07:41:00.963582 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:41:00.963858 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:41:00.963969 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:41:00.964098 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:41:00.964288 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:41:00.964371 saving as /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/kernel/bzImage
50 07:41:00.964439 total size: 8572816 (8 MB)
51 07:41:00.964506 No compression specified
52 07:41:00.965739 progress 0 % (0 MB)
53 07:41:00.968422 progress 5 % (0 MB)
54 07:41:00.971066 progress 10 % (0 MB)
55 07:41:00.973682 progress 15 % (1 MB)
56 07:41:00.976227 progress 20 % (1 MB)
57 07:41:00.978867 progress 25 % (2 MB)
58 07:41:00.981610 progress 30 % (2 MB)
59 07:41:00.984341 progress 35 % (2 MB)
60 07:41:00.986922 progress 40 % (3 MB)
61 07:41:00.989597 progress 45 % (3 MB)
62 07:41:00.992324 progress 50 % (4 MB)
63 07:41:00.995002 progress 55 % (4 MB)
64 07:41:00.997617 progress 60 % (4 MB)
65 07:41:01.000386 progress 65 % (5 MB)
66 07:41:01.003015 progress 70 % (5 MB)
67 07:41:01.005611 progress 75 % (6 MB)
68 07:41:01.008321 progress 80 % (6 MB)
69 07:41:01.010963 progress 85 % (6 MB)
70 07:41:01.013625 progress 90 % (7 MB)
71 07:41:01.016307 progress 95 % (7 MB)
72 07:41:01.018968 progress 100 % (8 MB)
73 07:41:01.019213 8 MB downloaded in 0.05 s (149.27 MB/s)
74 07:41:01.019424 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:41:01.019839 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:41:01.019969 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:41:01.020101 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:41:01.020292 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 07:41:01.020370 saving as /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/nfsrootfs/full.rootfs.tar
81 07:41:01.020439 total size: 133380384 (127 MB)
82 07:41:01.020508 Using unxz to decompress xz
83 07:41:01.035907 progress 0 % (0 MB)
84 07:41:01.426384 progress 5 % (6 MB)
85 07:41:01.825061 progress 10 % (12 MB)
86 07:41:02.154461 progress 15 % (19 MB)
87 07:41:02.362566 progress 20 % (25 MB)
88 07:41:02.636585 progress 25 % (31 MB)
89 07:41:03.033664 progress 30 % (38 MB)
90 07:41:03.429008 progress 35 % (44 MB)
91 07:41:03.893290 progress 40 % (50 MB)
92 07:41:04.325684 progress 45 % (57 MB)
93 07:41:04.729639 progress 50 % (63 MB)
94 07:41:05.158551 progress 55 % (69 MB)
95 07:41:05.567581 progress 60 % (76 MB)
96 07:41:05.978896 progress 65 % (82 MB)
97 07:41:06.392703 progress 70 % (89 MB)
98 07:41:06.808369 progress 75 % (95 MB)
99 07:41:07.356742 progress 80 % (101 MB)
100 07:41:07.867851 progress 85 % (108 MB)
101 07:41:08.179236 progress 90 % (114 MB)
102 07:41:08.601090 progress 95 % (120 MB)
103 07:41:09.058828 progress 100 % (127 MB)
104 07:41:09.065470 127 MB downloaded in 8.05 s (15.81 MB/s)
105 07:41:09.065816 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:41:09.066119 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:41:09.066223 start: 1.4 download-retry (timeout 00:09:51) [common]
109 07:41:09.066320 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 07:41:09.066490 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:41:09.066572 saving as /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/modules/modules.tar
112 07:41:09.066668 total size: 251144 (0 MB)
113 07:41:09.066787 Using unxz to decompress xz
114 07:41:09.071159 progress 13 % (0 MB)
115 07:41:09.071648 progress 26 % (0 MB)
116 07:41:09.071946 progress 39 % (0 MB)
117 07:41:09.073692 progress 52 % (0 MB)
118 07:41:09.075908 progress 65 % (0 MB)
119 07:41:09.078070 progress 78 % (0 MB)
120 07:41:09.080081 progress 91 % (0 MB)
121 07:41:09.082335 progress 100 % (0 MB)
122 07:41:09.088566 0 MB downloaded in 0.02 s (10.94 MB/s)
123 07:41:09.088831 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:41:09.089129 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:41:09.089235 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 07:41:09.089340 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 07:41:11.573716 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435150/extract-nfsrootfs-yu1t7ytc
129 07:41:11.573931 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 07:41:11.574048 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 07:41:11.574235 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5
132 07:41:11.574387 makedir: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin
133 07:41:11.574505 makedir: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/tests
134 07:41:11.574619 makedir: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/results
135 07:41:11.574733 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-add-keys
136 07:41:11.574897 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-add-sources
137 07:41:11.575047 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-background-process-start
138 07:41:11.575202 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-background-process-stop
139 07:41:11.575346 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-common-functions
140 07:41:11.575490 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-echo-ipv4
141 07:41:11.575632 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-install-packages
142 07:41:11.575775 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-installed-packages
143 07:41:11.575916 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-os-build
144 07:41:11.576059 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-probe-channel
145 07:41:11.576200 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-probe-ip
146 07:41:11.576577 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-target-ip
147 07:41:11.576728 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-target-mac
148 07:41:11.576877 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-target-storage
149 07:41:11.577024 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-case
150 07:41:11.577172 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-event
151 07:41:11.577323 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-feedback
152 07:41:11.577479 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-raise
153 07:41:11.577632 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-reference
154 07:41:11.577786 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-runner
155 07:41:11.577939 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-set
156 07:41:11.578091 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-test-shell
157 07:41:11.578244 Updating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-install-packages (oe)
158 07:41:11.578428 Updating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/bin/lava-installed-packages (oe)
159 07:41:11.578577 Creating /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/environment
160 07:41:11.578694 LAVA metadata
161 07:41:11.578780 - LAVA_JOB_ID=12435150
162 07:41:11.578857 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:41:11.578973 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 07:41:11.579051 skipped lava-vland-overlay
165 07:41:11.579137 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:41:11.579228 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 07:41:11.579303 skipped lava-multinode-overlay
168 07:41:11.579387 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:41:11.579477 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 07:41:11.579560 Loading test definitions
171 07:41:11.579664 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 07:41:11.579749 Using /lava-12435150 at stage 0
173 07:41:11.580235 uuid=12435150_1.5.2.3.1 testdef=None
174 07:41:11.580350 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 07:41:11.580448 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 07:41:11.581017 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 07:41:11.581267 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 07:41:11.581988 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 07:41:11.582241 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 07:41:11.582940 runner path: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/0/tests/0_dmesg test_uuid 12435150_1.5.2.3.1
183 07:41:11.583115 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 07:41:11.583363 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 07:41:11.583444 Using /lava-12435150 at stage 1
187 07:41:11.583781 uuid=12435150_1.5.2.3.5 testdef=None
188 07:41:11.583879 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 07:41:11.583974 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 07:41:11.584566 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 07:41:11.584807 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 07:41:11.585535 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 07:41:11.585787 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 07:41:11.586487 runner path: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/1/tests/1_bootrr test_uuid 12435150_1.5.2.3.5
197 07:41:11.586659 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 07:41:11.586887 Creating lava-test-runner.conf files
200 07:41:11.586958 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/0 for stage 0
201 07:41:11.587060 - 0_dmesg
202 07:41:11.587149 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435150/lava-overlay-rmu940i5/lava-12435150/1 for stage 1
203 07:41:11.587252 - 1_bootrr
204 07:41:11.587359 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 07:41:11.587453 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 07:41:11.595745 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 07:41:11.595872 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 07:41:11.596005 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 07:41:11.596106 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 07:41:11.596204 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 07:41:11.754304 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 07:41:11.754737 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 07:41:11.754878 extracting modules file /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435150/extract-nfsrootfs-yu1t7ytc
214 07:41:11.770183 extracting modules file /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435150/extract-overlay-ramdisk-mz0n6sub/ramdisk
215 07:41:11.785135 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 07:41:11.785268 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 07:41:11.785367 [common] Applying overlay to NFS
218 07:41:11.785445 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435150/compress-overlay-j8fguxty/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435150/extract-nfsrootfs-yu1t7ytc
219 07:41:11.794580 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 07:41:11.794704 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 07:41:11.794808 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 07:41:11.794909 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 07:41:11.794993 Building ramdisk /var/lib/lava/dispatcher/tmp/12435150/extract-overlay-ramdisk-mz0n6sub/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435150/extract-overlay-ramdisk-mz0n6sub/ramdisk
224 07:41:11.874098 >> 26162 blocks
225 07:41:12.497507 rename /var/lib/lava/dispatcher/tmp/12435150/extract-overlay-ramdisk-mz0n6sub/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
226 07:41:12.498006 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 07:41:12.498153 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 07:41:12.498267 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 07:41:12.498375 No mkimage arch provided, not using FIT.
230 07:41:12.498474 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 07:41:12.498572 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 07:41:12.498710 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 07:41:12.498864 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 07:41:12.498962 No LXC device requested
235 07:41:12.499058 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 07:41:12.499160 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 07:41:12.499254 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 07:41:12.499340 Checking files for TFTP limit of 4294967296 bytes.
239 07:41:12.499797 end: 1 tftp-deploy (duration 00:00:12) [common]
240 07:41:12.499919 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 07:41:12.500020 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 07:41:12.500157 substitutions:
243 07:41:12.500230 - {DTB}: None
244 07:41:12.500314 - {INITRD}: 12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
245 07:41:12.500384 - {KERNEL}: 12435150/tftp-deploy-lr6el52g/kernel/bzImage
246 07:41:12.500450 - {LAVA_MAC}: None
247 07:41:12.500515 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435150/extract-nfsrootfs-yu1t7ytc
248 07:41:12.500580 - {NFS_SERVER_IP}: 192.168.201.1
249 07:41:12.500644 - {PRESEED_CONFIG}: None
250 07:41:12.500705 - {PRESEED_LOCAL}: None
251 07:41:12.500767 - {RAMDISK}: 12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
252 07:41:12.500829 - {ROOT_PART}: None
253 07:41:12.500889 - {ROOT}: None
254 07:41:12.500950 - {SERVER_IP}: 192.168.201.1
255 07:41:12.501012 - {TEE}: None
256 07:41:12.501073 Parsed boot commands:
257 07:41:12.501133 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 07:41:12.501329 Parsed boot commands: tftpboot 192.168.201.1 12435150/tftp-deploy-lr6el52g/kernel/bzImage 12435150/tftp-deploy-lr6el52g/kernel/cmdline 12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
259 07:41:12.501431 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 07:41:12.501531 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 07:41:12.501640 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 07:41:12.501734 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 07:41:12.501812 Not connected, no need to disconnect.
264 07:41:12.501894 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 07:41:12.501989 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 07:41:12.502063 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-1'
267 07:41:12.506163 Setting prompt string to ['lava-test: # ']
268 07:41:12.506586 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 07:41:12.506708 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 07:41:12.506817 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 07:41:12.506918 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 07:41:12.507138 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
273 07:41:29.383275 >> Command sent successfully.
274 07:41:29.386007 Returned 0 in 16 seconds
275 07:41:29.486421 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
277 07:41:29.486910 end: 2.2.2 reset-device (duration 00:00:17) [common]
278 07:41:29.487074 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
279 07:41:29.487225 Setting prompt string to 'Starting depthcharge on sarien...'
280 07:41:29.487333 Changing prompt to 'Starting depthcharge on sarien...'
281 07:41:29.487420 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
282 07:41:29.487732 [Enter `^Ec?' for help]
283 07:41:29.487872
284 07:41:29.487984
285 07:41:29.488090 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
286 07:41:29.488193 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
287 07:41:29.488307 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
288 07:41:29.488407 CPU: AES supported, TXT NOT supported, VT supported
289 07:41:29.488491 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
290 07:41:29.488557 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
291 07:41:29.488649 IGD: device id 3ea1 (rev 02) is Unknown
292 07:41:29.488756 VBOOT: Loading verstage.
293 07:41:29.488865 CBFS @ 1d00000 size 300000
294 07:41:29.488980 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
295 07:41:29.489101 CBFS: Locating 'fallback/verstage'
296 07:41:29.489212 CBFS: Found @ offset 10f6c0 size 1435c
297 07:41:29.489313
298 07:41:29.489408
299 07:41:29.489509 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
300 07:41:29.489609 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
301 07:41:29.489704 done! DID_VID 0x00281ae0
302 07:41:29.489798 TPM ready after 0 ms
303 07:41:29.489897 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
304 07:41:29.490000 tlcl_send_startup: Startup return code is 0
305 07:41:29.490115 TPM: setup succeeded
306 07:41:29.490219 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
307 07:41:29.490329 Checking cr50 for recovery request
308 07:41:29.490439 Phase 1
309 07:41:29.490541 FMAP: Found "FLASH" version 1.1 at 1c10000.
310 07:41:29.490637 FMAP: base = fe000000 size = 2000000 #areas = 37
311 07:41:29.490737 FMAP: area GBB found @ 1c11000 (978944 bytes)
312 07:41:29.490843 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
313 07:41:29.490957 Phase 2
314 07:41:29.491054 Phase 3
315 07:41:29.491167 FMAP: area GBB found @ 1c11000 (978944 bytes)
316 07:41:29.491264 VB2:vb2_report_dev_firmware() This is developer signed firmware
317 07:41:29.491356 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
318 07:41:29.491420 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
319 07:41:29.491481 VB2:vb2_verify_keyblock() Checking key block signature...
320 07:41:29.491542 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
321 07:41:29.491602 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
322 07:41:29.491662 VB2:vb2_verify_fw_preamble() Verifying preamble.
323 07:41:29.491726 Phase 4
324 07:41:29.491787 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
325 07:41:29.491857 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
326 07:41:29.491983 VB2:vb2_rsa_verify_digest() Digest check failed!
327 07:41:29.492086 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
328 07:41:29.492185 Saving nvdata
329 07:41:29.492290 Reboot requested (10020007)
330 07:41:29.492398 board_reset() called!
331 07:41:29.492493 full_reset() called!
332 07:41:33.706243
333 07:41:33.706878
334 07:41:33.715175 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
335 07:41:33.718769 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
336 07:41:33.723933 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
337 07:41:33.728623 CPU: AES supported, TXT NOT supported, VT supported
338 07:41:33.733963 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
339 07:41:33.739382 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
340 07:41:33.744026 IGD: device id 3ea1 (rev 02) is Unknown
341 07:41:33.747352 VBOOT: Loading verstage.
342 07:41:33.750116 CBFS @ 1d00000 size 300000
343 07:41:33.755546 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
344 07:41:33.759836 CBFS: Locating 'fallback/verstage'
345 07:41:33.763257 CBFS: Found @ offset 10f6c0 size 1435c
346 07:41:33.777704
347 07:41:33.778381
348 07:41:33.785584 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
349 07:41:33.793285 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
350 07:41:33.795454 done! DID_VID 0x00281ae0
351 07:41:33.797909 TPM ready after 0 ms
352 07:41:33.801493 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
353 07:41:33.905453 tlcl_send_startup: Startup return code is 0
354 07:41:33.908122 TPM: setup succeeded
355 07:41:33.925849 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
356 07:41:33.929599 Checking cr50 for recovery request
357 07:41:33.939819 Phase 1
358 07:41:33.943820 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 07:41:33.949258 FMAP: base = fe000000 size = 2000000 #areas = 37
360 07:41:33.953988 FMAP: area GBB found @ 1c11000 (978944 bytes)
361 07:41:33.961714 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 07:41:33.967805 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 07:41:33.970840 Recovery requested (1009000e)
364 07:41:33.971874 Saving nvdata
365 07:41:33.988303 tlcl_extend: response is 0
366 07:41:34.003940 tlcl_extend: response is 0
367 07:41:34.007619 CBFS @ 1d00000 size 300000
368 07:41:34.013977 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
369 07:41:34.018042 CBFS: Locating 'fallback/romstage'
370 07:41:34.021237 CBFS: Found @ offset 80 size 15b2c
371 07:41:34.022451
372 07:41:34.022543
373 07:41:34.030986 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
374 07:41:34.036117 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
375 07:41:34.040264 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 07:41:34.044377 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
377 07:41:34.048774 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 07:41:34.052536 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
379 07:41:34.055436 TCO_STS: 0000 0004
380 07:41:34.058523 GEN_PMCON: d0015209 00002200
381 07:41:34.060888 GBLRST_CAUSE: 00000000 00000000
382 07:41:34.063412 prev_sleep_state 5
383 07:41:34.066357 Boot Count incremented to 32457
384 07:41:34.069884 CBFS @ 1d00000 size 300000
385 07:41:34.076118 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 07:41:34.079274 CBFS: Locating 'fspm.bin'
387 07:41:34.082660 CBFS: Found @ offset 60fc0 size 70000
388 07:41:34.088736 FMAP: Found "FLASH" version 1.1 at 1c10000.
389 07:41:34.092556 FMAP: base = fe000000 size = 2000000 #areas = 37
390 07:41:34.098412 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
391 07:41:34.105132 Probing TPM I2C: done! DID_VID 0x00281ae0
392 07:41:34.108364 Locality already claimed
393 07:41:34.111461 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
394 07:41:34.130721 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
395 07:41:34.137589 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 07:41:34.140031 MRC cache found, size 18e0
397 07:41:34.142066 bootmode is set to :2
398 07:41:34.232222 CBMEM:
399 07:41:34.235160 IMD: root @ 89fff000 254 entries.
400 07:41:34.238676 IMD: root @ 89ffec00 62 entries.
401 07:41:34.241132 External stage cache:
402 07:41:34.245290 IMD: root @ 8abff000 254 entries.
403 07:41:34.247638 IMD: root @ 8abfec00 62 entries.
404 07:41:34.254399 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
405 07:41:34.257478 creating vboot_handoff structure
406 07:41:34.278691 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
407 07:41:34.293316 tlcl_write: response is 0
408 07:41:34.313698 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
409 07:41:34.317627 MRC: TPM MRC hash updated successfully.
410 07:41:34.318825 1 DIMMs found
411 07:41:34.321743 top_of_ram = 0x8a000000
412 07:41:34.327052 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
413 07:41:34.331169 MTRR Range: Start=ff000000 End=0 (Size 1000000)
414 07:41:34.333899 CBFS @ 1d00000 size 300000
415 07:41:34.340920 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
416 07:41:34.344176 CBFS: Locating 'fallback/postcar'
417 07:41:34.347651 CBFS: Found @ offset 107000 size 41a4
418 07:41:34.353371 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
419 07:41:34.364515 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
420 07:41:34.369008 Processing 126 relocs. Offset value of 0x87cdd000
421 07:41:34.372114
422 07:41:34.372207
423 07:41:34.380377 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
424 07:41:34.382806 CBFS @ 1d00000 size 300000
425 07:41:34.389422 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
426 07:41:34.392157 CBFS: Locating 'fallback/ramstage'
427 07:41:34.396569 CBFS: Found @ offset 458c0 size 1a8a8
428 07:41:34.402944 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
429 07:41:34.430425 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
430 07:41:34.434852 Processing 3754 relocs. Offset value of 0x88e81000
431 07:41:34.440816
432 07:41:34.441424
433 07:41:34.448982 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
434 07:41:34.454300 FMAP: Found "FLASH" version 1.1 at 1c10000.
435 07:41:34.459168 FMAP: base = fe000000 size = 2000000 #areas = 37
436 07:41:34.463900 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
437 07:41:34.467577 WARNING: RO_VPD is uninitialized or empty.
438 07:41:34.472354 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
439 07:41:34.477611 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
440 07:41:34.479120 Normal boot.
441 07:41:34.485493 BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1163
442 07:41:34.487897 CBFS @ 1d00000 size 300000
443 07:41:34.494564 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
444 07:41:34.498341 CBFS: Locating 'cpu_microcode_blob.bin'
445 07:41:34.501857 CBFS: Found @ offset 15c40 size 2fc00
446 07:41:34.506955 microcode: sig=0x806ec pf=0x80 revision=0xb7
447 07:41:34.508466 Skip microcode update
448 07:41:34.511221 CBFS @ 1d00000 size 300000
449 07:41:34.518527 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
450 07:41:34.521115 CBFS: Locating 'fsps.bin'
451 07:41:34.524467 CBFS: Found @ offset d1fc0 size 35000
452 07:41:34.558911 Detected 2 core, 2 thread CPU.
453 07:41:34.560773 Setting up SMI for CPU
454 07:41:34.563008 IED base = 0x8ac00000
455 07:41:34.565984 IED size = 0x00400000
456 07:41:34.568795 Will perform SMM setup.
457 07:41:34.573519 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
458 07:41:34.581408 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 07:41:34.585829 Processing 16 relocs. Offset value of 0x00030000
460 07:41:34.588932 Attempting to start 1 APs
461 07:41:34.592267 Waiting for 10ms after sending INIT.
462 07:41:34.606398 Waiting for 1st SIPI to complete...done.
463 07:41:34.608794 AP: slot 1 apic_id 2.
464 07:41:34.612006 Waiting for 2nd SIPI to complete...done.
465 07:41:34.620619 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 07:41:34.625634 Processing 13 relocs. Offset value of 0x00038000
467 07:41:34.632072 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
468 07:41:34.635964 Installing SMM handler to 0x8a000000
469 07:41:34.643389 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
470 07:41:34.648543 Processing 867 relocs. Offset value of 0x8a010000
471 07:41:34.657357 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
472 07:41:34.662023 Processing 13 relocs. Offset value of 0x8a008000
473 07:41:34.668196 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
474 07:41:34.674286 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
475 07:41:34.676907 Clearing SMI status registers
476 07:41:34.678941 SMI_STS: PM1
477 07:41:34.680866 PM1_STS: WAK PWRBTN
478 07:41:34.683175 TCO_STS: BOOT SECOND_TO
479 07:41:34.685539 GPE0 STD STS: eSPI
480 07:41:34.687532 New SMBASE 0x8a000000
481 07:41:34.691117 In relocation handler: CPU 0
482 07:41:34.695110 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
483 07:41:34.699108 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 07:41:34.701871 Relocation complete.
485 07:41:34.703939 New SMBASE 0x89fffc00
486 07:41:34.706611 In relocation handler: CPU 1
487 07:41:34.711347 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
488 07:41:34.715503 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 07:41:34.717991 Relocation complete.
490 07:41:34.720286 Initializing CPU #0
491 07:41:34.723846 CPU: vendor Intel device 806ec
492 07:41:34.727028 CPU: family 06, model 8e, stepping 0c
493 07:41:34.730142 Clearing out pending MCEs
494 07:41:34.734363 Setting up local APIC... apic_id: 0x00 done.
495 07:41:34.737641 Turbo is available but hidden
496 07:41:34.739616 Turbo has been enabled
497 07:41:34.742014 VMX status: enabled
498 07:41:34.745582 IA32_FEATURE_CONTROL status: locked
499 07:41:34.747420 Skip microcode update
500 07:41:34.750138 CPU #0 initialized
501 07:41:34.752126 Initializing CPU #1
502 07:41:34.755388 CPU: vendor Intel device 806ec
503 07:41:34.758657 CPU: family 06, model 8e, stepping 0c
504 07:41:34.761468 Clearing out pending MCEs
505 07:41:34.765798 Setting up local APIC... apic_id: 0x02 done.
506 07:41:34.767641 VMX status: enabled
507 07:41:34.771481 IA32_FEATURE_CONTROL status: locked
508 07:41:34.773658 Skip microcode update
509 07:41:34.776154 CPU #1 initialized
510 07:41:34.779790 bsp_do_flight_plan done after 163 msecs.
511 07:41:34.783698 CPU: frequency set to 2200 MHz
512 07:41:34.784938 Enabling SMIs.
513 07:41:34.786324 Locking SMM.
514 07:41:34.789159 CBFS @ 1d00000 size 300000
515 07:41:34.795564 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
516 07:41:34.797528 CBFS: Locating 'vbt.bin'
517 07:41:34.802443 CBFS: Found @ offset 60a40 size 4a0
518 07:41:34.807196 Found a VBT of 4608 bytes after decompression
519 07:41:34.820095 FMAP: area GBB found @ 1c11000 (978944 bytes)
520 07:41:34.936034 Detected 2 core, 2 thread CPU.
521 07:41:34.939468 Detected 2 core, 2 thread CPU.
522 07:41:35.167033 Display FSP Version Info HOB
523 07:41:35.169778 Reference Code - CPU = 7.0.5e.40
524 07:41:35.172356 uCode Version = 0.0.0.b8
525 07:41:35.175611 Display FSP Version Info HOB
526 07:41:35.178446 Reference Code - ME = 7.0.5e.40
527 07:41:35.181439 MEBx version = 0.0.0.0
528 07:41:35.184210 ME Firmware Version = Consumer SKU
529 07:41:35.186990 Display FSP Version Info HOB
530 07:41:35.191094 Reference Code - CNL PCH = 7.0.5e.40
531 07:41:35.193838 PCH-CRID Status = Disabled
532 07:41:35.197370 CNL PCH H A0 Hsio Version = 2.0.0.0
533 07:41:35.200797 CNL PCH H Ax Hsio Version = 9.0.0.0
534 07:41:35.204862 CNL PCH H Bx Hsio Version = a.0.0.0
535 07:41:35.208209 CNL PCH LP B0 Hsio Version = 7.0.0.0
536 07:41:35.212375 CNL PCH LP Bx Hsio Version = 6.0.0.0
537 07:41:35.216381 CNL PCH LP Dx Hsio Version = 7.0.0.0
538 07:41:35.219086 Display FSP Version Info HOB
539 07:41:35.223759 Reference Code - SA - System Agent = 7.0.5e.40
540 07:41:35.226389 Reference Code - MRC = 0.7.1.68
541 07:41:35.229073 SA - PCIe Version = 7.0.5e.40
542 07:41:35.232176 SA-CRID Status = Disabled
543 07:41:35.235369 SA-CRID Original Value = 0.0.0.c
544 07:41:35.238306 SA-CRID New Value = 0.0.0.c
545 07:41:35.256161 RTC Init
546 07:41:35.260841 Set power off after power failure.
547 07:41:35.261903 Disabling Deep S3
548 07:41:35.263821 Disabling Deep S3
549 07:41:35.266302 Disabling Deep S4
550 07:41:35.268412 Disabling Deep S4
551 07:41:35.269801 Disabling Deep S5
552 07:41:35.271814 Disabling Deep S5
553 07:41:35.277960 BS: BS_DEV_INIT_CHIPS times (us): entry 300713 run 469301 exit 16234
554 07:41:35.281053 Enumerating buses...
555 07:41:35.285482 Show all devs... Before device enumeration.
556 07:41:35.286967 Root Device: enabled 1
557 07:41:35.290645 CPU_CLUSTER: 0: enabled 1
558 07:41:35.291906 DOMAIN: 0000: enabled 1
559 07:41:35.294121 APIC: 00: enabled 1
560 07:41:35.296586 PCI: 00:00.0: enabled 1
561 07:41:35.299761 PCI: 00:02.0: enabled 1
562 07:41:35.301750 PCI: 00:04.0: enabled 1
563 07:41:35.304423 PCI: 00:12.0: enabled 1
564 07:41:35.306519 PCI: 00:12.5: enabled 0
565 07:41:35.309067 PCI: 00:12.6: enabled 0
566 07:41:35.311764 PCI: 00:13.0: enabled 0
567 07:41:35.313918 PCI: 00:14.0: enabled 1
568 07:41:35.316642 PCI: 00:14.1: enabled 0
569 07:41:35.319231 PCI: 00:14.3: enabled 1
570 07:41:35.321257 PCI: 00:14.5: enabled 0
571 07:41:35.323379 PCI: 00:15.0: enabled 1
572 07:41:35.325484 PCI: 00:15.1: enabled 1
573 07:41:35.328833 PCI: 00:15.2: enabled 0
574 07:41:35.331678 PCI: 00:15.3: enabled 0
575 07:41:35.333667 PCI: 00:16.0: enabled 1
576 07:41:35.335747 PCI: 00:16.1: enabled 0
577 07:41:35.337784 PCI: 00:16.2: enabled 0
578 07:41:35.340887 PCI: 00:16.3: enabled 0
579 07:41:35.343339 PCI: 00:16.4: enabled 0
580 07:41:35.345527 PCI: 00:16.5: enabled 0
581 07:41:35.347966 PCI: 00:17.0: enabled 1
582 07:41:35.350583 PCI: 00:19.0: enabled 1
583 07:41:35.353055 PCI: 00:19.1: enabled 0
584 07:41:35.354969 PCI: 00:19.2: enabled 1
585 07:41:35.357666 PCI: 00:1a.0: enabled 0
586 07:41:35.360662 PCI: 00:1c.0: enabled 1
587 07:41:35.362468 PCI: 00:1c.1: enabled 0
588 07:41:35.364295 PCI: 00:1c.2: enabled 0
589 07:41:35.367660 PCI: 00:1c.3: enabled 0
590 07:41:35.370357 PCI: 00:1c.4: enabled 0
591 07:41:35.371819 PCI: 00:1c.5: enabled 0
592 07:41:35.374640 PCI: 00:1c.6: enabled 0
593 07:41:35.376679 PCI: 00:1c.7: enabled 1
594 07:41:35.380058 PCI: 00:1d.0: enabled 1
595 07:41:35.381982 PCI: 00:1d.1: enabled 1
596 07:41:35.384773 PCI: 00:1d.2: enabled 0
597 07:41:35.386697 PCI: 00:1d.3: enabled 0
598 07:41:35.388820 PCI: 00:1d.4: enabled 1
599 07:41:35.391823 PCI: 00:1e.0: enabled 0
600 07:41:35.393913 PCI: 00:1e.1: enabled 0
601 07:41:35.397082 PCI: 00:1e.2: enabled 0
602 07:41:35.398364 PCI: 00:1e.3: enabled 0
603 07:41:35.401552 PCI: 00:1f.0: enabled 1
604 07:41:35.403980 PCI: 00:1f.1: enabled 1
605 07:41:35.406044 PCI: 00:1f.2: enabled 1
606 07:41:35.408341 PCI: 00:1f.3: enabled 1
607 07:41:35.410558 PCI: 00:1f.4: enabled 1
608 07:41:35.413799 PCI: 00:1f.5: enabled 1
609 07:41:35.416122 PCI: 00:1f.6: enabled 1
610 07:41:35.418313 USB0 port 0: enabled 1
611 07:41:35.420916 I2C: 00:10: enabled 1
612 07:41:35.422798 I2C: 00:10: enabled 1
613 07:41:35.425666 I2C: 00:34: enabled 1
614 07:41:35.427625 I2C: 00:2c: enabled 1
615 07:41:35.429691 I2C: 00:50: enabled 1
616 07:41:35.432031 PNP: 0c09.0: enabled 1
617 07:41:35.433613 USB2 port 0: enabled 1
618 07:41:35.436592 USB2 port 1: enabled 1
619 07:41:35.439168 USB2 port 2: enabled 1
620 07:41:35.441186 USB2 port 4: enabled 1
621 07:41:35.443940 USB2 port 5: enabled 1
622 07:41:35.445886 USB2 port 6: enabled 1
623 07:41:35.447661 USB2 port 7: enabled 1
624 07:41:35.450528 USB2 port 8: enabled 1
625 07:41:35.453229 USB2 port 9: enabled 1
626 07:41:35.455182 USB3 port 0: enabled 1
627 07:41:35.457291 USB3 port 1: enabled 1
628 07:41:35.460360 USB3 port 2: enabled 1
629 07:41:35.461808 USB3 port 3: enabled 1
630 07:41:35.464787 USB3 port 4: enabled 1
631 07:41:35.466145 APIC: 02: enabled 1
632 07:41:35.468829 Compare with tree...
633 07:41:35.470929 Root Device: enabled 1
634 07:41:35.473873 CPU_CLUSTER: 0: enabled 1
635 07:41:35.476327 APIC: 00: enabled 1
636 07:41:35.478031 APIC: 02: enabled 1
637 07:41:35.481252 DOMAIN: 0000: enabled 1
638 07:41:35.483409 PCI: 00:00.0: enabled 1
639 07:41:35.485682 PCI: 00:02.0: enabled 1
640 07:41:35.488958 PCI: 00:04.0: enabled 1
641 07:41:35.491124 PCI: 00:12.0: enabled 1
642 07:41:35.494297 PCI: 00:12.5: enabled 0
643 07:41:35.497001 PCI: 00:12.6: enabled 0
644 07:41:35.499188 PCI: 00:13.0: enabled 0
645 07:41:35.501528 PCI: 00:14.0: enabled 1
646 07:41:35.504486 USB0 port 0: enabled 1
647 07:41:35.507674 USB2 port 0: enabled 1
648 07:41:35.509675 USB2 port 1: enabled 1
649 07:41:35.512733 USB2 port 2: enabled 1
650 07:41:35.515331 USB2 port 4: enabled 1
651 07:41:35.518323 USB2 port 5: enabled 1
652 07:41:35.520907 USB2 port 6: enabled 1
653 07:41:35.523317 USB2 port 7: enabled 1
654 07:41:35.526506 USB2 port 8: enabled 1
655 07:41:35.528709 USB2 port 9: enabled 1
656 07:41:35.532043 USB3 port 0: enabled 1
657 07:41:35.534135 USB3 port 1: enabled 1
658 07:41:35.537610 USB3 port 2: enabled 1
659 07:41:35.540298 USB3 port 3: enabled 1
660 07:41:35.542406 USB3 port 4: enabled 1
661 07:41:35.545101 PCI: 00:14.1: enabled 0
662 07:41:35.547098 PCI: 00:14.3: enabled 1
663 07:41:35.549784 PCI: 00:14.5: enabled 0
664 07:41:35.553161 PCI: 00:15.0: enabled 1
665 07:41:35.555853 I2C: 00:10: enabled 1
666 07:41:35.558599 I2C: 00:10: enabled 1
667 07:41:35.560177 I2C: 00:34: enabled 1
668 07:41:35.562935 PCI: 00:15.1: enabled 1
669 07:41:35.566202 I2C: 00:2c: enabled 1
670 07:41:35.568282 PCI: 00:15.2: enabled 0
671 07:41:35.571569 PCI: 00:15.3: enabled 0
672 07:41:35.573566 PCI: 00:16.0: enabled 1
673 07:41:35.575564 PCI: 00:16.1: enabled 0
674 07:41:35.578853 PCI: 00:16.2: enabled 0
675 07:41:35.580913 PCI: 00:16.3: enabled 0
676 07:41:35.584420 PCI: 00:16.4: enabled 0
677 07:41:35.586714 PCI: 00:16.5: enabled 0
678 07:41:35.589714 PCI: 00:17.0: enabled 1
679 07:41:35.591517 PCI: 00:19.0: enabled 1
680 07:41:35.594715 I2C: 00:50: enabled 1
681 07:41:35.597483 PCI: 00:19.1: enabled 0
682 07:41:35.599473 PCI: 00:19.2: enabled 1
683 07:41:35.603042 PCI: 00:1a.0: enabled 0
684 07:41:35.604386 PCI: 00:1c.0: enabled 1
685 07:41:35.607499 PCI: 00:1c.1: enabled 0
686 07:41:35.610720 PCI: 00:1c.2: enabled 0
687 07:41:35.613269 PCI: 00:1c.3: enabled 0
688 07:41:35.615516 PCI: 00:1c.4: enabled 0
689 07:41:35.618012 PCI: 00:1c.5: enabled 0
690 07:41:35.620216 PCI: 00:1c.6: enabled 0
691 07:41:35.622793 PCI: 00:1c.7: enabled 1
692 07:41:35.626328 PCI: 00:1d.0: enabled 1
693 07:41:35.628932 PCI: 00:1d.1: enabled 1
694 07:41:35.631096 PCI: 00:1d.2: enabled 0
695 07:41:35.634100 PCI: 00:1d.3: enabled 0
696 07:41:35.635995 PCI: 00:1d.4: enabled 1
697 07:41:35.638729 PCI: 00:1e.0: enabled 0
698 07:41:35.641198 PCI: 00:1e.1: enabled 0
699 07:41:35.644897 PCI: 00:1e.2: enabled 0
700 07:41:35.646910 PCI: 00:1e.3: enabled 0
701 07:41:35.649710 PCI: 00:1f.0: enabled 1
702 07:41:35.651999 PNP: 0c09.0: enabled 1
703 07:41:35.654619 PCI: 00:1f.1: enabled 1
704 07:41:35.657873 PCI: 00:1f.2: enabled 1
705 07:41:35.660462 PCI: 00:1f.3: enabled 1
706 07:41:35.663125 PCI: 00:1f.4: enabled 1
707 07:41:35.665953 PCI: 00:1f.5: enabled 1
708 07:41:35.668025 PCI: 00:1f.6: enabled 1
709 07:41:35.670175 Root Device scanning...
710 07:41:35.674091 root_dev_scan_bus for Root Device
711 07:41:35.675978 CPU_CLUSTER: 0 enabled
712 07:41:35.678658 DOMAIN: 0000 enabled
713 07:41:35.681518 DOMAIN: 0000 scanning...
714 07:41:35.683977 PCI: pci_scan_bus for bus 00
715 07:41:35.687818 PCI: 00:00.0 [8086/0000] ops
716 07:41:35.691169 PCI: 00:00.0 [8086/3e35] enabled
717 07:41:35.693748 PCI: 00:02.0 [8086/0000] ops
718 07:41:35.696469 PCI: 00:02.0 [8086/3ea1] enabled
719 07:41:35.700479 PCI: 00:04.0 [8086/1903] enabled
720 07:41:35.703224 PCI: 00:08.0 [8086/1911] enabled
721 07:41:35.706398 PCI: 00:12.0 [8086/9df9] enabled
722 07:41:35.710139 PCI: 00:14.0 [8086/0000] bus ops
723 07:41:35.713539 PCI: 00:14.0 [8086/9ded] enabled
724 07:41:35.716732 PCI: 00:14.2 [8086/9def] enabled
725 07:41:35.720131 PCI: 00:14.3 [8086/9df0] enabled
726 07:41:35.723606 PCI: 00:15.0 [8086/0000] bus ops
727 07:41:35.726566 PCI: 00:15.0 [8086/9de8] enabled
728 07:41:35.730367 PCI: 00:15.1 [8086/0000] bus ops
729 07:41:35.733572 PCI: 00:15.1 [8086/9de9] enabled
730 07:41:35.736550 PCI: 00:16.0 [8086/0000] ops
731 07:41:35.740050 PCI: 00:16.0 [8086/9de0] enabled
732 07:41:35.742233 PCI: 00:17.0 [8086/0000] ops
733 07:41:35.745540 PCI: 00:17.0 [8086/9dd3] enabled
734 07:41:35.749189 PCI: 00:19.0 [8086/0000] bus ops
735 07:41:35.752648 PCI: 00:19.0 [8086/9dc5] enabled
736 07:41:35.755847 PCI: 00:19.2 [8086/0000] ops
737 07:41:35.759232 PCI: 00:19.2 [8086/9dc7] enabled
738 07:41:35.762565 PCI: 00:1c.0 [8086/0000] bus ops
739 07:41:35.765254 PCI: 00:1c.0 [8086/9dbf] enabled
740 07:41:35.771790 PCI: Static device PCI: 00:1c.7 not found, disabling it.
741 07:41:35.773822 PCI: 00:1d.0 [8086/0000] bus ops
742 07:41:35.777976 PCI: 00:1d.0 [8086/9db4] enabled
743 07:41:35.783552 PCI: Static device PCI: 00:1d.1 not found, disabling it.
744 07:41:35.789758 PCI: Static device PCI: 00:1d.4 not found, disabling it.
745 07:41:35.792491 PCI: 00:1f.0 [8086/0000] bus ops
746 07:41:35.795972 PCI: 00:1f.0 [8086/9d84] enabled
747 07:41:35.801348 PCI: Static device PCI: 00:1f.1 not found, disabling it.
748 07:41:35.807529 PCI: Static device PCI: 00:1f.2 not found, disabling it.
749 07:41:35.810088 PCI: 00:1f.3 [8086/0000] bus ops
750 07:41:35.813149 PCI: 00:1f.3 [8086/9dc8] enabled
751 07:41:35.816779 PCI: 00:1f.4 [8086/0000] bus ops
752 07:41:35.819996 PCI: 00:1f.4 [8086/9da3] enabled
753 07:41:35.823508 PCI: 00:1f.5 [8086/0000] bus ops
754 07:41:35.827187 PCI: 00:1f.5 [8086/9da4] enabled
755 07:41:35.829625 PCI: 00:1f.6 [8086/15be] enabled
756 07:41:35.833491 PCI: Leftover static devices:
757 07:41:35.834598 PCI: 00:12.5
758 07:41:35.836398 PCI: 00:12.6
759 07:41:35.837231 PCI: 00:13.0
760 07:41:35.838698 PCI: 00:14.1
761 07:41:35.840222 PCI: 00:14.5
762 07:41:35.841047 PCI: 00:15.2
763 07:41:35.843140 PCI: 00:15.3
764 07:41:35.844268 PCI: 00:16.1
765 07:41:35.845402 PCI: 00:16.2
766 07:41:35.847153 PCI: 00:16.3
767 07:41:35.848469 PCI: 00:16.4
768 07:41:35.849133 PCI: 00:16.5
769 07:41:35.850907 PCI: 00:19.1
770 07:41:35.852119 PCI: 00:1a.0
771 07:41:35.853423 PCI: 00:1c.1
772 07:41:35.855304 PCI: 00:1c.2
773 07:41:35.856667 PCI: 00:1c.3
774 07:41:35.857951 PCI: 00:1c.4
775 07:41:35.859010 PCI: 00:1c.5
776 07:41:35.860371 PCI: 00:1c.6
777 07:41:35.862004 PCI: 00:1c.7
778 07:41:35.863517 PCI: 00:1d.1
779 07:41:35.865225 PCI: 00:1d.2
780 07:41:35.865508 PCI: 00:1d.3
781 07:41:35.866747 PCI: 00:1d.4
782 07:41:35.869292 PCI: 00:1e.0
783 07:41:35.870630 PCI: 00:1e.1
784 07:41:35.870911 PCI: 00:1e.2
785 07:41:35.872868 PCI: 00:1e.3
786 07:41:35.874511 PCI: 00:1f.1
787 07:41:35.875661 PCI: 00:1f.2
788 07:41:35.879010 PCI: Check your devicetree.cb.
789 07:41:35.881804 PCI: 00:14.0 scanning...
790 07:41:35.885159 scan_usb_bus for PCI: 00:14.0
791 07:41:35.886508 USB0 port 0 enabled
792 07:41:35.889359 USB0 port 0 scanning...
793 07:41:35.892978 scan_usb_bus for USB0 port 0
794 07:41:35.894151 USB2 port 0 enabled
795 07:41:35.896293 USB2 port 1 enabled
796 07:41:35.897713 USB2 port 2 enabled
797 07:41:35.899756 USB2 port 4 enabled
798 07:41:35.902532 USB2 port 5 enabled
799 07:41:35.904586 USB2 port 6 enabled
800 07:41:35.905951 USB2 port 7 enabled
801 07:41:35.908699 USB2 port 8 enabled
802 07:41:35.910714 USB2 port 9 enabled
803 07:41:35.912615 USB3 port 0 enabled
804 07:41:35.914575 USB3 port 1 enabled
805 07:41:35.916474 USB3 port 2 enabled
806 07:41:35.919187 USB3 port 3 enabled
807 07:41:35.921273 USB3 port 4 enabled
808 07:41:35.923204 USB2 port 0 scanning...
809 07:41:35.925844 scan_usb_bus for USB2 port 0
810 07:41:35.930083 scan_usb_bus for USB2 port 0 done
811 07:41:35.935028 scan_bus: scanning of bus USB2 port 0 took 9061 usecs
812 07:41:35.938138 USB2 port 1 scanning...
813 07:41:35.940863 scan_usb_bus for USB2 port 1
814 07:41:35.943670 scan_usb_bus for USB2 port 1 done
815 07:41:35.949820 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
816 07:41:35.952257 USB2 port 2 scanning...
817 07:41:35.955371 scan_usb_bus for USB2 port 2
818 07:41:35.958671 scan_usb_bus for USB2 port 2 done
819 07:41:35.963859 scan_bus: scanning of bus USB2 port 2 took 9060 usecs
820 07:41:35.966625 USB2 port 4 scanning...
821 07:41:35.969552 scan_usb_bus for USB2 port 4
822 07:41:35.972732 scan_usb_bus for USB2 port 4 done
823 07:41:35.977908 scan_bus: scanning of bus USB2 port 4 took 9059 usecs
824 07:41:35.980734 USB2 port 5 scanning...
825 07:41:35.983942 scan_usb_bus for USB2 port 5
826 07:41:35.987858 scan_usb_bus for USB2 port 5 done
827 07:41:35.992857 scan_bus: scanning of bus USB2 port 5 took 9062 usecs
828 07:41:35.994834 USB2 port 6 scanning...
829 07:41:35.998234 scan_usb_bus for USB2 port 6
830 07:41:36.002081 scan_usb_bus for USB2 port 6 done
831 07:41:36.007418 scan_bus: scanning of bus USB2 port 6 took 9060 usecs
832 07:41:36.010274 USB2 port 7 scanning...
833 07:41:36.012939 scan_usb_bus for USB2 port 7
834 07:41:36.016308 scan_usb_bus for USB2 port 7 done
835 07:41:36.021605 scan_bus: scanning of bus USB2 port 7 took 9062 usecs
836 07:41:36.023717 USB2 port 8 scanning...
837 07:41:36.027143 scan_usb_bus for USB2 port 8
838 07:41:36.030486 scan_usb_bus for USB2 port 8 done
839 07:41:36.035773 scan_bus: scanning of bus USB2 port 8 took 9059 usecs
840 07:41:36.038298 USB2 port 9 scanning...
841 07:41:36.041422 scan_usb_bus for USB2 port 9
842 07:41:36.044693 scan_usb_bus for USB2 port 9 done
843 07:41:36.050567 scan_bus: scanning of bus USB2 port 9 took 9060 usecs
844 07:41:36.052732 USB3 port 0 scanning...
845 07:41:36.055969 scan_usb_bus for USB3 port 0
846 07:41:36.059187 scan_usb_bus for USB3 port 0 done
847 07:41:36.064556 scan_bus: scanning of bus USB3 port 0 took 9062 usecs
848 07:41:36.066681 USB3 port 1 scanning...
849 07:41:36.070530 scan_usb_bus for USB3 port 1
850 07:41:36.073539 scan_usb_bus for USB3 port 1 done
851 07:41:36.079342 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
852 07:41:36.081784 USB3 port 2 scanning...
853 07:41:36.084774 scan_usb_bus for USB3 port 2
854 07:41:36.087804 scan_usb_bus for USB3 port 2 done
855 07:41:36.093743 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
856 07:41:36.095536 USB3 port 3 scanning...
857 07:41:36.099063 scan_usb_bus for USB3 port 3
858 07:41:36.102142 scan_usb_bus for USB3 port 3 done
859 07:41:36.107367 scan_bus: scanning of bus USB3 port 3 took 9060 usecs
860 07:41:36.110131 USB3 port 4 scanning...
861 07:41:36.113987 scan_usb_bus for USB3 port 4
862 07:41:36.117493 scan_usb_bus for USB3 port 4 done
863 07:41:36.122879 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
864 07:41:36.126220 scan_usb_bus for USB0 port 0 done
865 07:41:36.131963 scan_bus: scanning of bus USB0 port 0 took 239291 usecs
866 07:41:36.134311 scan_usb_bus for PCI: 00:14.0 done
867 07:41:36.140716 scan_bus: scanning of bus PCI: 00:14.0 took 256222 usecs
868 07:41:36.142638 PCI: 00:15.0 scanning...
869 07:41:36.146015 scan_generic_bus for PCI: 00:15.0
870 07:41:36.150778 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
871 07:41:36.154765 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
872 07:41:36.158756 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
873 07:41:36.162970 scan_generic_bus for PCI: 00:15.0 done
874 07:41:36.168325 scan_bus: scanning of bus PCI: 00:15.0 took 22380 usecs
875 07:41:36.170549 PCI: 00:15.1 scanning...
876 07:41:36.175027 scan_generic_bus for PCI: 00:15.1
877 07:41:36.178081 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
878 07:41:36.182559 scan_generic_bus for PCI: 00:15.1 done
879 07:41:36.188635 scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs
880 07:41:36.190132 PCI: 00:19.0 scanning...
881 07:41:36.194513 scan_generic_bus for PCI: 00:19.0
882 07:41:36.197958 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
883 07:41:36.201840 scan_generic_bus for PCI: 00:19.0 done
884 07:41:36.208188 scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
885 07:41:36.210187 PCI: 00:1c.0 scanning...
886 07:41:36.214258 do_pci_scan_bridge for PCI: 00:1c.0
887 07:41:36.217257 PCI: pci_scan_bus for bus 01
888 07:41:36.220117 PCI: 01:00.0 [10ec/525a] enabled
889 07:41:36.223880 Capability: type 0x01 @ 0x80
890 07:41:36.227308 Capability: type 0x05 @ 0x90
891 07:41:36.229028 Capability: type 0x10 @ 0xb0
892 07:41:36.232783 Capability: type 0x10 @ 0x40
893 07:41:36.236139 Enabling Common Clock Configuration
894 07:41:36.240204 L1 Sub-State supported from root port 28
895 07:41:36.243607 L1 Sub-State Support = 0xf
896 07:41:36.245928 CommonModeRestoreTime = 0x3c
897 07:41:36.249877 Power On Value = 0x6, Power On Scale = 0x1
898 07:41:36.253188 ASPM: Enabled L0s and L1
899 07:41:36.255733 Capability: type 0x01 @ 0x80
900 07:41:36.258899 Capability: type 0x05 @ 0x90
901 07:41:36.261982 Capability: type 0x10 @ 0xb0
902 07:41:36.267038 scan_bus: scanning of bus PCI: 00:1c.0 took 53658 usecs
903 07:41:36.269700 PCI: 00:1d.0 scanning...
904 07:41:36.273818 do_pci_scan_bridge for PCI: 00:1d.0
905 07:41:36.276534 PCI: pci_scan_bus for bus 02
906 07:41:36.279317 PCI: 02:00.0 [1e95/9100] enabled
907 07:41:36.283272 Capability: type 0x01 @ 0x40
908 07:41:36.285915 Capability: type 0x05 @ 0x50
909 07:41:36.289228 Capability: type 0x10 @ 0x70
910 07:41:36.291922 Capability: type 0x10 @ 0x40
911 07:41:36.295214 Enabling Common Clock Configuration
912 07:41:36.299840 L1 Sub-State supported from root port 29
913 07:41:36.302567 L1 Sub-State Support = 0xf
914 07:41:36.305313 CommonModeRestoreTime = 0x28
915 07:41:36.309944 Power On Value = 0x16, Power On Scale = 0x0
916 07:41:36.311954 ASPM: Enabled L1
917 07:41:36.314500 Capability: type 0x01 @ 0x40
918 07:41:36.316744 Capability: type 0x05 @ 0x50
919 07:41:36.320000 Capability: type 0x10 @ 0x70
920 07:41:36.325230 scan_bus: scanning of bus PCI: 00:1d.0 took 52965 usecs
921 07:41:36.327463 PCI: 00:1f.0 scanning...
922 07:41:36.331124 scan_lpc_bus for PCI: 00:1f.0
923 07:41:36.333142 PNP: 0c09.0 enabled
924 07:41:36.336380 scan_lpc_bus for PCI: 00:1f.0 done
925 07:41:36.342867 scan_bus: scanning of bus PCI: 00:1f.0 took 11454 usecs
926 07:41:36.345538 PCI: 00:1f.3 scanning...
927 07:41:36.350892 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
928 07:41:36.353643 PCI: 00:1f.4 scanning...
929 07:41:36.356962 scan_generic_bus for PCI: 00:1f.4
930 07:41:36.360417 scan_generic_bus for PCI: 00:1f.4 done
931 07:41:36.365997 scan_bus: scanning of bus PCI: 00:1f.4 took 10125 usecs
932 07:41:36.369170 PCI: 00:1f.5 scanning...
933 07:41:36.373017 scan_generic_bus for PCI: 00:1f.5
934 07:41:36.376805 scan_generic_bus for PCI: 00:1f.5 done
935 07:41:36.382231 scan_bus: scanning of bus PCI: 00:1f.5 took 10127 usecs
936 07:41:36.388133 scan_bus: scanning of bus DOMAIN: 0000 took 703672 usecs
937 07:41:36.392192 root_dev_scan_bus for Root Device done
938 07:41:36.397696 scan_bus: scanning of bus Root Device took 723809 usecs
939 07:41:36.398425 done
940 07:41:36.404534 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
941 07:41:36.410515 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
942 07:41:36.418619 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
943 07:41:36.424064 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
944 07:41:36.427820 SPI flash protection: WPSW=0 SRP0=0
945 07:41:36.432394 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
946 07:41:36.438757 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119733 exit 34810
947 07:41:36.441533 found VGA at PCI: 00:02.0
948 07:41:36.445403 Setting up VGA for PCI: 00:02.0
949 07:41:36.450558 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
950 07:41:36.454798 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
951 07:41:36.457723 Allocating resources...
952 07:41:36.459563 Reading resources...
953 07:41:36.463593 Root Device read_resources bus 0 link: 0
954 07:41:36.468951 CPU_CLUSTER: 0 read_resources bus 0 link: 0
955 07:41:36.473734 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
956 07:41:36.478754 DOMAIN: 0000 read_resources bus 0 link: 0
957 07:41:36.483924 PCI: 00:14.0 read_resources bus 0 link: 0
958 07:41:36.488413 USB0 port 0 read_resources bus 0 link: 0
959 07:41:36.498639 USB0 port 0 read_resources bus 0 link: 0 done
960 07:41:36.502809 PCI: 00:14.0 read_resources bus 0 link: 0 done
961 07:41:36.508851 PCI: 00:15.0 read_resources bus 1 link: 0
962 07:41:36.514722 PCI: 00:15.0 read_resources bus 1 link: 0 done
963 07:41:36.519016 PCI: 00:15.1 read_resources bus 2 link: 0
964 07:41:36.524181 PCI: 00:15.1 read_resources bus 2 link: 0 done
965 07:41:36.529011 PCI: 00:19.0 read_resources bus 3 link: 0
966 07:41:36.534945 PCI: 00:19.0 read_resources bus 3 link: 0 done
967 07:41:36.539178 PCI: 00:1c.0 read_resources bus 1 link: 0
968 07:41:36.545009 PCI: 00:1c.0 read_resources bus 1 link: 0 done
969 07:41:36.549371 PCI: 00:1d.0 read_resources bus 2 link: 0
970 07:41:36.554443 PCI: 00:1d.0 read_resources bus 2 link: 0 done
971 07:41:36.559621 PCI: 00:1f.0 read_resources bus 0 link: 0
972 07:41:36.564636 PCI: 00:1f.0 read_resources bus 0 link: 0 done
973 07:41:36.570830 DOMAIN: 0000 read_resources bus 0 link: 0 done
974 07:41:36.576065 Root Device read_resources bus 0 link: 0 done
975 07:41:36.578688 Done reading resources.
976 07:41:36.584067 Show resources in subtree (Root Device)...After reading.
977 07:41:36.587819 Root Device child on link 0 CPU_CLUSTER: 0
978 07:41:36.592283 CPU_CLUSTER: 0 child on link 0 APIC: 00
979 07:41:36.593361 APIC: 00
980 07:41:36.595330 APIC: 02
981 07:41:36.599104 DOMAIN: 0000 child on link 0 PCI: 00:00.0
982 07:41:36.608943 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
983 07:41:36.617936 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
984 07:41:36.620375 PCI: 00:00.0
985 07:41:36.630188 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
986 07:41:36.638770 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
987 07:41:36.648690 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
988 07:41:36.657836 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
989 07:41:36.666782 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
990 07:41:36.676639 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
991 07:41:36.685852 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
992 07:41:36.694446 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
993 07:41:36.704791 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
994 07:41:36.713991 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
995 07:41:36.723317 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
996 07:41:36.732853 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
997 07:41:36.742782 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
998 07:41:36.751440 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
999 07:41:36.753388 PCI: 00:02.0
1000 07:41:36.762965 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1001 07:41:36.773978 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1002 07:41:36.781447 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1003 07:41:36.783083 PCI: 00:04.0
1004 07:41:36.793781 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1005 07:41:36.794717 PCI: 00:08.0
1006 07:41:36.805083 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 07:41:36.806293 PCI: 00:12.0
1008 07:41:36.816764 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1009 07:41:36.820530 PCI: 00:14.0 child on link 0 USB0 port 0
1010 07:41:36.830679 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1011 07:41:36.835368 USB0 port 0 child on link 0 USB2 port 0
1012 07:41:36.837209 USB2 port 0
1013 07:41:36.838869 USB2 port 1
1014 07:41:36.840606 USB2 port 2
1015 07:41:36.842206 USB2 port 4
1016 07:41:36.843807 USB2 port 5
1017 07:41:36.846058 USB2 port 6
1018 07:41:36.847615 USB2 port 7
1019 07:41:36.849257 USB2 port 8
1020 07:41:36.850920 USB2 port 9
1021 07:41:36.852805 USB3 port 0
1022 07:41:36.854871 USB3 port 1
1023 07:41:36.855742 USB3 port 2
1024 07:41:36.858168 USB3 port 3
1025 07:41:36.860220 USB3 port 4
1026 07:41:36.861697 PCI: 00:14.2
1027 07:41:36.871661 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1028 07:41:36.881151 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1029 07:41:36.883155 PCI: 00:14.3
1030 07:41:36.893150 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1031 07:41:36.896689 PCI: 00:15.0 child on link 0 I2C: 01:10
1032 07:41:36.906584 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 07:41:36.908596 I2C: 01:10
1034 07:41:36.909758 I2C: 01:10
1035 07:41:36.912281 I2C: 01:34
1036 07:41:36.915776 PCI: 00:15.1 child on link 0 I2C: 02:2c
1037 07:41:36.926026 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 07:41:36.927448 I2C: 02:2c
1039 07:41:36.928907 PCI: 00:16.0
1040 07:41:36.938533 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 07:41:36.941074 PCI: 00:17.0
1042 07:41:36.949493 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1043 07:41:36.958677 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1044 07:41:36.966771 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1045 07:41:36.975477 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1046 07:41:36.983674 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1047 07:41:36.992844 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1048 07:41:36.996734 PCI: 00:19.0 child on link 0 I2C: 03:50
1049 07:41:37.007105 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1050 07:41:37.016337 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1051 07:41:37.017864 I2C: 03:50
1052 07:41:37.019957 PCI: 00:19.2
1053 07:41:37.031400 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1054 07:41:37.040948 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1055 07:41:37.045776 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1056 07:41:37.054555 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1057 07:41:37.063566 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1058 07:41:37.073508 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1059 07:41:37.074379 PCI: 01:00.0
1060 07:41:37.084063 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1061 07:41:37.088143 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1062 07:41:37.096939 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1063 07:41:37.106220 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1064 07:41:37.115619 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1065 07:41:37.117858 PCI: 02:00.0
1066 07:41:37.127706 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1067 07:41:37.132432 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1068 07:41:37.141258 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1069 07:41:37.150161 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1070 07:41:37.151490 PNP: 0c09.0
1071 07:41:37.160315 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1072 07:41:37.168391 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1073 07:41:37.177632 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1074 07:41:37.178933 PCI: 00:1f.3
1075 07:41:37.189153 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1076 07:41:37.198503 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1077 07:41:37.200418 PCI: 00:1f.4
1078 07:41:37.209482 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1079 07:41:37.219271 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1080 07:41:37.220860 PCI: 00:1f.5
1081 07:41:37.229796 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1082 07:41:37.231313 PCI: 00:1f.6
1083 07:41:37.240878 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1084 07:41:37.247426 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1085 07:41:37.253641 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1086 07:41:37.260531 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1087 07:41:37.266624 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1088 07:41:37.272891 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1089 07:41:37.277410 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1090 07:41:37.280541 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1091 07:41:37.284157 PCI: 00:17.0 18 * [0x60 - 0x67] io
1092 07:41:37.287669 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1093 07:41:37.294988 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1094 07:41:37.301625 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1095 07:41:37.309026 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1096 07:41:37.317678 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1097 07:41:37.324049 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1098 07:41:37.328708 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1099 07:41:37.336202 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1100 07:41:37.344192 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1101 07:41:37.351982 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1102 07:41:37.359669 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1103 07:41:37.363056 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1104 07:41:37.370856 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1105 07:41:37.375938 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1106 07:41:37.380789 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1107 07:41:37.384932 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1108 07:41:37.390705 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1109 07:41:37.394644 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1110 07:41:37.399964 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1111 07:41:37.404276 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1112 07:41:37.410265 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1113 07:41:37.414432 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1114 07:41:37.419326 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1115 07:41:37.423817 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1116 07:41:37.429300 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1117 07:41:37.433768 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1118 07:41:37.439011 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1119 07:41:37.443732 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1120 07:41:37.448623 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1121 07:41:37.453937 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1122 07:41:37.457924 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1123 07:41:37.462923 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1124 07:41:37.467607 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1125 07:41:37.472748 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1126 07:41:37.477240 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1127 07:41:37.482856 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1128 07:41:37.487064 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1129 07:41:37.492125 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1130 07:41:37.500603 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1131 07:41:37.504466 avoid_fixed_resources: DOMAIN: 0000
1132 07:41:37.510519 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1133 07:41:37.516183 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1134 07:41:37.523764 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1135 07:41:37.531978 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1136 07:41:37.539346 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1137 07:41:37.546962 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1138 07:41:37.554484 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1139 07:41:37.562061 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1140 07:41:37.569823 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1141 07:41:37.577709 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1142 07:41:37.584480 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1143 07:41:37.591335 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1144 07:41:37.593700 Setting resources...
1145 07:41:37.600446 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1146 07:41:37.604515 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1147 07:41:37.607814 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1148 07:41:37.612402 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1149 07:41:37.616118 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1150 07:41:37.622262 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1151 07:41:37.628621 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1152 07:41:37.635462 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1153 07:41:37.641871 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1154 07:41:37.648176 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1155 07:41:37.655810 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1156 07:41:37.660640 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1157 07:41:37.665314 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1158 07:41:37.670852 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1159 07:41:37.674802 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1160 07:41:37.679969 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1161 07:41:37.685360 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1162 07:41:37.690068 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1163 07:41:37.694265 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1164 07:41:37.699133 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1165 07:41:37.704805 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1166 07:41:37.708595 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1167 07:41:37.714407 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1168 07:41:37.718955 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1169 07:41:37.723872 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1170 07:41:37.728030 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1171 07:41:37.733723 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1172 07:41:37.738478 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1173 07:41:37.742813 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1174 07:41:37.747664 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1175 07:41:37.752292 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1176 07:41:37.757114 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1177 07:41:37.762263 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1178 07:41:37.767479 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1179 07:41:37.772844 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1180 07:41:37.776937 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1181 07:41:37.784792 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1182 07:41:37.792220 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1183 07:41:37.799665 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1184 07:41:37.806654 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1185 07:41:37.811973 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1186 07:41:37.819330 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1187 07:41:37.826050 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1188 07:41:37.833966 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1189 07:41:37.840961 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1190 07:41:37.846235 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1191 07:41:37.853916 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1192 07:41:37.857858 Root Device assign_resources, bus 0 link: 0
1193 07:41:37.862999 DOMAIN: 0000 assign_resources, bus 0 link: 0
1194 07:41:37.870516 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1195 07:41:37.879845 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1196 07:41:37.887090 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1197 07:41:37.894873 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1198 07:41:37.903532 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1199 07:41:37.912543 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1200 07:41:37.920776 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1201 07:41:37.924806 PCI: 00:14.0 assign_resources, bus 0 link: 0
1202 07:41:37.929426 PCI: 00:14.0 assign_resources, bus 0 link: 0
1203 07:41:37.938558 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1204 07:41:37.945327 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1205 07:41:37.953672 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1206 07:41:37.961746 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1207 07:41:37.967309 PCI: 00:15.0 assign_resources, bus 1 link: 0
1208 07:41:37.971946 PCI: 00:15.0 assign_resources, bus 1 link: 0
1209 07:41:37.980219 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1210 07:41:37.984869 PCI: 00:15.1 assign_resources, bus 2 link: 0
1211 07:41:37.989080 PCI: 00:15.1 assign_resources, bus 2 link: 0
1212 07:41:37.997878 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1213 07:41:38.005264 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1214 07:41:38.012988 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1215 07:41:38.021053 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1216 07:41:38.028122 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1217 07:41:38.035937 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1218 07:41:38.044140 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1219 07:41:38.052514 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1220 07:41:38.060528 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1221 07:41:38.064569 PCI: 00:19.0 assign_resources, bus 3 link: 0
1222 07:41:38.069459 PCI: 00:19.0 assign_resources, bus 3 link: 0
1223 07:41:38.078128 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1224 07:41:38.086935 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1225 07:41:38.095504 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1226 07:41:38.104364 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1227 07:41:38.108493 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1228 07:41:38.116774 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1229 07:41:38.121556 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1230 07:41:38.130156 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1231 07:41:38.138823 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1232 07:41:38.146592 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1233 07:41:38.151279 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1234 07:41:38.159607 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1235 07:41:38.164221 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1236 07:41:38.169089 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1237 07:41:38.174315 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1238 07:41:38.179031 LPC: Trying to open IO window from 930 size 8
1239 07:41:38.184106 LPC: Trying to open IO window from 940 size 8
1240 07:41:38.188105 LPC: Trying to open IO window from 950 size 10
1241 07:41:38.196669 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1242 07:41:38.204220 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1243 07:41:38.212635 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1244 07:41:38.221169 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1245 07:41:38.228819 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1246 07:41:38.233903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1247 07:41:38.238576 Root Device assign_resources, bus 0 link: 0
1248 07:41:38.241208 Done setting resources.
1249 07:41:38.247710 Show resources in subtree (Root Device)...After assigning values.
1250 07:41:38.252119 Root Device child on link 0 CPU_CLUSTER: 0
1251 07:41:38.256223 CPU_CLUSTER: 0 child on link 0 APIC: 00
1252 07:41:38.256868 APIC: 00
1253 07:41:38.258866 APIC: 02
1254 07:41:38.263020 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1255 07:41:38.273018 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1256 07:41:38.283436 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1257 07:41:38.285541 PCI: 00:00.0
1258 07:41:38.295032 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1259 07:41:38.304264 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1260 07:41:38.313860 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1261 07:41:38.322659 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1262 07:41:38.331736 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1263 07:41:38.341333 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1264 07:41:38.350601 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1265 07:41:38.359867 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1266 07:41:38.368599 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1267 07:41:38.379194 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1268 07:41:38.388048 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1269 07:41:38.398254 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1270 07:41:38.407618 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1271 07:41:38.416178 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1272 07:41:38.418114 PCI: 00:02.0
1273 07:41:38.428875 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1274 07:41:38.439907 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1275 07:41:38.448036 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1276 07:41:38.450402 PCI: 00:04.0
1277 07:41:38.460627 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1278 07:41:38.462746 PCI: 00:08.0
1279 07:41:38.472282 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1280 07:41:38.474196 PCI: 00:12.0
1281 07:41:38.484508 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1282 07:41:38.488625 PCI: 00:14.0 child on link 0 USB0 port 0
1283 07:41:38.498657 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1284 07:41:38.503596 USB0 port 0 child on link 0 USB2 port 0
1285 07:41:38.505825 USB2 port 0
1286 07:41:38.507130 USB2 port 1
1287 07:41:38.509295 USB2 port 2
1288 07:41:38.510704 USB2 port 4
1289 07:41:38.512661 USB2 port 5
1290 07:41:38.514699 USB2 port 6
1291 07:41:38.516022 USB2 port 7
1292 07:41:38.517336 USB2 port 8
1293 07:41:38.518723 USB2 port 9
1294 07:41:38.520934 USB3 port 0
1295 07:41:38.522671 USB3 port 1
1296 07:41:38.524257 USB3 port 2
1297 07:41:38.526591 USB3 port 3
1298 07:41:38.528607 USB3 port 4
1299 07:41:38.529907 PCI: 00:14.2
1300 07:41:38.539660 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1301 07:41:38.550216 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1302 07:41:38.551755 PCI: 00:14.3
1303 07:41:38.561995 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1304 07:41:38.566178 PCI: 00:15.0 child on link 0 I2C: 01:10
1305 07:41:38.576816 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1306 07:41:38.578476 I2C: 01:10
1307 07:41:38.579616 I2C: 01:10
1308 07:41:38.581789 I2C: 01:34
1309 07:41:38.586349 PCI: 00:15.1 child on link 0 I2C: 02:2c
1310 07:41:38.595601 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1311 07:41:38.597839 I2C: 02:2c
1312 07:41:38.599867 PCI: 00:16.0
1313 07:41:38.609725 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1314 07:41:38.611609 PCI: 00:17.0
1315 07:41:38.622060 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1316 07:41:38.632220 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1317 07:41:38.640855 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1318 07:41:38.649866 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1319 07:41:38.659050 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1320 07:41:38.668843 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1321 07:41:38.673103 PCI: 00:19.0 child on link 0 I2C: 03:50
1322 07:41:38.683253 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1323 07:41:38.693798 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1324 07:41:38.695665 I2C: 03:50
1325 07:41:38.697649 PCI: 00:19.2
1326 07:41:38.708378 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1327 07:41:38.718967 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1328 07:41:38.723383 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1329 07:41:38.732261 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1330 07:41:38.741857 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1331 07:41:38.752630 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1332 07:41:38.754584 PCI: 01:00.0
1333 07:41:38.764970 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1334 07:41:38.769735 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1335 07:41:38.778594 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1336 07:41:38.788709 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1337 07:41:38.798614 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1338 07:41:38.801085 PCI: 02:00.0
1339 07:41:38.810682 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1340 07:41:38.815705 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1341 07:41:38.824431 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1342 07:41:38.832915 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1343 07:41:38.834815 PNP: 0c09.0
1344 07:41:38.843352 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1345 07:41:38.851697 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1346 07:41:38.861190 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1347 07:41:38.862598 PCI: 00:1f.3
1348 07:41:38.872885 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1349 07:41:38.883391 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1350 07:41:38.885426 PCI: 00:1f.4
1351 07:41:38.894082 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1352 07:41:38.904363 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1353 07:41:38.905214 PCI: 00:1f.5
1354 07:41:38.916069 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1355 07:41:38.916957 PCI: 00:1f.6
1356 07:41:38.927489 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1357 07:41:38.930585 Done allocating resources.
1358 07:41:38.936067 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491289 exit 13
1359 07:41:38.939098 Enabling resources...
1360 07:41:38.943685 PCI: 00:00.0 subsystem <- 1028/3e35
1361 07:41:38.945861 PCI: 00:00.0 cmd <- 06
1362 07:41:38.950087 PCI: 00:02.0 subsystem <- 1028/3ea1
1363 07:41:38.952241 PCI: 00:02.0 cmd <- 03
1364 07:41:38.956270 PCI: 00:04.0 subsystem <- 1028/1903
1365 07:41:38.958420 PCI: 00:04.0 cmd <- 02
1366 07:41:38.961822 PCI: 00:08.0 cmd <- 06
1367 07:41:38.965263 PCI: 00:12.0 subsystem <- 1028/9df9
1368 07:41:38.967965 PCI: 00:12.0 cmd <- 02
1369 07:41:38.972112 PCI: 00:14.0 subsystem <- 1028/9ded
1370 07:41:38.973748 PCI: 00:14.0 cmd <- 02
1371 07:41:38.976906 PCI: 00:14.2 cmd <- 02
1372 07:41:38.980534 PCI: 00:14.3 subsystem <- 1028/9df0
1373 07:41:38.982636 PCI: 00:14.3 cmd <- 02
1374 07:41:38.986592 PCI: 00:15.0 subsystem <- 1028/9de8
1375 07:41:38.989178 PCI: 00:15.0 cmd <- 02
1376 07:41:38.993233 PCI: 00:15.1 subsystem <- 1028/9de9
1377 07:41:38.995924 PCI: 00:15.1 cmd <- 02
1378 07:41:38.998805 PCI: 00:16.0 subsystem <- 1028/9de0
1379 07:41:39.001916 PCI: 00:16.0 cmd <- 02
1380 07:41:39.005928 PCI: 00:17.0 subsystem <- 1028/9dd3
1381 07:41:39.007986 PCI: 00:17.0 cmd <- 03
1382 07:41:39.011469 PCI: 00:19.0 subsystem <- 1028/9dc5
1383 07:41:39.014216 PCI: 00:19.0 cmd <- 06
1384 07:41:39.018229 PCI: 00:19.2 subsystem <- 1028/9dc7
1385 07:41:39.020190 PCI: 00:19.2 cmd <- 06
1386 07:41:39.023794 PCI: 00:1c.0 bridge ctrl <- 0003
1387 07:41:39.027073 PCI: 00:1c.0 subsystem <- 1028/9dbf
1388 07:41:39.030346 Capability: type 0x10 @ 0x40
1389 07:41:39.033625 Capability: type 0x05 @ 0x80
1390 07:41:39.036310 Capability: type 0x0d @ 0x90
1391 07:41:39.038947 PCI: 00:1c.0 cmd <- 06
1392 07:41:39.042333 PCI: 00:1d.0 bridge ctrl <- 0003
1393 07:41:39.045927 PCI: 00:1d.0 subsystem <- 1028/9db4
1394 07:41:39.049080 Capability: type 0x10 @ 0x40
1395 07:41:39.051067 Capability: type 0x05 @ 0x80
1396 07:41:39.055076 Capability: type 0x0d @ 0x90
1397 07:41:39.056573 PCI: 00:1d.0 cmd <- 06
1398 07:41:39.060403 PCI: 00:1f.0 subsystem <- 1028/9d84
1399 07:41:39.063682 PCI: 00:1f.0 cmd <- 407
1400 07:41:39.067173 PCI: 00:1f.3 subsystem <- 1028/9dc8
1401 07:41:39.069581 PCI: 00:1f.3 cmd <- 02
1402 07:41:39.073179 PCI: 00:1f.4 subsystem <- 1028/9da3
1403 07:41:39.075788 PCI: 00:1f.4 cmd <- 03
1404 07:41:39.079318 PCI: 00:1f.5 subsystem <- 1028/9da4
1405 07:41:39.082400 PCI: 00:1f.5 cmd <- 406
1406 07:41:39.085854 PCI: 00:1f.6 subsystem <- 1028/15be
1407 07:41:39.088112 PCI: 00:1f.6 cmd <- 02
1408 07:41:39.098925 PCI: 01:00.0 cmd <- 02
1409 07:41:39.101364 PCI: 02:00.0 cmd <- 02
1410 07:41:39.104078 done.
1411 07:41:39.110217 BS: BS_DEV_ENABLE times (us): entry 402 run 167079 exit 0
1412 07:41:39.112967 Initializing devices...
1413 07:41:39.114548 Root Device init ...
1414 07:41:39.118499 Root Device init finished in 2138 usecs
1415 07:41:39.121980 CPU_CLUSTER: 0 init ...
1416 07:41:39.125468 CPU_CLUSTER: 0 init finished in 2430 usecs
1417 07:41:39.129871 PCI: 00:00.0 init ...
1418 07:41:39.132580 CPU TDP: 15 Watts
1419 07:41:39.134521 CPU PL2 = 51 Watts
1420 07:41:39.138533 PCI: 00:00.0 init finished in 7035 usecs
1421 07:41:39.140657 PCI: 00:02.0 init ...
1422 07:41:39.145327 PCI: 00:02.0 init finished in 2235 usecs
1423 07:41:39.147995 PCI: 00:04.0 init ...
1424 07:41:39.151616 PCI: 00:04.0 init finished in 2235 usecs
1425 07:41:39.154579 PCI: 00:08.0 init ...
1426 07:41:39.158647 PCI: 00:08.0 init finished in 2234 usecs
1427 07:41:39.160831 PCI: 00:12.0 init ...
1428 07:41:39.165295 PCI: 00:12.0 init finished in 2236 usecs
1429 07:41:39.167566 PCI: 00:14.0 init ...
1430 07:41:39.172180 PCI: 00:14.0 init finished in 2235 usecs
1431 07:41:39.174978 PCI: 00:14.2 init ...
1432 07:41:39.179035 PCI: 00:14.2 init finished in 2235 usecs
1433 07:41:39.181977 PCI: 00:14.3 init ...
1434 07:41:39.185289 PCI: 00:14.3 init finished in 2241 usecs
1435 07:41:39.188604 PCI: 00:15.0 init ...
1436 07:41:39.191839 DW I2C bus 0 at 0xd1347000 (400 KHz)
1437 07:41:39.195527 PCI: 00:15.0 init finished in 5932 usecs
1438 07:41:39.198026 PCI: 00:15.1 init ...
1439 07:41:39.201833 DW I2C bus 1 at 0xd1348000 (400 KHz)
1440 07:41:39.205960 PCI: 00:15.1 init finished in 5933 usecs
1441 07:41:39.208669 PCI: 00:16.0 init ...
1442 07:41:39.213039 PCI: 00:16.0 init finished in 2236 usecs
1443 07:41:39.216131 PCI: 00:19.0 init ...
1444 07:41:39.219328 DW I2C bus 4 at 0xd134a000 (400 KHz)
1445 07:41:39.224281 PCI: 00:19.0 init finished in 5925 usecs
1446 07:41:39.226831 PCI: 00:1c.0 init ...
1447 07:41:39.229981 Initializing PCH PCIe bridge.
1448 07:41:39.234137 PCI: 00:1c.0 init finished in 5240 usecs
1449 07:41:39.236824 PCI: 00:1d.0 init ...
1450 07:41:39.240050 Initializing PCH PCIe bridge.
1451 07:41:39.243467 PCI: 00:1d.0 init finished in 5246 usecs
1452 07:41:39.246531 PCI: 00:1f.0 init ...
1453 07:41:39.251270 IOAPIC: Initializing IOAPIC at 0xfec00000
1454 07:41:39.255386 IOAPIC: Bootstrap Processor Local APIC = 0x00
1455 07:41:39.256915 IOAPIC: ID = 0x02
1456 07:41:39.259960 IOAPIC: Dumping registers
1457 07:41:39.262721 reg 0x0000: 0x02000000
1458 07:41:39.264273 reg 0x0001: 0x00770020
1459 07:41:39.266959 reg 0x0002: 0x00000000
1460 07:41:39.271542 PCI: 00:1f.0 init finished in 23325 usecs
1461 07:41:39.274122 PCI: 00:1f.3 init ...
1462 07:41:39.280161 HDA: codec_mask = 05
1463 07:41:39.282887 HDA: Initializing codec #2
1464 07:41:39.285527 HDA: codec viddid: 8086280b
1465 07:41:39.288168 HDA: No verb table entry found
1466 07:41:39.290866 HDA: Initializing codec #0
1467 07:41:39.294231 HDA: codec viddid: 10ec0236
1468 07:41:39.300677 HDA: verb loaded.
1469 07:41:39.305342 PCI: 00:1f.3 init finished in 28838 usecs
1470 07:41:39.308118 PCI: 00:1f.4 init ...
1471 07:41:39.311829 PCI: 00:1f.4 init finished in 2245 usecs
1472 07:41:39.314942 PCI: 00:1f.6 init ...
1473 07:41:39.319225 PCI: 00:1f.6 init finished in 2235 usecs
1474 07:41:39.329438 PCI: 01:00.0 init ...
1475 07:41:39.333943 PCI: 01:00.0 init finished in 2235 usecs
1476 07:41:39.336189 PCI: 02:00.0 init ...
1477 07:41:39.340394 PCI: 02:00.0 init finished in 2235 usecs
1478 07:41:39.343181 PNP: 0c09.0 init ...
1479 07:41:39.351891 .EC Label : 00.00.20
1480 07:41:39.355934 EC Revision : 9ca674bba
1481 07:41:39.359262 EC Model Num : 08B9
1482 07:41:39.362839 EC Build Date : 05/10/19
1483 07:41:39.371560 PNP: 0c09.0 init finished in 26573 usecs
1484 07:41:39.374004 Devices initialized
1485 07:41:39.377237 Show all devs... After init.
1486 07:41:39.379191 Root Device: enabled 1
1487 07:41:39.381470 CPU_CLUSTER: 0: enabled 1
1488 07:41:39.384830 DOMAIN: 0000: enabled 1
1489 07:41:39.386902 APIC: 00: enabled 1
1490 07:41:39.388915 PCI: 00:00.0: enabled 1
1491 07:41:39.391105 PCI: 00:02.0: enabled 1
1492 07:41:39.393847 PCI: 00:04.0: enabled 1
1493 07:41:39.396540 PCI: 00:12.0: enabled 1
1494 07:41:39.399240 PCI: 00:12.5: enabled 0
1495 07:41:39.401338 PCI: 00:12.6: enabled 0
1496 07:41:39.403334 PCI: 00:13.0: enabled 0
1497 07:41:39.406671 PCI: 00:14.0: enabled 1
1498 07:41:39.408702 PCI: 00:14.1: enabled 0
1499 07:41:39.411197 PCI: 00:14.3: enabled 1
1500 07:41:39.413212 PCI: 00:14.5: enabled 0
1501 07:41:39.416025 PCI: 00:15.0: enabled 1
1502 07:41:39.418681 PCI: 00:15.1: enabled 1
1503 07:41:39.420430 PCI: 00:15.2: enabled 0
1504 07:41:39.423570 PCI: 00:15.3: enabled 0
1505 07:41:39.424880 PCI: 00:16.0: enabled 1
1506 07:41:39.428367 PCI: 00:16.1: enabled 0
1507 07:41:39.430421 PCI: 00:16.2: enabled 0
1508 07:41:39.432504 PCI: 00:16.3: enabled 0
1509 07:41:39.435274 PCI: 00:16.4: enabled 0
1510 07:41:39.437963 PCI: 00:16.5: enabled 0
1511 07:41:39.439966 PCI: 00:17.0: enabled 1
1512 07:41:39.442109 PCI: 00:19.0: enabled 1
1513 07:41:39.444748 PCI: 00:19.1: enabled 0
1514 07:41:39.447469 PCI: 00:19.2: enabled 1
1515 07:41:39.449491 PCI: 00:1a.0: enabled 0
1516 07:41:39.452230 PCI: 00:1c.0: enabled 1
1517 07:41:39.455060 PCI: 00:1c.1: enabled 0
1518 07:41:39.457044 PCI: 00:1c.2: enabled 0
1519 07:41:39.459701 PCI: 00:1c.3: enabled 0
1520 07:41:39.461832 PCI: 00:1c.4: enabled 0
1521 07:41:39.464295 PCI: 00:1c.5: enabled 0
1522 07:41:39.466386 PCI: 00:1c.6: enabled 0
1523 07:41:39.469480 PCI: 00:1c.7: enabled 0
1524 07:41:39.471081 PCI: 00:1d.0: enabled 1
1525 07:41:39.473594 PCI: 00:1d.1: enabled 0
1526 07:41:39.476284 PCI: 00:1d.2: enabled 0
1527 07:41:39.479528 PCI: 00:1d.3: enabled 0
1528 07:41:39.481214 PCI: 00:1d.4: enabled 0
1529 07:41:39.484046 PCI: 00:1e.0: enabled 0
1530 07:41:39.486249 PCI: 00:1e.1: enabled 0
1531 07:41:39.488365 PCI: 00:1e.2: enabled 0
1532 07:41:39.490666 PCI: 00:1e.3: enabled 0
1533 07:41:39.493156 PCI: 00:1f.0: enabled 1
1534 07:41:39.495912 PCI: 00:1f.1: enabled 0
1535 07:41:39.497845 PCI: 00:1f.2: enabled 0
1536 07:41:39.500689 PCI: 00:1f.3: enabled 1
1537 07:41:39.503406 PCI: 00:1f.4: enabled 1
1538 07:41:39.506146 PCI: 00:1f.5: enabled 1
1539 07:41:39.508124 PCI: 00:1f.6: enabled 1
1540 07:41:39.509897 USB0 port 0: enabled 1
1541 07:41:39.512826 I2C: 01:10: enabled 1
1542 07:41:39.514263 I2C: 01:10: enabled 1
1543 07:41:39.517189 I2C: 01:34: enabled 1
1544 07:41:39.519841 I2C: 02:2c: enabled 1
1545 07:41:39.521372 I2C: 03:50: enabled 1
1546 07:41:39.523890 PNP: 0c09.0: enabled 1
1547 07:41:39.526584 USB2 port 0: enabled 1
1548 07:41:39.528648 USB2 port 1: enabled 1
1549 07:41:39.531376 USB2 port 2: enabled 1
1550 07:41:39.533543 USB2 port 4: enabled 1
1551 07:41:39.536291 USB2 port 5: enabled 1
1552 07:41:39.537879 USB2 port 6: enabled 1
1553 07:41:39.540385 USB2 port 7: enabled 1
1554 07:41:39.542584 USB2 port 8: enabled 1
1555 07:41:39.545204 USB2 port 9: enabled 1
1556 07:41:39.547099 USB3 port 0: enabled 1
1557 07:41:39.549881 USB3 port 1: enabled 1
1558 07:41:39.551860 USB3 port 2: enabled 1
1559 07:41:39.553858 USB3 port 3: enabled 1
1560 07:41:39.556827 USB3 port 4: enabled 1
1561 07:41:39.558736 APIC: 02: enabled 1
1562 07:41:39.560971 PCI: 00:08.0: enabled 1
1563 07:41:39.563049 PCI: 00:14.2: enabled 1
1564 07:41:39.565736 PCI: 01:00.0: enabled 1
1565 07:41:39.568903 PCI: 02:00.0: enabled 1
1566 07:41:39.573542 Disabling ACPI via APMC:
1567 07:41:39.576072 done.
1568 07:41:39.580353 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1569 07:41:39.583749 ELOG: NV offset 0x1bf0000 size 0x4000
1570 07:41:39.591222 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1571 07:41:39.598358 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:07 UTC
1572 07:41:39.604812 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:07 UTC
1573 07:41:39.610555 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:07 UTC
1574 07:41:39.616532 ELOG: Event(9A) added with size 9 at 2024-01-03 07:41:07 UTC
1575 07:41:39.623036 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:07 UTC
1576 07:41:39.629311 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:07 UTC
1577 07:41:39.635284 BS: BS_DEV_INIT times (us): entry 0 run 458400 exit 61252
1578 07:41:39.642308 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:07 UTC
1579 07:41:39.649774 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1580 07:41:39.656687 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:07 UTC
1581 07:41:39.660696 elog_add_boot_reason: Logged dev mode boot
1582 07:41:39.662807 Finalize devices...
1583 07:41:39.664350 PCI: 00:17.0 final
1584 07:41:39.667018 Devices finalized
1585 07:41:39.671194 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1586 07:41:39.678319 BS: BS_POST_DEVICE times (us): entry 24775 run 5933 exit 5366
1587 07:41:39.683180 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1588 07:41:39.692032 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1589 07:41:39.696507 disable_unused_touchscreen: Disable ACPI0C50
1590 07:41:39.700590 disable_unused_touchscreen: Enable ELAN900C
1591 07:41:39.703274 CBFS @ 1d00000 size 300000
1592 07:41:39.710613 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1593 07:41:39.713902 CBFS: Locating 'fallback/dsdt.aml'
1594 07:41:39.717896 CBFS: Found @ offset 10b200 size 4448
1595 07:41:39.720581 CBFS @ 1d00000 size 300000
1596 07:41:39.726665 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1597 07:41:39.729190 CBFS: Locating 'fallback/slic'
1598 07:41:39.735004 CBFS: 'fallback/slic' not found.
1599 07:41:39.738845 ACPI: Writing ACPI tables at 89c0f000.
1600 07:41:39.740283 ACPI: * FACS
1601 07:41:39.741858 ACPI: * DSDT
1602 07:41:39.745795 Ramoops buffer: 0x100000@0x89b0e000.
1603 07:41:39.750166 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1604 07:41:39.755357 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1605 07:41:39.758502 ACPI: * FADT
1606 07:41:39.759813 SCI is IRQ9
1607 07:41:39.764498 ACPI: added table 1/32, length now 40
1608 07:41:39.765278 ACPI: * SSDT
1609 07:41:39.769785 Found 1 CPU(s) with 2 core(s) each.
1610 07:41:39.773266 Error: Could not locate 'wifi_sar' in VPD.
1611 07:41:39.777718 Error: failed from getting SAR limits!
1612 07:41:39.781697 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1613 07:41:39.785877 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1614 07:41:39.789966 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1615 07:41:39.794046 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1616 07:41:39.799467 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1617 07:41:39.804180 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1618 07:41:39.809013 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1619 07:41:39.813837 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1620 07:41:39.819154 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1621 07:41:39.825512 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1622 07:41:39.831321 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1623 07:41:39.836775 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1624 07:41:39.841407 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1625 07:41:39.846136 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1626 07:41:39.850321 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1627 07:41:39.856226 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1628 07:41:39.861387 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1629 07:41:39.866617 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1630 07:41:39.872895 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1631 07:41:39.878694 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1632 07:41:39.884218 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1633 07:41:39.889365 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1634 07:41:39.893097 ACPI: added table 2/32, length now 44
1635 07:41:39.895084 ACPI: * MCFG
1636 07:41:39.898448 ACPI: added table 3/32, length now 48
1637 07:41:39.900367 ACPI: * TPM2
1638 07:41:39.902687 TPM2 log created at 89afe000
1639 07:41:39.907258 ACPI: added table 4/32, length now 52
1640 07:41:39.907937 ACPI: * MADT
1641 07:41:39.909956 SCI is IRQ9
1642 07:41:39.913331 ACPI: added table 5/32, length now 56
1643 07:41:39.915215 current = 89c14720
1644 07:41:39.917833 ACPI: * IGD OpRegion
1645 07:41:39.920526 GMA: Found VBT in CBFS
1646 07:41:39.922755 GMA: Found valid VBT in CBFS
1647 07:41:39.926798 ACPI: added table 6/32, length now 60
1648 07:41:39.928354 ACPI: * HPET
1649 07:41:39.932217 ACPI: added table 7/32, length now 64
1650 07:41:39.933551 ACPI: done.
1651 07:41:39.936283 ACPI tables: 30672 bytes.
1652 07:41:39.938947 smbios_write_tables: 89afd000
1653 07:41:39.941088 recv_ec_data: 0x01
1654 07:41:39.943403 Create SMBIOS type 17
1655 07:41:39.946645 PCI: 00:14.3 (Intel WiFi)
1656 07:41:39.949029 SMBIOS tables: 707 bytes.
1657 07:41:39.953482 Writing table forward entry at 0x00000500
1658 07:41:39.959535 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1659 07:41:39.962937 Writing coreboot table at 0x89c33000
1660 07:41:39.968479 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1661 07:41:39.973672 1. 0000000000001000-000000000009ffff: RAM
1662 07:41:39.977475 2. 00000000000a0000-00000000000fffff: RESERVED
1663 07:41:39.982369 3. 0000000000100000-0000000089afcfff: RAM
1664 07:41:39.988066 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1665 07:41:39.993055 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1666 07:41:39.998395 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1667 07:41:40.003023 7. 000000008a000000-000000008f7fffff: RESERVED
1668 07:41:40.008562 8. 00000000e0000000-00000000efffffff: RESERVED
1669 07:41:40.013543 9. 00000000fc000000-00000000fc000fff: RESERVED
1670 07:41:40.018005 10. 00000000fe000000-00000000fe00ffff: RESERVED
1671 07:41:40.022772 11. 00000000fed10000-00000000fed17fff: RESERVED
1672 07:41:40.027856 12. 00000000fed80000-00000000fed83fff: RESERVED
1673 07:41:40.031540 13. 00000000feda0000-00000000feda1fff: RESERVED
1674 07:41:40.036817 14. 0000000100000000-000000016e7fffff: RAM
1675 07:41:40.040959 Graphics framebuffer located at 0xc0000000
1676 07:41:40.043184 Passing 6 GPIOs to payload:
1677 07:41:40.048771 NAME | PORT | POLARITY | VALUE
1678 07:41:40.053733 write protect | 0x000000dc | high | low
1679 07:41:40.058992 recovery | 0x000000d5 | low | high
1680 07:41:40.065044 lid | undefined | high | high
1681 07:41:40.069790 power | undefined | high | low
1682 07:41:40.075188 oprom | undefined | high | low
1683 07:41:40.080283 EC in RW | undefined | high | low
1684 07:41:40.082701 recv_ec_data: 0x01
1685 07:41:40.083598 SKU ID: 3
1686 07:41:40.086777 CBFS @ 1d00000 size 300000
1687 07:41:40.092968 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1688 07:41:40.099244 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d658
1689 07:41:40.101845 coreboot table: 1484 bytes.
1690 07:41:40.105134 IMD ROOT 0. 89fff000 00001000
1691 07:41:40.107943 IMD SMALL 1. 89ffe000 00001000
1692 07:41:40.111229 FSP MEMORY 2. 89d0e000 002f0000
1693 07:41:40.114804 CONSOLE 3. 89cee000 00020000
1694 07:41:40.117676 TIME STAMP 4. 89ced000 00000910
1695 07:41:40.121054 VBOOT WORK 5. 89cea000 00003000
1696 07:41:40.124564 VBOOT 6. 89ce9000 00000c0c
1697 07:41:40.127455 MRC DATA 7. 89ce7000 000018f0
1698 07:41:40.131506 ROMSTG STCK 8. 89ce6000 00000400
1699 07:41:40.135207 AFTER CAR 9. 89cdc000 0000a000
1700 07:41:40.138264 RAMSTAGE 10. 89c80000 0005c000
1701 07:41:40.141580 REFCODE 11. 89c4b000 00035000
1702 07:41:40.144939 SMM BACKUP 12. 89c3b000 00010000
1703 07:41:40.147966 COREBOOT 13. 89c33000 00008000
1704 07:41:40.150746 ACPI 14. 89c0f000 00024000
1705 07:41:40.154594 ACPI GNVS 15. 89c0e000 00001000
1706 07:41:40.157418 RAMOOPS 16. 89b0e000 00100000
1707 07:41:40.161358 TPM2 TCGLOG17. 89afe000 00010000
1708 07:41:40.164139 SMBIOS 18. 89afd000 00000800
1709 07:41:40.166194 IMD small region:
1710 07:41:40.169959 IMD ROOT 0. 89ffec00 00000400
1711 07:41:40.173649 FSP RUNTIME 1. 89ffebe0 00000004
1712 07:41:40.176329 POWER STATE 2. 89ffeba0 00000040
1713 07:41:40.180755 ROMSTAGE 3. 89ffeb80 00000004
1714 07:41:40.183974 MEM INFO 4. 89ffe9c0 000001a9
1715 07:41:40.187339 VPD 5. 89ffe960 00000058
1716 07:41:40.191320 COREBOOTFWD 6. 89ffe920 00000028
1717 07:41:40.193901 MTRR: Physical address space:
1718 07:41:40.200527 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1719 07:41:40.206702 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1720 07:41:40.212459 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1721 07:41:40.219256 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1722 07:41:40.225155 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1723 07:41:40.231309 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1724 07:41:40.237024 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1725 07:41:40.241081 MTRR: Fixed MSR 0x250 0x0606060606060606
1726 07:41:40.245007 MTRR: Fixed MSR 0x258 0x0606060606060606
1727 07:41:40.249357 MTRR: Fixed MSR 0x259 0x0000000000000000
1728 07:41:40.253856 MTRR: Fixed MSR 0x268 0x0606060606060606
1729 07:41:40.257544 MTRR: Fixed MSR 0x269 0x0606060606060606
1730 07:41:40.262030 MTRR: Fixed MSR 0x26a 0x0606060606060606
1731 07:41:40.266246 MTRR: Fixed MSR 0x26b 0x0606060606060606
1732 07:41:40.270355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1733 07:41:40.273951 MTRR: Fixed MSR 0x26d 0x0606060606060606
1734 07:41:40.278453 MTRR: Fixed MSR 0x26e 0x0606060606060606
1735 07:41:40.282505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1736 07:41:40.285472 call enable_fixed_mtrr()
1737 07:41:40.288282 CPU physical address size: 39 bits
1738 07:41:40.292657 MTRR: default type WB/UC MTRR counts: 7/6.
1739 07:41:40.296816 MTRR: UC selected as default type.
1740 07:41:40.302774 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1741 07:41:40.309496 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1742 07:41:40.315724 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1743 07:41:40.321841 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1744 07:41:40.327875 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1745 07:41:40.334061 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1746 07:41:40.334351
1747 07:41:40.335641 MTRR check
1748 07:41:40.338183 Fixed MTRRs : Enabled
1749 07:41:40.340955 Variable MTRRs: Enabled
1750 07:41:40.341071
1751 07:41:40.344510 MTRR: Fixed MSR 0x250 0x0606060606060606
1752 07:41:40.348617 MTRR: Fixed MSR 0x258 0x0606060606060606
1753 07:41:40.353059 MTRR: Fixed MSR 0x259 0x0000000000000000
1754 07:41:40.357520 MTRR: Fixed MSR 0x268 0x0606060606060606
1755 07:41:40.360907 MTRR: Fixed MSR 0x269 0x0606060606060606
1756 07:41:40.365454 MTRR: Fixed MSR 0x26a 0x0606060606060606
1757 07:41:40.368729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1758 07:41:40.373733 MTRR: Fixed MSR 0x26c 0x0606060606060606
1759 07:41:40.377799 MTRR: Fixed MSR 0x26d 0x0606060606060606
1760 07:41:40.381889 MTRR: Fixed MSR 0x26e 0x0606060606060606
1761 07:41:40.385853 MTRR: Fixed MSR 0x26f 0x0606060606060606
1762 07:41:40.391912 BS: BS_WRITE_TABLES times (us): entry 17194 run 490153 exit 149977
1763 07:41:40.394589 call enable_fixed_mtrr()
1764 07:41:40.397862 CBFS @ 1d00000 size 300000
1765 07:41:40.403758 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1766 07:41:40.407288 CBFS: Locating 'fallback/payload'
1767 07:41:40.410962 CPU physical address size: 39 bits
1768 07:41:40.414314 CBFS: Found @ offset 1cf4c0 size 3a954
1769 07:41:40.419212 Checking segment from ROM address 0xffecf4f8
1770 07:41:40.423797 Checking segment from ROM address 0xffecf514
1771 07:41:40.427675 Loading segment from ROM address 0xffecf4f8
1772 07:41:40.430635 code (compression=0)
1773 07:41:40.439529 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1774 07:41:40.447737 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1775 07:41:40.449278 it's not compressed!
1776 07:41:40.531070 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1777 07:41:40.537511 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1778 07:41:40.546664 Loading segment from ROM address 0xffecf514
1779 07:41:40.548883 Entry Point 0x30100018
1780 07:41:40.550661 Loaded segments
1781 07:41:40.560828 Finalizing chipset.
1782 07:41:40.561715 Finalizing SMM.
1783 07:41:40.568358 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158411 exit 11511
1784 07:41:40.571114 mp_park_aps done after 0 msecs.
1785 07:41:40.575365 Jumping to boot code at 30100018(89c33000)
1786 07:41:40.584232 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1787 07:41:40.584943
1788 07:41:40.585035
1789 07:41:40.585612
1790 07:41:40.587792 Starting depthcharge on sarien...
1791 07:41:40.588456 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1792 07:41:40.588569 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1793 07:41:40.588663 Setting prompt string to ['sarien:']
1794 07:41:40.588753 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1795 07:41:40.588924
1796 07:41:40.595681 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1797 07:41:40.596134
1798 07:41:40.604064 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1799 07:41:40.604199
1800 07:41:40.611653 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1801 07:41:40.611790
1802 07:41:40.613593 BIOS MMAP details:
1803 07:41:40.613705
1804 07:41:40.616369 IFD Base Offset : 0x1000000
1805 07:41:40.617032
1806 07:41:40.619888 IFD End Offset : 0x2000000
1807 07:41:40.619999
1808 07:41:40.621916 MMAP Size : 0x1000000
1809 07:41:40.622044
1810 07:41:40.624474 MMAP Start : 0xff000000
1811 07:41:40.625993
1812 07:41:40.631754 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1813 07:41:40.634859
1814 07:41:40.638665 Failed to find BH720 with VID/DID 1217:8620
1815 07:41:40.639000
1816 07:41:40.643418 New NVMe Controller 0x3214e068 @ 00:1d:04
1817 07:41:40.643540
1818 07:41:40.647433 New NVMe Controller 0x3214e130 @ 00:1d:00
1819 07:41:40.647872
1820 07:41:40.653015 The GBB signature is at 0x30000014 and is: 24 47 42 42
1821 07:41:40.656837
1822 07:41:40.658958 Wipe memory regions:
1823 07:41:40.659687
1824 07:41:40.663771 [0x00000000001000, 0x000000000a0000)
1825 07:41:40.663864
1826 07:41:40.667250 [0x00000000100000, 0x00000030000000)
1827 07:41:40.748913
1828 07:41:40.753092 [0x00000032751910, 0x00000089afd000)
1829 07:41:40.903091
1830 07:41:40.907023 [0x00000100000000, 0x0000016e800000)
1831 07:41:41.675817
1832 07:41:41.678730 R8152: Initializing
1833 07:41:41.678868
1834 07:41:41.681258 Version 6 (ocp_data = 5c30)
1835 07:41:41.681889
1836 07:41:41.684601 R8152: Done initializing
1837 07:41:41.685232
1838 07:41:41.685833 Adding net device
1839 07:41:41.686543
1840 07:41:41.691840 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1841 07:41:41.691974
1842 07:41:41.692740
1843 07:41:41.692825
1844 07:41:41.693144 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1846 07:41:41.793537 sarien: tftpboot 192.168.201.1 12435150/tftp-deploy-lr6el52g/kernel/bzImage 12435150/tftp-deploy-lr6el52g/kernel/cmdline 12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
1847 07:41:41.793702 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1848 07:41:41.793798 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1849 07:41:41.836430 tftpboot 192.168.201.1 12435150/tftp-deploy-lr6el52g/kernel/bzImage 12435150/tftp-deploy-lr6el52g/kernel/cmdline 12435150/tftp-deploy-lr6el52g/ramdisk/ramdisk.cpio.gz
1850 07:41:41.836561
1851 07:41:41.836637 Waiting for link
1852 07:41:41.997074
1853 07:41:41.997641 done.
1854 07:41:41.998336
1855 07:41:41.999868 MAC: 00:24:32:30:77:df
1856 07:41:41.999960
1857 07:41:42.002319 Sending DHCP discover... done.
1858 07:41:42.002879
1859 07:41:42.005523 Waiting for reply... done.
1860 07:41:42.005616
1861 07:41:42.008147 Sending DHCP request... done.
1862 07:41:42.009179
1863 07:41:42.010905 Waiting for reply... done.
1864 07:41:42.011179
1865 07:41:42.014607 My ip is 192.168.201.221
1866 07:41:42.014689
1867 07:41:42.017390 The DHCP server ip is 192.168.201.1
1868 07:41:42.017672
1869 07:41:42.023004 TFTP server IP predefined by user: 192.168.201.1
1870 07:41:42.023100
1871 07:41:42.029667 Bootfile predefined by user: 12435150/tftp-deploy-lr6el52g/kernel/bzImage
1872 07:41:42.030261
1873 07:41:42.032939 Sending tftp read request... done.
1874 07:41:42.033030
1875 07:41:42.036988 Waiting for the transfer...
1876 07:41:42.037605
1877 07:41:42.502492 00000000 ################################################################
1878 07:41:42.503152
1879 07:41:42.977952 00080000 ################################################################
1880 07:41:42.978623
1881 07:41:43.450481 00100000 ################################################################
1882 07:41:43.451134
1883 07:41:43.933773 00180000 ################################################################
1884 07:41:43.934197
1885 07:41:44.399112 00200000 ################################################################
1886 07:41:44.399815
1887 07:41:44.876113 00280000 ################################################################
1888 07:41:44.876743
1889 07:41:45.363484 00300000 ################################################################
1890 07:41:45.363838
1891 07:41:45.848225 00380000 ################################################################
1892 07:41:45.848378
1893 07:41:46.338057 00400000 ################################################################
1894 07:41:46.338668
1895 07:41:46.804655 00480000 ################################################################
1896 07:41:46.805025
1897 07:41:47.276334 00500000 ################################################################
1898 07:41:47.276512
1899 07:41:47.782968 00580000 ################################################################
1900 07:41:47.784214
1901 07:41:48.262278 00600000 ################################################################
1902 07:41:48.263086
1903 07:41:48.736534 00680000 ################################################################
1904 07:41:48.737126
1905 07:41:49.234030 00700000 ################################################################
1906 07:41:49.234190
1907 07:41:49.746940 00780000 ################################################################
1908 07:41:49.747339
1909 07:41:49.926284 00800000 ####################### done.
1910 07:41:49.927443
1911 07:41:49.930713 The bootfile was 8572816 bytes long.
1912 07:41:49.930829
1913 07:41:49.933678 Sending tftp read request... done.
1914 07:41:49.933774
1915 07:41:49.936838 Waiting for the transfer...
1916 07:41:49.936925
1917 07:41:50.405360 00000000 ################################################################
1918 07:41:50.406625
1919 07:41:50.954559 00080000 ################################################################
1920 07:41:50.954961
1921 07:41:51.510409 00100000 ################################################################
1922 07:41:51.511179
1923 07:41:51.979053 00180000 ################################################################
1924 07:41:51.980525
1925 07:41:52.451736 00200000 ################################################################
1926 07:41:52.452549
1927 07:41:52.916981 00280000 ################################################################
1928 07:41:52.917557
1929 07:41:53.378542 00300000 ################################################################
1930 07:41:53.379139
1931 07:41:53.852834 00380000 ################################################################
1932 07:41:53.854193
1933 07:41:54.333273 00400000 ################################################################
1934 07:41:54.333689
1935 07:41:54.817109 00480000 ################################################################
1936 07:41:54.817540
1937 07:41:55.276100 00500000 ############################################################### done.
1938 07:41:55.276721
1939 07:41:55.280177 Sending tftp read request... done.
1940 07:41:55.280291
1941 07:41:55.282579 Waiting for the transfer...
1942 07:41:55.282662
1943 07:41:55.284282 00000000 # done.
1944 07:41:55.284948
1945 07:41:55.293407 Command line loaded dynamically from TFTP file: 12435150/tftp-deploy-lr6el52g/kernel/cmdline
1946 07:41:55.293535
1947 07:41:55.322287 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435150/extract-nfsrootfs-yu1t7ytc,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1948 07:41:55.326164
1949 07:41:55.328894 Shutting down all USB controllers.
1950 07:41:55.330302
1951 07:41:55.332363 Removing current net device
1952 07:41:55.333752
1953 07:41:55.335544 EC: exit firmware mode
1954 07:41:55.337291
1955 07:41:55.339357 Finalizing coreboot
1956 07:41:55.339982
1957 07:41:55.344757 Exiting depthcharge with code 4 at timestamp: 21658012
1958 07:41:55.345386
1959 07:41:55.345493
1960 07:41:55.347066 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
1961 07:41:55.347186 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
1962 07:41:55.347281 Setting prompt string to ['Linux version [0-9]']
1963 07:41:55.347362 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1964 07:41:55.347437 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1965 07:41:55.347634 Starting kernel ...
1966 07:41:55.347712
1967 07:41:55.347787
1969 07:46:12.347479 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
1971 07:46:12.347706 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
1973 07:46:12.347883 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1976 07:46:12.348172 end: 2 depthcharge-action (duration 00:05:00) [common]
1978 07:46:12.348427 Cleaning after the job
1979 07:46:12.348537 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/ramdisk
1980 07:46:12.349512 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/kernel
1981 07:46:12.350928 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/nfsrootfs
1982 07:46:12.428128 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435150/tftp-deploy-lr6el52g/modules
1983 07:46:12.428628 start: 5.1 power-off (timeout 00:00:30) [common]
1984 07:46:12.428820 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
1985 07:46:17.594872 >> Command sent successfully.
1986 07:46:17.597702 Returned 0 in 5 seconds
1987 07:46:17.698121 end: 5.1 power-off (duration 00:00:05) [common]
1989 07:46:17.698478 start: 5.2 read-feedback (timeout 00:09:55) [common]
1990 07:46:17.698767 Listened to connection for namespace 'common' for up to 1s
1991 07:46:18.699712 Finalising connection for namespace 'common'
1992 07:46:18.699901 Disconnecting from shell: Finalise
1993 07:46:18.699991
1994 07:46:18.800306 end: 5.2 read-feedback (duration 00:00:01) [common]
1995 07:46:18.800470 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435150
1996 07:46:19.152260 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435150
1997 07:46:19.152470 JobError: Your job cannot terminate cleanly.