Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:41:43.081417 lava-dispatcher, installed at version: 2023.10
2 07:41:43.081639 start: 0 validate
3 07:41:43.081777 Start time: 2024-01-03 07:41:43.081769+00:00 (UTC)
4 07:41:43.081895 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:41:43.082029 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 07:41:43.364928 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:41:43.365103 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:41:43.631893 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:41:43.632781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 07:41:43.906321 validate duration: 0.82
12 07:41:43.906628 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:41:43.906777 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:41:43.906874 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:41:43.907008 Not decompressing ramdisk as can be used compressed.
16 07:41:43.907098 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 07:41:43.907164 saving as /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/ramdisk/rootfs.cpio.gz
18 07:41:43.907229 total size: 35760064 (34 MB)
19 07:41:43.908260 progress 0 % (0 MB)
20 07:41:43.917713 progress 5 % (1 MB)
21 07:41:43.927183 progress 10 % (3 MB)
22 07:41:43.936932 progress 15 % (5 MB)
23 07:41:43.946713 progress 20 % (6 MB)
24 07:41:43.956397 progress 25 % (8 MB)
25 07:41:43.966007 progress 30 % (10 MB)
26 07:41:43.975864 progress 35 % (11 MB)
27 07:41:43.986026 progress 40 % (13 MB)
28 07:41:43.996316 progress 45 % (15 MB)
29 07:41:44.005942 progress 50 % (17 MB)
30 07:41:44.015816 progress 55 % (18 MB)
31 07:41:44.025206 progress 60 % (20 MB)
32 07:41:44.034741 progress 65 % (22 MB)
33 07:41:44.044186 progress 70 % (23 MB)
34 07:41:44.053746 progress 75 % (25 MB)
35 07:41:44.063298 progress 80 % (27 MB)
36 07:41:44.072749 progress 85 % (29 MB)
37 07:41:44.082360 progress 90 % (30 MB)
38 07:41:44.092012 progress 95 % (32 MB)
39 07:41:44.101651 progress 100 % (34 MB)
40 07:41:44.101892 34 MB downloaded in 0.19 s (175.19 MB/s)
41 07:41:44.102071 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:41:44.102323 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:41:44.102414 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:41:44.102503 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:41:44.102646 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 07:41:44.102725 saving as /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/kernel/bzImage
48 07:41:44.102790 total size: 8572816 (8 MB)
49 07:41:44.102855 No compression specified
50 07:41:44.103978 progress 0 % (0 MB)
51 07:41:44.106397 progress 5 % (0 MB)
52 07:41:44.108846 progress 10 % (0 MB)
53 07:41:44.111201 progress 15 % (1 MB)
54 07:41:44.113578 progress 20 % (1 MB)
55 07:41:44.115970 progress 25 % (2 MB)
56 07:41:44.118337 progress 30 % (2 MB)
57 07:41:44.120713 progress 35 % (2 MB)
58 07:41:44.123103 progress 40 % (3 MB)
59 07:41:44.125498 progress 45 % (3 MB)
60 07:41:44.127837 progress 50 % (4 MB)
61 07:41:44.130125 progress 55 % (4 MB)
62 07:41:44.132391 progress 60 % (4 MB)
63 07:41:44.134831 progress 65 % (5 MB)
64 07:41:44.137117 progress 70 % (5 MB)
65 07:41:44.139390 progress 75 % (6 MB)
66 07:41:44.141718 progress 80 % (6 MB)
67 07:41:44.143980 progress 85 % (6 MB)
68 07:41:44.146266 progress 90 % (7 MB)
69 07:41:44.148563 progress 95 % (7 MB)
70 07:41:44.150840 progress 100 % (8 MB)
71 07:41:44.151031 8 MB downloaded in 0.05 s (169.48 MB/s)
72 07:41:44.151182 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:41:44.151419 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:41:44.151508 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:41:44.151601 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:41:44.151742 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 07:41:44.151819 saving as /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/modules/modules.tar
79 07:41:44.151885 total size: 251144 (0 MB)
80 07:41:44.151949 Using unxz to decompress xz
81 07:41:44.156320 progress 13 % (0 MB)
82 07:41:44.156749 progress 26 % (0 MB)
83 07:41:44.156994 progress 39 % (0 MB)
84 07:41:44.158635 progress 52 % (0 MB)
85 07:41:44.160603 progress 65 % (0 MB)
86 07:41:44.162507 progress 78 % (0 MB)
87 07:41:44.164363 progress 91 % (0 MB)
88 07:41:44.166342 progress 100 % (0 MB)
89 07:41:44.172125 0 MB downloaded in 0.02 s (11.84 MB/s)
90 07:41:44.172381 end: 1.3.1 http-download (duration 00:00:00) [common]
92 07:41:44.172678 end: 1.3 download-retry (duration 00:00:00) [common]
93 07:41:44.172793 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 07:41:44.172907 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 07:41:44.172996 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 07:41:44.173089 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 07:41:44.173322 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap
98 07:41:44.173465 makedir: /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin
99 07:41:44.173577 makedir: /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/tests
100 07:41:44.173683 makedir: /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/results
101 07:41:44.173804 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-add-keys
102 07:41:44.173959 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-add-sources
103 07:41:44.174098 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-background-process-start
104 07:41:44.174239 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-background-process-stop
105 07:41:44.174372 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-common-functions
106 07:41:44.174504 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-echo-ipv4
107 07:41:44.174636 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-install-packages
108 07:41:44.174768 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-installed-packages
109 07:41:44.174899 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-os-build
110 07:41:44.175031 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-probe-channel
111 07:41:44.175170 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-probe-ip
112 07:41:44.175302 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-target-ip
113 07:41:44.175435 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-target-mac
114 07:41:44.175565 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-target-storage
115 07:41:44.175698 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-case
116 07:41:44.175830 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-event
117 07:41:44.175961 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-feedback
118 07:41:44.176099 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-raise
119 07:41:44.176235 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-reference
120 07:41:44.176370 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-runner
121 07:41:44.176504 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-set
122 07:41:44.176638 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-test-shell
123 07:41:44.176772 Updating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-install-packages (oe)
124 07:41:44.176935 Updating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/bin/lava-installed-packages (oe)
125 07:41:44.177066 Creating /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/environment
126 07:41:44.177178 LAVA metadata
127 07:41:44.177256 - LAVA_JOB_ID=12435192
128 07:41:44.177322 - LAVA_DISPATCHER_IP=192.168.201.1
129 07:41:44.177428 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 07:41:44.177499 skipped lava-vland-overlay
131 07:41:44.177579 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 07:41:44.177664 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 07:41:44.177729 skipped lava-multinode-overlay
134 07:41:44.177804 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 07:41:44.177887 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 07:41:44.177966 Loading test definitions
137 07:41:44.178067 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 07:41:44.178150 Using /lava-12435192 at stage 0
139 07:41:44.178468 uuid=12435192_1.4.2.3.1 testdef=None
140 07:41:44.178563 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 07:41:44.178650 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 07:41:44.179183 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 07:41:44.179414 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 07:41:44.180043 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 07:41:44.180285 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 07:41:44.180908 runner path: /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/0/tests/0_cros-ec test_uuid 12435192_1.4.2.3.1
149 07:41:44.181070 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 07:41:44.181286 Creating lava-test-runner.conf files
152 07:41:44.181351 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435192/lava-overlay-xsjr81ap/lava-12435192/0 for stage 0
153 07:41:44.181446 - 0_cros-ec
154 07:41:44.181548 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 07:41:44.181635 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 07:41:44.188391 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 07:41:44.188498 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 07:41:44.188587 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 07:41:44.188675 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 07:41:44.188762 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 07:41:45.240767 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 07:41:45.241169 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 07:41:45.241291 extracting modules file /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435192/extract-overlay-ramdisk-ookyalrt/ramdisk
164 07:41:45.255893 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 07:41:45.256029 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 07:41:45.256160 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435192/compress-overlay-5vfb2fd2/overlay-1.4.2.4.tar.gz to ramdisk
167 07:41:45.256234 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435192/compress-overlay-5vfb2fd2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435192/extract-overlay-ramdisk-ookyalrt/ramdisk
168 07:41:45.263702 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 07:41:45.263821 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 07:41:45.263914 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 07:41:45.264006 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 07:41:45.264142 Building ramdisk /var/lib/lava/dispatcher/tmp/12435192/extract-overlay-ramdisk-ookyalrt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435192/extract-overlay-ramdisk-ookyalrt/ramdisk
173 07:41:45.829192 >> 184084 blocks
174 07:41:49.508532 rename /var/lib/lava/dispatcher/tmp/12435192/extract-overlay-ramdisk-ookyalrt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
175 07:41:49.508989 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 07:41:49.509110 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
177 07:41:49.509210 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
178 07:41:49.509317 No mkimage arch provided, not using FIT.
179 07:41:49.509409 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 07:41:49.509494 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 07:41:49.509599 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 07:41:49.509692 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
183 07:41:49.509777 No LXC device requested
184 07:41:49.509856 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 07:41:49.509943 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
186 07:41:49.510027 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 07:41:49.510099 Checking files for TFTP limit of 4294967296 bytes.
188 07:41:49.510508 end: 1 tftp-deploy (duration 00:00:06) [common]
189 07:41:49.510609 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 07:41:49.510698 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 07:41:49.510820 substitutions:
192 07:41:49.510887 - {DTB}: None
193 07:41:49.510947 - {INITRD}: 12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
194 07:41:49.511006 - {KERNEL}: 12435192/tftp-deploy-aiwvmot4/kernel/bzImage
195 07:41:49.511063 - {LAVA_MAC}: None
196 07:41:49.511118 - {PRESEED_CONFIG}: None
197 07:41:49.511173 - {PRESEED_LOCAL}: None
198 07:41:49.511227 - {RAMDISK}: 12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
199 07:41:49.511281 - {ROOT_PART}: None
200 07:41:49.511335 - {ROOT}: None
201 07:41:49.511388 - {SERVER_IP}: 192.168.201.1
202 07:41:49.511440 - {TEE}: None
203 07:41:49.511493 Parsed boot commands:
204 07:41:49.511546 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 07:41:49.511721 Parsed boot commands: tftpboot 192.168.201.1 12435192/tftp-deploy-aiwvmot4/kernel/bzImage 12435192/tftp-deploy-aiwvmot4/kernel/cmdline 12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
206 07:41:49.511809 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 07:41:49.511894 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 07:41:49.511988 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 07:41:49.512106 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 07:41:49.512194 Not connected, no need to disconnect.
211 07:41:49.512268 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 07:41:49.512353 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 07:41:49.512417 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
214 07:41:49.516470 Setting prompt string to ['lava-test: # ']
215 07:41:49.516866 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 07:41:49.516973 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 07:41:49.517066 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 07:41:49.517155 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 07:41:49.517370 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
220 07:41:54.670320 >> Command sent successfully.
221 07:41:54.681471 Returned 0 in 5 seconds
222 07:41:54.782706 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 07:41:54.784378 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 07:41:54.784879 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 07:41:54.785363 Setting prompt string to 'Starting depthcharge on Voema...'
227 07:41:54.785874 Changing prompt to 'Starting depthcharge on Voema...'
228 07:41:54.786251 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 07:41:54.787518 [Enter `^Ec?' for help]
230 07:41:56.340578
231 07:41:56.341208
232 07:41:56.350451 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 07:41:56.354400 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 07:41:56.360596 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 07:41:56.363857 CPU: AES supported, TXT NOT supported, VT supported
236 07:41:56.370740 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 07:41:56.377236 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 07:41:56.380170 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 07:41:56.383689 VBOOT: Loading verstage.
240 07:41:56.390232 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 07:41:56.393786 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 07:41:56.397198 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 07:41:56.407697 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 07:41:56.414467 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 07:41:56.414998
246 07:41:56.415340
247 07:41:56.427328 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 07:41:56.441627 Probing TPM: . done!
249 07:41:56.444451 TPM ready after 0 ms
250 07:41:56.447670 Connected to device vid:did:rid of 1ae0:0028:00
251 07:41:56.459162 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
252 07:41:56.466139 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 07:41:56.469628 Initialized TPM device CR50 revision 0
254 07:41:56.521086 tlcl_send_startup: Startup return code is 0
255 07:41:56.521620 TPM: setup succeeded
256 07:41:56.536244 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 07:41:56.551931 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 07:41:56.565572 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 07:41:56.575210 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 07:41:56.579683 Chrome EC: UHEPI supported
261 07:41:56.583287 Phase 1
262 07:41:56.586391 FMAP: area GBB found @ 1805000 (458752 bytes)
263 07:41:56.596157 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 07:41:56.602847 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 07:41:56.609789 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 07:41:56.616144 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 07:41:56.619257 Recovery requested (1009000e)
268 07:41:56.622878 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 07:41:56.634297 tlcl_extend: response is 0
270 07:41:56.641149 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 07:41:56.651285 tlcl_extend: response is 0
272 07:41:56.657598 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 07:41:56.664254 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 07:41:56.671014 BS: verstage times (exec / console): total (unknown) / 142 ms
275 07:41:56.671451
276 07:41:56.671798
277 07:41:56.684167 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 07:41:56.690730 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 07:41:56.694059 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 07:41:56.697274 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 07:41:56.704157 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 07:41:56.706994 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 07:41:56.711146 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 07:41:56.713664 TCO_STS: 0000 0000
285 07:41:56.717099 GEN_PMCON: d0015038 00002200
286 07:41:56.720588 GBLRST_CAUSE: 00000000 00000000
287 07:41:56.721019 HPR_CAUSE0: 00000000
288 07:41:56.724132 prev_sleep_state 5
289 07:41:56.727223 Boot Count incremented to 25534
290 07:41:56.733479 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 07:41:56.740215 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 07:41:56.747064 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 07:41:56.753166 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 07:41:56.757710 Chrome EC: UHEPI supported
295 07:41:56.764162 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 07:41:56.777245 Probing TPM: done!
297 07:41:56.784662 Connected to device vid:did:rid of 1ae0:0028:00
298 07:41:56.795009 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
299 07:41:56.798038 Initialized TPM device CR50 revision 0
300 07:41:56.812290 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 07:41:56.819216 MRC: Hash idx 0x100b comparison successful.
302 07:41:56.822205 MRC cache found, size faa8
303 07:41:56.822289 bootmode is set to: 2
304 07:41:56.825615 SPD index = 0
305 07:41:56.832330 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 07:41:56.835705 SPD: module type is LPDDR4X
307 07:41:56.838797 SPD: module part number is MT53E512M64D4NW-046
308 07:41:56.845541 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 07:41:56.849009 SPD: device width 16 bits, bus width 16 bits
310 07:41:56.855686 SPD: module size is 1024 MB (per channel)
311 07:41:57.287358 CBMEM:
312 07:41:57.290978 IMD: root @ 0x76fff000 254 entries.
313 07:41:57.294082 IMD: root @ 0x76ffec00 62 entries.
314 07:41:57.297639 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 07:41:57.304140 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 07:41:57.307347 External stage cache:
317 07:41:57.310632 IMD: root @ 0x7b3ff000 254 entries.
318 07:41:57.314027 IMD: root @ 0x7b3fec00 62 entries.
319 07:41:57.329105 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 07:41:57.335563 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 07:41:57.342489 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 07:41:57.356472 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 07:41:57.360155 cse_lite: Skip switching to RW in the recovery path
324 07:41:57.363672 8 DIMMs found
325 07:41:57.364228 SMM Memory Map
326 07:41:57.367628 SMRAM : 0x7b000000 0x800000
327 07:41:57.370680 Subregion 0: 0x7b000000 0x200000
328 07:41:57.373948 Subregion 1: 0x7b200000 0x200000
329 07:41:57.377731 Subregion 2: 0x7b400000 0x400000
330 07:41:57.380740 top_of_ram = 0x77000000
331 07:41:57.387361 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 07:41:57.390704 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 07:41:57.397328 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 07:41:57.400694 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 07:41:57.410201 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 07:41:57.416676 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 07:41:57.426915 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 07:41:57.430138 Processing 211 relocs. Offset value of 0x74c0b000
339 07:41:57.439204 BS: romstage times (exec / console): total (unknown) / 277 ms
340 07:41:57.445914
341 07:41:57.446458
342 07:41:57.455449 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 07:41:57.458786 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 07:41:57.468446 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 07:41:57.475291 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 07:41:57.482115 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 07:41:57.489045 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 07:41:57.535266 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 07:41:57.541710 Processing 5008 relocs. Offset value of 0x75d98000
350 07:41:57.544580 BS: postcar times (exec / console): total (unknown) / 59 ms
351 07:41:57.547894
352 07:41:57.547996
353 07:41:57.558454 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 07:41:57.558552 Normal boot
355 07:41:57.562302 FW_CONFIG value is 0x804c02
356 07:41:57.565971 PCI: 00:07.0 disabled by fw_config
357 07:41:57.568393 PCI: 00:07.1 disabled by fw_config
358 07:41:57.572145 PCI: 00:0d.2 disabled by fw_config
359 07:41:57.575400 PCI: 00:1c.7 disabled by fw_config
360 07:41:57.582342 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 07:41:57.588484 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 07:41:57.592111 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 07:41:57.595531 GENERIC: 0.0 disabled by fw_config
364 07:41:57.598817 GENERIC: 1.0 disabled by fw_config
365 07:41:57.605352 fw_config match found: DB_USB=USB3_ACTIVE
366 07:41:57.608434 fw_config match found: DB_USB=USB3_ACTIVE
367 07:41:57.612186 fw_config match found: DB_USB=USB3_ACTIVE
368 07:41:57.615259 fw_config match found: DB_USB=USB3_ACTIVE
369 07:41:57.622094 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 07:41:57.628783 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 07:41:57.638849 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 07:41:57.645588 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 07:41:57.648266 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 07:41:57.655278 microcode: Update skipped, already up-to-date
375 07:41:57.661657 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 07:41:57.688903 Detected 4 core, 8 thread CPU.
377 07:41:57.692165 Setting up SMI for CPU
378 07:41:57.695892 IED base = 0x7b400000
379 07:41:57.696513 IED size = 0x00400000
380 07:41:57.699405 Will perform SMM setup.
381 07:41:57.705259 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 07:41:57.712387 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 07:41:57.718816 Processing 16 relocs. Offset value of 0x00030000
384 07:41:57.722509 Attempting to start 7 APs
385 07:41:57.725379 Waiting for 10ms after sending INIT.
386 07:41:57.741197 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 07:41:57.743976 AP: slot 4 apic_id 7.
388 07:41:57.747759 AP: slot 5 apic_id 6.
389 07:41:57.748299 AP: slot 2 apic_id 3.
390 07:41:57.751044 AP: slot 3 apic_id 4.
391 07:41:57.754321 AP: slot 7 apic_id 5.
392 07:41:57.754748 AP: slot 6 apic_id 2.
393 07:41:57.755087 done.
394 07:41:57.760682 Waiting for 2nd SIPI to complete...done.
395 07:41:57.767848 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 07:41:57.774268 Processing 13 relocs. Offset value of 0x00038000
397 07:41:57.777442 Unable to locate Global NVS
398 07:41:57.783835 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 07:41:57.787447 Installing permanent SMM handler to 0x7b000000
400 07:41:57.797609 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 07:41:57.800327 Processing 794 relocs. Offset value of 0x7b010000
402 07:41:57.810491 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 07:41:57.813747 Processing 13 relocs. Offset value of 0x7b008000
404 07:41:57.820837 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 07:41:57.826979 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 07:41:57.830170 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 07:41:57.836768 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 07:41:57.843537 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 07:41:57.850407 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 07:41:57.857089 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 07:41:57.857517 Unable to locate Global NVS
412 07:41:57.866728 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 07:41:57.870300 Clearing SMI status registers
414 07:41:57.870725 SMI_STS: PM1
415 07:41:57.873964 PM1_STS: PWRBTN
416 07:41:57.879776 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 07:41:57.883133 In relocation handler: CPU 0
418 07:41:57.886833 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 07:41:57.893804 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 07:41:57.894337 Relocation complete.
421 07:41:57.903577 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 07:41:57.906940 In relocation handler: CPU 1
423 07:41:57.910020 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 07:41:57.910592 Relocation complete.
425 07:41:57.920022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
426 07:41:57.923744 In relocation handler: CPU 5
427 07:41:57.926410 New SMBASE=0x7affec00 IEDBASE=0x7b400000
428 07:41:57.929797 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 07:41:57.933591 Relocation complete.
430 07:41:57.939726 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
431 07:41:57.943101 In relocation handler: CPU 4
432 07:41:57.946912 New SMBASE=0x7afff000 IEDBASE=0x7b400000
433 07:41:57.949888 Relocation complete.
434 07:41:57.956553 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
435 07:41:57.959777 In relocation handler: CPU 2
436 07:41:57.962987 New SMBASE=0x7afff800 IEDBASE=0x7b400000
437 07:41:57.966274 Relocation complete.
438 07:41:57.972831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
439 07:41:57.976421 In relocation handler: CPU 6
440 07:41:57.979873 New SMBASE=0x7affe800 IEDBASE=0x7b400000
441 07:41:57.986103 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 07:41:57.986681 Relocation complete.
443 07:41:57.992921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
444 07:41:57.996255 In relocation handler: CPU 7
445 07:41:58.002697 New SMBASE=0x7affe400 IEDBASE=0x7b400000
446 07:41:58.003145 Relocation complete.
447 07:41:58.009449 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
448 07:41:58.013399 In relocation handler: CPU 3
449 07:41:58.019217 New SMBASE=0x7afff400 IEDBASE=0x7b400000
450 07:41:58.022766 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 07:41:58.026210 Relocation complete.
452 07:41:58.026780 Initializing CPU #0
453 07:41:58.029707 CPU: vendor Intel device 806c1
454 07:41:58.033202 CPU: family 06, model 8c, stepping 01
455 07:41:58.036642 Clearing out pending MCEs
456 07:41:58.040028 Setting up local APIC...
457 07:41:58.040519 apic_id: 0x00 done.
458 07:41:58.043408 Turbo is available but hidden
459 07:41:58.046956 Turbo is available and visible
460 07:41:58.053327 microcode: Update skipped, already up-to-date
461 07:41:58.053778 CPU #0 initialized
462 07:41:58.056611 Initializing CPU #7
463 07:41:58.060045 Initializing CPU #3
464 07:41:58.063216 CPU: vendor Intel device 806c1
465 07:41:58.066560 CPU: family 06, model 8c, stepping 01
466 07:41:58.069689 CPU: vendor Intel device 806c1
467 07:41:58.073071 CPU: family 06, model 8c, stepping 01
468 07:41:58.076362 Clearing out pending MCEs
469 07:41:58.076831 Clearing out pending MCEs
470 07:41:58.079751 Setting up local APIC...
471 07:41:58.083243 Initializing CPU #2
472 07:41:58.083757 Initializing CPU #6
473 07:41:58.086616 CPU: vendor Intel device 806c1
474 07:41:58.090019 CPU: family 06, model 8c, stepping 01
475 07:41:58.093391 CPU: vendor Intel device 806c1
476 07:41:58.099747 CPU: family 06, model 8c, stepping 01
477 07:41:58.100225 Clearing out pending MCEs
478 07:41:58.103204 Clearing out pending MCEs
479 07:41:58.106482 Setting up local APIC...
480 07:41:58.109824 Initializing CPU #5
481 07:41:58.110248 Initializing CPU #4
482 07:41:58.113205 CPU: vendor Intel device 806c1
483 07:41:58.116574 CPU: family 06, model 8c, stepping 01
484 07:41:58.119950 CPU: vendor Intel device 806c1
485 07:41:58.122856 CPU: family 06, model 8c, stepping 01
486 07:41:58.126641 Clearing out pending MCEs
487 07:41:58.129741 Clearing out pending MCEs
488 07:41:58.132930 Setting up local APIC...
489 07:41:58.133471 Initializing CPU #1
490 07:41:58.136424 Setting up local APIC...
491 07:41:58.139307 Setting up local APIC...
492 07:41:58.139735 apic_id: 0x06 done.
493 07:41:58.142924 apic_id: 0x07 done.
494 07:41:58.149446 microcode: Update skipped, already up-to-date
495 07:41:58.152812 microcode: Update skipped, already up-to-date
496 07:41:58.153239 CPU #5 initialized
497 07:41:58.156374 CPU #4 initialized
498 07:41:58.159181 CPU: vendor Intel device 806c1
499 07:41:58.162581 CPU: family 06, model 8c, stepping 01
500 07:41:58.166095 Clearing out pending MCEs
501 07:41:58.169512 apic_id: 0x03 done.
502 07:41:58.169934 apic_id: 0x02 done.
503 07:41:58.176178 microcode: Update skipped, already up-to-date
504 07:41:58.179323 microcode: Update skipped, already up-to-date
505 07:41:58.182753 CPU #2 initialized
506 07:41:58.183176 CPU #6 initialized
507 07:41:58.185883 Setting up local APIC...
508 07:41:58.189199 Setting up local APIC...
509 07:41:58.189626 apic_id: 0x01 done.
510 07:41:58.192577 apic_id: 0x04 done.
511 07:41:58.196111 apic_id: 0x05 done.
512 07:41:58.199662 microcode: Update skipped, already up-to-date
513 07:41:58.203065 microcode: Update skipped, already up-to-date
514 07:41:58.209227 microcode: Update skipped, already up-to-date
515 07:41:58.209742 CPU #7 initialized
516 07:41:58.212607 CPU #3 initialized
517 07:41:58.216256 CPU #1 initialized
518 07:41:58.219675 bsp_do_flight_plan done after 454 msecs.
519 07:41:58.222911 CPU: frequency set to 4000 MHz
520 07:41:58.223439 Enabling SMIs.
521 07:41:58.228944 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 07:41:58.245589 SATAXPCIE1 indicates PCIe NVMe is present
523 07:41:58.248864 Probing TPM: done!
524 07:41:58.252479 Connected to device vid:did:rid of 1ae0:0028:00
525 07:41:58.263285 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
526 07:41:58.266570 Initialized TPM device CR50 revision 0
527 07:41:58.269417 Enabling S0i3.4
528 07:41:58.276592 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 07:41:58.279409 Found a VBT of 8704 bytes after decompression
530 07:41:58.286257 cse_lite: CSE RO boot. HybridStorageMode disabled
531 07:41:58.293137 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 07:41:58.369660 FSPS returned 0
533 07:41:58.372617 Executing Phase 1 of FspMultiPhaseSiInit
534 07:41:58.382545 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 07:41:58.385948 port C0 DISC req: usage 1 usb3 1 usb2 5
536 07:41:58.389415 Raw Buffer output 0 00000511
537 07:41:58.393016 Raw Buffer output 1 00000000
538 07:41:58.396122 pmc_send_ipc_cmd succeeded
539 07:41:58.403017 port C1 DISC req: usage 1 usb3 2 usb2 3
540 07:41:58.403596 Raw Buffer output 0 00000321
541 07:41:58.406164 Raw Buffer output 1 00000000
542 07:41:58.410204 pmc_send_ipc_cmd succeeded
543 07:41:58.415339 Detected 4 core, 8 thread CPU.
544 07:41:58.418710 Detected 4 core, 8 thread CPU.
545 07:41:58.652881 Display FSP Version Info HOB
546 07:41:58.655896 Reference Code - CPU = a.0.4c.31
547 07:41:58.659679 uCode Version = 0.0.0.86
548 07:41:58.662556 TXT ACM version = ff.ff.ff.ffff
549 07:41:58.666283 Reference Code - ME = a.0.4c.31
550 07:41:58.669234 MEBx version = 0.0.0.0
551 07:41:58.672489 ME Firmware Version = Consumer SKU
552 07:41:58.675957 Reference Code - PCH = a.0.4c.31
553 07:41:58.679119 PCH-CRID Status = Disabled
554 07:41:58.683025 PCH-CRID Original Value = ff.ff.ff.ffff
555 07:41:58.686134 PCH-CRID New Value = ff.ff.ff.ffff
556 07:41:58.689303 OPROM - RST - RAID = ff.ff.ff.ffff
557 07:41:58.692513 PCH Hsio Version = 4.0.0.0
558 07:41:58.695807 Reference Code - SA - System Agent = a.0.4c.31
559 07:41:58.699325 Reference Code - MRC = 2.0.0.1
560 07:41:58.702623 SA - PCIe Version = a.0.4c.31
561 07:41:58.705961 SA-CRID Status = Disabled
562 07:41:58.709220 SA-CRID Original Value = 0.0.0.1
563 07:41:58.712512 SA-CRID New Value = 0.0.0.1
564 07:41:58.715879 OPROM - VBIOS = ff.ff.ff.ffff
565 07:41:58.719055 IO Manageability Engine FW Version = 11.1.4.0
566 07:41:58.722504 PHY Build Version = 0.0.0.e0
567 07:41:58.726025 Thunderbolt(TM) FW Version = 0.0.0.0
568 07:41:58.732805 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 07:41:58.735843 ITSS IRQ Polarities Before:
570 07:41:58.736530 IPC0: 0xffffffff
571 07:41:58.739132 IPC1: 0xffffffff
572 07:41:58.739702 IPC2: 0xffffffff
573 07:41:58.742226 IPC3: 0xffffffff
574 07:41:58.745761 ITSS IRQ Polarities After:
575 07:41:58.746233 IPC0: 0xffffffff
576 07:41:58.749161 IPC1: 0xffffffff
577 07:41:58.749689 IPC2: 0xffffffff
578 07:41:58.752236 IPC3: 0xffffffff
579 07:41:58.755507 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 07:41:58.768938 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 07:41:58.778601 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 07:41:58.791899 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 07:41:58.798931 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
584 07:41:58.801496 Enumerating buses...
585 07:41:58.804897 Show all devs... Before device enumeration.
586 07:41:58.808502 Root Device: enabled 1
587 07:41:58.809032 DOMAIN: 0000: enabled 1
588 07:41:58.811985 CPU_CLUSTER: 0: enabled 1
589 07:41:58.815511 PCI: 00:00.0: enabled 1
590 07:41:58.818030 PCI: 00:02.0: enabled 1
591 07:41:58.818453 PCI: 00:04.0: enabled 1
592 07:41:58.821733 PCI: 00:05.0: enabled 1
593 07:41:58.824711 PCI: 00:06.0: enabled 0
594 07:41:58.828087 PCI: 00:07.0: enabled 0
595 07:41:58.828525 PCI: 00:07.1: enabled 0
596 07:41:58.831375 PCI: 00:07.2: enabled 0
597 07:41:58.834607 PCI: 00:07.3: enabled 0
598 07:41:58.838076 PCI: 00:08.0: enabled 1
599 07:41:58.838503 PCI: 00:09.0: enabled 0
600 07:41:58.841583 PCI: 00:0a.0: enabled 0
601 07:41:58.845012 PCI: 00:0d.0: enabled 1
602 07:41:58.848633 PCI: 00:0d.1: enabled 0
603 07:41:58.849157 PCI: 00:0d.2: enabled 0
604 07:41:58.851660 PCI: 00:0d.3: enabled 0
605 07:41:58.854974 PCI: 00:0e.0: enabled 0
606 07:41:58.857960 PCI: 00:10.2: enabled 1
607 07:41:58.858485 PCI: 00:10.6: enabled 0
608 07:41:58.861172 PCI: 00:10.7: enabled 0
609 07:41:58.864433 PCI: 00:12.0: enabled 0
610 07:41:58.864874 PCI: 00:12.6: enabled 0
611 07:41:58.868082 PCI: 00:13.0: enabled 0
612 07:41:58.871060 PCI: 00:14.0: enabled 1
613 07:41:58.874828 PCI: 00:14.1: enabled 0
614 07:41:58.875380 PCI: 00:14.2: enabled 1
615 07:41:58.877869 PCI: 00:14.3: enabled 1
616 07:41:58.881181 PCI: 00:15.0: enabled 1
617 07:41:58.884591 PCI: 00:15.1: enabled 1
618 07:41:58.885017 PCI: 00:15.2: enabled 1
619 07:41:58.887759 PCI: 00:15.3: enabled 1
620 07:41:58.891258 PCI: 00:16.0: enabled 1
621 07:41:58.894328 PCI: 00:16.1: enabled 0
622 07:41:58.894872 PCI: 00:16.2: enabled 0
623 07:41:58.897291 PCI: 00:16.3: enabled 0
624 07:41:58.900706 PCI: 00:16.4: enabled 0
625 07:41:58.904520 PCI: 00:16.5: enabled 0
626 07:41:58.905046 PCI: 00:17.0: enabled 1
627 07:41:58.907935 PCI: 00:19.0: enabled 0
628 07:41:58.911352 PCI: 00:19.1: enabled 1
629 07:41:58.911880 PCI: 00:19.2: enabled 0
630 07:41:58.914416 PCI: 00:1c.0: enabled 1
631 07:41:58.917542 PCI: 00:1c.1: enabled 0
632 07:41:58.920906 PCI: 00:1c.2: enabled 0
633 07:41:58.921429 PCI: 00:1c.3: enabled 0
634 07:41:58.924472 PCI: 00:1c.4: enabled 0
635 07:41:58.927937 PCI: 00:1c.5: enabled 0
636 07:41:58.930635 PCI: 00:1c.6: enabled 1
637 07:41:58.931065 PCI: 00:1c.7: enabled 0
638 07:41:58.934040 PCI: 00:1d.0: enabled 1
639 07:41:58.937630 PCI: 00:1d.1: enabled 0
640 07:41:58.940711 PCI: 00:1d.2: enabled 1
641 07:41:58.941138 PCI: 00:1d.3: enabled 0
642 07:41:58.944025 PCI: 00:1e.0: enabled 1
643 07:41:58.947026 PCI: 00:1e.1: enabled 0
644 07:41:58.950462 PCI: 00:1e.2: enabled 1
645 07:41:58.950889 PCI: 00:1e.3: enabled 1
646 07:41:58.953974 PCI: 00:1f.0: enabled 1
647 07:41:58.957334 PCI: 00:1f.1: enabled 0
648 07:41:58.960590 PCI: 00:1f.2: enabled 1
649 07:41:58.961117 PCI: 00:1f.3: enabled 1
650 07:41:58.963708 PCI: 00:1f.4: enabled 0
651 07:41:58.967061 PCI: 00:1f.5: enabled 1
652 07:41:58.967582 PCI: 00:1f.6: enabled 0
653 07:41:58.970377 PCI: 00:1f.7: enabled 0
654 07:41:58.973852 APIC: 00: enabled 1
655 07:41:58.976888 GENERIC: 0.0: enabled 1
656 07:41:58.977398 GENERIC: 0.0: enabled 1
657 07:41:58.980134 GENERIC: 1.0: enabled 1
658 07:41:58.983845 GENERIC: 0.0: enabled 1
659 07:41:58.987343 GENERIC: 1.0: enabled 1
660 07:41:58.987867 USB0 port 0: enabled 1
661 07:41:58.990073 GENERIC: 0.0: enabled 1
662 07:41:58.993722 USB0 port 0: enabled 1
663 07:41:58.994150 GENERIC: 0.0: enabled 1
664 07:41:58.996675 I2C: 00:1a: enabled 1
665 07:41:59.000453 I2C: 00:31: enabled 1
666 07:41:59.000979 I2C: 00:32: enabled 1
667 07:41:59.003630 I2C: 00:10: enabled 1
668 07:41:59.006969 I2C: 00:15: enabled 1
669 07:41:59.010685 GENERIC: 0.0: enabled 0
670 07:41:59.011210 GENERIC: 1.0: enabled 0
671 07:41:59.013332 GENERIC: 0.0: enabled 1
672 07:41:59.016757 SPI: 00: enabled 1
673 07:41:59.017181 SPI: 00: enabled 1
674 07:41:59.020177 PNP: 0c09.0: enabled 1
675 07:41:59.023783 GENERIC: 0.0: enabled 1
676 07:41:59.024387 USB3 port 0: enabled 1
677 07:41:59.026477 USB3 port 1: enabled 1
678 07:41:59.030126 USB3 port 2: enabled 0
679 07:41:59.030554 USB3 port 3: enabled 0
680 07:41:59.033250 USB2 port 0: enabled 0
681 07:41:59.036873 USB2 port 1: enabled 1
682 07:41:59.040120 USB2 port 2: enabled 1
683 07:41:59.040552 USB2 port 3: enabled 0
684 07:41:59.043624 USB2 port 4: enabled 1
685 07:41:59.046837 USB2 port 5: enabled 0
686 07:41:59.047439 USB2 port 6: enabled 0
687 07:41:59.049959 USB2 port 7: enabled 0
688 07:41:59.053181 USB2 port 8: enabled 0
689 07:41:59.056292 USB2 port 9: enabled 0
690 07:41:59.056786 USB3 port 0: enabled 0
691 07:41:59.059696 USB3 port 1: enabled 1
692 07:41:59.063089 USB3 port 2: enabled 0
693 07:41:59.063519 USB3 port 3: enabled 0
694 07:41:59.066493 GENERIC: 0.0: enabled 1
695 07:41:59.069842 GENERIC: 1.0: enabled 1
696 07:41:59.073477 APIC: 01: enabled 1
697 07:41:59.074006 APIC: 03: enabled 1
698 07:41:59.076752 APIC: 04: enabled 1
699 07:41:59.077179 APIC: 07: enabled 1
700 07:41:59.079883 APIC: 06: enabled 1
701 07:41:59.083024 APIC: 02: enabled 1
702 07:41:59.083550 APIC: 05: enabled 1
703 07:41:59.086385 Compare with tree...
704 07:41:59.089405 Root Device: enabled 1
705 07:41:59.089834 DOMAIN: 0000: enabled 1
706 07:41:59.092618 PCI: 00:00.0: enabled 1
707 07:41:59.096236 PCI: 00:02.0: enabled 1
708 07:41:59.099521 PCI: 00:04.0: enabled 1
709 07:41:59.102883 GENERIC: 0.0: enabled 1
710 07:41:59.103448 PCI: 00:05.0: enabled 1
711 07:41:59.106162 PCI: 00:06.0: enabled 0
712 07:41:59.109664 PCI: 00:07.0: enabled 0
713 07:41:59.112848 GENERIC: 0.0: enabled 1
714 07:41:59.116000 PCI: 00:07.1: enabled 0
715 07:41:59.116496 GENERIC: 1.0: enabled 1
716 07:41:59.119379 PCI: 00:07.2: enabled 0
717 07:41:59.122336 GENERIC: 0.0: enabled 1
718 07:41:59.125775 PCI: 00:07.3: enabled 0
719 07:41:59.129571 GENERIC: 1.0: enabled 1
720 07:41:59.130099 PCI: 00:08.0: enabled 1
721 07:41:59.132324 PCI: 00:09.0: enabled 0
722 07:41:59.135617 PCI: 00:0a.0: enabled 0
723 07:41:59.139259 PCI: 00:0d.0: enabled 1
724 07:41:59.142558 USB0 port 0: enabled 1
725 07:41:59.142982 USB3 port 0: enabled 1
726 07:41:59.146041 USB3 port 1: enabled 1
727 07:41:59.148939 USB3 port 2: enabled 0
728 07:41:59.152418 USB3 port 3: enabled 0
729 07:41:59.155878 PCI: 00:0d.1: enabled 0
730 07:41:59.158707 PCI: 00:0d.2: enabled 0
731 07:41:59.159261 GENERIC: 0.0: enabled 1
732 07:41:59.161982 PCI: 00:0d.3: enabled 0
733 07:41:59.165360 PCI: 00:0e.0: enabled 0
734 07:41:59.168597 PCI: 00:10.2: enabled 1
735 07:41:59.171944 PCI: 00:10.6: enabled 0
736 07:41:59.172471 PCI: 00:10.7: enabled 0
737 07:41:59.175745 PCI: 00:12.0: enabled 0
738 07:41:59.178683 PCI: 00:12.6: enabled 0
739 07:41:59.182085 PCI: 00:13.0: enabled 0
740 07:41:59.185178 PCI: 00:14.0: enabled 1
741 07:41:59.185630 USB0 port 0: enabled 1
742 07:41:59.188511 USB2 port 0: enabled 0
743 07:41:59.191664 USB2 port 1: enabled 1
744 07:41:59.195059 USB2 port 2: enabled 1
745 07:41:59.198506 USB2 port 3: enabled 0
746 07:41:59.202005 USB2 port 4: enabled 1
747 07:41:59.202432 USB2 port 5: enabled 0
748 07:41:59.205074 USB2 port 6: enabled 0
749 07:41:59.208259 USB2 port 7: enabled 0
750 07:41:59.212043 USB2 port 8: enabled 0
751 07:41:59.215359 USB2 port 9: enabled 0
752 07:41:59.218217 USB3 port 0: enabled 0
753 07:41:59.218779 USB3 port 1: enabled 1
754 07:41:59.221536 USB3 port 2: enabled 0
755 07:41:59.225016 USB3 port 3: enabled 0
756 07:41:59.228679 PCI: 00:14.1: enabled 0
757 07:41:59.231797 PCI: 00:14.2: enabled 1
758 07:41:59.232384 PCI: 00:14.3: enabled 1
759 07:41:59.234875 GENERIC: 0.0: enabled 1
760 07:41:59.238206 PCI: 00:15.0: enabled 1
761 07:41:59.241611 I2C: 00:1a: enabled 1
762 07:41:59.245092 I2C: 00:31: enabled 1
763 07:41:59.245770 I2C: 00:32: enabled 1
764 07:41:59.248681 PCI: 00:15.1: enabled 1
765 07:41:59.251572 I2C: 00:10: enabled 1
766 07:41:59.254942 PCI: 00:15.2: enabled 1
767 07:41:59.255472 PCI: 00:15.3: enabled 1
768 07:41:59.258369 PCI: 00:16.0: enabled 1
769 07:41:59.261468 PCI: 00:16.1: enabled 0
770 07:41:59.264914 PCI: 00:16.2: enabled 0
771 07:41:59.268235 PCI: 00:16.3: enabled 0
772 07:41:59.268737 PCI: 00:16.4: enabled 0
773 07:41:59.272428 PCI: 00:16.5: enabled 0
774 07:41:59.275966 PCI: 00:17.0: enabled 1
775 07:41:59.279508 PCI: 00:19.0: enabled 0
776 07:41:59.280114 PCI: 00:19.1: enabled 1
777 07:41:59.282459 I2C: 00:15: enabled 1
778 07:41:59.286009 PCI: 00:19.2: enabled 0
779 07:41:59.289168 PCI: 00:1d.0: enabled 1
780 07:41:59.289786 GENERIC: 0.0: enabled 1
781 07:41:59.339323 PCI: 00:1e.0: enabled 1
782 07:41:59.339858 PCI: 00:1e.1: enabled 0
783 07:41:59.340288 PCI: 00:1e.2: enabled 1
784 07:41:59.340622 SPI: 00: enabled 1
785 07:41:59.340936 PCI: 00:1e.3: enabled 1
786 07:41:59.341238 SPI: 00: enabled 1
787 07:41:59.341530 PCI: 00:1f.0: enabled 1
788 07:41:59.342175 PNP: 0c09.0: enabled 1
789 07:41:59.342512 PCI: 00:1f.1: enabled 0
790 07:41:59.342812 PCI: 00:1f.2: enabled 1
791 07:41:59.343104 GENERIC: 0.0: enabled 1
792 07:41:59.343393 GENERIC: 0.0: enabled 1
793 07:41:59.343680 GENERIC: 1.0: enabled 1
794 07:41:59.343966 PCI: 00:1f.3: enabled 1
795 07:41:59.344300 PCI: 00:1f.4: enabled 0
796 07:41:59.344586 PCI: 00:1f.5: enabled 1
797 07:41:59.344867 PCI: 00:1f.6: enabled 0
798 07:41:59.345145 PCI: 00:1f.7: enabled 0
799 07:41:59.345421 CPU_CLUSTER: 0: enabled 1
800 07:41:59.384292 APIC: 00: enabled 1
801 07:41:59.384882 APIC: 01: enabled 1
802 07:41:59.385452 APIC: 03: enabled 1
803 07:41:59.385857 APIC: 04: enabled 1
804 07:41:59.386184 APIC: 07: enabled 1
805 07:41:59.386879 APIC: 06: enabled 1
806 07:41:59.387219 APIC: 02: enabled 1
807 07:41:59.387529 APIC: 05: enabled 1
808 07:41:59.387823 Root Device scanning...
809 07:41:59.388155 scan_static_bus for Root Device
810 07:41:59.388456 DOMAIN: 0000 enabled
811 07:41:59.388744 CPU_CLUSTER: 0 enabled
812 07:41:59.389054 DOMAIN: 0000 scanning...
813 07:41:59.389341 PCI: pci_scan_bus for bus 00
814 07:41:59.389625 PCI: 00:00.0 [8086/0000] ops
815 07:41:59.389969 PCI: 00:00.0 [8086/9a12] enabled
816 07:41:59.390285 PCI: 00:02.0 [8086/0000] bus ops
817 07:41:59.391291 PCI: 00:02.0 [8086/9a40] enabled
818 07:41:59.391725 PCI: 00:04.0 [8086/0000] bus ops
819 07:41:59.394527 PCI: 00:04.0 [8086/9a03] enabled
820 07:41:59.397775 PCI: 00:05.0 [8086/9a19] enabled
821 07:41:59.401331 PCI: 00:07.0 [0000/0000] hidden
822 07:41:59.404392 PCI: 00:08.0 [8086/9a11] enabled
823 07:41:59.407830 PCI: 00:0a.0 [8086/9a0d] disabled
824 07:41:59.411080 PCI: 00:0d.0 [8086/0000] bus ops
825 07:41:59.414419 PCI: 00:0d.0 [8086/9a13] enabled
826 07:41:59.417557 PCI: 00:14.0 [8086/0000] bus ops
827 07:41:59.420970 PCI: 00:14.0 [8086/a0ed] enabled
828 07:41:59.424232 PCI: 00:14.2 [8086/a0ef] enabled
829 07:41:59.427670 PCI: 00:14.3 [8086/0000] bus ops
830 07:41:59.430479 PCI: 00:14.3 [8086/a0f0] enabled
831 07:41:59.433878 PCI: 00:15.0 [8086/0000] bus ops
832 07:41:59.437749 PCI: 00:15.0 [8086/a0e8] enabled
833 07:41:59.440894 PCI: 00:15.1 [8086/0000] bus ops
834 07:41:59.444603 PCI: 00:15.1 [8086/a0e9] enabled
835 07:41:59.447526 PCI: 00:15.2 [8086/0000] bus ops
836 07:41:59.450966 PCI: 00:15.2 [8086/a0ea] enabled
837 07:41:59.454616 PCI: 00:15.3 [8086/0000] bus ops
838 07:41:59.457455 PCI: 00:15.3 [8086/a0eb] enabled
839 07:41:59.460605 PCI: 00:16.0 [8086/0000] ops
840 07:41:59.464479 PCI: 00:16.0 [8086/a0e0] enabled
841 07:41:59.470680 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 07:41:59.474012 PCI: 00:19.0 [8086/0000] bus ops
843 07:41:59.477352 PCI: 00:19.0 [8086/a0c5] disabled
844 07:41:59.480802 PCI: 00:19.1 [8086/0000] bus ops
845 07:41:59.483686 PCI: 00:19.1 [8086/a0c6] enabled
846 07:41:59.487152 PCI: 00:1d.0 [8086/0000] bus ops
847 07:41:59.490473 PCI: 00:1d.0 [8086/a0b0] enabled
848 07:41:59.494201 PCI: 00:1e.0 [8086/0000] ops
849 07:41:59.497266 PCI: 00:1e.0 [8086/a0a8] enabled
850 07:41:59.500653 PCI: 00:1e.2 [8086/0000] bus ops
851 07:41:59.503994 PCI: 00:1e.2 [8086/a0aa] enabled
852 07:41:59.507250 PCI: 00:1e.3 [8086/0000] bus ops
853 07:41:59.510583 PCI: 00:1e.3 [8086/a0ab] enabled
854 07:41:59.513697 PCI: 00:1f.0 [8086/0000] bus ops
855 07:41:59.516893 PCI: 00:1f.0 [8086/a087] enabled
856 07:41:59.517322 RTC Init
857 07:41:59.523637 Set power on after power failure.
858 07:41:59.524107 Disabling Deep S3
859 07:41:59.527361 Disabling Deep S3
860 07:41:59.527885 Disabling Deep S4
861 07:41:59.530660 Disabling Deep S4
862 07:41:59.531187 Disabling Deep S5
863 07:41:59.533618 Disabling Deep S5
864 07:41:59.537337 PCI: 00:1f.2 [0000/0000] hidden
865 07:41:59.540375 PCI: 00:1f.3 [8086/0000] bus ops
866 07:41:59.543754 PCI: 00:1f.3 [8086/a0c8] enabled
867 07:41:59.547135 PCI: 00:1f.5 [8086/0000] bus ops
868 07:41:59.550420 PCI: 00:1f.5 [8086/a0a4] enabled
869 07:41:59.553554 PCI: Leftover static devices:
870 07:41:59.554011 PCI: 00:10.2
871 07:41:59.556887 PCI: 00:10.6
872 07:41:59.557312 PCI: 00:10.7
873 07:41:59.560200 PCI: 00:06.0
874 07:41:59.560628 PCI: 00:07.1
875 07:41:59.560972 PCI: 00:07.2
876 07:41:59.563158 PCI: 00:07.3
877 07:41:59.563597 PCI: 00:09.0
878 07:41:59.566649 PCI: 00:0d.1
879 07:41:59.567077 PCI: 00:0d.2
880 07:41:59.567418 PCI: 00:0d.3
881 07:41:59.570096 PCI: 00:0e.0
882 07:41:59.570545 PCI: 00:12.0
883 07:41:59.573500 PCI: 00:12.6
884 07:41:59.574058 PCI: 00:13.0
885 07:41:59.576851 PCI: 00:14.1
886 07:41:59.577154 PCI: 00:16.1
887 07:41:59.577395 PCI: 00:16.2
888 07:41:59.579553 PCI: 00:16.3
889 07:41:59.579856 PCI: 00:16.4
890 07:41:59.583184 PCI: 00:16.5
891 07:41:59.583448 PCI: 00:17.0
892 07:41:59.583637 PCI: 00:19.2
893 07:41:59.586730 PCI: 00:1e.1
894 07:41:59.586913 PCI: 00:1f.1
895 07:41:59.589478 PCI: 00:1f.4
896 07:41:59.589662 PCI: 00:1f.6
897 07:41:59.589810 PCI: 00:1f.7
898 07:41:59.592845 PCI: Check your devicetree.cb.
899 07:41:59.596065 PCI: 00:02.0 scanning...
900 07:41:59.599275 scan_generic_bus for PCI: 00:02.0
901 07:41:59.602439 scan_generic_bus for PCI: 00:02.0 done
902 07:41:59.609189 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 07:41:59.612551 PCI: 00:04.0 scanning...
904 07:41:59.615935 scan_generic_bus for PCI: 00:04.0
905 07:41:59.616034 GENERIC: 0.0 enabled
906 07:41:59.622585 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 07:41:59.629202 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 07:41:59.629286 PCI: 00:0d.0 scanning...
909 07:41:59.632470 scan_static_bus for PCI: 00:0d.0
910 07:41:59.635787 USB0 port 0 enabled
911 07:41:59.639457 USB0 port 0 scanning...
912 07:41:59.642807 scan_static_bus for USB0 port 0
913 07:41:59.645680 USB3 port 0 enabled
914 07:41:59.645763 USB3 port 1 enabled
915 07:41:59.649083 USB3 port 2 disabled
916 07:41:59.649166 USB3 port 3 disabled
917 07:41:59.652408 USB3 port 0 scanning...
918 07:41:59.655678 scan_static_bus for USB3 port 0
919 07:41:59.658983 scan_static_bus for USB3 port 0 done
920 07:41:59.665677 scan_bus: bus USB3 port 0 finished in 6 msecs
921 07:41:59.665761 USB3 port 1 scanning...
922 07:41:59.669174 scan_static_bus for USB3 port 1
923 07:41:59.675912 scan_static_bus for USB3 port 1 done
924 07:41:59.679337 scan_bus: bus USB3 port 1 finished in 6 msecs
925 07:41:59.682200 scan_static_bus for USB0 port 0 done
926 07:41:59.685935 scan_bus: bus USB0 port 0 finished in 43 msecs
927 07:41:59.692174 scan_static_bus for PCI: 00:0d.0 done
928 07:41:59.695491 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 07:41:59.698838 PCI: 00:14.0 scanning...
930 07:41:59.702262 scan_static_bus for PCI: 00:14.0
931 07:41:59.705748 USB0 port 0 enabled
932 07:41:59.705833 USB0 port 0 scanning...
933 07:41:59.708928 scan_static_bus for USB0 port 0
934 07:41:59.712259 USB2 port 0 disabled
935 07:41:59.715748 USB2 port 1 enabled
936 07:41:59.715831 USB2 port 2 enabled
937 07:41:59.718918 USB2 port 3 disabled
938 07:41:59.722222 USB2 port 4 enabled
939 07:41:59.722304 USB2 port 5 disabled
940 07:41:59.725563 USB2 port 6 disabled
941 07:41:59.725645 USB2 port 7 disabled
942 07:41:59.728838 USB2 port 8 disabled
943 07:41:59.732164 USB2 port 9 disabled
944 07:41:59.732252 USB3 port 0 disabled
945 07:41:59.735332 USB3 port 1 enabled
946 07:41:59.738893 USB3 port 2 disabled
947 07:41:59.738998 USB3 port 3 disabled
948 07:41:59.742247 USB2 port 1 scanning...
949 07:41:59.745500 scan_static_bus for USB2 port 1
950 07:41:59.748972 scan_static_bus for USB2 port 1 done
951 07:41:59.755149 scan_bus: bus USB2 port 1 finished in 6 msecs
952 07:41:59.755235 USB2 port 2 scanning...
953 07:41:59.758536 scan_static_bus for USB2 port 2
954 07:41:59.765361 scan_static_bus for USB2 port 2 done
955 07:41:59.768650 scan_bus: bus USB2 port 2 finished in 6 msecs
956 07:41:59.771861 USB2 port 4 scanning...
957 07:41:59.775263 scan_static_bus for USB2 port 4
958 07:41:59.778797 scan_static_bus for USB2 port 4 done
959 07:41:59.781628 scan_bus: bus USB2 port 4 finished in 6 msecs
960 07:41:59.785122 USB3 port 1 scanning...
961 07:41:59.788422 scan_static_bus for USB3 port 1
962 07:41:59.791706 scan_static_bus for USB3 port 1 done
963 07:41:59.795061 scan_bus: bus USB3 port 1 finished in 6 msecs
964 07:41:59.802167 scan_static_bus for USB0 port 0 done
965 07:41:59.805428 scan_bus: bus USB0 port 0 finished in 93 msecs
966 07:41:59.808271 scan_static_bus for PCI: 00:14.0 done
967 07:41:59.815006 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 07:41:59.815530 PCI: 00:14.3 scanning...
969 07:41:59.818719 scan_static_bus for PCI: 00:14.3
970 07:41:59.821961 GENERIC: 0.0 enabled
971 07:41:59.825229 scan_static_bus for PCI: 00:14.3 done
972 07:41:59.831555 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 07:41:59.832119 PCI: 00:15.0 scanning...
974 07:41:59.835542 scan_static_bus for PCI: 00:15.0
975 07:41:59.838754 I2C: 00:1a enabled
976 07:41:59.842062 I2C: 00:31 enabled
977 07:41:59.842490 I2C: 00:32 enabled
978 07:41:59.845081 scan_static_bus for PCI: 00:15.0 done
979 07:41:59.852539 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 07:41:59.852957 PCI: 00:15.1 scanning...
981 07:41:59.855499 scan_static_bus for PCI: 00:15.1
982 07:41:59.858942 I2C: 00:10 enabled
983 07:41:59.862368 scan_static_bus for PCI: 00:15.1 done
984 07:41:59.869200 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 07:41:59.869621 PCI: 00:15.2 scanning...
986 07:41:59.872666 scan_static_bus for PCI: 00:15.2
987 07:41:59.879138 scan_static_bus for PCI: 00:15.2 done
988 07:41:59.882547 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 07:41:59.885229 PCI: 00:15.3 scanning...
990 07:41:59.888906 scan_static_bus for PCI: 00:15.3
991 07:41:59.892311 scan_static_bus for PCI: 00:15.3 done
992 07:41:59.895488 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 07:41:59.898930 PCI: 00:19.1 scanning...
994 07:41:59.902236 scan_static_bus for PCI: 00:19.1
995 07:41:59.905339 I2C: 00:15 enabled
996 07:41:59.909012 scan_static_bus for PCI: 00:19.1 done
997 07:41:59.915218 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 07:41:59.915829 PCI: 00:1d.0 scanning...
999 07:41:59.918653 do_pci_scan_bridge for PCI: 00:1d.0
1000 07:41:59.921800 PCI: pci_scan_bus for bus 01
1001 07:41:59.925084 PCI: 01:00.0 [1c5c/174a] enabled
1002 07:41:59.928461 GENERIC: 0.0 enabled
1003 07:41:59.931819 Enabling Common Clock Configuration
1004 07:41:59.934993 L1 Sub-State supported from root port 29
1005 07:41:59.938117 L1 Sub-State Support = 0xf
1006 07:41:59.941232 CommonModeRestoreTime = 0x28
1007 07:41:59.947744 Power On Value = 0x16, Power On Scale = 0x0
1008 07:41:59.948458 ASPM: Enabled L1
1009 07:41:59.951415 PCIe: Max_Payload_Size adjusted to 128
1010 07:41:59.957922 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 07:41:59.961023 PCI: 00:1e.2 scanning...
1012 07:41:59.964395 scan_generic_bus for PCI: 00:1e.2
1013 07:41:59.965056 SPI: 00 enabled
1014 07:41:59.971000 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 07:41:59.974324 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 07:41:59.977138 PCI: 00:1e.3 scanning...
1017 07:41:59.980644 scan_generic_bus for PCI: 00:1e.3
1018 07:41:59.983844 SPI: 00 enabled
1019 07:41:59.990379 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 07:41:59.993863 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 07:41:59.997246 PCI: 00:1f.0 scanning...
1022 07:42:00.000573 scan_static_bus for PCI: 00:1f.0
1023 07:42:00.003918 PNP: 0c09.0 enabled
1024 07:42:00.004208 PNP: 0c09.0 scanning...
1025 07:42:00.007469 scan_static_bus for PNP: 0c09.0
1026 07:42:00.013637 scan_static_bus for PNP: 0c09.0 done
1027 07:42:00.016964 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 07:42:00.020380 scan_static_bus for PCI: 00:1f.0 done
1029 07:42:00.026580 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 07:42:00.026873 PCI: 00:1f.2 scanning...
1031 07:42:00.029875 scan_static_bus for PCI: 00:1f.2
1032 07:42:00.033376 GENERIC: 0.0 enabled
1033 07:42:00.036779 GENERIC: 0.0 scanning...
1034 07:42:00.040035 scan_static_bus for GENERIC: 0.0
1035 07:42:00.043260 GENERIC: 0.0 enabled
1036 07:42:00.043537 GENERIC: 1.0 enabled
1037 07:42:00.046410 scan_static_bus for GENERIC: 0.0 done
1038 07:42:00.053374 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 07:42:00.056654 scan_static_bus for PCI: 00:1f.2 done
1040 07:42:00.059754 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 07:42:00.062863 PCI: 00:1f.3 scanning...
1042 07:42:00.066160 scan_static_bus for PCI: 00:1f.3
1043 07:42:00.069947 scan_static_bus for PCI: 00:1f.3 done
1044 07:42:00.076284 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 07:42:00.079781 PCI: 00:1f.5 scanning...
1046 07:42:00.082726 scan_generic_bus for PCI: 00:1f.5
1047 07:42:00.086052 scan_generic_bus for PCI: 00:1f.5 done
1048 07:42:00.089233 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 07:42:00.095745 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 07:42:00.099153 scan_static_bus for Root Device done
1051 07:42:00.102493 scan_bus: bus Root Device finished in 737 msecs
1052 07:42:00.105867 done
1053 07:42:00.112021 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 07:42:00.112160 Chrome EC: UHEPI supported
1055 07:42:00.119227 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 07:42:00.125508 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 07:42:00.128822 SPI flash protection: WPSW=0 SRP0=0
1058 07:42:00.135578 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 07:42:00.138739 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 07:42:00.142080 found VGA at PCI: 00:02.0
1061 07:42:00.145610 Setting up VGA for PCI: 00:02.0
1062 07:42:00.152073 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 07:42:00.155437 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 07:42:00.158265 Allocating resources...
1065 07:42:00.161610 Reading resources...
1066 07:42:00.165033 Root Device read_resources bus 0 link: 0
1067 07:42:00.168156 DOMAIN: 0000 read_resources bus 0 link: 0
1068 07:42:00.174988 PCI: 00:04.0 read_resources bus 1 link: 0
1069 07:42:00.178450 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 07:42:00.185374 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 07:42:00.188751 USB0 port 0 read_resources bus 0 link: 0
1072 07:42:00.195508 USB0 port 0 read_resources bus 0 link: 0 done
1073 07:42:00.198767 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 07:42:00.205415 PCI: 00:14.0 read_resources bus 0 link: 0
1075 07:42:00.208682 USB0 port 0 read_resources bus 0 link: 0
1076 07:42:00.215491 USB0 port 0 read_resources bus 0 link: 0 done
1077 07:42:00.218771 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 07:42:00.224965 PCI: 00:14.3 read_resources bus 0 link: 0
1079 07:42:00.228257 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 07:42:00.231803 PCI: 00:15.0 read_resources bus 0 link: 0
1081 07:42:00.239453 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 07:42:00.242211 PCI: 00:15.1 read_resources bus 0 link: 0
1083 07:42:00.249386 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 07:42:00.252224 PCI: 00:19.1 read_resources bus 0 link: 0
1085 07:42:00.259722 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 07:42:00.262736 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 07:42:00.269552 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 07:42:00.272856 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 07:42:00.279541 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 07:42:00.282620 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 07:42:00.289249 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 07:42:00.292586 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 07:42:00.299403 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 07:42:00.302910 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 07:42:00.306239 GENERIC: 0.0 read_resources bus 0 link: 0
1096 07:42:00.313071 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 07:42:00.316651 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 07:42:00.323952 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 07:42:00.326854 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 07:42:00.333735 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 07:42:00.337260 Root Device read_resources bus 0 link: 0 done
1102 07:42:00.340065 Done reading resources.
1103 07:42:00.346780 Show resources in subtree (Root Device)...After reading.
1104 07:42:00.349970 Root Device child on link 0 DOMAIN: 0000
1105 07:42:00.353263 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 07:42:00.363488 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 07:42:00.373195 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 07:42:00.376534 PCI: 00:00.0
1109 07:42:00.386585 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 07:42:00.393390 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 07:42:00.403095 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 07:42:00.412823 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 07:42:00.423102 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 07:42:00.433204 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 07:42:00.442908 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 07:42:00.449695 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 07:42:00.459530 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 07:42:00.469308 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 07:42:00.479537 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 07:42:00.489075 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 07:42:00.499189 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 07:42:00.505828 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 07:42:00.515927 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 07:42:00.525596 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 07:42:00.535350 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 07:42:00.545230 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 07:42:00.555517 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 07:42:00.565257 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 07:42:00.565368 PCI: 00:02.0
1130 07:42:00.575410 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 07:42:00.584945 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 07:42:00.595129 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 07:42:00.598435 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 07:42:00.608186 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 07:42:00.611410 GENERIC: 0.0
1136 07:42:00.611514 PCI: 00:05.0
1137 07:42:00.621486 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 07:42:00.628162 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 07:42:00.628242 GENERIC: 0.0
1140 07:42:00.631587 PCI: 00:08.0
1141 07:42:00.641394 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 07:42:00.641476 PCI: 00:0a.0
1143 07:42:00.648320 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 07:42:00.658214 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 07:42:00.661079 USB0 port 0 child on link 0 USB3 port 0
1146 07:42:00.661180 USB3 port 0
1147 07:42:00.664566 USB3 port 1
1148 07:42:00.667976 USB3 port 2
1149 07:42:00.668084 USB3 port 3
1150 07:42:00.671272 PCI: 00:14.0 child on link 0 USB0 port 0
1151 07:42:00.681315 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 07:42:00.688046 USB0 port 0 child on link 0 USB2 port 0
1153 07:42:00.688160 USB2 port 0
1154 07:42:00.691399 USB2 port 1
1155 07:42:00.691511 USB2 port 2
1156 07:42:00.694272 USB2 port 3
1157 07:42:00.694374 USB2 port 4
1158 07:42:00.697618 USB2 port 5
1159 07:42:00.697718 USB2 port 6
1160 07:42:00.701105 USB2 port 7
1161 07:42:00.704550 USB2 port 8
1162 07:42:00.704626 USB2 port 9
1163 07:42:00.707709 USB3 port 0
1164 07:42:00.707807 USB3 port 1
1165 07:42:00.710987 USB3 port 2
1166 07:42:00.711083 USB3 port 3
1167 07:42:00.714159 PCI: 00:14.2
1168 07:42:00.724333 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 07:42:00.734120 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 07:42:00.737791 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 07:42:00.747541 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 07:42:00.751022 GENERIC: 0.0
1173 07:42:00.754076 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 07:42:00.764418 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 07:42:00.764537 I2C: 00:1a
1176 07:42:00.767340 I2C: 00:31
1177 07:42:00.767445 I2C: 00:32
1178 07:42:00.774047 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 07:42:00.784232 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 07:42:00.784350 I2C: 00:10
1181 07:42:00.787354 PCI: 00:15.2
1182 07:42:00.797324 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 07:42:00.797438 PCI: 00:15.3
1184 07:42:00.807033 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 07:42:00.810470 PCI: 00:16.0
1186 07:42:00.820332 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 07:42:00.820411 PCI: 00:19.0
1188 07:42:00.823710 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 07:42:00.833824 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 07:42:00.837274 I2C: 00:15
1191 07:42:00.840464 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 07:42:00.850274 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 07:42:00.860270 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 07:42:00.869825 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 07:42:00.869909 GENERIC: 0.0
1196 07:42:00.873213 PCI: 01:00.0
1197 07:42:00.883286 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 07:42:00.893314 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 07:42:00.899626 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 07:42:00.903014 PCI: 00:1e.0
1201 07:42:00.913278 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 07:42:00.916670 PCI: 00:1e.2 child on link 0 SPI: 00
1203 07:42:00.926192 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 07:42:00.929586 SPI: 00
1205 07:42:00.932867 PCI: 00:1e.3 child on link 0 SPI: 00
1206 07:42:00.942565 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 07:42:00.942667 SPI: 00
1208 07:42:00.949307 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 07:42:00.956258 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 07:42:00.959218 PNP: 0c09.0
1211 07:42:00.965888 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 07:42:00.973001 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 07:42:00.982519 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 07:42:00.989199 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 07:42:00.995752 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 07:42:00.995859 GENERIC: 0.0
1217 07:42:00.999292 GENERIC: 1.0
1218 07:42:00.999368 PCI: 00:1f.3
1219 07:42:01.009383 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 07:42:01.022368 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 07:42:01.022473 PCI: 00:1f.5
1222 07:42:01.032081 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 07:42:01.035390 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 07:42:01.039064 APIC: 00
1225 07:42:01.039160 APIC: 01
1226 07:42:01.039242 APIC: 03
1227 07:42:01.042114 APIC: 04
1228 07:42:01.042207 APIC: 07
1229 07:42:01.042295 APIC: 06
1230 07:42:01.045473 APIC: 02
1231 07:42:01.045545 APIC: 05
1232 07:42:01.055377 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 07:42:01.058835 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 07:42:01.065656 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 07:42:01.072048 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 07:42:01.075307 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 07:42:01.078426 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 07:42:01.085304 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 07:42:01.091670 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 07:42:01.098390 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 07:42:01.108379 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 07:42:01.115099 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 07:42:01.121965 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 07:42:01.128333 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 07:42:01.134556 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 07:42:01.141575 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 07:42:01.144712 DOMAIN: 0000: Resource ranges:
1248 07:42:01.147932 * Base: 1000, Size: 800, Tag: 100
1249 07:42:01.154856 * Base: 1900, Size: e700, Tag: 100
1250 07:42:01.157804 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 07:42:01.164417 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 07:42:01.171303 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 07:42:01.181049 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 07:42:01.188095 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 07:42:01.194835 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 07:42:01.204404 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 07:42:01.211158 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 07:42:01.217713 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 07:42:01.227912 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 07:42:01.234367 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 07:42:01.240679 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 07:42:01.250770 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 07:42:01.257719 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 07:42:01.264046 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 07:42:01.274208 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 07:42:01.280550 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 07:42:01.287132 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 07:42:01.296867 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 07:42:01.303864 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 07:42:01.310000 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 07:42:01.320626 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 07:42:01.327040 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 07:42:01.333350 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 07:42:01.343568 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 07:42:01.346580 DOMAIN: 0000: Resource ranges:
1276 07:42:01.349619 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 07:42:01.353358 * Base: d0000000, Size: 28000000, Tag: 200
1278 07:42:01.359621 * Base: fa000000, Size: 1000000, Tag: 200
1279 07:42:01.363124 * Base: fb001000, Size: 2fff000, Tag: 200
1280 07:42:01.366639 * Base: fe010000, Size: 2e000, Tag: 200
1281 07:42:01.369559 * Base: fe03f000, Size: d41000, Tag: 200
1282 07:42:01.376194 * Base: fed88000, Size: 8000, Tag: 200
1283 07:42:01.379411 * Base: fed93000, Size: d000, Tag: 200
1284 07:42:01.382860 * Base: feda2000, Size: 1e000, Tag: 200
1285 07:42:01.386284 * Base: fede0000, Size: 1220000, Tag: 200
1286 07:42:01.393464 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 07:42:01.399297 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 07:42:01.406233 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 07:42:01.413010 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 07:42:01.419408 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 07:42:01.425846 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 07:42:01.432918 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 07:42:01.439266 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 07:42:01.445726 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 07:42:01.452641 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 07:42:01.459175 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 07:42:01.466042 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 07:42:01.472291 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 07:42:01.478880 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 07:42:01.485440 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 07:42:01.492392 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 07:42:01.498915 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 07:42:01.505335 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 07:42:01.511918 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 07:42:01.518689 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 07:42:01.525591 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 07:42:01.531805 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 07:42:01.538206 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 07:42:01.544966 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 07:42:01.555056 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 07:42:01.558585 PCI: 00:1d.0: Resource ranges:
1312 07:42:01.561517 * Base: 7fc00000, Size: 100000, Tag: 200
1313 07:42:01.568155 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 07:42:01.575030 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 07:42:01.581258 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 07:42:01.591056 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 07:42:01.597771 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 07:42:01.600944 Root Device assign_resources, bus 0 link: 0
1319 07:42:01.604122 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 07:42:01.614610 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 07:42:01.621356 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 07:42:01.630953 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 07:42:01.637753 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 07:42:01.644731 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 07:42:01.647877 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 07:42:01.657006 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 07:42:01.663374 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 07:42:01.673662 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 07:42:01.676884 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 07:42:01.679948 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 07:42:01.690023 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 07:42:01.693437 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 07:42:01.700229 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 07:42:01.706649 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 07:42:01.716733 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 07:42:01.722996 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 07:42:01.729724 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 07:42:01.732868 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 07:42:01.739319 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 07:42:01.746046 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 07:42:01.749524 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 07:42:01.759294 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 07:42:01.762542 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 07:42:01.769356 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 07:42:01.775650 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 07:42:01.785572 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 07:42:01.791914 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 07:42:01.802282 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 07:42:01.805144 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 07:42:01.808573 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 07:42:01.818730 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 07:42:01.828609 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 07:42:01.838341 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 07:42:01.841734 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 07:42:01.848576 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 07:42:01.858357 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 07:42:01.865301 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 07:42:01.871541 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 07:42:01.878310 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 07:42:01.884585 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 07:42:01.887979 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 07:42:01.897778 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 07:42:01.901334 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 07:42:01.904670 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 07:42:01.911212 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 07:42:01.914598 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 07:42:01.921528 LPC: Trying to open IO window from 800 size 1ff
1368 07:42:01.927616 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 07:42:01.938121 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 07:42:01.944190 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 07:42:01.951094 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 07:42:01.954112 Root Device assign_resources, bus 0 link: 0
1373 07:42:01.957551 Done setting resources.
1374 07:42:01.963878 Show resources in subtree (Root Device)...After assigning values.
1375 07:42:01.967425 Root Device child on link 0 DOMAIN: 0000
1376 07:42:01.970386 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 07:42:01.980412 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 07:42:01.990283 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 07:42:01.993723 PCI: 00:00.0
1380 07:42:02.003467 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 07:42:02.010431 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 07:42:02.020072 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 07:42:02.030252 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 07:42:02.039904 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 07:42:02.050049 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 07:42:02.060208 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 07:42:02.066639 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 07:42:02.076250 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 07:42:02.086347 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 07:42:02.096217 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 07:42:02.106061 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 07:42:02.112666 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 07:42:02.123062 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 07:42:02.133015 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 07:42:02.142757 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 07:42:02.152801 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 07:42:02.163223 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 07:42:02.169364 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 07:42:02.179863 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 07:42:02.182928 PCI: 00:02.0
1401 07:42:02.192956 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 07:42:02.202771 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 07:42:02.212935 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 07:42:02.216167 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 07:42:02.229646 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 07:42:02.230075 GENERIC: 0.0
1407 07:42:02.232879 PCI: 00:05.0
1408 07:42:02.242610 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 07:42:02.245988 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 07:42:02.249288 GENERIC: 0.0
1411 07:42:02.249757 PCI: 00:08.0
1412 07:42:02.258934 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 07:42:02.261981 PCI: 00:0a.0
1414 07:42:02.265312 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 07:42:02.275413 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 07:42:02.281628 USB0 port 0 child on link 0 USB3 port 0
1417 07:42:02.281735 USB3 port 0
1418 07:42:02.285067 USB3 port 1
1419 07:42:02.285148 USB3 port 2
1420 07:42:02.288429 USB3 port 3
1421 07:42:02.291930 PCI: 00:14.0 child on link 0 USB0 port 0
1422 07:42:02.301606 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 07:42:02.308588 USB0 port 0 child on link 0 USB2 port 0
1424 07:42:02.308669 USB2 port 0
1425 07:42:02.311547 USB2 port 1
1426 07:42:02.311646 USB2 port 2
1427 07:42:02.315155 USB2 port 3
1428 07:42:02.315246 USB2 port 4
1429 07:42:02.318396 USB2 port 5
1430 07:42:02.318477 USB2 port 6
1431 07:42:02.321714 USB2 port 7
1432 07:42:02.321829 USB2 port 8
1433 07:42:02.324750 USB2 port 9
1434 07:42:02.324857 USB3 port 0
1435 07:42:02.328733 USB3 port 1
1436 07:42:02.331305 USB3 port 2
1437 07:42:02.331385 USB3 port 3
1438 07:42:02.335075 PCI: 00:14.2
1439 07:42:02.344550 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 07:42:02.354858 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 07:42:02.358278 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 07:42:02.367899 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 07:42:02.371048 GENERIC: 0.0
1444 07:42:02.374483 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 07:42:02.384683 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 07:42:02.388079 I2C: 00:1a
1447 07:42:02.388177 I2C: 00:31
1448 07:42:02.391442 I2C: 00:32
1449 07:42:02.394275 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 07:42:02.404608 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 07:42:02.407965 I2C: 00:10
1452 07:42:02.408070 PCI: 00:15.2
1453 07:42:02.417519 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 07:42:02.420869 PCI: 00:15.3
1455 07:42:02.431005 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 07:42:02.431088 PCI: 00:16.0
1457 07:42:02.440870 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 07:42:02.444245 PCI: 00:19.0
1459 07:42:02.447590 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 07:42:02.457319 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 07:42:02.460652 I2C: 00:15
1462 07:42:02.464059 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 07:42:02.474041 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 07:42:02.487504 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 07:42:02.496970 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 07:42:02.497055 GENERIC: 0.0
1467 07:42:02.500467 PCI: 01:00.0
1468 07:42:02.510625 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 07:42:02.520041 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 07:42:02.530317 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 07:42:02.533310 PCI: 00:1e.0
1472 07:42:02.543180 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 07:42:02.546898 PCI: 00:1e.2 child on link 0 SPI: 00
1474 07:42:02.556590 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 07:42:02.560009 SPI: 00
1476 07:42:02.563065 PCI: 00:1e.3 child on link 0 SPI: 00
1477 07:42:02.573366 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 07:42:02.576910 SPI: 00
1479 07:42:02.579745 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 07:42:02.586141 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 07:42:02.589483 PNP: 0c09.0
1482 07:42:02.599837 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 07:42:02.603270 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 07:42:02.613091 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 07:42:02.622694 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 07:42:02.626150 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 07:42:02.629599 GENERIC: 0.0
1488 07:42:02.629671 GENERIC: 1.0
1489 07:42:02.633153 PCI: 00:1f.3
1490 07:42:02.642948 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 07:42:02.652509 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 07:42:02.652621 PCI: 00:1f.5
1493 07:42:02.666151 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 07:42:02.669514 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 07:42:02.669737 APIC: 00
1496 07:42:02.672652 APIC: 01
1497 07:42:02.672821 APIC: 03
1498 07:42:02.672979 APIC: 04
1499 07:42:02.675695 APIC: 07
1500 07:42:02.675908 APIC: 06
1501 07:42:02.679388 APIC: 02
1502 07:42:02.679624 APIC: 05
1503 07:42:02.682430 Done allocating resources.
1504 07:42:02.689308 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 07:42:02.692462 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 07:42:02.699508 Configure GPIOs for I2S audio on UP4.
1507 07:42:02.705871 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 07:42:02.709276 Enabling resources...
1509 07:42:02.712149 PCI: 00:00.0 subsystem <- 8086/9a12
1510 07:42:02.712693 PCI: 00:00.0 cmd <- 06
1511 07:42:02.718766 PCI: 00:02.0 subsystem <- 8086/9a40
1512 07:42:02.719227 PCI: 00:02.0 cmd <- 03
1513 07:42:02.722146 PCI: 00:04.0 subsystem <- 8086/9a03
1514 07:42:02.725733 PCI: 00:04.0 cmd <- 02
1515 07:42:02.728812 PCI: 00:05.0 subsystem <- 8086/9a19
1516 07:42:02.732340 PCI: 00:05.0 cmd <- 02
1517 07:42:02.735070 PCI: 00:08.0 subsystem <- 8086/9a11
1518 07:42:02.738481 PCI: 00:08.0 cmd <- 06
1519 07:42:02.741809 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 07:42:02.745244 PCI: 00:0d.0 cmd <- 02
1521 07:42:02.748661 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 07:42:02.751487 PCI: 00:14.0 cmd <- 02
1523 07:42:02.754812 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 07:42:02.758663 PCI: 00:14.2 cmd <- 02
1525 07:42:02.761554 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 07:42:02.762080 PCI: 00:14.3 cmd <- 02
1527 07:42:02.768248 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 07:42:02.768801 PCI: 00:15.0 cmd <- 02
1529 07:42:02.771711 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 07:42:02.775105 PCI: 00:15.1 cmd <- 02
1531 07:42:02.778550 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 07:42:02.781754 PCI: 00:15.2 cmd <- 02
1533 07:42:02.784919 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 07:42:02.788463 PCI: 00:15.3 cmd <- 02
1535 07:42:02.791207 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 07:42:02.794890 PCI: 00:16.0 cmd <- 02
1537 07:42:02.798239 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 07:42:02.801497 PCI: 00:19.1 cmd <- 02
1539 07:42:02.804771 PCI: 00:1d.0 bridge ctrl <- 0013
1540 07:42:02.808266 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 07:42:02.811534 PCI: 00:1d.0 cmd <- 06
1542 07:42:02.814633 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 07:42:02.817984 PCI: 00:1e.0 cmd <- 06
1544 07:42:02.821279 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 07:42:02.821889 PCI: 00:1e.2 cmd <- 06
1546 07:42:02.827469 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 07:42:02.828081 PCI: 00:1e.3 cmd <- 02
1548 07:42:02.830872 PCI: 00:1f.0 subsystem <- 8086/a087
1549 07:42:02.834249 PCI: 00:1f.0 cmd <- 407
1550 07:42:02.837531 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 07:42:02.840943 PCI: 00:1f.3 cmd <- 02
1552 07:42:02.844426 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 07:42:02.847879 PCI: 00:1f.5 cmd <- 406
1554 07:42:02.851802 PCI: 01:00.0 cmd <- 02
1555 07:42:02.856184 done.
1556 07:42:02.859556 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 07:42:02.862891 Initializing devices...
1558 07:42:02.865971 Root Device init
1559 07:42:02.869444 Chrome EC: Set SMI mask to 0x0000000000000000
1560 07:42:02.876261 Chrome EC: clear events_b mask to 0x0000000000000000
1561 07:42:02.882917 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 07:42:02.885762 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 07:42:02.893285 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 07:42:02.899939 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 07:42:02.906686 fw_config match found: DB_USB=USB3_ACTIVE
1566 07:42:02.909344 Configure Right Type-C port orientation for retimer
1567 07:42:02.912978 Root Device init finished in 44 msecs
1568 07:42:02.916870 PCI: 00:00.0 init
1569 07:42:02.920286 CPU TDP = 9 Watts
1570 07:42:02.920759 CPU PL1 = 9 Watts
1571 07:42:02.923204 CPU PL2 = 40 Watts
1572 07:42:02.926370 CPU PL4 = 83 Watts
1573 07:42:02.929570 PCI: 00:00.0 init finished in 8 msecs
1574 07:42:02.930028 PCI: 00:02.0 init
1575 07:42:02.932931 GMA: Found VBT in CBFS
1576 07:42:02.936427 GMA: Found valid VBT in CBFS
1577 07:42:02.942991 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 07:42:02.949663 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 07:42:02.953108 PCI: 00:02.0 init finished in 18 msecs
1580 07:42:02.956360 PCI: 00:05.0 init
1581 07:42:02.959606 PCI: 00:05.0 init finished in 0 msecs
1582 07:42:02.963187 PCI: 00:08.0 init
1583 07:42:02.966496 PCI: 00:08.0 init finished in 0 msecs
1584 07:42:02.969707 PCI: 00:14.0 init
1585 07:42:02.972939 PCI: 00:14.0 init finished in 0 msecs
1586 07:42:02.976348 PCI: 00:14.2 init
1587 07:42:02.979140 PCI: 00:14.2 init finished in 0 msecs
1588 07:42:02.982680 PCI: 00:15.0 init
1589 07:42:02.986071 I2C bus 0 version 0x3230302a
1590 07:42:02.989137 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 07:42:02.992408 PCI: 00:15.0 init finished in 6 msecs
1592 07:42:02.992892 PCI: 00:15.1 init
1593 07:42:02.996118 I2C bus 1 version 0x3230302a
1594 07:42:02.999187 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 07:42:03.005853 PCI: 00:15.1 init finished in 6 msecs
1596 07:42:03.006384 PCI: 00:15.2 init
1597 07:42:03.009413 I2C bus 2 version 0x3230302a
1598 07:42:03.012145 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 07:42:03.015631 PCI: 00:15.2 init finished in 6 msecs
1600 07:42:03.019058 PCI: 00:15.3 init
1601 07:42:03.022410 I2C bus 3 version 0x3230302a
1602 07:42:03.025827 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 07:42:03.029178 PCI: 00:15.3 init finished in 6 msecs
1604 07:42:03.032647 PCI: 00:16.0 init
1605 07:42:03.035828 PCI: 00:16.0 init finished in 0 msecs
1606 07:42:03.039179 PCI: 00:19.1 init
1607 07:42:03.042600 I2C bus 5 version 0x3230302a
1608 07:42:03.045650 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 07:42:03.048965 PCI: 00:19.1 init finished in 6 msecs
1610 07:42:03.052446 PCI: 00:1d.0 init
1611 07:42:03.052928 Initializing PCH PCIe bridge.
1612 07:42:03.058849 PCI: 00:1d.0 init finished in 3 msecs
1613 07:42:03.062186 PCI: 00:1f.0 init
1614 07:42:03.065812 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 07:42:03.069060 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 07:42:03.071920 IOAPIC: ID = 0x02
1617 07:42:03.075834 IOAPIC: Dumping registers
1618 07:42:03.076461 reg 0x0000: 0x02000000
1619 07:42:03.078586 reg 0x0001: 0x00770020
1620 07:42:03.081739 reg 0x0002: 0x00000000
1621 07:42:03.085218 PCI: 00:1f.0 init finished in 21 msecs
1622 07:42:03.088691 PCI: 00:1f.2 init
1623 07:42:03.091963 Disabling ACPI via APMC.
1624 07:42:03.095475 APMC done.
1625 07:42:03.098711 PCI: 00:1f.2 init finished in 6 msecs
1626 07:42:03.110421 PCI: 01:00.0 init
1627 07:42:03.113263 PCI: 01:00.0 init finished in 0 msecs
1628 07:42:03.116494 PNP: 0c09.0 init
1629 07:42:03.119959 Google Chrome EC uptime: 8.409 seconds
1630 07:42:03.126788 Google Chrome AP resets since EC boot: 0
1631 07:42:03.129938 Google Chrome most recent AP reset causes:
1632 07:42:03.136895 Google Chrome EC reset flags at last EC boot: reset-pin
1633 07:42:03.139535 PNP: 0c09.0 init finished in 18 msecs
1634 07:42:03.144098 Devices initialized
1635 07:42:03.147462 Show all devs... After init.
1636 07:42:03.150809 Root Device: enabled 1
1637 07:42:03.151260 DOMAIN: 0000: enabled 1
1638 07:42:03.154311 CPU_CLUSTER: 0: enabled 1
1639 07:42:03.157605 PCI: 00:00.0: enabled 1
1640 07:42:03.161162 PCI: 00:02.0: enabled 1
1641 07:42:03.161633 PCI: 00:04.0: enabled 1
1642 07:42:03.164171 PCI: 00:05.0: enabled 1
1643 07:42:03.167346 PCI: 00:06.0: enabled 0
1644 07:42:03.170780 PCI: 00:07.0: enabled 0
1645 07:42:03.171196 PCI: 00:07.1: enabled 0
1646 07:42:03.174261 PCI: 00:07.2: enabled 0
1647 07:42:03.177102 PCI: 00:07.3: enabled 0
1648 07:42:03.180803 PCI: 00:08.0: enabled 1
1649 07:42:03.181242 PCI: 00:09.0: enabled 0
1650 07:42:03.184039 PCI: 00:0a.0: enabled 0
1651 07:42:03.187123 PCI: 00:0d.0: enabled 1
1652 07:42:03.190521 PCI: 00:0d.1: enabled 0
1653 07:42:03.190939 PCI: 00:0d.2: enabled 0
1654 07:42:03.193801 PCI: 00:0d.3: enabled 0
1655 07:42:03.197076 PCI: 00:0e.0: enabled 0
1656 07:42:03.200805 PCI: 00:10.2: enabled 1
1657 07:42:03.201225 PCI: 00:10.6: enabled 0
1658 07:42:03.203616 PCI: 00:10.7: enabled 0
1659 07:42:03.206937 PCI: 00:12.0: enabled 0
1660 07:42:03.207371 PCI: 00:12.6: enabled 0
1661 07:42:03.210269 PCI: 00:13.0: enabled 0
1662 07:42:03.213445 PCI: 00:14.0: enabled 1
1663 07:42:03.216739 PCI: 00:14.1: enabled 0
1664 07:42:03.217170 PCI: 00:14.2: enabled 1
1665 07:42:03.220119 PCI: 00:14.3: enabled 1
1666 07:42:03.223609 PCI: 00:15.0: enabled 1
1667 07:42:03.226963 PCI: 00:15.1: enabled 1
1668 07:42:03.227396 PCI: 00:15.2: enabled 1
1669 07:42:03.230439 PCI: 00:15.3: enabled 1
1670 07:42:03.233803 PCI: 00:16.0: enabled 1
1671 07:42:03.236571 PCI: 00:16.1: enabled 0
1672 07:42:03.237001 PCI: 00:16.2: enabled 0
1673 07:42:03.239995 PCI: 00:16.3: enabled 0
1674 07:42:03.243482 PCI: 00:16.4: enabled 0
1675 07:42:03.246749 PCI: 00:16.5: enabled 0
1676 07:42:03.247183 PCI: 00:17.0: enabled 0
1677 07:42:03.250163 PCI: 00:19.0: enabled 0
1678 07:42:03.253026 PCI: 00:19.1: enabled 1
1679 07:42:03.256953 PCI: 00:19.2: enabled 0
1680 07:42:03.257387 PCI: 00:1c.0: enabled 1
1681 07:42:03.259700 PCI: 00:1c.1: enabled 0
1682 07:42:03.263143 PCI: 00:1c.2: enabled 0
1683 07:42:03.263582 PCI: 00:1c.3: enabled 0
1684 07:42:03.266499 PCI: 00:1c.4: enabled 0
1685 07:42:03.270058 PCI: 00:1c.5: enabled 0
1686 07:42:03.273490 PCI: 00:1c.6: enabled 1
1687 07:42:03.273922 PCI: 00:1c.7: enabled 0
1688 07:42:03.276876 PCI: 00:1d.0: enabled 1
1689 07:42:03.279989 PCI: 00:1d.1: enabled 0
1690 07:42:03.283065 PCI: 00:1d.2: enabled 1
1691 07:42:03.283498 PCI: 00:1d.3: enabled 0
1692 07:42:03.286384 PCI: 00:1e.0: enabled 1
1693 07:42:03.289975 PCI: 00:1e.1: enabled 0
1694 07:42:03.292901 PCI: 00:1e.2: enabled 1
1695 07:42:03.293324 PCI: 00:1e.3: enabled 1
1696 07:42:03.296667 PCI: 00:1f.0: enabled 1
1697 07:42:03.299620 PCI: 00:1f.1: enabled 0
1698 07:42:03.303161 PCI: 00:1f.2: enabled 1
1699 07:42:03.303584 PCI: 00:1f.3: enabled 1
1700 07:42:03.306359 PCI: 00:1f.4: enabled 0
1701 07:42:03.309797 PCI: 00:1f.5: enabled 1
1702 07:42:03.312903 PCI: 00:1f.6: enabled 0
1703 07:42:03.313349 PCI: 00:1f.7: enabled 0
1704 07:42:03.316417 APIC: 00: enabled 1
1705 07:42:03.319354 GENERIC: 0.0: enabled 1
1706 07:42:03.319797 GENERIC: 0.0: enabled 1
1707 07:42:03.322547 GENERIC: 1.0: enabled 1
1708 07:42:03.325970 GENERIC: 0.0: enabled 1
1709 07:42:03.329267 GENERIC: 1.0: enabled 1
1710 07:42:03.329690 USB0 port 0: enabled 1
1711 07:42:03.332791 GENERIC: 0.0: enabled 1
1712 07:42:03.336110 USB0 port 0: enabled 1
1713 07:42:03.336542 GENERIC: 0.0: enabled 1
1714 07:42:03.339617 I2C: 00:1a: enabled 1
1715 07:42:03.343054 I2C: 00:31: enabled 1
1716 07:42:03.343478 I2C: 00:32: enabled 1
1717 07:42:03.345877 I2C: 00:10: enabled 1
1718 07:42:03.349265 I2C: 00:15: enabled 1
1719 07:42:03.352602 GENERIC: 0.0: enabled 0
1720 07:42:03.353210 GENERIC: 1.0: enabled 0
1721 07:42:03.356411 GENERIC: 0.0: enabled 1
1722 07:42:03.359504 SPI: 00: enabled 1
1723 07:42:03.359925 SPI: 00: enabled 1
1724 07:42:03.362914 PNP: 0c09.0: enabled 1
1725 07:42:03.366178 GENERIC: 0.0: enabled 1
1726 07:42:03.366599 USB3 port 0: enabled 1
1727 07:42:03.369300 USB3 port 1: enabled 1
1728 07:42:03.372682 USB3 port 2: enabled 0
1729 07:42:03.373103 USB3 port 3: enabled 0
1730 07:42:03.375985 USB2 port 0: enabled 0
1731 07:42:03.378923 USB2 port 1: enabled 1
1732 07:42:03.382392 USB2 port 2: enabled 1
1733 07:42:03.382813 USB2 port 3: enabled 0
1734 07:42:03.385813 USB2 port 4: enabled 1
1735 07:42:03.389230 USB2 port 5: enabled 0
1736 07:42:03.389680 USB2 port 6: enabled 0
1737 07:42:03.392375 USB2 port 7: enabled 0
1738 07:42:03.395745 USB2 port 8: enabled 0
1739 07:42:03.399467 USB2 port 9: enabled 0
1740 07:42:03.399981 USB3 port 0: enabled 0
1741 07:42:03.402587 USB3 port 1: enabled 1
1742 07:42:03.405565 USB3 port 2: enabled 0
1743 07:42:03.406137 USB3 port 3: enabled 0
1744 07:42:03.408865 GENERIC: 0.0: enabled 1
1745 07:42:03.412510 GENERIC: 1.0: enabled 1
1746 07:42:03.415464 APIC: 01: enabled 1
1747 07:42:03.415867 APIC: 03: enabled 1
1748 07:42:03.418873 APIC: 04: enabled 1
1749 07:42:03.419378 APIC: 07: enabled 1
1750 07:42:03.422086 APIC: 06: enabled 1
1751 07:42:03.425447 APIC: 02: enabled 1
1752 07:42:03.425906 APIC: 05: enabled 1
1753 07:42:03.428464 PCI: 01:00.0: enabled 1
1754 07:42:03.435583 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1755 07:42:03.438496 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1756 07:42:03.441963 ELOG: NV offset 0xf30000 size 0x1000
1757 07:42:03.449644 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1758 07:42:03.456010 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:59 UTC
1759 07:42:03.462650 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:59 UTC
1760 07:42:03.469136 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:59 UTC
1761 07:42:03.475839 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:59 UTC
1762 07:42:03.482698 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:59 UTC
1763 07:42:03.489010 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1764 07:42:03.495856 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:59 UTC
1765 07:42:03.502512 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1766 07:42:03.508928 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:59 UTC
1767 07:42:03.512193 elog_add_boot_reason: Logged dev mode boot
1768 07:42:03.518893 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1769 07:42:03.519351 Finalize devices...
1770 07:42:03.522191 Devices finalized
1771 07:42:03.528754 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1772 07:42:03.532121 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1773 07:42:03.538979 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1774 07:42:03.542178 ME: HFSTS1 : 0x80030055
1775 07:42:03.548938 ME: HFSTS2 : 0x30280116
1776 07:42:03.552016 ME: HFSTS3 : 0x00000050
1777 07:42:03.555171 ME: HFSTS4 : 0x00004000
1778 07:42:03.562129 ME: HFSTS5 : 0x00000000
1779 07:42:03.565430 ME: HFSTS6 : 0x00400006
1780 07:42:03.568715 ME: Manufacturing Mode : YES
1781 07:42:03.572330 ME: SPI Protection Mode Enabled : NO
1782 07:42:03.575559 ME: FW Partition Table : OK
1783 07:42:03.581809 ME: Bringup Loader Failure : NO
1784 07:42:03.585242 ME: Firmware Init Complete : NO
1785 07:42:03.588525 ME: Boot Options Present : NO
1786 07:42:03.591833 ME: Update In Progress : NO
1787 07:42:03.595289 ME: D0i3 Support : YES
1788 07:42:03.598704 ME: Low Power State Enabled : NO
1789 07:42:03.601910 ME: CPU Replaced : YES
1790 07:42:03.608881 ME: CPU Replacement Valid : YES
1791 07:42:03.612147 ME: Current Working State : 5
1792 07:42:03.615806 ME: Current Operation State : 1
1793 07:42:03.618888 ME: Current Operation Mode : 3
1794 07:42:03.622028 ME: Error Code : 0
1795 07:42:03.625597 ME: Enhanced Debug Mode : NO
1796 07:42:03.628759 ME: CPU Debug Disabled : YES
1797 07:42:03.631813 ME: TXT Support : NO
1798 07:42:03.638245 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1799 07:42:03.645205 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1800 07:42:03.647935 CBFS: 'fallback/slic' not found.
1801 07:42:03.655067 ACPI: Writing ACPI tables at 76b01000.
1802 07:42:03.655486 ACPI: * FACS
1803 07:42:03.658199 ACPI: * DSDT
1804 07:42:03.661384 Ramoops buffer: 0x100000@0x76a00000.
1805 07:42:03.664749 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1806 07:42:03.671541 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1807 07:42:03.674645 Google Chrome EC: version:
1808 07:42:03.678036 ro: voema_v2.0.10114-a447f03e46
1809 07:42:03.681259 rw: voema_v2.0.10114-a447f03e46
1810 07:42:03.681698 running image: 1
1811 07:42:03.688427 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1812 07:42:03.693009 ACPI: * FADT
1813 07:42:03.693428 SCI is IRQ9
1814 07:42:03.699209 ACPI: added table 1/32, length now 40
1815 07:42:03.699793 ACPI: * SSDT
1816 07:42:03.702596 Found 1 CPU(s) with 8 core(s) each.
1817 07:42:03.709404 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1818 07:42:03.712904 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1819 07:42:03.716297 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1820 07:42:03.719635 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1821 07:42:03.725616 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1822 07:42:03.732357 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1823 07:42:03.735815 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1824 07:42:03.742586 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1825 07:42:03.749565 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1826 07:42:03.752474 \_SB.PCI0.RP09: Added StorageD3Enable property
1827 07:42:03.755901 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1828 07:42:03.762323 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1829 07:42:03.769117 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1830 07:42:03.772526 PS2K: Passing 80 keymaps to kernel
1831 07:42:03.779189 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1832 07:42:03.785752 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1833 07:42:03.792302 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1834 07:42:03.798770 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1835 07:42:03.805717 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1836 07:42:03.812289 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1837 07:42:03.819005 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1838 07:42:03.825422 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1839 07:42:03.828733 ACPI: added table 2/32, length now 44
1840 07:42:03.832111 ACPI: * MCFG
1841 07:42:03.835572 ACPI: added table 3/32, length now 48
1842 07:42:03.836196 ACPI: * TPM2
1843 07:42:03.838453 TPM2 log created at 0x769f0000
1844 07:42:03.841824 ACPI: added table 4/32, length now 52
1845 07:42:03.845516 ACPI: * MADT
1846 07:42:03.846107 SCI is IRQ9
1847 07:42:03.848887 ACPI: added table 5/32, length now 56
1848 07:42:03.852139 current = 76b09850
1849 07:42:03.852648 ACPI: * DMAR
1850 07:42:03.858684 ACPI: added table 6/32, length now 60
1851 07:42:03.862138 ACPI: added table 7/32, length now 64
1852 07:42:03.862248 ACPI: * HPET
1853 07:42:03.865019 ACPI: added table 8/32, length now 68
1854 07:42:03.868484 ACPI: done.
1855 07:42:03.871322 ACPI tables: 35216 bytes.
1856 07:42:03.871423 smbios_write_tables: 769ef000
1857 07:42:03.875056 EC returned error result code 3
1858 07:42:03.878128 Couldn't obtain OEM name from CBI
1859 07:42:03.883558 Create SMBIOS type 16
1860 07:42:03.886885 Create SMBIOS type 17
1861 07:42:03.890047 GENERIC: 0.0 (WIFI Device)
1862 07:42:03.893263 SMBIOS tables: 1750 bytes.
1863 07:42:03.896744 Writing table forward entry at 0x00000500
1864 07:42:03.903189 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1865 07:42:03.906660 Writing coreboot table at 0x76b25000
1866 07:42:03.912937 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1867 07:42:03.916310 1. 0000000000001000-000000000009ffff: RAM
1868 07:42:03.919618 2. 00000000000a0000-00000000000fffff: RESERVED
1869 07:42:03.926449 3. 0000000000100000-00000000769eefff: RAM
1870 07:42:03.929929 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1871 07:42:03.936558 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1872 07:42:03.942784 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1873 07:42:03.946318 7. 0000000077000000-000000007fbfffff: RESERVED
1874 07:42:03.953099 8. 00000000c0000000-00000000cfffffff: RESERVED
1875 07:42:03.956498 9. 00000000f8000000-00000000f9ffffff: RESERVED
1876 07:42:03.959281 10. 00000000fb000000-00000000fb000fff: RESERVED
1877 07:42:03.966082 11. 00000000fe000000-00000000fe00ffff: RESERVED
1878 07:42:03.969479 12. 00000000fed80000-00000000fed87fff: RESERVED
1879 07:42:03.976315 13. 00000000fed90000-00000000fed92fff: RESERVED
1880 07:42:03.979221 14. 00000000feda0000-00000000feda1fff: RESERVED
1881 07:42:03.985858 15. 00000000fedc0000-00000000feddffff: RESERVED
1882 07:42:03.989607 16. 0000000100000000-00000002803fffff: RAM
1883 07:42:03.992415 Passing 4 GPIOs to payload:
1884 07:42:03.995904 NAME | PORT | POLARITY | VALUE
1885 07:42:04.002735 lid | undefined | high | high
1886 07:42:04.009178 power | undefined | high | low
1887 07:42:04.012258 oprom | undefined | high | low
1888 07:42:04.019292 EC in RW | 0x000000e5 | high | low
1889 07:42:04.025756 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5a83
1890 07:42:04.029234 coreboot table: 1576 bytes.
1891 07:42:04.032470 IMD ROOT 0. 0x76fff000 0x00001000
1892 07:42:04.035802 IMD SMALL 1. 0x76ffe000 0x00001000
1893 07:42:04.039271 FSP MEMORY 2. 0x76c4e000 0x003b0000
1894 07:42:04.042055 VPD 3. 0x76c4d000 0x00000367
1895 07:42:04.045463 RO MCACHE 4. 0x76c4c000 0x00000fdc
1896 07:42:04.048766 CONSOLE 5. 0x76c2c000 0x00020000
1897 07:42:04.052238 FMAP 6. 0x76c2b000 0x00000578
1898 07:42:04.058618 TIME STAMP 7. 0x76c2a000 0x00000910
1899 07:42:04.062363 VBOOT WORK 8. 0x76c16000 0x00014000
1900 07:42:04.065275 ROMSTG STCK 9. 0x76c15000 0x00001000
1901 07:42:04.068662 AFTER CAR 10. 0x76c0a000 0x0000b000
1902 07:42:04.072039 RAMSTAGE 11. 0x76b97000 0x00073000
1903 07:42:04.075498 REFCODE 12. 0x76b42000 0x00055000
1904 07:42:04.078818 SMM BACKUP 13. 0x76b32000 0x00010000
1905 07:42:04.082167 4f444749 14. 0x76b30000 0x00002000
1906 07:42:04.085064 EXT VBT15. 0x76b2d000 0x0000219f
1907 07:42:04.091843 COREBOOT 16. 0x76b25000 0x00008000
1908 07:42:04.095234 ACPI 17. 0x76b01000 0x00024000
1909 07:42:04.098770 ACPI GNVS 18. 0x76b00000 0x00001000
1910 07:42:04.101909 RAMOOPS 19. 0x76a00000 0x00100000
1911 07:42:04.105441 TPM2 TCGLOG20. 0x769f0000 0x00010000
1912 07:42:04.108475 SMBIOS 21. 0x769ef000 0x00000800
1913 07:42:04.111754 IMD small region:
1914 07:42:04.115451 IMD ROOT 0. 0x76ffec00 0x00000400
1915 07:42:04.118177 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1916 07:42:04.122038 POWER STATE 2. 0x76ffeb80 0x00000044
1917 07:42:04.124776 ROMSTAGE 3. 0x76ffeb60 0x00000004
1918 07:42:04.131823 MEM INFO 4. 0x76ffe980 0x000001e0
1919 07:42:04.135199 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1920 07:42:04.138449 MTRR: Physical address space:
1921 07:42:04.144698 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1922 07:42:04.151498 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1923 07:42:04.158304 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1924 07:42:04.164758 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1925 07:42:04.171478 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1926 07:42:04.178231 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1927 07:42:04.184405 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1928 07:42:04.187894 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 07:42:04.191295 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 07:42:04.194678 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 07:42:04.201002 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 07:42:04.204406 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 07:42:04.207746 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 07:42:04.211111 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 07:42:04.214306 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 07:42:04.221093 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 07:42:04.224339 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 07:42:04.227555 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 07:42:04.231570 call enable_fixed_mtrr()
1940 07:42:04.234704 CPU physical address size: 39 bits
1941 07:42:04.241132 MTRR: default type WB/UC MTRR counts: 6/6.
1942 07:42:04.244774 MTRR: UC selected as default type.
1943 07:42:04.251088 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1944 07:42:04.254570 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1945 07:42:04.261353 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1946 07:42:04.267579 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1947 07:42:04.274316 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1948 07:42:04.281053 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1949 07:42:04.281135
1950 07:42:04.284621 MTRR check
1951 07:42:04.287859 Fixed MTRRs : Enabled
1952 07:42:04.287941 Variable MTRRs: Enabled
1953 07:42:04.288005
1954 07:42:04.294199 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 07:42:04.297569 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 07:42:04.300946 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 07:42:04.304496 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 07:42:04.310628 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 07:42:04.313923 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 07:42:04.317312 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 07:42:04.320732 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 07:42:04.324137 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 07:42:04.330571 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 07:42:04.333682 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 07:42:04.340372 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1966 07:42:04.343860 call enable_fixed_mtrr()
1967 07:42:04.347606 Checking cr50 for pending updates
1968 07:42:04.350977 CPU physical address size: 39 bits
1969 07:42:04.354369 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 07:42:04.357722 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 07:42:04.363849 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 07:42:04.367313 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 07:42:04.370681 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 07:42:04.374071 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 07:42:04.380794 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 07:42:04.383717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 07:42:04.387059 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 07:42:04.390440 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 07:42:04.393890 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 07:42:04.400069 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 07:42:04.403334 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 07:42:04.406729 call enable_fixed_mtrr()
1983 07:42:04.410118 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 07:42:04.416955 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 07:42:04.420348 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 07:42:04.423791 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 07:42:04.426561 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 07:42:04.433329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 07:42:04.436653 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 07:42:04.439959 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 07:42:04.443180 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 07:42:04.447188 CPU physical address size: 39 bits
1993 07:42:04.453665 call enable_fixed_mtrr()
1994 07:42:04.457112 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 07:42:04.460462 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 07:42:04.463428 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 07:42:04.470243 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 07:42:04.473321 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 07:42:04.476896 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 07:42:04.480253 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 07:42:04.483620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 07:42:04.490115 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 07:42:04.493563 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 07:42:04.496419 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 07:42:04.499759 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 07:42:04.507296 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 07:42:04.507374 call enable_fixed_mtrr()
2008 07:42:04.514125 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 07:42:04.517443 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 07:42:04.520922 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 07:42:04.523805 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 07:42:04.530525 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 07:42:04.533923 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 07:42:04.537446 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 07:42:04.540675 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 07:42:04.547265 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 07:42:04.550565 CPU physical address size: 39 bits
2018 07:42:04.554162 call enable_fixed_mtrr()
2019 07:42:04.557290 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 07:42:04.563813 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 07:42:04.567307 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 07:42:04.570633 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 07:42:04.573917 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 07:42:04.577188 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 07:42:04.583862 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 07:42:04.587004 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 07:42:04.590082 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 07:42:04.593611 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 07:42:04.600340 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 07:42:04.603729 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 07:42:04.607214 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 07:42:04.610526 call enable_fixed_mtrr()
2033 07:42:04.613495 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 07:42:04.620238 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 07:42:04.623654 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 07:42:04.626535 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 07:42:04.629937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 07:42:04.636791 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 07:42:04.640311 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 07:42:04.643552 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 07:42:04.647204 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 07:42:04.650417 CPU physical address size: 39 bits
2043 07:42:04.657575 call enable_fixed_mtrr()
2044 07:42:04.657678 Reading cr50 TPM mode
2045 07:42:04.661603 CPU physical address size: 39 bits
2046 07:42:04.664757 CPU physical address size: 39 bits
2047 07:42:04.671700 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 6 ms
2048 07:42:04.674574 CPU physical address size: 39 bits
2049 07:42:04.681470 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2050 07:42:04.688083 Checking segment from ROM address 0xffc02b38
2051 07:42:04.691308 Checking segment from ROM address 0xffc02b54
2052 07:42:04.694938 Loading segment from ROM address 0xffc02b38
2053 07:42:04.698121 code (compression=0)
2054 07:42:04.707867 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2055 07:42:04.714560 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2056 07:42:04.717975 it's not compressed!
2057 07:42:04.856526 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2058 07:42:04.863184 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2059 07:42:04.869456 Loading segment from ROM address 0xffc02b54
2060 07:42:04.869535 Entry Point 0x30000000
2061 07:42:04.872933 Loaded segments
2062 07:42:04.879936 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2063 07:42:04.922184 Finalizing chipset.
2064 07:42:04.925970 Finalizing SMM.
2065 07:42:04.926071 APMC done.
2066 07:42:04.932473 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2067 07:42:04.935906 mp_park_aps done after 0 msecs.
2068 07:42:04.938904 Jumping to boot code at 0x30000000(0x76b25000)
2069 07:42:04.948906 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2070 07:42:04.948990
2071 07:42:04.949062
2072 07:42:04.949130
2073 07:42:04.952267 Starting depthcharge on Voema...
2074 07:42:04.952377
2075 07:42:04.952806 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2076 07:42:04.952934 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2077 07:42:04.953044 Setting prompt string to ['volteer:']
2078 07:42:04.953149 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2079 07:42:04.962229 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2080 07:42:04.962317
2081 07:42:04.968912 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2082 07:42:04.969030
2083 07:42:04.975566 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2084 07:42:04.975673
2085 07:42:04.979305 Failed to find eMMC card reader
2086 07:42:04.979406
2087 07:42:04.979496 Wipe memory regions:
2088 07:42:04.979584
2089 07:42:04.985486 [0x00000000001000, 0x000000000a0000)
2090 07:42:04.985561
2091 07:42:04.988439 [0x00000000100000, 0x00000030000000)
2092 07:42:05.014685
2093 07:42:05.018127 [0x00000032662db0, 0x000000769ef000)
2094 07:42:05.053392
2095 07:42:05.056833 [0x00000100000000, 0x00000280400000)
2096 07:42:05.260746
2097 07:42:05.263978 ec_init: CrosEC protocol v3 supported (256, 256)
2098 07:42:05.695599
2099 07:42:05.695746 R8152: Initializing
2100 07:42:05.695814
2101 07:42:05.698836 Version 6 (ocp_data = 5c30)
2102 07:42:05.698934
2103 07:42:05.702326 R8152: Done initializing
2104 07:42:05.702423
2105 07:42:05.705730 Adding net device
2106 07:42:06.006831
2107 07:42:06.009974 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2108 07:42:06.010083
2109 07:42:06.010178
2110 07:42:06.010268
2111 07:42:06.013776 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 07:42:06.114215 volteer: tftpboot 192.168.201.1 12435192/tftp-deploy-aiwvmot4/kernel/bzImage 12435192/tftp-deploy-aiwvmot4/kernel/cmdline 12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
2114 07:42:06.114583 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2115 07:42:06.114862 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2116 07:42:06.118565 tftpboot 192.168.201.1 12435192/tftp-deploy-aiwvmot4/kernel/bzImploy-aiwvmot4/kernel/cmdline 12435192/tftp-deploy-aiwvmot4/ramdisk/ramdisk.cpio.gz
2117 07:42:06.118917
2118 07:42:06.119201 Waiting for link
2119 07:42:06.321704
2120 07:42:06.321872 done.
2121 07:42:06.321968
2122 07:42:06.322058 MAC: 00:24:32:30:77:76
2123 07:42:06.322146
2124 07:42:06.325177 Sending DHCP discover... done.
2125 07:42:06.325250
2126 07:42:06.328394 Waiting for reply... done.
2127 07:42:06.328464
2128 07:42:06.331419 Sending DHCP request... done.
2129 07:42:06.331494
2130 07:42:06.337981 Waiting for reply... done.
2131 07:42:06.338074
2132 07:42:06.338165 My ip is 192.168.201.16
2133 07:42:06.338255
2134 07:42:06.341685 The DHCP server ip is 192.168.201.1
2135 07:42:06.344672
2136 07:42:06.348026 TFTP server IP predefined by user: 192.168.201.1
2137 07:42:06.348144
2138 07:42:06.354663 Bootfile predefined by user: 12435192/tftp-deploy-aiwvmot4/kernel/bzImage
2139 07:42:06.354764
2140 07:42:06.357654 Sending tftp read request... done.
2141 07:42:06.357735
2142 07:42:06.364635 Waiting for the transfer...
2143 07:42:06.364715
2144 07:42:06.931334 00000000 ################################################################
2145 07:42:06.931484
2146 07:42:07.471289 00080000 ################################################################
2147 07:42:07.471433
2148 07:42:08.015165 00100000 ################################################################
2149 07:42:08.015344
2150 07:42:08.593354 00180000 ################################################################
2151 07:42:08.593506
2152 07:42:09.174186 00200000 ################################################################
2153 07:42:09.174327
2154 07:42:09.761295 00280000 ################################################################
2155 07:42:09.761445
2156 07:42:10.342032 00300000 ################################################################
2157 07:42:10.342192
2158 07:42:10.922562 00380000 ################################################################
2159 07:42:10.922712
2160 07:42:11.452336 00400000 ################################################################
2161 07:42:11.452487
2162 07:42:11.985875 00480000 ################################################################
2163 07:42:11.986049
2164 07:42:12.497278 00500000 ################################################################
2165 07:42:12.497494
2166 07:42:13.007224 00580000 ################################################################
2167 07:42:13.007372
2168 07:42:13.527175 00600000 ################################################################
2169 07:42:13.527326
2170 07:42:14.082720 00680000 ################################################################
2171 07:42:14.082873
2172 07:42:14.641543 00700000 ################################################################
2173 07:42:14.641693
2174 07:42:15.234733 00780000 ################################################################
2175 07:42:15.235253
2176 07:42:15.462007 00800000 ####################### done.
2177 07:42:15.462513
2178 07:42:15.465108 The bootfile was 8572816 bytes long.
2179 07:42:15.465536
2180 07:42:15.468538 Sending tftp read request... done.
2181 07:42:15.468962
2182 07:42:15.471857 Waiting for the transfer...
2183 07:42:15.472497
2184 07:42:16.178806 00000000 ################################################################
2185 07:42:16.179452
2186 07:42:16.882258 00080000 ################################################################
2187 07:42:16.882634
2188 07:42:17.522660 00100000 ################################################################
2189 07:42:17.523180
2190 07:42:18.116602 00180000 ################################################################
2191 07:42:18.116797
2192 07:42:18.807555 00200000 ################################################################
2193 07:42:18.808180
2194 07:42:19.399260 00280000 ################################################################
2195 07:42:19.399409
2196 07:42:19.947979 00300000 ################################################################
2197 07:42:19.948615
2198 07:42:20.515265 00380000 ################################################################
2199 07:42:20.515414
2200 07:42:21.133944 00400000 ################################################################
2201 07:42:21.134464
2202 07:42:21.805084 00480000 ################################################################
2203 07:42:21.805790
2204 07:42:22.442650 00500000 ################################################################
2205 07:42:22.443304
2206 07:42:23.112025 00580000 ################################################################
2207 07:42:23.112610
2208 07:42:23.794937 00600000 ################################################################
2209 07:42:23.795122
2210 07:42:24.441753 00680000 ################################################################
2211 07:42:24.442276
2212 07:42:25.107840 00700000 ################################################################
2213 07:42:25.108397
2214 07:42:25.695858 00780000 ################################################################
2215 07:42:25.696040
2216 07:42:26.342564 00800000 ################################################################
2217 07:42:26.343097
2218 07:42:26.975006 00880000 ################################################################
2219 07:42:26.975435
2220 07:42:27.619300 00900000 ################################################################
2221 07:42:27.619915
2222 07:42:28.325732 00980000 ################################################################
2223 07:42:28.325874
2224 07:42:29.002937 00a00000 ################################################################
2225 07:42:29.003463
2226 07:42:29.658233 00a80000 ################################################################
2227 07:42:29.658759
2228 07:42:30.365646 00b00000 ################################################################
2229 07:42:30.365832
2230 07:42:31.033300 00b80000 ################################################################
2231 07:42:31.033806
2232 07:42:31.735204 00c00000 ################################################################
2233 07:42:31.735581
2234 07:42:32.440655 00c80000 ################################################################
2235 07:42:32.441233
2236 07:42:33.071342 00d00000 ################################################################
2237 07:42:33.071521
2238 07:42:33.624678 00d80000 ################################################################
2239 07:42:33.624824
2240 07:42:34.189012 00e00000 ################################################################
2241 07:42:34.189171
2242 07:42:34.819808 00e80000 ################################################################
2243 07:42:34.820497
2244 07:42:35.524321 00f00000 ################################################################
2245 07:42:35.524860
2246 07:42:36.215721 00f80000 ################################################################
2247 07:42:36.216263
2248 07:42:36.897371 01000000 ################################################################
2249 07:42:36.897898
2250 07:42:37.611227 01080000 ################################################################
2251 07:42:37.611732
2252 07:42:38.333656 01100000 ################################################################
2253 07:42:38.334205
2254 07:42:39.021931 01180000 ################################################################
2255 07:42:39.022083
2256 07:42:39.683922 01200000 ################################################################
2257 07:42:39.684705
2258 07:42:40.393128 01280000 ################################################################
2259 07:42:40.393639
2260 07:42:41.121168 01300000 ################################################################
2261 07:42:41.121680
2262 07:42:41.800681 01380000 ################################################################
2263 07:42:41.800829
2264 07:42:42.473029 01400000 ################################################################
2265 07:42:42.473541
2266 07:42:43.138355 01480000 ################################################################
2267 07:42:43.138500
2268 07:42:43.762078 01500000 ################################################################
2269 07:42:43.762591
2270 07:42:44.439698 01580000 ################################################################
2271 07:42:44.439867
2272 07:42:45.056472 01600000 ################################################################
2273 07:42:45.057019
2274 07:42:45.753256 01680000 ################################################################
2275 07:42:45.753939
2276 07:42:46.475949 01700000 ################################################################
2277 07:42:46.476169
2278 07:42:47.099813 01780000 ################################################################
2279 07:42:47.100331
2280 07:42:47.803404 01800000 ################################################################
2281 07:42:47.803918
2282 07:42:48.450241 01880000 ################################################################
2283 07:42:48.450390
2284 07:42:49.055852 01900000 ################################################################
2285 07:42:49.056522
2286 07:42:49.749684 01980000 ################################################################
2287 07:42:49.750320
2288 07:42:50.424553 01a00000 ################################################################
2289 07:42:50.425077
2290 07:42:51.101436 01a80000 ################################################################
2291 07:42:51.101861
2292 07:42:51.781749 01b00000 ################################################################
2293 07:42:51.782269
2294 07:42:52.488585 01b80000 ################################################################
2295 07:42:52.489119
2296 07:42:53.195430 01c00000 ################################################################
2297 07:42:53.196141
2298 07:42:53.887816 01c80000 ################################################################
2299 07:42:53.888507
2300 07:42:54.581835 01d00000 ################################################################
2301 07:42:54.582529
2302 07:42:55.226512 01d80000 ################################################################
2303 07:42:55.227023
2304 07:42:55.942483 01e00000 ################################################################
2305 07:42:55.942629
2306 07:42:56.617351 01e80000 ################################################################
2307 07:42:56.617867
2308 07:42:57.292864 01f00000 ################################################################
2309 07:42:57.293015
2310 07:42:57.931931 01f80000 ################################################################
2311 07:42:57.932537
2312 07:42:58.619872 02000000 ################################################################
2313 07:42:58.620432
2314 07:42:59.278493 02080000 ################################################################
2315 07:42:59.279019
2316 07:42:59.906027 02100000 ################################################################
2317 07:42:59.906173
2318 07:43:00.582474 02180000 ################################################################
2319 07:43:00.583062
2320 07:43:01.163918 02200000 ###################################################### done.
2321 07:43:01.164349
2322 07:43:01.166887 Sending tftp read request... done.
2323 07:43:01.167189
2324 07:43:01.170596 Waiting for the transfer...
2325 07:43:01.170985
2326 07:43:01.171296 00000000 # done.
2327 07:43:01.171592
2328 07:43:01.180845 Command line loaded dynamically from TFTP file: 12435192/tftp-deploy-aiwvmot4/kernel/cmdline
2329 07:43:01.181390
2330 07:43:01.196945 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2331 07:43:01.202376
2332 07:43:01.205896 Shutting down all USB controllers.
2333 07:43:01.206457
2334 07:43:01.206829 Removing current net device
2335 07:43:01.207177
2336 07:43:01.208921 Finalizing coreboot
2337 07:43:01.209312
2338 07:43:01.215571 Exiting depthcharge with code 4 at timestamp: 64929911
2339 07:43:01.216195
2340 07:43:01.216578
2341 07:43:01.216922 Starting kernel ...
2342 07:43:01.217299
2343 07:43:01.217632
2344 07:43:01.219488 end: 2.2.4 bootloader-commands (duration 00:00:56) [common]
2345 07:43:01.220022 start: 2.2.5 auto-login-action (timeout 00:03:48) [common]
2346 07:43:01.220487 Setting prompt string to ['Linux version [0-9]']
2347 07:43:01.220865 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2348 07:43:01.221261 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2350 07:46:49.220890 end: 2.2.5 auto-login-action (duration 00:03:48) [common]
2352 07:46:49.221877 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 228 seconds'
2354 07:46:49.223008 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2357 07:46:49.224779 end: 2 depthcharge-action (duration 00:05:00) [common]
2359 07:46:49.225885 Cleaning after the job
2360 07:46:49.226357 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/ramdisk
2361 07:46:49.248049 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/kernel
2362 07:46:49.252146 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435192/tftp-deploy-aiwvmot4/modules
2363 07:46:49.253077 start: 4.1 power-off (timeout 00:00:30) [common]
2364 07:46:49.253497 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2365 07:46:49.340701 >> Command sent successfully.
2366 07:46:49.352281 Returned 0 in 0 seconds
2367 07:46:49.453613 end: 4.1 power-off (duration 00:00:00) [common]
2369 07:46:49.455333 start: 4.2 read-feedback (timeout 00:10:00) [common]
2370 07:46:49.456784 Listened to connection for namespace 'common' for up to 1s
2371 07:46:50.457409 Finalising connection for namespace 'common'
2372 07:46:50.458103 Disconnecting from shell: Finalise
2373 07:46:50.458515
2374 07:46:50.559324 end: 4.2 read-feedback (duration 00:00:01) [common]
2375 07:46:50.559510 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435192
2376 07:46:50.657564 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435192
2377 07:46:50.657768 JobError: Your job cannot terminate cleanly.