Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:44:03.971892 lava-dispatcher, installed at version: 2023.10
2 07:44:03.972130 start: 0 validate
3 07:44:03.972281 Start time: 2024-01-03 07:44:03.972270+00:00 (UTC)
4 07:44:03.972413 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:44:03.972561 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Finitrd.cpio.gz exists
6 07:44:04.241329 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:44:04.241524 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:44:04.508136 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:44:04.508331 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:44:04.774514 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:44:04.774723 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:44:05.041529 validate duration: 1.07
14 07:44:05.041841 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:44:05.041950 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:44:05.042047 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:44:05.042186 Not decompressing ramdisk as can be used compressed.
18 07:44:05.042281 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/initrd.cpio.gz
19 07:44:05.042357 saving as /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/ramdisk/initrd.cpio.gz
20 07:44:05.042429 total size: 6136272 (5 MB)
21 07:44:05.043588 progress 0 % (0 MB)
22 07:44:05.045665 progress 5 % (0 MB)
23 07:44:05.047460 progress 10 % (0 MB)
24 07:44:05.049477 progress 15 % (0 MB)
25 07:44:05.051283 progress 20 % (1 MB)
26 07:44:05.053115 progress 25 % (1 MB)
27 07:44:05.055107 progress 30 % (1 MB)
28 07:44:05.056969 progress 35 % (2 MB)
29 07:44:05.058727 progress 40 % (2 MB)
30 07:44:05.060685 progress 45 % (2 MB)
31 07:44:05.062430 progress 50 % (2 MB)
32 07:44:05.064178 progress 55 % (3 MB)
33 07:44:05.066118 progress 60 % (3 MB)
34 07:44:05.067872 progress 65 % (3 MB)
35 07:44:05.069805 progress 70 % (4 MB)
36 07:44:05.071552 progress 75 % (4 MB)
37 07:44:05.073323 progress 80 % (4 MB)
38 07:44:05.075275 progress 85 % (5 MB)
39 07:44:05.077153 progress 90 % (5 MB)
40 07:44:05.078970 progress 95 % (5 MB)
41 07:44:05.080945 progress 100 % (5 MB)
42 07:44:05.081121 5 MB downloaded in 0.04 s (151.25 MB/s)
43 07:44:05.081296 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:44:05.081612 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:44:05.081711 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:44:05.081807 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:44:05.081963 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:44:05.082046 saving as /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/kernel/bzImage
50 07:44:05.082116 total size: 8572816 (8 MB)
51 07:44:05.082184 No compression specified
52 07:44:05.083391 progress 0 % (0 MB)
53 07:44:05.086034 progress 5 % (0 MB)
54 07:44:05.088594 progress 10 % (0 MB)
55 07:44:05.091196 progress 15 % (1 MB)
56 07:44:05.093809 progress 20 % (1 MB)
57 07:44:05.096360 progress 25 % (2 MB)
58 07:44:05.098926 progress 30 % (2 MB)
59 07:44:05.101476 progress 35 % (2 MB)
60 07:44:05.104020 progress 40 % (3 MB)
61 07:44:05.106706 progress 45 % (3 MB)
62 07:44:05.109265 progress 50 % (4 MB)
63 07:44:05.111820 progress 55 % (4 MB)
64 07:44:05.114345 progress 60 % (4 MB)
65 07:44:05.117024 progress 65 % (5 MB)
66 07:44:05.119505 progress 70 % (5 MB)
67 07:44:05.122004 progress 75 % (6 MB)
68 07:44:05.124493 progress 80 % (6 MB)
69 07:44:05.127036 progress 85 % (6 MB)
70 07:44:05.129601 progress 90 % (7 MB)
71 07:44:05.132080 progress 95 % (7 MB)
72 07:44:05.134608 progress 100 % (8 MB)
73 07:44:05.134828 8 MB downloaded in 0.05 s (155.11 MB/s)
74 07:44:05.134990 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:44:05.135248 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:44:05.135352 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:44:05.135449 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:44:05.135601 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/full.rootfs.tar.xz
80 07:44:05.135679 saving as /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/nfsrootfs/full.rootfs.tar
81 07:44:05.135752 total size: 205766564 (196 MB)
82 07:44:05.135821 Using unxz to decompress xz
83 07:44:05.140938 progress 0 % (0 MB)
84 07:44:05.817544 progress 5 % (9 MB)
85 07:44:06.410854 progress 10 % (19 MB)
86 07:44:07.074926 progress 15 % (29 MB)
87 07:44:07.381041 progress 20 % (39 MB)
88 07:44:08.012016 progress 25 % (49 MB)
89 07:44:08.670856 progress 30 % (58 MB)
90 07:44:09.321748 progress 35 % (68 MB)
91 07:44:09.986020 progress 40 % (78 MB)
92 07:44:10.678596 progress 45 % (88 MB)
93 07:44:11.377563 progress 50 % (98 MB)
94 07:44:12.090515 progress 55 % (107 MB)
95 07:44:12.897923 progress 60 % (117 MB)
96 07:44:13.379732 progress 65 % (127 MB)
97 07:44:13.477998 progress 70 % (137 MB)
98 07:44:13.638377 progress 75 % (147 MB)
99 07:44:13.728112 progress 80 % (157 MB)
100 07:44:13.785668 progress 85 % (166 MB)
101 07:44:13.890569 progress 90 % (176 MB)
102 07:44:14.295256 progress 95 % (186 MB)
103 07:44:14.971875 progress 100 % (196 MB)
104 07:44:14.978512 196 MB downloaded in 9.84 s (19.94 MB/s)
105 07:44:14.978777 end: 1.3.1 http-download (duration 00:00:10) [common]
107 07:44:14.979065 end: 1.3 download-retry (duration 00:00:10) [common]
108 07:44:14.979164 start: 1.4 download-retry (timeout 00:09:50) [common]
109 07:44:14.979261 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 07:44:14.979423 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:44:14.979503 saving as /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/modules/modules.tar
112 07:44:14.979570 total size: 251144 (0 MB)
113 07:44:14.979639 Using unxz to decompress xz
114 07:44:14.984112 progress 13 % (0 MB)
115 07:44:14.984579 progress 26 % (0 MB)
116 07:44:14.984848 progress 39 % (0 MB)
117 07:44:14.986664 progress 52 % (0 MB)
118 07:44:14.988803 progress 65 % (0 MB)
119 07:44:14.990887 progress 78 % (0 MB)
120 07:44:14.992875 progress 91 % (0 MB)
121 07:44:14.995042 progress 100 % (0 MB)
122 07:44:15.001055 0 MB downloaded in 0.02 s (11.15 MB/s)
123 07:44:15.001320 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:44:15.001621 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:44:15.001730 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 07:44:15.001837 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 07:44:19.131541 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435197/extract-nfsrootfs-abk8auac
129 07:44:19.131763 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 07:44:19.131877 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 07:44:19.132065 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0
132 07:44:19.132213 makedir: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin
133 07:44:19.132328 makedir: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/tests
134 07:44:19.132438 makedir: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/results
135 07:44:19.132554 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-add-keys
136 07:44:19.132724 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-add-sources
137 07:44:19.132869 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-background-process-start
138 07:44:19.133011 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-background-process-stop
139 07:44:19.133169 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-common-functions
140 07:44:19.133310 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-echo-ipv4
141 07:44:19.133452 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-install-packages
142 07:44:19.133593 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-installed-packages
143 07:44:19.133730 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-os-build
144 07:44:19.133868 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-probe-channel
145 07:44:19.134007 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-probe-ip
146 07:44:19.134144 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-target-ip
147 07:44:19.134282 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-target-mac
148 07:44:19.134421 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-target-storage
149 07:44:19.134564 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-case
150 07:44:19.134707 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-event
151 07:44:19.134845 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-feedback
152 07:44:19.134984 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-raise
153 07:44:19.135136 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-reference
154 07:44:19.135283 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-runner
155 07:44:19.135423 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-set
156 07:44:19.135561 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-test-shell
157 07:44:19.135703 Updating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-add-keys (debian)
158 07:44:19.135871 Updating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-add-sources (debian)
159 07:44:19.136026 Updating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-install-packages (debian)
160 07:44:19.136181 Updating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-installed-packages (debian)
161 07:44:19.136334 Updating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/bin/lava-os-build (debian)
162 07:44:19.136469 Creating /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/environment
163 07:44:19.136576 LAVA metadata
164 07:44:19.136667 - LAVA_JOB_ID=12435197
165 07:44:19.136740 - LAVA_DISPATCHER_IP=192.168.201.1
166 07:44:19.136852 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 07:44:19.136926 skipped lava-vland-overlay
168 07:44:19.137009 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 07:44:19.137097 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 07:44:19.137179 skipped lava-multinode-overlay
171 07:44:19.137260 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 07:44:19.137347 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 07:44:19.137428 Loading test definitions
174 07:44:19.137529 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 07:44:19.137607 Using /lava-12435197 at stage 0
176 07:44:19.137923 uuid=12435197_1.5.2.3.1 testdef=None
177 07:44:19.138021 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 07:44:19.138115 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 07:44:19.138622 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 07:44:19.138866 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 07:44:19.139499 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 07:44:19.139753 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 07:44:19.140352 runner path: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/0/tests/0_timesync-off test_uuid 12435197_1.5.2.3.1
186 07:44:19.140521 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 07:44:19.140779 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 07:44:19.140860 Using /lava-12435197 at stage 0
190 07:44:19.140967 Fetching tests from https://github.com/kernelci/test-definitions.git
191 07:44:19.141053 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/0/tests/1_kselftest-alsa'
192 07:44:32.478699 Running '/usr/bin/git checkout kernelci.org
193 07:44:32.644989 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 07:44:32.645834 uuid=12435197_1.5.2.3.5 testdef=None
195 07:44:32.646004 end: 1.5.2.3.5 git-repo-action (duration 00:00:14) [common]
197 07:44:32.646276 start: 1.5.2.3.6 test-overlay (timeout 00:09:32) [common]
198 07:44:32.647118 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 07:44:32.647376 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:32) [common]
201 07:44:32.648638 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 07:44:32.648903 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:32) [common]
204 07:44:32.649969 runner path: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/0/tests/1_kselftest-alsa test_uuid 12435197_1.5.2.3.5
205 07:44:32.650075 BOARD='asus-cx9400-volteer'
206 07:44:32.650147 BRANCH='cip'
207 07:44:32.650213 SKIPFILE='/dev/null'
208 07:44:32.650278 SKIP_INSTALL='True'
209 07:44:32.650341 TESTPROG_URL='None'
210 07:44:32.650404 TST_CASENAME=''
211 07:44:32.650466 TST_CMDFILES='alsa'
212 07:44:32.650625 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 07:44:32.650869 Creating lava-test-runner.conf files
215 07:44:32.650940 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435197/lava-overlay-jyma5nh0/lava-12435197/0 for stage 0
216 07:44:32.651044 - 0_timesync-off
217 07:44:32.651120 - 1_kselftest-alsa
218 07:44:32.651230 end: 1.5.2.3 test-definition (duration 00:00:14) [common]
219 07:44:32.651329 start: 1.5.2.4 compress-overlay (timeout 00:09:32) [common]
220 07:44:41.171570 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
221 07:44:41.171756 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:24) [common]
222 07:44:41.171897 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 07:44:41.172046 end: 1.5.2 lava-overlay (duration 00:00:22) [common]
224 07:44:41.172172 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:24) [common]
225 07:44:41.352697 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 07:44:41.353192 start: 1.5.4 extract-modules (timeout 00:09:24) [common]
227 07:44:41.353455 extracting modules file /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435197/extract-nfsrootfs-abk8auac
228 07:44:41.369608 extracting modules file /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435197/extract-overlay-ramdisk-0bpgs4em/ramdisk
229 07:44:41.384434 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 07:44:41.384596 start: 1.5.5 apply-overlay-tftp (timeout 00:09:24) [common]
231 07:44:41.384722 [common] Applying overlay to NFS
232 07:44:41.384813 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435197/compress-overlay-egbtgtf_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435197/extract-nfsrootfs-abk8auac
233 07:44:42.475254 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 07:44:42.475469 start: 1.5.6 configure-preseed-file (timeout 00:09:23) [common]
235 07:44:42.475584 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 07:44:42.475682 start: 1.5.7 compress-ramdisk (timeout 00:09:23) [common]
237 07:44:42.475772 Building ramdisk /var/lib/lava/dispatcher/tmp/12435197/extract-overlay-ramdisk-0bpgs4em/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435197/extract-overlay-ramdisk-0bpgs4em/ramdisk
238 07:44:42.572863 >> 30691 blocks
239 07:44:43.299415 rename /var/lib/lava/dispatcher/tmp/12435197/extract-overlay-ramdisk-0bpgs4em/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
240 07:44:43.299939 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 07:44:43.300079 start: 1.5.8 prepare-kernel (timeout 00:09:22) [common]
242 07:44:43.300192 start: 1.5.8.1 prepare-fit (timeout 00:09:22) [common]
243 07:44:43.300298 No mkimage arch provided, not using FIT.
244 07:44:43.300397 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 07:44:43.300502 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 07:44:43.300667 end: 1.5 prepare-tftp-overlay (duration 00:00:28) [common]
247 07:44:43.300773 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:22) [common]
248 07:44:43.300864 No LXC device requested
249 07:44:43.300954 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 07:44:43.301068 start: 1.7 deploy-device-env (timeout 00:09:22) [common]
251 07:44:43.301195 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 07:44:43.301341 Checking files for TFTP limit of 4294967296 bytes.
253 07:44:43.301942 end: 1 tftp-deploy (duration 00:00:38) [common]
254 07:44:43.302088 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 07:44:43.302231 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 07:44:43.302422 substitutions:
257 07:44:43.302527 - {DTB}: None
258 07:44:43.302631 - {INITRD}: 12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
259 07:44:43.302729 - {KERNEL}: 12435197/tftp-deploy-rmcrzrxv/kernel/bzImage
260 07:44:43.302824 - {LAVA_MAC}: None
261 07:44:43.302922 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435197/extract-nfsrootfs-abk8auac
262 07:44:43.303021 - {NFS_SERVER_IP}: 192.168.201.1
263 07:44:43.303115 - {PRESEED_CONFIG}: None
264 07:44:43.303207 - {PRESEED_LOCAL}: None
265 07:44:43.303300 - {RAMDISK}: 12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
266 07:44:43.303393 - {ROOT_PART}: None
267 07:44:43.303486 - {ROOT}: None
268 07:44:43.303577 - {SERVER_IP}: 192.168.201.1
269 07:44:43.303669 - {TEE}: None
270 07:44:43.303761 Parsed boot commands:
271 07:44:43.303853 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 07:44:43.304100 Parsed boot commands: tftpboot 192.168.201.1 12435197/tftp-deploy-rmcrzrxv/kernel/bzImage 12435197/tftp-deploy-rmcrzrxv/kernel/cmdline 12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
273 07:44:43.304229 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 07:44:43.304356 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 07:44:43.304489 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 07:44:43.304627 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 07:44:43.304712 Not connected, no need to disconnect.
278 07:44:43.304810 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 07:44:43.304908 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 07:44:43.304986 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
281 07:44:43.309830 Setting prompt string to ['lava-test: # ']
282 07:44:43.310303 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 07:44:43.310484 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 07:44:43.310636 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 07:44:43.310772 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 07:44:43.311178 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
287 07:44:48.448859 >> Command sent successfully.
288 07:44:48.451584 Returned 0 in 5 seconds
289 07:44:48.552015 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 07:44:48.552387 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 07:44:48.552504 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 07:44:48.552609 Setting prompt string to 'Starting depthcharge on Voema...'
294 07:44:48.552700 Changing prompt to 'Starting depthcharge on Voema...'
295 07:44:48.552777 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 07:44:48.553068 [Enter `^Ec?' for help]
297 07:44:50.117652
298 07:44:50.118212
299 07:44:50.126882 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 07:44:50.133120 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
301 07:44:50.136736 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 07:44:50.139971 CPU: AES supported, TXT NOT supported, VT supported
303 07:44:50.147231 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 07:44:50.150365 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 07:44:50.157196 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 07:44:50.160649 VBOOT: Loading verstage.
307 07:44:50.163694 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 07:44:50.170355 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 07:44:50.173785 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 07:44:50.184103 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 07:44:50.190551 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 07:44:50.191121
313 07:44:50.191599
314 07:44:50.200743 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 07:44:50.217521 Probing TPM: . done!
316 07:44:50.221068 TPM ready after 0 ms
317 07:44:50.224432 Connected to device vid:did:rid of 1ae0:0028:00
318 07:44:50.235936 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
319 07:44:50.242136 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 07:44:50.245141 Initialized TPM device CR50 revision 0
321 07:44:50.300653 tlcl_send_startup: Startup return code is 0
322 07:44:50.301318 TPM: setup succeeded
323 07:44:50.314772 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 07:44:50.329214 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 07:44:50.341951 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 07:44:50.351822 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 07:44:50.355636 Chrome EC: UHEPI supported
328 07:44:50.359158 Phase 1
329 07:44:50.362547 FMAP: area GBB found @ 1805000 (458752 bytes)
330 07:44:50.372283 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 07:44:50.379389 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 07:44:50.385749 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 07:44:50.392114 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 07:44:50.396056 Recovery requested (1009000e)
335 07:44:50.399209 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 07:44:50.410756 tlcl_extend: response is 0
337 07:44:50.417266 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 07:44:50.427588 tlcl_extend: response is 0
339 07:44:50.433834 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 07:44:50.440249 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 07:44:50.447198 BS: verstage times (exec / console): total (unknown) / 142 ms
342 07:44:50.447651
343 07:44:50.447996
344 07:44:50.460324 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 07:44:50.467222 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 07:44:50.470112 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 07:44:50.473687 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 07:44:50.479890 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 07:44:50.483906 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 07:44:50.487220 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
351 07:44:50.490075 TCO_STS: 0000 0000
352 07:44:50.493857 GEN_PMCON: d0015038 00002200
353 07:44:50.497067 GBLRST_CAUSE: 00000000 00000000
354 07:44:50.497500 HPR_CAUSE0: 00000000
355 07:44:50.499869 prev_sleep_state 5
356 07:44:50.503080 Boot Count incremented to 23675
357 07:44:50.509972 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 07:44:50.516207 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 07:44:50.523283 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 07:44:50.529418 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 07:44:50.534354 Chrome EC: UHEPI supported
362 07:44:50.540842 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 07:44:50.553394 Probing TPM: done!
364 07:44:50.560549 Connected to device vid:did:rid of 1ae0:0028:00
365 07:44:50.569893 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
366 07:44:50.573477 Initialized TPM device CR50 revision 0
367 07:44:50.588323 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 07:44:50.595344 MRC: Hash idx 0x100b comparison successful.
369 07:44:50.598449 MRC cache found, size faa8
370 07:44:50.598563 bootmode is set to: 2
371 07:44:50.601674 SPD index = 2
372 07:44:50.608686 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 07:44:50.611992 SPD: module type is LPDDR4X
374 07:44:50.615256 SPD: module part number is MT53D1G64D4NW-046
375 07:44:50.621610 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
376 07:44:50.624834 SPD: device width 16 bits, bus width 16 bits
377 07:44:50.631722 SPD: module size is 2048 MB (per channel)
378 07:44:51.062275 CBMEM:
379 07:44:51.065512 IMD: root @ 0x76fff000 254 entries.
380 07:44:51.068690 IMD: root @ 0x76ffec00 62 entries.
381 07:44:51.071674 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 07:44:51.078807 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 07:44:51.081995 External stage cache:
384 07:44:51.085138 IMD: root @ 0x7b3ff000 254 entries.
385 07:44:51.088324 IMD: root @ 0x7b3fec00 62 entries.
386 07:44:51.103398 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 07:44:51.109858 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 07:44:51.116646 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 07:44:51.130002 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 07:44:51.136980 cse_lite: Skip switching to RW in the recovery path
391 07:44:51.137432 8 DIMMs found
392 07:44:51.137838 SMM Memory Map
393 07:44:51.139911 SMRAM : 0x7b000000 0x800000
394 07:44:51.146893 Subregion 0: 0x7b000000 0x200000
395 07:44:51.150107 Subregion 1: 0x7b200000 0x200000
396 07:44:51.153837 Subregion 2: 0x7b400000 0x400000
397 07:44:51.154287 top_of_ram = 0x77000000
398 07:44:51.160076 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 07:44:51.167089 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 07:44:51.170123 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 07:44:51.176528 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 07:44:51.183721 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 07:44:51.189792 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 07:44:51.200049 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 07:44:51.206762 Processing 211 relocs. Offset value of 0x74c0b000
406 07:44:51.213203 BS: romstage times (exec / console): total (unknown) / 277 ms
407 07:44:51.218996
408 07:44:51.219390
409 07:44:51.229803 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 07:44:51.233439 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 07:44:51.239784 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 07:44:51.246819 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 07:44:51.256483 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 07:44:51.263065 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 07:44:51.305804 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 07:44:51.312134 Processing 5008 relocs. Offset value of 0x75d98000
417 07:44:51.315993 BS: postcar times (exec / console): total (unknown) / 59 ms
418 07:44:51.319058
419 07:44:51.319451
420 07:44:51.328731 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 07:44:51.329134 Normal boot
422 07:44:51.332418 FW_CONFIG value is 0x804c02
423 07:44:51.335541 PCI: 00:07.0 disabled by fw_config
424 07:44:51.339027 PCI: 00:07.1 disabled by fw_config
425 07:44:51.342337 PCI: 00:0d.2 disabled by fw_config
426 07:44:51.345278 PCI: 00:1c.7 disabled by fw_config
427 07:44:51.352372 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 07:44:51.358923 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 07:44:51.362968 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 07:44:51.365559 GENERIC: 0.0 disabled by fw_config
431 07:44:51.372317 GENERIC: 1.0 disabled by fw_config
432 07:44:51.375232 fw_config match found: DB_USB=USB3_ACTIVE
433 07:44:51.378510 fw_config match found: DB_USB=USB3_ACTIVE
434 07:44:51.381807 fw_config match found: DB_USB=USB3_ACTIVE
435 07:44:51.388483 fw_config match found: DB_USB=USB3_ACTIVE
436 07:44:51.391660 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 07:44:51.398513 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 07:44:51.408237 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 07:44:51.415142 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 07:44:51.418252 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 07:44:51.425230 microcode: Update skipped, already up-to-date
442 07:44:51.431641 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 07:44:51.458922 Detected 4 core, 8 thread CPU.
444 07:44:51.462430 Setting up SMI for CPU
445 07:44:51.465500 IED base = 0x7b400000
446 07:44:51.465624 IED size = 0x00400000
447 07:44:51.468570 Will perform SMM setup.
448 07:44:51.475204 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
449 07:44:51.482081 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 07:44:51.488948 Processing 16 relocs. Offset value of 0x00030000
451 07:44:51.492025 Attempting to start 7 APs
452 07:44:51.495442 Waiting for 10ms after sending INIT.
453 07:44:51.511339 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 07:44:51.514528 AP: slot 5 apic_id 5.
455 07:44:51.518148 AP: slot 2 apic_id 4.
456 07:44:51.518585 AP: slot 4 apic_id 2.
457 07:44:51.521261 AP: slot 7 apic_id 3.
458 07:44:51.524443 AP: slot 6 apic_id 6.
459 07:44:51.524946 AP: slot 3 apic_id 7.
460 07:44:51.525296 done.
461 07:44:51.531391 Waiting for 2nd SIPI to complete...done.
462 07:44:51.537770 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 07:44:51.544727 Processing 13 relocs. Offset value of 0x00038000
464 07:44:51.547924 Unable to locate Global NVS
465 07:44:51.554080 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 07:44:51.558039 Installing permanent SMM handler to 0x7b000000
467 07:44:51.567427 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 07:44:51.571014 Processing 794 relocs. Offset value of 0x7b010000
469 07:44:51.580502 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 07:44:51.583769 Processing 13 relocs. Offset value of 0x7b008000
471 07:44:51.590910 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 07:44:51.597557 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 07:44:51.600598 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 07:44:51.607322 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 07:44:51.613414 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 07:44:51.620422 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 07:44:51.626810 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 07:44:51.630635 Unable to locate Global NVS
479 07:44:51.636928 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 07:44:51.640134 Clearing SMI status registers
481 07:44:51.640588 SMI_STS: PM1
482 07:44:51.643351 PM1_STS: PWRBTN
483 07:44:51.649717 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 07:44:51.653501 In relocation handler: CPU 0
485 07:44:51.656705 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 07:44:51.663463 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 07:44:51.663942 Relocation complete.
488 07:44:51.673940 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 07:44:51.676761 In relocation handler: CPU 1
490 07:44:51.679634 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 07:44:51.680060 Relocation complete.
492 07:44:51.689713 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
493 07:44:51.693621 In relocation handler: CPU 6
494 07:44:51.696745 New SMBASE=0x7affe800 IEDBASE=0x7b400000
495 07:44:51.699732 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 07:44:51.703366 Relocation complete.
497 07:44:51.709562 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
498 07:44:51.713321 In relocation handler: CPU 3
499 07:44:51.716433 New SMBASE=0x7afff400 IEDBASE=0x7b400000
500 07:44:51.719719 Relocation complete.
501 07:44:51.726772 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
502 07:44:51.729855 In relocation handler: CPU 7
503 07:44:51.733107 New SMBASE=0x7affe400 IEDBASE=0x7b400000
504 07:44:51.736330 Relocation complete.
505 07:44:51.743389 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
506 07:44:51.746692 In relocation handler: CPU 4
507 07:44:51.749931 New SMBASE=0x7afff000 IEDBASE=0x7b400000
508 07:44:51.756677 Writing SMRR. base = 0x7b000006, mask=0xff800c00
509 07:44:51.757226 Relocation complete.
510 07:44:51.763110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
511 07:44:51.766615 In relocation handler: CPU 5
512 07:44:51.769960 New SMBASE=0x7affec00 IEDBASE=0x7b400000
513 07:44:51.773010 Relocation complete.
514 07:44:51.779811 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
515 07:44:51.782986 In relocation handler: CPU 2
516 07:44:51.786644 New SMBASE=0x7afff800 IEDBASE=0x7b400000
517 07:44:51.792777 Writing SMRR. base = 0x7b000006, mask=0xff800c00
518 07:44:51.796257 Relocation complete.
519 07:44:51.796827 Initializing CPU #0
520 07:44:51.799797 CPU: vendor Intel device 806c1
521 07:44:51.803074 CPU: family 06, model 8c, stepping 01
522 07:44:51.806250 Clearing out pending MCEs
523 07:44:51.810012 Setting up local APIC...
524 07:44:51.813341 apic_id: 0x00 done.
525 07:44:51.813796 Turbo is available but hidden
526 07:44:51.816235 Turbo is available and visible
527 07:44:51.822891 microcode: Update skipped, already up-to-date
528 07:44:51.823448 CPU #0 initialized
529 07:44:51.826109 Initializing CPU #1
530 07:44:51.829425 Initializing CPU #4
531 07:44:51.829925 Initializing CPU #7
532 07:44:51.832869 Initializing CPU #2
533 07:44:51.836391 Initializing CPU #5
534 07:44:51.839588 CPU: vendor Intel device 806c1
535 07:44:51.842632 CPU: family 06, model 8c, stepping 01
536 07:44:51.846336 CPU: vendor Intel device 806c1
537 07:44:51.849470 CPU: family 06, model 8c, stepping 01
538 07:44:51.852659 Clearing out pending MCEs
539 07:44:51.853090 Clearing out pending MCEs
540 07:44:51.856254 Setting up local APIC...
541 07:44:51.859449 CPU: vendor Intel device 806c1
542 07:44:51.862707 CPU: family 06, model 8c, stepping 01
543 07:44:51.866465 CPU: vendor Intel device 806c1
544 07:44:51.869479 CPU: family 06, model 8c, stepping 01
545 07:44:51.872546 Clearing out pending MCEs
546 07:44:51.876216 Initializing CPU #6
547 07:44:51.876803 Initializing CPU #3
548 07:44:51.879286 CPU: vendor Intel device 806c1
549 07:44:51.883046 CPU: family 06, model 8c, stepping 01
550 07:44:51.886189 Setting up local APIC...
551 07:44:51.889373 CPU: vendor Intel device 806c1
552 07:44:51.893567 CPU: family 06, model 8c, stepping 01
553 07:44:51.897408 Clearing out pending MCEs
554 07:44:51.897836 Clearing out pending MCEs
555 07:44:51.900452 Setting up local APIC...
556 07:44:51.904190 CPU: vendor Intel device 806c1
557 07:44:51.907194 CPU: family 06, model 8c, stepping 01
558 07:44:51.910140 Setting up local APIC...
559 07:44:51.913535 Setting up local APIC...
560 07:44:51.913768 apic_id: 0x06 done.
561 07:44:51.916786 apic_id: 0x07 done.
562 07:44:51.923412 microcode: Update skipped, already up-to-date
563 07:44:51.927055 microcode: Update skipped, already up-to-date
564 07:44:51.927191 CPU #6 initialized
565 07:44:51.930021 CPU #3 initialized
566 07:44:51.933646 apic_id: 0x04 done.
567 07:44:51.933768 apic_id: 0x05 done.
568 07:44:51.939544 microcode: Update skipped, already up-to-date
569 07:44:51.943376 microcode: Update skipped, already up-to-date
570 07:44:51.946561 Clearing out pending MCEs
571 07:44:51.949759 Clearing out pending MCEs
572 07:44:51.949860 apic_id: 0x03 done.
573 07:44:51.953328 Setting up local APIC...
574 07:44:51.959557 microcode: Update skipped, already up-to-date
575 07:44:51.959653 Setting up local APIC...
576 07:44:51.962738 CPU #7 initialized
577 07:44:51.966415 apic_id: 0x02 done.
578 07:44:51.966509 apic_id: 0x01 done.
579 07:44:51.973088 microcode: Update skipped, already up-to-date
580 07:44:51.973193 CPU #2 initialized
581 07:44:51.976273 CPU #5 initialized
582 07:44:51.979300 microcode: Update skipped, already up-to-date
583 07:44:51.983174 CPU #4 initialized
584 07:44:51.983268 CPU #1 initialized
585 07:44:51.989316 bsp_do_flight_plan done after 454 msecs.
586 07:44:51.993039 CPU: frequency set to 4400 MHz
587 07:44:51.993133 Enabling SMIs.
588 07:44:51.999733 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
589 07:44:52.015310 SATAXPCIE1 indicates PCIe NVMe is present
590 07:44:52.019075 Probing TPM: done!
591 07:44:52.022022 Connected to device vid:did:rid of 1ae0:0028:00
592 07:44:52.032387 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
593 07:44:52.036099 Initialized TPM device CR50 revision 0
594 07:44:52.039602 Enabling S0i3.4
595 07:44:52.045916 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 07:44:52.049483 Found a VBT of 8704 bytes after decompression
597 07:44:52.055978 cse_lite: CSE RO boot. HybridStorageMode disabled
598 07:44:52.062518 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 07:44:52.136901 FSPS returned 0
600 07:44:52.140462 Executing Phase 1 of FspMultiPhaseSiInit
601 07:44:52.150201 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 07:44:52.153971 port C0 DISC req: usage 1 usb3 1 usb2 5
603 07:44:52.156930 Raw Buffer output 0 00000511
604 07:44:52.159959 Raw Buffer output 1 00000000
605 07:44:52.163940 pmc_send_ipc_cmd succeeded
606 07:44:52.170270 port C1 DISC req: usage 1 usb3 2 usb2 3
607 07:44:52.170366 Raw Buffer output 0 00000321
608 07:44:52.173614 Raw Buffer output 1 00000000
609 07:44:52.178140 pmc_send_ipc_cmd succeeded
610 07:44:52.183181 Detected 4 core, 8 thread CPU.
611 07:44:52.186610 Detected 4 core, 8 thread CPU.
612 07:44:52.386443 Display FSP Version Info HOB
613 07:44:52.389670 Reference Code - CPU = a.0.4c.31
614 07:44:52.393196 uCode Version = 0.0.0.86
615 07:44:52.396456 TXT ACM version = ff.ff.ff.ffff
616 07:44:52.400191 Reference Code - ME = a.0.4c.31
617 07:44:52.403366 MEBx version = 0.0.0.0
618 07:44:52.406371 ME Firmware Version = Consumer SKU
619 07:44:52.409635 Reference Code - PCH = a.0.4c.31
620 07:44:52.413091 PCH-CRID Status = Disabled
621 07:44:52.416412 PCH-CRID Original Value = ff.ff.ff.ffff
622 07:44:52.419538 PCH-CRID New Value = ff.ff.ff.ffff
623 07:44:52.423286 OPROM - RST - RAID = ff.ff.ff.ffff
624 07:44:52.426526 PCH Hsio Version = 4.0.0.0
625 07:44:52.429546 Reference Code - SA - System Agent = a.0.4c.31
626 07:44:52.433342 Reference Code - MRC = 2.0.0.1
627 07:44:52.436556 SA - PCIe Version = a.0.4c.31
628 07:44:52.439706 SA-CRID Status = Disabled
629 07:44:52.443397 SA-CRID Original Value = 0.0.0.1
630 07:44:52.446572 SA-CRID New Value = 0.0.0.1
631 07:44:52.449705 OPROM - VBIOS = ff.ff.ff.ffff
632 07:44:52.452796 IO Manageability Engine FW Version = 11.1.4.0
633 07:44:52.456499 PHY Build Version = 0.0.0.e0
634 07:44:52.459493 Thunderbolt(TM) FW Version = 0.0.0.0
635 07:44:52.466060 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 07:44:52.469938 ITSS IRQ Polarities Before:
637 07:44:52.470029 IPC0: 0xffffffff
638 07:44:52.473098 IPC1: 0xffffffff
639 07:44:52.473183 IPC2: 0xffffffff
640 07:44:52.476809 IPC3: 0xffffffff
641 07:44:52.476902 ITSS IRQ Polarities After:
642 07:44:52.480501 IPC0: 0xffffffff
643 07:44:52.480583 IPC1: 0xffffffff
644 07:44:52.484050 IPC2: 0xffffffff
645 07:44:52.484135 IPC3: 0xffffffff
646 07:44:52.490890 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 07:44:52.500882 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 07:44:52.514037 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 07:44:52.527046 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 07:44:52.530558 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
651 07:44:52.533935 Enumerating buses...
652 07:44:52.537016 Show all devs... Before device enumeration.
653 07:44:52.540135 Root Device: enabled 1
654 07:44:52.543936 DOMAIN: 0000: enabled 1
655 07:44:52.546979 CPU_CLUSTER: 0: enabled 1
656 07:44:52.547059 PCI: 00:00.0: enabled 1
657 07:44:52.550671 PCI: 00:02.0: enabled 1
658 07:44:52.553809 PCI: 00:04.0: enabled 1
659 07:44:52.556948 PCI: 00:05.0: enabled 1
660 07:44:52.557034 PCI: 00:06.0: enabled 0
661 07:44:52.560528 PCI: 00:07.0: enabled 0
662 07:44:52.563593 PCI: 00:07.1: enabled 0
663 07:44:52.566707 PCI: 00:07.2: enabled 0
664 07:44:52.566833 PCI: 00:07.3: enabled 0
665 07:44:52.570365 PCI: 00:08.0: enabled 1
666 07:44:52.573591 PCI: 00:09.0: enabled 0
667 07:44:52.577285 PCI: 00:0a.0: enabled 0
668 07:44:52.577370 PCI: 00:0d.0: enabled 1
669 07:44:52.580439 PCI: 00:0d.1: enabled 0
670 07:44:52.583613 PCI: 00:0d.2: enabled 0
671 07:44:52.583705 PCI: 00:0d.3: enabled 0
672 07:44:52.587216 PCI: 00:0e.0: enabled 0
673 07:44:52.590252 PCI: 00:10.2: enabled 1
674 07:44:52.593841 PCI: 00:10.6: enabled 0
675 07:44:52.593934 PCI: 00:10.7: enabled 0
676 07:44:52.596879 PCI: 00:12.0: enabled 0
677 07:44:52.599987 PCI: 00:12.6: enabled 0
678 07:44:52.603695 PCI: 00:13.0: enabled 0
679 07:44:52.603805 PCI: 00:14.0: enabled 1
680 07:44:52.606745 PCI: 00:14.1: enabled 0
681 07:44:52.610367 PCI: 00:14.2: enabled 1
682 07:44:52.613196 PCI: 00:14.3: enabled 1
683 07:44:52.613277 PCI: 00:15.0: enabled 1
684 07:44:52.616541 PCI: 00:15.1: enabled 1
685 07:44:52.620080 PCI: 00:15.2: enabled 1
686 07:44:52.620172 PCI: 00:15.3: enabled 1
687 07:44:52.623644 PCI: 00:16.0: enabled 1
688 07:44:52.626870 PCI: 00:16.1: enabled 0
689 07:44:52.629862 PCI: 00:16.2: enabled 0
690 07:44:52.629954 PCI: 00:16.3: enabled 0
691 07:44:52.633579 PCI: 00:16.4: enabled 0
692 07:44:52.636966 PCI: 00:16.5: enabled 0
693 07:44:52.639882 PCI: 00:17.0: enabled 1
694 07:44:52.639966 PCI: 00:19.0: enabled 0
695 07:44:52.643501 PCI: 00:19.1: enabled 1
696 07:44:52.646683 PCI: 00:19.2: enabled 0
697 07:44:52.650049 PCI: 00:1c.0: enabled 1
698 07:44:52.650142 PCI: 00:1c.1: enabled 0
699 07:44:52.653036 PCI: 00:1c.2: enabled 0
700 07:44:52.656637 PCI: 00:1c.3: enabled 0
701 07:44:52.659912 PCI: 00:1c.4: enabled 0
702 07:44:52.660006 PCI: 00:1c.5: enabled 0
703 07:44:52.663445 PCI: 00:1c.6: enabled 1
704 07:44:52.666489 PCI: 00:1c.7: enabled 0
705 07:44:52.666583 PCI: 00:1d.0: enabled 1
706 07:44:52.670137 PCI: 00:1d.1: enabled 0
707 07:44:52.673157 PCI: 00:1d.2: enabled 1
708 07:44:52.676239 PCI: 00:1d.3: enabled 0
709 07:44:52.676322 PCI: 00:1e.0: enabled 1
710 07:44:52.680142 PCI: 00:1e.1: enabled 0
711 07:44:52.683224 PCI: 00:1e.2: enabled 1
712 07:44:52.686473 PCI: 00:1e.3: enabled 1
713 07:44:52.686554 PCI: 00:1f.0: enabled 1
714 07:44:52.689917 PCI: 00:1f.1: enabled 0
715 07:44:52.693031 PCI: 00:1f.2: enabled 1
716 07:44:52.696479 PCI: 00:1f.3: enabled 1
717 07:44:52.696590 PCI: 00:1f.4: enabled 0
718 07:44:52.699657 PCI: 00:1f.5: enabled 1
719 07:44:52.703247 PCI: 00:1f.6: enabled 0
720 07:44:52.703340 PCI: 00:1f.7: enabled 0
721 07:44:52.706437 APIC: 00: enabled 1
722 07:44:52.709567 GENERIC: 0.0: enabled 1
723 07:44:52.713269 GENERIC: 0.0: enabled 1
724 07:44:52.713384 GENERIC: 1.0: enabled 1
725 07:44:52.716451 GENERIC: 0.0: enabled 1
726 07:44:52.719434 GENERIC: 1.0: enabled 1
727 07:44:52.719545 USB0 port 0: enabled 1
728 07:44:52.722823 GENERIC: 0.0: enabled 1
729 07:44:52.726627 USB0 port 0: enabled 1
730 07:44:52.729666 GENERIC: 0.0: enabled 1
731 07:44:52.729748 I2C: 00:1a: enabled 1
732 07:44:52.733217 I2C: 00:31: enabled 1
733 07:44:52.736037 I2C: 00:32: enabled 1
734 07:44:52.736123 I2C: 00:10: enabled 1
735 07:44:52.739548 I2C: 00:15: enabled 1
736 07:44:52.743112 GENERIC: 0.0: enabled 0
737 07:44:52.746407 GENERIC: 1.0: enabled 0
738 07:44:52.746517 GENERIC: 0.0: enabled 1
739 07:44:52.749486 SPI: 00: enabled 1
740 07:44:52.749579 SPI: 00: enabled 1
741 07:44:52.753023 PNP: 0c09.0: enabled 1
742 07:44:52.756179 GENERIC: 0.0: enabled 1
743 07:44:52.759875 USB3 port 0: enabled 1
744 07:44:52.759971 USB3 port 1: enabled 1
745 07:44:52.762981 USB3 port 2: enabled 0
746 07:44:52.766127 USB3 port 3: enabled 0
747 07:44:52.766211 USB2 port 0: enabled 0
748 07:44:52.769251 USB2 port 1: enabled 1
749 07:44:52.773158 USB2 port 2: enabled 1
750 07:44:52.776004 USB2 port 3: enabled 0
751 07:44:52.776103 USB2 port 4: enabled 1
752 07:44:52.779266 USB2 port 5: enabled 0
753 07:44:52.783089 USB2 port 6: enabled 0
754 07:44:52.783186 USB2 port 7: enabled 0
755 07:44:52.786256 USB2 port 8: enabled 0
756 07:44:52.789409 USB2 port 9: enabled 0
757 07:44:52.789495 USB3 port 0: enabled 0
758 07:44:52.793088 USB3 port 1: enabled 1
759 07:44:52.795860 USB3 port 2: enabled 0
760 07:44:52.799298 USB3 port 3: enabled 0
761 07:44:52.799384 GENERIC: 0.0: enabled 1
762 07:44:52.802437 GENERIC: 1.0: enabled 1
763 07:44:52.806151 APIC: 01: enabled 1
764 07:44:52.806244 APIC: 04: enabled 1
765 07:44:52.809263 APIC: 07: enabled 1
766 07:44:52.812964 APIC: 02: enabled 1
767 07:44:52.813052 APIC: 05: enabled 1
768 07:44:52.815980 APIC: 06: enabled 1
769 07:44:52.816068 APIC: 03: enabled 1
770 07:44:52.819144 Compare with tree...
771 07:44:52.822814 Root Device: enabled 1
772 07:44:52.822903 DOMAIN: 0000: enabled 1
773 07:44:52.825848 PCI: 00:00.0: enabled 1
774 07:44:52.829430 PCI: 00:02.0: enabled 1
775 07:44:52.832365 PCI: 00:04.0: enabled 1
776 07:44:52.836008 GENERIC: 0.0: enabled 1
777 07:44:52.836097 PCI: 00:05.0: enabled 1
778 07:44:52.839099 PCI: 00:06.0: enabled 0
779 07:44:52.842244 PCI: 00:07.0: enabled 0
780 07:44:52.845776 GENERIC: 0.0: enabled 1
781 07:44:52.849208 PCI: 00:07.1: enabled 0
782 07:44:52.852222 GENERIC: 1.0: enabled 1
783 07:44:52.852341 PCI: 00:07.2: enabled 0
784 07:44:52.855762 GENERIC: 0.0: enabled 1
785 07:44:52.859489 PCI: 00:07.3: enabled 0
786 07:44:52.862526 GENERIC: 1.0: enabled 1
787 07:44:52.865710 PCI: 00:08.0: enabled 1
788 07:44:52.865797 PCI: 00:09.0: enabled 0
789 07:44:52.869339 PCI: 00:0a.0: enabled 0
790 07:44:52.872500 PCI: 00:0d.0: enabled 1
791 07:44:52.875669 USB0 port 0: enabled 1
792 07:44:52.879297 USB3 port 0: enabled 1
793 07:44:52.879389 USB3 port 1: enabled 1
794 07:44:52.882409 USB3 port 2: enabled 0
795 07:44:52.885567 USB3 port 3: enabled 0
796 07:44:52.889423 PCI: 00:0d.1: enabled 0
797 07:44:52.892397 PCI: 00:0d.2: enabled 0
798 07:44:52.892513 GENERIC: 0.0: enabled 1
799 07:44:52.895607 PCI: 00:0d.3: enabled 0
800 07:44:52.898746 PCI: 00:0e.0: enabled 0
801 07:44:52.902385 PCI: 00:10.2: enabled 1
802 07:44:52.905575 PCI: 00:10.6: enabled 0
803 07:44:52.905668 PCI: 00:10.7: enabled 0
804 07:44:52.909232 PCI: 00:12.0: enabled 0
805 07:44:52.912291 PCI: 00:12.6: enabled 0
806 07:44:52.915885 PCI: 00:13.0: enabled 0
807 07:44:52.918924 PCI: 00:14.0: enabled 1
808 07:44:52.919018 USB0 port 0: enabled 1
809 07:44:52.922093 USB2 port 0: enabled 0
810 07:44:52.925345 USB2 port 1: enabled 1
811 07:44:52.928494 USB2 port 2: enabled 1
812 07:44:52.932169 USB2 port 3: enabled 0
813 07:44:52.935616 USB2 port 4: enabled 1
814 07:44:52.935714 USB2 port 5: enabled 0
815 07:44:52.938749 USB2 port 6: enabled 0
816 07:44:52.941849 USB2 port 7: enabled 0
817 07:44:52.945603 USB2 port 8: enabled 0
818 07:44:52.948556 USB2 port 9: enabled 0
819 07:44:52.948682 USB3 port 0: enabled 0
820 07:44:52.952319 USB3 port 1: enabled 1
821 07:44:52.955216 USB3 port 2: enabled 0
822 07:44:52.958720 USB3 port 3: enabled 0
823 07:44:52.961801 PCI: 00:14.1: enabled 0
824 07:44:52.965287 PCI: 00:14.2: enabled 1
825 07:44:52.965384 PCI: 00:14.3: enabled 1
826 07:44:52.968506 GENERIC: 0.0: enabled 1
827 07:44:52.971646 PCI: 00:15.0: enabled 1
828 07:44:52.975371 I2C: 00:1a: enabled 1
829 07:44:52.975467 I2C: 00:31: enabled 1
830 07:44:52.978563 I2C: 00:32: enabled 1
831 07:44:52.981699 PCI: 00:15.1: enabled 1
832 07:44:52.985326 I2C: 00:10: enabled 1
833 07:44:52.988395 PCI: 00:15.2: enabled 1
834 07:44:52.988488 PCI: 00:15.3: enabled 1
835 07:44:52.991546 PCI: 00:16.0: enabled 1
836 07:44:52.995335 PCI: 00:16.1: enabled 0
837 07:44:52.998417 PCI: 00:16.2: enabled 0
838 07:44:53.001538 PCI: 00:16.3: enabled 0
839 07:44:53.001630 PCI: 00:16.4: enabled 0
840 07:44:53.004607 PCI: 00:16.5: enabled 0
841 07:44:53.008007 PCI: 00:17.0: enabled 1
842 07:44:53.011684 PCI: 00:19.0: enabled 0
843 07:44:53.014844 PCI: 00:19.1: enabled 1
844 07:44:53.014938 I2C: 00:15: enabled 1
845 07:44:53.017812 PCI: 00:19.2: enabled 0
846 07:44:53.021633 PCI: 00:1d.0: enabled 1
847 07:44:53.024782 GENERIC: 0.0: enabled 1
848 07:44:53.027859 PCI: 00:1e.0: enabled 1
849 07:44:53.027982 PCI: 00:1e.1: enabled 0
850 07:44:53.031167 PCI: 00:1e.2: enabled 1
851 07:44:53.034306 SPI: 00: enabled 1
852 07:44:53.037991 PCI: 00:1e.3: enabled 1
853 07:44:53.038085 SPI: 00: enabled 1
854 07:44:53.041064 PCI: 00:1f.0: enabled 1
855 07:44:53.044445 PNP: 0c09.0: enabled 1
856 07:44:53.048026 PCI: 00:1f.1: enabled 0
857 07:44:53.051153 PCI: 00:1f.2: enabled 1
858 07:44:53.051259 GENERIC: 0.0: enabled 1
859 07:44:53.054253 GENERIC: 0.0: enabled 1
860 07:44:53.058006 GENERIC: 1.0: enabled 1
861 07:44:53.061039 PCI: 00:1f.3: enabled 1
862 07:44:53.064387 PCI: 00:1f.4: enabled 0
863 07:44:53.064469 PCI: 00:1f.5: enabled 1
864 07:44:53.068080 PCI: 00:1f.6: enabled 0
865 07:44:53.071159 PCI: 00:1f.7: enabled 0
866 07:44:53.074119 CPU_CLUSTER: 0: enabled 1
867 07:44:53.077233 APIC: 00: enabled 1
868 07:44:53.077327 APIC: 01: enabled 1
869 07:44:53.129122 APIC: 04: enabled 1
870 07:44:53.129287 APIC: 07: enabled 1
871 07:44:53.129363 APIC: 02: enabled 1
872 07:44:53.129432 APIC: 05: enabled 1
873 07:44:53.129503 APIC: 06: enabled 1
874 07:44:53.129780 APIC: 03: enabled 1
875 07:44:53.129884 Root Device scanning...
876 07:44:53.129986 scan_static_bus for Root Device
877 07:44:53.130067 DOMAIN: 0000 enabled
878 07:44:53.130130 CPU_CLUSTER: 0 enabled
879 07:44:53.130192 DOMAIN: 0000 scanning...
880 07:44:53.130253 PCI: pci_scan_bus for bus 00
881 07:44:53.130314 PCI: 00:00.0 [8086/0000] ops
882 07:44:53.130376 PCI: 00:00.0 [8086/9a12] enabled
883 07:44:53.130451 PCI: 00:02.0 [8086/0000] bus ops
884 07:44:53.130514 PCI: 00:02.0 [8086/9a40] enabled
885 07:44:53.130575 PCI: 00:04.0 [8086/0000] bus ops
886 07:44:53.130635 PCI: 00:04.0 [8086/9a03] enabled
887 07:44:53.166808 PCI: 00:05.0 [8086/9a19] enabled
888 07:44:53.166950 PCI: 00:07.0 [0000/0000] hidden
889 07:44:53.167359 PCI: 00:08.0 [8086/9a11] enabled
890 07:44:53.167475 PCI: 00:0a.0 [8086/9a0d] disabled
891 07:44:53.167772 PCI: 00:0d.0 [8086/0000] bus ops
892 07:44:53.167850 PCI: 00:0d.0 [8086/9a13] enabled
893 07:44:53.167919 PCI: 00:14.0 [8086/0000] bus ops
894 07:44:53.167993 PCI: 00:14.0 [8086/a0ed] enabled
895 07:44:53.168072 PCI: 00:14.2 [8086/a0ef] enabled
896 07:44:53.168137 PCI: 00:14.3 [8086/0000] bus ops
897 07:44:53.168569 PCI: 00:14.3 [8086/a0f0] enabled
898 07:44:53.170973 PCI: 00:15.0 [8086/0000] bus ops
899 07:44:53.171097 PCI: 00:15.0 [8086/a0e8] enabled
900 07:44:53.174525 PCI: 00:15.1 [8086/0000] bus ops
901 07:44:53.178128 PCI: 00:15.1 [8086/a0e9] enabled
902 07:44:53.181136 PCI: 00:15.2 [8086/0000] bus ops
903 07:44:53.184297 PCI: 00:15.2 [8086/a0ea] enabled
904 07:44:53.188074 PCI: 00:15.3 [8086/0000] bus ops
905 07:44:53.191120 PCI: 00:15.3 [8086/a0eb] enabled
906 07:44:53.194270 PCI: 00:16.0 [8086/0000] ops
907 07:44:53.198020 PCI: 00:16.0 [8086/a0e0] enabled
908 07:44:53.204296 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 07:44:53.207973 PCI: 00:19.0 [8086/0000] bus ops
910 07:44:53.211178 PCI: 00:19.0 [8086/a0c5] disabled
911 07:44:53.214237 PCI: 00:19.1 [8086/0000] bus ops
912 07:44:53.217842 PCI: 00:19.1 [8086/a0c6] enabled
913 07:44:53.220996 PCI: 00:1d.0 [8086/0000] bus ops
914 07:44:53.224626 PCI: 00:1d.0 [8086/a0b0] enabled
915 07:44:53.227854 PCI: 00:1e.0 [8086/0000] ops
916 07:44:53.231580 PCI: 00:1e.0 [8086/a0a8] enabled
917 07:44:53.234622 PCI: 00:1e.2 [8086/0000] bus ops
918 07:44:53.237760 PCI: 00:1e.2 [8086/a0aa] enabled
919 07:44:53.241553 PCI: 00:1e.3 [8086/0000] bus ops
920 07:44:53.244568 PCI: 00:1e.3 [8086/a0ab] enabled
921 07:44:53.247574 PCI: 00:1f.0 [8086/0000] bus ops
922 07:44:53.251375 PCI: 00:1f.0 [8086/a087] enabled
923 07:44:53.251468 RTC Init
924 07:44:53.254600 Set power on after power failure.
925 07:44:53.257555 Disabling Deep S3
926 07:44:53.257640 Disabling Deep S3
927 07:44:53.261147 Disabling Deep S4
928 07:44:53.264509 Disabling Deep S4
929 07:44:53.264636 Disabling Deep S5
930 07:44:53.267560 Disabling Deep S5
931 07:44:53.271465 PCI: 00:1f.2 [0000/0000] hidden
932 07:44:53.274534 PCI: 00:1f.3 [8086/0000] bus ops
933 07:44:53.277631 PCI: 00:1f.3 [8086/a0c8] enabled
934 07:44:53.281112 PCI: 00:1f.5 [8086/0000] bus ops
935 07:44:53.284419 PCI: 00:1f.5 [8086/a0a4] enabled
936 07:44:53.287342 PCI: Leftover static devices:
937 07:44:53.287457 PCI: 00:10.2
938 07:44:53.287564 PCI: 00:10.6
939 07:44:53.291077 PCI: 00:10.7
940 07:44:53.291169 PCI: 00:06.0
941 07:44:53.294168 PCI: 00:07.1
942 07:44:53.294296 PCI: 00:07.2
943 07:44:53.294400 PCI: 00:07.3
944 07:44:53.297635 PCI: 00:09.0
945 07:44:53.297724 PCI: 00:0d.1
946 07:44:53.300879 PCI: 00:0d.2
947 07:44:53.300988 PCI: 00:0d.3
948 07:44:53.303979 PCI: 00:0e.0
949 07:44:53.304089 PCI: 00:12.0
950 07:44:53.304207 PCI: 00:12.6
951 07:44:53.307677 PCI: 00:13.0
952 07:44:53.307791 PCI: 00:14.1
953 07:44:53.310775 PCI: 00:16.1
954 07:44:53.310859 PCI: 00:16.2
955 07:44:53.310928 PCI: 00:16.3
956 07:44:53.313837 PCI: 00:16.4
957 07:44:53.313993 PCI: 00:16.5
958 07:44:53.317508 PCI: 00:17.0
959 07:44:53.317666 PCI: 00:19.2
960 07:44:53.317768 PCI: 00:1e.1
961 07:44:53.321066 PCI: 00:1f.1
962 07:44:53.321177 PCI: 00:1f.4
963 07:44:53.323899 PCI: 00:1f.6
964 07:44:53.323994 PCI: 00:1f.7
965 07:44:53.327624 PCI: Check your devicetree.cb.
966 07:44:53.330629 PCI: 00:02.0 scanning...
967 07:44:53.334271 scan_generic_bus for PCI: 00:02.0
968 07:44:53.337406 scan_generic_bus for PCI: 00:02.0 done
969 07:44:53.340614 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 07:44:53.344374 PCI: 00:04.0 scanning...
971 07:44:53.347593 scan_generic_bus for PCI: 00:04.0
972 07:44:53.351225 GENERIC: 0.0 enabled
973 07:44:53.357282 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 07:44:53.360892 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 07:44:53.363877 PCI: 00:0d.0 scanning...
976 07:44:53.367439 scan_static_bus for PCI: 00:0d.0
977 07:44:53.371078 USB0 port 0 enabled
978 07:44:53.371200 USB0 port 0 scanning...
979 07:44:53.373903 scan_static_bus for USB0 port 0
980 07:44:53.377598 USB3 port 0 enabled
981 07:44:53.380752 USB3 port 1 enabled
982 07:44:53.380840 USB3 port 2 disabled
983 07:44:53.383920 USB3 port 3 disabled
984 07:44:53.387575 USB3 port 0 scanning...
985 07:44:53.391030 scan_static_bus for USB3 port 0
986 07:44:53.394287 scan_static_bus for USB3 port 0 done
987 07:44:53.397281 scan_bus: bus USB3 port 0 finished in 6 msecs
988 07:44:53.400783 USB3 port 1 scanning...
989 07:44:53.404341 scan_static_bus for USB3 port 1
990 07:44:53.407319 scan_static_bus for USB3 port 1 done
991 07:44:53.414268 scan_bus: bus USB3 port 1 finished in 6 msecs
992 07:44:53.417330 scan_static_bus for USB0 port 0 done
993 07:44:53.420419 scan_bus: bus USB0 port 0 finished in 43 msecs
994 07:44:53.424138 scan_static_bus for PCI: 00:0d.0 done
995 07:44:53.430717 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 07:44:53.430869 PCI: 00:14.0 scanning...
997 07:44:53.433706 scan_static_bus for PCI: 00:14.0
998 07:44:53.437402 USB0 port 0 enabled
999 07:44:53.440585 USB0 port 0 scanning...
1000 07:44:53.443608 scan_static_bus for USB0 port 0
1001 07:44:53.447349 USB2 port 0 disabled
1002 07:44:53.447515 USB2 port 1 enabled
1003 07:44:53.450517 USB2 port 2 enabled
1004 07:44:53.450710 USB2 port 3 disabled
1005 07:44:53.454292 USB2 port 4 enabled
1006 07:44:53.457306 USB2 port 5 disabled
1007 07:44:53.457579 USB2 port 6 disabled
1008 07:44:53.461098 USB2 port 7 disabled
1009 07:44:53.464334 USB2 port 8 disabled
1010 07:44:53.464718 USB2 port 9 disabled
1011 07:44:53.467216 USB3 port 0 disabled
1012 07:44:53.470855 USB3 port 1 enabled
1013 07:44:53.471207 USB3 port 2 disabled
1014 07:44:53.473969 USB3 port 3 disabled
1015 07:44:53.477533 USB2 port 1 scanning...
1016 07:44:53.480485 scan_static_bus for USB2 port 1
1017 07:44:53.483961 scan_static_bus for USB2 port 1 done
1018 07:44:53.487597 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 07:44:53.490732 USB2 port 2 scanning...
1020 07:44:53.493860 scan_static_bus for USB2 port 2
1021 07:44:53.496943 scan_static_bus for USB2 port 2 done
1022 07:44:53.500579 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 07:44:53.503791 USB2 port 4 scanning...
1024 07:44:53.507208 scan_static_bus for USB2 port 4
1025 07:44:53.510627 scan_static_bus for USB2 port 4 done
1026 07:44:53.517478 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 07:44:53.517824 USB3 port 1 scanning...
1028 07:44:53.520659 scan_static_bus for USB3 port 1
1029 07:44:53.527100 scan_static_bus for USB3 port 1 done
1030 07:44:53.530296 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 07:44:53.533527 scan_static_bus for USB0 port 0 done
1032 07:44:53.537056 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 07:44:53.543553 scan_static_bus for PCI: 00:14.0 done
1034 07:44:53.547285 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1035 07:44:53.550358 PCI: 00:14.3 scanning...
1036 07:44:53.553604 scan_static_bus for PCI: 00:14.3
1037 07:44:53.556714 GENERIC: 0.0 enabled
1038 07:44:53.559932 scan_static_bus for PCI: 00:14.3 done
1039 07:44:53.563622 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 07:44:53.566791 PCI: 00:15.0 scanning...
1041 07:44:53.569920 scan_static_bus for PCI: 00:15.0
1042 07:44:53.573628 I2C: 00:1a enabled
1043 07:44:53.573974 I2C: 00:31 enabled
1044 07:44:53.576641 I2C: 00:32 enabled
1045 07:44:53.579957 scan_static_bus for PCI: 00:15.0 done
1046 07:44:53.583592 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 07:44:53.586459 PCI: 00:15.1 scanning...
1048 07:44:53.589945 scan_static_bus for PCI: 00:15.1
1049 07:44:53.593579 I2C: 00:10 enabled
1050 07:44:53.596737 scan_static_bus for PCI: 00:15.1 done
1051 07:44:53.599884 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 07:44:53.603538 PCI: 00:15.2 scanning...
1053 07:44:53.606587 scan_static_bus for PCI: 00:15.2
1054 07:44:53.610198 scan_static_bus for PCI: 00:15.2 done
1055 07:44:53.616667 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 07:44:53.617112 PCI: 00:15.3 scanning...
1057 07:44:53.620270 scan_static_bus for PCI: 00:15.3
1058 07:44:53.626648 scan_static_bus for PCI: 00:15.3 done
1059 07:44:53.630276 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 07:44:53.633366 PCI: 00:19.1 scanning...
1061 07:44:53.636944 scan_static_bus for PCI: 00:19.1
1062 07:44:53.637293 I2C: 00:15 enabled
1063 07:44:53.643482 scan_static_bus for PCI: 00:19.1 done
1064 07:44:53.646850 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 07:44:53.649718 PCI: 00:1d.0 scanning...
1066 07:44:53.653612 do_pci_scan_bridge for PCI: 00:1d.0
1067 07:44:53.656860 PCI: pci_scan_bus for bus 01
1068 07:44:53.660030 PCI: 01:00.0 [15b7/5009] enabled
1069 07:44:53.660376 GENERIC: 0.0 enabled
1070 07:44:53.667346 Enabling Common Clock Configuration
1071 07:44:53.670165 L1 Sub-State supported from root port 29
1072 07:44:53.673433 L1 Sub-State Support = 0x5
1073 07:44:53.676395 CommonModeRestoreTime = 0x28
1074 07:44:53.680321 Power On Value = 0x16, Power On Scale = 0x0
1075 07:44:53.680713 ASPM: Enabled L1
1076 07:44:53.686442 PCIe: Max_Payload_Size adjusted to 128
1077 07:44:53.690255 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 07:44:53.693141 PCI: 00:1e.2 scanning...
1079 07:44:53.696352 scan_generic_bus for PCI: 00:1e.2
1080 07:44:53.696824 SPI: 00 enabled
1081 07:44:53.703237 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 07:44:53.710131 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 07:44:53.710492 PCI: 00:1e.3 scanning...
1084 07:44:53.716844 scan_generic_bus for PCI: 00:1e.3
1085 07:44:53.717258 SPI: 00 enabled
1086 07:44:53.723514 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 07:44:53.727340 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 07:44:53.730667 PCI: 00:1f.0 scanning...
1089 07:44:53.734328 scan_static_bus for PCI: 00:1f.0
1090 07:44:53.737195 PNP: 0c09.0 enabled
1091 07:44:53.737572 PNP: 0c09.0 scanning...
1092 07:44:53.740950 scan_static_bus for PNP: 0c09.0
1093 07:44:53.744109 scan_static_bus for PNP: 0c09.0 done
1094 07:44:53.750606 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 07:44:53.754243 scan_static_bus for PCI: 00:1f.0 done
1096 07:44:53.757024 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 07:44:53.760272 PCI: 00:1f.2 scanning...
1098 07:44:53.764010 scan_static_bus for PCI: 00:1f.2
1099 07:44:53.767101 GENERIC: 0.0 enabled
1100 07:44:53.770741 GENERIC: 0.0 scanning...
1101 07:44:53.773673 scan_static_bus for GENERIC: 0.0
1102 07:44:53.774050 GENERIC: 0.0 enabled
1103 07:44:53.777359 GENERIC: 1.0 enabled
1104 07:44:53.780523 scan_static_bus for GENERIC: 0.0 done
1105 07:44:53.787216 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 07:44:53.790456 scan_static_bus for PCI: 00:1f.2 done
1107 07:44:53.793543 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 07:44:53.797342 PCI: 00:1f.3 scanning...
1109 07:44:53.800189 scan_static_bus for PCI: 00:1f.3
1110 07:44:53.803655 scan_static_bus for PCI: 00:1f.3 done
1111 07:44:53.810461 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 07:44:53.810823 PCI: 00:1f.5 scanning...
1113 07:44:53.813571 scan_generic_bus for PCI: 00:1f.5
1114 07:44:53.820408 scan_generic_bus for PCI: 00:1f.5 done
1115 07:44:53.823775 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 07:44:53.829826 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1117 07:44:53.833710 scan_static_bus for Root Device done
1118 07:44:53.836667 scan_bus: bus Root Device finished in 735 msecs
1119 07:44:53.837080 done
1120 07:44:53.843090 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1121 07:44:53.846685 Chrome EC: UHEPI supported
1122 07:44:53.853834 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 07:44:53.860134 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 07:44:53.863007 SPI flash protection: WPSW=0 SRP0=1
1125 07:44:53.866856 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 07:44:53.873475 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 07:44:53.876567 found VGA at PCI: 00:02.0
1128 07:44:53.879768 Setting up VGA for PCI: 00:02.0
1129 07:44:53.883547 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 07:44:53.889629 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 07:44:53.893464 Allocating resources...
1132 07:44:53.893955 Reading resources...
1133 07:44:53.899519 Root Device read_resources bus 0 link: 0
1134 07:44:53.903251 DOMAIN: 0000 read_resources bus 0 link: 0
1135 07:44:53.906199 PCI: 00:04.0 read_resources bus 1 link: 0
1136 07:44:53.913217 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 07:44:53.916394 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 07:44:53.923154 USB0 port 0 read_resources bus 0 link: 0
1139 07:44:53.926869 USB0 port 0 read_resources bus 0 link: 0 done
1140 07:44:53.933134 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 07:44:53.936306 PCI: 00:14.0 read_resources bus 0 link: 0
1142 07:44:53.939990 USB0 port 0 read_resources bus 0 link: 0
1143 07:44:53.947516 USB0 port 0 read_resources bus 0 link: 0 done
1144 07:44:53.950459 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 07:44:53.957218 PCI: 00:14.3 read_resources bus 0 link: 0
1146 07:44:53.960790 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 07:44:53.967490 PCI: 00:15.0 read_resources bus 0 link: 0
1148 07:44:53.970471 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 07:44:53.977375 PCI: 00:15.1 read_resources bus 0 link: 0
1150 07:44:53.980411 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 07:44:53.987772 PCI: 00:19.1 read_resources bus 0 link: 0
1152 07:44:53.991010 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 07:44:53.997801 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 07:44:54.000895 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 07:44:54.007791 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 07:44:54.010923 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 07:44:54.018040 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 07:44:54.020983 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 07:44:54.027825 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 07:44:54.030943 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 07:44:54.034141 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 07:44:54.041209 GENERIC: 0.0 read_resources bus 0 link: 0
1163 07:44:54.044135 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 07:44:54.051183 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 07:44:54.057642 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 07:44:54.061103 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 07:44:54.064172 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 07:44:54.070635 Root Device read_resources bus 0 link: 0 done
1169 07:44:54.074177 Done reading resources.
1170 07:44:54.078032 Show resources in subtree (Root Device)...After reading.
1171 07:44:54.084104 Root Device child on link 0 DOMAIN: 0000
1172 07:44:54.087676 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 07:44:54.097363 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 07:44:54.107335 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 07:44:54.107456 PCI: 00:00.0
1176 07:44:54.117321 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 07:44:54.127050 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 07:44:54.137579 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 07:44:54.147617 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 07:44:54.154062 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 07:44:54.164231 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 07:44:54.173603 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 07:44:54.183780 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 07:44:54.193694 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 07:44:54.203818 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 07:44:54.210771 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 07:44:54.220194 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 07:44:54.230590 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 07:44:54.239957 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 07:44:54.250065 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 07:44:54.256822 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 07:44:54.266557 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 07:44:54.276749 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 07:44:54.286525 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 07:44:54.296677 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 07:44:54.297082 PCI: 00:02.0
1197 07:44:54.309702 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 07:44:54.319915 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 07:44:54.326138 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 07:44:54.332853 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 07:44:54.342903 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 07:44:54.343291 GENERIC: 0.0
1203 07:44:54.346631 PCI: 00:05.0
1204 07:44:54.355923 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 07:44:54.359565 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 07:44:54.362717 GENERIC: 0.0
1207 07:44:54.363101 PCI: 00:08.0
1208 07:44:54.372755 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 07:44:54.376526 PCI: 00:0a.0
1210 07:44:54.379549 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 07:44:54.389344 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 07:44:54.392370 USB0 port 0 child on link 0 USB3 port 0
1213 07:44:54.395807 USB3 port 0
1214 07:44:54.396191 USB3 port 1
1215 07:44:54.399099 USB3 port 2
1216 07:44:54.399484 USB3 port 3
1217 07:44:54.405843 PCI: 00:14.0 child on link 0 USB0 port 0
1218 07:44:54.416054 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 07:44:54.419044 USB0 port 0 child on link 0 USB2 port 0
1220 07:44:54.422965 USB2 port 0
1221 07:44:54.423471 USB2 port 1
1222 07:44:54.426099 USB2 port 2
1223 07:44:54.426664 USB2 port 3
1224 07:44:54.429262 USB2 port 4
1225 07:44:54.429642 USB2 port 5
1226 07:44:54.432813 USB2 port 6
1227 07:44:54.433197 USB2 port 7
1228 07:44:54.435961 USB2 port 8
1229 07:44:54.436346 USB2 port 9
1230 07:44:54.439560 USB3 port 0
1231 07:44:54.439941 USB3 port 1
1232 07:44:54.442604 USB3 port 2
1233 07:44:54.445672 USB3 port 3
1234 07:44:54.446057 PCI: 00:14.2
1235 07:44:54.456288 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 07:44:54.466113 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 07:44:54.469235 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 07:44:54.479091 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 07:44:54.482303 GENERIC: 0.0
1240 07:44:54.485782 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 07:44:54.495719 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 07:44:54.499030 I2C: 00:1a
1243 07:44:54.499436 I2C: 00:31
1244 07:44:54.502668 I2C: 00:32
1245 07:44:54.505746 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 07:44:54.515406 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 07:44:54.515805 I2C: 00:10
1248 07:44:54.519090 PCI: 00:15.2
1249 07:44:54.528723 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 07:44:54.529116 PCI: 00:15.3
1251 07:44:54.539126 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 07:44:54.542335 PCI: 00:16.0
1253 07:44:54.552086 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 07:44:54.552509 PCI: 00:19.0
1255 07:44:54.559005 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 07:44:54.568924 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 07:44:54.569317 I2C: 00:15
1258 07:44:54.575083 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 07:44:54.587117 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 07:44:54.591943 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 07:44:54.601869 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 07:44:54.602296 GENERIC: 0.0
1263 07:44:54.605437 PCI: 01:00.0
1264 07:44:54.614857 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 07:44:54.624552 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1266 07:44:54.624755 PCI: 00:1e.0
1267 07:44:54.638089 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1268 07:44:54.641417 PCI: 00:1e.2 child on link 0 SPI: 00
1269 07:44:54.651840 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1270 07:44:54.651994 SPI: 00
1271 07:44:54.658376 PCI: 00:1e.3 child on link 0 SPI: 00
1272 07:44:54.668534 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1273 07:44:54.668962 SPI: 00
1274 07:44:54.671535 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1275 07:44:54.681613 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1276 07:44:54.681997 PNP: 0c09.0
1277 07:44:54.691481 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1278 07:44:54.694611 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1279 07:44:54.704557 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1280 07:44:54.714992 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1281 07:44:54.718266 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1282 07:44:54.721418 GENERIC: 0.0
1283 07:44:54.721800 GENERIC: 1.0
1284 07:44:54.724705 PCI: 00:1f.3
1285 07:44:54.734518 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1286 07:44:54.744455 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1287 07:44:54.748009 PCI: 00:1f.5
1288 07:44:54.754839 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1289 07:44:54.760951 CPU_CLUSTER: 0 child on link 0 APIC: 00
1290 07:44:54.761336 APIC: 00
1291 07:44:54.761642 APIC: 01
1292 07:44:54.764393 APIC: 04
1293 07:44:54.764890 APIC: 07
1294 07:44:54.765202 APIC: 02
1295 07:44:54.767634 APIC: 05
1296 07:44:54.768015 APIC: 06
1297 07:44:54.771410 APIC: 03
1298 07:44:54.777753 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1299 07:44:54.784695 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1300 07:44:54.791025 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1301 07:44:54.794550 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1302 07:44:54.801435 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1303 07:44:54.804453 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1304 07:44:54.811179 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1305 07:44:54.817670 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1306 07:44:54.827795 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1307 07:44:54.834810 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1308 07:44:54.840901 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1309 07:44:54.847692 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1310 07:44:54.854218 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1311 07:44:54.860932 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1312 07:44:54.863998 DOMAIN: 0000: Resource ranges:
1313 07:44:54.870877 * Base: 1000, Size: 800, Tag: 100
1314 07:44:54.874308 * Base: 1900, Size: e700, Tag: 100
1315 07:44:54.877381 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1316 07:44:54.883437 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1317 07:44:54.890172 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1318 07:44:54.900026 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1319 07:44:54.906783 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1320 07:44:54.913614 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1321 07:44:54.923513 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1322 07:44:54.930459 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1323 07:44:54.936416 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1324 07:44:54.946885 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1325 07:44:54.953574 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1326 07:44:54.959705 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1327 07:44:54.970366 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1328 07:44:54.976529 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1329 07:44:54.983149 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1330 07:44:54.993237 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1331 07:44:54.999532 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1332 07:44:55.006275 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1333 07:44:55.012878 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1334 07:44:55.022980 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1335 07:44:55.029883 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1336 07:44:55.039490 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1337 07:44:55.046144 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1338 07:44:55.053093 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1339 07:44:55.059433 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1340 07:44:55.062976 DOMAIN: 0000: Resource ranges:
1341 07:44:55.069142 * Base: 7fc00000, Size: 40400000, Tag: 200
1342 07:44:55.072390 * Base: d0000000, Size: 28000000, Tag: 200
1343 07:44:55.076117 * Base: fa000000, Size: 1000000, Tag: 200
1344 07:44:55.082925 * Base: fb001000, Size: 2fff000, Tag: 200
1345 07:44:55.086176 * Base: fe010000, Size: 2e000, Tag: 200
1346 07:44:55.089208 * Base: fe03f000, Size: d41000, Tag: 200
1347 07:44:55.092772 * Base: fed88000, Size: 8000, Tag: 200
1348 07:44:55.099257 * Base: fed93000, Size: d000, Tag: 200
1349 07:44:55.102781 * Base: feda2000, Size: 1e000, Tag: 200
1350 07:44:55.105807 * Base: fede0000, Size: 1220000, Tag: 200
1351 07:44:55.112583 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1352 07:44:55.119034 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1353 07:44:55.125756 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1354 07:44:55.132507 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1355 07:44:55.139030 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1356 07:44:55.145800 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1357 07:44:55.152244 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1358 07:44:55.158804 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1359 07:44:55.165728 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1360 07:44:55.172578 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1361 07:44:55.178659 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1362 07:44:55.185486 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1363 07:44:55.192354 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1364 07:44:55.198459 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1365 07:44:55.205747 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1366 07:44:55.211729 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1367 07:44:55.218484 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1368 07:44:55.224913 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1369 07:44:55.232164 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1370 07:44:55.238312 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1371 07:44:55.245275 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1372 07:44:55.251692 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1373 07:44:55.258440 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1374 07:44:55.264899 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1375 07:44:55.271506 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1376 07:44:55.275094 PCI: 00:1d.0: Resource ranges:
1377 07:44:55.281226 * Base: 7fc00000, Size: 100000, Tag: 200
1378 07:44:55.287954 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1379 07:44:55.294836 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1380 07:44:55.301477 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1381 07:44:55.308151 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1382 07:44:55.314401 Root Device assign_resources, bus 0 link: 0
1383 07:44:55.318153 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 07:44:55.327749 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1385 07:44:55.334536 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1386 07:44:55.341639 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1387 07:44:55.351464 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1388 07:44:55.354643 PCI: 00:04.0 assign_resources, bus 1 link: 0
1389 07:44:55.361509 PCI: 00:04.0 assign_resources, bus 1 link: 0
1390 07:44:55.367795 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1391 07:44:55.377918 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1392 07:44:55.384263 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1393 07:44:55.387708 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1394 07:44:55.394655 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1395 07:44:55.401151 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1396 07:44:55.408099 PCI: 00:14.0 assign_resources, bus 0 link: 0
1397 07:44:55.411309 PCI: 00:14.0 assign_resources, bus 0 link: 0
1398 07:44:55.420775 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1399 07:44:55.428010 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1400 07:44:55.437982 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1401 07:44:55.441057 PCI: 00:14.3 assign_resources, bus 0 link: 0
1402 07:44:55.444185 PCI: 00:14.3 assign_resources, bus 0 link: 0
1403 07:44:55.454495 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1404 07:44:55.457659 PCI: 00:15.0 assign_resources, bus 0 link: 0
1405 07:44:55.464442 PCI: 00:15.0 assign_resources, bus 0 link: 0
1406 07:44:55.470845 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1407 07:44:55.473905 PCI: 00:15.1 assign_resources, bus 0 link: 0
1408 07:44:55.480801 PCI: 00:15.1 assign_resources, bus 0 link: 0
1409 07:44:55.487691 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1410 07:44:55.497376 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1411 07:44:55.504030 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1412 07:44:55.514223 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1413 07:44:55.517117 PCI: 00:19.1 assign_resources, bus 0 link: 0
1414 07:44:55.524070 PCI: 00:19.1 assign_resources, bus 0 link: 0
1415 07:44:55.530732 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1416 07:44:55.540448 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1417 07:44:55.550341 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1418 07:44:55.553972 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 07:44:55.563536 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1420 07:44:55.570201 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1421 07:44:55.573623 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 07:44:55.583494 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1423 07:44:55.587188 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1424 07:44:55.593979 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1425 07:44:55.600149 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1426 07:44:55.607354 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1427 07:44:55.610354 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1428 07:44:55.613435 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1429 07:44:55.620083 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1430 07:44:55.623347 LPC: Trying to open IO window from 800 size 1ff
1431 07:44:55.633230 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1432 07:44:55.639976 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1433 07:44:55.649656 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1434 07:44:55.653375 DOMAIN: 0000 assign_resources, bus 0 link: 0
1435 07:44:55.656467 Root Device assign_resources, bus 0 link: 0
1436 07:44:55.660073 Done setting resources.
1437 07:44:55.666684 Show resources in subtree (Root Device)...After assigning values.
1438 07:44:55.669821 Root Device child on link 0 DOMAIN: 0000
1439 07:44:55.676503 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1440 07:44:55.686667 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1441 07:44:55.696593 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1442 07:44:55.696700 PCI: 00:00.0
1443 07:44:55.706710 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1444 07:44:55.716028 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1445 07:44:55.726270 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1446 07:44:55.733043 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1447 07:44:55.742818 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1448 07:44:55.752465 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1449 07:44:55.762515 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1450 07:44:55.772572 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1451 07:44:55.782843 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1452 07:44:55.788961 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1453 07:44:55.798828 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1454 07:44:55.808811 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1455 07:44:55.819047 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1456 07:44:55.829288 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1457 07:44:55.835651 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1458 07:44:55.845377 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1459 07:44:55.855589 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1460 07:44:55.865215 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1461 07:44:55.875075 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1462 07:44:55.885377 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1463 07:44:55.885499 PCI: 00:02.0
1464 07:44:55.898545 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1465 07:44:55.908581 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1466 07:44:55.918259 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1467 07:44:55.921808 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1468 07:44:55.931815 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1469 07:44:55.934975 GENERIC: 0.0
1470 07:44:55.935096 PCI: 00:05.0
1471 07:44:55.945004 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1472 07:44:55.951588 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1473 07:44:55.951706 GENERIC: 0.0
1474 07:44:55.955138 PCI: 00:08.0
1475 07:44:55.965067 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1476 07:44:55.965190 PCI: 00:0a.0
1477 07:44:55.971270 PCI: 00:0d.0 child on link 0 USB0 port 0
1478 07:44:55.981657 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1479 07:44:55.984869 USB0 port 0 child on link 0 USB3 port 0
1480 07:44:55.987770 USB3 port 0
1481 07:44:55.987892 USB3 port 1
1482 07:44:55.991267 USB3 port 2
1483 07:44:55.991355 USB3 port 3
1484 07:44:55.998490 PCI: 00:14.0 child on link 0 USB0 port 0
1485 07:44:56.007928 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1486 07:44:56.010841 USB0 port 0 child on link 0 USB2 port 0
1487 07:44:56.014564 USB2 port 0
1488 07:44:56.014683 USB2 port 1
1489 07:44:56.017763 USB2 port 2
1490 07:44:56.017880 USB2 port 3
1491 07:44:56.020844 USB2 port 4
1492 07:44:56.020961 USB2 port 5
1493 07:44:56.024779 USB2 port 6
1494 07:44:56.024893 USB2 port 7
1495 07:44:56.027654 USB2 port 8
1496 07:44:56.027744 USB2 port 9
1497 07:44:56.030809 USB3 port 0
1498 07:44:56.030918 USB3 port 1
1499 07:44:56.034400 USB3 port 2
1500 07:44:56.034517 USB3 port 3
1501 07:44:56.037889 PCI: 00:14.2
1502 07:44:56.047788 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1503 07:44:56.057654 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1504 07:44:56.064609 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1505 07:44:56.073965 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1506 07:44:56.074087 GENERIC: 0.0
1507 07:44:56.081132 PCI: 00:15.0 child on link 0 I2C: 00:1a
1508 07:44:56.091140 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1509 07:44:56.091264 I2C: 00:1a
1510 07:44:56.094319 I2C: 00:31
1511 07:44:56.094459 I2C: 00:32
1512 07:44:56.097844 PCI: 00:15.1 child on link 0 I2C: 00:10
1513 07:44:56.107682 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1514 07:44:56.111195 I2C: 00:10
1515 07:44:56.111310 PCI: 00:15.2
1516 07:44:56.123904 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1517 07:44:56.124028 PCI: 00:15.3
1518 07:44:56.133996 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1519 07:44:56.137234 PCI: 00:16.0
1520 07:44:56.147573 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1521 07:44:56.147694 PCI: 00:19.0
1522 07:44:56.153786 PCI: 00:19.1 child on link 0 I2C: 00:15
1523 07:44:56.164302 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1524 07:44:56.164420 I2C: 00:15
1525 07:44:56.167130 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1526 07:44:56.177033 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1527 07:44:56.190300 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1528 07:44:56.200141 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1529 07:44:56.200261 GENERIC: 0.0
1530 07:44:56.203852 PCI: 01:00.0
1531 07:44:56.213741 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1532 07:44:56.223698 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1533 07:44:56.227241 PCI: 00:1e.0
1534 07:44:56.237168 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1535 07:44:56.240341 PCI: 00:1e.2 child on link 0 SPI: 00
1536 07:44:56.250250 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1537 07:44:56.253301 SPI: 00
1538 07:44:56.256971 PCI: 00:1e.3 child on link 0 SPI: 00
1539 07:44:56.266973 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1540 07:44:56.270051 SPI: 00
1541 07:44:56.273277 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1542 07:44:56.279841 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1543 07:44:56.283570 PNP: 0c09.0
1544 07:44:56.293452 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1545 07:44:56.297039 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1546 07:44:56.306299 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1547 07:44:56.316743 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1548 07:44:56.319971 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1549 07:44:56.322979 GENERIC: 0.0
1550 07:44:56.323074 GENERIC: 1.0
1551 07:44:56.326751 PCI: 00:1f.3
1552 07:44:56.336854 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1553 07:44:56.346506 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1554 07:44:56.346601 PCI: 00:1f.5
1555 07:44:56.356461 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1556 07:44:56.362750 CPU_CLUSTER: 0 child on link 0 APIC: 00
1557 07:44:56.362878 APIC: 00
1558 07:44:56.366220 APIC: 01
1559 07:44:56.366335 APIC: 04
1560 07:44:56.366447 APIC: 07
1561 07:44:56.369837 APIC: 02
1562 07:44:56.369950 APIC: 05
1563 07:44:56.370061 APIC: 06
1564 07:44:56.372819 APIC: 03
1565 07:44:56.376092 Done allocating resources.
1566 07:44:56.379715 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1567 07:44:56.386608 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1568 07:44:56.389714 Configure GPIOs for I2S audio on UP4.
1569 07:44:56.397522 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1570 07:44:56.400378 Enabling resources...
1571 07:44:56.404060 PCI: 00:00.0 subsystem <- 8086/9a12
1572 07:44:56.407004 PCI: 00:00.0 cmd <- 06
1573 07:44:56.410560 PCI: 00:02.0 subsystem <- 8086/9a40
1574 07:44:56.413819 PCI: 00:02.0 cmd <- 03
1575 07:44:56.417323 PCI: 00:04.0 subsystem <- 8086/9a03
1576 07:44:56.420412 PCI: 00:04.0 cmd <- 02
1577 07:44:56.423628 PCI: 00:05.0 subsystem <- 8086/9a19
1578 07:44:56.423739 PCI: 00:05.0 cmd <- 02
1579 07:44:56.430401 PCI: 00:08.0 subsystem <- 8086/9a11
1580 07:44:56.430515 PCI: 00:08.0 cmd <- 06
1581 07:44:56.433578 PCI: 00:0d.0 subsystem <- 8086/9a13
1582 07:44:56.436696 PCI: 00:0d.0 cmd <- 02
1583 07:44:56.440520 PCI: 00:14.0 subsystem <- 8086/a0ed
1584 07:44:56.443611 PCI: 00:14.0 cmd <- 02
1585 07:44:56.446778 PCI: 00:14.2 subsystem <- 8086/a0ef
1586 07:44:56.449994 PCI: 00:14.2 cmd <- 02
1587 07:44:56.453527 PCI: 00:14.3 subsystem <- 8086/a0f0
1588 07:44:56.456935 PCI: 00:14.3 cmd <- 02
1589 07:44:56.459910 PCI: 00:15.0 subsystem <- 8086/a0e8
1590 07:44:56.463193 PCI: 00:15.0 cmd <- 02
1591 07:44:56.466632 PCI: 00:15.1 subsystem <- 8086/a0e9
1592 07:44:56.469982 PCI: 00:15.1 cmd <- 02
1593 07:44:56.473394 PCI: 00:15.2 subsystem <- 8086/a0ea
1594 07:44:56.473506 PCI: 00:15.2 cmd <- 02
1595 07:44:56.480136 PCI: 00:15.3 subsystem <- 8086/a0eb
1596 07:44:56.480229 PCI: 00:15.3 cmd <- 02
1597 07:44:56.483275 PCI: 00:16.0 subsystem <- 8086/a0e0
1598 07:44:56.486438 PCI: 00:16.0 cmd <- 02
1599 07:44:56.489871 PCI: 00:19.1 subsystem <- 8086/a0c6
1600 07:44:56.492943 PCI: 00:19.1 cmd <- 02
1601 07:44:56.496824 PCI: 00:1d.0 bridge ctrl <- 0013
1602 07:44:56.499876 PCI: 00:1d.0 subsystem <- 8086/a0b0
1603 07:44:56.502925 PCI: 00:1d.0 cmd <- 06
1604 07:44:56.506310 PCI: 00:1e.0 subsystem <- 8086/a0a8
1605 07:44:56.510008 PCI: 00:1e.0 cmd <- 06
1606 07:44:56.512881 PCI: 00:1e.2 subsystem <- 8086/a0aa
1607 07:44:56.516690 PCI: 00:1e.2 cmd <- 06
1608 07:44:56.519603 PCI: 00:1e.3 subsystem <- 8086/a0ab
1609 07:44:56.519715 PCI: 00:1e.3 cmd <- 02
1610 07:44:56.526397 PCI: 00:1f.0 subsystem <- 8086/a087
1611 07:44:56.526513 PCI: 00:1f.0 cmd <- 407
1612 07:44:56.530124 PCI: 00:1f.3 subsystem <- 8086/a0c8
1613 07:44:56.533157 PCI: 00:1f.3 cmd <- 02
1614 07:44:56.536380 PCI: 00:1f.5 subsystem <- 8086/a0a4
1615 07:44:56.540088 PCI: 00:1f.5 cmd <- 406
1616 07:44:56.544464 PCI: 01:00.0 cmd <- 02
1617 07:44:56.548871 done.
1618 07:44:56.552504 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1619 07:44:56.555641 Initializing devices...
1620 07:44:56.558868 Root Device init
1621 07:44:56.562384 Chrome EC: Set SMI mask to 0x0000000000000000
1622 07:44:56.568857 Chrome EC: clear events_b mask to 0x0000000000000000
1623 07:44:56.575484 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1624 07:44:56.579010 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1625 07:44:56.585601 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1626 07:44:56.591881 Chrome EC: Set WAKE mask to 0x0000000000000000
1627 07:44:56.595363 fw_config match found: DB_USB=USB3_ACTIVE
1628 07:44:56.602090 Configure Right Type-C port orientation for retimer
1629 07:44:56.605246 Root Device init finished in 42 msecs
1630 07:44:56.608751 PCI: 00:00.0 init
1631 07:44:56.608872 CPU TDP = 9 Watts
1632 07:44:56.611807 CPU PL1 = 9 Watts
1633 07:44:56.615228 CPU PL2 = 40 Watts
1634 07:44:56.615353 CPU PL4 = 83 Watts
1635 07:44:56.618672 PCI: 00:00.0 init finished in 8 msecs
1636 07:44:56.621542 PCI: 00:02.0 init
1637 07:44:56.625345 GMA: Found VBT in CBFS
1638 07:44:56.628464 GMA: Found valid VBT in CBFS
1639 07:44:56.631625 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1640 07:44:56.641679 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1641 07:44:56.644869 PCI: 00:02.0 init finished in 18 msecs
1642 07:44:56.648046 PCI: 00:05.0 init
1643 07:44:56.651673 PCI: 00:05.0 init finished in 0 msecs
1644 07:44:56.651780 PCI: 00:08.0 init
1645 07:44:56.658500 PCI: 00:08.0 init finished in 0 msecs
1646 07:44:56.658617 PCI: 00:14.0 init
1647 07:44:56.664804 PCI: 00:14.0 init finished in 0 msecs
1648 07:44:56.664896 PCI: 00:14.2 init
1649 07:44:56.667817 PCI: 00:14.2 init finished in 0 msecs
1650 07:44:56.672113 PCI: 00:15.0 init
1651 07:44:56.675087 I2C bus 0 version 0x3230302a
1652 07:44:56.678371 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1653 07:44:56.681838 PCI: 00:15.0 init finished in 6 msecs
1654 07:44:56.685347 PCI: 00:15.1 init
1655 07:44:56.688333 I2C bus 1 version 0x3230302a
1656 07:44:56.691984 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1657 07:44:56.695084 PCI: 00:15.1 init finished in 6 msecs
1658 07:44:56.698456 PCI: 00:15.2 init
1659 07:44:56.701726 I2C bus 2 version 0x3230302a
1660 07:44:56.705401 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1661 07:44:56.708507 PCI: 00:15.2 init finished in 6 msecs
1662 07:44:56.708634 PCI: 00:15.3 init
1663 07:44:56.711619 I2C bus 3 version 0x3230302a
1664 07:44:56.715313 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1665 07:44:56.721788 PCI: 00:15.3 init finished in 6 msecs
1666 07:44:56.721879 PCI: 00:16.0 init
1667 07:44:56.724702 PCI: 00:16.0 init finished in 0 msecs
1668 07:44:56.728901 PCI: 00:19.1 init
1669 07:44:56.732018 I2C bus 5 version 0x3230302a
1670 07:44:56.735183 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1671 07:44:56.738440 PCI: 00:19.1 init finished in 6 msecs
1672 07:44:56.741532 PCI: 00:1d.0 init
1673 07:44:56.745145 Initializing PCH PCIe bridge.
1674 07:44:56.748290 PCI: 00:1d.0 init finished in 3 msecs
1675 07:44:56.751551 PCI: 00:1f.0 init
1676 07:44:56.755288 IOAPIC: Initializing IOAPIC at 0xfec00000
1677 07:44:56.758330 IOAPIC: Bootstrap Processor Local APIC = 0x00
1678 07:44:56.762139 IOAPIC: ID = 0x02
1679 07:44:56.765154 IOAPIC: Dumping registers
1680 07:44:56.768270 reg 0x0000: 0x02000000
1681 07:44:56.768390 reg 0x0001: 0x00770020
1682 07:44:56.771480 reg 0x0002: 0x00000000
1683 07:44:56.775196 PCI: 00:1f.0 init finished in 21 msecs
1684 07:44:56.778211 PCI: 00:1f.2 init
1685 07:44:56.781293 Disabling ACPI via APMC.
1686 07:44:56.785633 APMC done.
1687 07:44:56.788477 PCI: 00:1f.2 init finished in 6 msecs
1688 07:44:56.799759 PCI: 01:00.0 init
1689 07:44:56.803502 PCI: 01:00.0 init finished in 0 msecs
1690 07:44:56.806281 PNP: 0c09.0 init
1691 07:44:56.809779 Google Chrome EC uptime: 8.237 seconds
1692 07:44:56.816478 Google Chrome AP resets since EC boot: 1
1693 07:44:56.819643 Google Chrome most recent AP reset causes:
1694 07:44:56.822656 0.451: 32775 shutdown: entering G3
1695 07:44:56.829628 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1696 07:44:56.832488 PNP: 0c09.0 init finished in 22 msecs
1697 07:44:56.838061 Devices initialized
1698 07:44:56.841224 Show all devs... After init.
1699 07:44:56.844912 Root Device: enabled 1
1700 07:44:56.845036 DOMAIN: 0000: enabled 1
1701 07:44:56.848200 CPU_CLUSTER: 0: enabled 1
1702 07:44:56.851307 PCI: 00:00.0: enabled 1
1703 07:44:56.854413 PCI: 00:02.0: enabled 1
1704 07:44:56.854538 PCI: 00:04.0: enabled 1
1705 07:44:56.858106 PCI: 00:05.0: enabled 1
1706 07:44:56.861247 PCI: 00:06.0: enabled 0
1707 07:44:56.864289 PCI: 00:07.0: enabled 0
1708 07:44:56.864403 PCI: 00:07.1: enabled 0
1709 07:44:56.868026 PCI: 00:07.2: enabled 0
1710 07:44:56.871133 PCI: 00:07.3: enabled 0
1711 07:44:56.874372 PCI: 00:08.0: enabled 1
1712 07:44:56.874465 PCI: 00:09.0: enabled 0
1713 07:44:56.878177 PCI: 00:0a.0: enabled 0
1714 07:44:56.881275 PCI: 00:0d.0: enabled 1
1715 07:44:56.884407 PCI: 00:0d.1: enabled 0
1716 07:44:56.884501 PCI: 00:0d.2: enabled 0
1717 07:44:56.888067 PCI: 00:0d.3: enabled 0
1718 07:44:56.891136 PCI: 00:0e.0: enabled 0
1719 07:44:56.891230 PCI: 00:10.2: enabled 1
1720 07:44:56.894885 PCI: 00:10.6: enabled 0
1721 07:44:56.897667 PCI: 00:10.7: enabled 0
1722 07:44:56.901165 PCI: 00:12.0: enabled 0
1723 07:44:56.901257 PCI: 00:12.6: enabled 0
1724 07:44:56.904489 PCI: 00:13.0: enabled 0
1725 07:44:56.908208 PCI: 00:14.0: enabled 1
1726 07:44:56.911163 PCI: 00:14.1: enabled 0
1727 07:44:56.911256 PCI: 00:14.2: enabled 1
1728 07:44:56.914541 PCI: 00:14.3: enabled 1
1729 07:44:56.917773 PCI: 00:15.0: enabled 1
1730 07:44:56.921501 PCI: 00:15.1: enabled 1
1731 07:44:56.921593 PCI: 00:15.2: enabled 1
1732 07:44:56.924436 PCI: 00:15.3: enabled 1
1733 07:44:56.927489 PCI: 00:16.0: enabled 1
1734 07:44:56.927583 PCI: 00:16.1: enabled 0
1735 07:44:56.931169 PCI: 00:16.2: enabled 0
1736 07:44:56.934621 PCI: 00:16.3: enabled 0
1737 07:44:56.937978 PCI: 00:16.4: enabled 0
1738 07:44:56.938072 PCI: 00:16.5: enabled 0
1739 07:44:56.941187 PCI: 00:17.0: enabled 0
1740 07:44:56.944396 PCI: 00:19.0: enabled 0
1741 07:44:56.947467 PCI: 00:19.1: enabled 1
1742 07:44:56.947560 PCI: 00:19.2: enabled 0
1743 07:44:56.951188 PCI: 00:1c.0: enabled 1
1744 07:44:56.954333 PCI: 00:1c.1: enabled 0
1745 07:44:56.957556 PCI: 00:1c.2: enabled 0
1746 07:44:56.957649 PCI: 00:1c.3: enabled 0
1747 07:44:56.961186 PCI: 00:1c.4: enabled 0
1748 07:44:56.964332 PCI: 00:1c.5: enabled 0
1749 07:44:56.967352 PCI: 00:1c.6: enabled 1
1750 07:44:56.967444 PCI: 00:1c.7: enabled 0
1751 07:44:56.971137 PCI: 00:1d.0: enabled 1
1752 07:44:56.974147 PCI: 00:1d.1: enabled 0
1753 07:44:56.974241 PCI: 00:1d.2: enabled 1
1754 07:44:56.977869 PCI: 00:1d.3: enabled 0
1755 07:44:56.981116 PCI: 00:1e.0: enabled 1
1756 07:44:56.984043 PCI: 00:1e.1: enabled 0
1757 07:44:56.984136 PCI: 00:1e.2: enabled 1
1758 07:44:56.987362 PCI: 00:1e.3: enabled 1
1759 07:44:56.991055 PCI: 00:1f.0: enabled 1
1760 07:44:56.994187 PCI: 00:1f.1: enabled 0
1761 07:44:56.994281 PCI: 00:1f.2: enabled 1
1762 07:44:56.997314 PCI: 00:1f.3: enabled 1
1763 07:44:57.000908 PCI: 00:1f.4: enabled 0
1764 07:44:57.004037 PCI: 00:1f.5: enabled 1
1765 07:44:57.004133 PCI: 00:1f.6: enabled 0
1766 07:44:57.007140 PCI: 00:1f.7: enabled 0
1767 07:44:57.010766 APIC: 00: enabled 1
1768 07:44:57.010886 GENERIC: 0.0: enabled 1
1769 07:44:57.014278 GENERIC: 0.0: enabled 1
1770 07:44:57.017490 GENERIC: 1.0: enabled 1
1771 07:44:57.020543 GENERIC: 0.0: enabled 1
1772 07:44:57.020681 GENERIC: 1.0: enabled 1
1773 07:44:57.024373 USB0 port 0: enabled 1
1774 07:44:57.027251 GENERIC: 0.0: enabled 1
1775 07:44:57.027341 USB0 port 0: enabled 1
1776 07:44:57.030590 GENERIC: 0.0: enabled 1
1777 07:44:57.033883 I2C: 00:1a: enabled 1
1778 07:44:57.037342 I2C: 00:31: enabled 1
1779 07:44:57.037463 I2C: 00:32: enabled 1
1780 07:44:57.040371 I2C: 00:10: enabled 1
1781 07:44:57.043965 I2C: 00:15: enabled 1
1782 07:44:57.044057 GENERIC: 0.0: enabled 0
1783 07:44:57.047408 GENERIC: 1.0: enabled 0
1784 07:44:57.050674 GENERIC: 0.0: enabled 1
1785 07:44:57.050766 SPI: 00: enabled 1
1786 07:44:57.053722 SPI: 00: enabled 1
1787 07:44:57.057484 PNP: 0c09.0: enabled 1
1788 07:44:57.057575 GENERIC: 0.0: enabled 1
1789 07:44:57.060461 USB3 port 0: enabled 1
1790 07:44:57.063594 USB3 port 1: enabled 1
1791 07:44:57.067349 USB3 port 2: enabled 0
1792 07:44:57.067443 USB3 port 3: enabled 0
1793 07:44:57.070319 USB2 port 0: enabled 0
1794 07:44:57.073514 USB2 port 1: enabled 1
1795 07:44:57.073596 USB2 port 2: enabled 1
1796 07:44:57.077273 USB2 port 3: enabled 0
1797 07:44:57.080384 USB2 port 4: enabled 1
1798 07:44:57.080474 USB2 port 5: enabled 0
1799 07:44:57.083514 USB2 port 6: enabled 0
1800 07:44:57.087235 USB2 port 7: enabled 0
1801 07:44:57.090355 USB2 port 8: enabled 0
1802 07:44:57.090446 USB2 port 9: enabled 0
1803 07:44:57.093508 USB3 port 0: enabled 0
1804 07:44:57.097221 USB3 port 1: enabled 1
1805 07:44:57.097311 USB3 port 2: enabled 0
1806 07:44:57.100357 USB3 port 3: enabled 0
1807 07:44:57.103422 GENERIC: 0.0: enabled 1
1808 07:44:57.107120 GENERIC: 1.0: enabled 1
1809 07:44:57.107244 APIC: 01: enabled 1
1810 07:44:57.110161 APIC: 04: enabled 1
1811 07:44:57.110269 APIC: 07: enabled 1
1812 07:44:57.113896 APIC: 02: enabled 1
1813 07:44:57.117028 APIC: 05: enabled 1
1814 07:44:57.117118 APIC: 06: enabled 1
1815 07:44:57.120161 APIC: 03: enabled 1
1816 07:44:57.123897 PCI: 01:00.0: enabled 1
1817 07:44:57.127068 BS: BS_DEV_INIT run times (exec / console): 28 / 540 ms
1818 07:44:57.133548 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1819 07:44:57.137097 ELOG: NV offset 0xf30000 size 0x1000
1820 07:44:57.143413 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1821 07:44:57.150279 ELOG: Event(17) added with size 13 at 2024-01-03 07:44:56 UTC
1822 07:44:57.157004 ELOG: Event(92) added with size 9 at 2024-01-03 07:44:56 UTC
1823 07:44:57.163248 ELOG: Event(93) added with size 9 at 2024-01-03 07:44:56 UTC
1824 07:44:57.169703 ELOG: Event(9E) added with size 10 at 2024-01-03 07:44:56 UTC
1825 07:44:57.176154 ELOG: Event(9F) added with size 14 at 2024-01-03 07:44:56 UTC
1826 07:44:57.183262 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1827 07:44:57.186300 ELOG: Event(A1) added with size 10 at 2024-01-03 07:44:56 UTC
1828 07:44:57.196588 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1829 07:44:57.203300 ELOG: Event(A0) added with size 9 at 2024-01-03 07:44:56 UTC
1830 07:44:57.206534 elog_add_boot_reason: Logged dev mode boot
1831 07:44:57.213145 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1832 07:44:57.213265 Finalize devices...
1833 07:44:57.216247 Devices finalized
1834 07:44:57.223266 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1835 07:44:57.226305 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1836 07:44:57.233006 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1837 07:44:57.236051 ME: HFSTS1 : 0x80030055
1838 07:44:57.243046 ME: HFSTS2 : 0x30280116
1839 07:44:57.246032 ME: HFSTS3 : 0x00000050
1840 07:44:57.249522 ME: HFSTS4 : 0x00004000
1841 07:44:57.256018 ME: HFSTS5 : 0x00000000
1842 07:44:57.259625 ME: HFSTS6 : 0x40400006
1843 07:44:57.262438 ME: Manufacturing Mode : YES
1844 07:44:57.266185 ME: SPI Protection Mode Enabled : NO
1845 07:44:57.269448 ME: FW Partition Table : OK
1846 07:44:57.276310 ME: Bringup Loader Failure : NO
1847 07:44:57.279401 ME: Firmware Init Complete : NO
1848 07:44:57.282501 ME: Boot Options Present : NO
1849 07:44:57.286237 ME: Update In Progress : NO
1850 07:44:57.289295 ME: D0i3 Support : YES
1851 07:44:57.292484 ME: Low Power State Enabled : NO
1852 07:44:57.295655 ME: CPU Replaced : YES
1853 07:44:57.299292 ME: CPU Replacement Valid : YES
1854 07:44:57.305638 ME: Current Working State : 5
1855 07:44:57.309381 ME: Current Operation State : 1
1856 07:44:57.312426 ME: Current Operation Mode : 3
1857 07:44:57.316046 ME: Error Code : 0
1858 07:44:57.319213 ME: Enhanced Debug Mode : NO
1859 07:44:57.322340 ME: CPU Debug Disabled : YES
1860 07:44:57.325498 ME: TXT Support : NO
1861 07:44:57.332487 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1862 07:44:57.338610 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1863 07:44:57.342149 CBFS: 'fallback/slic' not found.
1864 07:44:57.348985 ACPI: Writing ACPI tables at 76b01000.
1865 07:44:57.349077 ACPI: * FACS
1866 07:44:57.352164 ACPI: * DSDT
1867 07:44:57.355606 Ramoops buffer: 0x100000@0x76a00000.
1868 07:44:57.358610 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1869 07:44:57.362399 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1870 07:44:57.366090 Google Chrome EC: version:
1871 07:44:57.369755 ro: voema_v2.0.10114-a447f03e46
1872 07:44:57.372647 rw: voema_v2.0.10114-a447f03e46
1873 07:44:57.376431 running image: 2
1874 07:44:57.383029 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1875 07:44:57.386247 ACPI: * FADT
1876 07:44:57.386370 SCI is IRQ9
1877 07:44:57.392800 ACPI: added table 1/32, length now 40
1878 07:44:57.392894 ACPI: * SSDT
1879 07:44:57.395918 Found 1 CPU(s) with 8 core(s) each.
1880 07:44:57.402842 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1881 07:44:57.405975 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1882 07:44:57.409169 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1883 07:44:57.413022 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1884 07:44:57.419495 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1885 07:44:57.425866 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1886 07:44:57.429578 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1887 07:44:57.435801 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1888 07:44:57.442879 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1889 07:44:57.445959 \_SB.PCI0.RP09: Added StorageD3Enable property
1890 07:44:57.449487 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1891 07:44:57.455817 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1892 07:44:57.462796 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1893 07:44:57.465695 PS2K: Passing 80 keymaps to kernel
1894 07:44:57.472656 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1895 07:44:57.478873 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1896 07:44:57.485625 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1897 07:44:57.492573 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1898 07:44:57.498843 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1899 07:44:57.505825 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1900 07:44:57.512386 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1901 07:44:57.518690 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1902 07:44:57.522456 ACPI: added table 2/32, length now 44
1903 07:44:57.522549 ACPI: * MCFG
1904 07:44:57.529047 ACPI: added table 3/32, length now 48
1905 07:44:57.529141 ACPI: * TPM2
1906 07:44:57.532336 TPM2 log created at 0x769f0000
1907 07:44:57.535538 ACPI: added table 4/32, length now 52
1908 07:44:57.539228 ACPI: * MADT
1909 07:44:57.539323 SCI is IRQ9
1910 07:44:57.542412 ACPI: added table 5/32, length now 56
1911 07:44:57.545459 current = 76b09850
1912 07:44:57.545582 ACPI: * DMAR
1913 07:44:57.548535 ACPI: added table 6/32, length now 60
1914 07:44:57.555286 ACPI: added table 7/32, length now 64
1915 07:44:57.555379 ACPI: * HPET
1916 07:44:57.558694 ACPI: added table 8/32, length now 68
1917 07:44:57.562113 ACPI: done.
1918 07:44:57.562209 ACPI tables: 35216 bytes.
1919 07:44:57.565664 smbios_write_tables: 769ef000
1920 07:44:57.568457 EC returned error result code 3
1921 07:44:57.571908 Couldn't obtain OEM name from CBI
1922 07:44:57.576604 Create SMBIOS type 16
1923 07:44:57.579887 Create SMBIOS type 17
1924 07:44:57.583010 GENERIC: 0.0 (WIFI Device)
1925 07:44:57.583132 SMBIOS tables: 1734 bytes.
1926 07:44:57.589909 Writing table forward entry at 0x00000500
1927 07:44:57.596604 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1928 07:44:57.599817 Writing coreboot table at 0x76b25000
1929 07:44:57.606284 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1930 07:44:57.609739 1. 0000000000001000-000000000009ffff: RAM
1931 07:44:57.613022 2. 00000000000a0000-00000000000fffff: RESERVED
1932 07:44:57.619895 3. 0000000000100000-00000000769eefff: RAM
1933 07:44:57.623204 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1934 07:44:57.629714 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1935 07:44:57.636548 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1936 07:44:57.639648 7. 0000000077000000-000000007fbfffff: RESERVED
1937 07:44:57.642775 8. 00000000c0000000-00000000cfffffff: RESERVED
1938 07:44:57.649653 9. 00000000f8000000-00000000f9ffffff: RESERVED
1939 07:44:57.652745 10. 00000000fb000000-00000000fb000fff: RESERVED
1940 07:44:57.659461 11. 00000000fe000000-00000000fe00ffff: RESERVED
1941 07:44:57.662565 12. 00000000fed80000-00000000fed87fff: RESERVED
1942 07:44:57.669222 13. 00000000fed90000-00000000fed92fff: RESERVED
1943 07:44:57.672758 14. 00000000feda0000-00000000feda1fff: RESERVED
1944 07:44:57.679279 15. 00000000fedc0000-00000000feddffff: RESERVED
1945 07:44:57.682655 16. 0000000100000000-00000004803fffff: RAM
1946 07:44:57.685902 Passing 4 GPIOs to payload:
1947 07:44:57.689588 NAME | PORT | POLARITY | VALUE
1948 07:44:57.696371 lid | undefined | high | high
1949 07:44:57.699372 power | undefined | high | low
1950 07:44:57.706272 oprom | undefined | high | low
1951 07:44:57.712491 EC in RW | 0x000000e5 | high | high
1952 07:44:57.719461 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1953 07:44:57.719556 coreboot table: 1576 bytes.
1954 07:44:57.726048 IMD ROOT 0. 0x76fff000 0x00001000
1955 07:44:57.729380 IMD SMALL 1. 0x76ffe000 0x00001000
1956 07:44:57.732579 FSP MEMORY 2. 0x76c4e000 0x003b0000
1957 07:44:57.735656 VPD 3. 0x76c4d000 0x00000367
1958 07:44:57.739181 RO MCACHE 4. 0x76c4c000 0x00000fdc
1959 07:44:57.742910 CONSOLE 5. 0x76c2c000 0x00020000
1960 07:44:57.745936 FMAP 6. 0x76c2b000 0x00000578
1961 07:44:57.749098 TIME STAMP 7. 0x76c2a000 0x00000910
1962 07:44:57.756047 VBOOT WORK 8. 0x76c16000 0x00014000
1963 07:44:57.759151 ROMSTG STCK 9. 0x76c15000 0x00001000
1964 07:44:57.762196 AFTER CAR 10. 0x76c0a000 0x0000b000
1965 07:44:57.765796 RAMSTAGE 11. 0x76b97000 0x00073000
1966 07:44:57.769035 REFCODE 12. 0x76b42000 0x00055000
1967 07:44:57.772124 SMM BACKUP 13. 0x76b32000 0x00010000
1968 07:44:57.775642 4f444749 14. 0x76b30000 0x00002000
1969 07:44:57.778684 EXT VBT15. 0x76b2d000 0x0000219f
1970 07:44:57.782308 COREBOOT 16. 0x76b25000 0x00008000
1971 07:44:57.788739 ACPI 17. 0x76b01000 0x00024000
1972 07:44:57.792190 ACPI GNVS 18. 0x76b00000 0x00001000
1973 07:44:57.795292 RAMOOPS 19. 0x76a00000 0x00100000
1974 07:44:57.799242 TPM2 TCGLOG20. 0x769f0000 0x00010000
1975 07:44:57.802039 SMBIOS 21. 0x769ef000 0x00000800
1976 07:44:57.805636 IMD small region:
1977 07:44:57.808952 IMD ROOT 0. 0x76ffec00 0x00000400
1978 07:44:57.812129 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1979 07:44:57.815824 POWER STATE 2. 0x76ffeb80 0x00000044
1980 07:44:57.818927 ROMSTAGE 3. 0x76ffeb60 0x00000004
1981 07:44:57.825777 MEM INFO 4. 0x76ffe980 0x000001e0
1982 07:44:57.828902 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1983 07:44:57.832023 MTRR: Physical address space:
1984 07:44:57.839363 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1985 07:44:57.845872 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1986 07:44:57.852568 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1987 07:44:57.859071 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1988 07:44:57.865877 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1989 07:44:57.869450 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1990 07:44:57.875624 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1991 07:44:57.882376 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 07:44:57.885981 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 07:44:57.889105 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 07:44:57.892370 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 07:44:57.899114 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 07:44:57.902662 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 07:44:57.905667 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 07:44:57.908789 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 07:44:57.912725 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 07:44:57.918853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 07:44:57.921955 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 07:44:57.926273 call enable_fixed_mtrr()
2003 07:44:57.929001 CPU physical address size: 39 bits
2004 07:44:57.935900 MTRR: default type WB/UC MTRR counts: 6/7.
2005 07:44:57.938963 MTRR: WB selected as default type.
2006 07:44:57.945655 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2007 07:44:57.949378 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2008 07:44:57.955708 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2009 07:44:57.962261 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2010 07:44:57.968736 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2011 07:44:57.975460 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2012 07:44:57.979435
2013 07:44:57.979523 MTRR check
2014 07:44:57.983212 Fixed MTRRs : Enabled
2015 07:44:57.983302 Variable MTRRs: Enabled
2016 07:44:57.983373
2017 07:44:57.989499 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 07:44:57.992869 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 07:44:57.996448 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 07:44:57.999463 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 07:44:58.006216 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 07:44:58.009460 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 07:44:58.012834 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 07:44:58.016449 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 07:44:58.022762 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 07:44:58.026576 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 07:44:58.029537 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 07:44:58.032635 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 07:44:58.035920 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 07:44:58.042868 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 07:44:58.046036 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 07:44:58.049875 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 07:44:58.053001 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 07:44:58.059376 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 07:44:58.063446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 07:44:58.066349 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 07:44:58.069510 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 07:44:58.076292 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 07:44:58.079200 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 07:44:58.086622 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 07:44:58.087052 call enable_fixed_mtrr()
2042 07:44:58.093373 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 07:44:58.096650 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 07:44:58.099370 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 07:44:58.102849 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 07:44:58.109551 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 07:44:58.112965 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 07:44:58.116228 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 07:44:58.119426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 07:44:58.126297 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 07:44:58.129206 CPU physical address size: 39 bits
2052 07:44:58.134472 call enable_fixed_mtrr()
2053 07:44:58.137930 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 07:44:58.144064 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 07:44:58.147780 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 07:44:58.150954 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 07:44:58.154158 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 07:44:58.161073 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 07:44:58.164343 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 07:44:58.167258 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 07:44:58.170812 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 07:44:58.177716 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 07:44:58.180738 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 07:44:58.183914 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 07:44:58.191433 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 07:44:58.195206 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 07:44:58.198181 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 07:44:58.201664 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 07:44:58.207828 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 07:44:58.211364 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 07:44:58.214684 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 07:44:58.217946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 07:44:58.224724 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 07:44:58.227626 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 07:44:58.231250 call enable_fixed_mtrr()
2076 07:44:58.234897 call enable_fixed_mtrr()
2077 07:44:58.238275 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 07:44:58.241198 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 07:44:58.247803 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 07:44:58.250926 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 07:44:58.254521 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 07:44:58.257623 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 07:44:58.264467 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 07:44:58.267765 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 07:44:58.270899 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 07:44:58.274074 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 07:44:58.280863 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 07:44:58.284670 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 07:44:58.290832 BS: BS_WRITE_TABLES exit times (exec / console): 5 / 150 ms
2090 07:44:58.291247 call enable_fixed_mtrr()
2091 07:44:58.294042 call enable_fixed_mtrr()
2092 07:44:58.297861 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 07:44:58.301028 CPU physical address size: 39 bits
2094 07:44:58.309720 MTRR: Fixed MSR 0x259 0x0000000000000000
2095 07:44:58.313017 MTRR: Fixed MSR 0x268 0x0606060606060606
2096 07:44:58.316486 MTRR: Fixed MSR 0x269 0x0606060606060606
2097 07:44:58.319840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2098 07:44:58.326502 MTRR: Fixed MSR 0x26b 0x0606060606060606
2099 07:44:58.329920 MTRR: Fixed MSR 0x26c 0x0606060606060606
2100 07:44:58.332816 MTRR: Fixed MSR 0x26d 0x0606060606060606
2101 07:44:58.336448 MTRR: Fixed MSR 0x26e 0x0606060606060606
2102 07:44:58.342705 MTRR: Fixed MSR 0x26f 0x0606060606060606
2103 07:44:58.346394 CPU physical address size: 39 bits
2104 07:44:58.349633 CPU physical address size: 39 bits
2105 07:44:58.353018 CPU physical address size: 39 bits
2106 07:44:58.358990 Checking cr50 for pending updates
2107 07:44:58.362920 call enable_fixed_mtrr()
2108 07:44:58.366349 CPU physical address size: 39 bits
2109 07:44:58.369459 CPU physical address size: 39 bits
2110 07:44:58.373267 Reading cr50 TPM mode
2111 07:44:58.381790 BS: BS_PAYLOAD_LOAD entry times (exec / console): 78 / 8 ms
2112 07:44:58.391766 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2113 07:44:58.394918 Checking segment from ROM address 0xffc02b38
2114 07:44:58.398066 Checking segment from ROM address 0xffc02b54
2115 07:44:58.404915 Loading segment from ROM address 0xffc02b38
2116 07:44:58.405333 code (compression=0)
2117 07:44:58.414944 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2118 07:44:58.424779 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2119 07:44:58.425291 it's not compressed!
2120 07:44:58.573988 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2121 07:44:58.580365 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2122 07:44:58.587412 Loading segment from ROM address 0xffc02b54
2123 07:44:58.591039 Entry Point 0x30000000
2124 07:44:58.591130 Loaded segments
2125 07:44:58.597458 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2126 07:44:58.644113 Finalizing chipset.
2127 07:44:58.647613 Finalizing SMM.
2128 07:44:58.647784 APMC done.
2129 07:44:58.654352 BS: BS_PAYLOAD_LOAD exit times (exec / console): 45 / 5 ms
2130 07:44:58.657752 mp_park_aps done after 0 msecs.
2131 07:44:58.660800 Jumping to boot code at 0x30000000(0x76b25000)
2132 07:44:58.671239 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2133 07:44:58.671658
2134 07:44:58.671985
2135 07:44:58.672288
2136 07:44:58.674368 Starting depthcharge on Voema...
2137 07:44:58.674794
2138 07:44:58.676097 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2139 07:44:58.676593 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2140 07:44:58.677087 Setting prompt string to ['volteer:']
2141 07:44:58.677492 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2142 07:44:58.684462 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2143 07:44:58.684930
2144 07:44:58.691087 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2145 07:44:58.691504
2146 07:44:58.697902 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2147 07:44:58.698319
2148 07:44:58.700938 Failed to find eMMC card reader
2149 07:44:58.701357
2150 07:44:58.701684 Wipe memory regions:
2151 07:44:58.701986
2152 07:44:58.707279 [0x00000000001000, 0x000000000a0000)
2153 07:44:58.707693
2154 07:44:58.711054 [0x00000000100000, 0x00000030000000)
2155 07:44:58.749680
2156 07:44:58.753180 [0x00000032662db0, 0x000000769ef000)
2157 07:44:58.807789
2158 07:44:58.810845 [0x00000100000000, 0x00000480400000)
2159 07:44:59.506726
2160 07:44:59.509634 ec_init: CrosEC protocol v3 supported (256, 256)
2161 07:44:59.941228
2162 07:44:59.941747 R8152: Initializing
2163 07:44:59.942083
2164 07:44:59.944708 Version 6 (ocp_data = 5c30)
2165 07:44:59.945275
2166 07:44:59.947860 R8152: Done initializing
2167 07:44:59.948277
2168 07:44:59.950836 Adding net device
2169 07:45:00.253540
2170 07:45:00.256753 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2171 07:45:00.257256
2172 07:45:00.257765
2173 07:45:00.258278
2174 07:45:00.260208 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 07:45:00.361617 volteer: tftpboot 192.168.201.1 12435197/tftp-deploy-rmcrzrxv/kernel/bzImage 12435197/tftp-deploy-rmcrzrxv/kernel/cmdline 12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
2177 07:45:00.361795 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 07:45:00.361937 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2179 07:45:00.366113 tftpboot 192.168.201.1 12435197/tftp-deploy-rmcrzrxv/kernel/bzIloy-rmcrzrxv/kernel/cmdline 12435197/tftp-deploy-rmcrzrxv/ramdisk/ramdisk.cpio.gz
2180 07:45:00.366251
2181 07:45:00.366355 Waiting for link
2182 07:45:00.569502
2183 07:45:00.570088 done.
2184 07:45:00.570534
2185 07:45:00.570947 MAC: 00:24:32:30:77:d1
2186 07:45:00.571350
2187 07:45:00.572929 Sending DHCP discover... done.
2188 07:45:00.573362
2189 07:45:00.575612 Waiting for reply... done.
2190 07:45:00.576156
2191 07:45:00.579296 Sending DHCP request... done.
2192 07:45:00.579856
2193 07:45:00.586910 Waiting for reply... done.
2194 07:45:00.587385
2195 07:45:00.587912 My ip is 192.168.201.13
2196 07:45:00.588442
2197 07:45:00.589628 The DHCP server ip is 192.168.201.1
2198 07:45:00.592905
2199 07:45:00.596462 TFTP server IP predefined by user: 192.168.201.1
2200 07:45:00.596978
2201 07:45:00.603108 Bootfile predefined by user: 12435197/tftp-deploy-rmcrzrxv/kernel/bzImage
2202 07:45:00.603709
2203 07:45:00.606305 Sending tftp read request... done.
2204 07:45:00.606830
2205 07:45:00.615117 Waiting for the transfer...
2206 07:45:00.615687
2207 07:45:01.262219 00000000 ################################################################
2208 07:45:01.262382
2209 07:45:01.885612 00080000 ################################################################
2210 07:45:01.886109
2211 07:45:02.557783 00100000 ################################################################
2212 07:45:02.558489
2213 07:45:03.172951 00180000 ################################################################
2214 07:45:03.173486
2215 07:45:03.822765 00200000 ################################################################
2216 07:45:03.823478
2217 07:45:04.410341 00280000 ################################################################
2218 07:45:04.410536
2219 07:45:05.006478 00300000 ################################################################
2220 07:45:05.007040
2221 07:45:05.649419 00380000 ################################################################
2222 07:45:05.649949
2223 07:45:06.299706 00400000 ################################################################
2224 07:45:06.300352
2225 07:45:06.960112 00480000 ################################################################
2226 07:45:06.960721
2227 07:45:07.588295 00500000 ################################################################
2228 07:45:07.589005
2229 07:45:08.223637 00580000 ################################################################
2230 07:45:08.224148
2231 07:45:08.841353 00600000 ################################################################
2232 07:45:08.841506
2233 07:45:09.478882 00680000 ################################################################
2234 07:45:09.479435
2235 07:45:10.105122 00700000 ################################################################
2236 07:45:10.105287
2237 07:45:10.709624 00780000 ################################################################
2238 07:45:10.710158
2239 07:45:10.946812 00800000 ####################### done.
2240 07:45:10.947355
2241 07:45:10.950014 The bootfile was 8572816 bytes long.
2242 07:45:10.950451
2243 07:45:10.952977 Sending tftp read request... done.
2244 07:45:10.953393
2245 07:45:10.956082 Waiting for the transfer...
2246 07:45:10.956495
2247 07:45:11.634394 00000000 ################################################################
2248 07:45:11.634909
2249 07:45:12.273087 00080000 ################################################################
2250 07:45:12.273519
2251 07:45:12.911032 00100000 ################################################################
2252 07:45:12.911713
2253 07:45:13.576487 00180000 ################################################################
2254 07:45:13.577042
2255 07:45:14.209479 00200000 ################################################################
2256 07:45:14.209643
2257 07:45:14.821338 00280000 ################################################################
2258 07:45:14.821497
2259 07:45:15.403770 00300000 ################################################################
2260 07:45:15.403927
2261 07:45:16.034799 00380000 ################################################################
2262 07:45:16.035313
2263 07:45:16.656150 00400000 ################################################################
2264 07:45:16.656311
2265 07:45:17.257026 00480000 ################################################################
2266 07:45:17.257540
2267 07:45:17.891322 00500000 ################################################################
2268 07:45:17.891478
2269 07:45:18.470574 00580000 ################################################################
2270 07:45:18.471188
2271 07:45:18.682662 00600000 ###################### done.
2272 07:45:18.683207
2273 07:45:18.685579 Sending tftp read request... done.
2274 07:45:18.685993
2275 07:45:18.689280 Waiting for the transfer...
2276 07:45:18.689693
2277 07:45:18.692479 00000000 # done.
2278 07:45:18.693051
2279 07:45:18.698624 Command line loaded dynamically from TFTP file: 12435197/tftp-deploy-rmcrzrxv/kernel/cmdline
2280 07:45:18.699069
2281 07:45:18.725102 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435197/extract-nfsrootfs-abk8auac,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2282 07:45:18.730799
2283 07:45:18.733924 Shutting down all USB controllers.
2284 07:45:18.734398
2285 07:45:18.734731 Removing current net device
2286 07:45:18.735035
2287 07:45:18.737181 Finalizing coreboot
2288 07:45:18.737635
2289 07:45:18.743693 Exiting depthcharge with code 4 at timestamp: 28653422
2290 07:45:18.744106
2291 07:45:18.744431
2292 07:45:18.744786 Starting kernel ...
2293 07:45:18.745086
2294 07:45:18.745368
2295 07:45:18.746493 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2296 07:45:18.746985 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2297 07:45:18.747356 Setting prompt string to ['Linux version [0-9]']
2298 07:45:18.747714 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2299 07:45:18.748061 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2301 07:49:43.747800 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2303 07:49:43.749059 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2305 07:49:43.749857 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2308 07:49:43.751262 end: 2 depthcharge-action (duration 00:05:00) [common]
2310 07:49:43.752527 Cleaning after the job
2311 07:49:43.753043 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/ramdisk
2312 07:49:43.757682 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/kernel
2313 07:49:43.764011 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/nfsrootfs
2314 07:49:43.887542 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435197/tftp-deploy-rmcrzrxv/modules
2315 07:49:43.888046 start: 4.1 power-off (timeout 00:00:30) [common]
2316 07:49:43.888378 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2317 07:49:43.967856 >> Command sent successfully.
2318 07:49:43.970605 Returned 0 in 0 seconds
2319 07:49:44.071065 end: 4.1 power-off (duration 00:00:00) [common]
2321 07:49:44.071426 start: 4.2 read-feedback (timeout 00:10:00) [common]
2322 07:49:44.071713 Listened to connection for namespace 'common' for up to 1s
2323 07:49:45.072663 Finalising connection for namespace 'common'
2324 07:49:45.072840 Disconnecting from shell: Finalise
2325 07:49:45.072929
2326 07:49:45.173272 end: 4.2 read-feedback (duration 00:00:01) [common]
2327 07:49:45.173428 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435197
2328 07:49:45.843516 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435197
2329 07:49:45.843748 JobError: Your job cannot terminate cleanly.