Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:55.729966 lava-dispatcher, installed at version: 2023.10
2 07:40:55.730208 start: 0 validate
3 07:40:55.730363 Start time: 2024-01-03 07:40:55.730349+00:00 (UTC)
4 07:40:55.730506 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:55.730661 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:55.999188 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:55.999386 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:59.999921 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:41:00.000289 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:41:00.266692 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:41:00.267414 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:41:01.270948 validate duration: 5.54
14 07:41:01.271287 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:41:01.271398 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:41:01.271494 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:41:01.271638 Not decompressing ramdisk as can be used compressed.
18 07:41:01.271768 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 07:41:01.271896 saving as /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/ramdisk/initrd.cpio.gz
20 07:41:01.272009 total size: 5432480 (5 MB)
21 07:41:01.273385 progress 0 % (0 MB)
22 07:41:01.275353 progress 5 % (0 MB)
23 07:41:01.277065 progress 10 % (0 MB)
24 07:41:01.278801 progress 15 % (0 MB)
25 07:41:01.280716 progress 20 % (1 MB)
26 07:41:01.282564 progress 25 % (1 MB)
27 07:41:01.284328 progress 30 % (1 MB)
28 07:41:01.286279 progress 35 % (1 MB)
29 07:41:01.288069 progress 40 % (2 MB)
30 07:41:01.289865 progress 45 % (2 MB)
31 07:41:01.291636 progress 50 % (2 MB)
32 07:41:01.293486 progress 55 % (2 MB)
33 07:41:01.295206 progress 60 % (3 MB)
34 07:41:01.296878 progress 65 % (3 MB)
35 07:41:01.298705 progress 70 % (3 MB)
36 07:41:01.300292 progress 75 % (3 MB)
37 07:41:01.301869 progress 80 % (4 MB)
38 07:41:01.303428 progress 85 % (4 MB)
39 07:41:01.305194 progress 90 % (4 MB)
40 07:41:01.306875 progress 95 % (4 MB)
41 07:41:01.308476 progress 100 % (5 MB)
42 07:41:01.308722 5 MB downloaded in 0.04 s (141.12 MB/s)
43 07:41:01.308896 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:41:01.309168 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:41:01.309267 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:41:01.309374 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:41:01.309531 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:41:01.309616 saving as /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/kernel/bzImage
50 07:41:01.309688 total size: 8572816 (8 MB)
51 07:41:01.309757 No compression specified
52 07:41:01.310990 progress 0 % (0 MB)
53 07:41:01.313750 progress 5 % (0 MB)
54 07:41:01.316433 progress 10 % (0 MB)
55 07:41:01.319029 progress 15 % (1 MB)
56 07:41:01.321606 progress 20 % (1 MB)
57 07:41:01.324357 progress 25 % (2 MB)
58 07:41:01.326929 progress 30 % (2 MB)
59 07:41:01.329551 progress 35 % (2 MB)
60 07:41:01.332579 progress 40 % (3 MB)
61 07:41:01.335380 progress 45 % (3 MB)
62 07:41:01.338837 progress 50 % (4 MB)
63 07:41:01.341730 progress 55 % (4 MB)
64 07:41:01.344432 progress 60 % (4 MB)
65 07:41:01.347358 progress 65 % (5 MB)
66 07:41:01.350149 progress 70 % (5 MB)
67 07:41:01.352795 progress 75 % (6 MB)
68 07:41:01.355490 progress 80 % (6 MB)
69 07:41:01.357996 progress 85 % (6 MB)
70 07:41:01.360506 progress 90 % (7 MB)
71 07:41:01.363216 progress 95 % (7 MB)
72 07:41:01.365905 progress 100 % (8 MB)
73 07:41:01.366143 8 MB downloaded in 0.06 s (144.83 MB/s)
74 07:41:01.366306 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:41:01.366572 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:41:01.366716 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:41:01.366850 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:41:01.367006 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 07:41:01.367083 saving as /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/nfsrootfs/full.rootfs.tar
81 07:41:01.367159 total size: 207157356 (197 MB)
82 07:41:01.367230 Using unxz to decompress xz
83 07:41:01.371642 progress 0 % (0 MB)
84 07:41:02.013162 progress 5 % (9 MB)
85 07:41:02.623236 progress 10 % (19 MB)
86 07:41:03.356292 progress 15 % (29 MB)
87 07:41:03.773791 progress 20 % (39 MB)
88 07:41:04.195200 progress 25 % (49 MB)
89 07:41:04.922447 progress 30 % (59 MB)
90 07:41:05.568951 progress 35 % (69 MB)
91 07:41:06.272460 progress 40 % (79 MB)
92 07:41:06.940199 progress 45 % (88 MB)
93 07:41:07.642598 progress 50 % (98 MB)
94 07:41:08.379416 progress 55 % (108 MB)
95 07:41:09.186540 progress 60 % (118 MB)
96 07:41:09.341522 progress 65 % (128 MB)
97 07:41:09.499124 progress 70 % (138 MB)
98 07:41:09.603785 progress 75 % (148 MB)
99 07:41:09.688535 progress 80 % (158 MB)
100 07:41:09.770724 progress 85 % (167 MB)
101 07:41:09.881375 progress 90 % (177 MB)
102 07:41:10.191820 progress 95 % (187 MB)
103 07:41:10.888628 progress 100 % (197 MB)
104 07:41:10.896206 197 MB downloaded in 9.53 s (20.73 MB/s)
105 07:41:10.896625 end: 1.3.1 http-download (duration 00:00:10) [common]
107 07:41:10.896946 end: 1.3 download-retry (duration 00:00:10) [common]
108 07:41:10.897052 start: 1.4 download-retry (timeout 00:09:50) [common]
109 07:41:10.897155 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 07:41:10.897324 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:41:10.897405 saving as /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/modules/modules.tar
112 07:41:10.897476 total size: 251144 (0 MB)
113 07:41:10.897550 Using unxz to decompress xz
114 07:41:10.901880 progress 13 % (0 MB)
115 07:41:10.902365 progress 26 % (0 MB)
116 07:41:10.902643 progress 39 % (0 MB)
117 07:41:10.904220 progress 52 % (0 MB)
118 07:41:10.906433 progress 65 % (0 MB)
119 07:41:10.908605 progress 78 % (0 MB)
120 07:41:10.910645 progress 91 % (0 MB)
121 07:41:10.912921 progress 100 % (0 MB)
122 07:41:10.919168 0 MB downloaded in 0.02 s (11.05 MB/s)
123 07:41:10.919454 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:41:10.919770 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:41:10.919883 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 07:41:10.919993 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 07:41:14.961517 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435148/extract-nfsrootfs-kyc8j9s8
129 07:41:14.961754 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 07:41:14.961914 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 07:41:14.962170 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek
132 07:41:14.962381 makedir: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin
133 07:41:14.962547 makedir: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/tests
134 07:41:14.962710 makedir: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/results
135 07:41:14.962872 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-add-keys
136 07:41:14.963095 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-add-sources
137 07:41:14.963300 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-background-process-start
138 07:41:14.963509 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-background-process-stop
139 07:41:14.963726 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-common-functions
140 07:41:14.963940 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-echo-ipv4
141 07:41:14.964160 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-install-packages
142 07:41:14.964351 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-installed-packages
143 07:41:14.964501 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-os-build
144 07:41:14.964654 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-probe-channel
145 07:41:14.964801 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-probe-ip
146 07:41:14.964947 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-target-ip
147 07:41:14.965093 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-target-mac
148 07:41:14.965237 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-target-storage
149 07:41:14.965385 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-case
150 07:41:14.965532 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-event
151 07:41:14.965675 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-feedback
152 07:41:14.965820 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-raise
153 07:41:14.965964 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-reference
154 07:41:14.966110 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-runner
155 07:41:14.966253 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-set
156 07:41:14.966398 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-test-shell
157 07:41:14.966551 Updating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-add-keys (debian)
158 07:41:14.966729 Updating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-add-sources (debian)
159 07:41:14.966911 Updating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-install-packages (debian)
160 07:41:14.967089 Updating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-installed-packages (debian)
161 07:41:14.967267 Updating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/bin/lava-os-build (debian)
162 07:41:14.967423 Creating /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/environment
163 07:41:14.967547 LAVA metadata
164 07:41:14.967629 - LAVA_JOB_ID=12435148
165 07:41:14.967702 - LAVA_DISPATCHER_IP=192.168.201.1
166 07:41:14.967817 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 07:41:14.967896 skipped lava-vland-overlay
168 07:41:14.967982 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 07:41:14.968075 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 07:41:14.968146 skipped lava-multinode-overlay
171 07:41:14.968229 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 07:41:14.968330 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 07:41:14.968413 Loading test definitions
174 07:41:14.968516 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 07:41:14.968596 Using /lava-12435148 at stage 0
176 07:41:14.968917 uuid=12435148_1.5.2.3.1 testdef=None
177 07:41:14.969017 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 07:41:14.969113 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 07:41:14.969637 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 07:41:14.969890 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 07:41:14.970552 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 07:41:14.970822 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 07:41:14.971459 runner path: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/0/tests/0_timesync-off test_uuid 12435148_1.5.2.3.1
186 07:41:14.971636 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 07:41:14.971894 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 07:41:14.971977 Using /lava-12435148 at stage 0
190 07:41:14.972087 Fetching tests from https://github.com/kernelci/test-definitions.git
191 07:41:14.972177 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/0/tests/1_kselftest-futex'
192 07:41:18.196042 Running '/usr/bin/git checkout kernelci.org
193 07:41:18.329483 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 07:41:18.330586 uuid=12435148_1.5.2.3.5 testdef=None
195 07:41:18.330799 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 07:41:18.331224 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
198 07:41:18.332155 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 07:41:18.332439 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
201 07:41:18.333566 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 07:41:18.333835 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
204 07:41:18.334920 runner path: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/0/tests/1_kselftest-futex test_uuid 12435148_1.5.2.3.5
205 07:41:18.335026 BOARD='asus-C436FA-Flip-hatch'
206 07:41:18.335099 BRANCH='cip'
207 07:41:18.335168 SKIPFILE='/dev/null'
208 07:41:18.335233 SKIP_INSTALL='True'
209 07:41:18.335299 TESTPROG_URL='None'
210 07:41:18.335363 TST_CASENAME=''
211 07:41:18.335426 TST_CMDFILES='futex'
212 07:41:18.335586 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 07:41:18.335821 Creating lava-test-runner.conf files
215 07:41:18.335893 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435148/lava-overlay-2lmy5uek/lava-12435148/0 for stage 0
216 07:41:18.335999 - 0_timesync-off
217 07:41:18.336076 - 1_kselftest-futex
218 07:41:18.336185 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 07:41:18.336301 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
220 07:41:26.818872 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 07:41:26.819111 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
222 07:41:26.819256 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 07:41:26.819405 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
224 07:41:26.819542 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
225 07:41:26.977145 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 07:41:26.977587 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
227 07:41:26.977708 extracting modules file /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435148/extract-nfsrootfs-kyc8j9s8
228 07:41:26.994053 extracting modules file /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435148/extract-overlay-ramdisk-ktqaqph3/ramdisk
229 07:41:27.011826 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 07:41:27.011999 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
231 07:41:27.012137 [common] Applying overlay to NFS
232 07:41:27.012289 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435148/compress-overlay-s_cizaox/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435148/extract-nfsrootfs-kyc8j9s8
233 07:41:28.133849 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 07:41:28.134045 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
235 07:41:28.134152 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 07:41:28.134258 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
237 07:41:28.134351 Building ramdisk /var/lib/lava/dispatcher/tmp/12435148/extract-overlay-ramdisk-ktqaqph3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435148/extract-overlay-ramdisk-ktqaqph3/ramdisk
238 07:41:28.217936 >> 26162 blocks
239 07:41:28.811736 rename /var/lib/lava/dispatcher/tmp/12435148/extract-overlay-ramdisk-ktqaqph3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
240 07:41:28.812241 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 07:41:28.812391 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
242 07:41:28.812508 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
243 07:41:28.812612 No mkimage arch provided, not using FIT.
244 07:41:28.812712 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 07:41:28.812806 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 07:41:28.812922 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 07:41:28.813035 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
248 07:41:28.813124 No LXC device requested
249 07:41:28.813215 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 07:41:28.813319 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
251 07:41:28.813419 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 07:41:28.813504 Checking files for TFTP limit of 4294967296 bytes.
253 07:41:28.813956 end: 1 tftp-deploy (duration 00:00:28) [common]
254 07:41:28.814070 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 07:41:28.814170 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 07:41:28.814318 substitutions:
257 07:41:28.814401 - {DTB}: None
258 07:41:28.814475 - {INITRD}: 12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
259 07:41:28.814542 - {KERNEL}: 12435148/tftp-deploy-rd6422hy/kernel/bzImage
260 07:41:28.814609 - {LAVA_MAC}: None
261 07:41:28.814673 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435148/extract-nfsrootfs-kyc8j9s8
262 07:41:28.814740 - {NFS_SERVER_IP}: 192.168.201.1
263 07:41:28.814804 - {PRESEED_CONFIG}: None
264 07:41:28.814867 - {PRESEED_LOCAL}: None
265 07:41:28.814929 - {RAMDISK}: 12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
266 07:41:28.814992 - {ROOT_PART}: None
267 07:41:28.815053 - {ROOT}: None
268 07:41:28.815114 - {SERVER_IP}: 192.168.201.1
269 07:41:28.815175 - {TEE}: None
270 07:41:28.815236 Parsed boot commands:
271 07:41:28.815296 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 07:41:28.815499 Parsed boot commands: tftpboot 192.168.201.1 12435148/tftp-deploy-rd6422hy/kernel/bzImage 12435148/tftp-deploy-rd6422hy/kernel/cmdline 12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
273 07:41:28.815604 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 07:41:28.815696 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 07:41:28.815808 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 07:41:28.815930 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 07:41:28.816020 Not connected, no need to disconnect.
278 07:41:28.816107 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 07:41:28.816205 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 07:41:28.816294 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 07:41:28.820509 Setting prompt string to ['lava-test: # ']
282 07:41:28.820928 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 07:41:28.821055 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 07:41:28.821166 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 07:41:28.821266 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 07:41:28.821482 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 07:41:33.963689 >> Command sent successfully.
288 07:41:33.966564 Returned 0 in 5 seconds
289 07:41:34.066972 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 07:41:34.067329 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 07:41:34.067441 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 07:41:34.067545 Setting prompt string to 'Starting depthcharge on Helios...'
294 07:41:34.067626 Changing prompt to 'Starting depthcharge on Helios...'
295 07:41:34.067705 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 07:41:34.067993 [Enter `^Ec?' for help]
297 07:41:34.688902
298 07:41:34.689058
299 07:41:34.698287 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 07:41:34.701738 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 07:41:34.708454 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 07:41:34.711885 CPU: AES supported, TXT NOT supported, VT supported
303 07:41:34.718518 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 07:41:34.722470 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 07:41:34.728805 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 07:41:34.731793 VBOOT: Loading verstage.
307 07:41:34.735569 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 07:41:34.741901 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 07:41:34.745516 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 07:41:34.748685 CBFS @ c08000 size 3f8000
311 07:41:34.755259 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 07:41:34.758648 CBFS: Locating 'fallback/verstage'
313 07:41:34.762046 CBFS: Found @ offset 10fb80 size 1072c
314 07:41:34.765042
315 07:41:34.765138
316 07:41:34.775372 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 07:41:34.789600 Probing TPM: . done!
318 07:41:34.792748 TPM ready after 0 ms
319 07:41:34.796159 Connected to device vid:did:rid of 1ae0:0028:00
320 07:41:34.806395 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 07:41:34.810415 Initialized TPM device CR50 revision 0
322 07:41:34.855926 tlcl_send_startup: Startup return code is 0
323 07:41:34.856057 TPM: setup succeeded
324 07:41:34.868709 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 07:41:34.871933 Chrome EC: UHEPI supported
326 07:41:34.875748 Phase 1
327 07:41:34.878847 FMAP: area GBB found @ c05000 (12288 bytes)
328 07:41:34.885499 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 07:41:34.885602 Phase 2
330 07:41:34.888543 Phase 3
331 07:41:34.891910 FMAP: area GBB found @ c05000 (12288 bytes)
332 07:41:34.898994 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 07:41:34.905747 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 07:41:34.909105 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 07:41:34.915077 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 07:41:34.931017 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 07:41:34.934383 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 07:41:34.941116 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 07:41:34.945190 Phase 4
340 07:41:34.948370 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 07:41:34.954577 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 07:41:35.134788 VB2:vb2_rsa_verify_digest() Digest check failed!
343 07:41:35.138167 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 07:41:35.141457 Saving nvdata
345 07:41:35.144749 Reboot requested (10020007)
346 07:41:35.147995 board_reset() called!
347 07:41:35.148093 full_reset() called!
348 07:41:39.655793
349 07:41:39.655945
350 07:41:39.666142 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 07:41:39.668852 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 07:41:39.675539 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 07:41:39.678842 CPU: AES supported, TXT NOT supported, VT supported
354 07:41:39.685710 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 07:41:39.689169 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 07:41:39.695998 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 07:41:39.698796 VBOOT: Loading verstage.
358 07:41:39.702398 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 07:41:39.709086 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 07:41:39.712457 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 07:41:39.715820 CBFS @ c08000 size 3f8000
362 07:41:39.722266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 07:41:39.725304 CBFS: Locating 'fallback/verstage'
364 07:41:39.728662 CBFS: Found @ offset 10fb80 size 1072c
365 07:41:39.732105
366 07:41:39.732228
367 07:41:39.741951 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 07:41:39.756834 Probing TPM: . done!
369 07:41:39.759655 TPM ready after 0 ms
370 07:41:39.763256 Connected to device vid:did:rid of 1ae0:0028:00
371 07:41:39.773603 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 07:41:39.776947 Initialized TPM device CR50 revision 0
373 07:41:39.822710 tlcl_send_startup: Startup return code is 0
374 07:41:39.822816 TPM: setup succeeded
375 07:41:39.834902 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 07:41:39.839128 Chrome EC: UHEPI supported
377 07:41:39.841930 Phase 1
378 07:41:39.845339 FMAP: area GBB found @ c05000 (12288 bytes)
379 07:41:39.852065 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 07:41:39.858806 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 07:41:39.862607 Recovery requested (1009000e)
382 07:41:39.862704 Saving nvdata
383 07:41:39.873844 tlcl_extend: response is 0
384 07:41:39.882977 tlcl_extend: response is 0
385 07:41:39.889992 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 07:41:39.892988 CBFS @ c08000 size 3f8000
387 07:41:39.899708 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 07:41:39.903111 CBFS: Locating 'fallback/romstage'
389 07:41:39.906398 CBFS: Found @ offset 80 size 145fc
390 07:41:39.909904 Accumulated console time in verstage 98 ms
391 07:41:39.910002
392 07:41:39.910102
393 07:41:39.923197 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 07:41:39.929428 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 07:41:39.932906 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 07:41:39.936146 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 07:41:39.942792 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 07:41:39.946024 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 07:41:39.949581 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 07:41:39.952750 TCO_STS: 0000 0000
401 07:41:39.955988 GEN_PMCON: e0015238 00000200
402 07:41:39.959459 GBLRST_CAUSE: 00000000 00000000
403 07:41:39.959557 prev_sleep_state 5
404 07:41:39.962833 Boot Count incremented to 67991
405 07:41:39.969592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 07:41:39.972922 CBFS @ c08000 size 3f8000
407 07:41:39.979746 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 07:41:39.979844 CBFS: Locating 'fspm.bin'
409 07:41:39.982963 CBFS: Found @ offset 5ffc0 size 71000
410 07:41:39.987054 Chrome EC: UHEPI supported
411 07:41:39.994332 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 07:41:39.999225 Probing TPM: done!
413 07:41:40.006160 Connected to device vid:did:rid of 1ae0:0028:00
414 07:41:40.015975 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 07:41:40.021772 Initialized TPM device CR50 revision 0
416 07:41:40.031195 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 07:41:40.037505 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 07:41:40.040916 MRC cache found, size 1948
419 07:41:40.044229 bootmode is set to: 2
420 07:41:40.047637 PRMRR disabled by config.
421 07:41:40.047773 SPD INDEX = 1
422 07:41:40.054332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 07:41:40.057485 CBFS @ c08000 size 3f8000
424 07:41:40.064207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 07:41:40.064319 CBFS: Locating 'spd.bin'
426 07:41:40.067773 CBFS: Found @ offset 5fb80 size 400
427 07:41:40.071016 SPD: module type is LPDDR3
428 07:41:40.074351 SPD: module part is
429 07:41:40.080711 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 07:41:40.083935 SPD: device width 4 bits, bus width 8 bits
431 07:41:40.087430 SPD: module size is 4096 MB (per channel)
432 07:41:40.090737 memory slot: 0 configuration done.
433 07:41:40.094257 memory slot: 2 configuration done.
434 07:41:40.144990 CBMEM:
435 07:41:40.148310 IMD: root @ 99fff000 254 entries.
436 07:41:40.151727 IMD: root @ 99ffec00 62 entries.
437 07:41:40.155134 External stage cache:
438 07:41:40.158504 IMD: root @ 9abff000 254 entries.
439 07:41:40.161237 IMD: root @ 9abfec00 62 entries.
440 07:41:40.165194 Chrome EC: clear events_b mask to 0x0000000020004000
441 07:41:40.185864 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 07:41:40.193788 tlcl_write: response is 0
443 07:41:40.203026 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 07:41:40.210196 MRC: TPM MRC hash updated successfully.
445 07:41:40.210325 2 DIMMs found
446 07:41:40.213467 SMM Memory Map
447 07:41:40.216368 SMRAM : 0x9a000000 0x1000000
448 07:41:40.219680 Subregion 0: 0x9a000000 0xa00000
449 07:41:40.223037 Subregion 1: 0x9aa00000 0x200000
450 07:41:40.226374 Subregion 2: 0x9ac00000 0x400000
451 07:41:40.229751 top_of_ram = 0x9a000000
452 07:41:40.233149 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 07:41:40.239782 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 07:41:40.242918 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 07:41:40.249606 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 07:41:40.252579 CBFS @ c08000 size 3f8000
457 07:41:40.256218 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 07:41:40.259297 CBFS: Locating 'fallback/postcar'
459 07:41:40.266107 CBFS: Found @ offset 107000 size 4b44
460 07:41:40.269548 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 07:41:40.281518 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 07:41:40.284721 Processing 180 relocs. Offset value of 0x97c0c000
463 07:41:40.293385 Accumulated console time in romstage 286 ms
464 07:41:40.293476
465 07:41:40.293551
466 07:41:40.303383 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 07:41:40.310047 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 07:41:40.313692 CBFS @ c08000 size 3f8000
469 07:41:40.317046 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 07:41:40.320429 CBFS: Locating 'fallback/ramstage'
471 07:41:40.327158 CBFS: Found @ offset 43380 size 1b9e8
472 07:41:40.333193 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 07:41:40.365359 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 07:41:40.368648 Processing 3976 relocs. Offset value of 0x98db0000
475 07:41:40.374974 Accumulated console time in postcar 52 ms
476 07:41:40.375099
477 07:41:40.375215
478 07:41:40.385029 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 07:41:40.391527 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 07:41:40.395045 WARNING: RO_VPD is uninitialized or empty.
481 07:41:40.398409 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 07:41:40.404794 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 07:41:40.404891 Normal boot.
484 07:41:40.412196 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 07:41:40.414913 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 07:41:40.418262 CBFS @ c08000 size 3f8000
487 07:41:40.425163 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 07:41:40.428439 CBFS: Locating 'cpu_microcode_blob.bin'
489 07:41:40.431787 CBFS: Found @ offset 14700 size 2ec00
490 07:41:40.435287 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 07:41:40.438609 Skip microcode update
492 07:41:40.441406 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 07:41:40.444918 CBFS @ c08000 size 3f8000
494 07:41:40.451567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 07:41:40.454789 CBFS: Locating 'fsps.bin'
496 07:41:40.458530 CBFS: Found @ offset d1fc0 size 35000
497 07:41:40.483138 Detected 4 core, 8 thread CPU.
498 07:41:40.487028 Setting up SMI for CPU
499 07:41:40.490195 IED base = 0x9ac00000
500 07:41:40.490322 IED size = 0x00400000
501 07:41:40.493504 Will perform SMM setup.
502 07:41:40.499854 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 07:41:40.506699 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 07:41:40.509959 Processing 16 relocs. Offset value of 0x00030000
505 07:41:40.513183 Attempting to start 7 APs
506 07:41:40.516986 Waiting for 10ms after sending INIT.
507 07:41:40.533039 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
508 07:41:40.533169 done.
509 07:41:40.536329 AP: slot 6 apic_id 7.
510 07:41:40.539732 AP: slot 7 apic_id 6.
511 07:41:40.542955 Waiting for 2nd SIPI to complete...done.
512 07:41:40.546514 AP: slot 3 apic_id 4.
513 07:41:40.546654 AP: slot 2 apic_id 5.
514 07:41:40.549364 AP: slot 1 apic_id 3.
515 07:41:40.553205 AP: slot 5 apic_id 2.
516 07:41:40.559335 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 07:41:40.562704 Processing 13 relocs. Offset value of 0x00038000
518 07:41:40.569511 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 07:41:40.576374 Installing SMM handler to 0x9a000000
520 07:41:40.582864 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 07:41:40.586287 Processing 658 relocs. Offset value of 0x9a010000
522 07:41:40.596126 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 07:41:40.599469 Processing 13 relocs. Offset value of 0x9a008000
524 07:41:40.605947 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 07:41:40.612842 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 07:41:40.616320 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 07:41:40.622360 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 07:41:40.629134 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 07:41:40.636013 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 07:41:40.638958 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 07:41:40.645902 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 07:41:40.649147 Clearing SMI status registers
533 07:41:40.652657 SMI_STS: PM1
534 07:41:40.652779 PM1_STS: PWRBTN
535 07:41:40.656011 TCO_STS: SECOND_TO
536 07:41:40.659528 New SMBASE 0x9a000000
537 07:41:40.662928 In relocation handler: CPU 0
538 07:41:40.665718 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 07:41:40.669117 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 07:41:40.672362 Relocation complete.
541 07:41:40.675793 New SMBASE 0x99fff000
542 07:41:40.675879 In relocation handler: CPU 4
543 07:41:40.682609 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
544 07:41:40.685660 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 07:41:40.689194 Relocation complete.
546 07:41:40.689308 New SMBASE 0x99ffe800
547 07:41:40.692336 In relocation handler: CPU 6
548 07:41:40.699051 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
549 07:41:40.702998 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 07:41:40.706095 Relocation complete.
551 07:41:40.706181 New SMBASE 0x99ffe400
552 07:41:40.709262 In relocation handler: CPU 7
553 07:41:40.712265 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 07:41:40.719425 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 07:41:40.722718 Relocation complete.
556 07:41:40.722839 New SMBASE 0x99ffec00
557 07:41:40.725982 In relocation handler: CPU 5
558 07:41:40.729445 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 07:41:40.736179 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 07:41:40.736294 Relocation complete.
561 07:41:40.739570 New SMBASE 0x99fffc00
562 07:41:40.742217 In relocation handler: CPU 1
563 07:41:40.745647 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
564 07:41:40.752281 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 07:41:40.752389 Relocation complete.
566 07:41:40.755905 New SMBASE 0x99fff400
567 07:41:40.759313 In relocation handler: CPU 3
568 07:41:40.762333 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
569 07:41:40.769066 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 07:41:40.769183 Relocation complete.
571 07:41:40.772421 New SMBASE 0x99fff800
572 07:41:40.775799 In relocation handler: CPU 2
573 07:41:40.779172 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
574 07:41:40.785901 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 07:41:40.785993 Relocation complete.
576 07:41:40.789226 Initializing CPU #0
577 07:41:40.792621 CPU: vendor Intel device 806ec
578 07:41:40.795814 CPU: family 06, model 8e, stepping 0c
579 07:41:40.798892 Clearing out pending MCEs
580 07:41:40.802023 Setting up local APIC...
581 07:41:40.802152 apic_id: 0x00 done.
582 07:41:40.805260 Turbo is available but hidden
583 07:41:40.808658 Turbo is available and visible
584 07:41:40.812081 VMX status: enabled
585 07:41:40.815297 IA32_FEATURE_CONTROL status: locked
586 07:41:40.818480 Skip microcode update
587 07:41:40.818594 CPU #0 initialized
588 07:41:40.821625 Initializing CPU #4
589 07:41:40.821720 Initializing CPU #7
590 07:41:40.824982 Initializing CPU #6
591 07:41:40.828779 CPU: vendor Intel device 806ec
592 07:41:40.832052 CPU: family 06, model 8e, stepping 0c
593 07:41:40.835449 CPU: vendor Intel device 806ec
594 07:41:40.838346 CPU: family 06, model 8e, stepping 0c
595 07:41:40.842062 Clearing out pending MCEs
596 07:41:40.845331 Clearing out pending MCEs
597 07:41:40.848687 Setting up local APIC...
598 07:41:40.852023 CPU: vendor Intel device 806ec
599 07:41:40.854784 CPU: family 06, model 8e, stepping 0c
600 07:41:40.854879 Clearing out pending MCEs
601 07:41:40.858072 Initializing CPU #3
602 07:41:40.861897 Initializing CPU #2
603 07:41:40.861992 apic_id: 0x06 done.
604 07:41:40.864980 Setting up local APIC...
605 07:41:40.868061 Initializing CPU #1
606 07:41:40.868157 Initializing CPU #5
607 07:41:40.871683 Setting up local APIC...
608 07:41:40.875216 apic_id: 0x07 done.
609 07:41:40.875340 VMX status: enabled
610 07:41:40.878355 VMX status: enabled
611 07:41:40.881648 IA32_FEATURE_CONTROL status: locked
612 07:41:40.885030 IA32_FEATURE_CONTROL status: locked
613 07:41:40.888342 Skip microcode update
614 07:41:40.888431 Skip microcode update
615 07:41:40.891775 CPU #7 initialized
616 07:41:40.895045 CPU #6 initialized
617 07:41:40.895164 apic_id: 0x01 done.
618 07:41:40.898325 CPU: vendor Intel device 806ec
619 07:41:40.901634 CPU: family 06, model 8e, stepping 0c
620 07:41:40.904862 CPU: vendor Intel device 806ec
621 07:41:40.908122 CPU: family 06, model 8e, stepping 0c
622 07:41:40.911214 Clearing out pending MCEs
623 07:41:40.914527 Clearing out pending MCEs
624 07:41:40.917798 Setting up local APIC...
625 07:41:40.917912 VMX status: enabled
626 07:41:40.921120 Setting up local APIC...
627 07:41:40.924937 IA32_FEATURE_CONTROL status: locked
628 07:41:40.928163 apic_id: 0x03 done.
629 07:41:40.931493 apic_id: 0x02 done.
630 07:41:40.931615 VMX status: enabled
631 07:41:40.934863 VMX status: enabled
632 07:41:40.937734 IA32_FEATURE_CONTROL status: locked
633 07:41:40.940878 IA32_FEATURE_CONTROL status: locked
634 07:41:40.944454 Skip microcode update
635 07:41:40.944572 Skip microcode update
636 07:41:40.947830 CPU #1 initialized
637 07:41:40.951505 CPU #5 initialized
638 07:41:40.951626 Skip microcode update
639 07:41:40.954607 CPU: vendor Intel device 806ec
640 07:41:40.957919 CPU: family 06, model 8e, stepping 0c
641 07:41:40.961351 CPU: vendor Intel device 806ec
642 07:41:40.964732 CPU: family 06, model 8e, stepping 0c
643 07:41:40.968086 Clearing out pending MCEs
644 07:41:40.970856 Clearing out pending MCEs
645 07:41:40.974080 Setting up local APIC...
646 07:41:40.974175 CPU #4 initialized
647 07:41:40.977332 Setting up local APIC...
648 07:41:40.981318 apic_id: 0x05 done.
649 07:41:40.981412 apic_id: 0x04 done.
650 07:41:40.984282 VMX status: enabled
651 07:41:40.987826 VMX status: enabled
652 07:41:40.991341 IA32_FEATURE_CONTROL status: locked
653 07:41:40.994259 IA32_FEATURE_CONTROL status: locked
654 07:41:40.994354 Skip microcode update
655 07:41:40.997623 Skip microcode update
656 07:41:41.001037 CPU #2 initialized
657 07:41:41.001131 CPU #3 initialized
658 07:41:41.007810 bsp_do_flight_plan done after 461 msecs.
659 07:41:41.007905 CPU: frequency set to 4200 MHz
660 07:41:41.010429 Enabling SMIs.
661 07:41:41.010523 Locking SMM.
662 07:41:41.026773 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 07:41:41.030040 CBFS @ c08000 size 3f8000
664 07:41:41.036788 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 07:41:41.036884 CBFS: Locating 'vbt.bin'
666 07:41:41.040095 CBFS: Found @ offset 5f5c0 size 499
667 07:41:41.047312 Found a VBT of 4608 bytes after decompression
668 07:41:41.230146 Display FSP Version Info HOB
669 07:41:41.233991 Reference Code - CPU = 9.0.1e.30
670 07:41:41.236808 uCode Version = 0.0.0.ca
671 07:41:41.240049 TXT ACM version = ff.ff.ff.ffff
672 07:41:41.243943 Display FSP Version Info HOB
673 07:41:41.246942 Reference Code - ME = 9.0.1e.30
674 07:41:41.249972 MEBx version = 0.0.0.0
675 07:41:41.253349 ME Firmware Version = Consumer SKU
676 07:41:41.256734 Display FSP Version Info HOB
677 07:41:41.260543 Reference Code - CML PCH = 9.0.1e.30
678 07:41:41.263306 PCH-CRID Status = Disabled
679 07:41:41.266571 PCH-CRID Original Value = ff.ff.ff.ffff
680 07:41:41.270009 PCH-CRID New Value = ff.ff.ff.ffff
681 07:41:41.273451 OPROM - RST - RAID = ff.ff.ff.ffff
682 07:41:41.276648 ChipsetInit Base Version = ff.ff.ff.ffff
683 07:41:41.280253 ChipsetInit Oem Version = ff.ff.ff.ffff
684 07:41:41.283384 Display FSP Version Info HOB
685 07:41:41.289692 Reference Code - SA - System Agent = 9.0.1e.30
686 07:41:41.293017 Reference Code - MRC = 0.7.1.6c
687 07:41:41.293111 SA - PCIe Version = 9.0.1e.30
688 07:41:41.296296 SA-CRID Status = Disabled
689 07:41:41.300227 SA-CRID Original Value = 0.0.0.c
690 07:41:41.303610 SA-CRID New Value = 0.0.0.c
691 07:41:41.306814 OPROM - VBIOS = ff.ff.ff.ffff
692 07:41:41.310015 RTC Init
693 07:41:41.313513 Set power on after power failure.
694 07:41:41.313607 Disabling Deep S3
695 07:41:41.316831 Disabling Deep S3
696 07:41:41.316925 Disabling Deep S4
697 07:41:41.319990 Disabling Deep S4
698 07:41:41.320084 Disabling Deep S5
699 07:41:41.323093 Disabling Deep S5
700 07:41:41.329797 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
701 07:41:41.329893 Enumerating buses...
702 07:41:41.336603 Show all devs... Before device enumeration.
703 07:41:41.336730 Root Device: enabled 1
704 07:41:41.339731 CPU_CLUSTER: 0: enabled 1
705 07:41:41.343002 DOMAIN: 0000: enabled 1
706 07:41:41.346893 APIC: 00: enabled 1
707 07:41:41.346987 PCI: 00:00.0: enabled 1
708 07:41:41.350084 PCI: 00:02.0: enabled 1
709 07:41:41.353308 PCI: 00:04.0: enabled 0
710 07:41:41.353404 PCI: 00:05.0: enabled 0
711 07:41:41.356367 PCI: 00:12.0: enabled 1
712 07:41:41.360113 PCI: 00:12.5: enabled 0
713 07:41:41.363254 PCI: 00:12.6: enabled 0
714 07:41:41.363348 PCI: 00:14.0: enabled 1
715 07:41:41.366561 PCI: 00:14.1: enabled 0
716 07:41:41.369994 PCI: 00:14.3: enabled 1
717 07:41:41.373363 PCI: 00:14.5: enabled 0
718 07:41:41.373456 PCI: 00:15.0: enabled 1
719 07:41:41.376822 PCI: 00:15.1: enabled 1
720 07:41:41.379410 PCI: 00:15.2: enabled 0
721 07:41:41.382814 PCI: 00:15.3: enabled 0
722 07:41:41.382909 PCI: 00:16.0: enabled 1
723 07:41:41.386114 PCI: 00:16.1: enabled 0
724 07:41:41.389409 PCI: 00:16.2: enabled 0
725 07:41:41.389503 PCI: 00:16.3: enabled 0
726 07:41:41.393262 PCI: 00:16.4: enabled 0
727 07:41:41.396596 PCI: 00:16.5: enabled 0
728 07:41:41.399496 PCI: 00:17.0: enabled 1
729 07:41:41.399590 PCI: 00:19.0: enabled 1
730 07:41:41.402907 PCI: 00:19.1: enabled 0
731 07:41:41.406305 PCI: 00:19.2: enabled 0
732 07:41:41.409716 PCI: 00:1a.0: enabled 0
733 07:41:41.409810 PCI: 00:1c.0: enabled 0
734 07:41:41.412722 PCI: 00:1c.1: enabled 0
735 07:41:41.416596 PCI: 00:1c.2: enabled 0
736 07:41:41.419906 PCI: 00:1c.3: enabled 0
737 07:41:41.420034 PCI: 00:1c.4: enabled 0
738 07:41:41.423143 PCI: 00:1c.5: enabled 0
739 07:41:41.426375 PCI: 00:1c.6: enabled 0
740 07:41:41.426498 PCI: 00:1c.7: enabled 0
741 07:41:41.429608 PCI: 00:1d.0: enabled 1
742 07:41:41.432936 PCI: 00:1d.1: enabled 0
743 07:41:41.436169 PCI: 00:1d.2: enabled 0
744 07:41:41.436305 PCI: 00:1d.3: enabled 0
745 07:41:41.439404 PCI: 00:1d.4: enabled 0
746 07:41:41.443081 PCI: 00:1d.5: enabled 1
747 07:41:41.446208 PCI: 00:1e.0: enabled 1
748 07:41:41.446302 PCI: 00:1e.1: enabled 0
749 07:41:41.449501 PCI: 00:1e.2: enabled 1
750 07:41:41.452900 PCI: 00:1e.3: enabled 1
751 07:41:41.452994 PCI: 00:1f.0: enabled 1
752 07:41:41.456301 PCI: 00:1f.1: enabled 1
753 07:41:41.459491 PCI: 00:1f.2: enabled 1
754 07:41:41.462693 PCI: 00:1f.3: enabled 1
755 07:41:41.462799 PCI: 00:1f.4: enabled 1
756 07:41:41.466058 PCI: 00:1f.5: enabled 1
757 07:41:41.469990 PCI: 00:1f.6: enabled 0
758 07:41:41.473160 USB0 port 0: enabled 1
759 07:41:41.473295 I2C: 00:15: enabled 1
760 07:41:41.476588 I2C: 00:5d: enabled 1
761 07:41:41.479774 GENERIC: 0.0: enabled 1
762 07:41:41.479898 I2C: 00:1a: enabled 1
763 07:41:41.483171 I2C: 00:38: enabled 1
764 07:41:41.486415 I2C: 00:39: enabled 1
765 07:41:41.486536 I2C: 00:3a: enabled 1
766 07:41:41.489631 I2C: 00:3b: enabled 1
767 07:41:41.493062 PCI: 00:00.0: enabled 1
768 07:41:41.493190 SPI: 00: enabled 1
769 07:41:41.496205 SPI: 01: enabled 1
770 07:41:41.499673 PNP: 0c09.0: enabled 1
771 07:41:41.499791 USB2 port 0: enabled 1
772 07:41:41.503014 USB2 port 1: enabled 1
773 07:41:41.506334 USB2 port 2: enabled 0
774 07:41:41.506451 USB2 port 3: enabled 0
775 07:41:41.509588 USB2 port 5: enabled 0
776 07:41:41.512747 USB2 port 6: enabled 1
777 07:41:41.516375 USB2 port 9: enabled 1
778 07:41:41.516469 USB3 port 0: enabled 1
779 07:41:41.519621 USB3 port 1: enabled 1
780 07:41:41.523085 USB3 port 2: enabled 1
781 07:41:41.523220 USB3 port 3: enabled 1
782 07:41:41.525866 USB3 port 4: enabled 0
783 07:41:41.529549 APIC: 03: enabled 1
784 07:41:41.529677 APIC: 05: enabled 1
785 07:41:41.532793 APIC: 04: enabled 1
786 07:41:41.535919 APIC: 01: enabled 1
787 07:41:41.536047 APIC: 02: enabled 1
788 07:41:41.539579 APIC: 07: enabled 1
789 07:41:41.539666 APIC: 06: enabled 1
790 07:41:41.542756 Compare with tree...
791 07:41:41.546170 Root Device: enabled 1
792 07:41:41.549321 CPU_CLUSTER: 0: enabled 1
793 07:41:41.549447 APIC: 00: enabled 1
794 07:41:41.552591 APIC: 03: enabled 1
795 07:41:41.555811 APIC: 05: enabled 1
796 07:41:41.555905 APIC: 04: enabled 1
797 07:41:41.559213 APIC: 01: enabled 1
798 07:41:41.562600 APIC: 02: enabled 1
799 07:41:41.562694 APIC: 07: enabled 1
800 07:41:41.565924 APIC: 06: enabled 1
801 07:41:41.573255 DOMAIN: 0000: enabled 1
802 07:41:41.573397 PCI: 00:00.0: enabled 1
803 07:41:41.573507 PCI: 00:02.0: enabled 1
804 07:41:41.575551 PCI: 00:04.0: enabled 0
805 07:41:41.579376 PCI: 00:05.0: enabled 0
806 07:41:41.582622 PCI: 00:12.0: enabled 1
807 07:41:41.582756 PCI: 00:12.5: enabled 0
808 07:41:41.586057 PCI: 00:12.6: enabled 0
809 07:41:41.589376 PCI: 00:14.0: enabled 1
810 07:41:41.592728 USB0 port 0: enabled 1
811 07:41:41.596033 USB2 port 0: enabled 1
812 07:41:41.596165 USB2 port 1: enabled 1
813 07:41:41.598870 USB2 port 2: enabled 0
814 07:41:41.602067 USB2 port 3: enabled 0
815 07:41:41.605413 USB2 port 5: enabled 0
816 07:41:41.608808 USB2 port 6: enabled 1
817 07:41:41.612187 USB2 port 9: enabled 1
818 07:41:41.612311 USB3 port 0: enabled 1
819 07:41:41.615540 USB3 port 1: enabled 1
820 07:41:41.618822 USB3 port 2: enabled 1
821 07:41:41.622127 USB3 port 3: enabled 1
822 07:41:41.625604 USB3 port 4: enabled 0
823 07:41:41.625710 PCI: 00:14.1: enabled 0
824 07:41:41.628904 PCI: 00:14.3: enabled 1
825 07:41:41.632273 PCI: 00:14.5: enabled 0
826 07:41:41.635529 PCI: 00:15.0: enabled 1
827 07:41:41.638614 I2C: 00:15: enabled 1
828 07:41:41.638708 PCI: 00:15.1: enabled 1
829 07:41:41.642305 I2C: 00:5d: enabled 1
830 07:41:41.645728 GENERIC: 0.0: enabled 1
831 07:41:41.648661 PCI: 00:15.2: enabled 0
832 07:41:41.652102 PCI: 00:15.3: enabled 0
833 07:41:41.652197 PCI: 00:16.0: enabled 1
834 07:41:41.655558 PCI: 00:16.1: enabled 0
835 07:41:41.658806 PCI: 00:16.2: enabled 0
836 07:41:41.662029 PCI: 00:16.3: enabled 0
837 07:41:41.665172 PCI: 00:16.4: enabled 0
838 07:41:41.665267 PCI: 00:16.5: enabled 0
839 07:41:41.668360 PCI: 00:17.0: enabled 1
840 07:41:41.671902 PCI: 00:19.0: enabled 1
841 07:41:41.675102 I2C: 00:1a: enabled 1
842 07:41:41.675197 I2C: 00:38: enabled 1
843 07:41:41.678551 I2C: 00:39: enabled 1
844 07:41:41.681827 I2C: 00:3a: enabled 1
845 07:41:41.685191 I2C: 00:3b: enabled 1
846 07:41:41.688380 PCI: 00:19.1: enabled 0
847 07:41:41.688476 PCI: 00:19.2: enabled 0
848 07:41:41.691827 PCI: 00:1a.0: enabled 0
849 07:41:41.695193 PCI: 00:1c.0: enabled 0
850 07:41:41.698543 PCI: 00:1c.1: enabled 0
851 07:41:41.698626 PCI: 00:1c.2: enabled 0
852 07:41:41.701773 PCI: 00:1c.3: enabled 0
853 07:41:41.705051 PCI: 00:1c.4: enabled 0
854 07:41:41.708423 PCI: 00:1c.5: enabled 0
855 07:41:41.711768 PCI: 00:1c.6: enabled 0
856 07:41:41.711862 PCI: 00:1c.7: enabled 0
857 07:41:41.715194 PCI: 00:1d.0: enabled 1
858 07:41:41.718432 PCI: 00:1d.1: enabled 0
859 07:41:41.721634 PCI: 00:1d.2: enabled 0
860 07:41:41.724810 PCI: 00:1d.3: enabled 0
861 07:41:41.724913 PCI: 00:1d.4: enabled 0
862 07:41:41.728703 PCI: 00:1d.5: enabled 1
863 07:41:41.732038 PCI: 00:00.0: enabled 1
864 07:41:41.734796 PCI: 00:1e.0: enabled 1
865 07:41:41.738054 PCI: 00:1e.1: enabled 0
866 07:41:41.738148 PCI: 00:1e.2: enabled 1
867 07:41:41.741444 SPI: 00: enabled 1
868 07:41:41.744718 PCI: 00:1e.3: enabled 1
869 07:41:41.748704 SPI: 01: enabled 1
870 07:41:41.748831 PCI: 00:1f.0: enabled 1
871 07:41:41.751460 PNP: 0c09.0: enabled 1
872 07:41:41.755263 PCI: 00:1f.1: enabled 1
873 07:41:41.758033 PCI: 00:1f.2: enabled 1
874 07:41:41.758119 PCI: 00:1f.3: enabled 1
875 07:41:41.761540 PCI: 00:1f.4: enabled 1
876 07:41:41.765263 PCI: 00:1f.5: enabled 1
877 07:41:41.768667 PCI: 00:1f.6: enabled 0
878 07:41:41.771884 Root Device scanning...
879 07:41:41.774996 scan_static_bus for Root Device
880 07:41:41.775127 CPU_CLUSTER: 0 enabled
881 07:41:41.778555 DOMAIN: 0000 enabled
882 07:41:41.781409 DOMAIN: 0000 scanning...
883 07:41:41.784792 PCI: pci_scan_bus for bus 00
884 07:41:41.787893 PCI: 00:00.0 [8086/0000] ops
885 07:41:41.791744 PCI: 00:00.0 [8086/9b61] enabled
886 07:41:41.794634 PCI: 00:02.0 [8086/0000] bus ops
887 07:41:41.798151 PCI: 00:02.0 [8086/9b41] enabled
888 07:41:41.801253 PCI: 00:04.0 [8086/1903] disabled
889 07:41:41.804518 PCI: 00:08.0 [8086/1911] enabled
890 07:41:41.808077 PCI: 00:12.0 [8086/02f9] enabled
891 07:41:41.811682 PCI: 00:14.0 [8086/0000] bus ops
892 07:41:41.814987 PCI: 00:14.0 [8086/02ed] enabled
893 07:41:41.818388 PCI: 00:14.2 [8086/02ef] enabled
894 07:41:41.821703 PCI: 00:14.3 [8086/02f0] enabled
895 07:41:41.825036 PCI: 00:15.0 [8086/0000] bus ops
896 07:41:41.828239 PCI: 00:15.0 [8086/02e8] enabled
897 07:41:41.831611 PCI: 00:15.1 [8086/0000] bus ops
898 07:41:41.835015 PCI: 00:15.1 [8086/02e9] enabled
899 07:41:41.838364 PCI: 00:16.0 [8086/0000] ops
900 07:41:41.841662 PCI: 00:16.0 [8086/02e0] enabled
901 07:41:41.841781 PCI: 00:17.0 [8086/0000] ops
902 07:41:41.845055 PCI: 00:17.0 [8086/02d3] enabled
903 07:41:41.848449 PCI: 00:19.0 [8086/0000] bus ops
904 07:41:41.851717 PCI: 00:19.0 [8086/02c5] enabled
905 07:41:41.855078 PCI: 00:1d.0 [8086/0000] bus ops
906 07:41:41.858196 PCI: 00:1d.0 [8086/02b0] enabled
907 07:41:41.864890 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 07:41:41.868130 PCI: 00:1e.0 [8086/0000] ops
909 07:41:41.871464 PCI: 00:1e.0 [8086/02a8] enabled
910 07:41:41.874871 PCI: 00:1e.2 [8086/0000] bus ops
911 07:41:41.878213 PCI: 00:1e.2 [8086/02aa] enabled
912 07:41:41.881604 PCI: 00:1e.3 [8086/0000] bus ops
913 07:41:41.885014 PCI: 00:1e.3 [8086/02ab] enabled
914 07:41:41.888344 PCI: 00:1f.0 [8086/0000] bus ops
915 07:41:41.891772 PCI: 00:1f.0 [8086/0284] enabled
916 07:41:41.897940 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 07:41:41.901518 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 07:41:41.904732 PCI: 00:1f.3 [8086/0000] bus ops
919 07:41:41.908093 PCI: 00:1f.3 [8086/02c8] enabled
920 07:41:41.911269 PCI: 00:1f.4 [8086/0000] bus ops
921 07:41:41.914922 PCI: 00:1f.4 [8086/02a3] enabled
922 07:41:41.917743 PCI: 00:1f.5 [8086/0000] bus ops
923 07:41:41.921116 PCI: 00:1f.5 [8086/02a4] enabled
924 07:41:41.924340 PCI: Leftover static devices:
925 07:41:41.928036 PCI: 00:05.0
926 07:41:41.928152 PCI: 00:12.5
927 07:41:41.931406 PCI: 00:12.6
928 07:41:41.931528 PCI: 00:14.1
929 07:41:41.931639 PCI: 00:14.5
930 07:41:41.934423 PCI: 00:15.2
931 07:41:41.934548 PCI: 00:15.3
932 07:41:41.937865 PCI: 00:16.1
933 07:41:41.937987 PCI: 00:16.2
934 07:41:41.938094 PCI: 00:16.3
935 07:41:41.941359 PCI: 00:16.4
936 07:41:41.941470 PCI: 00:16.5
937 07:41:41.944211 PCI: 00:19.1
938 07:41:41.944315 PCI: 00:19.2
939 07:41:41.947565 PCI: 00:1a.0
940 07:41:41.947644 PCI: 00:1c.0
941 07:41:41.947713 PCI: 00:1c.1
942 07:41:41.950948 PCI: 00:1c.2
943 07:41:41.951072 PCI: 00:1c.3
944 07:41:41.954321 PCI: 00:1c.4
945 07:41:41.954422 PCI: 00:1c.5
946 07:41:41.954496 PCI: 00:1c.6
947 07:41:41.957486 PCI: 00:1c.7
948 07:41:41.957597 PCI: 00:1d.1
949 07:41:41.960725 PCI: 00:1d.2
950 07:41:41.960808 PCI: 00:1d.3
951 07:41:41.960886 PCI: 00:1d.4
952 07:41:41.964571 PCI: 00:1d.5
953 07:41:41.964660 PCI: 00:1e.1
954 07:41:41.967918 PCI: 00:1f.1
955 07:41:41.968029 PCI: 00:1f.2
956 07:41:41.970757 PCI: 00:1f.6
957 07:41:41.970877 PCI: Check your devicetree.cb.
958 07:41:41.974552 PCI: 00:02.0 scanning...
959 07:41:41.977983 scan_generic_bus for PCI: 00:02.0
960 07:41:41.984074 scan_generic_bus for PCI: 00:02.0 done
961 07:41:41.987480 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
962 07:41:41.990811 PCI: 00:14.0 scanning...
963 07:41:41.994245 scan_static_bus for PCI: 00:14.0
964 07:41:41.997641 USB0 port 0 enabled
965 07:41:41.997773 USB0 port 0 scanning...
966 07:41:42.000828 scan_static_bus for USB0 port 0
967 07:41:42.004013 USB2 port 0 enabled
968 07:41:42.007289 USB2 port 1 enabled
969 07:41:42.007385 USB2 port 2 disabled
970 07:41:42.010998 USB2 port 3 disabled
971 07:41:42.014449 USB2 port 5 disabled
972 07:41:42.014544 USB2 port 6 enabled
973 07:41:42.017222 USB2 port 9 enabled
974 07:41:42.017317 USB3 port 0 enabled
975 07:41:42.020771 USB3 port 1 enabled
976 07:41:42.024173 USB3 port 2 enabled
977 07:41:42.024305 USB3 port 3 enabled
978 07:41:42.027475 USB3 port 4 disabled
979 07:41:42.030740 USB2 port 0 scanning...
980 07:41:42.033861 scan_static_bus for USB2 port 0
981 07:41:42.037621 scan_static_bus for USB2 port 0 done
982 07:41:42.040531 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
983 07:41:42.044087 USB2 port 1 scanning...
984 07:41:42.047529 scan_static_bus for USB2 port 1
985 07:41:42.050565 scan_static_bus for USB2 port 1 done
986 07:41:42.057251 scan_bus: scanning of bus USB2 port 1 took 9698 usecs
987 07:41:42.060913 USB2 port 6 scanning...
988 07:41:42.063808 scan_static_bus for USB2 port 6
989 07:41:42.067222 scan_static_bus for USB2 port 6 done
990 07:41:42.070780 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
991 07:41:42.073999 USB2 port 9 scanning...
992 07:41:42.077337 scan_static_bus for USB2 port 9
993 07:41:42.080621 scan_static_bus for USB2 port 9 done
994 07:41:42.087384 scan_bus: scanning of bus USB2 port 9 took 9691 usecs
995 07:41:42.090740 USB3 port 0 scanning...
996 07:41:42.094179 scan_static_bus for USB3 port 0
997 07:41:42.097434 scan_static_bus for USB3 port 0 done
998 07:41:42.104033 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
999 07:41:42.104129 USB3 port 1 scanning...
1000 07:41:42.107391 scan_static_bus for USB3 port 1
1001 07:41:42.110778 scan_static_bus for USB3 port 1 done
1002 07:41:42.117184 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
1003 07:41:42.120736 USB3 port 2 scanning...
1004 07:41:42.124008 scan_static_bus for USB3 port 2
1005 07:41:42.127320 scan_static_bus for USB3 port 2 done
1006 07:41:42.133985 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1007 07:41:42.134081 USB3 port 3 scanning...
1008 07:41:42.137335 scan_static_bus for USB3 port 3
1009 07:41:42.140656 scan_static_bus for USB3 port 3 done
1010 07:41:42.147062 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
1011 07:41:42.150313 scan_static_bus for USB0 port 0 done
1012 07:41:42.157258 scan_bus: scanning of bus USB0 port 0 took 155377 usecs
1013 07:41:42.160389 scan_static_bus for PCI: 00:14.0 done
1014 07:41:42.166905 scan_bus: scanning of bus PCI: 00:14.0 took 173012 usecs
1015 07:41:42.167000 PCI: 00:15.0 scanning...
1016 07:41:42.173879 scan_generic_bus for PCI: 00:15.0
1017 07:41:42.177078 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 07:41:42.180437 scan_generic_bus for PCI: 00:15.0 done
1019 07:41:42.187038 scan_bus: scanning of bus PCI: 00:15.0 took 14287 usecs
1020 07:41:42.187133 PCI: 00:15.1 scanning...
1021 07:41:42.190654 scan_generic_bus for PCI: 00:15.1
1022 07:41:42.197000 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 07:41:42.200273 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 07:41:42.203649 scan_generic_bus for PCI: 00:15.1 done
1025 07:41:42.210355 scan_bus: scanning of bus PCI: 00:15.1 took 18606 usecs
1026 07:41:42.213693 PCI: 00:19.0 scanning...
1027 07:41:42.217221 scan_generic_bus for PCI: 00:19.0
1028 07:41:42.220501 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 07:41:42.223731 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 07:41:42.226900 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 07:41:42.233681 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 07:41:42.237004 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 07:41:42.240389 scan_generic_bus for PCI: 00:19.0 done
1034 07:41:42.247031 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
1035 07:41:42.247162 PCI: 00:1d.0 scanning...
1036 07:41:42.253947 do_pci_scan_bridge for PCI: 00:1d.0
1037 07:41:42.254042 PCI: pci_scan_bus for bus 01
1038 07:41:42.257187 PCI: 01:00.0 [1c5c/1327] enabled
1039 07:41:42.264065 Enabling Common Clock Configuration
1040 07:41:42.267354 L1 Sub-State supported from root port 29
1041 07:41:42.270405 L1 Sub-State Support = 0xf
1042 07:41:42.273734 CommonModeRestoreTime = 0x28
1043 07:41:42.277033 Power On Value = 0x16, Power On Scale = 0x0
1044 07:41:42.277126 ASPM: Enabled L1
1045 07:41:42.283731 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1046 07:41:42.286984 PCI: 00:1e.2 scanning...
1047 07:41:42.290560 scan_generic_bus for PCI: 00:1e.2
1048 07:41:42.293657 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 07:41:42.297262 scan_generic_bus for PCI: 00:1e.2 done
1050 07:41:42.303795 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1051 07:41:42.306978 PCI: 00:1e.3 scanning...
1052 07:41:42.310894 scan_generic_bus for PCI: 00:1e.3
1053 07:41:42.314195 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 07:41:42.317602 scan_generic_bus for PCI: 00:1e.3 done
1055 07:41:42.323572 scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs
1056 07:41:42.323665 PCI: 00:1f.0 scanning...
1057 07:41:42.327630 scan_static_bus for PCI: 00:1f.0
1058 07:41:42.330870 PNP: 0c09.0 enabled
1059 07:41:42.334229 scan_static_bus for PCI: 00:1f.0 done
1060 07:41:42.341022 scan_bus: scanning of bus PCI: 00:1f.0 took 12061 usecs
1061 07:41:42.344203 PCI: 00:1f.3 scanning...
1062 07:41:42.347578 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1063 07:41:42.350852 PCI: 00:1f.4 scanning...
1064 07:41:42.354012 scan_generic_bus for PCI: 00:1f.4
1065 07:41:42.357183 scan_generic_bus for PCI: 00:1f.4 done
1066 07:41:42.364252 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1067 07:41:42.367484 PCI: 00:1f.5 scanning...
1068 07:41:42.370792 scan_generic_bus for PCI: 00:1f.5
1069 07:41:42.373989 scan_generic_bus for PCI: 00:1f.5 done
1070 07:41:42.380491 scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
1071 07:41:42.387120 scan_bus: scanning of bus DOMAIN: 0000 took 605238 usecs
1072 07:41:42.390440 scan_static_bus for Root Device done
1073 07:41:42.393935 scan_bus: scanning of bus Root Device took 625127 usecs
1074 07:41:42.396933 done
1075 07:41:42.400237 Chrome EC: UHEPI supported
1076 07:41:42.403537 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 07:41:42.410504 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 07:41:42.417262 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 07:41:42.423536 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 07:41:42.427355 SPI flash protection: WPSW=0 SRP0=0
1081 07:41:42.433507 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 07:41:42.436751 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 07:41:42.440227 found VGA at PCI: 00:02.0
1084 07:41:42.443303 Setting up VGA for PCI: 00:02.0
1085 07:41:42.450100 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 07:41:42.453873 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 07:41:42.457197 Allocating resources...
1088 07:41:42.457290 Reading resources...
1089 07:41:42.463798 Root Device read_resources bus 0 link: 0
1090 07:41:42.466841 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 07:41:42.473696 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 07:41:42.476983 DOMAIN: 0000 read_resources bus 0 link: 0
1093 07:41:42.483956 PCI: 00:14.0 read_resources bus 0 link: 0
1094 07:41:42.487106 USB0 port 0 read_resources bus 0 link: 0
1095 07:41:42.495192 USB0 port 0 read_resources bus 0 link: 0 done
1096 07:41:42.498539 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 07:41:42.505645 PCI: 00:15.0 read_resources bus 1 link: 0
1098 07:41:42.508937 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 07:41:42.515749 PCI: 00:15.1 read_resources bus 2 link: 0
1100 07:41:42.519190 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 07:41:42.526772 PCI: 00:19.0 read_resources bus 3 link: 0
1102 07:41:42.533235 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 07:41:42.536695 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 07:41:42.543320 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 07:41:42.546629 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 07:41:42.553184 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 07:41:42.556383 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 07:41:42.563092 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 07:41:42.566343 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 07:41:42.573010 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 07:41:42.579641 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 07:41:42.583339 Root Device read_resources bus 0 link: 0 done
1113 07:41:42.586654 Done reading resources.
1114 07:41:42.590004 Show resources in subtree (Root Device)...After reading.
1115 07:41:42.596171 Root Device child on link 0 CPU_CLUSTER: 0
1116 07:41:42.599586 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 07:41:42.599680 APIC: 00
1118 07:41:42.603046 APIC: 03
1119 07:41:42.603160 APIC: 05
1120 07:41:42.606269 APIC: 04
1121 07:41:42.606382 APIC: 01
1122 07:41:42.606484 APIC: 02
1123 07:41:42.609535 APIC: 07
1124 07:41:42.609613 APIC: 06
1125 07:41:42.612916 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 07:41:42.623102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 07:41:42.676012 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 07:41:42.676355 PCI: 00:00.0
1129 07:41:42.676451 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 07:41:42.676720 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 07:41:42.676798 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 07:41:42.677076 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 07:41:42.724873 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 07:41:42.726238 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 07:41:42.726897 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 07:41:42.727184 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 07:41:42.727297 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 07:41:42.730914 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 07:41:42.737719 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 07:41:42.747615 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 07:41:42.757272 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 07:41:42.767117 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 07:41:42.777477 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 07:41:42.784068 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 07:41:42.787473 PCI: 00:02.0
1146 07:41:42.797340 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 07:41:42.807216 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 07:41:42.817212 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 07:41:42.817307 PCI: 00:04.0
1150 07:41:42.820523 PCI: 00:08.0
1151 07:41:42.830702 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 07:41:42.830805 PCI: 00:12.0
1153 07:41:42.840736 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 07:41:42.843473 PCI: 00:14.0 child on link 0 USB0 port 0
1155 07:41:42.853815 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 07:41:42.860283 USB0 port 0 child on link 0 USB2 port 0
1157 07:41:42.860385 USB2 port 0
1158 07:41:42.863696 USB2 port 1
1159 07:41:42.863812 USB2 port 2
1160 07:41:42.866760 USB2 port 3
1161 07:41:42.866883 USB2 port 5
1162 07:41:42.869952 USB2 port 6
1163 07:41:42.870076 USB2 port 9
1164 07:41:42.873267 USB3 port 0
1165 07:41:42.873379 USB3 port 1
1166 07:41:42.876586 USB3 port 2
1167 07:41:42.879866 USB3 port 3
1168 07:41:42.879982 USB3 port 4
1169 07:41:42.883254 PCI: 00:14.2
1170 07:41:42.893147 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 07:41:42.903452 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 07:41:42.903545 PCI: 00:14.3
1173 07:41:42.913523 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 07:41:42.916780 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 07:41:42.926538 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 07:41:42.929556 I2C: 01:15
1177 07:41:42.933241 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 07:41:42.943151 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 07:41:42.946531 I2C: 02:5d
1180 07:41:42.946626 GENERIC: 0.0
1181 07:41:42.949875 PCI: 00:16.0
1182 07:41:42.959736 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 07:41:42.959853 PCI: 00:17.0
1184 07:41:42.969578 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 07:41:42.976631 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 07:41:42.986696 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 07:41:42.993342 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 07:41:43.002910 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 07:41:43.013313 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 07:41:43.016062 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 07:41:43.026542 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 07:41:43.026635 I2C: 03:1a
1193 07:41:43.029949 I2C: 03:38
1194 07:41:43.030041 I2C: 03:39
1195 07:41:43.033276 I2C: 03:3a
1196 07:41:43.033369 I2C: 03:3b
1197 07:41:43.039875 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 07:41:43.046296 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 07:41:43.056242 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 07:41:43.066211 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 07:41:43.066309 PCI: 01:00.0
1202 07:41:43.076407 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 07:41:43.079822 PCI: 00:1e.0
1204 07:41:43.089606 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 07:41:43.099307 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 07:41:43.102703 PCI: 00:1e.2 child on link 0 SPI: 00
1207 07:41:43.112456 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 07:41:43.116391 SPI: 00
1209 07:41:43.119252 PCI: 00:1e.3 child on link 0 SPI: 01
1210 07:41:43.129251 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 07:41:43.129382 SPI: 01
1212 07:41:43.135965 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 07:41:43.142686 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 07:41:43.152687 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 07:41:43.152782 PNP: 0c09.0
1216 07:41:43.162466 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 07:41:43.166132 PCI: 00:1f.3
1218 07:41:43.175926 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 07:41:43.185783 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 07:41:43.185882 PCI: 00:1f.4
1221 07:41:43.195777 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 07:41:43.205815 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 07:41:43.205910 PCI: 00:1f.5
1224 07:41:43.215586 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 07:41:43.222244 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 07:41:43.229317 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 07:41:43.235760 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 07:41:43.239175 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 07:41:43.242605 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 07:41:43.245650 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 07:41:43.249111 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 07:41:43.255859 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 07:41:43.262411 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 07:41:43.272708 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 07:41:43.278581 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 07:41:43.285597 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 07:41:43.288992 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 07:41:43.298611 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 07:41:43.302225 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 07:41:43.308859 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 07:41:43.312077 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 07:41:43.318930 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 07:41:43.321672 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 07:41:43.328341 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 07:41:43.331682 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 07:41:43.338300 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 07:41:43.341732 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 07:41:43.344941 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 07:41:43.351769 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 07:41:43.354747 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 07:41:43.361768 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 07:41:43.365136 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 07:41:43.371703 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 07:41:43.375040 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 07:41:43.381878 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 07:41:43.385236 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 07:41:43.391213 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 07:41:43.394572 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 07:41:43.401566 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 07:41:43.404513 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 07:41:43.411285 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 07:41:43.418094 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 07:41:43.421341 avoid_fixed_resources: DOMAIN: 0000
1264 07:41:43.428094 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 07:41:43.434347 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 07:41:43.441190 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 07:41:43.448295 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 07:41:43.457845 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 07:41:43.464749 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 07:41:43.471101 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 07:41:43.481080 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 07:41:43.487721 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 07:41:43.494355 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 07:41:43.501067 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 07:41:43.511422 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 07:41:43.511523 Setting resources...
1277 07:41:43.518087 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 07:41:43.521343 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 07:41:43.524541 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 07:41:43.531250 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 07:41:43.534214 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 07:41:43.540789 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 07:41:43.547927 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 07:41:43.554507 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 07:41:43.561011 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 07:41:43.564375 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 07:41:43.571010 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 07:41:43.574292 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 07:41:43.580875 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 07:41:43.583955 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 07:41:43.590637 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 07:41:43.594104 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 07:41:43.600817 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 07:41:43.604179 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 07:41:43.610975 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 07:41:43.614135 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 07:41:43.620529 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 07:41:43.623833 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 07:41:43.627147 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 07:41:43.633940 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 07:41:43.637360 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 07:41:43.643809 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 07:41:43.647011 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 07:41:43.654190 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 07:41:43.657234 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 07:41:43.663808 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 07:41:43.667038 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 07:41:43.674367 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 07:41:43.680486 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 07:41:43.686909 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 07:41:43.694094 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 07:41:43.703886 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 07:41:43.707288 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 07:41:43.714109 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 07:41:43.720139 Root Device assign_resources, bus 0 link: 0
1316 07:41:43.724102 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 07:41:43.734043 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 07:41:43.740692 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 07:41:43.746632 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 07:41:43.756607 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 07:41:43.763347 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 07:41:43.773304 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 07:41:43.776556 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 07:41:43.783257 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 07:41:43.790029 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 07:41:43.800487 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 07:41:43.806823 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 07:41:43.816893 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 07:41:43.820311 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 07:41:43.823695 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 07:41:43.833388 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 07:41:43.836765 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 07:41:43.843372 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 07:41:43.849999 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 07:41:43.860042 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 07:41:43.866752 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 07:41:43.873187 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 07:41:43.880004 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 07:41:43.889872 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 07:41:43.896938 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 07:41:43.906921 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 07:41:43.909940 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 07:41:43.913352 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 07:41:43.923320 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 07:41:43.932979 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 07:41:43.940216 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 07:41:43.946586 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 07:41:43.953359 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 07:41:43.959352 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 07:41:43.965916 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 07:41:43.976086 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 07:41:43.979313 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 07:41:43.982615 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 07:41:43.992593 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 07:41:43.996303 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 07:41:44.002495 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 07:41:44.005696 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 07:41:44.012869 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 07:41:44.016538 LPC: Trying to open IO window from 800 size 1ff
1360 07:41:44.026179 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 07:41:44.032399 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 07:41:44.042500 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 07:41:44.049117 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 07:41:44.052291 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 07:41:44.059355 Root Device assign_resources, bus 0 link: 0
1366 07:41:44.062629 Done setting resources.
1367 07:41:44.069358 Show resources in subtree (Root Device)...After assigning values.
1368 07:41:44.072579 Root Device child on link 0 CPU_CLUSTER: 0
1369 07:41:44.076015 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 07:41:44.076102 APIC: 00
1371 07:41:44.078734 APIC: 03
1372 07:41:44.078818 APIC: 05
1373 07:41:44.082059 APIC: 04
1374 07:41:44.082142 APIC: 01
1375 07:41:44.082233 APIC: 02
1376 07:41:44.085954 APIC: 07
1377 07:41:44.086059 APIC: 06
1378 07:41:44.088699 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 07:41:44.099085 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 07:41:44.112065 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 07:41:44.112168 PCI: 00:00.0
1382 07:41:44.122272 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 07:41:44.131972 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 07:41:44.142109 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 07:41:44.151704 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 07:41:44.158237 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 07:41:44.168183 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 07:41:44.178354 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 07:41:44.188348 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 07:41:44.198362 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 07:41:44.204982 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 07:41:44.214293 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 07:41:44.224857 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 07:41:44.234467 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 07:41:44.244803 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 07:41:44.254463 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 07:41:44.264055 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 07:41:44.264147 PCI: 00:02.0
1399 07:41:44.274474 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 07:41:44.287500 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 07:41:44.294093 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 07:41:44.297433 PCI: 00:04.0
1403 07:41:44.297525 PCI: 00:08.0
1404 07:41:44.307225 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 07:41:44.310598 PCI: 00:12.0
1406 07:41:44.320750 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 07:41:44.324069 PCI: 00:14.0 child on link 0 USB0 port 0
1408 07:41:44.333673 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 07:41:44.340742 USB0 port 0 child on link 0 USB2 port 0
1410 07:41:44.340837 USB2 port 0
1411 07:41:44.344022 USB2 port 1
1412 07:41:44.344114 USB2 port 2
1413 07:41:44.347339 USB2 port 3
1414 07:41:44.347465 USB2 port 5
1415 07:41:44.350696 USB2 port 6
1416 07:41:44.350789 USB2 port 9
1417 07:41:44.353774 USB3 port 0
1418 07:41:44.357315 USB3 port 1
1419 07:41:44.357404 USB3 port 2
1420 07:41:44.360695 USB3 port 3
1421 07:41:44.360792 USB3 port 4
1422 07:41:44.363998 PCI: 00:14.2
1423 07:41:44.373843 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 07:41:44.383657 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 07:41:44.383766 PCI: 00:14.3
1426 07:41:44.393757 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 07:41:44.400443 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 07:41:44.410182 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 07:41:44.410290 I2C: 01:15
1430 07:41:44.416962 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 07:41:44.426940 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 07:41:44.427041 I2C: 02:5d
1433 07:41:44.429691 GENERIC: 0.0
1434 07:41:44.429782 PCI: 00:16.0
1435 07:41:44.439786 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 07:41:44.442902 PCI: 00:17.0
1437 07:41:44.453104 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 07:41:44.462780 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 07:41:44.473006 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 07:41:44.483037 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 07:41:44.489624 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 07:41:44.499350 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 07:41:44.506226 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 07:41:44.516201 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 07:41:44.516312 I2C: 03:1a
1446 07:41:44.519572 I2C: 03:38
1447 07:41:44.519665 I2C: 03:39
1448 07:41:44.522963 I2C: 03:3a
1449 07:41:44.523053 I2C: 03:3b
1450 07:41:44.529573 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 07:41:44.535652 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 07:41:44.545598 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 07:41:44.558735 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 07:41:44.558829 PCI: 01:00.0
1455 07:41:44.568768 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 07:41:44.571955 PCI: 00:1e.0
1457 07:41:44.581955 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 07:41:44.591910 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 07:41:44.595254 PCI: 00:1e.2 child on link 0 SPI: 00
1460 07:41:44.605225 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 07:41:44.608531 SPI: 00
1462 07:41:44.611792 PCI: 00:1e.3 child on link 0 SPI: 01
1463 07:41:44.622095 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 07:41:44.624818 SPI: 01
1465 07:41:44.628138 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 07:41:44.638566 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 07:41:44.645319 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 07:41:44.648090 PNP: 0c09.0
1469 07:41:44.654790 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 07:41:44.658255 PCI: 00:1f.3
1471 07:41:44.668324 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 07:41:44.678131 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 07:41:44.681310 PCI: 00:1f.4
1474 07:41:44.687755 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 07:41:44.698120 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 07:41:44.701460 PCI: 00:1f.5
1477 07:41:44.711624 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 07:41:44.714208 Done allocating resources.
1479 07:41:44.720866 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 07:41:44.720994 Enabling resources...
1481 07:41:44.728188 PCI: 00:00.0 subsystem <- 8086/9b61
1482 07:41:44.728300 PCI: 00:00.0 cmd <- 06
1483 07:41:44.731641 PCI: 00:02.0 subsystem <- 8086/9b41
1484 07:41:44.734877 PCI: 00:02.0 cmd <- 03
1485 07:41:44.738606 PCI: 00:08.0 cmd <- 06
1486 07:41:44.741647 PCI: 00:12.0 subsystem <- 8086/02f9
1487 07:41:44.744637 PCI: 00:12.0 cmd <- 02
1488 07:41:44.747994 PCI: 00:14.0 subsystem <- 8086/02ed
1489 07:41:44.751579 PCI: 00:14.0 cmd <- 02
1490 07:41:44.754869 PCI: 00:14.2 cmd <- 02
1491 07:41:44.758309 PCI: 00:14.3 subsystem <- 8086/02f0
1492 07:41:44.758426 PCI: 00:14.3 cmd <- 02
1493 07:41:44.764998 PCI: 00:15.0 subsystem <- 8086/02e8
1494 07:41:44.765118 PCI: 00:15.0 cmd <- 02
1495 07:41:44.768269 PCI: 00:15.1 subsystem <- 8086/02e9
1496 07:41:44.771585 PCI: 00:15.1 cmd <- 02
1497 07:41:44.774829 PCI: 00:16.0 subsystem <- 8086/02e0
1498 07:41:44.778223 PCI: 00:16.0 cmd <- 02
1499 07:41:44.781460 PCI: 00:17.0 subsystem <- 8086/02d3
1500 07:41:44.785043 PCI: 00:17.0 cmd <- 03
1501 07:41:44.788012 PCI: 00:19.0 subsystem <- 8086/02c5
1502 07:41:44.791695 PCI: 00:19.0 cmd <- 02
1503 07:41:44.794857 PCI: 00:1d.0 bridge ctrl <- 0013
1504 07:41:44.798087 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 07:41:44.801156 PCI: 00:1d.0 cmd <- 06
1506 07:41:44.804734 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 07:41:44.808406 PCI: 00:1e.0 cmd <- 06
1508 07:41:44.811817 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 07:41:44.811903 PCI: 00:1e.2 cmd <- 06
1510 07:41:44.818624 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 07:41:44.818712 PCI: 00:1e.3 cmd <- 02
1512 07:41:44.821974 PCI: 00:1f.0 subsystem <- 8086/0284
1513 07:41:44.825336 PCI: 00:1f.0 cmd <- 407
1514 07:41:44.828030 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 07:41:44.831562 PCI: 00:1f.3 cmd <- 02
1516 07:41:44.834909 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 07:41:44.838383 PCI: 00:1f.4 cmd <- 03
1518 07:41:44.841743 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 07:41:44.844897 PCI: 00:1f.5 cmd <- 406
1520 07:41:44.853287 PCI: 01:00.0 cmd <- 02
1521 07:41:44.858753 done.
1522 07:41:44.867844 ME: Version: 14.0.39.1367
1523 07:41:44.874635 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1524 07:41:44.878379 Initializing devices...
1525 07:41:44.878502 Root Device init ...
1526 07:41:44.885011 Chrome EC: Set SMI mask to 0x0000000000000000
1527 07:41:44.888239 Chrome EC: clear events_b mask to 0x0000000000000000
1528 07:41:44.894893 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 07:41:44.901321 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 07:41:44.907633 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 07:41:44.910946 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 07:41:44.914856 Root Device init finished in 35210 usecs
1533 07:41:44.917969 CPU_CLUSTER: 0 init ...
1534 07:41:44.924261 CPU_CLUSTER: 0 init finished in 2439 usecs
1535 07:41:44.929008 PCI: 00:00.0 init ...
1536 07:41:44.932369 CPU TDP: 15 Watts
1537 07:41:44.935812 CPU PL2 = 64 Watts
1538 07:41:44.939019 PCI: 00:00.0 init finished in 7083 usecs
1539 07:41:44.942377 PCI: 00:02.0 init ...
1540 07:41:44.945181 PCI: 00:02.0 init finished in 2253 usecs
1541 07:41:44.948673 PCI: 00:08.0 init ...
1542 07:41:44.951958 PCI: 00:08.0 init finished in 2252 usecs
1543 07:41:44.955231 PCI: 00:12.0 init ...
1544 07:41:44.958575 PCI: 00:12.0 init finished in 2252 usecs
1545 07:41:44.961871 PCI: 00:14.0 init ...
1546 07:41:44.965404 PCI: 00:14.0 init finished in 2252 usecs
1547 07:41:44.968699 PCI: 00:14.2 init ...
1548 07:41:44.972025 PCI: 00:14.2 init finished in 2253 usecs
1549 07:41:44.975262 PCI: 00:14.3 init ...
1550 07:41:44.978471 PCI: 00:14.3 init finished in 2272 usecs
1551 07:41:44.981758 PCI: 00:15.0 init ...
1552 07:41:44.984955 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 07:41:44.988467 PCI: 00:15.0 init finished in 5978 usecs
1554 07:41:44.992116 PCI: 00:15.1 init ...
1555 07:41:44.995171 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 07:41:44.998340 PCI: 00:15.1 init finished in 5976 usecs
1557 07:41:45.002394 PCI: 00:16.0 init ...
1558 07:41:45.005718 PCI: 00:16.0 init finished in 2253 usecs
1559 07:41:45.009362 PCI: 00:19.0 init ...
1560 07:41:45.012333 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 07:41:45.018983 PCI: 00:19.0 init finished in 5976 usecs
1562 07:41:45.019108 PCI: 00:1d.0 init ...
1563 07:41:45.022306 Initializing PCH PCIe bridge.
1564 07:41:45.025601 PCI: 00:1d.0 init finished in 5284 usecs
1565 07:41:45.030629 PCI: 00:1f.0 init ...
1566 07:41:45.033738 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 07:41:45.040450 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 07:41:45.040539 IOAPIC: ID = 0x02
1569 07:41:45.043619 IOAPIC: Dumping registers
1570 07:41:45.047008 reg 0x0000: 0x02000000
1571 07:41:45.050292 reg 0x0001: 0x00770020
1572 07:41:45.050405 reg 0x0002: 0x00000000
1573 07:41:45.057655 PCI: 00:1f.0 init finished in 23552 usecs
1574 07:41:45.061045 PCI: 00:1f.4 init ...
1575 07:41:45.064374 PCI: 00:1f.4 init finished in 2262 usecs
1576 07:41:45.074735 PCI: 01:00.0 init ...
1577 07:41:45.077898 PCI: 01:00.0 init finished in 2252 usecs
1578 07:41:45.082571 PNP: 0c09.0 init ...
1579 07:41:45.086024 Google Chrome EC uptime: 11.051 seconds
1580 07:41:45.092699 Google Chrome AP resets since EC boot: 0
1581 07:41:45.095866 Google Chrome most recent AP reset causes:
1582 07:41:45.102641 Google Chrome EC reset flags at last EC boot: reset-pin
1583 07:41:45.105785 PNP: 0c09.0 init finished in 20574 usecs
1584 07:41:45.108843 Devices initialized
1585 07:41:45.112585 Show all devs... After init.
1586 07:41:45.112706 Root Device: enabled 1
1587 07:41:45.115236 CPU_CLUSTER: 0: enabled 1
1588 07:41:45.119101 DOMAIN: 0000: enabled 1
1589 07:41:45.119192 APIC: 00: enabled 1
1590 07:41:45.122001 PCI: 00:00.0: enabled 1
1591 07:41:45.125659 PCI: 00:02.0: enabled 1
1592 07:41:45.128890 PCI: 00:04.0: enabled 0
1593 07:41:45.128984 PCI: 00:05.0: enabled 0
1594 07:41:45.132211 PCI: 00:12.0: enabled 1
1595 07:41:45.135588 PCI: 00:12.5: enabled 0
1596 07:41:45.138875 PCI: 00:12.6: enabled 0
1597 07:41:45.138995 PCI: 00:14.0: enabled 1
1598 07:41:45.142103 PCI: 00:14.1: enabled 0
1599 07:41:45.145129 PCI: 00:14.3: enabled 1
1600 07:41:45.145242 PCI: 00:14.5: enabled 0
1601 07:41:45.148839 PCI: 00:15.0: enabled 1
1602 07:41:45.152087 PCI: 00:15.1: enabled 1
1603 07:41:45.155334 PCI: 00:15.2: enabled 0
1604 07:41:45.155472 PCI: 00:15.3: enabled 0
1605 07:41:45.158820 PCI: 00:16.0: enabled 1
1606 07:41:45.161492 PCI: 00:16.1: enabled 0
1607 07:41:45.164967 PCI: 00:16.2: enabled 0
1608 07:41:45.165088 PCI: 00:16.3: enabled 0
1609 07:41:45.168312 PCI: 00:16.4: enabled 0
1610 07:41:45.171797 PCI: 00:16.5: enabled 0
1611 07:41:45.175084 PCI: 00:17.0: enabled 1
1612 07:41:45.175202 PCI: 00:19.0: enabled 1
1613 07:41:45.178348 PCI: 00:19.1: enabled 0
1614 07:41:45.181528 PCI: 00:19.2: enabled 0
1615 07:41:45.181661 PCI: 00:1a.0: enabled 0
1616 07:41:45.185107 PCI: 00:1c.0: enabled 0
1617 07:41:45.188559 PCI: 00:1c.1: enabled 0
1618 07:41:45.191215 PCI: 00:1c.2: enabled 0
1619 07:41:45.191335 PCI: 00:1c.3: enabled 0
1620 07:41:45.194674 PCI: 00:1c.4: enabled 0
1621 07:41:45.198120 PCI: 00:1c.5: enabled 0
1622 07:41:45.201435 PCI: 00:1c.6: enabled 0
1623 07:41:45.201554 PCI: 00:1c.7: enabled 0
1624 07:41:45.204828 PCI: 00:1d.0: enabled 1
1625 07:41:45.207919 PCI: 00:1d.1: enabled 0
1626 07:41:45.211065 PCI: 00:1d.2: enabled 0
1627 07:41:45.211178 PCI: 00:1d.3: enabled 0
1628 07:41:45.214870 PCI: 00:1d.4: enabled 0
1629 07:41:45.217999 PCI: 00:1d.5: enabled 0
1630 07:41:45.221726 PCI: 00:1e.0: enabled 1
1631 07:41:45.221850 PCI: 00:1e.1: enabled 0
1632 07:41:45.224397 PCI: 00:1e.2: enabled 1
1633 07:41:45.228007 PCI: 00:1e.3: enabled 1
1634 07:41:45.228134 PCI: 00:1f.0: enabled 1
1635 07:41:45.231462 PCI: 00:1f.1: enabled 0
1636 07:41:45.234287 PCI: 00:1f.2: enabled 0
1637 07:41:45.238063 PCI: 00:1f.3: enabled 1
1638 07:41:45.238184 PCI: 00:1f.4: enabled 1
1639 07:41:45.241085 PCI: 00:1f.5: enabled 1
1640 07:41:45.244542 PCI: 00:1f.6: enabled 0
1641 07:41:45.247871 USB0 port 0: enabled 1
1642 07:41:45.247963 I2C: 01:15: enabled 1
1643 07:41:45.251235 I2C: 02:5d: enabled 1
1644 07:41:45.254421 GENERIC: 0.0: enabled 1
1645 07:41:45.254512 I2C: 03:1a: enabled 1
1646 07:41:45.257597 I2C: 03:38: enabled 1
1647 07:41:45.261367 I2C: 03:39: enabled 1
1648 07:41:45.261496 I2C: 03:3a: enabled 1
1649 07:41:45.264652 I2C: 03:3b: enabled 1
1650 07:41:45.267281 PCI: 00:00.0: enabled 1
1651 07:41:45.267394 SPI: 00: enabled 1
1652 07:41:45.271237 SPI: 01: enabled 1
1653 07:41:45.273968 PNP: 0c09.0: enabled 1
1654 07:41:45.274081 USB2 port 0: enabled 1
1655 07:41:45.277211 USB2 port 1: enabled 1
1656 07:41:45.281319 USB2 port 2: enabled 0
1657 07:41:45.281435 USB2 port 3: enabled 0
1658 07:41:45.283953 USB2 port 5: enabled 0
1659 07:41:45.287816 USB2 port 6: enabled 1
1660 07:41:45.290950 USB2 port 9: enabled 1
1661 07:41:45.291058 USB3 port 0: enabled 1
1662 07:41:45.294387 USB3 port 1: enabled 1
1663 07:41:45.297517 USB3 port 2: enabled 1
1664 07:41:45.297632 USB3 port 3: enabled 1
1665 07:41:45.301055 USB3 port 4: enabled 0
1666 07:41:45.303742 APIC: 03: enabled 1
1667 07:41:45.303853 APIC: 05: enabled 1
1668 07:41:45.307017 APIC: 04: enabled 1
1669 07:41:45.310551 APIC: 01: enabled 1
1670 07:41:45.310663 APIC: 02: enabled 1
1671 07:41:45.313885 APIC: 07: enabled 1
1672 07:41:45.313997 APIC: 06: enabled 1
1673 07:41:45.317052 PCI: 00:08.0: enabled 1
1674 07:41:45.320239 PCI: 00:14.2: enabled 1
1675 07:41:45.323580 PCI: 01:00.0: enabled 1
1676 07:41:45.327491 Disabling ACPI via APMC:
1677 07:41:45.327583 done.
1678 07:41:45.333803 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 07:41:45.336982 ELOG: NV offset 0xaf0000 size 0x4000
1680 07:41:45.343828 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 07:41:45.350661 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:12 UTC
1682 07:41:45.357462 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:12 UTC
1683 07:41:45.363891 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:12 UTC
1684 07:41:45.370618 ELOG: Event(9A) added with size 9 at 2024-01-03 07:41:13 UTC
1685 07:41:45.377295 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:13 UTC
1686 07:41:45.383940 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:13 UTC
1687 07:41:45.387261 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 07:41:45.394263 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:13 UTC
1689 07:41:45.404272 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 07:41:45.410780 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:13 UTC
1691 07:41:45.414598 elog_add_boot_reason: Logged dev mode boot
1692 07:41:45.414689 Finalize devices...
1693 07:41:45.417313 PCI: 00:17.0 final
1694 07:41:45.421277 Devices finalized
1695 07:41:45.424575 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 07:41:45.430565 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 07:41:45.433864 ME: HFSTS1 : 0x90000245
1698 07:41:45.437613 ME: HFSTS2 : 0x3B850126
1699 07:41:45.444190 ME: HFSTS3 : 0x00000020
1700 07:41:45.447581 ME: HFSTS4 : 0x00004800
1701 07:41:45.450911 ME: HFSTS5 : 0x00000000
1702 07:41:45.454298 ME: HFSTS6 : 0x40400006
1703 07:41:45.457388 ME: Manufacturing Mode : NO
1704 07:41:45.460500 ME: FW Partition Table : OK
1705 07:41:45.464056 ME: Bringup Loader Failure : NO
1706 07:41:45.467094 ME: Firmware Init Complete : YES
1707 07:41:45.470333 ME: Boot Options Present : NO
1708 07:41:45.473660 ME: Update In Progress : NO
1709 07:41:45.476876 ME: D0i3 Support : YES
1710 07:41:45.480520 ME: Low Power State Enabled : NO
1711 07:41:45.483569 ME: CPU Replaced : NO
1712 07:41:45.486871 ME: CPU Replacement Valid : YES
1713 07:41:45.490159 ME: Current Working State : 5
1714 07:41:45.493581 ME: Current Operation State : 1
1715 07:41:45.497069 ME: Current Operation Mode : 0
1716 07:41:45.500338 ME: Error Code : 0
1717 07:41:45.503608 ME: CPU Debug Disabled : YES
1718 07:41:45.506883 ME: TXT Support : NO
1719 07:41:45.513342 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 07:41:45.517161 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 07:41:45.520351 CBFS @ c08000 size 3f8000
1722 07:41:45.526969 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 07:41:45.530318 CBFS: Locating 'fallback/dsdt.aml'
1724 07:41:45.533675 CBFS: Found @ offset 10bb80 size 3fa5
1725 07:41:45.540354 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 07:41:45.543591 CBFS @ c08000 size 3f8000
1727 07:41:45.546863 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 07:41:45.549950 CBFS: Locating 'fallback/slic'
1729 07:41:45.555002 CBFS: 'fallback/slic' not found.
1730 07:41:45.561666 ACPI: Writing ACPI tables at 99b3e000.
1731 07:41:45.561755 ACPI: * FACS
1732 07:41:45.564941 ACPI: * DSDT
1733 07:41:45.568303 Ramoops buffer: 0x100000@0x99a3d000.
1734 07:41:45.571414 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 07:41:45.578042 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 07:41:45.581173 Google Chrome EC: version:
1737 07:41:45.584550 ro: helios_v2.0.2659-56403530b
1738 07:41:45.587836 rw: helios_v2.0.2849-c41de27e7d
1739 07:41:45.587922 running image: 1
1740 07:41:45.592284 ACPI: * FADT
1741 07:41:45.592369 SCI is IRQ9
1742 07:41:45.598850 ACPI: added table 1/32, length now 40
1743 07:41:45.598964 ACPI: * SSDT
1744 07:41:45.601944 Found 1 CPU(s) with 8 core(s) each.
1745 07:41:45.605282 Error: Could not locate 'wifi_sar' in VPD.
1746 07:41:45.611914 Checking CBFS for default SAR values
1747 07:41:45.615255 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 07:41:45.618522 CBFS @ c08000 size 3f8000
1749 07:41:45.625632 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 07:41:45.628330 CBFS: Locating 'wifi_sar_defaults.hex'
1751 07:41:45.631687 CBFS: Found @ offset 5fac0 size 77
1752 07:41:45.635040 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 07:41:45.641703 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 07:41:45.645063 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 07:41:45.651944 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 07:41:45.655197 failed to find key in VPD: dsm_calib_r0_0
1757 07:41:45.665077 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 07:41:45.668327 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 07:41:45.671626 failed to find key in VPD: dsm_calib_r0_1
1760 07:41:45.681346 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 07:41:45.687946 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 07:41:45.691116 failed to find key in VPD: dsm_calib_r0_2
1763 07:41:45.701063 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 07:41:45.704913 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 07:41:45.711243 failed to find key in VPD: dsm_calib_r0_3
1766 07:41:45.717737 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 07:41:45.724397 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 07:41:45.728136 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 07:41:45.731233 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 07:41:45.735147 EC returned error result code 1
1771 07:41:45.738646 EC returned error result code 1
1772 07:41:45.742673 EC returned error result code 1
1773 07:41:45.749322 PS2K: Bad resp from EC. Vivaldi disabled!
1774 07:41:45.752757 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 07:41:45.759601 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 07:41:45.766098 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 07:41:45.769503 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 07:41:45.775686 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 07:41:45.782388 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 07:41:45.789020 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 07:41:45.792685 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 07:41:45.795655 ACPI: added table 2/32, length now 44
1783 07:41:45.798686 ACPI: * MCFG
1784 07:41:45.802580 ACPI: added table 3/32, length now 48
1785 07:41:45.805911 ACPI: * TPM2
1786 07:41:45.809281 TPM2 log created at 99a2d000
1787 07:41:45.811966 ACPI: added table 4/32, length now 52
1788 07:41:45.812094 ACPI: * MADT
1789 07:41:45.815342 SCI is IRQ9
1790 07:41:45.818735 ACPI: added table 5/32, length now 56
1791 07:41:45.818861 current = 99b43ac0
1792 07:41:45.822092 ACPI: * DMAR
1793 07:41:45.825401 ACPI: added table 6/32, length now 60
1794 07:41:45.828585 ACPI: * IGD OpRegion
1795 07:41:45.828718 GMA: Found VBT in CBFS
1796 07:41:45.832203 GMA: Found valid VBT in CBFS
1797 07:41:45.835634 ACPI: added table 7/32, length now 64
1798 07:41:45.838523 ACPI: * HPET
1799 07:41:45.841900 ACPI: added table 8/32, length now 68
1800 07:41:45.841987 ACPI: done.
1801 07:41:45.845071 ACPI tables: 31744 bytes.
1802 07:41:45.848661 smbios_write_tables: 99a2c000
1803 07:41:45.852405 EC returned error result code 3
1804 07:41:45.855732 Couldn't obtain OEM name from CBI
1805 07:41:45.858531 Create SMBIOS type 17
1806 07:41:45.862007 PCI: 00:00.0 (Intel Cannonlake)
1807 07:41:45.865173 PCI: 00:14.3 (Intel WiFi)
1808 07:41:45.868500 SMBIOS tables: 939 bytes.
1809 07:41:45.871898 Writing table forward entry at 0x00000500
1810 07:41:45.878543 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 07:41:45.882369 Writing coreboot table at 0x99b62000
1812 07:41:45.888909 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 07:41:45.891601 1. 0000000000001000-000000000009ffff: RAM
1814 07:41:45.895636 2. 00000000000a0000-00000000000fffff: RESERVED
1815 07:41:45.901935 3. 0000000000100000-0000000099a2bfff: RAM
1816 07:41:45.904933 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 07:41:45.911601 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 07:41:45.918113 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 07:41:45.922037 7. 000000009a000000-000000009f7fffff: RESERVED
1820 07:41:45.928256 8. 00000000e0000000-00000000efffffff: RESERVED
1821 07:41:45.931569 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 07:41:45.934994 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 07:41:45.941695 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 07:41:45.944975 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 07:41:45.951578 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 07:41:45.955274 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 07:41:45.958435 15. 0000000100000000-000000045e7fffff: RAM
1828 07:41:45.964729 Graphics framebuffer located at 0xc0000000
1829 07:41:45.968318 Passing 5 GPIOs to payload:
1830 07:41:45.971537 NAME | PORT | POLARITY | VALUE
1831 07:41:45.978133 write protect | undefined | high | low
1832 07:41:45.981337 lid | undefined | high | high
1833 07:41:45.988044 power | undefined | high | low
1834 07:41:45.994646 oprom | undefined | high | low
1835 07:41:45.997962 EC in RW | 0x000000cb | high | low
1836 07:41:46.001277 Board ID: 4
1837 07:41:46.004746 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 07:41:46.007914 CBFS @ c08000 size 3f8000
1839 07:41:46.014760 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 07:41:46.017699 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 07:41:46.021440 coreboot table: 1492 bytes.
1842 07:41:46.024604 IMD ROOT 0. 99fff000 00001000
1843 07:41:46.027877 IMD SMALL 1. 99ffe000 00001000
1844 07:41:46.031203 FSP MEMORY 2. 99c4e000 003b0000
1845 07:41:46.034437 CONSOLE 3. 99c2e000 00020000
1846 07:41:46.037779 FMAP 4. 99c2d000 0000054e
1847 07:41:46.041121 TIME STAMP 5. 99c2c000 00000910
1848 07:41:46.044368 VBOOT WORK 6. 99c18000 00014000
1849 07:41:46.047737 MRC DATA 7. 99c16000 00001958
1850 07:41:46.051139 ROMSTG STCK 8. 99c15000 00001000
1851 07:41:46.054433 AFTER CAR 9. 99c0b000 0000a000
1852 07:41:46.057576 RAMSTAGE 10. 99baf000 0005c000
1853 07:41:46.061373 REFCODE 11. 99b7a000 00035000
1854 07:41:46.064387 SMM BACKUP 12. 99b6a000 00010000
1855 07:41:46.067797 COREBOOT 13. 99b62000 00008000
1856 07:41:46.071008 ACPI 14. 99b3e000 00024000
1857 07:41:46.074285 ACPI GNVS 15. 99b3d000 00001000
1858 07:41:46.077975 RAMOOPS 16. 99a3d000 00100000
1859 07:41:46.080846 TPM2 TCGLOG17. 99a2d000 00010000
1860 07:41:46.084646 SMBIOS 18. 99a2c000 00000800
1861 07:41:46.087601 IMD small region:
1862 07:41:46.090836 IMD ROOT 0. 99ffec00 00000400
1863 07:41:46.094323 FSP RUNTIME 1. 99ffebe0 00000004
1864 07:41:46.097602 EC HOSTEVENT 2. 99ffebc0 00000008
1865 07:41:46.101305 POWER STATE 3. 99ffeb80 00000040
1866 07:41:46.104695 ROMSTAGE 4. 99ffeb60 00000004
1867 07:41:46.107947 MEM INFO 5. 99ffe9a0 000001b9
1868 07:41:46.111370 VPD 6. 99ffe920 0000006c
1869 07:41:46.114824 MTRR: Physical address space:
1870 07:41:46.121265 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 07:41:46.127525 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 07:41:46.134400 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 07:41:46.140662 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 07:41:46.147355 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 07:41:46.150681 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 07:41:46.157323 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 07:41:46.164062 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 07:41:46.167296 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 07:41:46.170838 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 07:41:46.173944 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 07:41:46.180332 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 07:41:46.183764 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 07:41:46.187046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 07:41:46.190818 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 07:41:46.193862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 07:41:46.200561 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 07:41:46.203539 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 07:41:46.207301 call enable_fixed_mtrr()
1889 07:41:46.210492 CPU physical address size: 39 bits
1890 07:41:46.213730 MTRR: default type WB/UC MTRR counts: 6/8.
1891 07:41:46.217127 MTRR: WB selected as default type.
1892 07:41:46.223853 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 07:41:46.230405 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 07:41:46.237017 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 07:41:46.243629 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 07:41:46.249994 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 07:41:46.256745 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 07:41:46.260046 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 07:41:46.263387 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 07:41:46.270118 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 07:41:46.273483 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 07:41:46.276824 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 07:41:46.280021 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 07:41:46.286187 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 07:41:46.289537 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 07:41:46.292861 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 07:41:46.296147 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 07:41:46.303134 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 07:41:46.303252
1910 07:41:46.303357 MTRR check
1911 07:41:46.306329 Fixed MTRRs : Enabled
1912 07:41:46.309855 Variable MTRRs: Enabled
1913 07:41:46.309936
1914 07:41:46.310006 call enable_fixed_mtrr()
1915 07:41:46.316223 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 07:41:46.319816 CPU physical address size: 39 bits
1917 07:41:46.326064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 07:41:46.329375 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 07:41:46.332717 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 07:41:46.335965 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 07:41:46.342326 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 07:41:46.345741 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 07:41:46.349585 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 07:41:46.352803 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 07:41:46.359144 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 07:41:46.362404 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 07:41:46.365761 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 07:41:46.369168 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 07:41:46.372483 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 07:41:46.379109 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 07:41:46.382684 call enable_fixed_mtrr()
1932 07:41:46.382801 CBFS @ c08000 size 3f8000
1933 07:41:46.389104 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1934 07:41:46.392206 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 07:41:46.398745 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 07:41:46.402284 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 07:41:46.405461 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 07:41:46.408751 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 07:41:46.415296 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 07:41:46.418353 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 07:41:46.421670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 07:41:46.424947 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 07:41:46.432013 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 07:41:46.435579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 07:41:46.438403 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 07:41:46.441561 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 07:41:46.445294 call enable_fixed_mtrr()
1948 07:41:46.448458 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 07:41:46.455094 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 07:41:46.458315 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 07:41:46.461559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 07:41:46.464838 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 07:41:46.468209 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 07:41:46.474984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 07:41:46.478423 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 07:41:46.481728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 07:41:46.484982 CPU physical address size: 39 bits
1958 07:41:46.488209 call enable_fixed_mtrr()
1959 07:41:46.491576 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 07:41:46.498225 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 07:41:46.501457 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 07:41:46.504702 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 07:41:46.507779 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 07:41:46.514418 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 07:41:46.517773 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 07:41:46.521045 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 07:41:46.524257 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 07:41:46.531301 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 07:41:46.534742 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 07:41:46.538047 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 07:41:46.541233 call enable_fixed_mtrr()
1972 07:41:46.544337 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 07:41:46.548007 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 07:41:46.554097 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 07:41:46.557656 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 07:41:46.561046 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 07:41:46.564242 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 07:41:46.570468 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 07:41:46.574248 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 07:41:46.577568 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 07:41:46.580273 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 07:41:46.584182 CPU physical address size: 39 bits
1983 07:41:46.587605 call enable_fixed_mtrr()
1984 07:41:46.590757 CPU physical address size: 39 bits
1985 07:41:46.593995 CPU physical address size: 39 bits
1986 07:41:46.597386 CBFS: Locating 'fallback/payload'
1987 07:41:46.600549 CPU physical address size: 39 bits
1988 07:41:46.607118 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 07:41:46.610369 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 07:41:46.613583 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 07:41:46.617271 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 07:41:46.623997 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 07:41:46.627248 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 07:41:46.630551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 07:41:46.633733 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 07:41:46.640419 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 07:41:46.643757 CBFS: Found @ offset 1c96c0 size 3f798
1998 07:41:46.647100 call enable_fixed_mtrr()
1999 07:41:46.650531 Checking segment from ROM address 0xffdd16f8
2000 07:41:46.653765 CPU physical address size: 39 bits
2001 07:41:46.657116 Checking segment from ROM address 0xffdd1714
2002 07:41:46.663586 Loading segment from ROM address 0xffdd16f8
2003 07:41:46.663679 code (compression=0)
2004 07:41:46.673184 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 07:41:46.683594 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 07:41:46.683716 it's not compressed!
2007 07:41:46.776137 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 07:41:46.782616 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 07:41:46.785611 Loading segment from ROM address 0xffdd1714
2010 07:41:46.789351 Entry Point 0x30000000
2011 07:41:46.792471 Loaded segments
2012 07:41:46.798019 Finalizing chipset.
2013 07:41:46.801524 Finalizing SMM.
2014 07:41:46.804575 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 07:41:46.808286 mp_park_aps done after 0 msecs.
2016 07:41:46.814793 Jumping to boot code at 30000000(99b62000)
2017 07:41:46.821618 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 07:41:46.821703
2019 07:41:46.821775
2020 07:41:46.821842
2021 07:41:46.824942 Starting depthcharge on Helios...
2022 07:41:46.825020
2023 07:41:46.825388 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 07:41:46.825501 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 07:41:46.825598 Setting prompt string to ['hatch:']
2026 07:41:46.825692 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 07:41:46.834478 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 07:41:46.834595
2029 07:41:46.841121 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 07:41:46.841209
2031 07:41:46.847606 board_setup: Info: eMMC controller not present; skipping
2032 07:41:46.847691
2033 07:41:46.851255 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 07:41:46.851368
2035 07:41:46.858216 board_setup: Info: SDHCI controller not present; skipping
2036 07:41:46.858307
2037 07:41:46.861585 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 07:41:46.861670
2039 07:41:46.864823 Wipe memory regions:
2040 07:41:46.864906
2041 07:41:46.868100 [0x00000000001000, 0x000000000a0000)
2042 07:41:46.868177
2043 07:41:46.871212 [0x00000000100000, 0x00000030000000)
2044 07:41:46.937112
2045 07:41:46.940842 [0x00000030657430, 0x00000099a2c000)
2046 07:41:47.087129
2047 07:41:47.090481 [0x00000100000000, 0x0000045e800000)
2048 07:41:48.546679
2049 07:41:48.546842 R8152: Initializing
2050 07:41:48.546925
2051 07:41:48.549779 Version 9 (ocp_data = 6010)
2052 07:41:48.554429
2053 07:41:48.554544 R8152: Done initializing
2054 07:41:48.554648
2055 07:41:48.557578 Adding net device
2056 07:41:49.040050
2057 07:41:49.040230 R8152: Initializing
2058 07:41:49.040323
2059 07:41:49.043329 Version 6 (ocp_data = 5c30)
2060 07:41:49.043410
2061 07:41:49.046745 R8152: Done initializing
2062 07:41:49.046824
2063 07:41:49.050122 net_add_device: Attemp to include the same device
2064 07:41:49.053467
2065 07:41:49.060716 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 07:41:49.060807
2067 07:41:49.060908
2068 07:41:49.060993
2069 07:41:49.061322 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 07:41:49.161754 hatch: tftpboot 192.168.201.1 12435148/tftp-deploy-rd6422hy/kernel/bzImage 12435148/tftp-deploy-rd6422hy/kernel/cmdline 12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
2072 07:41:49.161969 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 07:41:49.162098 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 07:41:49.166451 tftpboot 192.168.201.1 12435148/tftp-deploy-rd6422hy/kernel/bzIploy-rd6422hy/kernel/cmdline 12435148/tftp-deploy-rd6422hy/ramdisk/ramdisk.cpio.gz
2075 07:41:49.166575
2076 07:41:49.166695 Waiting for link
2077 07:41:49.367092
2078 07:41:49.367280 done.
2079 07:41:49.367394
2080 07:41:49.367498 MAC: 00:24:32:50:1a:59
2081 07:41:49.367600
2082 07:41:49.370334 Sending DHCP discover... done.
2083 07:41:49.370449
2084 07:41:49.373541 Waiting for reply... done.
2085 07:41:49.373657
2086 07:41:49.376923 Sending DHCP request... done.
2087 07:41:49.377043
2088 07:41:49.380221 Waiting for reply... done.
2089 07:41:49.380316
2090 07:41:49.383514 My ip is 192.168.201.14
2091 07:41:49.383594
2092 07:41:49.386828 The DHCP server ip is 192.168.201.1
2093 07:41:49.386939
2094 07:41:49.390196 TFTP server IP predefined by user: 192.168.201.1
2095 07:41:49.390307
2096 07:41:49.400031 Bootfile predefined by user: 12435148/tftp-deploy-rd6422hy/kernel/bzImage
2097 07:41:49.400148
2098 07:41:49.403133 Sending tftp read request... done.
2099 07:41:49.403247
2100 07:41:49.407554 Waiting for the transfer...
2101 07:41:49.407674
2102 07:41:49.938938 00000000 ################################################################
2103 07:41:49.939125
2104 07:41:50.452532 00080000 ################################################################
2105 07:41:50.452711
2106 07:41:50.971513 00100000 ################################################################
2107 07:41:50.971699
2108 07:41:51.502903 00180000 ################################################################
2109 07:41:51.503093
2110 07:41:52.039455 00200000 ################################################################
2111 07:41:52.039627
2112 07:41:52.551823 00280000 ################################################################
2113 07:41:52.551982
2114 07:41:53.065192 00300000 ################################################################
2115 07:41:53.065365
2116 07:41:53.576028 00380000 ################################################################
2117 07:41:53.576190
2118 07:41:54.084962 00400000 ################################################################
2119 07:41:54.085122
2120 07:41:54.595509 00480000 ################################################################
2121 07:41:54.595670
2122 07:41:55.110719 00500000 ################################################################
2123 07:41:55.110883
2124 07:41:55.647242 00580000 ################################################################
2125 07:41:55.647408
2126 07:41:56.198913 00600000 ################################################################
2127 07:41:56.199073
2128 07:41:56.746577 00680000 ################################################################
2129 07:41:56.746740
2130 07:41:57.311307 00700000 ################################################################
2131 07:41:57.311460
2132 07:41:57.850777 00780000 ################################################################
2133 07:41:57.850932
2134 07:41:58.042536 00800000 ####################### done.
2135 07:41:58.042701
2136 07:41:58.046344 The bootfile was 8572816 bytes long.
2137 07:41:58.046442
2138 07:41:58.049585 Sending tftp read request... done.
2139 07:41:58.049682
2140 07:41:58.052814 Waiting for the transfer...
2141 07:41:58.052910
2142 07:41:58.590791 00000000 ################################################################
2143 07:41:58.590972
2144 07:41:59.108124 00080000 ################################################################
2145 07:41:59.108300
2146 07:41:59.640443 00100000 ################################################################
2147 07:41:59.640609
2148 07:42:00.187413 00180000 ################################################################
2149 07:42:00.187575
2150 07:42:00.750082 00200000 ################################################################
2151 07:42:00.750243
2152 07:42:01.296049 00280000 ################################################################
2153 07:42:01.296250
2154 07:42:01.844091 00300000 ################################################################
2155 07:42:01.844291
2156 07:42:02.396485 00380000 ################################################################
2157 07:42:02.396646
2158 07:42:02.933223 00400000 ################################################################
2159 07:42:02.933385
2160 07:42:03.487503 00480000 ################################################################
2161 07:42:03.487691
2162 07:42:04.040955 00500000 ############################################################### done.
2163 07:42:04.041114
2164 07:42:04.044119 Sending tftp read request... done.
2165 07:42:04.044241
2166 07:42:04.047538 Waiting for the transfer...
2167 07:42:04.047633
2168 07:42:04.047707 00000000 # done.
2169 07:42:04.047779
2170 07:42:04.057441 Command line loaded dynamically from TFTP file: 12435148/tftp-deploy-rd6422hy/kernel/cmdline
2171 07:42:04.057537
2172 07:42:04.086936 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435148/extract-nfsrootfs-kyc8j9s8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 07:42:04.087043
2174 07:42:04.090387 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 07:42:04.096268
2176 07:42:04.099954 Shutting down all USB controllers.
2177 07:42:04.100056
2178 07:42:04.100135 Removing current net device
2179 07:42:04.103656
2180 07:42:04.103766 Finalizing coreboot
2181 07:42:04.103855
2182 07:42:04.110375 Exiting depthcharge with code 4 at timestamp: 24608030
2183 07:42:04.110496
2184 07:42:04.110590
2185 07:42:04.110678 Starting kernel ...
2186 07:42:04.110763
2187 07:42:04.110846
2188 07:42:04.111288 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2189 07:42:04.111424 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2190 07:42:04.111547 Setting prompt string to ['Linux version [0-9]']
2191 07:42:04.111654 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 07:42:04.111760 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 07:46:29.111704 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2196 07:46:29.112034 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2198 07:46:29.112303 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 07:46:29.112612 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 07:46:29.112875 Cleaning after the job
2204 07:46:29.112977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/ramdisk
2205 07:46:29.114035 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/kernel
2206 07:46:29.115456 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/nfsrootfs
2207 07:46:29.208946 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435148/tftp-deploy-rd6422hy/modules
2208 07:46:29.209499 start: 4.1 power-off (timeout 00:00:30) [common]
2209 07:46:29.209822 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 07:46:29.291503 >> Command sent successfully.
2211 07:46:29.294539 Returned 0 in 0 seconds
2212 07:46:29.395328 end: 4.1 power-off (duration 00:00:00) [common]
2214 07:46:29.397029 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 07:46:29.398355 Listened to connection for namespace 'common' for up to 1s
2217 07:46:29.399985 Listened to connection for namespace 'common' for up to 1s
2218 07:46:30.398933 Finalising connection for namespace 'common'
2219 07:46:30.399602 Disconnecting from shell: Finalise
2220 07:46:30.400005