Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 07:40:42.690097 lava-dispatcher, installed at version: 2023.10
2 07:40:42.690310 start: 0 validate
3 07:40:42.690440 Start time: 2024-01-03 07:40:42.690432+00:00 (UTC)
4 07:40:42.690560 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:40:42.690690 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 07:40:42.959889 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:40:42.960676 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:40:43.230956 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:40:43.231538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:40:46.231882 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:40:46.232637 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1224-ga0ac575eeff8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 07:40:46.509607 validate duration: 3.82
14 07:40:46.510962 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:40:46.511504 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:40:46.512025 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:40:46.512716 Not decompressing ramdisk as can be used compressed.
18 07:40:46.513176 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 07:40:46.513534 saving as /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/ramdisk/initrd.cpio.gz
20 07:40:46.513933 total size: 5671549 (5 MB)
21 07:40:47.038006 progress 0 % (0 MB)
22 07:40:47.046556 progress 5 % (0 MB)
23 07:40:47.054798 progress 10 % (0 MB)
24 07:40:47.062170 progress 15 % (0 MB)
25 07:40:47.069952 progress 20 % (1 MB)
26 07:40:47.075189 progress 25 % (1 MB)
27 07:40:47.079002 progress 30 % (1 MB)
28 07:40:47.082495 progress 35 % (1 MB)
29 07:40:47.085519 progress 40 % (2 MB)
30 07:40:47.088123 progress 45 % (2 MB)
31 07:40:47.090638 progress 50 % (2 MB)
32 07:40:47.093110 progress 55 % (3 MB)
33 07:40:47.095071 progress 60 % (3 MB)
34 07:40:47.097235 progress 65 % (3 MB)
35 07:40:47.099304 progress 70 % (3 MB)
36 07:40:47.101043 progress 75 % (4 MB)
37 07:40:47.102968 progress 80 % (4 MB)
38 07:40:47.104795 progress 85 % (4 MB)
39 07:40:47.106390 progress 90 % (4 MB)
40 07:40:47.108158 progress 95 % (5 MB)
41 07:40:47.109795 progress 100 % (5 MB)
42 07:40:47.109907 5 MB downloaded in 0.60 s (9.08 MB/s)
43 07:40:47.110069 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:40:47.110312 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:40:47.110406 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:40:47.110494 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:40:47.110635 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 07:40:47.110713 saving as /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/kernel/bzImage
50 07:40:47.110776 total size: 8572816 (8 MB)
51 07:40:47.110837 No compression specified
52 07:40:47.111984 progress 0 % (0 MB)
53 07:40:47.114389 progress 5 % (0 MB)
54 07:40:47.116727 progress 10 % (0 MB)
55 07:40:47.118999 progress 15 % (1 MB)
56 07:40:47.121347 progress 20 % (1 MB)
57 07:40:47.123637 progress 25 % (2 MB)
58 07:40:47.125990 progress 30 % (2 MB)
59 07:40:47.128422 progress 35 % (2 MB)
60 07:40:47.130693 progress 40 % (3 MB)
61 07:40:47.132995 progress 45 % (3 MB)
62 07:40:47.135272 progress 50 % (4 MB)
63 07:40:47.137581 progress 55 % (4 MB)
64 07:40:47.139827 progress 60 % (4 MB)
65 07:40:47.142259 progress 65 % (5 MB)
66 07:40:47.144557 progress 70 % (5 MB)
67 07:40:47.146777 progress 75 % (6 MB)
68 07:40:47.149068 progress 80 % (6 MB)
69 07:40:47.151288 progress 85 % (6 MB)
70 07:40:47.153581 progress 90 % (7 MB)
71 07:40:47.155794 progress 95 % (7 MB)
72 07:40:47.158071 progress 100 % (8 MB)
73 07:40:47.158262 8 MB downloaded in 0.05 s (172.18 MB/s)
74 07:40:47.158410 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:40:47.158650 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:40:47.158740 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:40:47.158826 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:40:47.158968 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 07:40:47.159036 saving as /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/nfsrootfs/full.rootfs.tar
81 07:40:47.159105 total size: 126031368 (120 MB)
82 07:40:47.159169 Using unxz to decompress xz
83 07:40:47.163397 progress 0 % (0 MB)
84 07:40:47.662156 progress 5 % (6 MB)
85 07:40:48.167340 progress 10 % (12 MB)
86 07:40:48.673855 progress 15 % (18 MB)
87 07:40:49.194407 progress 20 % (24 MB)
88 07:40:49.540692 progress 25 % (30 MB)
89 07:40:49.887977 progress 30 % (36 MB)
90 07:40:50.156172 progress 35 % (42 MB)
91 07:40:50.339274 progress 40 % (48 MB)
92 07:40:50.710182 progress 45 % (54 MB)
93 07:40:51.090185 progress 50 % (60 MB)
94 07:40:51.433750 progress 55 % (66 MB)
95 07:40:51.794162 progress 60 % (72 MB)
96 07:40:52.138689 progress 65 % (78 MB)
97 07:40:52.529240 progress 70 % (84 MB)
98 07:40:52.948732 progress 75 % (90 MB)
99 07:40:53.375894 progress 80 % (96 MB)
100 07:40:53.477563 progress 85 % (102 MB)
101 07:40:53.632562 progress 90 % (108 MB)
102 07:40:53.969886 progress 95 % (114 MB)
103 07:40:54.343966 progress 100 % (120 MB)
104 07:40:54.349538 120 MB downloaded in 7.19 s (16.72 MB/s)
105 07:40:54.349805 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:40:54.350089 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:40:54.350197 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:40:54.350328 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:40:54.350526 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1224-ga0ac575eeff8/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 07:40:54.350629 saving as /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/modules/modules.tar
112 07:40:54.350730 total size: 251144 (0 MB)
113 07:40:54.350835 Using unxz to decompress xz
114 07:40:54.354716 progress 13 % (0 MB)
115 07:40:54.355125 progress 26 % (0 MB)
116 07:40:54.355367 progress 39 % (0 MB)
117 07:40:54.356820 progress 52 % (0 MB)
118 07:40:54.358772 progress 65 % (0 MB)
119 07:40:54.360735 progress 78 % (0 MB)
120 07:40:54.362539 progress 91 % (0 MB)
121 07:40:54.364562 progress 100 % (0 MB)
122 07:40:54.370156 0 MB downloaded in 0.02 s (12.33 MB/s)
123 07:40:54.370398 end: 1.4.1 http-download (duration 00:00:00) [common]
125 07:40:54.370690 end: 1.4 download-retry (duration 00:00:00) [common]
126 07:40:54.370807 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 07:40:54.370934 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 07:40:57.403434 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12435181/extract-nfsrootfs-jc7b9xhg
129 07:40:57.403655 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 07:40:57.403777 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 07:40:57.403963 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149
132 07:40:57.404292 makedir: /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin
133 07:40:57.404416 makedir: /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/tests
134 07:40:57.404536 makedir: /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/results
135 07:40:57.404680 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-add-keys
136 07:40:57.404873 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-add-sources
137 07:40:57.405044 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-background-process-start
138 07:40:57.405200 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-background-process-stop
139 07:40:57.405373 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-common-functions
140 07:40:57.405519 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-echo-ipv4
141 07:40:57.405667 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-install-packages
142 07:40:57.405816 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-installed-packages
143 07:40:57.405987 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-os-build
144 07:40:57.406136 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-probe-channel
145 07:40:57.406285 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-probe-ip
146 07:40:57.406457 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-target-ip
147 07:40:57.406606 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-target-mac
148 07:40:57.406778 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-target-storage
149 07:40:57.406925 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-case
150 07:40:57.407071 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-event
151 07:40:57.407217 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-feedback
152 07:40:57.407386 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-raise
153 07:40:57.407532 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-reference
154 07:40:57.407685 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-runner
155 07:40:57.407856 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-set
156 07:40:57.408005 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-test-shell
157 07:40:57.408214 Updating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-install-packages (oe)
158 07:40:57.454506 Updating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/bin/lava-installed-packages (oe)
159 07:40:57.454777 Creating /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/environment
160 07:40:57.454921 LAVA metadata
161 07:40:57.455019 - LAVA_JOB_ID=12435181
162 07:40:57.455113 - LAVA_DISPATCHER_IP=192.168.201.1
163 07:40:57.455280 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 07:40:57.455368 skipped lava-vland-overlay
165 07:40:57.455491 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 07:40:57.455634 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 07:40:57.455744 skipped lava-multinode-overlay
168 07:40:57.455880 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 07:40:57.456020 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 07:40:57.456148 Loading test definitions
171 07:40:57.456279 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
172 07:40:57.456377 Using /lava-12435181 at stage 0
173 07:40:57.456527 Fetching tests from https://github.com/kernelci/test-definitions
174 07:40:57.456658 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/0/tests/0_ltp-ipc'
175 07:41:00.854193 Running '/usr/bin/git checkout kernelci.org
176 07:41:00.999276 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 07:41:01.000116 uuid=12435181_1.5.2.3.1 testdef=None
178 07:41:01.000290 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 07:41:01.000530 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
181 07:41:01.001324 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 07:41:01.001558 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
184 07:41:01.002610 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 07:41:01.002848 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
187 07:41:01.003867 runner path: /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/0/tests/0_ltp-ipc test_uuid 12435181_1.5.2.3.1
188 07:41:01.003953 SKIPFILE='skipfile-lkft.yaml'
189 07:41:01.004017 SKIP_INSTALL='true'
190 07:41:01.004104 TST_CMDFILES='ipc'
191 07:41:01.004262 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 07:41:01.004468 Creating lava-test-runner.conf files
194 07:41:01.004532 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12435181/lava-overlay-40jew149/lava-12435181/0 for stage 0
195 07:41:01.004624 - 0_ltp-ipc
196 07:41:01.004730 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
197 07:41:01.004816 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
198 07:41:08.792512 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 07:41:08.792684 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
200 07:41:08.792775 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 07:41:08.792879 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
202 07:41:08.792968 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
203 07:41:08.936526 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 07:41:08.936921 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
205 07:41:08.937041 extracting modules file /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435181/extract-nfsrootfs-jc7b9xhg
206 07:41:08.950554 extracting modules file /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12435181/extract-overlay-ramdisk-w44ij7_a/ramdisk
207 07:41:08.963920 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 07:41:08.964034 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
209 07:41:08.964179 [common] Applying overlay to NFS
210 07:41:08.964249 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12435181/compress-overlay-vzr_bavr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12435181/extract-nfsrootfs-jc7b9xhg
211 07:41:09.888529 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 07:41:09.888701 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
213 07:41:09.888798 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 07:41:09.888889 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
215 07:41:09.888970 Building ramdisk /var/lib/lava/dispatcher/tmp/12435181/extract-overlay-ramdisk-w44ij7_a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12435181/extract-overlay-ramdisk-w44ij7_a/ramdisk
216 07:41:09.962441 >> 27180 blocks
217 07:41:10.528844 rename /var/lib/lava/dispatcher/tmp/12435181/extract-overlay-ramdisk-w44ij7_a/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
218 07:41:10.529291 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 07:41:10.529412 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
220 07:41:10.529521 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
221 07:41:10.529614 No mkimage arch provided, not using FIT.
222 07:41:10.529702 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 07:41:10.529783 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 07:41:10.529881 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
225 07:41:10.529975 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
226 07:41:10.530060 No LXC device requested
227 07:41:10.530140 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 07:41:10.530231 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
229 07:41:10.530313 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 07:41:10.530388 Checking files for TFTP limit of 4294967296 bytes.
231 07:41:10.530794 end: 1 tftp-deploy (duration 00:00:24) [common]
232 07:41:10.530900 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 07:41:10.530989 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 07:41:10.531115 substitutions:
235 07:41:10.531182 - {DTB}: None
236 07:41:10.531243 - {INITRD}: 12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
237 07:41:10.531303 - {KERNEL}: 12435181/tftp-deploy-7mvsnkdj/kernel/bzImage
238 07:41:10.531359 - {LAVA_MAC}: None
239 07:41:10.531414 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12435181/extract-nfsrootfs-jc7b9xhg
240 07:41:10.531471 - {NFS_SERVER_IP}: 192.168.201.1
241 07:41:10.531526 - {PRESEED_CONFIG}: None
242 07:41:10.531580 - {PRESEED_LOCAL}: None
243 07:41:10.531633 - {RAMDISK}: 12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
244 07:41:10.531687 - {ROOT_PART}: None
245 07:41:10.531740 - {ROOT}: None
246 07:41:10.531794 - {SERVER_IP}: 192.168.201.1
247 07:41:10.531847 - {TEE}: None
248 07:41:10.531901 Parsed boot commands:
249 07:41:10.531954 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 07:41:10.532176 Parsed boot commands: tftpboot 192.168.201.1 12435181/tftp-deploy-7mvsnkdj/kernel/bzImage 12435181/tftp-deploy-7mvsnkdj/kernel/cmdline 12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
251 07:41:10.532270 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 07:41:10.532358 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 07:41:10.532449 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 07:41:10.532532 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 07:41:10.532603 Not connected, no need to disconnect.
256 07:41:10.532677 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 07:41:10.532757 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 07:41:10.532820 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
259 07:41:10.536897 Setting prompt string to ['lava-test: # ']
260 07:41:10.537252 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 07:41:10.537358 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 07:41:10.537455 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 07:41:10.537544 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 07:41:10.537809 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
265 07:41:15.689289 >> Command sent successfully.
266 07:41:15.699889 Returned 0 in 5 seconds
267 07:41:15.801171 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 07:41:15.802551 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 07:41:15.803087 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 07:41:15.803538 Setting prompt string to 'Starting depthcharge on Voema...'
272 07:41:15.803886 Changing prompt to 'Starting depthcharge on Voema...'
273 07:41:15.804281 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 07:41:15.805574 [Enter `^Ec?' for help]
275 07:41:17.454651
276 07:41:17.455258
277 07:41:17.464872 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 07:41:17.471394 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
279 07:41:17.474926 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 07:41:17.477919 CPU: AES supported, TXT NOT supported, VT supported
281 07:41:17.484356 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 07:41:17.491485 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 07:41:17.494910 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 07:41:17.497903 VBOOT: Loading verstage.
285 07:41:17.501890 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 07:41:17.508946 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 07:41:17.512083 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 07:41:17.518820 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 07:41:17.528894 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 07:41:17.529338
291 07:41:17.529675
292 07:41:17.539004 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 07:41:17.555125 Probing TPM: . done!
294 07:41:17.558516 TPM ready after 0 ms
295 07:41:17.561903 Connected to device vid:did:rid of 1ae0:0028:00
296 07:41:17.573415 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
297 07:41:17.579877 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 07:41:17.582887 Initialized TPM device CR50 revision 0
299 07:41:17.635199 tlcl_send_startup: Startup return code is 0
300 07:41:17.635783 TPM: setup succeeded
301 07:41:17.650662 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 07:41:17.664026 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 07:41:17.676751 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 07:41:17.686786 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 07:41:17.690286 Chrome EC: UHEPI supported
306 07:41:17.694015 Phase 1
307 07:41:17.696812 FMAP: area GBB found @ 1805000 (458752 bytes)
308 07:41:17.707012 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 07:41:17.713360 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 07:41:17.720305 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 07:41:17.726669 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 07:41:17.730254 Recovery requested (1009000e)
313 07:41:17.733227 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 07:41:17.745562 tlcl_extend: response is 0
315 07:41:17.751651 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 07:41:17.761899 tlcl_extend: response is 0
317 07:41:17.768173 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 07:41:17.774925 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 07:41:17.781689 BS: verstage times (exec / console): total (unknown) / 142 ms
320 07:41:17.782133
321 07:41:17.782582
322 07:41:17.795159 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 07:41:17.801162 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 07:41:17.804571 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 07:41:17.808096 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 07:41:17.814879 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 07:41:17.817953 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 07:41:17.821172 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
329 07:41:17.824357 TCO_STS: 0000 0000
330 07:41:17.827991 GEN_PMCON: d0015038 00002200
331 07:41:17.831129 GBLRST_CAUSE: 00000000 00000000
332 07:41:17.834551 HPR_CAUSE0: 00000000
333 07:41:17.834977 prev_sleep_state 5
334 07:41:17.837807 Boot Count incremented to 23680
335 07:41:17.844463 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 07:41:17.851062 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 07:41:17.860734 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 07:41:17.867544 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 07:41:17.870991 Chrome EC: UHEPI supported
340 07:41:17.881977 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 07:41:17.894687 Probing TPM: done!
342 07:41:17.901165 Connected to device vid:did:rid of 1ae0:0028:00
343 07:41:17.911116 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
344 07:41:17.914205 Initialized TPM device CR50 revision 0
345 07:41:17.929309 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 07:41:17.936163 MRC: Hash idx 0x100b comparison successful.
347 07:41:17.939439 MRC cache found, size faa8
348 07:41:17.939862 bootmode is set to: 2
349 07:41:17.943017 SPD index = 2
350 07:41:17.949246 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 07:41:17.952386 SPD: module type is LPDDR4X
352 07:41:17.955858 SPD: module part number is MT53D1G64D4NW-046
353 07:41:17.962625 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
354 07:41:17.965540 SPD: device width 16 bits, bus width 16 bits
355 07:41:17.972297 SPD: module size is 2048 MB (per channel)
356 07:41:18.402992 CBMEM:
357 07:41:18.406035 IMD: root @ 0x76fff000 254 entries.
358 07:41:18.409268 IMD: root @ 0x76ffec00 62 entries.
359 07:41:18.412458 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 07:41:18.418952 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 07:41:18.422707 External stage cache:
362 07:41:18.425826 IMD: root @ 0x7b3ff000 254 entries.
363 07:41:18.428939 IMD: root @ 0x7b3fec00 62 entries.
364 07:41:18.443903 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 07:41:18.451847 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 07:41:18.458850 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 07:41:18.471076 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 07:41:18.478403 cse_lite: Skip switching to RW in the recovery path
369 07:41:18.478956 8 DIMMs found
370 07:41:18.481467 SMM Memory Map
371 07:41:18.483891 SMRAM : 0x7b000000 0x800000
372 07:41:18.487306 Subregion 0: 0x7b000000 0x200000
373 07:41:18.491086 Subregion 1: 0x7b200000 0x200000
374 07:41:18.494133 Subregion 2: 0x7b400000 0x400000
375 07:41:18.494592 top_of_ram = 0x77000000
376 07:41:18.500953 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 07:41:18.507698 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 07:41:18.510589 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 07:41:18.517092 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 07:41:18.524035 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 07:41:18.530760 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 07:41:18.540933 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 07:41:18.547208 Processing 211 relocs. Offset value of 0x74c0b000
384 07:41:18.554430 BS: romstage times (exec / console): total (unknown) / 277 ms
385 07:41:18.560143
386 07:41:18.560714
387 07:41:18.569533 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 07:41:18.572661 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 07:41:18.582823 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 07:41:18.589440 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 07:41:18.595882 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 07:41:18.602365 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 07:41:18.646814 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 07:41:18.652915 Processing 5008 relocs. Offset value of 0x75d98000
395 07:41:18.656367 BS: postcar times (exec / console): total (unknown) / 59 ms
396 07:41:18.659954
397 07:41:18.660581
398 07:41:18.670079 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 07:41:18.670671 Normal boot
400 07:41:18.673224 FW_CONFIG value is 0x804c02
401 07:41:18.676772 PCI: 00:07.0 disabled by fw_config
402 07:41:18.679699 PCI: 00:07.1 disabled by fw_config
403 07:41:18.683458 PCI: 00:0d.2 disabled by fw_config
404 07:41:18.686631 PCI: 00:1c.7 disabled by fw_config
405 07:41:18.693010 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 07:41:18.699735 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 07:41:18.703236 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 07:41:18.706511 GENERIC: 0.0 disabled by fw_config
409 07:41:18.712689 GENERIC: 1.0 disabled by fw_config
410 07:41:18.716401 fw_config match found: DB_USB=USB3_ACTIVE
411 07:41:18.719647 fw_config match found: DB_USB=USB3_ACTIVE
412 07:41:18.722838 fw_config match found: DB_USB=USB3_ACTIVE
413 07:41:18.729309 fw_config match found: DB_USB=USB3_ACTIVE
414 07:41:18.733051 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 07:41:18.739442 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 07:41:18.749278 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 07:41:18.756324 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 07:41:18.759142 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 07:41:18.765725 microcode: Update skipped, already up-to-date
420 07:41:18.772364 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 07:41:18.799946 Detected 4 core, 8 thread CPU.
422 07:41:18.803097 Setting up SMI for CPU
423 07:41:18.806788 IED base = 0x7b400000
424 07:41:18.809645 IED size = 0x00400000
425 07:41:18.810067 Will perform SMM setup.
426 07:41:18.816483 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
427 07:41:18.823271 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 07:41:18.829518 Processing 16 relocs. Offset value of 0x00030000
429 07:41:18.832831 Attempting to start 7 APs
430 07:41:18.835973 Waiting for 10ms after sending INIT.
431 07:41:18.851879 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
432 07:41:18.852359 done.
433 07:41:18.855636 AP: slot 1 apic_id 3.
434 07:41:18.858749 AP: slot 7 apic_id 2.
435 07:41:18.859173 AP: slot 6 apic_id 5.
436 07:41:18.861704 AP: slot 5 apic_id 6.
437 07:41:18.865101 AP: slot 4 apic_id 7.
438 07:41:18.868437 Waiting for 2nd SIPI to complete...done.
439 07:41:18.871865 AP: slot 3 apic_id 4.
440 07:41:18.878357 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 07:41:18.885104 Processing 13 relocs. Offset value of 0x00038000
442 07:41:18.888126 Unable to locate Global NVS
443 07:41:18.895358 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 07:41:18.898704 Installing permanent SMM handler to 0x7b000000
445 07:41:18.907903 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 07:41:18.911370 Processing 794 relocs. Offset value of 0x7b010000
447 07:41:18.921280 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 07:41:18.924681 Processing 13 relocs. Offset value of 0x7b008000
449 07:41:18.931336 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 07:41:18.938077 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 07:41:18.944780 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 07:41:18.947759 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 07:41:18.954735 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 07:41:18.961001 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 07:41:18.967524 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 07:41:18.970902 Unable to locate Global NVS
457 07:41:18.977694 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 07:41:18.980872 Clearing SMI status registers
459 07:41:18.984162 SMI_STS: PM1
460 07:41:18.984591 PM1_STS: PWRBTN
461 07:41:18.990787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 07:41:18.994373 In relocation handler: CPU 0
463 07:41:18.997163 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 07:41:19.003745 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 07:41:19.007029 Relocation complete.
466 07:41:19.013639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
467 07:41:19.017067 In relocation handler: CPU 2
468 07:41:19.020177 New SMBASE=0x7afff800 IEDBASE=0x7b400000
469 07:41:19.023364 Relocation complete.
470 07:41:19.030392 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
471 07:41:19.033309 In relocation handler: CPU 7
472 07:41:19.036742 New SMBASE=0x7affe400 IEDBASE=0x7b400000
473 07:41:19.039963 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 07:41:19.043306 Relocation complete.
475 07:41:19.049663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
476 07:41:19.053053 In relocation handler: CPU 1
477 07:41:19.056330 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
478 07:41:19.059740 Relocation complete.
479 07:41:19.066625 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
480 07:41:19.068988 In relocation handler: CPU 6
481 07:41:19.072770 New SMBASE=0x7affe800 IEDBASE=0x7b400000
482 07:41:19.075551 Relocation complete.
483 07:41:19.082496 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
484 07:41:19.085726 In relocation handler: CPU 3
485 07:41:19.088966 New SMBASE=0x7afff400 IEDBASE=0x7b400000
486 07:41:19.095657 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 07:41:19.098814 Relocation complete.
488 07:41:19.105556 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
489 07:41:19.108943 In relocation handler: CPU 5
490 07:41:19.112378 New SMBASE=0x7affec00 IEDBASE=0x7b400000
491 07:41:19.116214 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 07:41:19.119609 Relocation complete.
493 07:41:19.126431 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
494 07:41:19.129777 In relocation handler: CPU 4
495 07:41:19.133003 New SMBASE=0x7afff000 IEDBASE=0x7b400000
496 07:41:19.135985 Relocation complete.
497 07:41:19.136129 Initializing CPU #0
498 07:41:19.139343 CPU: vendor Intel device 806c1
499 07:41:19.145920 CPU: family 06, model 8c, stepping 01
500 07:41:19.146004 Clearing out pending MCEs
501 07:41:19.149418 Setting up local APIC...
502 07:41:19.152803 apic_id: 0x00 done.
503 07:41:19.156084 Turbo is available but hidden
504 07:41:19.159567 Turbo is available and visible
505 07:41:19.162367 microcode: Update skipped, already up-to-date
506 07:41:19.166139 CPU #0 initialized
507 07:41:19.166245 Initializing CPU #2
508 07:41:19.169470 Initializing CPU #3
509 07:41:19.172560 Initializing CPU #6
510 07:41:19.175771 CPU: vendor Intel device 806c1
511 07:41:19.179019 CPU: family 06, model 8c, stepping 01
512 07:41:19.179101 Initializing CPU #5
513 07:41:19.182556 Initializing CPU #4
514 07:41:19.185470 CPU: vendor Intel device 806c1
515 07:41:19.188813 CPU: family 06, model 8c, stepping 01
516 07:41:19.192602 CPU: vendor Intel device 806c1
517 07:41:19.195578 CPU: family 06, model 8c, stepping 01
518 07:41:19.198787 Clearing out pending MCEs
519 07:41:19.202654 Clearing out pending MCEs
520 07:41:19.205811 CPU: vendor Intel device 806c1
521 07:41:19.209063 CPU: family 06, model 8c, stepping 01
522 07:41:19.211920 Clearing out pending MCEs
523 07:41:19.212028 Clearing out pending MCEs
524 07:41:19.215294 Setting up local APIC...
525 07:41:19.218599 Initializing CPU #7
526 07:41:19.218747 Initializing CPU #1
527 07:41:19.221798 CPU: vendor Intel device 806c1
528 07:41:19.225176 CPU: family 06, model 8c, stepping 01
529 07:41:19.228584 CPU: vendor Intel device 806c1
530 07:41:19.235304 CPU: family 06, model 8c, stepping 01
531 07:41:19.235388 Clearing out pending MCEs
532 07:41:19.238727 Clearing out pending MCEs
533 07:41:19.242122 Setting up local APIC...
534 07:41:19.245379 Setting up local APIC...
535 07:41:19.245461 Setting up local APIC...
536 07:41:19.248455 Setting up local APIC...
537 07:41:19.251992 apic_id: 0x03 done.
538 07:41:19.255182 apic_id: 0x02 done.
539 07:41:19.258574 microcode: Update skipped, already up-to-date
540 07:41:19.262059 microcode: Update skipped, already up-to-date
541 07:41:19.264853 CPU #1 initialized
542 07:41:19.264939 CPU #7 initialized
543 07:41:19.268310 Setting up local APIC...
544 07:41:19.271522 CPU: vendor Intel device 806c1
545 07:41:19.274768 CPU: family 06, model 8c, stepping 01
546 07:41:19.278112 apic_id: 0x06 done.
547 07:41:19.281463 apic_id: 0x07 done.
548 07:41:19.284739 microcode: Update skipped, already up-to-date
549 07:41:19.288248 microcode: Update skipped, already up-to-date
550 07:41:19.291603 CPU #5 initialized
551 07:41:19.294684 CPU #4 initialized
552 07:41:19.294766 Clearing out pending MCEs
553 07:41:19.297857 apic_id: 0x04 done.
554 07:41:19.301291 apic_id: 0x05 done.
555 07:41:19.304536 microcode: Update skipped, already up-to-date
556 07:41:19.311208 microcode: Update skipped, already up-to-date
557 07:41:19.311291 CPU #3 initialized
558 07:41:19.314509 CPU #6 initialized
559 07:41:19.314591 Setting up local APIC...
560 07:41:19.317891 apic_id: 0x01 done.
561 07:41:19.324548 microcode: Update skipped, already up-to-date
562 07:41:19.324630 CPU #2 initialized
563 07:41:19.327700 bsp_do_flight_plan done after 456 msecs.
564 07:41:19.331049 CPU: frequency set to 4400 MHz
565 07:41:19.334406 Enabling SMIs.
566 07:41:19.340649 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 07:41:19.356265 SATAXPCIE1 indicates PCIe NVMe is present
568 07:41:19.359483 Probing TPM: done!
569 07:41:19.363117 Connected to device vid:did:rid of 1ae0:0028:00
570 07:41:19.373961 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
571 07:41:19.377263 Initialized TPM device CR50 revision 0
572 07:41:19.380424 Enabling S0i3.4
573 07:41:19.387183 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 07:41:19.390353 Found a VBT of 8704 bytes after decompression
575 07:41:19.396710 cse_lite: CSE RO boot. HybridStorageMode disabled
576 07:41:19.403348 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 07:41:19.479483 FSPS returned 0
578 07:41:19.482731 Executing Phase 1 of FspMultiPhaseSiInit
579 07:41:19.492601 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 07:41:19.496117 port C0 DISC req: usage 1 usb3 1 usb2 5
581 07:41:19.499497 Raw Buffer output 0 00000511
582 07:41:19.502357 Raw Buffer output 1 00000000
583 07:41:19.506132 pmc_send_ipc_cmd succeeded
584 07:41:19.512973 port C1 DISC req: usage 1 usb3 2 usb2 3
585 07:41:19.513414 Raw Buffer output 0 00000321
586 07:41:19.515927 Raw Buffer output 1 00000000
587 07:41:19.520514 pmc_send_ipc_cmd succeeded
588 07:41:19.525414 Detected 4 core, 8 thread CPU.
589 07:41:19.528703 Detected 4 core, 8 thread CPU.
590 07:41:19.729126 Display FSP Version Info HOB
591 07:41:19.732854 Reference Code - CPU = a.0.4c.31
592 07:41:19.735904 uCode Version = 0.0.0.86
593 07:41:19.738968 TXT ACM version = ff.ff.ff.ffff
594 07:41:19.742210 Reference Code - ME = a.0.4c.31
595 07:41:19.745180 MEBx version = 0.0.0.0
596 07:41:19.748995 ME Firmware Version = Consumer SKU
597 07:41:19.752010 Reference Code - PCH = a.0.4c.31
598 07:41:19.755841 PCH-CRID Status = Disabled
599 07:41:19.758592 PCH-CRID Original Value = ff.ff.ff.ffff
600 07:41:19.762076 PCH-CRID New Value = ff.ff.ff.ffff
601 07:41:19.765224 OPROM - RST - RAID = ff.ff.ff.ffff
602 07:41:19.768529 PCH Hsio Version = 4.0.0.0
603 07:41:19.772196 Reference Code - SA - System Agent = a.0.4c.31
604 07:41:19.775270 Reference Code - MRC = 2.0.0.1
605 07:41:19.778716 SA - PCIe Version = a.0.4c.31
606 07:41:19.782102 SA-CRID Status = Disabled
607 07:41:19.784899 SA-CRID Original Value = 0.0.0.1
608 07:41:19.788229 SA-CRID New Value = 0.0.0.1
609 07:41:19.791486 OPROM - VBIOS = ff.ff.ff.ffff
610 07:41:19.795356 IO Manageability Engine FW Version = 11.1.4.0
611 07:41:19.798800 PHY Build Version = 0.0.0.e0
612 07:41:19.801642 Thunderbolt(TM) FW Version = 0.0.0.0
613 07:41:19.808237 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 07:41:19.811289 ITSS IRQ Polarities Before:
615 07:41:19.811865 IPC0: 0xffffffff
616 07:41:19.815424 IPC1: 0xffffffff
617 07:41:19.815954 IPC2: 0xffffffff
618 07:41:19.817976 IPC3: 0xffffffff
619 07:41:19.821046 ITSS IRQ Polarities After:
620 07:41:19.821471 IPC0: 0xffffffff
621 07:41:19.824910 IPC1: 0xffffffff
622 07:41:19.825335 IPC2: 0xffffffff
623 07:41:19.828221 IPC3: 0xffffffff
624 07:41:19.831317 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 07:41:19.844599 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 07:41:19.857413 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 07:41:19.867532 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 07:41:19.874310 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
629 07:41:19.877668 Enumerating buses...
630 07:41:19.880484 Show all devs... Before device enumeration.
631 07:41:19.883687 Root Device: enabled 1
632 07:41:19.887099 DOMAIN: 0000: enabled 1
633 07:41:19.887525 CPU_CLUSTER: 0: enabled 1
634 07:41:19.890409 PCI: 00:00.0: enabled 1
635 07:41:19.893487 PCI: 00:02.0: enabled 1
636 07:41:19.896868 PCI: 00:04.0: enabled 1
637 07:41:19.896951 PCI: 00:05.0: enabled 1
638 07:41:19.900087 PCI: 00:06.0: enabled 0
639 07:41:19.903539 PCI: 00:07.0: enabled 0
640 07:41:19.906749 PCI: 00:07.1: enabled 0
641 07:41:19.906832 PCI: 00:07.2: enabled 0
642 07:41:19.910253 PCI: 00:07.3: enabled 0
643 07:41:19.913032 PCI: 00:08.0: enabled 1
644 07:41:19.916722 PCI: 00:09.0: enabled 0
645 07:41:19.916804 PCI: 00:0a.0: enabled 0
646 07:41:19.920028 PCI: 00:0d.0: enabled 1
647 07:41:19.922911 PCI: 00:0d.1: enabled 0
648 07:41:19.922993 PCI: 00:0d.2: enabled 0
649 07:41:19.926258 PCI: 00:0d.3: enabled 0
650 07:41:19.929693 PCI: 00:0e.0: enabled 0
651 07:41:19.933140 PCI: 00:10.2: enabled 1
652 07:41:19.933223 PCI: 00:10.6: enabled 0
653 07:41:19.936523 PCI: 00:10.7: enabled 0
654 07:41:19.939707 PCI: 00:12.0: enabled 0
655 07:41:19.942762 PCI: 00:12.6: enabled 0
656 07:41:19.942844 PCI: 00:13.0: enabled 0
657 07:41:19.946240 PCI: 00:14.0: enabled 1
658 07:41:19.949588 PCI: 00:14.1: enabled 0
659 07:41:19.952777 PCI: 00:14.2: enabled 1
660 07:41:19.952859 PCI: 00:14.3: enabled 1
661 07:41:19.955769 PCI: 00:15.0: enabled 1
662 07:41:19.959243 PCI: 00:15.1: enabled 1
663 07:41:19.962717 PCI: 00:15.2: enabled 1
664 07:41:19.962799 PCI: 00:15.3: enabled 1
665 07:41:19.965825 PCI: 00:16.0: enabled 1
666 07:41:19.969530 PCI: 00:16.1: enabled 0
667 07:41:19.972695 PCI: 00:16.2: enabled 0
668 07:41:19.972778 PCI: 00:16.3: enabled 0
669 07:41:19.975753 PCI: 00:16.4: enabled 0
670 07:41:19.979203 PCI: 00:16.5: enabled 0
671 07:41:19.982543 PCI: 00:17.0: enabled 1
672 07:41:19.982626 PCI: 00:19.0: enabled 0
673 07:41:19.985975 PCI: 00:19.1: enabled 1
674 07:41:19.989265 PCI: 00:19.2: enabled 0
675 07:41:19.989347 PCI: 00:1c.0: enabled 1
676 07:41:19.992269 PCI: 00:1c.1: enabled 0
677 07:41:19.995681 PCI: 00:1c.2: enabled 0
678 07:41:19.999059 PCI: 00:1c.3: enabled 0
679 07:41:19.999141 PCI: 00:1c.4: enabled 0
680 07:41:20.002520 PCI: 00:1c.5: enabled 0
681 07:41:20.005512 PCI: 00:1c.6: enabled 1
682 07:41:20.008640 PCI: 00:1c.7: enabled 0
683 07:41:20.008727 PCI: 00:1d.0: enabled 1
684 07:41:20.011943 PCI: 00:1d.1: enabled 0
685 07:41:20.015477 PCI: 00:1d.2: enabled 1
686 07:41:20.019183 PCI: 00:1d.3: enabled 0
687 07:41:20.019625 PCI: 00:1e.0: enabled 1
688 07:41:20.022474 PCI: 00:1e.1: enabled 0
689 07:41:20.025911 PCI: 00:1e.2: enabled 1
690 07:41:20.028791 PCI: 00:1e.3: enabled 1
691 07:41:20.029217 PCI: 00:1f.0: enabled 1
692 07:41:20.032305 PCI: 00:1f.1: enabled 0
693 07:41:20.035549 PCI: 00:1f.2: enabled 1
694 07:41:20.038953 PCI: 00:1f.3: enabled 1
695 07:41:20.039375 PCI: 00:1f.4: enabled 0
696 07:41:20.042265 PCI: 00:1f.5: enabled 1
697 07:41:20.045839 PCI: 00:1f.6: enabled 0
698 07:41:20.048639 PCI: 00:1f.7: enabled 0
699 07:41:20.049064 APIC: 00: enabled 1
700 07:41:20.052094 GENERIC: 0.0: enabled 1
701 07:41:20.055455 GENERIC: 0.0: enabled 1
702 07:41:20.055878 GENERIC: 1.0: enabled 1
703 07:41:20.058441 GENERIC: 0.0: enabled 1
704 07:41:20.061724 GENERIC: 1.0: enabled 1
705 07:41:20.065148 USB0 port 0: enabled 1
706 07:41:20.065572 GENERIC: 0.0: enabled 1
707 07:41:20.068232 USB0 port 0: enabled 1
708 07:41:20.071688 GENERIC: 0.0: enabled 1
709 07:41:20.072167 I2C: 00:1a: enabled 1
710 07:41:20.075342 I2C: 00:31: enabled 1
711 07:41:20.078297 I2C: 00:32: enabled 1
712 07:41:20.078734 I2C: 00:10: enabled 1
713 07:41:20.081636 I2C: 00:15: enabled 1
714 07:41:20.084784 GENERIC: 0.0: enabled 0
715 07:41:20.088220 GENERIC: 1.0: enabled 0
716 07:41:20.088659 GENERIC: 0.0: enabled 1
717 07:41:20.091436 SPI: 00: enabled 1
718 07:41:20.094922 SPI: 00: enabled 1
719 07:41:20.095346 PNP: 0c09.0: enabled 1
720 07:41:20.097965 GENERIC: 0.0: enabled 1
721 07:41:20.101399 USB3 port 0: enabled 1
722 07:41:20.101852 USB3 port 1: enabled 1
723 07:41:20.104864 USB3 port 2: enabled 0
724 07:41:20.108031 USB3 port 3: enabled 0
725 07:41:20.111552 USB2 port 0: enabled 0
726 07:41:20.112003 USB2 port 1: enabled 1
727 07:41:20.114845 USB2 port 2: enabled 1
728 07:41:20.118120 USB2 port 3: enabled 0
729 07:41:20.118537 USB2 port 4: enabled 1
730 07:41:20.121519 USB2 port 5: enabled 0
731 07:41:20.124762 USB2 port 6: enabled 0
732 07:41:20.127629 USB2 port 7: enabled 0
733 07:41:20.128048 USB2 port 8: enabled 0
734 07:41:20.131003 USB2 port 9: enabled 0
735 07:41:20.134363 USB3 port 0: enabled 0
736 07:41:20.134835 USB3 port 1: enabled 1
737 07:41:20.137763 USB3 port 2: enabled 0
738 07:41:20.141197 USB3 port 3: enabled 0
739 07:41:20.144575 GENERIC: 0.0: enabled 1
740 07:41:20.144992 GENERIC: 1.0: enabled 1
741 07:41:20.147823 APIC: 03: enabled 1
742 07:41:20.151247 APIC: 01: enabled 1
743 07:41:20.151816 APIC: 04: enabled 1
744 07:41:20.154159 APIC: 07: enabled 1
745 07:41:20.154572 APIC: 06: enabled 1
746 07:41:20.157532 APIC: 05: enabled 1
747 07:41:20.160824 APIC: 02: enabled 1
748 07:41:20.161242 Compare with tree...
749 07:41:20.164155 Root Device: enabled 1
750 07:41:20.167506 DOMAIN: 0000: enabled 1
751 07:41:20.170762 PCI: 00:00.0: enabled 1
752 07:41:20.171242 PCI: 00:02.0: enabled 1
753 07:41:20.174021 PCI: 00:04.0: enabled 1
754 07:41:20.177213 GENERIC: 0.0: enabled 1
755 07:41:20.180436 PCI: 00:05.0: enabled 1
756 07:41:20.183940 PCI: 00:06.0: enabled 0
757 07:41:20.184426 PCI: 00:07.0: enabled 0
758 07:41:20.187343 GENERIC: 0.0: enabled 1
759 07:41:20.190599 PCI: 00:07.1: enabled 0
760 07:41:20.193835 GENERIC: 1.0: enabled 1
761 07:41:20.196998 PCI: 00:07.2: enabled 0
762 07:41:20.200525 GENERIC: 0.0: enabled 1
763 07:41:20.201112 PCI: 00:07.3: enabled 0
764 07:41:20.203463 GENERIC: 1.0: enabled 1
765 07:41:20.206803 PCI: 00:08.0: enabled 1
766 07:41:20.210434 PCI: 00:09.0: enabled 0
767 07:41:20.213648 PCI: 00:0a.0: enabled 0
768 07:41:20.214214 PCI: 00:0d.0: enabled 1
769 07:41:20.217238 USB0 port 0: enabled 1
770 07:41:20.220195 USB3 port 0: enabled 1
771 07:41:20.223510 USB3 port 1: enabled 1
772 07:41:20.226529 USB3 port 2: enabled 0
773 07:41:20.227106 USB3 port 3: enabled 0
774 07:41:20.229918 PCI: 00:0d.1: enabled 0
775 07:41:20.233197 PCI: 00:0d.2: enabled 0
776 07:41:20.236463 GENERIC: 0.0: enabled 1
777 07:41:20.239765 PCI: 00:0d.3: enabled 0
778 07:41:20.243196 PCI: 00:0e.0: enabled 0
779 07:41:20.243619 PCI: 00:10.2: enabled 1
780 07:41:20.246465 PCI: 00:10.6: enabled 0
781 07:41:20.249849 PCI: 00:10.7: enabled 0
782 07:41:20.253210 PCI: 00:12.0: enabled 0
783 07:41:20.256505 PCI: 00:12.6: enabled 0
784 07:41:20.256931 PCI: 00:13.0: enabled 0
785 07:41:20.259427 PCI: 00:14.0: enabled 1
786 07:41:20.262812 USB0 port 0: enabled 1
787 07:41:20.266274 USB2 port 0: enabled 0
788 07:41:20.269551 USB2 port 1: enabled 1
789 07:41:20.269976 USB2 port 2: enabled 1
790 07:41:20.272937 USB2 port 3: enabled 0
791 07:41:20.276131 USB2 port 4: enabled 1
792 07:41:20.279277 USB2 port 5: enabled 0
793 07:41:20.282701 USB2 port 6: enabled 0
794 07:41:20.283125 USB2 port 7: enabled 0
795 07:41:20.286548 USB2 port 8: enabled 0
796 07:41:20.289708 USB2 port 9: enabled 0
797 07:41:20.292618 USB3 port 0: enabled 0
798 07:41:20.295999 USB3 port 1: enabled 1
799 07:41:20.299413 USB3 port 2: enabled 0
800 07:41:20.299991 USB3 port 3: enabled 0
801 07:41:20.302715 PCI: 00:14.1: enabled 0
802 07:41:20.306174 PCI: 00:14.2: enabled 1
803 07:41:20.309653 PCI: 00:14.3: enabled 1
804 07:41:20.313016 GENERIC: 0.0: enabled 1
805 07:41:20.313473 PCI: 00:15.0: enabled 1
806 07:41:20.315716 I2C: 00:1a: enabled 1
807 07:41:20.319029 I2C: 00:31: enabled 1
808 07:41:20.322717 I2C: 00:32: enabled 1
809 07:41:20.325721 PCI: 00:15.1: enabled 1
810 07:41:20.326170 I2C: 00:10: enabled 1
811 07:41:20.329376 PCI: 00:15.2: enabled 1
812 07:41:20.332293 PCI: 00:15.3: enabled 1
813 07:41:20.335631 PCI: 00:16.0: enabled 1
814 07:41:20.339215 PCI: 00:16.1: enabled 0
815 07:41:20.339651 PCI: 00:16.2: enabled 0
816 07:41:20.342424 PCI: 00:16.3: enabled 0
817 07:41:20.345849 PCI: 00:16.4: enabled 0
818 07:41:20.348991 PCI: 00:16.5: enabled 0
819 07:41:20.352448 PCI: 00:17.0: enabled 1
820 07:41:20.352873 PCI: 00:19.0: enabled 0
821 07:41:20.355810 PCI: 00:19.1: enabled 1
822 07:41:20.359221 I2C: 00:15: enabled 1
823 07:41:20.363161 PCI: 00:19.2: enabled 0
824 07:41:20.363824 PCI: 00:1d.0: enabled 1
825 07:41:20.367015 GENERIC: 0.0: enabled 1
826 07:41:20.370162 PCI: 00:1e.0: enabled 1
827 07:41:20.373317 PCI: 00:1e.1: enabled 0
828 07:41:20.373888 PCI: 00:1e.2: enabled 1
829 07:41:20.376587 SPI: 00: enabled 1
830 07:41:20.379961 PCI: 00:1e.3: enabled 1
831 07:41:20.380386 SPI: 00: enabled 1
832 07:41:20.383376 PCI: 00:1f.0: enabled 1
833 07:41:20.386538 PNP: 0c09.0: enabled 1
834 07:41:20.389807 PCI: 00:1f.1: enabled 0
835 07:41:20.392992 PCI: 00:1f.2: enabled 1
836 07:41:20.393415 GENERIC: 0.0: enabled 1
837 07:41:20.396751 GENERIC: 0.0: enabled 1
838 07:41:20.448451 GENERIC: 1.0: enabled 1
839 07:41:20.449020 PCI: 00:1f.3: enabled 1
840 07:41:20.449394 PCI: 00:1f.4: enabled 0
841 07:41:20.449736 PCI: 00:1f.5: enabled 1
842 07:41:20.450433 PCI: 00:1f.6: enabled 0
843 07:41:20.450788 PCI: 00:1f.7: enabled 0
844 07:41:20.451112 CPU_CLUSTER: 0: enabled 1
845 07:41:20.451426 APIC: 00: enabled 1
846 07:41:20.451737 APIC: 03: enabled 1
847 07:41:20.452040 APIC: 01: enabled 1
848 07:41:20.452400 APIC: 04: enabled 1
849 07:41:20.452708 APIC: 07: enabled 1
850 07:41:20.453015 APIC: 06: enabled 1
851 07:41:20.453318 APIC: 05: enabled 1
852 07:41:20.453638 APIC: 02: enabled 1
853 07:41:20.453912 Root Device scanning...
854 07:41:20.454245 scan_static_bus for Root Device
855 07:41:20.454529 DOMAIN: 0000 enabled
856 07:41:20.454848 CPU_CLUSTER: 0 enabled
857 07:41:20.455151 DOMAIN: 0000 scanning...
858 07:41:20.487879 PCI: pci_scan_bus for bus 00
859 07:41:20.488513 PCI: 00:00.0 [8086/0000] ops
860 07:41:20.488891 PCI: 00:00.0 [8086/9a12] enabled
861 07:41:20.489238 PCI: 00:02.0 [8086/0000] bus ops
862 07:41:20.489931 PCI: 00:02.0 [8086/9a40] enabled
863 07:41:20.490290 PCI: 00:04.0 [8086/0000] bus ops
864 07:41:20.490614 PCI: 00:04.0 [8086/9a03] enabled
865 07:41:20.490925 PCI: 00:05.0 [8086/9a19] enabled
866 07:41:20.491234 PCI: 00:07.0 [0000/0000] hidden
867 07:41:20.491540 PCI: 00:08.0 [8086/9a11] enabled
868 07:41:20.491843 PCI: 00:0a.0 [8086/9a0d] disabled
869 07:41:20.492284 PCI: 00:0d.0 [8086/0000] bus ops
870 07:41:20.492619 PCI: 00:0d.0 [8086/9a13] enabled
871 07:41:20.495343 PCI: 00:14.0 [8086/0000] bus ops
872 07:41:20.498634 PCI: 00:14.0 [8086/a0ed] enabled
873 07:41:20.501920 PCI: 00:14.2 [8086/a0ef] enabled
874 07:41:20.505082 PCI: 00:14.3 [8086/0000] bus ops
875 07:41:20.508633 PCI: 00:14.3 [8086/a0f0] enabled
876 07:41:20.511424 PCI: 00:15.0 [8086/0000] bus ops
877 07:41:20.515265 PCI: 00:15.0 [8086/a0e8] enabled
878 07:41:20.518577 PCI: 00:15.1 [8086/0000] bus ops
879 07:41:20.521453 PCI: 00:15.1 [8086/a0e9] enabled
880 07:41:20.525266 PCI: 00:15.2 [8086/0000] bus ops
881 07:41:20.528493 PCI: 00:15.2 [8086/a0ea] enabled
882 07:41:20.531239 PCI: 00:15.3 [8086/0000] bus ops
883 07:41:20.534770 PCI: 00:15.3 [8086/a0eb] enabled
884 07:41:20.538109 PCI: 00:16.0 [8086/0000] ops
885 07:41:20.541145 PCI: 00:16.0 [8086/a0e0] enabled
886 07:41:20.548300 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 07:41:20.551446 PCI: 00:19.0 [8086/0000] bus ops
888 07:41:20.554892 PCI: 00:19.0 [8086/a0c5] disabled
889 07:41:20.557746 PCI: 00:19.1 [8086/0000] bus ops
890 07:41:20.561078 PCI: 00:19.1 [8086/a0c6] enabled
891 07:41:20.564318 PCI: 00:1d.0 [8086/0000] bus ops
892 07:41:20.567440 PCI: 00:1d.0 [8086/a0b0] enabled
893 07:41:20.570873 PCI: 00:1e.0 [8086/0000] ops
894 07:41:20.574502 PCI: 00:1e.0 [8086/a0a8] enabled
895 07:41:20.577752 PCI: 00:1e.2 [8086/0000] bus ops
896 07:41:20.580932 PCI: 00:1e.2 [8086/a0aa] enabled
897 07:41:20.584633 PCI: 00:1e.3 [8086/0000] bus ops
898 07:41:20.587315 PCI: 00:1e.3 [8086/a0ab] enabled
899 07:41:20.590665 PCI: 00:1f.0 [8086/0000] bus ops
900 07:41:20.594227 PCI: 00:1f.0 [8086/a087] enabled
901 07:41:20.594696 RTC Init
902 07:41:20.597373 Set power on after power failure.
903 07:41:20.600761 Disabling Deep S3
904 07:41:20.601181 Disabling Deep S3
905 07:41:20.604030 Disabling Deep S4
906 07:41:20.604477 Disabling Deep S4
907 07:41:20.607603 Disabling Deep S5
908 07:41:20.610898 Disabling Deep S5
909 07:41:20.614128 PCI: 00:1f.2 [0000/0000] hidden
910 07:41:20.617028 PCI: 00:1f.3 [8086/0000] bus ops
911 07:41:20.620454 PCI: 00:1f.3 [8086/a0c8] enabled
912 07:41:20.623662 PCI: 00:1f.5 [8086/0000] bus ops
913 07:41:20.627021 PCI: 00:1f.5 [8086/a0a4] enabled
914 07:41:20.627438 PCI: Leftover static devices:
915 07:41:20.630118 PCI: 00:10.2
916 07:41:20.630539 PCI: 00:10.6
917 07:41:20.633343 PCI: 00:10.7
918 07:41:20.633760 PCI: 00:06.0
919 07:41:20.636639 PCI: 00:07.1
920 07:41:20.637058 PCI: 00:07.2
921 07:41:20.637388 PCI: 00:07.3
922 07:41:20.639899 PCI: 00:09.0
923 07:41:20.640347 PCI: 00:0d.1
924 07:41:20.643257 PCI: 00:0d.2
925 07:41:20.643674 PCI: 00:0d.3
926 07:41:20.644003 PCI: 00:0e.0
927 07:41:20.646603 PCI: 00:12.0
928 07:41:20.647020 PCI: 00:12.6
929 07:41:20.649845 PCI: 00:13.0
930 07:41:20.650290 PCI: 00:14.1
931 07:41:20.653607 PCI: 00:16.1
932 07:41:20.654027 PCI: 00:16.2
933 07:41:20.654363 PCI: 00:16.3
934 07:41:20.656795 PCI: 00:16.4
935 07:41:20.657213 PCI: 00:16.5
936 07:41:20.660172 PCI: 00:17.0
937 07:41:20.660607 PCI: 00:19.2
938 07:41:20.660940 PCI: 00:1e.1
939 07:41:20.662964 PCI: 00:1f.1
940 07:41:20.663383 PCI: 00:1f.4
941 07:41:20.666392 PCI: 00:1f.6
942 07:41:20.666811 PCI: 00:1f.7
943 07:41:20.669845 PCI: Check your devicetree.cb.
944 07:41:20.673275 PCI: 00:02.0 scanning...
945 07:41:20.676661 scan_generic_bus for PCI: 00:02.0
946 07:41:20.679394 scan_generic_bus for PCI: 00:02.0 done
947 07:41:20.686195 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 07:41:20.686615 PCI: 00:04.0 scanning...
949 07:41:20.689651 scan_generic_bus for PCI: 00:04.0
950 07:41:20.692851 GENERIC: 0.0 enabled
951 07:41:20.699466 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 07:41:20.702694 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 07:41:20.705870 PCI: 00:0d.0 scanning...
954 07:41:20.709285 scan_static_bus for PCI: 00:0d.0
955 07:41:20.712690 USB0 port 0 enabled
956 07:41:20.716193 USB0 port 0 scanning...
957 07:41:20.719609 scan_static_bus for USB0 port 0
958 07:41:20.720110 USB3 port 0 enabled
959 07:41:20.722555 USB3 port 1 enabled
960 07:41:20.726001 USB3 port 2 disabled
961 07:41:20.726421 USB3 port 3 disabled
962 07:41:20.729366 USB3 port 0 scanning...
963 07:41:20.732801 scan_static_bus for USB3 port 0
964 07:41:20.735882 scan_static_bus for USB3 port 0 done
965 07:41:20.738992 scan_bus: bus USB3 port 0 finished in 6 msecs
966 07:41:20.742170 USB3 port 1 scanning...
967 07:41:20.745528 scan_static_bus for USB3 port 1
968 07:41:20.749028 scan_static_bus for USB3 port 1 done
969 07:41:20.755313 scan_bus: bus USB3 port 1 finished in 6 msecs
970 07:41:20.758674 scan_static_bus for USB0 port 0 done
971 07:41:20.762046 scan_bus: bus USB0 port 0 finished in 43 msecs
972 07:41:20.768872 scan_static_bus for PCI: 00:0d.0 done
973 07:41:20.771722 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 07:41:20.775047 PCI: 00:14.0 scanning...
975 07:41:20.778473 scan_static_bus for PCI: 00:14.0
976 07:41:20.778900 USB0 port 0 enabled
977 07:41:20.781856 USB0 port 0 scanning...
978 07:41:20.785258 scan_static_bus for USB0 port 0
979 07:41:20.788207 USB2 port 0 disabled
980 07:41:20.791917 USB2 port 1 enabled
981 07:41:20.792386 USB2 port 2 enabled
982 07:41:20.795273 USB2 port 3 disabled
983 07:41:20.795768 USB2 port 4 enabled
984 07:41:20.798581 USB2 port 5 disabled
985 07:41:20.801886 USB2 port 6 disabled
986 07:41:20.802351 USB2 port 7 disabled
987 07:41:20.804891 USB2 port 8 disabled
988 07:41:20.808210 USB2 port 9 disabled
989 07:41:20.808639 USB3 port 0 disabled
990 07:41:20.811556 USB3 port 1 enabled
991 07:41:20.814754 USB3 port 2 disabled
992 07:41:20.815173 USB3 port 3 disabled
993 07:41:20.817894 USB2 port 1 scanning...
994 07:41:20.821322 scan_static_bus for USB2 port 1
995 07:41:20.824671 scan_static_bus for USB2 port 1 done
996 07:41:20.831196 scan_bus: bus USB2 port 1 finished in 6 msecs
997 07:41:20.831656 USB2 port 2 scanning...
998 07:41:20.834213 scan_static_bus for USB2 port 2
999 07:41:20.837624 scan_static_bus for USB2 port 2 done
1000 07:41:20.844139 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 07:41:20.847687 USB2 port 4 scanning...
1002 07:41:20.850479 scan_static_bus for USB2 port 4
1003 07:41:20.854238 scan_static_bus for USB2 port 4 done
1004 07:41:20.857376 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 07:41:20.860704 USB3 port 1 scanning...
1006 07:41:20.863450 scan_static_bus for USB3 port 1
1007 07:41:20.866753 scan_static_bus for USB3 port 1 done
1008 07:41:20.873670 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 07:41:20.876972 scan_static_bus for USB0 port 0 done
1010 07:41:20.880286 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 07:41:20.883287 scan_static_bus for PCI: 00:14.0 done
1012 07:41:20.889914 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1013 07:41:20.893387 PCI: 00:14.3 scanning...
1014 07:41:20.896664 scan_static_bus for PCI: 00:14.3
1015 07:41:20.896746 GENERIC: 0.0 enabled
1016 07:41:20.900040 scan_static_bus for PCI: 00:14.3 done
1017 07:41:20.906698 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 07:41:20.909444 PCI: 00:15.0 scanning...
1019 07:41:20.913286 scan_static_bus for PCI: 00:15.0
1020 07:41:20.913381 I2C: 00:1a enabled
1021 07:41:20.916575 I2C: 00:31 enabled
1022 07:41:20.916657 I2C: 00:32 enabled
1023 07:41:20.923205 scan_static_bus for PCI: 00:15.0 done
1024 07:41:20.926386 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 07:41:20.929487 PCI: 00:15.1 scanning...
1026 07:41:20.932637 scan_static_bus for PCI: 00:15.1
1027 07:41:20.932718 I2C: 00:10 enabled
1028 07:41:20.939946 scan_static_bus for PCI: 00:15.1 done
1029 07:41:20.943311 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 07:41:20.946768 PCI: 00:15.2 scanning...
1031 07:41:20.950165 scan_static_bus for PCI: 00:15.2
1032 07:41:20.953042 scan_static_bus for PCI: 00:15.2 done
1033 07:41:20.956440 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 07:41:20.959830 PCI: 00:15.3 scanning...
1035 07:41:20.963125 scan_static_bus for PCI: 00:15.3
1036 07:41:20.966262 scan_static_bus for PCI: 00:15.3 done
1037 07:41:20.972911 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 07:41:20.976355 PCI: 00:19.1 scanning...
1039 07:41:20.979727 scan_static_bus for PCI: 00:19.1
1040 07:41:20.979807 I2C: 00:15 enabled
1041 07:41:20.983058 scan_static_bus for PCI: 00:19.1 done
1042 07:41:20.989255 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 07:41:20.992666 PCI: 00:1d.0 scanning...
1044 07:41:20.996012 do_pci_scan_bridge for PCI: 00:1d.0
1045 07:41:20.999435 PCI: pci_scan_bus for bus 01
1046 07:41:21.002840 PCI: 01:00.0 [15b7/5009] enabled
1047 07:41:21.002922 GENERIC: 0.0 enabled
1048 07:41:21.005607 Enabling Common Clock Configuration
1049 07:41:21.012433 L1 Sub-State supported from root port 29
1050 07:41:21.015843 L1 Sub-State Support = 0x5
1051 07:41:21.015924 CommonModeRestoreTime = 0x28
1052 07:41:21.022001 Power On Value = 0x16, Power On Scale = 0x0
1053 07:41:21.022081 ASPM: Enabled L1
1054 07:41:21.028829 PCIe: Max_Payload_Size adjusted to 128
1055 07:41:21.032241 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 07:41:21.035230 PCI: 00:1e.2 scanning...
1057 07:41:21.038680 scan_generic_bus for PCI: 00:1e.2
1058 07:41:21.038761 SPI: 00 enabled
1059 07:41:21.044994 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 07:41:21.051739 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 07:41:21.051841 PCI: 00:1e.3 scanning...
1062 07:41:21.058686 scan_generic_bus for PCI: 00:1e.3
1063 07:41:21.058768 SPI: 00 enabled
1064 07:41:21.065274 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 07:41:21.068413 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 07:41:21.071525 PCI: 00:1f.0 scanning...
1067 07:41:21.074909 scan_static_bus for PCI: 00:1f.0
1068 07:41:21.078112 PNP: 0c09.0 enabled
1069 07:41:21.078192 PNP: 0c09.0 scanning...
1070 07:41:21.081933 scan_static_bus for PNP: 0c09.0
1071 07:41:21.088528 scan_static_bus for PNP: 0c09.0 done
1072 07:41:21.091857 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 07:41:21.095282 scan_static_bus for PCI: 00:1f.0 done
1074 07:41:21.101448 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 07:41:21.101530 PCI: 00:1f.2 scanning...
1076 07:41:21.104826 scan_static_bus for PCI: 00:1f.2
1077 07:41:21.108249 GENERIC: 0.0 enabled
1078 07:41:21.111477 GENERIC: 0.0 scanning...
1079 07:41:21.114783 scan_static_bus for GENERIC: 0.0
1080 07:41:21.118329 GENERIC: 0.0 enabled
1081 07:41:21.118409 GENERIC: 1.0 enabled
1082 07:41:21.121537 scan_static_bus for GENERIC: 0.0 done
1083 07:41:21.128399 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 07:41:21.131251 scan_static_bus for PCI: 00:1f.2 done
1085 07:41:21.134866 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 07:41:21.137985 PCI: 00:1f.3 scanning...
1087 07:41:21.141364 scan_static_bus for PCI: 00:1f.3
1088 07:41:21.144838 scan_static_bus for PCI: 00:1f.3 done
1089 07:41:21.150972 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 07:41:21.154641 PCI: 00:1f.5 scanning...
1091 07:41:21.157809 scan_generic_bus for PCI: 00:1f.5
1092 07:41:21.161134 scan_generic_bus for PCI: 00:1f.5 done
1093 07:41:21.164515 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 07:41:21.171260 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1095 07:41:21.174378 scan_static_bus for Root Device done
1096 07:41:21.177785 scan_bus: bus Root Device finished in 736 msecs
1097 07:41:21.180711 done
1098 07:41:21.184303 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1099 07:41:21.187523 Chrome EC: UHEPI supported
1100 07:41:21.194231 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 07:41:21.200768 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 07:41:21.203988 SPI flash protection: WPSW=0 SRP0=0
1103 07:41:21.210752 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 07:41:21.214155 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1105 07:41:21.217554 found VGA at PCI: 00:02.0
1106 07:41:21.220879 Setting up VGA for PCI: 00:02.0
1107 07:41:21.227523 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 07:41:21.230590 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 07:41:21.233812 Allocating resources...
1110 07:41:21.237175 Reading resources...
1111 07:41:21.240551 Root Device read_resources bus 0 link: 0
1112 07:41:21.243390 DOMAIN: 0000 read_resources bus 0 link: 0
1113 07:41:21.250169 PCI: 00:04.0 read_resources bus 1 link: 0
1114 07:41:21.253502 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 07:41:21.260353 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 07:41:21.263755 USB0 port 0 read_resources bus 0 link: 0
1117 07:41:21.270496 USB0 port 0 read_resources bus 0 link: 0 done
1118 07:41:21.273857 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 07:41:21.280307 PCI: 00:14.0 read_resources bus 0 link: 0
1120 07:41:21.283530 USB0 port 0 read_resources bus 0 link: 0
1121 07:41:21.290276 USB0 port 0 read_resources bus 0 link: 0 done
1122 07:41:21.293397 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 07:41:21.299925 PCI: 00:14.3 read_resources bus 0 link: 0
1124 07:41:21.303341 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 07:41:21.306987 PCI: 00:15.0 read_resources bus 0 link: 0
1126 07:41:21.313983 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 07:41:21.317337 PCI: 00:15.1 read_resources bus 0 link: 0
1128 07:41:21.324041 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 07:41:21.327442 PCI: 00:19.1 read_resources bus 0 link: 0
1130 07:41:21.334224 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 07:41:21.337509 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 07:41:21.343690 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 07:41:21.347195 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 07:41:21.353903 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 07:41:21.357290 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 07:41:21.363967 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 07:41:21.367465 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 07:41:21.373832 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 07:41:21.376944 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 07:41:21.380396 GENERIC: 0.0 read_resources bus 0 link: 0
1141 07:41:21.387653 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 07:41:21.390854 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 07:41:21.398309 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 07:41:21.401609 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 07:41:21.407925 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 07:41:21.411698 Root Device read_resources bus 0 link: 0 done
1147 07:41:21.414559 Done reading resources.
1148 07:41:21.421206 Show resources in subtree (Root Device)...After reading.
1149 07:41:21.424429 Root Device child on link 0 DOMAIN: 0000
1150 07:41:21.427745 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 07:41:21.437806 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 07:41:21.447860 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 07:41:21.451149 PCI: 00:00.0
1154 07:41:21.460829 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 07:41:21.470978 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 07:41:21.477286 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 07:41:21.487665 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 07:41:21.497559 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 07:41:21.507159 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 07:41:21.517238 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 07:41:21.523882 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 07:41:21.533938 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 07:41:21.543405 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 07:41:21.553321 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 07:41:21.563344 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 07:41:21.573652 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 07:41:21.579774 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 07:41:21.589939 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 07:41:21.600047 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 07:41:21.609666 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 07:41:21.619611 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 07:41:21.629615 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 07:41:21.639750 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 07:41:21.639831 PCI: 00:02.0
1175 07:41:21.649512 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 07:41:21.659418 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 07:41:21.669139 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 07:41:21.672294 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 07:41:21.682692 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 07:41:21.685902 GENERIC: 0.0
1181 07:41:21.686330 PCI: 00:05.0
1182 07:41:21.699258 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 07:41:21.702562 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 07:41:21.702736 GENERIC: 0.0
1185 07:41:21.705320 PCI: 00:08.0
1186 07:41:21.715523 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 07:41:21.715612 PCI: 00:0a.0
1188 07:41:21.721855 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 07:41:21.731993 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 07:41:21.734809 USB0 port 0 child on link 0 USB3 port 0
1191 07:41:21.738278 USB3 port 0
1192 07:41:21.738398 USB3 port 1
1193 07:41:21.741872 USB3 port 2
1194 07:41:21.742003 USB3 port 3
1195 07:41:21.748493 PCI: 00:14.0 child on link 0 USB0 port 0
1196 07:41:21.758050 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 07:41:21.761474 USB0 port 0 child on link 0 USB2 port 0
1198 07:41:21.764987 USB2 port 0
1199 07:41:21.765278 USB2 port 1
1200 07:41:21.768437 USB2 port 2
1201 07:41:21.768801 USB2 port 3
1202 07:41:21.771294 USB2 port 4
1203 07:41:21.771682 USB2 port 5
1204 07:41:21.774673 USB2 port 6
1205 07:41:21.775085 USB2 port 7
1206 07:41:21.777988 USB2 port 8
1207 07:41:21.778395 USB2 port 9
1208 07:41:21.781274 USB3 port 0
1209 07:41:21.784704 USB3 port 1
1210 07:41:21.785114 USB3 port 2
1211 07:41:21.787911 USB3 port 3
1212 07:41:21.788346 PCI: 00:14.2
1213 07:41:21.798139 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 07:41:21.807665 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 07:41:21.811188 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 07:41:21.821410 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 07:41:21.824082 GENERIC: 0.0
1218 07:41:21.827433 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 07:41:21.837625 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 07:41:21.840442 I2C: 00:1a
1221 07:41:21.840860 I2C: 00:31
1222 07:41:21.843841 I2C: 00:32
1223 07:41:21.847396 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 07:41:21.857408 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 07:41:21.860806 I2C: 00:10
1226 07:41:21.861254 PCI: 00:15.2
1227 07:41:21.870376 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 07:41:21.873852 PCI: 00:15.3
1229 07:41:21.883493 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 07:41:21.883908 PCI: 00:16.0
1231 07:41:21.893755 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 07:41:21.897104 PCI: 00:19.0
1233 07:41:21.900036 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 07:41:21.910152 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 07:41:21.910744 I2C: 00:15
1236 07:41:21.916800 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 07:41:21.923266 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 07:41:21.932913 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 07:41:21.943008 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 07:41:21.946552 GENERIC: 0.0
1241 07:41:21.946994 PCI: 01:00.0
1242 07:41:21.956118 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 07:41:21.966049 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1244 07:41:21.969196 PCI: 00:1e.0
1245 07:41:21.979065 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1246 07:41:21.982365 PCI: 00:1e.2 child on link 0 SPI: 00
1247 07:41:21.992718 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 07:41:21.995669 SPI: 00
1249 07:41:21.999219 PCI: 00:1e.3 child on link 0 SPI: 00
1250 07:41:22.008977 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 07:41:22.009529 SPI: 00
1252 07:41:22.015729 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1253 07:41:22.021927 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1254 07:41:22.025275 PNP: 0c09.0
1255 07:41:22.035484 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1256 07:41:22.038648 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1257 07:41:22.048515 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1258 07:41:22.058452 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1259 07:41:22.061753 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1260 07:41:22.065260 GENERIC: 0.0
1261 07:41:22.065717 GENERIC: 1.0
1262 07:41:22.067997 PCI: 00:1f.3
1263 07:41:22.077769 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1264 07:41:22.088020 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1265 07:41:22.088496 PCI: 00:1f.5
1266 07:41:22.098225 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1267 07:41:22.100991 CPU_CLUSTER: 0 child on link 0 APIC: 00
1268 07:41:22.104194 APIC: 00
1269 07:41:22.104643 APIC: 03
1270 07:41:22.104991 APIC: 01
1271 07:41:22.107475 APIC: 04
1272 07:41:22.107893 APIC: 07
1273 07:41:22.110885 APIC: 06
1274 07:41:22.111302 APIC: 05
1275 07:41:22.111647 APIC: 02
1276 07:41:22.120635 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1277 07:41:22.124460 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1278 07:41:22.130691 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1279 07:41:22.137538 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1280 07:41:22.140919 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1281 07:41:22.147368 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1282 07:41:22.154144 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1283 07:41:22.160755 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1284 07:41:22.167157 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1285 07:41:22.177050 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1286 07:41:22.180369 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1287 07:41:22.190117 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1288 07:41:22.196928 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1289 07:41:22.203523 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1290 07:41:22.206846 DOMAIN: 0000: Resource ranges:
1291 07:41:22.210161 * Base: 1000, Size: 800, Tag: 100
1292 07:41:22.213714 * Base: 1900, Size: e700, Tag: 100
1293 07:41:22.220004 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1294 07:41:22.226505 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1295 07:41:22.233299 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1296 07:41:22.243130 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1297 07:41:22.250114 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 07:41:22.256441 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 07:41:22.266108 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 07:41:22.272893 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 07:41:22.279434 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 07:41:22.289685 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 07:41:22.295856 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 07:41:22.302195 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 07:41:22.312373 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 07:41:22.318715 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 07:41:22.325320 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 07:41:22.335679 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 07:41:22.342029 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 07:41:22.348920 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 07:41:22.358449 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 07:41:22.365199 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1313 07:41:22.371722 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 07:41:22.381215 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 07:41:22.387921 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 07:41:22.394563 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 07:41:22.404505 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 07:41:22.407672 DOMAIN: 0000: Resource ranges:
1319 07:41:22.411044 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 07:41:22.414761 * Base: d0000000, Size: 28000000, Tag: 200
1321 07:41:22.420907 * Base: fa000000, Size: 1000000, Tag: 200
1322 07:41:22.424493 * Base: fb001000, Size: 2fff000, Tag: 200
1323 07:41:22.427519 * Base: fe010000, Size: 2e000, Tag: 200
1324 07:41:22.430953 * Base: fe03f000, Size: d41000, Tag: 200
1325 07:41:22.437678 * Base: fed88000, Size: 8000, Tag: 200
1326 07:41:22.441171 * Base: fed93000, Size: d000, Tag: 200
1327 07:41:22.443997 * Base: feda2000, Size: 1e000, Tag: 200
1328 07:41:22.447402 * Base: fede0000, Size: 1220000, Tag: 200
1329 07:41:22.454275 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1330 07:41:22.460817 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 07:41:22.467150 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 07:41:22.474145 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 07:41:22.480284 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 07:41:22.487258 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 07:41:22.493864 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1336 07:41:22.500427 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1337 07:41:22.507208 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1338 07:41:22.513347 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1339 07:41:22.519851 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1340 07:41:22.527032 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1341 07:41:22.533199 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1342 07:41:22.539989 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 07:41:22.546765 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1344 07:41:22.552953 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1345 07:41:22.559654 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1346 07:41:22.566626 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1347 07:41:22.572876 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1348 07:41:22.579518 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1349 07:41:22.586146 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1350 07:41:22.592944 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1351 07:41:22.599442 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1352 07:41:22.605721 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1353 07:41:22.615763 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1354 07:41:22.619311 PCI: 00:1d.0: Resource ranges:
1355 07:41:22.622457 * Base: 7fc00000, Size: 100000, Tag: 200
1356 07:41:22.629022 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1357 07:41:22.635940 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1358 07:41:22.645648 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1359 07:41:22.652385 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1360 07:41:22.655643 Root Device assign_resources, bus 0 link: 0
1361 07:41:22.662118 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 07:41:22.668885 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1363 07:41:22.679012 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1364 07:41:22.684951 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1365 07:41:22.691711 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1366 07:41:22.698459 PCI: 00:04.0 assign_resources, bus 1 link: 0
1367 07:41:22.701994 PCI: 00:04.0 assign_resources, bus 1 link: 0
1368 07:41:22.711513 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1369 07:41:22.718228 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1370 07:41:22.728549 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1371 07:41:22.731676 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1372 07:41:22.734921 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1373 07:41:22.745265 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1374 07:41:22.748635 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 07:41:22.755011 PCI: 00:14.0 assign_resources, bus 0 link: 0
1376 07:41:22.761699 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1377 07:41:22.771110 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1378 07:41:22.778568 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1379 07:41:22.781040 PCI: 00:14.3 assign_resources, bus 0 link: 0
1380 07:41:22.788212 PCI: 00:14.3 assign_resources, bus 0 link: 0
1381 07:41:22.794795 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1382 07:41:22.801228 PCI: 00:15.0 assign_resources, bus 0 link: 0
1383 07:41:22.804777 PCI: 00:15.0 assign_resources, bus 0 link: 0
1384 07:41:22.814151 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1385 07:41:22.817395 PCI: 00:15.1 assign_resources, bus 0 link: 0
1386 07:41:22.820747 PCI: 00:15.1 assign_resources, bus 0 link: 0
1387 07:41:22.831155 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1388 07:41:22.837217 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1389 07:41:22.847561 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1390 07:41:22.853946 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1391 07:41:22.860180 PCI: 00:19.1 assign_resources, bus 0 link: 0
1392 07:41:22.863938 PCI: 00:19.1 assign_resources, bus 0 link: 0
1393 07:41:22.873537 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1394 07:41:22.883646 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1395 07:41:22.890274 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1396 07:41:22.896884 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 07:41:22.903264 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1398 07:41:22.913096 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1399 07:41:22.916425 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 07:41:22.926389 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1401 07:41:22.929851 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 07:41:22.936004 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1403 07:41:22.942795 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1404 07:41:22.946081 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 07:41:22.952715 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 07:41:22.955912 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 07:41:22.962522 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 07:41:22.965996 LPC: Trying to open IO window from 800 size 1ff
1409 07:41:22.976332 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 07:41:22.982290 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 07:41:22.992046 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 07:41:22.995551 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 07:41:23.002156 Root Device assign_resources, bus 0 link: 0
1414 07:41:23.002684 Done setting resources.
1415 07:41:23.008824 Show resources in subtree (Root Device)...After assigning values.
1416 07:41:23.015044 Root Device child on link 0 DOMAIN: 0000
1417 07:41:23.018597 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 07:41:23.028742 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 07:41:23.038465 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 07:41:23.039000 PCI: 00:00.0
1421 07:41:23.048255 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 07:41:23.058380 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 07:41:23.068466 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 07:41:23.077961 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 07:41:23.084928 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 07:41:23.094207 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 07:41:23.104136 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 07:41:23.114116 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 07:41:23.124130 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 07:41:23.133800 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 07:41:23.144217 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 07:41:23.150692 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 07:41:23.160429 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 07:41:23.170070 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 07:41:23.180185 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 07:41:23.189987 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 07:41:23.200034 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 07:41:23.209683 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 07:41:23.216368 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 07:41:23.226012 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 07:41:23.229687 PCI: 00:02.0
1442 07:41:23.239258 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 07:41:23.249162 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 07:41:23.258918 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 07:41:23.262618 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 07:41:23.275547 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 07:41:23.275989 GENERIC: 0.0
1448 07:41:23.278201 PCI: 00:05.0
1449 07:41:23.288116 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 07:41:23.291282 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 07:41:23.294821 GENERIC: 0.0
1452 07:41:23.294902 PCI: 00:08.0
1453 07:41:23.304410 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 07:41:23.307851 PCI: 00:0a.0
1455 07:41:23.311291 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 07:41:23.321236 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 07:41:23.327530 USB0 port 0 child on link 0 USB3 port 0
1458 07:41:23.327612 USB3 port 0
1459 07:41:23.330903 USB3 port 1
1460 07:41:23.330983 USB3 port 2
1461 07:41:23.334243 USB3 port 3
1462 07:41:23.337456 PCI: 00:14.0 child on link 0 USB0 port 0
1463 07:41:23.347261 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 07:41:23.354077 USB0 port 0 child on link 0 USB2 port 0
1465 07:41:23.354157 USB2 port 0
1466 07:41:23.357449 USB2 port 1
1467 07:41:23.357529 USB2 port 2
1468 07:41:23.360915 USB2 port 3
1469 07:41:23.360994 USB2 port 4
1470 07:41:23.364122 USB2 port 5
1471 07:41:23.367550 USB2 port 6
1472 07:41:23.367630 USB2 port 7
1473 07:41:23.370759 USB2 port 8
1474 07:41:23.370838 USB2 port 9
1475 07:41:23.373941 USB3 port 0
1476 07:41:23.374020 USB3 port 1
1477 07:41:23.377298 USB3 port 2
1478 07:41:23.377377 USB3 port 3
1479 07:41:23.380744 PCI: 00:14.2
1480 07:41:23.390470 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 07:41:23.400416 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 07:41:23.403974 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 07:41:23.416740 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 07:41:23.416966 GENERIC: 0.0
1485 07:41:23.419852 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 07:41:23.430096 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 07:41:23.433519 I2C: 00:1a
1488 07:41:23.433752 I2C: 00:31
1489 07:41:23.436979 I2C: 00:32
1490 07:41:23.440179 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 07:41:23.449921 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 07:41:23.453479 I2C: 00:10
1493 07:41:23.453888 PCI: 00:15.2
1494 07:41:23.463498 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 07:41:23.466325 PCI: 00:15.3
1496 07:41:23.476753 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 07:41:23.479976 PCI: 00:16.0
1498 07:41:23.489666 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 07:41:23.490085 PCI: 00:19.0
1500 07:41:23.496323 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 07:41:23.505951 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 07:41:23.506392 I2C: 00:15
1503 07:41:23.512415 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 07:41:23.519303 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 07:41:23.532350 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 07:41:23.542460 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 07:41:23.545734 GENERIC: 0.0
1508 07:41:23.546289 PCI: 01:00.0
1509 07:41:23.555839 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 07:41:23.565497 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1511 07:41:23.568550 PCI: 00:1e.0
1512 07:41:23.578485 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 07:41:23.585059 PCI: 00:1e.2 child on link 0 SPI: 00
1514 07:41:23.595322 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 07:41:23.595758 SPI: 00
1516 07:41:23.598276 PCI: 00:1e.3 child on link 0 SPI: 00
1517 07:41:23.608181 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 07:41:23.611502 SPI: 00
1519 07:41:23.614837 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 07:41:23.624916 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 07:41:23.625348 PNP: 0c09.0
1522 07:41:23.634615 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1523 07:41:23.638167 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1524 07:41:23.647725 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1525 07:41:23.657648 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1526 07:41:23.661008 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1527 07:41:23.664404 GENERIC: 0.0
1528 07:41:23.664843 GENERIC: 1.0
1529 07:41:23.667807 PCI: 00:1f.3
1530 07:41:23.677833 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1531 07:41:23.687562 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1532 07:41:23.690592 PCI: 00:1f.5
1533 07:41:23.700623 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1534 07:41:23.703757 CPU_CLUSTER: 0 child on link 0 APIC: 00
1535 07:41:23.707329 APIC: 00
1536 07:41:23.707912 APIC: 03
1537 07:41:23.708495 APIC: 01
1538 07:41:23.710135 APIC: 04
1539 07:41:23.710697 APIC: 07
1540 07:41:23.713646 APIC: 06
1541 07:41:23.714191 APIC: 05
1542 07:41:23.714724 APIC: 02
1543 07:41:23.716943 Done allocating resources.
1544 07:41:23.723776 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1545 07:41:23.729895 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1546 07:41:23.733426 Configure GPIOs for I2S audio on UP4.
1547 07:41:23.740200 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1548 07:41:23.743143 Enabling resources...
1549 07:41:23.746811 PCI: 00:00.0 subsystem <- 8086/9a12
1550 07:41:23.749617 PCI: 00:00.0 cmd <- 06
1551 07:41:23.752983 PCI: 00:02.0 subsystem <- 8086/9a40
1552 07:41:23.756320 PCI: 00:02.0 cmd <- 03
1553 07:41:23.759443 PCI: 00:04.0 subsystem <- 8086/9a03
1554 07:41:23.759983 PCI: 00:04.0 cmd <- 02
1555 07:41:23.766217 PCI: 00:05.0 subsystem <- 8086/9a19
1556 07:41:23.766760 PCI: 00:05.0 cmd <- 02
1557 07:41:23.769702 PCI: 00:08.0 subsystem <- 8086/9a11
1558 07:41:23.773020 PCI: 00:08.0 cmd <- 06
1559 07:41:23.776469 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 07:41:23.779302 PCI: 00:0d.0 cmd <- 02
1561 07:41:23.782748 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 07:41:23.786131 PCI: 00:14.0 cmd <- 02
1563 07:41:23.789543 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 07:41:23.792971 PCI: 00:14.2 cmd <- 02
1565 07:41:23.796522 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 07:41:23.799023 PCI: 00:14.3 cmd <- 02
1567 07:41:23.802488 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 07:41:23.805944 PCI: 00:15.0 cmd <- 02
1569 07:41:23.809195 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 07:41:23.812808 PCI: 00:15.1 cmd <- 02
1571 07:41:23.816029 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 07:41:23.816476 PCI: 00:15.2 cmd <- 02
1573 07:41:23.822171 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 07:41:23.822600 PCI: 00:15.3 cmd <- 02
1575 07:41:23.825399 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 07:41:23.828823 PCI: 00:16.0 cmd <- 02
1577 07:41:23.832303 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 07:41:23.835502 PCI: 00:19.1 cmd <- 02
1579 07:41:23.838887 PCI: 00:1d.0 bridge ctrl <- 0013
1580 07:41:23.842135 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 07:41:23.845173 PCI: 00:1d.0 cmd <- 06
1582 07:41:23.848565 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 07:41:23.852167 PCI: 00:1e.0 cmd <- 06
1584 07:41:23.855611 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 07:41:23.858579 PCI: 00:1e.2 cmd <- 06
1586 07:41:23.862038 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 07:41:23.865532 PCI: 00:1e.3 cmd <- 02
1588 07:41:23.868723 PCI: 00:1f.0 subsystem <- 8086/a087
1589 07:41:23.871646 PCI: 00:1f.0 cmd <- 407
1590 07:41:23.874899 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 07:41:23.875364 PCI: 00:1f.3 cmd <- 02
1592 07:41:23.881693 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 07:41:23.882149 PCI: 00:1f.5 cmd <- 406
1594 07:41:23.886619 PCI: 01:00.0 cmd <- 02
1595 07:41:23.891272 done.
1596 07:41:23.894479 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 07:41:23.897863 Initializing devices...
1598 07:41:23.901201 Root Device init
1599 07:41:23.904626 Chrome EC: Set SMI mask to 0x0000000000000000
1600 07:41:23.910992 Chrome EC: clear events_b mask to 0x0000000000000000
1601 07:41:23.917573 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 07:41:23.921201 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 07:41:23.927886 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 07:41:23.934121 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 07:41:23.937871 fw_config match found: DB_USB=USB3_ACTIVE
1606 07:41:23.944280 Configure Right Type-C port orientation for retimer
1607 07:41:23.947707 Root Device init finished in 43 msecs
1608 07:41:23.950794 PCI: 00:00.0 init
1609 07:41:23.954017 CPU TDP = 9 Watts
1610 07:41:23.954423 CPU PL1 = 9 Watts
1611 07:41:23.957164 CPU PL2 = 40 Watts
1612 07:41:23.957570 CPU PL4 = 83 Watts
1613 07:41:23.963896 PCI: 00:00.0 init finished in 8 msecs
1614 07:41:23.964405 PCI: 00:02.0 init
1615 07:41:23.967158 GMA: Found VBT in CBFS
1616 07:41:23.970375 GMA: Found valid VBT in CBFS
1617 07:41:23.976594 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 07:41:23.983301 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 07:41:23.986723 PCI: 00:02.0 init finished in 18 msecs
1620 07:41:23.990123 PCI: 00:05.0 init
1621 07:41:23.993431 PCI: 00:05.0 init finished in 0 msecs
1622 07:41:23.996826 PCI: 00:08.0 init
1623 07:41:23.999765 PCI: 00:08.0 init finished in 0 msecs
1624 07:41:24.003125 PCI: 00:14.0 init
1625 07:41:24.006514 PCI: 00:14.0 init finished in 0 msecs
1626 07:41:24.009897 PCI: 00:14.2 init
1627 07:41:24.012847 PCI: 00:14.2 init finished in 0 msecs
1628 07:41:24.013323 PCI: 00:15.0 init
1629 07:41:24.016486 I2C bus 0 version 0x3230302a
1630 07:41:24.019446 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 07:41:24.026564 PCI: 00:15.0 init finished in 6 msecs
1632 07:41:24.026979 PCI: 00:15.1 init
1633 07:41:24.029389 I2C bus 1 version 0x3230302a
1634 07:41:24.032593 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 07:41:24.035925 PCI: 00:15.1 init finished in 6 msecs
1636 07:41:24.039612 PCI: 00:15.2 init
1637 07:41:24.042906 I2C bus 2 version 0x3230302a
1638 07:41:24.046214 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 07:41:24.049394 PCI: 00:15.2 init finished in 6 msecs
1640 07:41:24.052638 PCI: 00:15.3 init
1641 07:41:24.056133 I2C bus 3 version 0x3230302a
1642 07:41:24.059148 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 07:41:24.062448 PCI: 00:15.3 init finished in 6 msecs
1644 07:41:24.065918 PCI: 00:16.0 init
1645 07:41:24.069310 PCI: 00:16.0 init finished in 0 msecs
1646 07:41:24.072643 PCI: 00:19.1 init
1647 07:41:24.075953 I2C bus 5 version 0x3230302a
1648 07:41:24.079309 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 07:41:24.082120 PCI: 00:19.1 init finished in 6 msecs
1650 07:41:24.085676 PCI: 00:1d.0 init
1651 07:41:24.086084 Initializing PCH PCIe bridge.
1652 07:41:24.092617 PCI: 00:1d.0 init finished in 3 msecs
1653 07:41:24.095528 PCI: 00:1f.0 init
1654 07:41:24.099056 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 07:41:24.102281 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 07:41:24.105674 IOAPIC: ID = 0x02
1657 07:41:24.108522 IOAPIC: Dumping registers
1658 07:41:24.108927 reg 0x0000: 0x02000000
1659 07:41:24.111872 reg 0x0001: 0x00770020
1660 07:41:24.115265 reg 0x0002: 0x00000000
1661 07:41:24.118709 PCI: 00:1f.0 init finished in 21 msecs
1662 07:41:24.121937 PCI: 00:1f.2 init
1663 07:41:24.125155 Disabling ACPI via APMC.
1664 07:41:24.128759 APMC done.
1665 07:41:24.132002 PCI: 00:1f.2 init finished in 6 msecs
1666 07:41:24.143036 PCI: 01:00.0 init
1667 07:41:24.146177 PCI: 01:00.0 init finished in 0 msecs
1668 07:41:24.149767 PNP: 0c09.0 init
1669 07:41:24.152874 Google Chrome EC uptime: 8.393 seconds
1670 07:41:24.159084 Google Chrome AP resets since EC boot: 1
1671 07:41:24.162622 Google Chrome most recent AP reset causes:
1672 07:41:24.165947 0.454: 32775 shutdown: entering G3
1673 07:41:24.172549 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 07:41:24.175438 PNP: 0c09.0 init finished in 23 msecs
1675 07:41:24.181893 Devices initialized
1676 07:41:24.184874 Show all devs... After init.
1677 07:41:24.188514 Root Device: enabled 1
1678 07:41:24.188922 DOMAIN: 0000: enabled 1
1679 07:41:24.191753 CPU_CLUSTER: 0: enabled 1
1680 07:41:24.195091 PCI: 00:00.0: enabled 1
1681 07:41:24.198877 PCI: 00:02.0: enabled 1
1682 07:41:24.199448 PCI: 00:04.0: enabled 1
1683 07:41:24.201332 PCI: 00:05.0: enabled 1
1684 07:41:24.204566 PCI: 00:06.0: enabled 0
1685 07:41:24.208768 PCI: 00:07.0: enabled 0
1686 07:41:24.209352 PCI: 00:07.1: enabled 0
1687 07:41:24.211226 PCI: 00:07.2: enabled 0
1688 07:41:24.214617 PCI: 00:07.3: enabled 0
1689 07:41:24.218003 PCI: 00:08.0: enabled 1
1690 07:41:24.218428 PCI: 00:09.0: enabled 0
1691 07:41:24.221091 PCI: 00:0a.0: enabled 0
1692 07:41:24.224747 PCI: 00:0d.0: enabled 1
1693 07:41:24.228322 PCI: 00:0d.1: enabled 0
1694 07:41:24.228739 PCI: 00:0d.2: enabled 0
1695 07:41:24.231413 PCI: 00:0d.3: enabled 0
1696 07:41:24.234693 PCI: 00:0e.0: enabled 0
1697 07:41:24.237578 PCI: 00:10.2: enabled 1
1698 07:41:24.237957 PCI: 00:10.6: enabled 0
1699 07:41:24.241187 PCI: 00:10.7: enabled 0
1700 07:41:24.244568 PCI: 00:12.0: enabled 0
1701 07:41:24.247296 PCI: 00:12.6: enabled 0
1702 07:41:24.247835 PCI: 00:13.0: enabled 0
1703 07:41:24.250845 PCI: 00:14.0: enabled 1
1704 07:41:24.254305 PCI: 00:14.1: enabled 0
1705 07:41:24.254721 PCI: 00:14.2: enabled 1
1706 07:41:24.257642 PCI: 00:14.3: enabled 1
1707 07:41:24.260995 PCI: 00:15.0: enabled 1
1708 07:41:24.264509 PCI: 00:15.1: enabled 1
1709 07:41:24.264917 PCI: 00:15.2: enabled 1
1710 07:41:24.267690 PCI: 00:15.3: enabled 1
1711 07:41:24.271095 PCI: 00:16.0: enabled 1
1712 07:41:24.274304 PCI: 00:16.1: enabled 0
1713 07:41:24.274831 PCI: 00:16.2: enabled 0
1714 07:41:24.277368 PCI: 00:16.3: enabled 0
1715 07:41:24.280704 PCI: 00:16.4: enabled 0
1716 07:41:24.284096 PCI: 00:16.5: enabled 0
1717 07:41:24.284531 PCI: 00:17.0: enabled 0
1718 07:41:24.287434 PCI: 00:19.0: enabled 0
1719 07:41:24.290211 PCI: 00:19.1: enabled 1
1720 07:41:24.293658 PCI: 00:19.2: enabled 0
1721 07:41:24.294076 PCI: 00:1c.0: enabled 1
1722 07:41:24.296864 PCI: 00:1c.1: enabled 0
1723 07:41:24.300015 PCI: 00:1c.2: enabled 0
1724 07:41:24.300358 PCI: 00:1c.3: enabled 0
1725 07:41:24.303542 PCI: 00:1c.4: enabled 0
1726 07:41:24.307060 PCI: 00:1c.5: enabled 0
1727 07:41:24.310316 PCI: 00:1c.6: enabled 1
1728 07:41:24.310613 PCI: 00:1c.7: enabled 0
1729 07:41:24.313875 PCI: 00:1d.0: enabled 1
1730 07:41:24.317005 PCI: 00:1d.1: enabled 0
1731 07:41:24.320141 PCI: 00:1d.2: enabled 1
1732 07:41:24.320559 PCI: 00:1d.3: enabled 0
1733 07:41:24.323291 PCI: 00:1e.0: enabled 1
1734 07:41:24.326968 PCI: 00:1e.1: enabled 0
1735 07:41:24.329892 PCI: 00:1e.2: enabled 1
1736 07:41:24.330186 PCI: 00:1e.3: enabled 1
1737 07:41:24.333217 PCI: 00:1f.0: enabled 1
1738 07:41:24.336421 PCI: 00:1f.1: enabled 0
1739 07:41:24.339918 PCI: 00:1f.2: enabled 1
1740 07:41:24.340262 PCI: 00:1f.3: enabled 1
1741 07:41:24.343395 PCI: 00:1f.4: enabled 0
1742 07:41:24.346738 PCI: 00:1f.5: enabled 1
1743 07:41:24.349822 PCI: 00:1f.6: enabled 0
1744 07:41:24.350121 PCI: 00:1f.7: enabled 0
1745 07:41:24.353078 APIC: 00: enabled 1
1746 07:41:24.356621 GENERIC: 0.0: enabled 1
1747 07:41:24.356957 GENERIC: 0.0: enabled 1
1748 07:41:24.359791 GENERIC: 1.0: enabled 1
1749 07:41:24.363342 GENERIC: 0.0: enabled 1
1750 07:41:24.366178 GENERIC: 1.0: enabled 1
1751 07:41:24.366482 USB0 port 0: enabled 1
1752 07:41:24.369570 GENERIC: 0.0: enabled 1
1753 07:41:24.373021 USB0 port 0: enabled 1
1754 07:41:24.373370 GENERIC: 0.0: enabled 1
1755 07:41:24.376227 I2C: 00:1a: enabled 1
1756 07:41:24.379695 I2C: 00:31: enabled 1
1757 07:41:24.383039 I2C: 00:32: enabled 1
1758 07:41:24.383332 I2C: 00:10: enabled 1
1759 07:41:24.386033 I2C: 00:15: enabled 1
1760 07:41:24.389077 GENERIC: 0.0: enabled 0
1761 07:41:24.389470 GENERIC: 1.0: enabled 0
1762 07:41:24.392608 GENERIC: 0.0: enabled 1
1763 07:41:24.396019 SPI: 00: enabled 1
1764 07:41:24.396344 SPI: 00: enabled 1
1765 07:41:24.399516 PNP: 0c09.0: enabled 1
1766 07:41:24.402866 GENERIC: 0.0: enabled 1
1767 07:41:24.403159 USB3 port 0: enabled 1
1768 07:41:24.406266 USB3 port 1: enabled 1
1769 07:41:24.409993 USB3 port 2: enabled 0
1770 07:41:24.412485 USB3 port 3: enabled 0
1771 07:41:24.412787 USB2 port 0: enabled 0
1772 07:41:24.415802 USB2 port 1: enabled 1
1773 07:41:24.419208 USB2 port 2: enabled 1
1774 07:41:24.419540 USB2 port 3: enabled 0
1775 07:41:24.422529 USB2 port 4: enabled 1
1776 07:41:24.425898 USB2 port 5: enabled 0
1777 07:41:24.429510 USB2 port 6: enabled 0
1778 07:41:24.429804 USB2 port 7: enabled 0
1779 07:41:24.432667 USB2 port 8: enabled 0
1780 07:41:24.436103 USB2 port 9: enabled 0
1781 07:41:24.436398 USB3 port 0: enabled 0
1782 07:41:24.438899 USB3 port 1: enabled 1
1783 07:41:24.442316 USB3 port 2: enabled 0
1784 07:41:24.445587 USB3 port 3: enabled 0
1785 07:41:24.445882 GENERIC: 0.0: enabled 1
1786 07:41:24.449188 GENERIC: 1.0: enabled 1
1787 07:41:24.452320 APIC: 03: enabled 1
1788 07:41:24.452702 APIC: 01: enabled 1
1789 07:41:24.455792 APIC: 04: enabled 1
1790 07:41:24.456240 APIC: 07: enabled 1
1791 07:41:24.459184 APIC: 06: enabled 1
1792 07:41:24.462049 APIC: 05: enabled 1
1793 07:41:24.462464 APIC: 02: enabled 1
1794 07:41:24.465331 PCI: 01:00.0: enabled 1
1795 07:41:24.471834 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1796 07:41:24.475254 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1797 07:41:24.478586 ELOG: NV offset 0xf30000 size 0x1000
1798 07:41:24.487083 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1799 07:41:24.493943 ELOG: Event(17) added with size 13 at 2024-01-03 07:41:24 UTC
1800 07:41:24.500257 ELOG: Event(92) added with size 9 at 2024-01-03 07:41:24 UTC
1801 07:41:24.506597 ELOG: Event(93) added with size 9 at 2024-01-03 07:41:24 UTC
1802 07:41:24.513307 ELOG: Event(9E) added with size 10 at 2024-01-03 07:41:24 UTC
1803 07:41:24.520022 ELOG: Event(9F) added with size 14 at 2024-01-03 07:41:24 UTC
1804 07:41:24.526553 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1805 07:41:24.532799 ELOG: Event(A1) added with size 10 at 2024-01-03 07:41:24 UTC
1806 07:41:24.539611 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1807 07:41:24.546273 ELOG: Event(A0) added with size 9 at 2024-01-03 07:41:24 UTC
1808 07:41:24.549046 elog_add_boot_reason: Logged dev mode boot
1809 07:41:24.555726 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1810 07:41:24.559175 Finalize devices...
1811 07:41:24.559756 Devices finalized
1812 07:41:24.565931 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1813 07:41:24.569323 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1814 07:41:24.575742 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1815 07:41:24.582436 ME: HFSTS1 : 0x80030055
1816 07:41:24.585377 ME: HFSTS2 : 0x30280116
1817 07:41:24.588569 ME: HFSTS3 : 0x00000050
1818 07:41:24.595673 ME: HFSTS4 : 0x00004000
1819 07:41:24.599114 ME: HFSTS5 : 0x00000000
1820 07:41:24.601891 ME: HFSTS6 : 0x40400006
1821 07:41:24.605207 ME: Manufacturing Mode : YES
1822 07:41:24.612019 ME: SPI Protection Mode Enabled : NO
1823 07:41:24.615328 ME: FW Partition Table : OK
1824 07:41:24.618982 ME: Bringup Loader Failure : NO
1825 07:41:24.621657 ME: Firmware Init Complete : NO
1826 07:41:24.624994 ME: Boot Options Present : NO
1827 07:41:24.628511 ME: Update In Progress : NO
1828 07:41:24.631767 ME: D0i3 Support : YES
1829 07:41:24.635093 ME: Low Power State Enabled : NO
1830 07:41:24.641577 ME: CPU Replaced : YES
1831 07:41:24.644853 ME: CPU Replacement Valid : YES
1832 07:41:24.648219 ME: Current Working State : 5
1833 07:41:24.651157 ME: Current Operation State : 1
1834 07:41:24.654497 ME: Current Operation Mode : 3
1835 07:41:24.658145 ME: Error Code : 0
1836 07:41:24.661503 ME: Enhanced Debug Mode : NO
1837 07:41:24.664586 ME: CPU Debug Disabled : YES
1838 07:41:24.671093 ME: TXT Support : NO
1839 07:41:24.677501 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1840 07:41:24.683808 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1841 07:41:24.687150 CBFS: 'fallback/slic' not found.
1842 07:41:24.690607 ACPI: Writing ACPI tables at 76b01000.
1843 07:41:24.693904 ACPI: * FACS
1844 07:41:24.694464 ACPI: * DSDT
1845 07:41:24.697145 Ramoops buffer: 0x100000@0x76a00000.
1846 07:41:24.703967 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1847 07:41:24.707100 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1848 07:41:24.710585 Google Chrome EC: version:
1849 07:41:24.713753 ro: voema_v2.0.10114-a447f03e46
1850 07:41:24.717246 rw: voema_v2.0.10114-a447f03e46
1851 07:41:24.720376 running image: 2
1852 07:41:24.727128 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1853 07:41:24.730445 ACPI: * FADT
1854 07:41:24.730823 SCI is IRQ9
1855 07:41:24.736900 ACPI: added table 1/32, length now 40
1856 07:41:24.737327 ACPI: * SSDT
1857 07:41:24.740656 Found 1 CPU(s) with 8 core(s) each.
1858 07:41:24.747093 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1859 07:41:24.750231 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1860 07:41:24.753622 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1861 07:41:24.756949 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1862 07:41:24.763699 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1863 07:41:24.769797 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1864 07:41:24.773549 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1865 07:41:24.780304 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1866 07:41:24.786917 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1867 07:41:24.790369 \_SB.PCI0.RP09: Added StorageD3Enable property
1868 07:41:24.796949 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1869 07:41:24.799699 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1870 07:41:24.806672 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1871 07:41:24.810159 PS2K: Passing 80 keymaps to kernel
1872 07:41:24.816516 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1873 07:41:24.823545 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1874 07:41:24.829724 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1875 07:41:24.836521 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1876 07:41:24.843050 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1877 07:41:24.849664 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1878 07:41:24.856214 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1879 07:41:24.863000 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1880 07:41:24.866728 ACPI: added table 2/32, length now 44
1881 07:41:24.869297 ACPI: * MCFG
1882 07:41:24.872675 ACPI: added table 3/32, length now 48
1883 07:41:24.873086 ACPI: * TPM2
1884 07:41:24.876020 TPM2 log created at 0x769f0000
1885 07:41:24.879175 ACPI: added table 4/32, length now 52
1886 07:41:24.882757 ACPI: * MADT
1887 07:41:24.883327 SCI is IRQ9
1888 07:41:24.885820 ACPI: added table 5/32, length now 56
1889 07:41:24.889080 current = 76b09850
1890 07:41:24.892796 ACPI: * DMAR
1891 07:41:24.896157 ACPI: added table 6/32, length now 60
1892 07:41:24.899374 ACPI: added table 7/32, length now 64
1893 07:41:24.899781 ACPI: * HPET
1894 07:41:24.905605 ACPI: added table 8/32, length now 68
1895 07:41:24.906013 ACPI: done.
1896 07:41:24.908809 ACPI tables: 35216 bytes.
1897 07:41:24.912029 smbios_write_tables: 769ef000
1898 07:41:24.915522 EC returned error result code 3
1899 07:41:24.918931 Couldn't obtain OEM name from CBI
1900 07:41:24.921772 Create SMBIOS type 16
1901 07:41:24.922010 Create SMBIOS type 17
1902 07:41:24.925204 GENERIC: 0.0 (WIFI Device)
1903 07:41:24.928558 SMBIOS tables: 1734 bytes.
1904 07:41:24.931925 Writing table forward entry at 0x00000500
1905 07:41:24.938100 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1906 07:41:24.941432 Writing coreboot table at 0x76b25000
1907 07:41:24.948361 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1908 07:41:24.955098 1. 0000000000001000-000000000009ffff: RAM
1909 07:41:24.958228 2. 00000000000a0000-00000000000fffff: RESERVED
1910 07:41:24.961442 3. 0000000000100000-00000000769eefff: RAM
1911 07:41:24.968124 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1912 07:41:24.974909 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1913 07:41:24.977839 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1914 07:41:24.984593 7. 0000000077000000-000000007fbfffff: RESERVED
1915 07:41:24.987780 8. 00000000c0000000-00000000cfffffff: RESERVED
1916 07:41:24.994472 9. 00000000f8000000-00000000f9ffffff: RESERVED
1917 07:41:24.997809 10. 00000000fb000000-00000000fb000fff: RESERVED
1918 07:41:25.004477 11. 00000000fe000000-00000000fe00ffff: RESERVED
1919 07:41:25.008021 12. 00000000fed80000-00000000fed87fff: RESERVED
1920 07:41:25.014134 13. 00000000fed90000-00000000fed92fff: RESERVED
1921 07:41:25.017487 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 07:41:25.020824 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 07:41:25.027691 16. 0000000100000000-00000004803fffff: RAM
1924 07:41:25.031025 Passing 4 GPIOs to payload:
1925 07:41:25.033989 NAME | PORT | POLARITY | VALUE
1926 07:41:25.040519 lid | undefined | high | high
1927 07:41:25.043915 power | undefined | high | low
1928 07:41:25.050609 oprom | undefined | high | low
1929 07:41:25.057258 EC in RW | 0x000000e5 | high | high
1930 07:41:25.063545 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1931 07:41:25.064129 coreboot table: 1576 bytes.
1932 07:41:25.070303 IMD ROOT 0. 0x76fff000 0x00001000
1933 07:41:25.073992 IMD SMALL 1. 0x76ffe000 0x00001000
1934 07:41:25.077232 FSP MEMORY 2. 0x76c4e000 0x003b0000
1935 07:41:25.080180 VPD 3. 0x76c4d000 0x00000367
1936 07:41:25.083398 RO MCACHE 4. 0x76c4c000 0x00000fdc
1937 07:41:25.086824 CONSOLE 5. 0x76c2c000 0x00020000
1938 07:41:25.090593 FMAP 6. 0x76c2b000 0x00000578
1939 07:41:25.094054 TIME STAMP 7. 0x76c2a000 0x00000910
1940 07:41:25.100014 VBOOT WORK 8. 0x76c16000 0x00014000
1941 07:41:25.103175 ROMSTG STCK 9. 0x76c15000 0x00001000
1942 07:41:25.106710 AFTER CAR 10. 0x76c0a000 0x0000b000
1943 07:41:25.109787 RAMSTAGE 11. 0x76b97000 0x00073000
1944 07:41:25.113136 REFCODE 12. 0x76b42000 0x00055000
1945 07:41:25.116613 SMM BACKUP 13. 0x76b32000 0x00010000
1946 07:41:25.119601 4f444749 14. 0x76b30000 0x00002000
1947 07:41:25.123386 EXT VBT15. 0x76b2d000 0x0000219f
1948 07:41:25.126396 COREBOOT 16. 0x76b25000 0x00008000
1949 07:41:25.133505 ACPI 17. 0x76b01000 0x00024000
1950 07:41:25.136870 ACPI GNVS 18. 0x76b00000 0x00001000
1951 07:41:25.139541 RAMOOPS 19. 0x76a00000 0x00100000
1952 07:41:25.142930 TPM2 TCGLOG20. 0x769f0000 0x00010000
1953 07:41:25.146305 SMBIOS 21. 0x769ef000 0x00000800
1954 07:41:25.149666 IMD small region:
1955 07:41:25.152834 IMD ROOT 0. 0x76ffec00 0x00000400
1956 07:41:25.156321 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1957 07:41:25.159118 POWER STATE 2. 0x76ffeb80 0x00000044
1958 07:41:25.162444 ROMSTAGE 3. 0x76ffeb60 0x00000004
1959 07:41:25.169103 MEM INFO 4. 0x76ffe980 0x000001e0
1960 07:41:25.172454 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1961 07:41:25.175936 MTRR: Physical address space:
1962 07:41:25.182302 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1963 07:41:25.189097 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1964 07:41:25.195928 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1965 07:41:25.202266 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1966 07:41:25.208983 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1967 07:41:25.215544 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1968 07:41:25.221939 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1969 07:41:25.224982 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 07:41:25.228429 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 07:41:25.231936 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 07:41:25.238341 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 07:41:25.241560 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 07:41:25.244836 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 07:41:25.248221 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 07:41:25.255230 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 07:41:25.258531 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 07:41:25.262113 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 07:41:25.264807 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 07:41:25.269822 call enable_fixed_mtrr()
1981 07:41:25.273098 CPU physical address size: 39 bits
1982 07:41:25.279848 MTRR: default type WB/UC MTRR counts: 6/7.
1983 07:41:25.282751 MTRR: WB selected as default type.
1984 07:41:25.289606 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 07:41:25.292977 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 07:41:25.299670 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 07:41:25.306309 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1988 07:41:25.312791 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1989 07:41:25.319051 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1990 07:41:25.322573
1991 07:41:25.322708 MTRR check
1992 07:41:25.325968 Fixed MTRRs : Enabled
1993 07:41:25.326061 Variable MTRRs: Enabled
1994 07:41:25.326133
1995 07:41:25.332871 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 07:41:25.335901 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 07:41:25.339284 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 07:41:25.342546 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 07:41:25.349348 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 07:41:25.352573 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 07:41:25.355738 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 07:41:25.359158 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 07:41:25.365919 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 07:41:25.369356 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 07:41:25.372186 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 07:41:25.380159 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2007 07:41:25.383431 call enable_fixed_mtrr()
2008 07:41:25.386954 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 07:41:25.393579 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 07:41:25.396295 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 07:41:25.399744 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 07:41:25.402970 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 07:41:25.406312 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 07:41:25.412894 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 07:41:25.416322 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 07:41:25.419710 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 07:41:25.423050 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 07:41:25.429800 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 07:41:25.432802 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 07:41:25.439772 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 07:41:25.440304 call enable_fixed_mtrr()
2022 07:41:25.446566 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 07:41:25.449530 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 07:41:25.452981 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 07:41:25.455831 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 07:41:25.462953 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 07:41:25.466023 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 07:41:25.469781 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 07:41:25.472856 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 07:41:25.479054 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 07:41:25.482406 CPU physical address size: 39 bits
2032 07:41:25.486900 call enable_fixed_mtrr()
2033 07:41:25.490351 CPU physical address size: 39 bits
2034 07:41:25.495366 Checking cr50 for pending updates
2035 07:41:25.499262 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 07:41:25.505815 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 07:41:25.509188 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 07:41:25.512754 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 07:41:25.515908 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 07:41:25.522346 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 07:41:25.525770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 07:41:25.528962 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 07:41:25.532386 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 07:41:25.539045 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 07:41:25.542313 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 07:41:25.545666 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 07:41:25.552924 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 07:41:25.553467 call enable_fixed_mtrr()
2049 07:41:25.559426 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 07:41:25.562501 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 07:41:25.565846 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 07:41:25.569155 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 07:41:25.575884 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 07:41:25.579191 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 07:41:25.582012 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 07:41:25.585885 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 07:41:25.592281 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 07:41:25.596022 CPU physical address size: 39 bits
2059 07:41:25.599909 call enable_fixed_mtrr()
2060 07:41:25.603256 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 07:41:25.609945 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 07:41:25.613088 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 07:41:25.616395 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 07:41:25.619671 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 07:41:25.626728 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 07:41:25.629794 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 07:41:25.633279 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 07:41:25.636033 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 07:41:25.642912 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 07:41:25.646075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 07:41:25.649210 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 07:41:25.657323 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 07:41:25.657756 call enable_fixed_mtrr()
2074 07:41:25.663813 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 07:41:25.666926 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 07:41:25.670217 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 07:41:25.673241 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 07:41:25.680252 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 07:41:25.683092 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 07:41:25.687009 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 07:41:25.689945 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 07:41:25.696263 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 07:41:25.699640 CPU physical address size: 39 bits
2084 07:41:25.704377 call enable_fixed_mtrr()
2085 07:41:25.707897 CPU physical address size: 39 bits
2086 07:41:25.710771 CPU physical address size: 39 bits
2087 07:41:25.714730 CPU physical address size: 39 bits
2088 07:41:25.717712 Reading cr50 TPM mode
2089 07:41:25.728131 BS: BS_PAYLOAD_LOAD entry times (exec / console): 333 / 8 ms
2090 07:41:25.737765 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2091 07:41:25.741274 Checking segment from ROM address 0xffc02b38
2092 07:41:25.744596 Checking segment from ROM address 0xffc02b54
2093 07:41:25.750689 Loading segment from ROM address 0xffc02b38
2094 07:41:25.751157 code (compression=0)
2095 07:41:25.761151 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 07:41:25.770724 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 07:41:25.771145 it's not compressed!
2098 07:41:25.912314 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 07:41:25.919146 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 07:41:25.925871 Loading segment from ROM address 0xffc02b54
2101 07:41:25.929235 Entry Point 0x30000000
2102 07:41:25.929649 Loaded segments
2103 07:41:25.935215 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2104 07:41:25.980510 Finalizing chipset.
2105 07:41:25.984018 Finalizing SMM.
2106 07:41:25.984634 APMC done.
2107 07:41:25.990833 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2108 07:41:25.994071 mp_park_aps done after 0 msecs.
2109 07:41:25.997424 Jumping to boot code at 0x30000000(0x76b25000)
2110 07:41:26.006823 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 07:41:26.007388
2112 07:41:26.009940
2113 07:41:26.010395
2114 07:41:26.011623 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2115 07:41:26.012374 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2116 07:41:26.012876 Setting prompt string to ['volteer:']
2117 07:41:26.013331 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2118 07:41:26.014048 Starting depthcharge on Voema...
2119 07:41:26.014467
2120 07:41:26.019749 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 07:41:26.020259
2122 07:41:26.026900 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 07:41:26.027357
2124 07:41:26.032847 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 07:41:26.033423
2126 07:41:26.036319 Failed to find eMMC card reader
2127 07:41:26.036865
2128 07:41:26.039664 Wipe memory regions:
2129 07:41:26.040235
2130 07:41:26.042978 [0x00000000001000, 0x000000000a0000)
2131 07:41:26.043388
2132 07:41:26.046235 [0x00000000100000, 0x00000030000000)
2133 07:41:26.082152
2134 07:41:26.085745 [0x00000032662db0, 0x000000769ef000)
2135 07:41:26.135519
2136 07:41:26.138865 [0x00000100000000, 0x00000480400000)
2137 07:41:26.773146
2138 07:41:26.776154 ec_init: CrosEC protocol v3 supported (256, 256)
2139 07:41:27.206828
2140 07:41:27.207373 R8152: Initializing
2141 07:41:27.207736
2142 07:41:27.210252 Version 6 (ocp_data = 5c30)
2143 07:41:27.210958
2144 07:41:27.213715 R8152: Done initializing
2145 07:41:27.214361
2146 07:41:27.216947 Adding net device
2147 07:41:27.519339
2148 07:41:27.522769 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 07:41:27.523200
2150 07:41:27.523530
2151 07:41:27.523830
2152 07:41:27.525911 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 07:41:27.627126 volteer: tftpboot 192.168.201.1 12435181/tftp-deploy-7mvsnkdj/kernel/bzImage 12435181/tftp-deploy-7mvsnkdj/kernel/cmdline 12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
2155 07:41:27.627804 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 07:41:27.628372 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2157 07:41:27.632573 tftpboot 192.168.201.1 12435181/tftp-deploy-7mvsnkdj/kernel/bzIploy-7mvsnkdj/kernel/cmdline 12435181/tftp-deploy-7mvsnkdj/ramdisk/ramdisk.cpio.gz
2158 07:41:27.633052
2159 07:41:27.633416 Waiting for link
2160 07:41:27.835868
2161 07:41:27.836474 done.
2162 07:41:27.836809
2163 07:41:27.837114 MAC: 00:24:32:30:7a:04
2164 07:41:27.837453
2165 07:41:27.839055 Sending DHCP discover... done.
2166 07:41:27.839464
2167 07:41:27.842126 Waiting for reply... done.
2168 07:41:27.842541
2169 07:41:27.845467 Sending DHCP request... done.
2170 07:41:27.845881
2171 07:41:27.848868 Waiting for reply... done.
2172 07:41:27.849280
2173 07:41:27.852211 My ip is 192.168.201.22
2174 07:41:27.852626
2175 07:41:27.855504 The DHCP server ip is 192.168.201.1
2176 07:41:27.856083
2177 07:41:27.858658 TFTP server IP predefined by user: 192.168.201.1
2178 07:41:27.859220
2179 07:41:27.864903 Bootfile predefined by user: 12435181/tftp-deploy-7mvsnkdj/kernel/bzImage
2180 07:41:27.868540
2181 07:41:27.871331 Sending tftp read request... done.
2182 07:41:27.871750
2183 07:41:27.878510 Waiting for the transfer...
2184 07:41:27.879097
2185 07:41:28.560149 00000000 ################################################################
2186 07:41:28.560670
2187 07:41:29.245210 00080000 ################################################################
2188 07:41:29.245713
2189 07:41:29.946725 00100000 ################################################################
2190 07:41:29.947240
2191 07:41:30.567636 00180000 ################################################################
2192 07:41:30.568211
2193 07:41:31.185959 00200000 ################################################################
2194 07:41:31.186110
2195 07:41:31.806817 00280000 ################################################################
2196 07:41:31.806967
2197 07:41:32.433368 00300000 ################################################################
2198 07:41:32.433950
2199 07:41:33.059943 00380000 ################################################################
2200 07:41:33.060101
2201 07:41:33.724535 00400000 ################################################################
2202 07:41:33.725047
2203 07:41:34.425997 00480000 ################################################################
2204 07:41:34.426503
2205 07:41:35.142872 00500000 ################################################################
2206 07:41:35.143432
2207 07:41:35.712101 00580000 ################################################################
2208 07:41:35.712272
2209 07:41:36.295804 00600000 ################################################################
2210 07:41:36.295972
2211 07:41:36.947776 00680000 ################################################################
2212 07:41:36.947931
2213 07:41:37.587320 00700000 ################################################################
2214 07:41:37.587501
2215 07:41:38.193689 00780000 ################################################################
2216 07:41:38.194222
2217 07:41:38.424863 00800000 ####################### done.
2218 07:41:38.425398
2219 07:41:38.428264 The bootfile was 8572816 bytes long.
2220 07:41:38.428702
2221 07:41:38.431471 Sending tftp read request... done.
2222 07:41:38.431905
2223 07:41:38.434879 Waiting for the transfer...
2224 07:41:38.435379
2225 07:41:39.128029 00000000 ################################################################
2226 07:41:39.128591
2227 07:41:39.816256 00080000 ################################################################
2228 07:41:39.816400
2229 07:41:40.486747 00100000 ################################################################
2230 07:41:40.487285
2231 07:41:41.152969 00180000 ################################################################
2232 07:41:41.153583
2233 07:41:41.863409 00200000 ################################################################
2234 07:41:41.863566
2235 07:41:42.524679 00280000 ################################################################
2236 07:41:42.524930
2237 07:41:43.143524 00300000 ################################################################
2238 07:41:43.143662
2239 07:41:43.763880 00380000 ################################################################
2240 07:41:43.764060
2241 07:41:44.310903 00400000 ################################################################
2242 07:41:44.311054
2243 07:41:44.874521 00480000 ################################################################
2244 07:41:44.874674
2245 07:41:45.452417 00500000 ################################################################
2246 07:41:45.452596
2247 07:41:45.712727 00580000 ############################# done.
2248 07:41:45.712877
2249 07:41:45.715925 Sending tftp read request... done.
2250 07:41:45.716008
2251 07:41:45.719294 Waiting for the transfer...
2252 07:41:45.719377
2253 07:41:45.719441 00000000 # done.
2254 07:41:45.719503
2255 07:41:45.728950 Command line loaded dynamically from TFTP file: 12435181/tftp-deploy-7mvsnkdj/kernel/cmdline
2256 07:41:45.729036
2257 07:41:45.755407 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12435181/extract-nfsrootfs-jc7b9xhg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2258 07:41:45.755530
2259 07:41:45.758603 Shutting down all USB controllers.
2260 07:41:45.758686
2261 07:41:45.762076 Removing current net device
2262 07:41:45.762157
2263 07:41:45.765483 Finalizing coreboot
2264 07:41:45.765807
2265 07:41:45.771997 Exiting depthcharge with code 4 at timestamp: 28343867
2266 07:41:45.772260
2267 07:41:45.772472
2268 07:41:45.772652 Starting kernel ...
2269 07:41:45.772825
2270 07:41:45.772992
2271 07:41:45.773708 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2272 07:41:45.773980 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2273 07:41:45.774198 Setting prompt string to ['Linux version [0-9]']
2274 07:41:45.774393 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2275 07:41:45.774593 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2277 07:46:10.774368 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2279 07:46:10.774584 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2281 07:46:10.774757 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2284 07:46:10.775039 end: 2 depthcharge-action (duration 00:05:00) [common]
2286 07:46:10.775316 Cleaning after the job
2287 07:46:10.775433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/ramdisk
2288 07:46:10.776567 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/kernel
2289 07:46:10.778054 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/nfsrootfs
2290 07:46:10.891165 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12435181/tftp-deploy-7mvsnkdj/modules
2291 07:46:10.891619 start: 4.1 power-off (timeout 00:00:30) [common]
2292 07:46:10.891788 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2293 07:46:10.970060 >> Command sent successfully.
2294 07:46:10.981127 Returned 0 in 0 seconds
2295 07:46:11.082448 end: 4.1 power-off (duration 00:00:00) [common]
2297 07:46:11.084278 start: 4.2 read-feedback (timeout 00:10:00) [common]
2298 07:46:11.085717 Listened to connection for namespace 'common' for up to 1s
2299 07:46:12.086432 Finalising connection for namespace 'common'
2300 07:46:12.087143 Disconnecting from shell: Finalise
2301 07:46:12.087562
2302 07:46:12.188480 end: 4.2 read-feedback (duration 00:00:01) [common]
2303 07:46:12.189209 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12435181
2304 07:46:12.743639 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12435181
2305 07:46:12.743862 JobError: Your job cannot terminate cleanly.