Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 05:05:26.424216 lava-dispatcher, installed at version: 2024.01
2 05:05:26.424454 start: 0 validate
3 05:05:26.424592 Start time: 2024-02-07 05:05:26.424584+00:00 (UTC)
4 05:05:26.424724 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:05:26.424855 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 05:05:26.694567 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:05:26.695701 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1250-gd530578b1386%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:05:26.967151 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:05:26.967970 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1250-gd530578b1386%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 05:05:29.895993 validate duration: 3.47
12 05:05:29.897583 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:05:29.898334 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:05:29.898977 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:05:29.899737 Not decompressing ramdisk as can be used compressed.
16 05:05:29.900413 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 05:05:29.900836 saving as /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/ramdisk/rootfs.cpio.gz
18 05:05:29.901214 total size: 8418130 (8 MB)
19 05:05:30.419340 progress 0 % (0 MB)
20 05:05:30.434363 progress 5 % (0 MB)
21 05:05:30.448436 progress 10 % (0 MB)
22 05:05:30.456468 progress 15 % (1 MB)
23 05:05:30.461915 progress 20 % (1 MB)
24 05:05:30.466396 progress 25 % (2 MB)
25 05:05:30.470264 progress 30 % (2 MB)
26 05:05:30.473763 progress 35 % (2 MB)
27 05:05:30.477032 progress 40 % (3 MB)
28 05:05:30.479987 progress 45 % (3 MB)
29 05:05:30.482846 progress 50 % (4 MB)
30 05:05:30.485463 progress 55 % (4 MB)
31 05:05:30.487931 progress 60 % (4 MB)
32 05:05:30.490270 progress 65 % (5 MB)
33 05:05:30.492625 progress 70 % (5 MB)
34 05:05:30.494840 progress 75 % (6 MB)
35 05:05:30.497112 progress 80 % (6 MB)
36 05:05:30.499334 progress 85 % (6 MB)
37 05:05:30.501604 progress 90 % (7 MB)
38 05:05:30.503827 progress 95 % (7 MB)
39 05:05:30.506014 progress 100 % (8 MB)
40 05:05:30.506250 8 MB downloaded in 0.61 s (13.27 MB/s)
41 05:05:30.506410 end: 1.1.1 http-download (duration 00:00:01) [common]
43 05:05:30.506651 end: 1.1 download-retry (duration 00:00:01) [common]
44 05:05:30.506746 start: 1.2 download-retry (timeout 00:09:59) [common]
45 05:05:30.506832 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 05:05:30.506967 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1250-gd530578b1386/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 05:05:30.507039 saving as /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/kernel/bzImage
48 05:05:30.507099 total size: 8576912 (8 MB)
49 05:05:30.507160 No compression specified
50 05:05:30.508281 progress 0 % (0 MB)
51 05:05:30.510605 progress 5 % (0 MB)
52 05:05:30.513028 progress 10 % (0 MB)
53 05:05:30.515435 progress 15 % (1 MB)
54 05:05:30.517777 progress 20 % (1 MB)
55 05:05:30.520045 progress 25 % (2 MB)
56 05:05:30.522415 progress 30 % (2 MB)
57 05:05:30.524772 progress 35 % (2 MB)
58 05:05:30.527068 progress 40 % (3 MB)
59 05:05:30.529413 progress 45 % (3 MB)
60 05:05:30.531810 progress 50 % (4 MB)
61 05:05:30.534119 progress 55 % (4 MB)
62 05:05:30.536564 progress 60 % (4 MB)
63 05:05:30.538837 progress 65 % (5 MB)
64 05:05:30.541091 progress 70 % (5 MB)
65 05:05:30.543319 progress 75 % (6 MB)
66 05:05:30.545719 progress 80 % (6 MB)
67 05:05:30.548153 progress 85 % (6 MB)
68 05:05:30.550419 progress 90 % (7 MB)
69 05:05:30.552673 progress 95 % (7 MB)
70 05:05:30.554963 progress 100 % (8 MB)
71 05:05:30.555185 8 MB downloaded in 0.05 s (170.12 MB/s)
72 05:05:30.555345 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:05:30.555733 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:05:30.555870 start: 1.3 download-retry (timeout 00:09:59) [common]
76 05:05:30.556000 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 05:05:30.556181 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1250-gd530578b1386/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 05:05:30.556253 saving as /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/modules/modules.tar
79 05:05:30.556316 total size: 250816 (0 MB)
80 05:05:30.556402 Using unxz to decompress xz
81 05:05:30.560696 progress 13 % (0 MB)
82 05:05:30.561109 progress 26 % (0 MB)
83 05:05:30.561344 progress 39 % (0 MB)
84 05:05:30.562921 progress 52 % (0 MB)
85 05:05:30.564777 progress 65 % (0 MB)
86 05:05:30.566618 progress 78 % (0 MB)
87 05:05:30.568444 progress 91 % (0 MB)
88 05:05:30.570430 progress 100 % (0 MB)
89 05:05:30.575856 0 MB downloaded in 0.02 s (12.25 MB/s)
90 05:05:30.576186 end: 1.3.1 http-download (duration 00:00:00) [common]
92 05:05:30.576461 end: 1.3 download-retry (duration 00:00:00) [common]
93 05:05:30.576561 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 05:05:30.576660 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 05:05:30.576755 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 05:05:30.576869 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 05:05:30.577116 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel
98 05:05:30.577257 makedir: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin
99 05:05:30.577363 makedir: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/tests
100 05:05:30.577465 makedir: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/results
101 05:05:30.577579 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-add-keys
102 05:05:30.577726 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-add-sources
103 05:05:30.577860 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-background-process-start
104 05:05:30.577997 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-background-process-stop
105 05:05:30.578128 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-common-functions
106 05:05:30.578257 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-echo-ipv4
107 05:05:30.578403 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-install-packages
108 05:05:30.578533 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-installed-packages
109 05:05:30.578662 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-os-build
110 05:05:30.578795 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-probe-channel
111 05:05:30.578923 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-probe-ip
112 05:05:30.579052 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-target-ip
113 05:05:30.579199 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-target-mac
114 05:05:30.579327 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-target-storage
115 05:05:30.579463 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-case
116 05:05:30.579599 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-event
117 05:05:30.579729 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-feedback
118 05:05:30.579858 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-raise
119 05:05:30.579991 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-reference
120 05:05:30.580204 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-runner
121 05:05:30.580335 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-set
122 05:05:30.580468 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-test-shell
123 05:05:30.580601 Updating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-install-packages (oe)
124 05:05:30.580759 Updating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/bin/lava-installed-packages (oe)
125 05:05:30.580887 Creating /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/environment
126 05:05:30.580998 LAVA metadata
127 05:05:30.581076 - LAVA_JOB_ID=12711661
128 05:05:30.581144 - LAVA_DISPATCHER_IP=192.168.201.1
129 05:05:30.581250 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 05:05:30.581317 skipped lava-vland-overlay
131 05:05:30.581396 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 05:05:30.581479 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 05:05:30.581554 skipped lava-multinode-overlay
134 05:05:30.581630 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 05:05:30.581712 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 05:05:30.581786 Loading test definitions
137 05:05:30.581879 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 05:05:30.581955 Using /lava-12711661 at stage 0
139 05:05:30.582277 uuid=12711661_1.4.2.3.1 testdef=None
140 05:05:30.582365 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 05:05:30.582452 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 05:05:30.582989 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 05:05:30.583218 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 05:05:30.583870 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 05:05:30.584151 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 05:05:30.584785 runner path: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/0/tests/0_dmesg test_uuid 12711661_1.4.2.3.1
149 05:05:30.584942 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 05:05:30.585169 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 05:05:30.585241 Using /lava-12711661 at stage 1
153 05:05:30.585538 uuid=12711661_1.4.2.3.5 testdef=None
154 05:05:30.585626 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 05:05:30.585711 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 05:05:30.586185 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 05:05:30.586406 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 05:05:30.587051 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 05:05:30.587278 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 05:05:30.587909 runner path: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/1/tests/1_bootrr test_uuid 12711661_1.4.2.3.5
163 05:05:30.588074 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 05:05:30.588315 Creating lava-test-runner.conf files
166 05:05:30.588381 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/0 for stage 0
167 05:05:30.588472 - 0_dmesg
168 05:05:30.588552 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711661/lava-overlay-dpwgdxel/lava-12711661/1 for stage 1
169 05:05:30.588643 - 1_bootrr
170 05:05:30.588741 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 05:05:30.588841 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 05:05:30.597125 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 05:05:30.597240 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 05:05:30.597328 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 05:05:30.597418 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 05:05:30.597503 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 05:05:30.856117 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 05:05:30.856527 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 05:05:30.856650 extracting modules file /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12711661/extract-overlay-ramdisk-6igvr_x7/ramdisk
180 05:05:30.871634 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 05:05:30.871796 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 05:05:30.871889 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711661/compress-overlay-5bkn3g9j/overlay-1.4.2.4.tar.gz to ramdisk
183 05:05:30.871987 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711661/compress-overlay-5bkn3g9j/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12711661/extract-overlay-ramdisk-6igvr_x7/ramdisk
184 05:05:30.882303 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 05:05:30.882457 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 05:05:30.882589 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 05:05:30.882713 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 05:05:30.882820 Building ramdisk /var/lib/lava/dispatcher/tmp/12711661/extract-overlay-ramdisk-6igvr_x7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12711661/extract-overlay-ramdisk-6igvr_x7/ramdisk
189 05:05:31.029884 >> 49790 blocks
190 05:05:31.889321 rename /var/lib/lava/dispatcher/tmp/12711661/extract-overlay-ramdisk-6igvr_x7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
191 05:05:31.889863 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 05:05:31.890011 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 05:05:31.890120 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 05:05:31.890228 No mkimage arch provided, not using FIT.
195 05:05:31.890323 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 05:05:31.890407 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 05:05:31.890512 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 05:05:31.890604 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 05:05:31.890722 No LXC device requested
200 05:05:31.890837 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 05:05:31.890943 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 05:05:31.891028 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 05:05:31.891114 Checking files for TFTP limit of 4294967296 bytes.
204 05:05:31.891523 end: 1 tftp-deploy (duration 00:00:02) [common]
205 05:05:31.891633 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 05:05:31.891727 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 05:05:31.891857 substitutions:
208 05:05:31.891926 - {DTB}: None
209 05:05:31.891987 - {INITRD}: 12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
210 05:05:31.892045 - {KERNEL}: 12711661/tftp-deploy-t6tj9b4e/kernel/bzImage
211 05:05:31.892153 - {LAVA_MAC}: None
212 05:05:31.892212 - {PRESEED_CONFIG}: None
213 05:05:31.892267 - {PRESEED_LOCAL}: None
214 05:05:31.892348 - {RAMDISK}: 12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
215 05:05:31.892431 - {ROOT_PART}: None
216 05:05:31.892510 - {ROOT}: None
217 05:05:31.892597 - {SERVER_IP}: 192.168.201.1
218 05:05:31.892689 - {TEE}: None
219 05:05:31.892768 Parsed boot commands:
220 05:05:31.892847 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 05:05:31.893095 Parsed boot commands: tftpboot 192.168.201.1 12711661/tftp-deploy-t6tj9b4e/kernel/bzImage 12711661/tftp-deploy-t6tj9b4e/kernel/cmdline 12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
222 05:05:31.893225 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 05:05:31.893347 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 05:05:31.893477 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 05:05:31.893598 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 05:05:31.893700 Not connected, no need to disconnect.
227 05:05:31.893807 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 05:05:31.894049 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 05:05:31.894123 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
230 05:05:31.898178 Setting prompt string to ['lava-test: # ']
231 05:05:31.898604 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 05:05:31.898719 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 05:05:31.898813 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 05:05:31.898907 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 05:05:31.899109 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
236 05:05:37.033138 >> Command sent successfully.
237 05:05:37.035600 Returned 0 in 5 seconds
238 05:05:37.136032 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 05:05:37.136507 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 05:05:37.136615 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 05:05:37.136754 Setting prompt string to 'Starting depthcharge on Helios...'
243 05:05:37.136837 Changing prompt to 'Starting depthcharge on Helios...'
244 05:05:37.136937 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 05:05:37.137327 [Enter `^Ec?' for help]
246 05:05:37.755616
247 05:05:37.755757
248 05:05:37.765720 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 05:05:37.768912 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 05:05:37.775252 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 05:05:37.778565 CPU: AES supported, TXT NOT supported, VT supported
252 05:05:37.785407 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 05:05:37.789031 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 05:05:37.795830 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 05:05:37.798740 VBOOT: Loading verstage.
256 05:05:37.802673 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 05:05:37.809025 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 05:05:37.812467 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 05:05:37.815304 CBFS @ c08000 size 3f8000
260 05:05:37.821785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 05:05:37.825277 CBFS: Locating 'fallback/verstage'
262 05:05:37.828606 CBFS: Found @ offset 10fb80 size 1072c
263 05:05:37.832237
264 05:05:37.832320
265 05:05:37.842259 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 05:05:37.856409 Probing TPM: . done!
267 05:05:37.859865 TPM ready after 0 ms
268 05:05:37.863461 Connected to device vid:did:rid of 1ae0:0028:00
269 05:05:37.873470 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
270 05:05:37.876747 Initialized TPM device CR50 revision 0
271 05:05:37.923848 tlcl_send_startup: Startup return code is 0
272 05:05:37.923967 TPM: setup succeeded
273 05:05:37.936948 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 05:05:37.940335 Chrome EC: UHEPI supported
275 05:05:37.943842 Phase 1
276 05:05:37.947159 FMAP: area GBB found @ c05000 (12288 bytes)
277 05:05:37.953883 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 05:05:37.957100 Phase 2
279 05:05:37.957187 Phase 3
280 05:05:37.960255 FMAP: area GBB found @ c05000 (12288 bytes)
281 05:05:37.967015 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 05:05:37.973775 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
283 05:05:37.977412 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
284 05:05:37.983543 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 05:05:37.999195 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
286 05:05:38.003118 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
287 05:05:38.009520 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 05:05:38.013567 Phase 4
289 05:05:38.017236 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
290 05:05:38.023644 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 05:05:38.203170 VB2:vb2_rsa_verify_digest() Digest check failed!
292 05:05:38.210092 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 05:05:38.210222 Saving nvdata
294 05:05:38.212919 Reboot requested (10020007)
295 05:05:38.216466 board_reset() called!
296 05:05:38.216585 full_reset() called!
297 05:05:42.737877
298 05:05:42.738426
299 05:05:42.739063 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 05:05:42.741391 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 05:05:42.744578 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 05:05:42.748741 CPU: AES supported, TXT NOT supported, VT supported
303 05:05:42.752699 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 05:05:42.756127 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 05:05:42.764123 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 05:05:42.768156 VBOOT: Loading verstage.
307 05:05:42.771781 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 05:05:42.775394 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 05:05:42.783227 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 05:05:42.783742 CBFS @ c08000 size 3f8000
311 05:05:42.790484 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 05:05:42.794297 CBFS: Locating 'fallback/verstage'
313 05:05:42.798108 CBFS: Found @ offset 10fb80 size 1072c
314 05:05:42.798643
315 05:05:42.799023
316 05:05:42.809381 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 05:05:42.824606 Probing TPM: . done!
318 05:05:42.828134 TPM ready after 0 ms
319 05:05:42.834054 Connected to device vid:did:rid of 1ae0:0028:00
320 05:05:42.839883 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 05:05:42.843709 Initialized TPM device CR50 revision 0
322 05:05:42.906865 tlcl_send_startup: Startup return code is 0
323 05:05:42.907587 TPM: setup succeeded
324 05:05:42.919349 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 05:05:42.923228 Chrome EC: UHEPI supported
326 05:05:42.926565 Phase 1
327 05:05:42.930064 FMAP: area GBB found @ c05000 (12288 bytes)
328 05:05:42.936484 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 05:05:42.943674 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 05:05:42.946999 Recovery requested (1009000e)
331 05:05:42.952385 Saving nvdata
332 05:05:42.958600 tlcl_extend: response is 0
333 05:05:42.967189 tlcl_extend: response is 0
334 05:05:42.974595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 05:05:42.977603 CBFS @ c08000 size 3f8000
336 05:05:42.984047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 05:05:42.987763 CBFS: Locating 'fallback/romstage'
338 05:05:42.991369 CBFS: Found @ offset 80 size 145fc
339 05:05:42.994223 Accumulated console time in verstage 98 ms
340 05:05:42.994815
341 05:05:42.995188
342 05:05:43.007464 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 05:05:43.013960 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 05:05:43.017743 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 05:05:43.020402 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 05:05:43.027303 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 05:05:43.030250 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 05:05:43.033723 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 05:05:43.036867 TCO_STS: 0000 0000
350 05:05:43.040747 GEN_PMCON: e0015238 00000200
351 05:05:43.043909 GBLRST_CAUSE: 00000000 00000000
352 05:05:43.044491 prev_sleep_state 5
353 05:05:43.047181 Boot Count incremented to 77278
354 05:05:43.054185 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 05:05:43.057729 CBFS @ c08000 size 3f8000
356 05:05:43.064348 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 05:05:43.064923 CBFS: Locating 'fspm.bin'
358 05:05:43.067645 CBFS: Found @ offset 5ffc0 size 71000
359 05:05:43.071513 Chrome EC: UHEPI supported
360 05:05:43.078763 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 05:05:43.084133 Probing TPM: done!
362 05:05:43.090504 Connected to device vid:did:rid of 1ae0:0028:00
363 05:05:43.101051 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
364 05:05:43.106714 Initialized TPM device CR50 revision 0
365 05:05:43.115372 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 05:05:43.122805 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 05:05:43.125893 MRC cache found, size 1948
368 05:05:43.128981 bootmode is set to: 2
369 05:05:43.131593 PRMRR disabled by config.
370 05:05:43.135208 SPD INDEX = 1
371 05:05:43.138495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 05:05:43.142357 CBFS @ c08000 size 3f8000
373 05:05:43.148897 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 05:05:43.149333 CBFS: Locating 'spd.bin'
375 05:05:43.152129 CBFS: Found @ offset 5fb80 size 400
376 05:05:43.155192 SPD: module type is LPDDR3
377 05:05:43.158221 SPD: module part is
378 05:05:43.164931 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 05:05:43.168298 SPD: device width 4 bits, bus width 8 bits
380 05:05:43.171500 SPD: module size is 4096 MB (per channel)
381 05:05:43.175291 memory slot: 0 configuration done.
382 05:05:43.177882 memory slot: 2 configuration done.
383 05:05:43.229235 CBMEM:
384 05:05:43.232539 IMD: root @ 99fff000 254 entries.
385 05:05:43.236039 IMD: root @ 99ffec00 62 entries.
386 05:05:43.239354 External stage cache:
387 05:05:43.242617 IMD: root @ 9abff000 254 entries.
388 05:05:43.245942 IMD: root @ 9abfec00 62 entries.
389 05:05:43.252371 Chrome EC: clear events_b mask to 0x0000000020004000
390 05:05:43.265782 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 05:05:43.279000 tlcl_write: response is 0
392 05:05:43.288451 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 05:05:43.294999 MRC: TPM MRC hash updated successfully.
394 05:05:43.295567 2 DIMMs found
395 05:05:43.297619 SMM Memory Map
396 05:05:43.301190 SMRAM : 0x9a000000 0x1000000
397 05:05:43.304653 Subregion 0: 0x9a000000 0xa00000
398 05:05:43.307671 Subregion 1: 0x9aa00000 0x200000
399 05:05:43.310685 Subregion 2: 0x9ac00000 0x400000
400 05:05:43.314359 top_of_ram = 0x9a000000
401 05:05:43.317729 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 05:05:43.323983 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 05:05:43.327564 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 05:05:43.334231 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 05:05:43.337287 CBFS @ c08000 size 3f8000
406 05:05:43.340780 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 05:05:43.344504 CBFS: Locating 'fallback/postcar'
408 05:05:43.347440 CBFS: Found @ offset 107000 size 4b44
409 05:05:43.353752 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 05:05:43.366711 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 05:05:43.369895 Processing 180 relocs. Offset value of 0x97c0c000
412 05:05:43.378333 Accumulated console time in romstage 286 ms
413 05:05:43.378899
414 05:05:43.379267
415 05:05:43.388745 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 05:05:43.394825 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 05:05:43.398270 CBFS @ c08000 size 3f8000
418 05:05:43.404632 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 05:05:43.407743 CBFS: Locating 'fallback/ramstage'
420 05:05:43.411351 CBFS: Found @ offset 43380 size 1b9e8
421 05:05:43.418313 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 05:05:43.449979 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 05:05:43.453608 Processing 3976 relocs. Offset value of 0x98db0000
424 05:05:43.459753 Accumulated console time in postcar 52 ms
425 05:05:43.460472
426 05:05:43.460861
427 05:05:43.469970 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 05:05:43.476412 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 05:05:43.480325 WARNING: RO_VPD is uninitialized or empty.
430 05:05:43.483332 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 05:05:43.489996 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 05:05:43.490561 Normal boot.
433 05:05:43.496627 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 05:05:43.499866 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 05:05:43.503315 CBFS @ c08000 size 3f8000
436 05:05:43.509920 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 05:05:43.513404 CBFS: Locating 'cpu_microcode_blob.bin'
438 05:05:43.516428 CBFS: Found @ offset 14700 size 2ec00
439 05:05:43.519715 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 05:05:43.523015 Skip microcode update
441 05:05:43.526690 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 05:05:43.529671 CBFS @ c08000 size 3f8000
443 05:05:43.536250 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 05:05:43.539514 CBFS: Locating 'fsps.bin'
445 05:05:43.542817 CBFS: Found @ offset d1fc0 size 35000
446 05:05:43.568509 Detected 4 core, 8 thread CPU.
447 05:05:43.571631 Setting up SMI for CPU
448 05:05:43.574627 IED base = 0x9ac00000
449 05:05:43.575190 IED size = 0x00400000
450 05:05:43.578070 Will perform SMM setup.
451 05:05:43.584530 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 05:05:43.591283 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 05:05:43.594628 Processing 16 relocs. Offset value of 0x00030000
454 05:05:43.598305 Attempting to start 7 APs
455 05:05:43.601889 Waiting for 10ms after sending INIT.
456 05:05:43.618074 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
457 05:05:43.618636 done.
458 05:05:43.621255 AP: slot 3 apic_id 3.
459 05:05:43.624616 AP: slot 1 apic_id 2.
460 05:05:43.627829 Waiting for 2nd SIPI to complete...done.
461 05:05:43.631871 AP: slot 4 apic_id 7.
462 05:05:43.632492 AP: slot 5 apic_id 6.
463 05:05:43.634339 AP: slot 6 apic_id 5.
464 05:05:43.637909 AP: slot 7 apic_id 4.
465 05:05:43.644344 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 05:05:43.651189 Processing 13 relocs. Offset value of 0x00038000
467 05:05:43.654051 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 05:05:43.660898 Installing SMM handler to 0x9a000000
469 05:05:43.667999 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 05:05:43.670949 Processing 658 relocs. Offset value of 0x9a010000
471 05:05:43.681005 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 05:05:43.683876 Processing 13 relocs. Offset value of 0x9a008000
473 05:05:43.690455 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 05:05:43.697705 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 05:05:43.704251 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 05:05:43.707050 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 05:05:43.714002 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 05:05:43.720672 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 05:05:43.724226 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 05:05:43.730571 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 05:05:43.734232 Clearing SMI status registers
482 05:05:43.736939 SMI_STS: PM1
483 05:05:43.737403 PM1_STS: PWRBTN
484 05:05:43.740874 TCO_STS: SECOND_TO
485 05:05:43.743877 New SMBASE 0x9a000000
486 05:05:43.747652 In relocation handler: CPU 0
487 05:05:43.750968 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 05:05:43.753683 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 05:05:43.757269 Relocation complete.
490 05:05:43.760950 New SMBASE 0x99fff800
491 05:05:43.761518 In relocation handler: CPU 2
492 05:05:43.767796 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
493 05:05:43.771129 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 05:05:43.773784 Relocation complete.
495 05:05:43.777591 New SMBASE 0x99ffec00
496 05:05:43.778201 In relocation handler: CPU 5
497 05:05:43.784195 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
498 05:05:43.787390 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 05:05:43.790958 Relocation complete.
500 05:05:43.791425 New SMBASE 0x99fff000
501 05:05:43.794037 In relocation handler: CPU 4
502 05:05:43.800557 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
503 05:05:43.803789 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 05:05:43.806767 Relocation complete.
505 05:05:43.807251 New SMBASE 0x99fffc00
506 05:05:43.810575 In relocation handler: CPU 1
507 05:05:43.813611 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
508 05:05:43.820295 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 05:05:43.824290 Relocation complete.
510 05:05:43.824875 New SMBASE 0x99fff400
511 05:05:43.827037 In relocation handler: CPU 3
512 05:05:43.830253 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
513 05:05:43.836625 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 05:05:43.839894 Relocation complete.
515 05:05:43.840459 New SMBASE 0x99ffe800
516 05:05:43.843715 In relocation handler: CPU 6
517 05:05:43.846955 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
518 05:05:43.853239 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 05:05:43.853829 Relocation complete.
520 05:05:43.856917 New SMBASE 0x99ffe400
521 05:05:43.860154 In relocation handler: CPU 7
522 05:05:43.863975 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
523 05:05:43.870636 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 05:05:43.871221 Relocation complete.
525 05:05:43.873656 Initializing CPU #0
526 05:05:43.876500 CPU: vendor Intel device 806ec
527 05:05:43.880103 CPU: family 06, model 8e, stepping 0c
528 05:05:43.883680 Clearing out pending MCEs
529 05:05:43.887145 Setting up local APIC...
530 05:05:43.887728 apic_id: 0x00 done.
531 05:05:43.890006 Turbo is available but hidden
532 05:05:43.893760 Turbo is available and visible
533 05:05:43.896704 VMX status: enabled
534 05:05:43.900175 IA32_FEATURE_CONTROL status: locked
535 05:05:43.903427 Skip microcode update
536 05:05:43.904028 CPU #0 initialized
537 05:05:43.906435 Initializing CPU #2
538 05:05:43.906952 Initializing CPU #6
539 05:05:43.909832 Initializing CPU #7
540 05:05:43.912912 CPU: vendor Intel device 806ec
541 05:05:43.916201 CPU: family 06, model 8e, stepping 0c
542 05:05:43.920230 CPU: vendor Intel device 806ec
543 05:05:43.923470 CPU: family 06, model 8e, stepping 0c
544 05:05:43.926763 Clearing out pending MCEs
545 05:05:43.929851 Clearing out pending MCEs
546 05:05:43.933112 Setting up local APIC...
547 05:05:43.936270 CPU: vendor Intel device 806ec
548 05:05:43.939997 CPU: family 06, model 8e, stepping 0c
549 05:05:43.942580 Clearing out pending MCEs
550 05:05:43.943016 Initializing CPU #1
551 05:05:43.946063 Initializing CPU #3
552 05:05:43.949254 CPU: vendor Intel device 806ec
553 05:05:43.952875 CPU: family 06, model 8e, stepping 0c
554 05:05:43.956042 CPU: vendor Intel device 806ec
555 05:05:43.959623 CPU: family 06, model 8e, stepping 0c
556 05:05:43.962872 Clearing out pending MCEs
557 05:05:43.963288 Clearing out pending MCEs
558 05:05:43.966120 Setting up local APIC...
559 05:05:43.969890 Setting up local APIC...
560 05:05:43.973190 apic_id: 0x02 done.
561 05:05:43.973733 Setting up local APIC...
562 05:05:43.976159 apic_id: 0x01 done.
563 05:05:43.979319 VMX status: enabled
564 05:05:43.979740 apic_id: 0x03 done.
565 05:05:43.983035 IA32_FEATURE_CONTROL status: locked
566 05:05:43.986642 VMX status: enabled
567 05:05:43.989628 Skip microcode update
568 05:05:43.992346 IA32_FEATURE_CONTROL status: locked
569 05:05:43.992765 CPU #1 initialized
570 05:05:43.996090 Skip microcode update
571 05:05:43.999153 VMX status: enabled
572 05:05:43.999663 apic_id: 0x05 done.
573 05:05:44.003151 Setting up local APIC...
574 05:05:44.005781 Initializing CPU #5
575 05:05:44.006198 Initializing CPU #4
576 05:05:44.009265 CPU: vendor Intel device 806ec
577 05:05:44.012880 CPU: family 06, model 8e, stepping 0c
578 05:05:44.016345 CPU: vendor Intel device 806ec
579 05:05:44.019395 CPU: family 06, model 8e, stepping 0c
580 05:05:44.022968 Clearing out pending MCEs
581 05:05:44.025893 Clearing out pending MCEs
582 05:05:44.029731 Setting up local APIC...
583 05:05:44.030438 apic_id: 0x04 done.
584 05:05:44.032726 VMX status: enabled
585 05:05:44.036195 VMX status: enabled
586 05:05:44.039081 IA32_FEATURE_CONTROL status: locked
587 05:05:44.042863 IA32_FEATURE_CONTROL status: locked
588 05:05:44.043300 Skip microcode update
589 05:05:44.046064 Skip microcode update
590 05:05:44.049533 CPU #6 initialized
591 05:05:44.049967 CPU #7 initialized
592 05:05:44.052448 CPU #3 initialized
593 05:05:44.056205 apic_id: 0x06 done.
594 05:05:44.056628 Setting up local APIC...
595 05:05:44.059350 IA32_FEATURE_CONTROL status: locked
596 05:05:44.062510 apic_id: 0x07 done.
597 05:05:44.065837 VMX status: enabled
598 05:05:44.066261 VMX status: enabled
599 05:05:44.069199 IA32_FEATURE_CONTROL status: locked
600 05:05:44.072322 IA32_FEATURE_CONTROL status: locked
601 05:05:44.075959 Skip microcode update
602 05:05:44.079621 Skip microcode update
603 05:05:44.080200 Skip microcode update
604 05:05:44.082594 CPU #5 initialized
605 05:05:44.085854 CPU #4 initialized
606 05:05:44.086278 CPU #2 initialized
607 05:05:44.089328 bsp_do_flight_plan done after 461 msecs.
608 05:05:44.092204 CPU: frequency set to 4200 MHz
609 05:05:44.096286 Enabling SMIs.
610 05:05:44.096809 Locking SMM.
611 05:05:44.111843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 05:05:44.115107 CBFS @ c08000 size 3f8000
613 05:05:44.122466 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 05:05:44.123044 CBFS: Locating 'vbt.bin'
615 05:05:44.124960 CBFS: Found @ offset 5f5c0 size 499
616 05:05:44.132461 Found a VBT of 4608 bytes after decompression
617 05:05:44.316649 Display FSP Version Info HOB
618 05:05:44.319379 Reference Code - CPU = 9.0.1e.30
619 05:05:44.323301 uCode Version = 0.0.0.ca
620 05:05:44.326794 TXT ACM version = ff.ff.ff.ffff
621 05:05:44.329330 Display FSP Version Info HOB
622 05:05:44.333137 Reference Code - ME = 9.0.1e.30
623 05:05:44.336206 MEBx version = 0.0.0.0
624 05:05:44.339944 ME Firmware Version = Consumer SKU
625 05:05:44.342885 Display FSP Version Info HOB
626 05:05:44.346187 Reference Code - CML PCH = 9.0.1e.30
627 05:05:44.349670 PCH-CRID Status = Disabled
628 05:05:44.352991 PCH-CRID Original Value = ff.ff.ff.ffff
629 05:05:44.356218 PCH-CRID New Value = ff.ff.ff.ffff
630 05:05:44.359377 OPROM - RST - RAID = ff.ff.ff.ffff
631 05:05:44.362985 ChipsetInit Base Version = ff.ff.ff.ffff
632 05:05:44.366487 ChipsetInit Oem Version = ff.ff.ff.ffff
633 05:05:44.369849 Display FSP Version Info HOB
634 05:05:44.376188 Reference Code - SA - System Agent = 9.0.1e.30
635 05:05:44.379565 Reference Code - MRC = 0.7.1.6c
636 05:05:44.380200 SA - PCIe Version = 9.0.1e.30
637 05:05:44.383448 SA-CRID Status = Disabled
638 05:05:44.386042 SA-CRID Original Value = 0.0.0.c
639 05:05:44.390015 SA-CRID New Value = 0.0.0.c
640 05:05:44.392926 OPROM - VBIOS = ff.ff.ff.ffff
641 05:05:44.393446 RTC Init
642 05:05:44.399700 Set power on after power failure.
643 05:05:44.400340 Disabling Deep S3
644 05:05:44.403322 Disabling Deep S3
645 05:05:44.403898 Disabling Deep S4
646 05:05:44.406175 Disabling Deep S4
647 05:05:44.406744 Disabling Deep S5
648 05:05:44.409850 Disabling Deep S5
649 05:05:44.416989 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
650 05:05:44.417723 Enumerating buses...
651 05:05:44.422994 Show all devs... Before device enumeration.
652 05:05:44.423562 Root Device: enabled 1
653 05:05:44.426211 CPU_CLUSTER: 0: enabled 1
654 05:05:44.429511 DOMAIN: 0000: enabled 1
655 05:05:44.430085 APIC: 00: enabled 1
656 05:05:44.432807 PCI: 00:00.0: enabled 1
657 05:05:44.436620 PCI: 00:02.0: enabled 1
658 05:05:44.439916 PCI: 00:04.0: enabled 0
659 05:05:44.440436 PCI: 00:05.0: enabled 0
660 05:05:44.442789 PCI: 00:12.0: enabled 1
661 05:05:44.446956 PCI: 00:12.5: enabled 0
662 05:05:44.449326 PCI: 00:12.6: enabled 0
663 05:05:44.449795 PCI: 00:14.0: enabled 1
664 05:05:44.453114 PCI: 00:14.1: enabled 0
665 05:05:44.456514 PCI: 00:14.3: enabled 1
666 05:05:44.459350 PCI: 00:14.5: enabled 0
667 05:05:44.459821 PCI: 00:15.0: enabled 1
668 05:05:44.463167 PCI: 00:15.1: enabled 1
669 05:05:44.465856 PCI: 00:15.2: enabled 0
670 05:05:44.466379 PCI: 00:15.3: enabled 0
671 05:05:44.469482 PCI: 00:16.0: enabled 1
672 05:05:44.473226 PCI: 00:16.1: enabled 0
673 05:05:44.476591 PCI: 00:16.2: enabled 0
674 05:05:44.477168 PCI: 00:16.3: enabled 0
675 05:05:44.479565 PCI: 00:16.4: enabled 0
676 05:05:44.482523 PCI: 00:16.5: enabled 0
677 05:05:44.485701 PCI: 00:17.0: enabled 1
678 05:05:44.486176 PCI: 00:19.0: enabled 1
679 05:05:44.489687 PCI: 00:19.1: enabled 0
680 05:05:44.492429 PCI: 00:19.2: enabled 0
681 05:05:44.495947 PCI: 00:1a.0: enabled 0
682 05:05:44.496563 PCI: 00:1c.0: enabled 0
683 05:05:44.499296 PCI: 00:1c.1: enabled 0
684 05:05:44.503327 PCI: 00:1c.2: enabled 0
685 05:05:44.503930 PCI: 00:1c.3: enabled 0
686 05:05:44.505583 PCI: 00:1c.4: enabled 0
687 05:05:44.509123 PCI: 00:1c.5: enabled 0
688 05:05:44.512414 PCI: 00:1c.6: enabled 0
689 05:05:44.512905 PCI: 00:1c.7: enabled 0
690 05:05:44.516208 PCI: 00:1d.0: enabled 1
691 05:05:44.518655 PCI: 00:1d.1: enabled 0
692 05:05:44.522484 PCI: 00:1d.2: enabled 0
693 05:05:44.523076 PCI: 00:1d.3: enabled 0
694 05:05:44.525663 PCI: 00:1d.4: enabled 0
695 05:05:44.529192 PCI: 00:1d.5: enabled 1
696 05:05:44.532249 PCI: 00:1e.0: enabled 1
697 05:05:44.532784 PCI: 00:1e.1: enabled 0
698 05:05:44.535762 PCI: 00:1e.2: enabled 1
699 05:05:44.539142 PCI: 00:1e.3: enabled 1
700 05:05:44.542332 PCI: 00:1f.0: enabled 1
701 05:05:44.542804 PCI: 00:1f.1: enabled 1
702 05:05:44.545512 PCI: 00:1f.2: enabled 1
703 05:05:44.548725 PCI: 00:1f.3: enabled 1
704 05:05:44.549203 PCI: 00:1f.4: enabled 1
705 05:05:44.552743 PCI: 00:1f.5: enabled 1
706 05:05:44.555845 PCI: 00:1f.6: enabled 0
707 05:05:44.559117 USB0 port 0: enabled 1
708 05:05:44.559594 I2C: 00:15: enabled 1
709 05:05:44.562254 I2C: 00:5d: enabled 1
710 05:05:44.565000 GENERIC: 0.0: enabled 1
711 05:05:44.565421 I2C: 00:1a: enabled 1
712 05:05:44.569053 I2C: 00:38: enabled 1
713 05:05:44.571932 I2C: 00:39: enabled 1
714 05:05:44.572443 I2C: 00:3a: enabled 1
715 05:05:44.575508 I2C: 00:3b: enabled 1
716 05:05:44.578582 PCI: 00:00.0: enabled 1
717 05:05:44.579056 SPI: 00: enabled 1
718 05:05:44.582074 SPI: 01: enabled 1
719 05:05:44.585378 PNP: 0c09.0: enabled 1
720 05:05:44.585854 USB2 port 0: enabled 1
721 05:05:44.588786 USB2 port 1: enabled 1
722 05:05:44.591789 USB2 port 2: enabled 0
723 05:05:44.595363 USB2 port 3: enabled 0
724 05:05:44.595834 USB2 port 5: enabled 0
725 05:05:44.599000 USB2 port 6: enabled 1
726 05:05:44.601969 USB2 port 9: enabled 1
727 05:05:44.602503 USB3 port 0: enabled 1
728 05:05:44.605920 USB3 port 1: enabled 1
729 05:05:44.608990 USB3 port 2: enabled 1
730 05:05:44.609578 USB3 port 3: enabled 1
731 05:05:44.611908 USB3 port 4: enabled 0
732 05:05:44.615412 APIC: 02: enabled 1
733 05:05:44.615951 APIC: 01: enabled 1
734 05:05:44.618782 APIC: 03: enabled 1
735 05:05:44.621449 APIC: 07: enabled 1
736 05:05:44.621881 APIC: 06: enabled 1
737 05:05:44.625376 APIC: 05: enabled 1
738 05:05:44.625918 APIC: 04: enabled 1
739 05:05:44.628428 Compare with tree...
740 05:05:44.631648 Root Device: enabled 1
741 05:05:44.635161 CPU_CLUSTER: 0: enabled 1
742 05:05:44.635695 APIC: 00: enabled 1
743 05:05:44.638644 APIC: 02: enabled 1
744 05:05:44.641654 APIC: 01: enabled 1
745 05:05:44.642193 APIC: 03: enabled 1
746 05:05:44.645181 APIC: 07: enabled 1
747 05:05:44.648535 APIC: 06: enabled 1
748 05:05:44.649071 APIC: 05: enabled 1
749 05:05:44.651537 APIC: 04: enabled 1
750 05:05:44.655079 DOMAIN: 0000: enabled 1
751 05:05:44.658074 PCI: 00:00.0: enabled 1
752 05:05:44.658655 PCI: 00:02.0: enabled 1
753 05:05:44.661338 PCI: 00:04.0: enabled 0
754 05:05:44.664854 PCI: 00:05.0: enabled 0
755 05:05:44.668463 PCI: 00:12.0: enabled 1
756 05:05:44.671368 PCI: 00:12.5: enabled 0
757 05:05:44.671795 PCI: 00:12.6: enabled 0
758 05:05:44.674807 PCI: 00:14.0: enabled 1
759 05:05:44.678276 USB0 port 0: enabled 1
760 05:05:44.681577 USB2 port 0: enabled 1
761 05:05:44.684860 USB2 port 1: enabled 1
762 05:05:44.685438 USB2 port 2: enabled 0
763 05:05:44.687686 USB2 port 3: enabled 0
764 05:05:44.691745 USB2 port 5: enabled 0
765 05:05:44.695041 USB2 port 6: enabled 1
766 05:05:44.698384 USB2 port 9: enabled 1
767 05:05:44.701624 USB3 port 0: enabled 1
768 05:05:44.702201 USB3 port 1: enabled 1
769 05:05:44.704772 USB3 port 2: enabled 1
770 05:05:44.708146 USB3 port 3: enabled 1
771 05:05:44.711530 USB3 port 4: enabled 0
772 05:05:44.715061 PCI: 00:14.1: enabled 0
773 05:05:44.715555 PCI: 00:14.3: enabled 1
774 05:05:44.718229 PCI: 00:14.5: enabled 0
775 05:05:44.721584 PCI: 00:15.0: enabled 1
776 05:05:44.724828 I2C: 00:15: enabled 1
777 05:05:44.728319 PCI: 00:15.1: enabled 1
778 05:05:44.728889 I2C: 00:5d: enabled 1
779 05:05:44.731470 GENERIC: 0.0: enabled 1
780 05:05:44.735372 PCI: 00:15.2: enabled 0
781 05:05:44.737862 PCI: 00:15.3: enabled 0
782 05:05:44.738437 PCI: 00:16.0: enabled 1
783 05:05:44.741667 PCI: 00:16.1: enabled 0
784 05:05:44.744462 PCI: 00:16.2: enabled 0
785 05:05:44.747696 PCI: 00:16.3: enabled 0
786 05:05:44.750974 PCI: 00:16.4: enabled 0
787 05:05:44.751488 PCI: 00:16.5: enabled 0
788 05:05:44.754267 PCI: 00:17.0: enabled 1
789 05:05:44.757891 PCI: 00:19.0: enabled 1
790 05:05:44.761176 I2C: 00:1a: enabled 1
791 05:05:44.764620 I2C: 00:38: enabled 1
792 05:05:44.765093 I2C: 00:39: enabled 1
793 05:05:44.767738 I2C: 00:3a: enabled 1
794 05:05:44.771284 I2C: 00:3b: enabled 1
795 05:05:44.774431 PCI: 00:19.1: enabled 0
796 05:05:44.775027 PCI: 00:19.2: enabled 0
797 05:05:44.777949 PCI: 00:1a.0: enabled 0
798 05:05:44.780640 PCI: 00:1c.0: enabled 0
799 05:05:44.784274 PCI: 00:1c.1: enabled 0
800 05:05:44.787330 PCI: 00:1c.2: enabled 0
801 05:05:44.787950 PCI: 00:1c.3: enabled 0
802 05:05:44.790856 PCI: 00:1c.4: enabled 0
803 05:05:44.794746 PCI: 00:1c.5: enabled 0
804 05:05:44.798754 PCI: 00:1c.6: enabled 0
805 05:05:44.800936 PCI: 00:1c.7: enabled 0
806 05:05:44.801425 PCI: 00:1d.0: enabled 1
807 05:05:44.804435 PCI: 00:1d.1: enabled 0
808 05:05:44.808166 PCI: 00:1d.2: enabled 0
809 05:05:44.810910 PCI: 00:1d.3: enabled 0
810 05:05:44.811378 PCI: 00:1d.4: enabled 0
811 05:05:44.814800 PCI: 00:1d.5: enabled 1
812 05:05:44.817489 PCI: 00:00.0: enabled 1
813 05:05:44.820696 PCI: 00:1e.0: enabled 1
814 05:05:44.824028 PCI: 00:1e.1: enabled 0
815 05:05:44.824493 PCI: 00:1e.2: enabled 1
816 05:05:44.827500 SPI: 00: enabled 1
817 05:05:44.831705 PCI: 00:1e.3: enabled 1
818 05:05:44.834111 SPI: 01: enabled 1
819 05:05:44.834582 PCI: 00:1f.0: enabled 1
820 05:05:44.837982 PNP: 0c09.0: enabled 1
821 05:05:44.840830 PCI: 00:1f.1: enabled 1
822 05:05:44.843893 PCI: 00:1f.2: enabled 1
823 05:05:44.847817 PCI: 00:1f.3: enabled 1
824 05:05:44.848422 PCI: 00:1f.4: enabled 1
825 05:05:44.850681 PCI: 00:1f.5: enabled 1
826 05:05:44.853957 PCI: 00:1f.6: enabled 0
827 05:05:44.857008 Root Device scanning...
828 05:05:44.861078 scan_static_bus for Root Device
829 05:05:44.861659 CPU_CLUSTER: 0 enabled
830 05:05:44.863695 DOMAIN: 0000 enabled
831 05:05:44.867585 DOMAIN: 0000 scanning...
832 05:05:44.871189 PCI: pci_scan_bus for bus 00
833 05:05:44.874801 PCI: 00:00.0 [8086/0000] ops
834 05:05:44.877747 PCI: 00:00.0 [8086/9b61] enabled
835 05:05:44.880622 PCI: 00:02.0 [8086/0000] bus ops
836 05:05:44.884446 PCI: 00:02.0 [8086/9b41] enabled
837 05:05:44.887233 PCI: 00:04.0 [8086/1903] disabled
838 05:05:44.890414 PCI: 00:08.0 [8086/1911] enabled
839 05:05:44.894240 PCI: 00:12.0 [8086/02f9] enabled
840 05:05:44.897633 PCI: 00:14.0 [8086/0000] bus ops
841 05:05:44.900322 PCI: 00:14.0 [8086/02ed] enabled
842 05:05:44.903896 PCI: 00:14.2 [8086/02ef] enabled
843 05:05:44.907227 PCI: 00:14.3 [8086/02f0] enabled
844 05:05:44.910337 PCI: 00:15.0 [8086/0000] bus ops
845 05:05:44.913643 PCI: 00:15.0 [8086/02e8] enabled
846 05:05:44.917534 PCI: 00:15.1 [8086/0000] bus ops
847 05:05:44.920439 PCI: 00:15.1 [8086/02e9] enabled
848 05:05:44.924838 PCI: 00:16.0 [8086/0000] ops
849 05:05:44.927527 PCI: 00:16.0 [8086/02e0] enabled
850 05:05:44.930263 PCI: 00:17.0 [8086/0000] ops
851 05:05:44.934342 PCI: 00:17.0 [8086/02d3] enabled
852 05:05:44.937690 PCI: 00:19.0 [8086/0000] bus ops
853 05:05:44.940239 PCI: 00:19.0 [8086/02c5] enabled
854 05:05:44.943856 PCI: 00:1d.0 [8086/0000] bus ops
855 05:05:44.947501 PCI: 00:1d.0 [8086/02b0] enabled
856 05:05:44.950353 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 05:05:44.954057 PCI: 00:1e.0 [8086/0000] ops
858 05:05:44.957275 PCI: 00:1e.0 [8086/02a8] enabled
859 05:05:44.960039 PCI: 00:1e.2 [8086/0000] bus ops
860 05:05:44.963519 PCI: 00:1e.2 [8086/02aa] enabled
861 05:05:44.966843 PCI: 00:1e.3 [8086/0000] bus ops
862 05:05:44.969939 PCI: 00:1e.3 [8086/02ab] enabled
863 05:05:44.973264 PCI: 00:1f.0 [8086/0000] bus ops
864 05:05:44.976938 PCI: 00:1f.0 [8086/0284] enabled
865 05:05:44.983317 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 05:05:44.989896 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 05:05:44.993388 PCI: 00:1f.3 [8086/0000] bus ops
868 05:05:44.997045 PCI: 00:1f.3 [8086/02c8] enabled
869 05:05:45.000027 PCI: 00:1f.4 [8086/0000] bus ops
870 05:05:45.003630 PCI: 00:1f.4 [8086/02a3] enabled
871 05:05:45.006584 PCI: 00:1f.5 [8086/0000] bus ops
872 05:05:45.009897 PCI: 00:1f.5 [8086/02a4] enabled
873 05:05:45.013400 PCI: Leftover static devices:
874 05:05:45.013984 PCI: 00:05.0
875 05:05:45.014361 PCI: 00:12.5
876 05:05:45.016941 PCI: 00:12.6
877 05:05:45.017411 PCI: 00:14.1
878 05:05:45.019934 PCI: 00:14.5
879 05:05:45.020554 PCI: 00:15.2
880 05:05:45.020932 PCI: 00:15.3
881 05:05:45.023359 PCI: 00:16.1
882 05:05:45.023833 PCI: 00:16.2
883 05:05:45.026890 PCI: 00:16.3
884 05:05:45.027478 PCI: 00:16.4
885 05:05:45.027858 PCI: 00:16.5
886 05:05:45.029790 PCI: 00:19.1
887 05:05:45.030259 PCI: 00:19.2
888 05:05:45.033403 PCI: 00:1a.0
889 05:05:45.033888 PCI: 00:1c.0
890 05:05:45.034261 PCI: 00:1c.1
891 05:05:45.036739 PCI: 00:1c.2
892 05:05:45.037241 PCI: 00:1c.3
893 05:05:45.039956 PCI: 00:1c.4
894 05:05:45.040475 PCI: 00:1c.5
895 05:05:45.043092 PCI: 00:1c.6
896 05:05:45.043589 PCI: 00:1c.7
897 05:05:45.044087 PCI: 00:1d.1
898 05:05:45.046845 PCI: 00:1d.2
899 05:05:45.047285 PCI: 00:1d.3
900 05:05:45.050549 PCI: 00:1d.4
901 05:05:45.051168 PCI: 00:1d.5
902 05:05:45.051638 PCI: 00:1e.1
903 05:05:45.053213 PCI: 00:1f.1
904 05:05:45.053652 PCI: 00:1f.2
905 05:05:45.056477 PCI: 00:1f.6
906 05:05:45.059808 PCI: Check your devicetree.cb.
907 05:05:45.060395 PCI: 00:02.0 scanning...
908 05:05:45.066120 scan_generic_bus for PCI: 00:02.0
909 05:05:45.070261 scan_generic_bus for PCI: 00:02.0 done
910 05:05:45.072956 scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs
911 05:05:45.076323 PCI: 00:14.0 scanning...
912 05:05:45.079590 scan_static_bus for PCI: 00:14.0
913 05:05:45.082496 USB0 port 0 enabled
914 05:05:45.086133 USB0 port 0 scanning...
915 05:05:45.089835 scan_static_bus for USB0 port 0
916 05:05:45.090276 USB2 port 0 enabled
917 05:05:45.093251 USB2 port 1 enabled
918 05:05:45.096128 USB2 port 2 disabled
919 05:05:45.096619 USB2 port 3 disabled
920 05:05:45.099558 USB2 port 5 disabled
921 05:05:45.100045 USB2 port 6 enabled
922 05:05:45.102612 USB2 port 9 enabled
923 05:05:45.106081 USB3 port 0 enabled
924 05:05:45.106520 USB3 port 1 enabled
925 05:05:45.109424 USB3 port 2 enabled
926 05:05:45.112366 USB3 port 3 enabled
927 05:05:45.112805 USB3 port 4 disabled
928 05:05:45.116015 USB2 port 0 scanning...
929 05:05:45.119406 scan_static_bus for USB2 port 0
930 05:05:45.122493 scan_static_bus for USB2 port 0 done
931 05:05:45.129405 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
932 05:05:45.129836 USB2 port 1 scanning...
933 05:05:45.132392 scan_static_bus for USB2 port 1
934 05:05:45.139567 scan_static_bus for USB2 port 1 done
935 05:05:45.142376 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
936 05:05:45.145741 USB2 port 6 scanning...
937 05:05:45.149479 scan_static_bus for USB2 port 6
938 05:05:45.152586 scan_static_bus for USB2 port 6 done
939 05:05:45.159089 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
940 05:05:45.159518 USB2 port 9 scanning...
941 05:05:45.163316 scan_static_bus for USB2 port 9
942 05:05:45.169418 scan_static_bus for USB2 port 9 done
943 05:05:45.173136 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
944 05:05:45.176330 USB3 port 0 scanning...
945 05:05:45.179759 scan_static_bus for USB3 port 0
946 05:05:45.182686 scan_static_bus for USB3 port 0 done
947 05:05:45.189126 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
948 05:05:45.189695 USB3 port 1 scanning...
949 05:05:45.192315 scan_static_bus for USB3 port 1
950 05:05:45.199394 scan_static_bus for USB3 port 1 done
951 05:05:45.202769 scan_bus: scanning of bus USB3 port 1 took 9708 usecs
952 05:05:45.205986 USB3 port 2 scanning...
953 05:05:45.209289 scan_static_bus for USB3 port 2
954 05:05:45.212749 scan_static_bus for USB3 port 2 done
955 05:05:45.219120 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
956 05:05:45.219840 USB3 port 3 scanning...
957 05:05:45.223155 scan_static_bus for USB3 port 3
958 05:05:45.229885 scan_static_bus for USB3 port 3 done
959 05:05:45.232398 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
960 05:05:45.236210 scan_static_bus for USB0 port 0 done
961 05:05:45.242742 scan_bus: scanning of bus USB0 port 0 took 155391 usecs
962 05:05:45.246116 scan_static_bus for PCI: 00:14.0 done
963 05:05:45.252475 scan_bus: scanning of bus PCI: 00:14.0 took 173023 usecs
964 05:05:45.255937 PCI: 00:15.0 scanning...
965 05:05:45.259125 scan_generic_bus for PCI: 00:15.0
966 05:05:45.262508 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 05:05:45.266121 scan_generic_bus for PCI: 00:15.0 done
968 05:05:45.273028 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
969 05:05:45.275933 PCI: 00:15.1 scanning...
970 05:05:45.279503 scan_generic_bus for PCI: 00:15.1
971 05:05:45.282803 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 05:05:45.286506 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 05:05:45.288782 scan_generic_bus for PCI: 00:15.1 done
974 05:05:45.296015 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
975 05:05:45.298878 PCI: 00:19.0 scanning...
976 05:05:45.302456 scan_generic_bus for PCI: 00:19.0
977 05:05:45.305714 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 05:05:45.308755 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 05:05:45.315495 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 05:05:45.319151 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 05:05:45.322916 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 05:05:45.325298 scan_generic_bus for PCI: 00:19.0 done
983 05:05:45.332378 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
984 05:05:45.335556 PCI: 00:1d.0 scanning...
985 05:05:45.338963 do_pci_scan_bridge for PCI: 00:1d.0
986 05:05:45.342192 PCI: pci_scan_bus for bus 01
987 05:05:45.345810 PCI: 01:00.0 [1c5c/1327] enabled
988 05:05:45.348800 Enabling Common Clock Configuration
989 05:05:45.351999 L1 Sub-State supported from root port 29
990 05:05:45.355461 L1 Sub-State Support = 0xf
991 05:05:45.358642 CommonModeRestoreTime = 0x28
992 05:05:45.362140 Power On Value = 0x16, Power On Scale = 0x0
993 05:05:45.365068 ASPM: Enabled L1
994 05:05:45.368931 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
995 05:05:45.371997 PCI: 00:1e.2 scanning...
996 05:05:45.375266 scan_generic_bus for PCI: 00:1e.2
997 05:05:45.378669 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 05:05:45.385191 scan_generic_bus for PCI: 00:1e.2 done
999 05:05:45.388573 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1000 05:05:45.391940 PCI: 00:1e.3 scanning...
1001 05:05:45.395063 scan_generic_bus for PCI: 00:1e.3
1002 05:05:45.398766 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 05:05:45.401896 scan_generic_bus for PCI: 00:1e.3 done
1004 05:05:45.409064 scan_bus: scanning of bus PCI: 00:1e.3 took 13990 usecs
1005 05:05:45.411875 PCI: 00:1f.0 scanning...
1006 05:05:45.415847 scan_static_bus for PCI: 00:1f.0
1007 05:05:45.418993 PNP: 0c09.0 enabled
1008 05:05:45.422363 scan_static_bus for PCI: 00:1f.0 done
1009 05:05:45.425334 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1010 05:05:45.428519 PCI: 00:1f.3 scanning...
1011 05:05:45.435255 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1012 05:05:45.438675 PCI: 00:1f.4 scanning...
1013 05:05:45.442000 scan_generic_bus for PCI: 00:1f.4
1014 05:05:45.445069 scan_generic_bus for PCI: 00:1f.4 done
1015 05:05:45.452128 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1016 05:05:45.452695 PCI: 00:1f.5 scanning...
1017 05:05:45.458566 scan_generic_bus for PCI: 00:1f.5
1018 05:05:45.461710 scan_generic_bus for PCI: 00:1f.5 done
1019 05:05:45.464714 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1020 05:05:45.472083 scan_bus: scanning of bus DOMAIN: 0000 took 605132 usecs
1021 05:05:45.474865 scan_static_bus for Root Device done
1022 05:05:45.481596 scan_bus: scanning of bus Root Device took 624999 usecs
1023 05:05:45.482164 done
1024 05:05:45.484681 Chrome EC: UHEPI supported
1025 05:05:45.492036 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 05:05:45.498363 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 05:05:45.501887 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 05:05:45.509709 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 05:05:45.512931 SPI flash protection: WPSW=0 SRP0=0
1030 05:05:45.519908 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 05:05:45.522948 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 05:05:45.526365 found VGA at PCI: 00:02.0
1033 05:05:45.529543 Setting up VGA for PCI: 00:02.0
1034 05:05:45.535910 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 05:05:45.539698 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 05:05:45.543020 Allocating resources...
1037 05:05:45.546098 Reading resources...
1038 05:05:45.549607 Root Device read_resources bus 0 link: 0
1039 05:05:45.553041 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 05:05:45.559512 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 05:05:45.563084 DOMAIN: 0000 read_resources bus 0 link: 0
1042 05:05:45.570282 PCI: 00:14.0 read_resources bus 0 link: 0
1043 05:05:45.573487 USB0 port 0 read_resources bus 0 link: 0
1044 05:05:45.581033 USB0 port 0 read_resources bus 0 link: 0 done
1045 05:05:45.584029 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 05:05:45.591886 PCI: 00:15.0 read_resources bus 1 link: 0
1047 05:05:45.595325 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 05:05:45.602709 PCI: 00:15.1 read_resources bus 2 link: 0
1049 05:05:45.605532 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 05:05:45.612539 PCI: 00:19.0 read_resources bus 3 link: 0
1051 05:05:45.619335 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 05:05:45.623173 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 05:05:45.629390 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 05:05:45.632881 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 05:05:45.639494 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 05:05:45.642619 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 05:05:45.649237 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 05:05:45.652359 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 05:05:45.659484 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 05:05:45.662675 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 05:05:45.669625 Root Device read_resources bus 0 link: 0 done
1062 05:05:45.672609 Done reading resources.
1063 05:05:45.676366 Show resources in subtree (Root Device)...After reading.
1064 05:05:45.682966 Root Device child on link 0 CPU_CLUSTER: 0
1065 05:05:45.686194 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 05:05:45.686663 APIC: 00
1067 05:05:45.689506 APIC: 02
1068 05:05:45.689966 APIC: 01
1069 05:05:45.690328 APIC: 03
1070 05:05:45.692940 APIC: 07
1071 05:05:45.693487 APIC: 06
1072 05:05:45.696126 APIC: 05
1073 05:05:45.696686 APIC: 04
1074 05:05:45.699302 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 05:05:45.709422 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 05:05:45.765430 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 05:05:45.766076 PCI: 00:00.0
1078 05:05:45.767060 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 05:05:45.767649 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 05:05:45.768163 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 05:05:45.768651 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 05:05:45.815547 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 05:05:45.816177 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 05:05:45.816920 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 05:05:45.817364 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 05:05:45.817783 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 05:05:45.818491 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 05:05:45.865864 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 05:05:45.866553 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 05:05:45.867345 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 05:05:45.867802 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 05:05:45.868281 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 05:05:45.871504 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 05:05:45.871974 PCI: 00:02.0
1095 05:05:45.881655 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 05:05:45.892423 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 05:05:45.901651 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 05:05:45.902220 PCI: 00:04.0
1099 05:05:45.905764 PCI: 00:08.0
1100 05:05:45.914745 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 05:05:45.915288 PCI: 00:12.0
1102 05:05:45.924701 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 05:05:45.931707 PCI: 00:14.0 child on link 0 USB0 port 0
1104 05:05:45.941504 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 05:05:45.944971 USB0 port 0 child on link 0 USB2 port 0
1106 05:05:45.948910 USB2 port 0
1107 05:05:45.949452 USB2 port 1
1108 05:05:45.951092 USB2 port 2
1109 05:05:45.951656 USB2 port 3
1110 05:05:45.954597 USB2 port 5
1111 05:05:45.955058 USB2 port 6
1112 05:05:45.957784 USB2 port 9
1113 05:05:45.958246 USB3 port 0
1114 05:05:45.961378 USB3 port 1
1115 05:05:45.961940 USB3 port 2
1116 05:05:45.964739 USB3 port 3
1117 05:05:45.965327 USB3 port 4
1118 05:05:45.967882 PCI: 00:14.2
1119 05:05:45.977955 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 05:05:45.987533 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 05:05:45.988350 PCI: 00:14.3
1122 05:05:45.997769 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 05:05:46.004645 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 05:05:46.014860 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 05:05:46.015424 I2C: 01:15
1126 05:05:46.020924 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 05:05:46.030626 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 05:05:46.031174 I2C: 02:5d
1129 05:05:46.033708 GENERIC: 0.0
1130 05:05:46.034166 PCI: 00:16.0
1131 05:05:46.044022 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 05:05:46.047408 PCI: 00:17.0
1133 05:05:46.053785 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 05:05:46.064091 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 05:05:46.070526 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 05:05:46.080377 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 05:05:46.090060 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 05:05:46.096940 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 05:05:46.103438 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 05:05:46.113129 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 05:05:46.113751 I2C: 03:1a
1142 05:05:46.114211 I2C: 03:38
1143 05:05:46.116484 I2C: 03:39
1144 05:05:46.117099 I2C: 03:3a
1145 05:05:46.120214 I2C: 03:3b
1146 05:05:46.123398 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 05:05:46.133592 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 05:05:46.143220 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 05:05:46.153416 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 05:05:46.154020 PCI: 01:00.0
1151 05:05:46.163166 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 05:05:46.166627 PCI: 00:1e.0
1153 05:05:46.176631 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 05:05:46.186512 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 05:05:46.189976 PCI: 00:1e.2 child on link 0 SPI: 00
1156 05:05:46.200105 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 05:05:46.200575 SPI: 00
1158 05:05:46.206415 PCI: 00:1e.3 child on link 0 SPI: 01
1159 05:05:46.216200 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 05:05:46.216773 SPI: 01
1161 05:05:46.219536 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 05:05:46.229329 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 05:05:46.239105 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 05:05:46.239534 PNP: 0c09.0
1165 05:05:46.249235 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 05:05:46.249759 PCI: 00:1f.3
1167 05:05:46.259276 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 05:05:46.269241 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 05:05:46.272790 PCI: 00:1f.4
1170 05:05:46.282534 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 05:05:46.292265 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 05:05:46.292734 PCI: 00:1f.5
1173 05:05:46.302920 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 05:05:46.308799 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 05:05:46.315819 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 05:05:46.322095 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 05:05:46.325873 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 05:05:46.329119 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 05:05:46.332703 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 05:05:46.335593 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 05:05:46.342282 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 05:05:46.348723 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 05:05:46.359034 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 05:05:46.364899 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 05:05:46.371554 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 05:05:46.375171 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 05:05:46.384923 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 05:05:46.388423 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 05:05:46.395654 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 05:05:46.398311 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 05:05:46.401819 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 05:05:46.408631 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 05:05:46.412142 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 05:05:46.418171 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 05:05:46.421562 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 05:05:46.428342 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 05:05:46.431526 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 05:05:46.438130 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 05:05:46.441901 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 05:05:46.448444 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 05:05:46.451751 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 05:05:46.458254 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 05:05:46.461725 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 05:05:46.468318 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 05:05:46.471191 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 05:05:46.474957 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 05:05:46.481689 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 05:05:46.485011 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 05:05:46.491321 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 05:05:46.494647 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 05:05:46.504490 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 05:05:46.508233 avoid_fixed_resources: DOMAIN: 0000
1213 05:05:46.514500 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 05:05:46.521524 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 05:05:46.527720 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 05:05:46.534440 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 05:05:46.541226 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 05:05:46.551138 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 05:05:46.557482 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 05:05:46.564360 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 05:05:46.575058 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 05:05:46.581052 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 05:05:46.587410 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 05:05:46.594564 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 05:05:46.597303 Setting resources...
1226 05:05:46.603981 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 05:05:46.607044 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 05:05:46.610570 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 05:05:46.617277 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 05:05:46.620576 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 05:05:46.627260 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 05:05:46.634093 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 05:05:46.637663 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 05:05:46.646951 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 05:05:46.650756 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 05:05:46.657427 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 05:05:46.660002 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 05:05:46.666827 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 05:05:46.670852 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 05:05:46.676671 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 05:05:46.680018 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 05:05:46.686544 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 05:05:46.690258 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 05:05:46.696689 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 05:05:46.699813 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 05:05:46.706326 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 05:05:46.709983 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 05:05:46.713002 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 05:05:46.719790 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 05:05:46.723045 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 05:05:46.729613 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 05:05:46.733189 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 05:05:46.740318 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 05:05:46.743180 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 05:05:46.750162 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 05:05:46.753004 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 05:05:46.759928 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 05:05:46.766347 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 05:05:46.772443 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 05:05:46.779071 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 05:05:46.788999 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 05:05:46.792296 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 05:05:46.799255 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 05:05:46.805444 Root Device assign_resources, bus 0 link: 0
1265 05:05:46.808749 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 05:05:46.819312 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 05:05:46.825634 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 05:05:46.835556 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 05:05:46.842376 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 05:05:46.852132 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 05:05:46.858665 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 05:05:46.862547 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 05:05:46.868631 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 05:05:46.875329 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 05:05:46.885197 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 05:05:46.892019 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 05:05:46.901839 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 05:05:46.905228 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 05:05:46.911778 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 05:05:46.917993 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 05:05:46.921455 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 05:05:46.928315 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 05:05:46.934928 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 05:05:46.944729 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 05:05:46.951352 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 05:05:46.958350 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 05:05:46.968352 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 05:05:46.975186 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 05:05:46.981270 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 05:05:46.991135 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 05:05:46.994793 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 05:05:47.001658 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 05:05:47.007995 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 05:05:47.017877 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 05:05:47.027403 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 05:05:47.030905 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 05:05:47.037521 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 05:05:47.044582 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 05:05:47.050781 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 05:05:47.060698 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 05:05:47.063974 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 05:05:47.070471 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 05:05:47.077188 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 05:05:47.080998 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 05:05:47.087154 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 05:05:47.090541 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 05:05:47.097359 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 05:05:47.100393 LPC: Trying to open IO window from 800 size 1ff
1309 05:05:47.110610 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 05:05:47.117512 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 05:05:47.127561 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 05:05:47.133864 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 05:05:47.140776 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 05:05:47.144288 Root Device assign_resources, bus 0 link: 0
1315 05:05:47.146954 Done setting resources.
1316 05:05:47.153408 Show resources in subtree (Root Device)...After assigning values.
1317 05:05:47.157162 Root Device child on link 0 CPU_CLUSTER: 0
1318 05:05:47.159969 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 05:05:47.163436 APIC: 00
1320 05:05:47.163953 APIC: 02
1321 05:05:47.164394 APIC: 01
1322 05:05:47.167140 APIC: 03
1323 05:05:47.167740 APIC: 07
1324 05:05:47.170010 APIC: 06
1325 05:05:47.170472 APIC: 05
1326 05:05:47.170838 APIC: 04
1327 05:05:47.176610 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 05:05:47.187078 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 05:05:47.196923 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 05:05:47.197507 PCI: 00:00.0
1331 05:05:47.206573 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 05:05:47.216471 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 05:05:47.226467 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 05:05:47.236716 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 05:05:47.246629 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 05:05:47.256335 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 05:05:47.262679 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 05:05:47.272494 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 05:05:47.282263 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 05:05:47.292435 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 05:05:47.303154 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 05:05:47.308997 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 05:05:47.318654 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 05:05:47.329041 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 05:05:47.338701 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 05:05:47.348944 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 05:05:47.349612 PCI: 00:02.0
1348 05:05:47.361906 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 05:05:47.372217 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 05:05:47.382139 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 05:05:47.382706 PCI: 00:04.0
1352 05:05:47.385615 PCI: 00:08.0
1353 05:05:47.395169 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 05:05:47.395843 PCI: 00:12.0
1355 05:05:47.405018 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 05:05:47.411817 PCI: 00:14.0 child on link 0 USB0 port 0
1357 05:05:47.421476 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 05:05:47.424993 USB0 port 0 child on link 0 USB2 port 0
1359 05:05:47.428542 USB2 port 0
1360 05:05:47.429009 USB2 port 1
1361 05:05:47.431589 USB2 port 2
1362 05:05:47.432087 USB2 port 3
1363 05:05:47.434596 USB2 port 5
1364 05:05:47.435056 USB2 port 6
1365 05:05:47.438250 USB2 port 9
1366 05:05:47.438773 USB3 port 0
1367 05:05:47.441407 USB3 port 1
1368 05:05:47.441897 USB3 port 2
1369 05:05:47.444479 USB3 port 3
1370 05:05:47.444942 USB3 port 4
1371 05:05:47.449115 PCI: 00:14.2
1372 05:05:47.457640 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 05:05:47.468038 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 05:05:47.471098 PCI: 00:14.3
1375 05:05:47.481667 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 05:05:47.484277 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 05:05:47.494317 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 05:05:47.497236 I2C: 01:15
1379 05:05:47.500743 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 05:05:47.510988 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 05:05:47.514541 I2C: 02:5d
1382 05:05:47.515111 GENERIC: 0.0
1383 05:05:47.517760 PCI: 00:16.0
1384 05:05:47.527261 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 05:05:47.527821 PCI: 00:17.0
1386 05:05:47.537121 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 05:05:47.547267 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 05:05:47.557198 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 05:05:47.566941 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 05:05:47.576881 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 05:05:47.586736 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 05:05:47.589808 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 05:05:47.599900 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 05:05:47.603603 I2C: 03:1a
1395 05:05:47.604129 I2C: 03:38
1396 05:05:47.606723 I2C: 03:39
1397 05:05:47.607185 I2C: 03:3a
1398 05:05:47.607555 I2C: 03:3b
1399 05:05:47.613015 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 05:05:47.622865 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 05:05:47.633070 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 05:05:47.643462 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 05:05:47.643891 PCI: 01:00.0
1404 05:05:47.655970 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 05:05:47.656530 PCI: 00:1e.0
1406 05:05:47.666446 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 05:05:47.676620 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 05:05:47.683327 PCI: 00:1e.2 child on link 0 SPI: 00
1409 05:05:47.692698 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 05:05:47.693237 SPI: 00
1411 05:05:47.695746 PCI: 00:1e.3 child on link 0 SPI: 01
1412 05:05:47.706296 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 05:05:47.709922 SPI: 01
1414 05:05:47.712559 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 05:05:47.722611 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 05:05:47.732342 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 05:05:47.732917 PNP: 0c09.0
1418 05:05:47.742766 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 05:05:47.743237 PCI: 00:1f.3
1420 05:05:47.751880 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 05:05:47.761913 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 05:05:47.765409 PCI: 00:1f.4
1423 05:05:47.775256 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 05:05:47.785422 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 05:05:47.785998 PCI: 00:1f.5
1426 05:05:47.795091 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 05:05:47.798175 Done allocating resources.
1428 05:05:47.805200 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 05:05:47.808528 Enabling resources...
1430 05:05:47.811685 PCI: 00:00.0 subsystem <- 8086/9b61
1431 05:05:47.814971 PCI: 00:00.0 cmd <- 06
1432 05:05:47.818336 PCI: 00:02.0 subsystem <- 8086/9b41
1433 05:05:47.821769 PCI: 00:02.0 cmd <- 03
1434 05:05:47.822238 PCI: 00:08.0 cmd <- 06
1435 05:05:47.828368 PCI: 00:12.0 subsystem <- 8086/02f9
1436 05:05:47.828837 PCI: 00:12.0 cmd <- 02
1437 05:05:47.831700 PCI: 00:14.0 subsystem <- 8086/02ed
1438 05:05:47.835128 PCI: 00:14.0 cmd <- 02
1439 05:05:47.838589 PCI: 00:14.2 cmd <- 02
1440 05:05:47.842048 PCI: 00:14.3 subsystem <- 8086/02f0
1441 05:05:47.844777 PCI: 00:14.3 cmd <- 02
1442 05:05:47.848418 PCI: 00:15.0 subsystem <- 8086/02e8
1443 05:05:47.852123 PCI: 00:15.0 cmd <- 02
1444 05:05:47.855417 PCI: 00:15.1 subsystem <- 8086/02e9
1445 05:05:47.858390 PCI: 00:15.1 cmd <- 02
1446 05:05:47.861687 PCI: 00:16.0 subsystem <- 8086/02e0
1447 05:05:47.865546 PCI: 00:16.0 cmd <- 02
1448 05:05:47.868286 PCI: 00:17.0 subsystem <- 8086/02d3
1449 05:05:47.868843 PCI: 00:17.0 cmd <- 03
1450 05:05:47.874829 PCI: 00:19.0 subsystem <- 8086/02c5
1451 05:05:47.875419 PCI: 00:19.0 cmd <- 02
1452 05:05:47.878158 PCI: 00:1d.0 bridge ctrl <- 0013
1453 05:05:47.881676 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 05:05:47.884761 PCI: 00:1d.0 cmd <- 06
1455 05:05:47.887901 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 05:05:47.891362 PCI: 00:1e.0 cmd <- 06
1457 05:05:47.894985 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 05:05:47.898058 PCI: 00:1e.2 cmd <- 06
1459 05:05:47.901568 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 05:05:47.904688 PCI: 00:1e.3 cmd <- 02
1461 05:05:47.908187 PCI: 00:1f.0 subsystem <- 8086/0284
1462 05:05:47.911085 PCI: 00:1f.0 cmd <- 407
1463 05:05:47.914188 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 05:05:47.917810 PCI: 00:1f.3 cmd <- 02
1465 05:05:47.921308 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 05:05:47.924442 PCI: 00:1f.4 cmd <- 03
1467 05:05:47.928102 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 05:05:47.930680 PCI: 00:1f.5 cmd <- 406
1469 05:05:47.938173 PCI: 01:00.0 cmd <- 02
1470 05:05:47.943147 done.
1471 05:05:47.957239 ME: Version: 14.0.39.1367
1472 05:05:47.963221 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1473 05:05:47.966595 Initializing devices...
1474 05:05:47.967176 Root Device init ...
1475 05:05:47.973241 Chrome EC: Set SMI mask to 0x0000000000000000
1476 05:05:47.976813 Chrome EC: clear events_b mask to 0x0000000000000000
1477 05:05:47.983429 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 05:05:47.990165 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 05:05:47.996550 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 05:05:47.999842 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 05:05:48.002935 Root Device init finished in 35216 usecs
1482 05:05:48.006659 CPU_CLUSTER: 0 init ...
1483 05:05:48.013272 CPU_CLUSTER: 0 init finished in 2438 usecs
1484 05:05:48.017949 PCI: 00:00.0 init ...
1485 05:05:48.020677 CPU TDP: 15 Watts
1486 05:05:48.024014 CPU PL2 = 64 Watts
1487 05:05:48.027561 PCI: 00:00.0 init finished in 7068 usecs
1488 05:05:48.030622 PCI: 00:02.0 init ...
1489 05:05:48.033958 PCI: 00:02.0 init finished in 2252 usecs
1490 05:05:48.037620 PCI: 00:08.0 init ...
1491 05:05:48.040614 PCI: 00:08.0 init finished in 2252 usecs
1492 05:05:48.043680 PCI: 00:12.0 init ...
1493 05:05:48.047087 PCI: 00:12.0 init finished in 2251 usecs
1494 05:05:48.050619 PCI: 00:14.0 init ...
1495 05:05:48.053817 PCI: 00:14.0 init finished in 2242 usecs
1496 05:05:48.057222 PCI: 00:14.2 init ...
1497 05:05:48.060199 PCI: 00:14.2 init finished in 2252 usecs
1498 05:05:48.063804 PCI: 00:14.3 init ...
1499 05:05:48.067208 PCI: 00:14.3 init finished in 2270 usecs
1500 05:05:48.070073 PCI: 00:15.0 init ...
1501 05:05:48.073702 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 05:05:48.076615 PCI: 00:15.0 init finished in 5975 usecs
1503 05:05:48.080278 PCI: 00:15.1 init ...
1504 05:05:48.084099 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 05:05:48.090632 PCI: 00:15.1 init finished in 5975 usecs
1506 05:05:48.091160 PCI: 00:16.0 init ...
1507 05:05:48.096852 PCI: 00:16.0 init finished in 2251 usecs
1508 05:05:48.100136 PCI: 00:19.0 init ...
1509 05:05:48.103138 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 05:05:48.106993 PCI: 00:19.0 init finished in 5976 usecs
1511 05:05:48.109983 PCI: 00:1d.0 init ...
1512 05:05:48.113803 Initializing PCH PCIe bridge.
1513 05:05:48.116880 PCI: 00:1d.0 init finished in 5274 usecs
1514 05:05:48.119757 PCI: 00:1f.0 init ...
1515 05:05:48.123232 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 05:05:48.130240 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 05:05:48.130775 IOAPIC: ID = 0x02
1518 05:05:48.133285 IOAPIC: Dumping registers
1519 05:05:48.136507 reg 0x0000: 0x02000000
1520 05:05:48.139576 reg 0x0001: 0x00770020
1521 05:05:48.140030 reg 0x0002: 0x00000000
1522 05:05:48.146014 PCI: 00:1f.0 init finished in 23537 usecs
1523 05:05:48.149396 PCI: 00:1f.4 init ...
1524 05:05:48.153096 PCI: 00:1f.4 init finished in 2261 usecs
1525 05:05:48.163743 PCI: 01:00.0 init ...
1526 05:05:48.167078 PCI: 01:00.0 init finished in 2252 usecs
1527 05:05:48.171575 PNP: 0c09.0 init ...
1528 05:05:48.177796 Google Chrome EC uptime: 11.117 seconds
1529 05:05:48.181178 Google Chrome AP resets since EC boot: 0
1530 05:05:48.184200 Google Chrome most recent AP reset causes:
1531 05:05:48.190925 Google Chrome EC reset flags at last EC boot: reset-pin
1532 05:05:48.194398 PNP: 0c09.0 init finished in 20704 usecs
1533 05:05:48.197491 Devices initialized
1534 05:05:48.201193 Show all devs... After init.
1535 05:05:48.201662 Root Device: enabled 1
1536 05:05:48.204150 CPU_CLUSTER: 0: enabled 1
1537 05:05:48.207327 DOMAIN: 0000: enabled 1
1538 05:05:48.207850 APIC: 00: enabled 1
1539 05:05:48.211000 PCI: 00:00.0: enabled 1
1540 05:05:48.213762 PCI: 00:02.0: enabled 1
1541 05:05:48.217510 PCI: 00:04.0: enabled 0
1542 05:05:48.218036 PCI: 00:05.0: enabled 0
1543 05:05:48.220474 PCI: 00:12.0: enabled 1
1544 05:05:48.223818 PCI: 00:12.5: enabled 0
1545 05:05:48.227272 PCI: 00:12.6: enabled 0
1546 05:05:48.227817 PCI: 00:14.0: enabled 1
1547 05:05:48.230306 PCI: 00:14.1: enabled 0
1548 05:05:48.234145 PCI: 00:14.3: enabled 1
1549 05:05:48.234575 PCI: 00:14.5: enabled 0
1550 05:05:48.237177 PCI: 00:15.0: enabled 1
1551 05:05:48.240837 PCI: 00:15.1: enabled 1
1552 05:05:48.243919 PCI: 00:15.2: enabled 0
1553 05:05:48.244399 PCI: 00:15.3: enabled 0
1554 05:05:48.246947 PCI: 00:16.0: enabled 1
1555 05:05:48.250589 PCI: 00:16.1: enabled 0
1556 05:05:48.253483 PCI: 00:16.2: enabled 0
1557 05:05:48.253923 PCI: 00:16.3: enabled 0
1558 05:05:48.257055 PCI: 00:16.4: enabled 0
1559 05:05:48.260092 PCI: 00:16.5: enabled 0
1560 05:05:48.264331 PCI: 00:17.0: enabled 1
1561 05:05:48.264917 PCI: 00:19.0: enabled 1
1562 05:05:48.267072 PCI: 00:19.1: enabled 0
1563 05:05:48.270257 PCI: 00:19.2: enabled 0
1564 05:05:48.274057 PCI: 00:1a.0: enabled 0
1565 05:05:48.274509 PCI: 00:1c.0: enabled 0
1566 05:05:48.276964 PCI: 00:1c.1: enabled 0
1567 05:05:48.280304 PCI: 00:1c.2: enabled 0
1568 05:05:48.280816 PCI: 00:1c.3: enabled 0
1569 05:05:48.283701 PCI: 00:1c.4: enabled 0
1570 05:05:48.286667 PCI: 00:1c.5: enabled 0
1571 05:05:48.290145 PCI: 00:1c.6: enabled 0
1572 05:05:48.290596 PCI: 00:1c.7: enabled 0
1573 05:05:48.293463 PCI: 00:1d.0: enabled 1
1574 05:05:48.297052 PCI: 00:1d.1: enabled 0
1575 05:05:48.300317 PCI: 00:1d.2: enabled 0
1576 05:05:48.300743 PCI: 00:1d.3: enabled 0
1577 05:05:48.303197 PCI: 00:1d.4: enabled 0
1578 05:05:48.307017 PCI: 00:1d.5: enabled 0
1579 05:05:48.309937 PCI: 00:1e.0: enabled 1
1580 05:05:48.310359 PCI: 00:1e.1: enabled 0
1581 05:05:48.313008 PCI: 00:1e.2: enabled 1
1582 05:05:48.316478 PCI: 00:1e.3: enabled 1
1583 05:05:48.317069 PCI: 00:1f.0: enabled 1
1584 05:05:48.320226 PCI: 00:1f.1: enabled 0
1585 05:05:48.323228 PCI: 00:1f.2: enabled 0
1586 05:05:48.326922 PCI: 00:1f.3: enabled 1
1587 05:05:48.327415 PCI: 00:1f.4: enabled 1
1588 05:05:48.330055 PCI: 00:1f.5: enabled 1
1589 05:05:48.333100 PCI: 00:1f.6: enabled 0
1590 05:05:48.336572 USB0 port 0: enabled 1
1591 05:05:48.337062 I2C: 01:15: enabled 1
1592 05:05:48.339452 I2C: 02:5d: enabled 1
1593 05:05:48.343033 GENERIC: 0.0: enabled 1
1594 05:05:48.343505 I2C: 03:1a: enabled 1
1595 05:05:48.346017 I2C: 03:38: enabled 1
1596 05:05:48.349985 I2C: 03:39: enabled 1
1597 05:05:48.350408 I2C: 03:3a: enabled 1
1598 05:05:48.352623 I2C: 03:3b: enabled 1
1599 05:05:48.356289 PCI: 00:00.0: enabled 1
1600 05:05:48.356797 SPI: 00: enabled 1
1601 05:05:48.359844 SPI: 01: enabled 1
1602 05:05:48.362795 PNP: 0c09.0: enabled 1
1603 05:05:48.363263 USB2 port 0: enabled 1
1604 05:05:48.366200 USB2 port 1: enabled 1
1605 05:05:48.369374 USB2 port 2: enabled 0
1606 05:05:48.372818 USB2 port 3: enabled 0
1607 05:05:48.373348 USB2 port 5: enabled 0
1608 05:05:48.376179 USB2 port 6: enabled 1
1609 05:05:48.379153 USB2 port 9: enabled 1
1610 05:05:48.379619 USB3 port 0: enabled 1
1611 05:05:48.382865 USB3 port 1: enabled 1
1612 05:05:48.386166 USB3 port 2: enabled 1
1613 05:05:48.386586 USB3 port 3: enabled 1
1614 05:05:48.389961 USB3 port 4: enabled 0
1615 05:05:48.392757 APIC: 02: enabled 1
1616 05:05:48.393177 APIC: 01: enabled 1
1617 05:05:48.395920 APIC: 03: enabled 1
1618 05:05:48.399259 APIC: 07: enabled 1
1619 05:05:48.399811 APIC: 06: enabled 1
1620 05:05:48.402841 APIC: 05: enabled 1
1621 05:05:48.403522 APIC: 04: enabled 1
1622 05:05:48.405881 PCI: 00:08.0: enabled 1
1623 05:05:48.409442 PCI: 00:14.2: enabled 1
1624 05:05:48.412427 PCI: 01:00.0: enabled 1
1625 05:05:48.415951 Disabling ACPI via APMC:
1626 05:05:48.416509 done.
1627 05:05:48.423130 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 05:05:48.426084 ELOG: NV offset 0xaf0000 size 0x4000
1629 05:05:48.432614 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 05:05:48.439204 ELOG: Event(17) added with size 13 at 2024-02-07 05:05:49 UTC
1631 05:05:48.445678 ELOG: Event(92) added with size 9 at 2024-02-07 05:05:49 UTC
1632 05:05:48.452200 ELOG: Event(93) added with size 9 at 2024-02-07 05:05:49 UTC
1633 05:05:48.459190 ELOG: Event(9A) added with size 9 at 2024-02-07 05:05:49 UTC
1634 05:05:48.465616 ELOG: Event(9E) added with size 10 at 2024-02-07 05:05:49 UTC
1635 05:05:48.472697 ELOG: Event(9F) added with size 14 at 2024-02-07 05:05:49 UTC
1636 05:05:48.475634 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1637 05:05:48.482843 ELOG: Event(A1) added with size 10 at 2024-02-07 05:05:49 UTC
1638 05:05:48.492884 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 05:05:48.499309 ELOG: Event(A0) added with size 9 at 2024-02-07 05:05:49 UTC
1640 05:05:48.502969 elog_add_boot_reason: Logged dev mode boot
1641 05:05:48.506301 Finalize devices...
1642 05:05:48.506726 PCI: 00:17.0 final
1643 05:05:48.509165 Devices finalized
1644 05:05:48.512740 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 05:05:48.519005 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 05:05:48.523193 ME: HFSTS1 : 0x90000245
1647 05:05:48.526383 ME: HFSTS2 : 0x3B850126
1648 05:05:48.532349 ME: HFSTS3 : 0x00000020
1649 05:05:48.535708 ME: HFSTS4 : 0x00004800
1650 05:05:48.539149 ME: HFSTS5 : 0x00000000
1651 05:05:48.542313 ME: HFSTS6 : 0x40400006
1652 05:05:48.546069 ME: Manufacturing Mode : NO
1653 05:05:48.548946 ME: FW Partition Table : OK
1654 05:05:48.551816 ME: Bringup Loader Failure : NO
1655 05:05:48.555740 ME: Firmware Init Complete : YES
1656 05:05:48.559036 ME: Boot Options Present : NO
1657 05:05:48.562374 ME: Update In Progress : NO
1658 05:05:48.565265 ME: D0i3 Support : YES
1659 05:05:48.568831 ME: Low Power State Enabled : NO
1660 05:05:48.572331 ME: CPU Replaced : NO
1661 05:05:48.575298 ME: CPU Replacement Valid : YES
1662 05:05:48.578868 ME: Current Working State : 5
1663 05:05:48.582004 ME: Current Operation State : 1
1664 05:05:48.585230 ME: Current Operation Mode : 0
1665 05:05:48.588569 ME: Error Code : 0
1666 05:05:48.592225 ME: CPU Debug Disabled : YES
1667 05:05:48.595198 ME: TXT Support : NO
1668 05:05:48.601835 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 05:05:48.608817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 05:05:48.609245 CBFS @ c08000 size 3f8000
1671 05:05:48.615142 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 05:05:48.619008 CBFS: Locating 'fallback/dsdt.aml'
1673 05:05:48.621352 CBFS: Found @ offset 10bb80 size 3fa5
1674 05:05:48.628878 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 05:05:48.631598 CBFS @ c08000 size 3f8000
1676 05:05:48.638411 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 05:05:48.638904 CBFS: Locating 'fallback/slic'
1678 05:05:48.643588 CBFS: 'fallback/slic' not found.
1679 05:05:48.650638 ACPI: Writing ACPI tables at 99b3e000.
1680 05:05:48.651165 ACPI: * FACS
1681 05:05:48.653572 ACPI: * DSDT
1682 05:05:48.657052 Ramoops buffer: 0x100000@0x99a3d000.
1683 05:05:48.660731 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 05:05:48.667008 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 05:05:48.669936 Google Chrome EC: version:
1686 05:05:48.673501 ro: helios_v2.0.2659-56403530b
1687 05:05:48.676304 rw: helios_v2.0.2849-c41de27e7d
1688 05:05:48.676727 running image: 1
1689 05:05:48.680865 ACPI: * FADT
1690 05:05:48.681337 SCI is IRQ9
1691 05:05:48.687276 ACPI: added table 1/32, length now 40
1692 05:05:48.687805 ACPI: * SSDT
1693 05:05:48.690782 Found 1 CPU(s) with 8 core(s) each.
1694 05:05:48.693911 Error: Could not locate 'wifi_sar' in VPD.
1695 05:05:48.700984 Checking CBFS for default SAR values
1696 05:05:48.704687 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 05:05:48.707439 CBFS @ c08000 size 3f8000
1698 05:05:48.714507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 05:05:48.717797 CBFS: Locating 'wifi_sar_defaults.hex'
1700 05:05:48.721166 CBFS: Found @ offset 5fac0 size 77
1701 05:05:48.723745 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 05:05:48.731021 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 05:05:48.734444 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 05:05:48.740215 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 05:05:48.743834 failed to find key in VPD: dsm_calib_r0_0
1706 05:05:48.753456 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 05:05:48.756559 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 05:05:48.760517 failed to find key in VPD: dsm_calib_r0_1
1709 05:05:48.770071 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 05:05:48.776749 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 05:05:48.780095 failed to find key in VPD: dsm_calib_r0_2
1712 05:05:48.789952 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 05:05:48.793384 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 05:05:48.799535 failed to find key in VPD: dsm_calib_r0_3
1715 05:05:48.806252 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 05:05:48.812976 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 05:05:48.816366 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 05:05:48.819377 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 05:05:48.824288 EC returned error result code 1
1720 05:05:48.827426 EC returned error result code 1
1721 05:05:48.830801 EC returned error result code 1
1722 05:05:48.837079 PS2K: Bad resp from EC. Vivaldi disabled!
1723 05:05:48.840553 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 05:05:48.847107 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 05:05:48.853771 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 05:05:48.856881 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 05:05:48.863628 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 05:05:48.870120 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 05:05:48.876871 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 05:05:48.880382 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 05:05:48.886920 ACPI: added table 2/32, length now 44
1732 05:05:48.887106 ACPI: * MCFG
1733 05:05:48.890375 ACPI: added table 3/32, length now 48
1734 05:05:48.893472 ACPI: * TPM2
1735 05:05:48.897136 TPM2 log created at 99a2d000
1736 05:05:48.900199 ACPI: added table 4/32, length now 52
1737 05:05:48.900379 ACPI: * MADT
1738 05:05:48.903304 SCI is IRQ9
1739 05:05:48.906774 ACPI: added table 5/32, length now 56
1740 05:05:48.907013 current = 99b43ac0
1741 05:05:48.909966 ACPI: * DMAR
1742 05:05:48.913700 ACPI: added table 6/32, length now 60
1743 05:05:48.916899 ACPI: * IGD OpRegion
1744 05:05:48.917424 GMA: Found VBT in CBFS
1745 05:05:48.920704 GMA: Found valid VBT in CBFS
1746 05:05:48.923654 ACPI: added table 7/32, length now 64
1747 05:05:48.926661 ACPI: * HPET
1748 05:05:48.930210 ACPI: added table 8/32, length now 68
1749 05:05:48.930651 ACPI: done.
1750 05:05:48.933478 ACPI tables: 31744 bytes.
1751 05:05:48.937519 smbios_write_tables: 99a2c000
1752 05:05:48.940362 EC returned error result code 3
1753 05:05:48.944654 Couldn't obtain OEM name from CBI
1754 05:05:48.947488 Create SMBIOS type 17
1755 05:05:48.950092 PCI: 00:00.0 (Intel Cannonlake)
1756 05:05:48.953683 PCI: 00:14.3 (Intel WiFi)
1757 05:05:48.956862 SMBIOS tables: 939 bytes.
1758 05:05:48.960453 Writing table forward entry at 0x00000500
1759 05:05:48.967166 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 05:05:48.970048 Writing coreboot table at 0x99b62000
1761 05:05:48.976653 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 05:05:48.979877 1. 0000000000001000-000000000009ffff: RAM
1763 05:05:48.983325 2. 00000000000a0000-00000000000fffff: RESERVED
1764 05:05:48.989923 3. 0000000000100000-0000000099a2bfff: RAM
1765 05:05:48.993297 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 05:05:49.000178 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 05:05:49.006584 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 05:05:49.009817 7. 000000009a000000-000000009f7fffff: RESERVED
1769 05:05:49.016416 8. 00000000e0000000-00000000efffffff: RESERVED
1770 05:05:49.019852 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 05:05:49.022854 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 05:05:49.030364 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 05:05:49.033337 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 05:05:49.039807 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 05:05:49.042725 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 05:05:49.049492 15. 0000000100000000-000000045e7fffff: RAM
1777 05:05:49.052950 Graphics framebuffer located at 0xc0000000
1778 05:05:49.056342 Passing 5 GPIOs to payload:
1779 05:05:49.059220 NAME | PORT | POLARITY | VALUE
1780 05:05:49.065842 write protect | undefined | high | low
1781 05:05:49.069114 lid | undefined | high | high
1782 05:05:49.075965 power | undefined | high | low
1783 05:05:49.082910 oprom | undefined | high | low
1784 05:05:49.085769 EC in RW | 0x000000cb | high | low
1785 05:05:49.089498 Board ID: 4
1786 05:05:49.092575 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 05:05:49.095892 CBFS @ c08000 size 3f8000
1788 05:05:49.102459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 05:05:49.108894 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1790 05:05:49.109357 coreboot table: 1492 bytes.
1791 05:05:49.112469 IMD ROOT 0. 99fff000 00001000
1792 05:05:49.115456 IMD SMALL 1. 99ffe000 00001000
1793 05:05:49.118505 FSP MEMORY 2. 99c4e000 003b0000
1794 05:05:49.122083 CONSOLE 3. 99c2e000 00020000
1795 05:05:49.125197 FMAP 4. 99c2d000 0000054e
1796 05:05:49.129064 TIME STAMP 5. 99c2c000 00000910
1797 05:05:49.132127 VBOOT WORK 6. 99c18000 00014000
1798 05:05:49.135437 MRC DATA 7. 99c16000 00001958
1799 05:05:49.138689 ROMSTG STCK 8. 99c15000 00001000
1800 05:05:49.141964 AFTER CAR 9. 99c0b000 0000a000
1801 05:05:49.145650 RAMSTAGE 10. 99baf000 0005c000
1802 05:05:49.149303 REFCODE 11. 99b7a000 00035000
1803 05:05:49.152122 SMM BACKUP 12. 99b6a000 00010000
1804 05:05:49.155091 COREBOOT 13. 99b62000 00008000
1805 05:05:49.158719 ACPI 14. 99b3e000 00024000
1806 05:05:49.162127 ACPI GNVS 15. 99b3d000 00001000
1807 05:05:49.165115 RAMOOPS 16. 99a3d000 00100000
1808 05:05:49.168709 TPM2 TCGLOG17. 99a2d000 00010000
1809 05:05:49.171961 SMBIOS 18. 99a2c000 00000800
1810 05:05:49.176011 IMD small region:
1811 05:05:49.179647 IMD ROOT 0. 99ffec00 00000400
1812 05:05:49.181930 FSP RUNTIME 1. 99ffebe0 00000004
1813 05:05:49.185247 EC HOSTEVENT 2. 99ffebc0 00000008
1814 05:05:49.188818 POWER STATE 3. 99ffeb80 00000040
1815 05:05:49.192138 ROMSTAGE 4. 99ffeb60 00000004
1816 05:05:49.195345 MEM INFO 5. 99ffe9a0 000001b9
1817 05:05:49.198603 VPD 6. 99ffe920 0000006c
1818 05:05:49.201733 MTRR: Physical address space:
1819 05:05:49.208655 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 05:05:49.215171 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 05:05:49.221873 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 05:05:49.228339 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 05:05:49.234696 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 05:05:49.241385 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 05:05:49.248286 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 05:05:49.251494 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 05:05:49.255051 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 05:05:49.257975 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 05:05:49.261643 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 05:05:49.268184 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 05:05:49.271531 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 05:05:49.274968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 05:05:49.277843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 05:05:49.284791 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 05:05:49.288940 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 05:05:49.291556 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 05:05:49.295045 call enable_fixed_mtrr()
1838 05:05:49.298007 CPU physical address size: 39 bits
1839 05:05:49.304709 MTRR: default type WB/UC MTRR counts: 6/8.
1840 05:05:49.308326 MTRR: WB selected as default type.
1841 05:05:49.310934 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 05:05:49.317832 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 05:05:49.324192 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 05:05:49.330712 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 05:05:49.337952 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 05:05:49.344125 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 05:05:49.347344 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 05:05:49.354051 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 05:05:49.357213 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 05:05:49.360999 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 05:05:49.364496 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 05:05:49.370346 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 05:05:49.374196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 05:05:49.377292 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 05:05:49.380964 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 05:05:49.386867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 05:05:49.390850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 05:05:49.391381
1859 05:05:49.391718 MTRR check
1860 05:05:49.393576 Fixed MTRRs : Enabled
1861 05:05:49.396755 Variable MTRRs: Enabled
1862 05:05:49.397170
1863 05:05:49.400325 call enable_fixed_mtrr()
1864 05:05:49.404144 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 05:05:49.407313 CPU physical address size: 39 bits
1866 05:05:49.413873 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 05:05:49.417180 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 05:05:49.420369 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 05:05:49.426798 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 05:05:49.430083 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 05:05:49.433785 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 05:05:49.436435 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 05:05:49.443285 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 05:05:49.446515 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 05:05:49.449863 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 05:05:49.453142 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 05:05:49.456426 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 05:05:49.463461 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 05:05:49.466350 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 05:05:49.469752 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 05:05:49.476286 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 05:05:49.479449 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 05:05:49.482975 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 05:05:49.486201 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 05:05:49.493034 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 05:05:49.496090 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 05:05:49.499209 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 05:05:49.502945 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 05:05:49.506379 call enable_fixed_mtrr()
1890 05:05:49.509862 call enable_fixed_mtrr()
1891 05:05:49.513500 CPU physical address size: 39 bits
1892 05:05:49.516354 CPU physical address size: 39 bits
1893 05:05:49.519346 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 05:05:49.525885 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 05:05:49.529300 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 05:05:49.532946 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 05:05:49.536083 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 05:05:49.539529 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 05:05:49.545581 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 05:05:49.548888 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 05:05:49.552501 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 05:05:49.555610 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 05:05:49.562390 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 05:05:49.565198 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 05:05:49.569221 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 05:05:49.572390 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 05:05:49.578620 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 05:05:49.581840 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 05:05:49.585461 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 05:05:49.588757 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 05:05:49.595352 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 05:05:49.598392 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 05:05:49.602291 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 05:05:49.605164 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 05:05:49.608655 call enable_fixed_mtrr()
1916 05:05:49.612127 call enable_fixed_mtrr()
1917 05:05:49.615130 CPU physical address size: 39 bits
1918 05:05:49.618397 CPU physical address size: 39 bits
1919 05:05:49.622232 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 05:05:49.628727 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 05:05:49.632398 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 05:05:49.634859 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 05:05:49.638434 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 05:05:49.645001 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 05:05:49.648091 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 05:05:49.651627 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 05:05:49.654999 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 05:05:49.661541 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 05:05:49.665047 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 05:05:49.667996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 05:05:49.671657 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 05:05:49.677949 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 05:05:49.681037 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 05:05:49.683991 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 05:05:49.687645 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 05:05:49.694405 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 05:05:49.697249 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 05:05:49.700811 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 05:05:49.704329 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 05:05:49.707467 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 05:05:49.710798 call enable_fixed_mtrr()
1942 05:05:49.713757 call enable_fixed_mtrr()
1943 05:05:49.717696 CPU physical address size: 39 bits
1944 05:05:49.720604 CPU physical address size: 39 bits
1945 05:05:49.723906 CBFS @ c08000 size 3f8000
1946 05:05:49.730703 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1947 05:05:49.733720 CBFS: Locating 'fallback/payload'
1948 05:05:49.737458 CBFS: Found @ offset 1c96c0 size 3f798
1949 05:05:49.743529 Checking segment from ROM address 0xffdd16f8
1950 05:05:49.746954 Checking segment from ROM address 0xffdd1714
1951 05:05:49.750185 Loading segment from ROM address 0xffdd16f8
1952 05:05:49.754198 code (compression=0)
1953 05:05:49.763468 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 05:05:49.770206 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 05:05:49.773814 it's not compressed!
1956 05:05:49.865238 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 05:05:49.871928 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 05:05:49.875487 Loading segment from ROM address 0xffdd1714
1959 05:05:49.878709 Entry Point 0x30000000
1960 05:05:49.882074 Loaded segments
1961 05:05:49.887892 Finalizing chipset.
1962 05:05:49.890754 Finalizing SMM.
1963 05:05:49.894629 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1964 05:05:49.897581 mp_park_aps done after 0 msecs.
1965 05:05:49.904060 Jumping to boot code at 30000000(99b62000)
1966 05:05:49.910626 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 05:05:49.910714
1968 05:05:49.910807
1969 05:05:49.910891
1970 05:05:49.913869 Starting depthcharge on Helios...
1971 05:05:49.913953
1972 05:05:49.914310 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 05:05:49.914420 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 05:05:49.914511 Setting prompt string to ['hatch:']
1975 05:05:49.914613 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 05:05:49.923689 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 05:05:49.923777
1978 05:05:49.930465 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 05:05:49.930550
1980 05:05:49.937166 board_setup: Info: eMMC controller not present; skipping
1981 05:05:49.937252
1982 05:05:49.940008 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 05:05:49.940118
1984 05:05:49.947306 board_setup: Info: SDHCI controller not present; skipping
1985 05:05:49.947391
1986 05:05:49.953732 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 05:05:49.953821
1988 05:05:49.953907 Wipe memory regions:
1989 05:05:49.953989
1990 05:05:49.956946 [0x00000000001000, 0x000000000a0000)
1991 05:05:49.957050
1992 05:05:49.960479 [0x00000000100000, 0x00000030000000)
1993 05:05:50.026585
1994 05:05:50.029977 [0x00000030657430, 0x00000099a2c000)
1995 05:05:50.167341
1996 05:05:50.170051 [0x00000100000000, 0x0000045e800000)
1997 05:05:51.552720
1998 05:05:51.552889 R8152: Initializing
1999 05:05:51.553045
2000 05:05:51.556045 Version 9 (ocp_data = 6010)
2001 05:05:51.560041
2002 05:05:51.560146 R8152: Done initializing
2003 05:05:51.560212
2004 05:05:51.563650 Adding net device
2005 05:05:52.046110
2006 05:05:52.046247 R8152: Initializing
2007 05:05:52.046314
2008 05:05:52.049458 Version 6 (ocp_data = 5c30)
2009 05:05:52.049541
2010 05:05:52.053283 R8152: Done initializing
2011 05:05:52.053366
2012 05:05:52.056041 net_add_device: Attemp to include the same device
2013 05:05:52.060104
2014 05:05:52.067032 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 05:05:52.067115
2016 05:05:52.067180
2017 05:05:52.067240
2018 05:05:52.067519 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 05:05:52.167855 hatch: tftpboot 192.168.201.1 12711661/tftp-deploy-t6tj9b4e/kernel/bzImage 12711661/tftp-deploy-t6tj9b4e/kernel/cmdline 12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
2021 05:05:52.168006 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 05:05:52.168164 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 05:05:52.172779 tftpboot 192.168.201.1 12711661/tftp-deploy-t6tj9b4e/kernel/bzImploy-t6tj9b4e/kernel/cmdline 12711661/tftp-deploy-t6tj9b4e/ramdisk/ramdisk.cpio.gz
2024 05:05:52.172901
2025 05:05:52.172965 Waiting for link
2026 05:05:52.373400
2027 05:05:52.373536 done.
2028 05:05:52.373602
2029 05:05:52.373663 MAC: 00:24:32:50:1a:5f
2030 05:05:52.373723
2031 05:05:52.376594 Sending DHCP discover... done.
2032 05:05:52.376678
2033 05:05:52.380186 Waiting for reply... done.
2034 05:05:52.380269
2035 05:05:52.383577 Sending DHCP request... done.
2036 05:05:52.383684
2037 05:05:52.386587 Waiting for reply... done.
2038 05:05:52.386669
2039 05:05:52.389939 My ip is 192.168.201.21
2040 05:05:52.390021
2041 05:05:52.393307 The DHCP server ip is 192.168.201.1
2042 05:05:52.393389
2043 05:05:52.400044 TFTP server IP predefined by user: 192.168.201.1
2044 05:05:52.400167
2045 05:05:52.406587 Bootfile predefined by user: 12711661/tftp-deploy-t6tj9b4e/kernel/bzImage
2046 05:05:52.406670
2047 05:05:52.409723 Sending tftp read request... done.
2048 05:05:52.409839
2049 05:05:52.413225 Waiting for the transfer...
2050 05:05:52.413308
2051 05:05:53.065096 00000000 ################################################################
2052 05:05:53.065231
2053 05:05:53.709720 00080000 ################################################################
2054 05:05:53.709866
2055 05:05:54.300499 00100000 ################################################################
2056 05:05:54.300640
2057 05:05:54.856647 00180000 ################################################################
2058 05:05:54.856777
2059 05:05:55.395623 00200000 ################################################################
2060 05:05:55.395758
2061 05:05:55.999329 00280000 ################################################################
2062 05:05:55.999471
2063 05:05:56.538940 00300000 ################################################################
2064 05:05:56.539086
2065 05:05:57.072243 00380000 ################################################################
2066 05:05:57.072391
2067 05:05:57.610177 00400000 ################################################################
2068 05:05:57.610346
2069 05:05:58.158242 00480000 ################################################################
2070 05:05:58.158399
2071 05:05:58.696196 00500000 ################################################################
2072 05:05:58.696335
2073 05:05:59.229604 00580000 ################################################################
2074 05:05:59.229744
2075 05:05:59.768751 00600000 ################################################################
2076 05:05:59.768894
2077 05:06:00.307861 00680000 ################################################################
2078 05:06:00.308003
2079 05:06:00.876168 00700000 ################################################################
2080 05:06:00.876678
2081 05:06:01.537727 00780000 ################################################################
2082 05:06:01.538294
2083 05:06:01.782208 00800000 ####################### done.
2084 05:06:01.782684
2085 05:06:01.786096 The bootfile was 8576912 bytes long.
2086 05:06:01.786671
2087 05:06:01.788961 Sending tftp read request... done.
2088 05:06:01.789424
2089 05:06:01.792567 Waiting for the transfer...
2090 05:06:01.793026
2091 05:06:02.497961 00000000 ################################################################
2092 05:06:02.498102
2093 05:06:03.173331 00080000 ################################################################
2094 05:06:03.173462
2095 05:06:03.820434 00100000 ################################################################
2096 05:06:03.820584
2097 05:06:04.463919 00180000 ################################################################
2098 05:06:04.464078
2099 05:06:05.106487 00200000 ################################################################
2100 05:06:05.106638
2101 05:06:05.752095 00280000 ################################################################
2102 05:06:05.752650
2103 05:06:06.418237 00300000 ################################################################
2104 05:06:06.418785
2105 05:06:07.049284 00380000 ################################################################
2106 05:06:07.049417
2107 05:06:07.735340 00400000 ################################################################
2108 05:06:07.735880
2109 05:06:08.418893 00480000 ################################################################
2110 05:06:08.419454
2111 05:06:09.072975 00500000 ################################################################
2112 05:06:09.073122
2113 05:06:09.674404 00580000 ################################################################
2114 05:06:09.674552
2115 05:06:10.255938 00600000 ################################################################
2116 05:06:10.256134
2117 05:06:10.770486 00680000 ################################################################
2118 05:06:10.770633
2119 05:06:11.282534 00700000 ################################################################
2120 05:06:11.282681
2121 05:06:11.795116 00780000 ################################################################
2122 05:06:11.795259
2123 05:06:12.212663 00800000 #################################################### done.
2124 05:06:12.212811
2125 05:06:12.216486 Sending tftp read request... done.
2126 05:06:12.216572
2127 05:06:12.219414 Waiting for the transfer...
2128 05:06:12.219515
2129 05:06:12.219581 00000000 # done.
2130 05:06:12.219644
2131 05:06:12.229131 Command line loaded dynamically from TFTP file: 12711661/tftp-deploy-t6tj9b4e/kernel/cmdline
2132 05:06:12.229216
2133 05:06:12.249081 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 05:06:12.249172
2135 05:06:12.255647 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 05:06:12.259714
2137 05:06:12.262740 Shutting down all USB controllers.
2138 05:06:12.262821
2139 05:06:12.262886 Removing current net device
2140 05:06:12.266340
2141 05:06:12.266420 Finalizing coreboot
2142 05:06:12.266485
2143 05:06:12.273058 Exiting depthcharge with code 4 at timestamp: 29733035
2144 05:06:12.273140
2145 05:06:12.273205
2146 05:06:12.273265 Starting kernel ...
2147 05:06:12.273322
2148 05:06:12.273722 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2149 05:06:12.273866 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2150 05:06:12.273984 Setting prompt string to ['Linux version [0-9]']
2151 05:06:12.274083 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 05:06:12.274179 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2153 05:06:12.276248
2155 05:10:32.275073 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2157 05:10:32.276870 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2159 05:10:32.278288 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 05:10:32.279630 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 05:10:32.279854 Cleaning after the job
2165 05:10:32.279943 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/ramdisk
2166 05:10:32.281287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/kernel
2167 05:10:32.282704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711661/tftp-deploy-t6tj9b4e/modules
2168 05:10:32.283052 start: 5.1 power-off (timeout 00:00:30) [common]
2169 05:10:32.283213 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2170 05:10:32.363516 >> Command sent successfully.
2171 05:10:32.374926 Returned 0 in 0 seconds
2172 05:10:32.476531 end: 5.1 power-off (duration 00:00:00) [common]
2174 05:10:32.478277 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 05:10:32.479686 Listened to connection for namespace 'common' for up to 1s
2177 05:10:32.481231 Listened to connection for namespace 'common' for up to 1s
2178 05:10:33.480488 Finalising connection for namespace 'common'
2179 05:10:33.481224 Disconnecting from shell: Finalise
2180 05:10:33.481745
2181 05:10:33.583082 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 05:10:33.583753 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12711661
2183 05:10:33.604395 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12711661
2184 05:10:33.604543 JobError: Your job cannot terminate cleanly.