Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 05:05:27.425150 lava-dispatcher, installed at version: 2024.01
2 05:05:27.425347 start: 0 validate
3 05:05:27.425474 Start time: 2024-02-07 05:05:27.425467+00:00 (UTC)
4 05:05:27.425592 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:05:27.425715 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 05:05:27.695660 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:05:27.696415 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1250-gd530578b1386%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:05:35.713307 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:05:35.714000 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1250-gd530578b1386%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 05:05:35.985843 validate duration: 8.56
12 05:05:35.987123 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:05:35.987716 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:05:35.988279 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:05:35.988926 Not decompressing ramdisk as can be used compressed.
16 05:05:35.989394 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 05:05:35.989746 saving as /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/ramdisk/rootfs.cpio.gz
18 05:05:35.990094 total size: 8418130 (8 MB)
19 05:05:36.626212 progress 0 % (0 MB)
20 05:05:36.631854 progress 5 % (0 MB)
21 05:05:36.634110 progress 10 % (0 MB)
22 05:05:36.636379 progress 15 % (1 MB)
23 05:05:36.638628 progress 20 % (1 MB)
24 05:05:36.640880 progress 25 % (2 MB)
25 05:05:36.643137 progress 30 % (2 MB)
26 05:05:36.645218 progress 35 % (2 MB)
27 05:05:36.647472 progress 40 % (3 MB)
28 05:05:36.649755 progress 45 % (3 MB)
29 05:05:36.652006 progress 50 % (4 MB)
30 05:05:36.654245 progress 55 % (4 MB)
31 05:05:36.656469 progress 60 % (4 MB)
32 05:05:36.658576 progress 65 % (5 MB)
33 05:05:36.660791 progress 70 % (5 MB)
34 05:05:36.663004 progress 75 % (6 MB)
35 05:05:36.665253 progress 80 % (6 MB)
36 05:05:36.667493 progress 85 % (6 MB)
37 05:05:36.669711 progress 90 % (7 MB)
38 05:05:36.671923 progress 95 % (7 MB)
39 05:05:36.673977 progress 100 % (8 MB)
40 05:05:36.674205 8 MB downloaded in 0.68 s (11.73 MB/s)
41 05:05:36.674361 end: 1.1.1 http-download (duration 00:00:01) [common]
43 05:05:36.674599 end: 1.1 download-retry (duration 00:00:01) [common]
44 05:05:36.674687 start: 1.2 download-retry (timeout 00:09:59) [common]
45 05:05:36.674770 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 05:05:36.674905 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1250-gd530578b1386/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 05:05:36.674973 saving as /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/kernel/bzImage
48 05:05:36.675034 total size: 8576912 (8 MB)
49 05:05:36.675093 No compression specified
50 05:05:36.676184 progress 0 % (0 MB)
51 05:05:36.678554 progress 5 % (0 MB)
52 05:05:36.680820 progress 10 % (0 MB)
53 05:05:36.683071 progress 15 % (1 MB)
54 05:05:36.685330 progress 20 % (1 MB)
55 05:05:36.687584 progress 25 % (2 MB)
56 05:05:36.689851 progress 30 % (2 MB)
57 05:05:36.692103 progress 35 % (2 MB)
58 05:05:36.694351 progress 40 % (3 MB)
59 05:05:36.696621 progress 45 % (3 MB)
60 05:05:36.698883 progress 50 % (4 MB)
61 05:05:36.701168 progress 55 % (4 MB)
62 05:05:36.703562 progress 60 % (4 MB)
63 05:05:36.705807 progress 65 % (5 MB)
64 05:05:36.708074 progress 70 % (5 MB)
65 05:05:36.710369 progress 75 % (6 MB)
66 05:05:36.712690 progress 80 % (6 MB)
67 05:05:36.714948 progress 85 % (6 MB)
68 05:05:36.717239 progress 90 % (7 MB)
69 05:05:36.719445 progress 95 % (7 MB)
70 05:05:36.721726 progress 100 % (8 MB)
71 05:05:36.721926 8 MB downloaded in 0.05 s (174.45 MB/s)
72 05:05:36.722069 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:05:36.722293 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:05:36.722382 start: 1.3 download-retry (timeout 00:09:59) [common]
76 05:05:36.722463 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 05:05:36.722600 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1250-gd530578b1386/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 05:05:36.722667 saving as /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/modules/modules.tar
79 05:05:36.722727 total size: 250816 (0 MB)
80 05:05:36.722786 Using unxz to decompress xz
81 05:05:36.727049 progress 13 % (0 MB)
82 05:05:36.727444 progress 26 % (0 MB)
83 05:05:36.727705 progress 39 % (0 MB)
84 05:05:36.729264 progress 52 % (0 MB)
85 05:05:36.731046 progress 65 % (0 MB)
86 05:05:36.732862 progress 78 % (0 MB)
87 05:05:36.734577 progress 91 % (0 MB)
88 05:05:36.736525 progress 100 % (0 MB)
89 05:05:36.741783 0 MB downloaded in 0.02 s (12.56 MB/s)
90 05:05:36.742002 end: 1.3.1 http-download (duration 00:00:00) [common]
92 05:05:36.742262 end: 1.3 download-retry (duration 00:00:00) [common]
93 05:05:36.742355 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 05:05:36.742450 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 05:05:36.742527 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 05:05:36.742612 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 05:05:36.742828 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl
98 05:05:36.742962 makedir: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin
99 05:05:36.743066 makedir: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/tests
100 05:05:36.743162 makedir: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/results
101 05:05:36.743276 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-add-keys
102 05:05:36.743424 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-add-sources
103 05:05:36.743552 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-background-process-start
104 05:05:36.743707 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-background-process-stop
105 05:05:36.743847 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-common-functions
106 05:05:36.743970 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-echo-ipv4
107 05:05:36.744092 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-install-packages
108 05:05:36.744212 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-installed-packages
109 05:05:36.744332 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-os-build
110 05:05:36.744455 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-probe-channel
111 05:05:36.744576 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-probe-ip
112 05:05:36.744697 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-target-ip
113 05:05:36.744817 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-target-mac
114 05:05:36.744936 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-target-storage
115 05:05:36.745062 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-case
116 05:05:36.745185 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-event
117 05:05:36.745312 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-feedback
118 05:05:36.745434 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-raise
119 05:05:36.745558 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-reference
120 05:05:36.745682 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-runner
121 05:05:36.745804 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-set
122 05:05:36.745926 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-test-shell
123 05:05:36.746051 Updating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-install-packages (oe)
124 05:05:36.746203 Updating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/bin/lava-installed-packages (oe)
125 05:05:36.746324 Creating /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/environment
126 05:05:36.746423 LAVA metadata
127 05:05:36.746496 - LAVA_JOB_ID=12711602
128 05:05:36.746560 - LAVA_DISPATCHER_IP=192.168.201.1
129 05:05:36.746660 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 05:05:36.746725 skipped lava-vland-overlay
131 05:05:36.746800 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 05:05:36.746878 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 05:05:36.746947 skipped lava-multinode-overlay
134 05:05:36.747018 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 05:05:36.747097 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 05:05:36.747168 Loading test definitions
137 05:05:36.747258 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 05:05:36.747331 Using /lava-12711602 at stage 0
139 05:05:36.747648 uuid=12711602_1.4.2.3.1 testdef=None
140 05:05:36.747772 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 05:05:36.747852 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 05:05:36.748370 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 05:05:36.748588 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 05:05:36.749217 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 05:05:36.749438 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 05:05:36.750035 runner path: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/0/tests/0_dmesg test_uuid 12711602_1.4.2.3.1
149 05:05:36.750189 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 05:05:36.750408 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 05:05:36.750477 Using /lava-12711602 at stage 1
153 05:05:36.750766 uuid=12711602_1.4.2.3.5 testdef=None
154 05:05:36.750851 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 05:05:36.750932 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 05:05:36.751415 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 05:05:36.751628 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 05:05:36.752295 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 05:05:36.752514 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 05:05:36.753122 runner path: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/1/tests/1_bootrr test_uuid 12711602_1.4.2.3.5
163 05:05:36.753268 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 05:05:36.753497 Creating lava-test-runner.conf files
166 05:05:36.753557 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/0 for stage 0
167 05:05:36.753642 - 0_dmesg
168 05:05:36.753718 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711602/lava-overlay-qcsxxgbl/lava-12711602/1 for stage 1
169 05:05:36.753805 - 1_bootrr
170 05:05:36.753895 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 05:05:36.753981 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 05:05:36.761940 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 05:05:36.762039 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 05:05:36.762121 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 05:05:36.762202 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 05:05:36.762285 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 05:05:37.016796 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 05:05:37.017184 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 05:05:37.017300 extracting modules file /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12711602/extract-overlay-ramdisk-51_264ry/ramdisk
180 05:05:37.032473 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 05:05:37.032622 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 05:05:37.032721 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711602/compress-overlay-57z67i3n/overlay-1.4.2.4.tar.gz to ramdisk
183 05:05:37.032794 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711602/compress-overlay-57z67i3n/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12711602/extract-overlay-ramdisk-51_264ry/ramdisk
184 05:05:37.041054 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 05:05:37.041174 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 05:05:37.041273 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 05:05:37.041361 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 05:05:37.041436 Building ramdisk /var/lib/lava/dispatcher/tmp/12711602/extract-overlay-ramdisk-51_264ry/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12711602/extract-overlay-ramdisk-51_264ry/ramdisk
189 05:05:37.185834 >> 49790 blocks
190 05:05:38.018134 rename /var/lib/lava/dispatcher/tmp/12711602/extract-overlay-ramdisk-51_264ry/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
191 05:05:38.018587 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 05:05:38.018714 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 05:05:38.018818 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 05:05:38.018910 No mkimage arch provided, not using FIT.
195 05:05:38.018995 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 05:05:38.019082 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 05:05:38.019181 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 05:05:38.019289 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 05:05:38.019373 No LXC device requested
200 05:05:38.019454 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 05:05:38.019543 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 05:05:38.019625 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 05:05:38.019749 Checking files for TFTP limit of 4294967296 bytes.
204 05:05:38.020161 end: 1 tftp-deploy (duration 00:00:02) [common]
205 05:05:38.020266 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 05:05:38.020356 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 05:05:38.020482 substitutions:
208 05:05:38.020549 - {DTB}: None
209 05:05:38.020609 - {INITRD}: 12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
210 05:05:38.020666 - {KERNEL}: 12711602/tftp-deploy-_3jo2s09/kernel/bzImage
211 05:05:38.020721 - {LAVA_MAC}: None
212 05:05:38.020775 - {PRESEED_CONFIG}: None
213 05:05:38.020828 - {PRESEED_LOCAL}: None
214 05:05:38.020881 - {RAMDISK}: 12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
215 05:05:38.020933 - {ROOT_PART}: None
216 05:05:38.020985 - {ROOT}: None
217 05:05:38.021036 - {SERVER_IP}: 192.168.201.1
218 05:05:38.021088 - {TEE}: None
219 05:05:38.021139 Parsed boot commands:
220 05:05:38.021190 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 05:05:38.021361 Parsed boot commands: tftpboot 192.168.201.1 12711602/tftp-deploy-_3jo2s09/kernel/bzImage 12711602/tftp-deploy-_3jo2s09/kernel/cmdline 12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
222 05:05:38.021448 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 05:05:38.021535 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 05:05:38.021625 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 05:05:38.021709 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 05:05:38.021779 Not connected, no need to disconnect.
227 05:05:38.021852 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 05:05:38.022040 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 05:05:38.022114 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-13'
230 05:05:38.026385 Setting prompt string to ['lava-test: # ']
231 05:05:38.026753 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 05:05:38.026868 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 05:05:38.026964 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 05:05:38.027054 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 05:05:38.027249 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
236 05:05:43.163045 >> Command sent successfully.
237 05:05:43.165440 Returned 0 in 5 seconds
238 05:05:43.265845 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 05:05:43.266179 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 05:05:43.266274 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 05:05:43.266363 Setting prompt string to 'Starting depthcharge on Voema...'
243 05:05:43.266431 Changing prompt to 'Starting depthcharge on Voema...'
244 05:05:43.266496 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 05:05:43.266756 [Enter `^Ec?' for help]
246 05:05:44.830726
247 05:05:44.830956
248 05:05:44.840419 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 05:05:44.846857 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 05:05:44.850459 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 05:05:44.853639 CPU: AES supported, TXT NOT supported, VT supported
252 05:05:44.860612 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 05:05:44.864069 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 05:05:44.871375 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 05:05:44.874356 VBOOT: Loading verstage.
256 05:05:44.877600 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 05:05:44.884099 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 05:05:44.888060 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 05:05:44.897865 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 05:05:44.904186 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 05:05:44.904309
262 05:05:44.904421
263 05:05:44.918318 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 05:05:44.931384 Probing TPM: . done!
265 05:05:44.934701 TPM ready after 0 ms
266 05:05:44.937908 Connected to device vid:did:rid of 1ae0:0028:00
267 05:05:44.948941 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
268 05:05:44.955998 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 05:05:44.959420 Initialized TPM device CR50 revision 0
270 05:05:45.015767 tlcl_send_startup: Startup return code is 0
271 05:05:45.015910 TPM: setup succeeded
272 05:05:45.030354 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 05:05:45.044046 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 05:05:45.056949 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 05:05:45.066178 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 05:05:45.070656 Chrome EC: UHEPI supported
277 05:05:45.074330 Phase 1
278 05:05:45.077693 FMAP: area GBB found @ 1805000 (458752 bytes)
279 05:05:45.087376 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 05:05:45.093817 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 05:05:45.100170 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 05:05:45.107634 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 05:05:45.110450 Recovery requested (1009000e)
284 05:05:45.113728 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 05:05:45.125268 tlcl_extend: response is 0
286 05:05:45.131821 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 05:05:45.141929 tlcl_extend: response is 0
288 05:05:45.148173 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 05:05:45.154896 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 05:05:45.161187 BS: verstage times (exec / console): total (unknown) / 142 ms
291 05:05:45.161329
292 05:05:45.161460
293 05:05:45.174985 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 05:05:45.180871 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 05:05:45.184014 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 05:05:45.190640 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 05:05:45.194156 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 05:05:45.197913 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 05:05:45.204407 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 05:05:45.204547 TCO_STS: 0000 0000
301 05:05:45.207256 GEN_PMCON: d0015038 00002200
302 05:05:45.210752 GBLRST_CAUSE: 00000000 00000000
303 05:05:45.213821 HPR_CAUSE0: 00000000
304 05:05:45.213956 prev_sleep_state 5
305 05:05:45.217570 Boot Count incremented to 25040
306 05:05:45.224658 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 05:05:45.230809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 05:05:45.240623 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 05:05:45.247261 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 05:05:45.251032 Chrome EC: UHEPI supported
311 05:05:45.257015 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 05:05:45.269250 Probing TPM: done!
313 05:05:45.275398 Connected to device vid:did:rid of 1ae0:0028:00
314 05:05:45.285601 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
315 05:05:45.288897 Initialized TPM device CR50 revision 0
316 05:05:45.303205 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 05:05:45.310178 MRC: Hash idx 0x100b comparison successful.
318 05:05:45.313560 MRC cache found, size faa8
319 05:05:45.313705 bootmode is set to: 2
320 05:05:45.316805 SPD index = 2
321 05:05:45.323950 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 05:05:45.326817 SPD: module type is LPDDR4X
323 05:05:45.329894 SPD: module part number is MT53D1G64D4NW-046
324 05:05:45.336482 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 05:05:45.342759 SPD: device width 16 bits, bus width 16 bits
326 05:05:45.346400 SPD: module size is 2048 MB (per channel)
327 05:05:45.776798 CBMEM:
328 05:05:45.780900 IMD: root @ 0x76fff000 254 entries.
329 05:05:45.784275 IMD: root @ 0x76ffec00 62 entries.
330 05:05:45.786818 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 05:05:45.793753 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 05:05:45.796887 External stage cache:
333 05:05:45.800134 IMD: root @ 0x7b3ff000 254 entries.
334 05:05:45.804026 IMD: root @ 0x7b3fec00 62 entries.
335 05:05:45.818687 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 05:05:45.824970 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 05:05:45.831890 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 05:05:45.845929 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 05:05:45.852129 cse_lite: Skip switching to RW in the recovery path
340 05:05:45.852215 8 DIMMs found
341 05:05:45.854837 SMM Memory Map
342 05:05:45.858137 SMRAM : 0x7b000000 0x800000
343 05:05:45.861568 Subregion 0: 0x7b000000 0x200000
344 05:05:45.864504 Subregion 1: 0x7b200000 0x200000
345 05:05:45.868218 Subregion 2: 0x7b400000 0x400000
346 05:05:45.868299 top_of_ram = 0x77000000
347 05:05:45.874380 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 05:05:45.881222 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 05:05:45.884998 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 05:05:45.891306 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 05:05:45.897596 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 05:05:45.904611 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 05:05:45.914711 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 05:05:45.921134 Processing 211 relocs. Offset value of 0x74c0b000
355 05:05:45.928161 BS: romstage times (exec / console): total (unknown) / 277 ms
356 05:05:45.933958
357 05:05:45.934046
358 05:05:45.941609 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 05:05:45.948641 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 05:05:45.954938 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 05:05:45.964622 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 05:05:45.971560 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 05:05:45.977715 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 05:05:46.020507 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 05:05:46.026966 Processing 5008 relocs. Offset value of 0x75d98000
366 05:05:46.030654 BS: postcar times (exec / console): total (unknown) / 59 ms
367 05:05:46.033592
368 05:05:46.033691
369 05:05:46.043389 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 05:05:46.043476 Normal boot
371 05:05:46.047444 FW_CONFIG value is 0x804c02
372 05:05:46.050521 PCI: 00:07.0 disabled by fw_config
373 05:05:46.053786 PCI: 00:07.1 disabled by fw_config
374 05:05:46.057091 PCI: 00:0d.2 disabled by fw_config
375 05:05:46.063532 PCI: 00:1c.7 disabled by fw_config
376 05:05:46.067499 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 05:05:46.074061 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 05:05:46.076728 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 05:05:46.083179 GENERIC: 0.0 disabled by fw_config
380 05:05:46.086501 GENERIC: 1.0 disabled by fw_config
381 05:05:46.089915 fw_config match found: DB_USB=USB3_ACTIVE
382 05:05:46.093671 fw_config match found: DB_USB=USB3_ACTIVE
383 05:05:46.096580 fw_config match found: DB_USB=USB3_ACTIVE
384 05:05:46.103266 fw_config match found: DB_USB=USB3_ACTIVE
385 05:05:46.106565 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 05:05:46.116672 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 05:05:46.123205 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 05:05:46.129668 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 05:05:46.132929 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 05:05:46.139634 microcode: Update skipped, already up-to-date
391 05:05:46.146444 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 05:05:46.174124 Detected 4 core, 8 thread CPU.
393 05:05:46.177571 Setting up SMI for CPU
394 05:05:46.180523 IED base = 0x7b400000
395 05:05:46.180607 IED size = 0x00400000
396 05:05:46.183616 Will perform SMM setup.
397 05:05:46.190314 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 05:05:46.197232 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 05:05:46.204277 Processing 16 relocs. Offset value of 0x00030000
400 05:05:46.207974 Attempting to start 7 APs
401 05:05:46.210154 Waiting for 10ms after sending INIT.
402 05:05:46.226320 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 05:05:46.229392 AP: slot 7 apic_id 6.
404 05:05:46.232331 AP: slot 3 apic_id 7.
405 05:05:46.232415 AP: slot 6 apic_id 2.
406 05:05:46.236203 AP: slot 2 apic_id 3.
407 05:05:46.239419 AP: slot 4 apic_id 5.
408 05:05:46.239501 AP: slot 5 apic_id 4.
409 05:05:46.239567 done.
410 05:05:46.245634 Waiting for 2nd SIPI to complete...done.
411 05:05:46.252211 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 05:05:46.259877 Processing 13 relocs. Offset value of 0x00038000
413 05:05:46.262340 Unable to locate Global NVS
414 05:05:46.269707 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 05:05:46.272261 Installing permanent SMM handler to 0x7b000000
416 05:05:46.282248 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 05:05:46.285409 Processing 794 relocs. Offset value of 0x7b010000
418 05:05:46.295869 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 05:05:46.298838 Processing 13 relocs. Offset value of 0x7b008000
420 05:05:46.306292 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 05:05:46.312392 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 05:05:46.318592 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 05:05:46.321883 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 05:05:46.328823 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 05:05:46.335476 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 05:05:46.342020 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 05:05:46.345580 Unable to locate Global NVS
428 05:05:46.351396 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 05:05:46.355276 Clearing SMI status registers
430 05:05:46.357943 SMI_STS: PM1
431 05:05:46.358026 PM1_STS: PWRBTN
432 05:05:46.365609 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 05:05:46.368389 In relocation handler: CPU 0
434 05:05:46.371184 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 05:05:46.378720 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 05:05:46.381251 Relocation complete.
437 05:05:46.388168 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 05:05:46.391182 In relocation handler: CPU 1
439 05:05:46.394603 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 05:05:46.397738 Relocation complete.
441 05:05:46.404451 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 05:05:46.408138 In relocation handler: CPU 6
443 05:05:46.411001 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 05:05:46.414308 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 05:05:46.417718 Relocation complete.
446 05:05:46.424480 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 05:05:46.427492 In relocation handler: CPU 2
448 05:05:46.430981 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 05:05:46.433914 Relocation complete.
450 05:05:46.440752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
451 05:05:46.444256 In relocation handler: CPU 7
452 05:05:46.447166 New SMBASE=0x7affe400 IEDBASE=0x7b400000
453 05:05:46.453698 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 05:05:46.453798 Relocation complete.
455 05:05:46.464306 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 05:05:46.466902 In relocation handler: CPU 3
457 05:05:46.470686 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 05:05:46.470770 Relocation complete.
459 05:05:46.480442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
460 05:05:46.483984 In relocation handler: CPU 5
461 05:05:46.487061 New SMBASE=0x7affec00 IEDBASE=0x7b400000
462 05:05:46.490622 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 05:05:46.493459 Relocation complete.
464 05:05:46.500562 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
465 05:05:46.503569 In relocation handler: CPU 4
466 05:05:46.506711 New SMBASE=0x7afff000 IEDBASE=0x7b400000
467 05:05:46.510279 Relocation complete.
468 05:05:46.513139 Initializing CPU #0
469 05:05:46.516561 CPU: vendor Intel device 806c1
470 05:05:46.520784 CPU: family 06, model 8c, stepping 01
471 05:05:46.520876 Clearing out pending MCEs
472 05:05:46.523578 Setting up local APIC...
473 05:05:46.527062 apic_id: 0x00 done.
474 05:05:46.530220 Turbo is available but hidden
475 05:05:46.533347 Turbo is available and visible
476 05:05:46.536938 microcode: Update skipped, already up-to-date
477 05:05:46.539582 CPU #0 initialized
478 05:05:46.539665 Initializing CPU #1
479 05:05:46.542958 Initializing CPU #4
480 05:05:46.546660 Initializing CPU #5
481 05:05:46.549871 CPU: vendor Intel device 806c1
482 05:05:46.553245 CPU: family 06, model 8c, stepping 01
483 05:05:46.556860 CPU: vendor Intel device 806c1
484 05:05:46.559862 CPU: family 06, model 8c, stepping 01
485 05:05:46.564062 Initializing CPU #7
486 05:05:46.564153 Clearing out pending MCEs
487 05:05:46.566201 Clearing out pending MCEs
488 05:05:46.569964 Setting up local APIC...
489 05:05:46.570051 Initializing CPU #6
490 05:05:46.572962 Initializing CPU #2
491 05:05:46.576268 CPU: vendor Intel device 806c1
492 05:05:46.579864 CPU: family 06, model 8c, stepping 01
493 05:05:46.583470 CPU: vendor Intel device 806c1
494 05:05:46.586433 CPU: family 06, model 8c, stepping 01
495 05:05:46.590030 Clearing out pending MCEs
496 05:05:46.593428 Clearing out pending MCEs
497 05:05:46.596194 Setting up local APIC...
498 05:05:46.596277 Setting up local APIC...
499 05:05:46.600051 CPU: vendor Intel device 806c1
500 05:05:46.602976 CPU: family 06, model 8c, stepping 01
501 05:05:46.606700 apic_id: 0x05 done.
502 05:05:46.609919 apic_id: 0x04 done.
503 05:05:46.613200 microcode: Update skipped, already up-to-date
504 05:05:46.616441 CPU: vendor Intel device 806c1
505 05:05:46.619447 CPU: family 06, model 8c, stepping 01
506 05:05:46.622989 Initializing CPU #3
507 05:05:46.626214 Clearing out pending MCEs
508 05:05:46.630192 CPU: vendor Intel device 806c1
509 05:05:46.633198 CPU: family 06, model 8c, stepping 01
510 05:05:46.633281 Setting up local APIC...
511 05:05:46.635810 Clearing out pending MCEs
512 05:05:46.639478 apic_id: 0x02 done.
513 05:05:46.643071 apic_id: 0x06 done.
514 05:05:46.643154 Clearing out pending MCEs
515 05:05:46.649137 microcode: Update skipped, already up-to-date
516 05:05:46.653240 Setting up local APIC...
517 05:05:46.653325 CPU #7 initialized
518 05:05:46.656278 apic_id: 0x07 done.
519 05:05:46.656361 CPU #4 initialized
520 05:05:46.659042 Setting up local APIC...
521 05:05:46.665740 microcode: Update skipped, already up-to-date
522 05:05:46.669573 microcode: Update skipped, already up-to-date
523 05:05:46.672472 apic_id: 0x03 done.
524 05:05:46.672555 CPU #6 initialized
525 05:05:46.680116 microcode: Update skipped, already up-to-date
526 05:05:46.680207 CPU #5 initialized
527 05:05:46.685501 microcode: Update skipped, already up-to-date
528 05:05:46.685588 CPU #2 initialized
529 05:05:46.688966 Setting up local APIC...
530 05:05:46.691862 CPU #3 initialized
531 05:05:46.691948 apic_id: 0x01 done.
532 05:05:46.698716 microcode: Update skipped, already up-to-date
533 05:05:46.698804 CPU #1 initialized
534 05:05:46.705611 bsp_do_flight_plan done after 454 msecs.
535 05:05:46.705700 CPU: frequency set to 4400 MHz
536 05:05:46.708862 Enabling SMIs.
537 05:05:46.715292 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 05:05:46.730786 SATAXPCIE1 indicates PCIe NVMe is present
539 05:05:46.734154 Probing TPM: done!
540 05:05:46.737293 Connected to device vid:did:rid of 1ae0:0028:00
541 05:05:46.748275 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 05:05:46.751209 Initialized TPM device CR50 revision 0
543 05:05:46.755022 Enabling S0i3.4
544 05:05:46.761590 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 05:05:46.764806 Found a VBT of 8704 bytes after decompression
546 05:05:46.770831 cse_lite: CSE RO boot. HybridStorageMode disabled
547 05:05:46.777882 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 05:05:46.852978 FSPS returned 0
549 05:05:46.856382 Executing Phase 1 of FspMultiPhaseSiInit
550 05:05:46.866083 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 05:05:46.869433 port C0 DISC req: usage 1 usb3 1 usb2 5
552 05:05:46.872813 Raw Buffer output 0 00000511
553 05:05:46.876079 Raw Buffer output 1 00000000
554 05:05:46.879529 pmc_send_ipc_cmd succeeded
555 05:05:46.886766 port C1 DISC req: usage 1 usb3 2 usb2 3
556 05:05:46.886890 Raw Buffer output 0 00000321
557 05:05:46.890103 Raw Buffer output 1 00000000
558 05:05:46.894220 pmc_send_ipc_cmd succeeded
559 05:05:46.898817 Detected 4 core, 8 thread CPU.
560 05:05:46.902511 Detected 4 core, 8 thread CPU.
561 05:05:47.103089 Display FSP Version Info HOB
562 05:05:47.106231 Reference Code - CPU = a.0.4c.31
563 05:05:47.110302 uCode Version = 0.0.0.86
564 05:05:47.112730 TXT ACM version = ff.ff.ff.ffff
565 05:05:47.116167 Reference Code - ME = a.0.4c.31
566 05:05:47.119839 MEBx version = 0.0.0.0
567 05:05:47.122711 ME Firmware Version = Consumer SKU
568 05:05:47.126407 Reference Code - PCH = a.0.4c.31
569 05:05:47.130244 PCH-CRID Status = Disabled
570 05:05:47.132976 PCH-CRID Original Value = ff.ff.ff.ffff
571 05:05:47.136300 PCH-CRID New Value = ff.ff.ff.ffff
572 05:05:47.140368 OPROM - RST - RAID = ff.ff.ff.ffff
573 05:05:47.142717 PCH Hsio Version = 4.0.0.0
574 05:05:47.146828 Reference Code - SA - System Agent = a.0.4c.31
575 05:05:47.149425 Reference Code - MRC = 2.0.0.1
576 05:05:47.153458 SA - PCIe Version = a.0.4c.31
577 05:05:47.156133 SA-CRID Status = Disabled
578 05:05:47.159757 SA-CRID Original Value = 0.0.0.1
579 05:05:47.162593 SA-CRID New Value = 0.0.0.1
580 05:05:47.166027 OPROM - VBIOS = ff.ff.ff.ffff
581 05:05:47.170171 IO Manageability Engine FW Version = 11.1.4.0
582 05:05:47.172980 PHY Build Version = 0.0.0.e0
583 05:05:47.176042 Thunderbolt(TM) FW Version = 0.0.0.0
584 05:05:47.182976 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 05:05:47.187346 ITSS IRQ Polarities Before:
586 05:05:47.187936 IPC0: 0xffffffff
587 05:05:47.190524 IPC1: 0xffffffff
588 05:05:47.191063 IPC2: 0xffffffff
589 05:05:47.193595 IPC3: 0xffffffff
590 05:05:47.194118 ITSS IRQ Polarities After:
591 05:05:47.196973 IPC0: 0xffffffff
592 05:05:47.197496 IPC1: 0xffffffff
593 05:05:47.200303 IPC2: 0xffffffff
594 05:05:47.203873 IPC3: 0xffffffff
595 05:05:47.206508 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 05:05:47.217103 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 05:05:47.229908 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 05:05:47.243256 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 05:05:47.249749 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
600 05:05:47.250145 Enumerating buses...
601 05:05:47.256035 Show all devs... Before device enumeration.
602 05:05:47.256632 Root Device: enabled 1
603 05:05:47.259541 DOMAIN: 0000: enabled 1
604 05:05:47.263187 CPU_CLUSTER: 0: enabled 1
605 05:05:47.266315 PCI: 00:00.0: enabled 1
606 05:05:47.266703 PCI: 00:02.0: enabled 1
607 05:05:47.269599 PCI: 00:04.0: enabled 1
608 05:05:47.272998 PCI: 00:05.0: enabled 1
609 05:05:47.275834 PCI: 00:06.0: enabled 0
610 05:05:47.276200 PCI: 00:07.0: enabled 0
611 05:05:47.280293 PCI: 00:07.1: enabled 0
612 05:05:47.284914 PCI: 00:07.2: enabled 0
613 05:05:47.285325 PCI: 00:07.3: enabled 0
614 05:05:47.286448 PCI: 00:08.0: enabled 1
615 05:05:47.289465 PCI: 00:09.0: enabled 0
616 05:05:47.293271 PCI: 00:0a.0: enabled 0
617 05:05:47.293668 PCI: 00:0d.0: enabled 1
618 05:05:47.296392 PCI: 00:0d.1: enabled 0
619 05:05:47.299113 PCI: 00:0d.2: enabled 0
620 05:05:47.303058 PCI: 00:0d.3: enabled 0
621 05:05:47.303456 PCI: 00:0e.0: enabled 0
622 05:05:47.305767 PCI: 00:10.2: enabled 1
623 05:05:47.309821 PCI: 00:10.6: enabled 0
624 05:05:47.312962 PCI: 00:10.7: enabled 0
625 05:05:47.313360 PCI: 00:12.0: enabled 0
626 05:05:47.315886 PCI: 00:12.6: enabled 0
627 05:05:47.319754 PCI: 00:13.0: enabled 0
628 05:05:47.322750 PCI: 00:14.0: enabled 1
629 05:05:47.323287 PCI: 00:14.1: enabled 0
630 05:05:47.325980 PCI: 00:14.2: enabled 1
631 05:05:47.329510 PCI: 00:14.3: enabled 1
632 05:05:47.329904 PCI: 00:15.0: enabled 1
633 05:05:47.332407 PCI: 00:15.1: enabled 1
634 05:05:47.335819 PCI: 00:15.2: enabled 1
635 05:05:47.339453 PCI: 00:15.3: enabled 1
636 05:05:47.340009 PCI: 00:16.0: enabled 1
637 05:05:47.342478 PCI: 00:16.1: enabled 0
638 05:05:47.346120 PCI: 00:16.2: enabled 0
639 05:05:47.349294 PCI: 00:16.3: enabled 0
640 05:05:47.349789 PCI: 00:16.4: enabled 0
641 05:05:47.352137 PCI: 00:16.5: enabled 0
642 05:05:47.356164 PCI: 00:17.0: enabled 1
643 05:05:47.359170 PCI: 00:19.0: enabled 0
644 05:05:47.359897 PCI: 00:19.1: enabled 1
645 05:05:47.363033 PCI: 00:19.2: enabled 0
646 05:05:47.366364 PCI: 00:1c.0: enabled 1
647 05:05:47.366868 PCI: 00:1c.1: enabled 0
648 05:05:47.369705 PCI: 00:1c.2: enabled 0
649 05:05:47.373320 PCI: 00:1c.3: enabled 0
650 05:05:47.375916 PCI: 00:1c.4: enabled 0
651 05:05:47.376449 PCI: 00:1c.5: enabled 0
652 05:05:47.379257 PCI: 00:1c.6: enabled 1
653 05:05:47.382809 PCI: 00:1c.7: enabled 0
654 05:05:47.386364 PCI: 00:1d.0: enabled 1
655 05:05:47.386897 PCI: 00:1d.1: enabled 0
656 05:05:47.389576 PCI: 00:1d.2: enabled 1
657 05:05:47.393087 PCI: 00:1d.3: enabled 0
658 05:05:47.396119 PCI: 00:1e.0: enabled 1
659 05:05:47.396652 PCI: 00:1e.1: enabled 0
660 05:05:47.398989 PCI: 00:1e.2: enabled 1
661 05:05:47.402469 PCI: 00:1e.3: enabled 1
662 05:05:47.406209 PCI: 00:1f.0: enabled 1
663 05:05:47.406740 PCI: 00:1f.1: enabled 0
664 05:05:47.408522 PCI: 00:1f.2: enabled 1
665 05:05:47.411894 PCI: 00:1f.3: enabled 1
666 05:05:47.415708 PCI: 00:1f.4: enabled 0
667 05:05:47.416243 PCI: 00:1f.5: enabled 1
668 05:05:47.418702 PCI: 00:1f.6: enabled 0
669 05:05:47.421786 PCI: 00:1f.7: enabled 0
670 05:05:47.422181 APIC: 00: enabled 1
671 05:05:47.425225 GENERIC: 0.0: enabled 1
672 05:05:47.428522 GENERIC: 0.0: enabled 1
673 05:05:47.432594 GENERIC: 1.0: enabled 1
674 05:05:47.433063 GENERIC: 0.0: enabled 1
675 05:05:47.435500 GENERIC: 1.0: enabled 1
676 05:05:47.438971 USB0 port 0: enabled 1
677 05:05:47.439468 GENERIC: 0.0: enabled 1
678 05:05:47.442264 USB0 port 0: enabled 1
679 05:05:47.445368 GENERIC: 0.0: enabled 1
680 05:05:47.448839 I2C: 00:1a: enabled 1
681 05:05:47.449380 I2C: 00:31: enabled 1
682 05:05:47.452925 I2C: 00:32: enabled 1
683 05:05:47.455245 I2C: 00:10: enabled 1
684 05:05:47.455639 I2C: 00:15: enabled 1
685 05:05:47.458593 GENERIC: 0.0: enabled 0
686 05:05:47.462197 GENERIC: 1.0: enabled 0
687 05:05:47.464932 GENERIC: 0.0: enabled 1
688 05:05:47.465329 SPI: 00: enabled 1
689 05:05:47.468026 SPI: 00: enabled 1
690 05:05:47.468440 PNP: 0c09.0: enabled 1
691 05:05:47.471607 GENERIC: 0.0: enabled 1
692 05:05:47.474690 USB3 port 0: enabled 1
693 05:05:47.478297 USB3 port 1: enabled 1
694 05:05:47.478822 USB3 port 2: enabled 0
695 05:05:47.481351 USB3 port 3: enabled 0
696 05:05:47.484656 USB2 port 0: enabled 0
697 05:05:47.485047 USB2 port 1: enabled 1
698 05:05:47.488564 USB2 port 2: enabled 1
699 05:05:47.491250 USB2 port 3: enabled 0
700 05:05:47.494696 USB2 port 4: enabled 1
701 05:05:47.495084 USB2 port 5: enabled 0
702 05:05:47.498072 USB2 port 6: enabled 0
703 05:05:47.501747 USB2 port 7: enabled 0
704 05:05:47.502152 USB2 port 8: enabled 0
705 05:05:47.504738 USB2 port 9: enabled 0
706 05:05:47.507713 USB3 port 0: enabled 0
707 05:05:47.508077 USB3 port 1: enabled 1
708 05:05:47.510843 USB3 port 2: enabled 0
709 05:05:47.514820 USB3 port 3: enabled 0
710 05:05:47.518777 GENERIC: 0.0: enabled 1
711 05:05:47.519217 GENERIC: 1.0: enabled 1
712 05:05:47.520872 APIC: 01: enabled 1
713 05:05:47.525142 APIC: 03: enabled 1
714 05:05:47.525535 APIC: 07: enabled 1
715 05:05:47.527705 APIC: 05: enabled 1
716 05:05:47.528089 APIC: 04: enabled 1
717 05:05:47.530946 APIC: 02: enabled 1
718 05:05:47.534573 APIC: 06: enabled 1
719 05:05:47.535051 Compare with tree...
720 05:05:47.538039 Root Device: enabled 1
721 05:05:47.541192 DOMAIN: 0000: enabled 1
722 05:05:47.545379 PCI: 00:00.0: enabled 1
723 05:05:47.545885 PCI: 00:02.0: enabled 1
724 05:05:47.547997 PCI: 00:04.0: enabled 1
725 05:05:47.551229 GENERIC: 0.0: enabled 1
726 05:05:47.554908 PCI: 00:05.0: enabled 1
727 05:05:47.557860 PCI: 00:06.0: enabled 0
728 05:05:47.558373 PCI: 00:07.0: enabled 0
729 05:05:47.561478 GENERIC: 0.0: enabled 1
730 05:05:47.564883 PCI: 00:07.1: enabled 0
731 05:05:47.567850 GENERIC: 1.0: enabled 1
732 05:05:47.570652 PCI: 00:07.2: enabled 0
733 05:05:47.574132 GENERIC: 0.0: enabled 1
734 05:05:47.574654 PCI: 00:07.3: enabled 0
735 05:05:47.577556 GENERIC: 1.0: enabled 1
736 05:05:47.581029 PCI: 00:08.0: enabled 1
737 05:05:47.584177 PCI: 00:09.0: enabled 0
738 05:05:47.587270 PCI: 00:0a.0: enabled 0
739 05:05:47.587714 PCI: 00:0d.0: enabled 1
740 05:05:47.590900 USB0 port 0: enabled 1
741 05:05:47.594308 USB3 port 0: enabled 1
742 05:05:47.597685 USB3 port 1: enabled 1
743 05:05:47.600636 USB3 port 2: enabled 0
744 05:05:47.601051 USB3 port 3: enabled 0
745 05:05:47.604424 PCI: 00:0d.1: enabled 0
746 05:05:47.607812 PCI: 00:0d.2: enabled 0
747 05:05:47.610747 GENERIC: 0.0: enabled 1
748 05:05:47.613970 PCI: 00:0d.3: enabled 0
749 05:05:47.614475 PCI: 00:0e.0: enabled 0
750 05:05:47.617374 PCI: 00:10.2: enabled 1
751 05:05:47.620552 PCI: 00:10.6: enabled 0
752 05:05:47.624084 PCI: 00:10.7: enabled 0
753 05:05:47.627012 PCI: 00:12.0: enabled 0
754 05:05:47.627409 PCI: 00:12.6: enabled 0
755 05:05:47.631111 PCI: 00:13.0: enabled 0
756 05:05:47.634013 PCI: 00:14.0: enabled 1
757 05:05:47.637776 USB0 port 0: enabled 1
758 05:05:47.640841 USB2 port 0: enabled 0
759 05:05:47.643505 USB2 port 1: enabled 1
760 05:05:47.644079 USB2 port 2: enabled 1
761 05:05:47.647876 USB2 port 3: enabled 0
762 05:05:47.651090 USB2 port 4: enabled 1
763 05:05:47.653708 USB2 port 5: enabled 0
764 05:05:47.656978 USB2 port 6: enabled 0
765 05:05:47.657508 USB2 port 7: enabled 0
766 05:05:47.659785 USB2 port 8: enabled 0
767 05:05:47.663249 USB2 port 9: enabled 0
768 05:05:47.666810 USB3 port 0: enabled 0
769 05:05:47.670091 USB3 port 1: enabled 1
770 05:05:47.673450 USB3 port 2: enabled 0
771 05:05:47.673881 USB3 port 3: enabled 0
772 05:05:47.676718 PCI: 00:14.1: enabled 0
773 05:05:47.680082 PCI: 00:14.2: enabled 1
774 05:05:47.683531 PCI: 00:14.3: enabled 1
775 05:05:47.687032 GENERIC: 0.0: enabled 1
776 05:05:47.687460 PCI: 00:15.0: enabled 1
777 05:05:47.689982 I2C: 00:1a: enabled 1
778 05:05:47.693478 I2C: 00:31: enabled 1
779 05:05:47.696509 I2C: 00:32: enabled 1
780 05:05:47.700465 PCI: 00:15.1: enabled 1
781 05:05:47.700843 I2C: 00:10: enabled 1
782 05:05:47.702823 PCI: 00:15.2: enabled 1
783 05:05:47.706323 PCI: 00:15.3: enabled 1
784 05:05:47.710181 PCI: 00:16.0: enabled 1
785 05:05:47.710556 PCI: 00:16.1: enabled 0
786 05:05:47.713046 PCI: 00:16.2: enabled 0
787 05:05:47.716732 PCI: 00:16.3: enabled 0
788 05:05:47.719501 PCI: 00:16.4: enabled 0
789 05:05:47.723267 PCI: 00:16.5: enabled 0
790 05:05:47.723640 PCI: 00:17.0: enabled 1
791 05:05:47.725877 PCI: 00:19.0: enabled 0
792 05:05:47.729205 PCI: 00:19.1: enabled 1
793 05:05:47.732770 I2C: 00:15: enabled 1
794 05:05:47.735823 PCI: 00:19.2: enabled 0
795 05:05:47.736186 PCI: 00:1d.0: enabled 1
796 05:05:47.739509 GENERIC: 0.0: enabled 1
797 05:05:47.742939 PCI: 00:1e.0: enabled 1
798 05:05:47.746570 PCI: 00:1e.1: enabled 0
799 05:05:47.749978 PCI: 00:1e.2: enabled 1
800 05:05:47.750512 SPI: 00: enabled 1
801 05:05:47.753117 PCI: 00:1e.3: enabled 1
802 05:05:47.756164 SPI: 00: enabled 1
803 05:05:47.759635 PCI: 00:1f.0: enabled 1
804 05:05:47.760133 PNP: 0c09.0: enabled 1
805 05:05:47.762967 PCI: 00:1f.1: enabled 0
806 05:05:47.766393 PCI: 00:1f.2: enabled 1
807 05:05:47.769626 GENERIC: 0.0: enabled 1
808 05:05:47.772542 GENERIC: 0.0: enabled 1
809 05:05:47.775630 GENERIC: 1.0: enabled 1
810 05:05:47.776118 PCI: 00:1f.3: enabled 1
811 05:05:47.778969 PCI: 00:1f.4: enabled 0
812 05:05:47.782318 PCI: 00:1f.5: enabled 1
813 05:05:47.834958 PCI: 00:1f.6: enabled 0
814 05:05:47.835595 PCI: 00:1f.7: enabled 0
815 05:05:47.836020 CPU_CLUSTER: 0: enabled 1
816 05:05:47.836762 APIC: 00: enabled 1
817 05:05:47.837153 APIC: 01: enabled 1
818 05:05:47.837532 APIC: 03: enabled 1
819 05:05:47.837938 APIC: 07: enabled 1
820 05:05:47.838250 APIC: 05: enabled 1
821 05:05:47.838549 APIC: 04: enabled 1
822 05:05:47.838840 APIC: 02: enabled 1
823 05:05:47.839128 APIC: 06: enabled 1
824 05:05:47.839411 Root Device scanning...
825 05:05:47.839737 scan_static_bus for Root Device
826 05:05:47.840103 DOMAIN: 0000 enabled
827 05:05:47.840404 CPU_CLUSTER: 0 enabled
828 05:05:47.840757 DOMAIN: 0000 scanning...
829 05:05:47.841069 PCI: pci_scan_bus for bus 00
830 05:05:47.841357 PCI: 00:00.0 [8086/0000] ops
831 05:05:47.841644 PCI: 00:00.0 [8086/9a12] enabled
832 05:05:47.841929 PCI: 00:02.0 [8086/0000] bus ops
833 05:05:47.842276 PCI: 00:02.0 [8086/9a40] enabled
834 05:05:47.842573 PCI: 00:04.0 [8086/0000] bus ops
835 05:05:47.844156 PCI: 00:04.0 [8086/9a03] enabled
836 05:05:47.847102 PCI: 00:05.0 [8086/9a19] enabled
837 05:05:47.851060 PCI: 00:07.0 [0000/0000] hidden
838 05:05:47.854612 PCI: 00:08.0 [8086/9a11] enabled
839 05:05:47.858403 PCI: 00:0a.0 [8086/9a0d] disabled
840 05:05:47.861328 PCI: 00:0d.0 [8086/0000] bus ops
841 05:05:47.864704 PCI: 00:0d.0 [8086/9a13] enabled
842 05:05:47.868514 PCI: 00:14.0 [8086/0000] bus ops
843 05:05:47.871538 PCI: 00:14.0 [8086/a0ed] enabled
844 05:05:47.874797 PCI: 00:14.2 [8086/a0ef] enabled
845 05:05:47.878633 PCI: 00:14.3 [8086/0000] bus ops
846 05:05:47.882283 PCI: 00:14.3 [8086/a0f0] enabled
847 05:05:47.884952 PCI: 00:15.0 [8086/0000] bus ops
848 05:05:47.888998 PCI: 00:15.0 [8086/a0e8] enabled
849 05:05:47.891985 PCI: 00:15.1 [8086/0000] bus ops
850 05:05:47.895321 PCI: 00:15.1 [8086/a0e9] enabled
851 05:05:47.898172 PCI: 00:15.2 [8086/0000] bus ops
852 05:05:47.902355 PCI: 00:15.2 [8086/a0ea] enabled
853 05:05:47.904604 PCI: 00:15.3 [8086/0000] bus ops
854 05:05:47.908639 PCI: 00:15.3 [8086/a0eb] enabled
855 05:05:47.911526 PCI: 00:16.0 [8086/0000] ops
856 05:05:47.915090 PCI: 00:16.0 [8086/a0e0] enabled
857 05:05:47.921133 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 05:05:47.924310 PCI: 00:19.0 [8086/0000] bus ops
859 05:05:47.928277 PCI: 00:19.0 [8086/a0c5] disabled
860 05:05:47.931364 PCI: 00:19.1 [8086/0000] bus ops
861 05:05:47.934863 PCI: 00:19.1 [8086/a0c6] enabled
862 05:05:47.938627 PCI: 00:1d.0 [8086/0000] bus ops
863 05:05:47.941427 PCI: 00:1d.0 [8086/a0b0] enabled
864 05:05:47.944752 PCI: 00:1e.0 [8086/0000] ops
865 05:05:47.947726 PCI: 00:1e.0 [8086/a0a8] enabled
866 05:05:47.950953 PCI: 00:1e.2 [8086/0000] bus ops
867 05:05:47.954840 PCI: 00:1e.2 [8086/a0aa] enabled
868 05:05:47.957552 PCI: 00:1e.3 [8086/0000] bus ops
869 05:05:47.960830 PCI: 00:1e.3 [8086/a0ab] enabled
870 05:05:47.963815 PCI: 00:1f.0 [8086/0000] bus ops
871 05:05:47.967351 PCI: 00:1f.0 [8086/a087] enabled
872 05:05:47.967831 RTC Init
873 05:05:47.970417 Set power on after power failure.
874 05:05:47.974462 Disabling Deep S3
875 05:05:47.975011 Disabling Deep S3
876 05:05:47.977316 Disabling Deep S4
877 05:05:47.980596 Disabling Deep S4
878 05:05:47.981136 Disabling Deep S5
879 05:05:47.984055 Disabling Deep S5
880 05:05:47.987020 PCI: 00:1f.2 [0000/0000] hidden
881 05:05:47.991299 PCI: 00:1f.3 [8086/0000] bus ops
882 05:05:47.994102 PCI: 00:1f.3 [8086/a0c8] enabled
883 05:05:47.997784 PCI: 00:1f.5 [8086/0000] bus ops
884 05:05:48.000287 PCI: 00:1f.5 [8086/a0a4] enabled
885 05:05:48.003742 PCI: Leftover static devices:
886 05:05:48.004184 PCI: 00:10.2
887 05:05:48.004663 PCI: 00:10.6
888 05:05:48.007217 PCI: 00:10.7
889 05:05:48.007804 PCI: 00:06.0
890 05:05:48.010546 PCI: 00:07.1
891 05:05:48.010979 PCI: 00:07.2
892 05:05:48.013624 PCI: 00:07.3
893 05:05:48.014180 PCI: 00:09.0
894 05:05:48.014704 PCI: 00:0d.1
895 05:05:48.017521 PCI: 00:0d.2
896 05:05:48.018061 PCI: 00:0d.3
897 05:05:48.020728 PCI: 00:0e.0
898 05:05:48.021229 PCI: 00:12.0
899 05:05:48.021767 PCI: 00:12.6
900 05:05:48.023628 PCI: 00:13.0
901 05:05:48.024225 PCI: 00:14.1
902 05:05:48.026646 PCI: 00:16.1
903 05:05:48.027080 PCI: 00:16.2
904 05:05:48.027416 PCI: 00:16.3
905 05:05:48.030047 PCI: 00:16.4
906 05:05:48.030469 PCI: 00:16.5
907 05:05:48.033183 PCI: 00:17.0
908 05:05:48.033606 PCI: 00:19.2
909 05:05:48.036650 PCI: 00:1e.1
910 05:05:48.037341 PCI: 00:1f.1
911 05:05:48.037894 PCI: 00:1f.4
912 05:05:48.041507 PCI: 00:1f.6
913 05:05:48.042122 PCI: 00:1f.7
914 05:05:48.043144 PCI: Check your devicetree.cb.
915 05:05:48.046762 PCI: 00:02.0 scanning...
916 05:05:48.049495 scan_generic_bus for PCI: 00:02.0
917 05:05:48.052943 scan_generic_bus for PCI: 00:02.0 done
918 05:05:48.059714 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 05:05:48.059898 PCI: 00:04.0 scanning...
920 05:05:48.066655 scan_generic_bus for PCI: 00:04.0
921 05:05:48.067085 GENERIC: 0.0 enabled
922 05:05:48.073668 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 05:05:48.076864 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 05:05:48.080329 PCI: 00:0d.0 scanning...
925 05:05:48.082949 scan_static_bus for PCI: 00:0d.0
926 05:05:48.086416 USB0 port 0 enabled
927 05:05:48.089383 USB0 port 0 scanning...
928 05:05:48.093046 scan_static_bus for USB0 port 0
929 05:05:48.093475 USB3 port 0 enabled
930 05:05:48.096169 USB3 port 1 enabled
931 05:05:48.099508 USB3 port 2 disabled
932 05:05:48.099977 USB3 port 3 disabled
933 05:05:48.102393 USB3 port 0 scanning...
934 05:05:48.106097 scan_static_bus for USB3 port 0
935 05:05:48.109230 scan_static_bus for USB3 port 0 done
936 05:05:48.116420 scan_bus: bus USB3 port 0 finished in 6 msecs
937 05:05:48.116847 USB3 port 1 scanning...
938 05:05:48.119343 scan_static_bus for USB3 port 1
939 05:05:48.122585 scan_static_bus for USB3 port 1 done
940 05:05:48.128954 scan_bus: bus USB3 port 1 finished in 6 msecs
941 05:05:48.132246 scan_static_bus for USB0 port 0 done
942 05:05:48.135392 scan_bus: bus USB0 port 0 finished in 43 msecs
943 05:05:48.138884 scan_static_bus for PCI: 00:0d.0 done
944 05:05:48.145296 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 05:05:48.148539 PCI: 00:14.0 scanning...
946 05:05:48.152212 scan_static_bus for PCI: 00:14.0
947 05:05:48.152646 USB0 port 0 enabled
948 05:05:48.155511 USB0 port 0 scanning...
949 05:05:48.158532 scan_static_bus for USB0 port 0
950 05:05:48.162011 USB2 port 0 disabled
951 05:05:48.162331 USB2 port 1 enabled
952 05:05:48.165224 USB2 port 2 enabled
953 05:05:48.169383 USB2 port 3 disabled
954 05:05:48.169707 USB2 port 4 enabled
955 05:05:48.171980 USB2 port 5 disabled
956 05:05:48.175845 USB2 port 6 disabled
957 05:05:48.176265 USB2 port 7 disabled
958 05:05:48.178791 USB2 port 8 disabled
959 05:05:48.182461 USB2 port 9 disabled
960 05:05:48.182881 USB3 port 0 disabled
961 05:05:48.186172 USB3 port 1 enabled
962 05:05:48.188510 USB3 port 2 disabled
963 05:05:48.188879 USB3 port 3 disabled
964 05:05:48.191531 USB2 port 1 scanning...
965 05:05:48.195264 scan_static_bus for USB2 port 1
966 05:05:48.199102 scan_static_bus for USB2 port 1 done
967 05:05:48.205642 scan_bus: bus USB2 port 1 finished in 6 msecs
968 05:05:48.206067 USB2 port 2 scanning...
969 05:05:48.208400 scan_static_bus for USB2 port 2
970 05:05:48.211847 scan_static_bus for USB2 port 2 done
971 05:05:48.218449 scan_bus: bus USB2 port 2 finished in 6 msecs
972 05:05:48.221956 USB2 port 4 scanning...
973 05:05:48.225104 scan_static_bus for USB2 port 4
974 05:05:48.227805 scan_static_bus for USB2 port 4 done
975 05:05:48.231994 scan_bus: bus USB2 port 4 finished in 6 msecs
976 05:05:48.234595 USB3 port 1 scanning...
977 05:05:48.238027 scan_static_bus for USB3 port 1
978 05:05:48.241185 scan_static_bus for USB3 port 1 done
979 05:05:48.244244 scan_bus: bus USB3 port 1 finished in 6 msecs
980 05:05:48.251168 scan_static_bus for USB0 port 0 done
981 05:05:48.254515 scan_bus: bus USB0 port 0 finished in 93 msecs
982 05:05:48.258089 scan_static_bus for PCI: 00:14.0 done
983 05:05:48.264598 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 05:05:48.264932 PCI: 00:14.3 scanning...
985 05:05:48.267786 scan_static_bus for PCI: 00:14.3
986 05:05:48.271341 GENERIC: 0.0 enabled
987 05:05:48.274704 scan_static_bus for PCI: 00:14.3 done
988 05:05:48.281624 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 05:05:48.282084 PCI: 00:15.0 scanning...
990 05:05:48.284515 scan_static_bus for PCI: 00:15.0
991 05:05:48.287791 I2C: 00:1a enabled
992 05:05:48.291581 I2C: 00:31 enabled
993 05:05:48.292065 I2C: 00:32 enabled
994 05:05:48.294211 scan_static_bus for PCI: 00:15.0 done
995 05:05:48.300917 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 05:05:48.304278 PCI: 00:15.1 scanning...
997 05:05:48.307531 scan_static_bus for PCI: 00:15.1
998 05:05:48.307666 I2C: 00:10 enabled
999 05:05:48.309997 scan_static_bus for PCI: 00:15.1 done
1000 05:05:48.316991 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 05:05:48.321000 PCI: 00:15.2 scanning...
1002 05:05:48.323275 scan_static_bus for PCI: 00:15.2
1003 05:05:48.326662 scan_static_bus for PCI: 00:15.2 done
1004 05:05:48.329911 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 05:05:48.333284 PCI: 00:15.3 scanning...
1006 05:05:48.336853 scan_static_bus for PCI: 00:15.3
1007 05:05:48.340249 scan_static_bus for PCI: 00:15.3 done
1008 05:05:48.346774 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 05:05:48.347063 PCI: 00:19.1 scanning...
1010 05:05:48.350658 scan_static_bus for PCI: 00:19.1
1011 05:05:48.353841 I2C: 00:15 enabled
1012 05:05:48.356907 scan_static_bus for PCI: 00:19.1 done
1013 05:05:48.363951 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 05:05:48.364361 PCI: 00:1d.0 scanning...
1015 05:05:48.370918 do_pci_scan_bridge for PCI: 00:1d.0
1016 05:05:48.371420 PCI: pci_scan_bus for bus 01
1017 05:05:48.374458 PCI: 01:00.0 [15b7/5009] enabled
1018 05:05:48.377126 GENERIC: 0.0 enabled
1019 05:05:48.380432 Enabling Common Clock Configuration
1020 05:05:48.387032 L1 Sub-State supported from root port 29
1021 05:05:48.387569 L1 Sub-State Support = 0x5
1022 05:05:48.390944 CommonModeRestoreTime = 0x28
1023 05:05:48.396991 Power On Value = 0x16, Power On Scale = 0x0
1024 05:05:48.397530 ASPM: Enabled L1
1025 05:05:48.401031 PCIe: Max_Payload_Size adjusted to 128
1026 05:05:48.406958 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 05:05:48.410216 PCI: 00:1e.2 scanning...
1028 05:05:48.413512 scan_generic_bus for PCI: 00:1e.2
1029 05:05:48.413929 SPI: 00 enabled
1030 05:05:48.420421 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 05:05:48.422999 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 05:05:48.427583 PCI: 00:1e.3 scanning...
1033 05:05:48.430061 scan_generic_bus for PCI: 00:1e.3
1034 05:05:48.433690 SPI: 00 enabled
1035 05:05:48.440449 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 05:05:48.443162 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 05:05:48.447782 PCI: 00:1f.0 scanning...
1038 05:05:48.450407 scan_static_bus for PCI: 00:1f.0
1039 05:05:48.453885 PNP: 0c09.0 enabled
1040 05:05:48.454424 PNP: 0c09.0 scanning...
1041 05:05:48.456572 scan_static_bus for PNP: 0c09.0
1042 05:05:48.459763 scan_static_bus for PNP: 0c09.0 done
1043 05:05:48.466642 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 05:05:48.469579 scan_static_bus for PCI: 00:1f.0 done
1045 05:05:48.472969 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 05:05:48.476438 PCI: 00:1f.2 scanning...
1047 05:05:48.479521 scan_static_bus for PCI: 00:1f.2
1048 05:05:48.483317 GENERIC: 0.0 enabled
1049 05:05:48.487215 GENERIC: 0.0 scanning...
1050 05:05:48.490082 scan_static_bus for GENERIC: 0.0
1051 05:05:48.490608 GENERIC: 0.0 enabled
1052 05:05:48.493056 GENERIC: 1.0 enabled
1053 05:05:48.496565 scan_static_bus for GENERIC: 0.0 done
1054 05:05:48.503647 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 05:05:48.505943 scan_static_bus for PCI: 00:1f.2 done
1056 05:05:48.509559 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 05:05:48.513102 PCI: 00:1f.3 scanning...
1058 05:05:48.516278 scan_static_bus for PCI: 00:1f.3
1059 05:05:48.519447 scan_static_bus for PCI: 00:1f.3 done
1060 05:05:48.525773 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 05:05:48.526352 PCI: 00:1f.5 scanning...
1062 05:05:48.532375 scan_generic_bus for PCI: 00:1f.5
1063 05:05:48.535836 scan_generic_bus for PCI: 00:1f.5 done
1064 05:05:48.539096 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 05:05:48.545382 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 05:05:48.548871 scan_static_bus for Root Device done
1067 05:05:48.552181 scan_bus: bus Root Device finished in 735 msecs
1068 05:05:48.552597 done
1069 05:05:48.559019 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 05:05:48.561853 Chrome EC: UHEPI supported
1071 05:05:48.569221 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 05:05:48.575774 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 05:05:48.579261 SPI flash protection: WPSW=0 SRP0=1
1074 05:05:48.585618 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 05:05:48.589157 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 05:05:48.592028 found VGA at PCI: 00:02.0
1077 05:05:48.595827 Setting up VGA for PCI: 00:02.0
1078 05:05:48.602149 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 05:05:48.606018 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 05:05:48.608620 Allocating resources...
1081 05:05:48.612254 Reading resources...
1082 05:05:48.615100 Root Device read_resources bus 0 link: 0
1083 05:05:48.618432 DOMAIN: 0000 read_resources bus 0 link: 0
1084 05:05:48.625077 PCI: 00:04.0 read_resources bus 1 link: 0
1085 05:05:48.628322 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 05:05:48.634962 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 05:05:48.638474 USB0 port 0 read_resources bus 0 link: 0
1088 05:05:48.645340 USB0 port 0 read_resources bus 0 link: 0 done
1089 05:05:48.648622 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 05:05:48.655448 PCI: 00:14.0 read_resources bus 0 link: 0
1091 05:05:48.658001 USB0 port 0 read_resources bus 0 link: 0
1092 05:05:48.665006 USB0 port 0 read_resources bus 0 link: 0 done
1093 05:05:48.667855 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 05:05:48.675907 PCI: 00:14.3 read_resources bus 0 link: 0
1095 05:05:48.678478 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 05:05:48.685756 PCI: 00:15.0 read_resources bus 0 link: 0
1097 05:05:48.688637 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 05:05:48.694321 PCI: 00:15.1 read_resources bus 0 link: 0
1099 05:05:48.697776 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 05:05:48.704663 PCI: 00:19.1 read_resources bus 0 link: 0
1101 05:05:48.707729 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 05:05:48.714629 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 05:05:48.718587 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 05:05:48.724627 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 05:05:48.727794 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 05:05:48.734377 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 05:05:48.737603 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 05:05:48.744461 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 05:05:48.747338 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 05:05:48.754199 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 05:05:48.757102 GENERIC: 0.0 read_resources bus 0 link: 0
1112 05:05:48.763838 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 05:05:48.767017 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 05:05:48.773841 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 05:05:48.777053 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 05:05:48.783623 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 05:05:48.787011 Root Device read_resources bus 0 link: 0 done
1118 05:05:48.790376 Done reading resources.
1119 05:05:48.797132 Show resources in subtree (Root Device)...After reading.
1120 05:05:48.800610 Root Device child on link 0 DOMAIN: 0000
1121 05:05:48.803125 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 05:05:48.813173 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 05:05:48.823084 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 05:05:48.823583 PCI: 00:00.0
1125 05:05:48.833073 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 05:05:48.843780 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 05:05:48.853683 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 05:05:48.863555 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 05:05:48.872933 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 05:05:48.883157 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 05:05:48.889280 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 05:05:48.899840 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 05:05:48.909850 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 05:05:48.919383 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 05:05:48.929372 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 05:05:48.939387 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 05:05:48.945987 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 05:05:48.955779 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 05:05:48.965819 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 05:05:48.975760 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 05:05:48.985920 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 05:05:48.995632 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 05:05:49.002430 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 05:05:49.012026 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 05:05:49.016219 PCI: 00:02.0
1146 05:05:49.025037 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 05:05:49.036085 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 05:05:49.045517 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 05:05:49.049022 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 05:05:49.058365 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 05:05:49.061653 GENERIC: 0.0
1152 05:05:49.062167 PCI: 00:05.0
1153 05:05:49.071790 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 05:05:49.074540 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 05:05:49.078336 GENERIC: 0.0
1156 05:05:49.081783 PCI: 00:08.0
1157 05:05:49.091438 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 05:05:49.091898 PCI: 00:0a.0
1159 05:05:49.095554 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 05:05:49.104921 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 05:05:49.111520 USB0 port 0 child on link 0 USB3 port 0
1162 05:05:49.111980 USB3 port 0
1163 05:05:49.114343 USB3 port 1
1164 05:05:49.114759 USB3 port 2
1165 05:05:49.118086 USB3 port 3
1166 05:05:49.121455 PCI: 00:14.0 child on link 0 USB0 port 0
1167 05:05:49.131212 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 05:05:49.138361 USB0 port 0 child on link 0 USB2 port 0
1169 05:05:49.138950 USB2 port 0
1170 05:05:49.140760 USB2 port 1
1171 05:05:49.141177 USB2 port 2
1172 05:05:49.143978 USB2 port 3
1173 05:05:49.144576 USB2 port 4
1174 05:05:49.147396 USB2 port 5
1175 05:05:49.147853 USB2 port 6
1176 05:05:49.150543 USB2 port 7
1177 05:05:49.151127 USB2 port 8
1178 05:05:49.153895 USB2 port 9
1179 05:05:49.154188 USB3 port 0
1180 05:05:49.157154 USB3 port 1
1181 05:05:49.160483 USB3 port 2
1182 05:05:49.160973 USB3 port 3
1183 05:05:49.163914 PCI: 00:14.2
1184 05:05:49.173795 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 05:05:49.184321 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 05:05:49.187254 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 05:05:49.197613 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 05:05:49.198135 GENERIC: 0.0
1189 05:05:49.203632 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 05:05:49.213473 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 05:05:49.213892 I2C: 00:1a
1192 05:05:49.217296 I2C: 00:31
1193 05:05:49.217874 I2C: 00:32
1194 05:05:49.224075 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 05:05:49.233551 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 05:05:49.233861 I2C: 00:10
1197 05:05:49.234101 PCI: 00:15.2
1198 05:05:49.243490 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 05:05:49.246418 PCI: 00:15.3
1200 05:05:49.256590 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 05:05:49.259600 PCI: 00:16.0
1202 05:05:49.269853 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 05:05:49.270242 PCI: 00:19.0
1204 05:05:49.273385 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 05:05:49.283119 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 05:05:49.286529 I2C: 00:15
1207 05:05:49.290295 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 05:05:49.300145 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 05:05:49.310377 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 05:05:49.319357 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 05:05:49.319908 GENERIC: 0.0
1212 05:05:49.322991 PCI: 01:00.0
1213 05:05:49.332446 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 05:05:49.342468 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 05:05:49.342896 PCI: 00:1e.0
1216 05:05:49.353251 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 05:05:49.359632 PCI: 00:1e.2 child on link 0 SPI: 00
1218 05:05:49.369766 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 05:05:49.370237 SPI: 00
1220 05:05:49.372081 PCI: 00:1e.3 child on link 0 SPI: 00
1221 05:05:49.382242 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 05:05:49.385811 SPI: 00
1223 05:05:49.389476 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 05:05:49.399257 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 05:05:49.399768 PNP: 0c09.0
1226 05:05:49.409440 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 05:05:49.411905 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 05:05:49.421995 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 05:05:49.432278 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 05:05:49.435182 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 05:05:49.438215 GENERIC: 0.0
1232 05:05:49.438809 GENERIC: 1.0
1233 05:05:49.441822 PCI: 00:1f.3
1234 05:05:49.451755 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 05:05:49.461583 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 05:05:49.462242 PCI: 00:1f.5
1237 05:05:49.471786 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 05:05:49.474688 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 05:05:49.478800 APIC: 00
1240 05:05:49.479213 APIC: 01
1241 05:05:49.481826 APIC: 03
1242 05:05:49.482240 APIC: 07
1243 05:05:49.482569 APIC: 05
1244 05:05:49.485196 APIC: 04
1245 05:05:49.485609 APIC: 02
1246 05:05:49.488448 APIC: 06
1247 05:05:49.494432 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 05:05:49.501889 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 05:05:49.504407 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 05:05:49.510891 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 05:05:49.517529 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 05:05:49.521047 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 05:05:49.527763 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 05:05:49.534034 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 05:05:49.544573 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 05:05:49.550964 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 05:05:49.557615 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 05:05:49.564337 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 05:05:49.570544 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 05:05:49.577166 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 05:05:49.580605 DOMAIN: 0000: Resource ranges:
1262 05:05:49.587497 * Base: 1000, Size: 800, Tag: 100
1263 05:05:49.589966 * Base: 1900, Size: e700, Tag: 100
1264 05:05:49.594194 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 05:05:49.599982 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 05:05:49.607175 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 05:05:49.616640 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 05:05:49.623148 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 05:05:49.630116 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 05:05:49.640093 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 05:05:49.646875 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 05:05:49.653322 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 05:05:49.662771 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 05:05:49.670126 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 05:05:49.676055 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 05:05:49.686572 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 05:05:49.692455 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 05:05:49.699526 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 05:05:49.709915 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 05:05:49.716333 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 05:05:49.722242 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 05:05:49.732131 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 05:05:49.738794 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 05:05:49.745251 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 05:05:49.755489 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 05:05:49.761856 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 05:05:49.769121 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 05:05:49.778509 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 05:05:49.782521 DOMAIN: 0000: Resource ranges:
1290 05:05:49.785170 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 05:05:49.788635 * Base: d0000000, Size: 28000000, Tag: 200
1292 05:05:49.794606 * Base: fa000000, Size: 1000000, Tag: 200
1293 05:05:49.798480 * Base: fb001000, Size: 2fff000, Tag: 200
1294 05:05:49.801912 * Base: fe010000, Size: 2e000, Tag: 200
1295 05:05:49.804940 * Base: fe03f000, Size: d41000, Tag: 200
1296 05:05:49.811516 * Base: fed88000, Size: 8000, Tag: 200
1297 05:05:49.814941 * Base: fed93000, Size: d000, Tag: 200
1298 05:05:49.818188 * Base: feda2000, Size: 1e000, Tag: 200
1299 05:05:49.822036 * Base: fede0000, Size: 1220000, Tag: 200
1300 05:05:49.828118 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 05:05:49.834435 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 05:05:49.841577 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 05:05:49.848138 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 05:05:49.854490 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 05:05:49.861663 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 05:05:49.867482 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 05:05:49.874613 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 05:05:49.880675 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 05:05:49.887960 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 05:05:49.894337 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 05:05:49.901230 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 05:05:49.908012 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 05:05:49.914056 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 05:05:49.921332 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 05:05:49.927246 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 05:05:49.933891 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 05:05:49.940200 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 05:05:49.946724 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 05:05:49.953083 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 05:05:49.959839 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 05:05:49.966533 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 05:05:49.973021 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 05:05:49.980462 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 05:05:49.989714 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 05:05:49.993245 PCI: 00:1d.0: Resource ranges:
1326 05:05:49.996721 * Base: 7fc00000, Size: 100000, Tag: 200
1327 05:05:50.002907 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 05:05:50.009630 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 05:05:50.019113 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 05:05:50.026038 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 05:05:50.029135 Root Device assign_resources, bus 0 link: 0
1332 05:05:50.036174 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 05:05:50.043184 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 05:05:50.052407 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 05:05:50.059060 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 05:05:50.065892 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 05:05:50.073039 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 05:05:50.075920 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 05:05:50.085771 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 05:05:50.092273 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 05:05:50.102467 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 05:05:50.105688 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 05:05:50.111797 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 05:05:50.118660 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 05:05:50.122186 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 05:05:50.128401 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 05:05:50.135431 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 05:05:50.145288 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 05:05:50.151822 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 05:05:50.158501 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 05:05:50.161289 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 05:05:50.171395 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 05:05:50.174453 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 05:05:50.178060 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 05:05:50.188187 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 05:05:50.191569 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 05:05:50.197361 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 05:05:50.204843 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 05:05:50.214060 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 05:05:50.220975 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 05:05:50.230766 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 05:05:50.233941 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 05:05:50.237113 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 05:05:50.246906 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 05:05:50.257392 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 05:05:50.267014 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 05:05:50.270440 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 05:05:50.278020 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 05:05:50.287481 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 05:05:50.289954 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 05:05:50.301022 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 05:05:50.303152 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 05:05:50.310033 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 05:05:50.317024 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 05:05:50.322900 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 05:05:50.326115 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 05:05:50.329279 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 05:05:50.336455 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 05:05:50.339818 LPC: Trying to open IO window from 800 size 1ff
1380 05:05:50.349299 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 05:05:50.356788 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 05:05:50.365674 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 05:05:50.370205 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 05:05:50.376215 Root Device assign_resources, bus 0 link: 0
1385 05:05:50.376305 Done setting resources.
1386 05:05:50.382304 Show resources in subtree (Root Device)...After assigning values.
1387 05:05:50.388783 Root Device child on link 0 DOMAIN: 0000
1388 05:05:50.392341 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 05:05:50.402919 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 05:05:50.412213 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 05:05:50.412632 PCI: 00:00.0
1392 05:05:50.422258 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 05:05:50.432583 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 05:05:50.442439 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 05:05:50.451982 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 05:05:50.458588 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 05:05:50.468917 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 05:05:50.478712 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 05:05:50.488469 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 05:05:50.498609 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 05:05:50.508314 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 05:05:50.515028 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 05:05:50.524447 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 05:05:50.534921 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 05:05:50.544718 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 05:05:50.554525 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 05:05:50.565007 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 05:05:50.574521 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 05:05:50.581135 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 05:05:50.591239 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 05:05:50.600753 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 05:05:50.603936 PCI: 00:02.0
1413 05:05:50.614499 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 05:05:50.624130 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 05:05:50.633881 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 05:05:50.637062 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 05:05:50.646881 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 05:05:50.650577 GENERIC: 0.0
1419 05:05:50.650873 PCI: 00:05.0
1420 05:05:50.663360 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 05:05:50.667279 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 05:05:50.670200 GENERIC: 0.0
1423 05:05:50.670492 PCI: 00:08.0
1424 05:05:50.679929 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 05:05:50.683166 PCI: 00:0a.0
1426 05:05:50.686724 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 05:05:50.697046 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 05:05:50.702967 USB0 port 0 child on link 0 USB3 port 0
1429 05:05:50.703263 USB3 port 0
1430 05:05:50.706326 USB3 port 1
1431 05:05:50.706623 USB3 port 2
1432 05:05:50.709603 USB3 port 3
1433 05:05:50.713006 PCI: 00:14.0 child on link 0 USB0 port 0
1434 05:05:50.722818 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 05:05:50.726380 USB0 port 0 child on link 0 USB2 port 0
1436 05:05:50.729434 USB2 port 0
1437 05:05:50.732701 USB2 port 1
1438 05:05:50.733104 USB2 port 2
1439 05:05:50.735783 USB2 port 3
1440 05:05:50.736096 USB2 port 4
1441 05:05:50.739731 USB2 port 5
1442 05:05:50.740061 USB2 port 6
1443 05:05:50.743279 USB2 port 7
1444 05:05:50.743589 USB2 port 8
1445 05:05:50.745862 USB2 port 9
1446 05:05:50.746258 USB3 port 0
1447 05:05:50.749412 USB3 port 1
1448 05:05:50.749730 USB3 port 2
1449 05:05:50.752874 USB3 port 3
1450 05:05:50.753187 PCI: 00:14.2
1451 05:05:50.765796 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 05:05:50.775421 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 05:05:50.778954 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 05:05:50.789548 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 05:05:50.793229 GENERIC: 0.0
1456 05:05:50.795801 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 05:05:50.805308 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 05:05:50.808813 I2C: 00:1a
1459 05:05:50.809209 I2C: 00:31
1460 05:05:50.812026 I2C: 00:32
1461 05:05:50.815653 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 05:05:50.824789 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 05:05:50.828690 I2C: 00:10
1464 05:05:50.828911 PCI: 00:15.2
1465 05:05:50.838241 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 05:05:50.841688 PCI: 00:15.3
1467 05:05:50.851507 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 05:05:50.851759 PCI: 00:16.0
1469 05:05:50.861644 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 05:05:50.864609 PCI: 00:19.0
1471 05:05:50.867947 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 05:05:50.878015 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 05:05:50.881221 I2C: 00:15
1474 05:05:50.885328 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 05:05:50.894564 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 05:05:50.907618 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 05:05:50.917727 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 05:05:50.918183 GENERIC: 0.0
1479 05:05:50.921106 PCI: 01:00.0
1480 05:05:50.930951 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 05:05:50.941160 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 05:05:50.944806 PCI: 00:1e.0
1483 05:05:50.954263 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 05:05:50.957495 PCI: 00:1e.2 child on link 0 SPI: 00
1485 05:05:50.967374 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 05:05:50.970537 SPI: 00
1487 05:05:50.974305 PCI: 00:1e.3 child on link 0 SPI: 00
1488 05:05:50.983700 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 05:05:50.983931 SPI: 00
1490 05:05:50.990782 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 05:05:50.997164 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 05:05:51.000633 PNP: 0c09.0
1493 05:05:51.006827 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 05:05:51.013421 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 05:05:51.023150 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 05:05:51.029916 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 05:05:51.037046 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 05:05:51.037572 GENERIC: 0.0
1499 05:05:51.040404 GENERIC: 1.0
1500 05:05:51.043047 PCI: 00:1f.3
1501 05:05:51.053298 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 05:05:51.063587 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 05:05:51.064141 PCI: 00:1f.5
1504 05:05:51.073462 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 05:05:51.079754 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 05:05:51.080399 APIC: 00
1507 05:05:51.082645 APIC: 01
1508 05:05:51.083027 APIC: 03
1509 05:05:51.083359 APIC: 07
1510 05:05:51.086509 APIC: 05
1511 05:05:51.086802 APIC: 04
1512 05:05:51.087032 APIC: 02
1513 05:05:51.089286 APIC: 06
1514 05:05:51.093078 Done allocating resources.
1515 05:05:51.099234 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 05:05:51.103597 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 05:05:51.105920 Configure GPIOs for I2S audio on UP4.
1518 05:05:51.114137 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 05:05:51.116971 Enabling resources...
1520 05:05:51.120718 PCI: 00:00.0 subsystem <- 8086/9a12
1521 05:05:51.124072 PCI: 00:00.0 cmd <- 06
1522 05:05:51.126916 PCI: 00:02.0 subsystem <- 8086/9a40
1523 05:05:51.130247 PCI: 00:02.0 cmd <- 03
1524 05:05:51.133566 PCI: 00:04.0 subsystem <- 8086/9a03
1525 05:05:51.136885 PCI: 00:04.0 cmd <- 02
1526 05:05:51.139929 PCI: 00:05.0 subsystem <- 8086/9a19
1527 05:05:51.140225 PCI: 00:05.0 cmd <- 02
1528 05:05:51.146832 PCI: 00:08.0 subsystem <- 8086/9a11
1529 05:05:51.147215 PCI: 00:08.0 cmd <- 06
1530 05:05:51.150101 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 05:05:51.153608 PCI: 00:0d.0 cmd <- 02
1532 05:05:51.156797 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 05:05:51.159935 PCI: 00:14.0 cmd <- 02
1534 05:05:51.163105 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 05:05:51.166274 PCI: 00:14.2 cmd <- 02
1536 05:05:51.170152 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 05:05:51.173061 PCI: 00:14.3 cmd <- 02
1538 05:05:51.176568 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 05:05:51.179372 PCI: 00:15.0 cmd <- 02
1540 05:05:51.182707 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 05:05:51.186172 PCI: 00:15.1 cmd <- 02
1542 05:05:51.189730 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 05:05:51.190024 PCI: 00:15.2 cmd <- 02
1544 05:05:51.196237 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 05:05:51.196535 PCI: 00:15.3 cmd <- 02
1546 05:05:51.199356 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 05:05:51.202494 PCI: 00:16.0 cmd <- 02
1548 05:05:51.206763 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 05:05:51.209895 PCI: 00:19.1 cmd <- 02
1550 05:05:51.213122 PCI: 00:1d.0 bridge ctrl <- 0013
1551 05:05:51.215916 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 05:05:51.219590 PCI: 00:1d.0 cmd <- 06
1553 05:05:51.223068 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 05:05:51.226083 PCI: 00:1e.0 cmd <- 06
1555 05:05:51.229352 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 05:05:51.232456 PCI: 00:1e.2 cmd <- 06
1557 05:05:51.236201 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 05:05:51.239024 PCI: 00:1e.3 cmd <- 02
1559 05:05:51.242435 PCI: 00:1f.0 subsystem <- 8086/a087
1560 05:05:51.245716 PCI: 00:1f.0 cmd <- 407
1561 05:05:51.248575 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 05:05:51.248875 PCI: 00:1f.3 cmd <- 02
1563 05:05:51.255644 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 05:05:51.255978 PCI: 00:1f.5 cmd <- 406
1565 05:05:51.260670 PCI: 01:00.0 cmd <- 02
1566 05:05:51.265231 done.
1567 05:05:51.268156 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 05:05:51.271953 Initializing devices...
1569 05:05:51.274869 Root Device init
1570 05:05:51.277991 Chrome EC: Set SMI mask to 0x0000000000000000
1571 05:05:51.284956 Chrome EC: clear events_b mask to 0x0000000000000000
1572 05:05:51.291290 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 05:05:51.297809 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 05:05:51.301539 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 05:05:51.307699 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 05:05:51.311183 fw_config match found: DB_USB=USB3_ACTIVE
1577 05:05:51.317908 Configure Right Type-C port orientation for retimer
1578 05:05:51.321323 Root Device init finished in 43 msecs
1579 05:05:51.324037 PCI: 00:00.0 init
1580 05:05:51.327768 CPU TDP = 9 Watts
1581 05:05:51.327949 CPU PL1 = 9 Watts
1582 05:05:51.330777 CPU PL2 = 40 Watts
1583 05:05:51.334292 CPU PL4 = 83 Watts
1584 05:05:51.338023 PCI: 00:00.0 init finished in 8 msecs
1585 05:05:51.338206 PCI: 00:02.0 init
1586 05:05:51.341121 GMA: Found VBT in CBFS
1587 05:05:51.344767 GMA: Found valid VBT in CBFS
1588 05:05:51.350810 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 05:05:51.357595 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 05:05:51.360535 PCI: 00:02.0 init finished in 18 msecs
1591 05:05:51.364399 PCI: 00:05.0 init
1592 05:05:51.367133 PCI: 00:05.0 init finished in 0 msecs
1593 05:05:51.370486 PCI: 00:08.0 init
1594 05:05:51.373799 PCI: 00:08.0 init finished in 0 msecs
1595 05:05:51.377420 PCI: 00:14.0 init
1596 05:05:51.381659 PCI: 00:14.0 init finished in 0 msecs
1597 05:05:51.384597 PCI: 00:14.2 init
1598 05:05:51.387555 PCI: 00:14.2 init finished in 0 msecs
1599 05:05:51.390133 PCI: 00:15.0 init
1600 05:05:51.393716 I2C bus 0 version 0x3230302a
1601 05:05:51.397155 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 05:05:51.400217 PCI: 00:15.0 init finished in 6 msecs
1603 05:05:51.400393 PCI: 00:15.1 init
1604 05:05:51.403442 I2C bus 1 version 0x3230302a
1605 05:05:51.406870 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 05:05:51.413135 PCI: 00:15.1 init finished in 6 msecs
1607 05:05:51.413308 PCI: 00:15.2 init
1608 05:05:51.416453 I2C bus 2 version 0x3230302a
1609 05:05:51.419969 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 05:05:51.423590 PCI: 00:15.2 init finished in 6 msecs
1611 05:05:51.426527 PCI: 00:15.3 init
1612 05:05:51.429753 I2C bus 3 version 0x3230302a
1613 05:05:51.434309 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 05:05:51.436810 PCI: 00:15.3 init finished in 6 msecs
1615 05:05:51.440296 PCI: 00:16.0 init
1616 05:05:51.443712 PCI: 00:16.0 init finished in 0 msecs
1617 05:05:51.446970 PCI: 00:19.1 init
1618 05:05:51.450054 I2C bus 5 version 0x3230302a
1619 05:05:51.453221 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 05:05:51.456520 PCI: 00:19.1 init finished in 6 msecs
1621 05:05:51.460029 PCI: 00:1d.0 init
1622 05:05:51.463292 Initializing PCH PCIe bridge.
1623 05:05:51.466206 PCI: 00:1d.0 init finished in 3 msecs
1624 05:05:51.469927 PCI: 00:1f.0 init
1625 05:05:51.472702 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 05:05:51.476196 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 05:05:51.479683 IOAPIC: ID = 0x02
1628 05:05:51.483325 IOAPIC: Dumping registers
1629 05:05:51.483477 reg 0x0000: 0x02000000
1630 05:05:51.486558 reg 0x0001: 0x00770020
1631 05:05:51.489556 reg 0x0002: 0x00000000
1632 05:05:51.492378 PCI: 00:1f.0 init finished in 21 msecs
1633 05:05:51.496288 PCI: 00:1f.2 init
1634 05:05:51.500176 Disabling ACPI via APMC.
1635 05:05:51.500327 APMC done.
1636 05:05:51.506306 PCI: 00:1f.2 init finished in 5 msecs
1637 05:05:51.517475 PCI: 01:00.0 init
1638 05:05:51.520331 PCI: 01:00.0 init finished in 0 msecs
1639 05:05:51.523107 PNP: 0c09.0 init
1640 05:05:51.526413 Google Chrome EC uptime: 8.254 seconds
1641 05:05:51.533980 Google Chrome AP resets since EC boot: 1
1642 05:05:51.536360 Google Chrome most recent AP reset causes:
1643 05:05:51.540201 0.451: 32775 shutdown: entering G3
1644 05:05:51.546373 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 05:05:51.549127 PNP: 0c09.0 init finished in 23 msecs
1646 05:05:51.555891 Devices initialized
1647 05:05:51.559164 Show all devs... After init.
1648 05:05:51.562675 Root Device: enabled 1
1649 05:05:51.562847 DOMAIN: 0000: enabled 1
1650 05:05:51.565499 CPU_CLUSTER: 0: enabled 1
1651 05:05:51.568826 PCI: 00:00.0: enabled 1
1652 05:05:51.571811 PCI: 00:02.0: enabled 1
1653 05:05:51.571975 PCI: 00:04.0: enabled 1
1654 05:05:51.574957 PCI: 00:05.0: enabled 1
1655 05:05:51.578302 PCI: 00:06.0: enabled 0
1656 05:05:51.581742 PCI: 00:07.0: enabled 0
1657 05:05:51.581939 PCI: 00:07.1: enabled 0
1658 05:05:51.585113 PCI: 00:07.2: enabled 0
1659 05:05:51.588727 PCI: 00:07.3: enabled 0
1660 05:05:51.592458 PCI: 00:08.0: enabled 1
1661 05:05:51.592667 PCI: 00:09.0: enabled 0
1662 05:05:51.595105 PCI: 00:0a.0: enabled 0
1663 05:05:51.598601 PCI: 00:0d.0: enabled 1
1664 05:05:51.602735 PCI: 00:0d.1: enabled 0
1665 05:05:51.603438 PCI: 00:0d.2: enabled 0
1666 05:05:51.605976 PCI: 00:0d.3: enabled 0
1667 05:05:51.608313 PCI: 00:0e.0: enabled 0
1668 05:05:51.612209 PCI: 00:10.2: enabled 1
1669 05:05:51.612877 PCI: 00:10.6: enabled 0
1670 05:05:51.615468 PCI: 00:10.7: enabled 0
1671 05:05:51.618709 PCI: 00:12.0: enabled 0
1672 05:05:51.619342 PCI: 00:12.6: enabled 0
1673 05:05:51.622476 PCI: 00:13.0: enabled 0
1674 05:05:51.624959 PCI: 00:14.0: enabled 1
1675 05:05:51.628691 PCI: 00:14.1: enabled 0
1676 05:05:51.629109 PCI: 00:14.2: enabled 1
1677 05:05:51.631985 PCI: 00:14.3: enabled 1
1678 05:05:51.634915 PCI: 00:15.0: enabled 1
1679 05:05:51.638500 PCI: 00:15.1: enabled 1
1680 05:05:51.638948 PCI: 00:15.2: enabled 1
1681 05:05:51.641474 PCI: 00:15.3: enabled 1
1682 05:05:51.645664 PCI: 00:16.0: enabled 1
1683 05:05:51.648204 PCI: 00:16.1: enabled 0
1684 05:05:51.648646 PCI: 00:16.2: enabled 0
1685 05:05:51.651302 PCI: 00:16.3: enabled 0
1686 05:05:51.654836 PCI: 00:16.4: enabled 0
1687 05:05:51.658499 PCI: 00:16.5: enabled 0
1688 05:05:51.658919 PCI: 00:17.0: enabled 0
1689 05:05:51.661602 PCI: 00:19.0: enabled 0
1690 05:05:51.664844 PCI: 00:19.1: enabled 1
1691 05:05:51.665169 PCI: 00:19.2: enabled 0
1692 05:05:51.667837 PCI: 00:1c.0: enabled 1
1693 05:05:51.671283 PCI: 00:1c.1: enabled 0
1694 05:05:51.674782 PCI: 00:1c.2: enabled 0
1695 05:05:51.675095 PCI: 00:1c.3: enabled 0
1696 05:05:51.678046 PCI: 00:1c.4: enabled 0
1697 05:05:51.681452 PCI: 00:1c.5: enabled 0
1698 05:05:51.684617 PCI: 00:1c.6: enabled 1
1699 05:05:51.684915 PCI: 00:1c.7: enabled 0
1700 05:05:51.688243 PCI: 00:1d.0: enabled 1
1701 05:05:51.691198 PCI: 00:1d.1: enabled 0
1702 05:05:51.694341 PCI: 00:1d.2: enabled 1
1703 05:05:51.694638 PCI: 00:1d.3: enabled 0
1704 05:05:51.697889 PCI: 00:1e.0: enabled 1
1705 05:05:51.701074 PCI: 00:1e.1: enabled 0
1706 05:05:51.704697 PCI: 00:1e.2: enabled 1
1707 05:05:51.704778 PCI: 00:1e.3: enabled 1
1708 05:05:51.707602 PCI: 00:1f.0: enabled 1
1709 05:05:51.710804 PCI: 00:1f.1: enabled 0
1710 05:05:51.714567 PCI: 00:1f.2: enabled 1
1711 05:05:51.714647 PCI: 00:1f.3: enabled 1
1712 05:05:51.717286 PCI: 00:1f.4: enabled 0
1713 05:05:51.720854 PCI: 00:1f.5: enabled 1
1714 05:05:51.720934 PCI: 00:1f.6: enabled 0
1715 05:05:51.724031 PCI: 00:1f.7: enabled 0
1716 05:05:51.727923 APIC: 00: enabled 1
1717 05:05:51.731003 GENERIC: 0.0: enabled 1
1718 05:05:51.731084 GENERIC: 0.0: enabled 1
1719 05:05:51.734448 GENERIC: 1.0: enabled 1
1720 05:05:51.737529 GENERIC: 0.0: enabled 1
1721 05:05:51.740893 GENERIC: 1.0: enabled 1
1722 05:05:51.740979 USB0 port 0: enabled 1
1723 05:05:51.744197 GENERIC: 0.0: enabled 1
1724 05:05:51.747088 USB0 port 0: enabled 1
1725 05:05:51.747194 GENERIC: 0.0: enabled 1
1726 05:05:51.751053 I2C: 00:1a: enabled 1
1727 05:05:51.753921 I2C: 00:31: enabled 1
1728 05:05:51.754023 I2C: 00:32: enabled 1
1729 05:05:51.756796 I2C: 00:10: enabled 1
1730 05:05:51.760730 I2C: 00:15: enabled 1
1731 05:05:51.763831 GENERIC: 0.0: enabled 0
1732 05:05:51.763955 GENERIC: 1.0: enabled 0
1733 05:05:51.767550 GENERIC: 0.0: enabled 1
1734 05:05:51.770823 SPI: 00: enabled 1
1735 05:05:51.770958 SPI: 00: enabled 1
1736 05:05:51.773815 PNP: 0c09.0: enabled 1
1737 05:05:51.776799 GENERIC: 0.0: enabled 1
1738 05:05:51.776949 USB3 port 0: enabled 1
1739 05:05:51.780541 USB3 port 1: enabled 1
1740 05:05:51.783917 USB3 port 2: enabled 0
1741 05:05:51.784120 USB3 port 3: enabled 0
1742 05:05:51.786984 USB2 port 0: enabled 0
1743 05:05:51.790957 USB2 port 1: enabled 1
1744 05:05:51.793496 USB2 port 2: enabled 1
1745 05:05:51.793804 USB2 port 3: enabled 0
1746 05:05:51.797027 USB2 port 4: enabled 1
1747 05:05:51.800786 USB2 port 5: enabled 0
1748 05:05:51.801076 USB2 port 6: enabled 0
1749 05:05:51.803571 USB2 port 7: enabled 0
1750 05:05:51.806590 USB2 port 8: enabled 0
1751 05:05:51.810829 USB2 port 9: enabled 0
1752 05:05:51.811121 USB3 port 0: enabled 0
1753 05:05:51.813603 USB3 port 1: enabled 1
1754 05:05:51.816822 USB3 port 2: enabled 0
1755 05:05:51.817183 USB3 port 3: enabled 0
1756 05:05:51.820145 GENERIC: 0.0: enabled 1
1757 05:05:51.823428 GENERIC: 1.0: enabled 1
1758 05:05:51.823934 APIC: 01: enabled 1
1759 05:05:51.826973 APIC: 03: enabled 1
1760 05:05:51.829951 APIC: 07: enabled 1
1761 05:05:51.830379 APIC: 05: enabled 1
1762 05:05:51.833273 APIC: 04: enabled 1
1763 05:05:51.836829 APIC: 02: enabled 1
1764 05:05:51.837235 APIC: 06: enabled 1
1765 05:05:51.840084 PCI: 01:00.0: enabled 1
1766 05:05:51.847148 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1767 05:05:51.850134 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 05:05:51.852997 ELOG: NV offset 0xf30000 size 0x1000
1769 05:05:51.861433 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 05:05:51.867811 ELOG: Event(17) added with size 13 at 2024-02-07 05:05:50 UTC
1771 05:05:51.874099 ELOG: Event(92) added with size 9 at 2024-02-07 05:05:50 UTC
1772 05:05:51.881163 ELOG: Event(93) added with size 9 at 2024-02-07 05:05:50 UTC
1773 05:05:51.886984 ELOG: Event(9E) added with size 10 at 2024-02-07 05:05:50 UTC
1774 05:05:51.893882 ELOG: Event(9F) added with size 14 at 2024-02-07 05:05:50 UTC
1775 05:05:51.900345 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 05:05:51.907439 ELOG: Event(A1) added with size 10 at 2024-02-07 05:05:50 UTC
1777 05:05:51.913267 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 05:05:51.920634 ELOG: Event(A0) added with size 9 at 2024-02-07 05:05:50 UTC
1779 05:05:51.923641 elog_add_boot_reason: Logged dev mode boot
1780 05:05:51.930447 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 05:05:51.930983 Finalize devices...
1782 05:05:51.933293 Devices finalized
1783 05:05:51.940506 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 05:05:51.943613 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 05:05:51.950530 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 05:05:51.953082 ME: HFSTS1 : 0x80030055
1787 05:05:51.959744 ME: HFSTS2 : 0x30280116
1788 05:05:51.963440 ME: HFSTS3 : 0x00000050
1789 05:05:51.966542 ME: HFSTS4 : 0x00004000
1790 05:05:51.972943 ME: HFSTS5 : 0x00000000
1791 05:05:51.976370 ME: HFSTS6 : 0x40400006
1792 05:05:51.979593 ME: Manufacturing Mode : YES
1793 05:05:51.983231 ME: SPI Protection Mode Enabled : NO
1794 05:05:51.990093 ME: FW Partition Table : OK
1795 05:05:51.992717 ME: Bringup Loader Failure : NO
1796 05:05:51.996129 ME: Firmware Init Complete : NO
1797 05:05:51.999409 ME: Boot Options Present : NO
1798 05:05:52.002780 ME: Update In Progress : NO
1799 05:05:52.006413 ME: D0i3 Support : YES
1800 05:05:52.009360 ME: Low Power State Enabled : NO
1801 05:05:52.012705 ME: CPU Replaced : YES
1802 05:05:52.019659 ME: CPU Replacement Valid : YES
1803 05:05:52.022392 ME: Current Working State : 5
1804 05:05:52.026227 ME: Current Operation State : 1
1805 05:05:52.029373 ME: Current Operation Mode : 3
1806 05:05:52.032711 ME: Error Code : 0
1807 05:05:52.036180 ME: Enhanced Debug Mode : NO
1808 05:05:52.039365 ME: CPU Debug Disabled : YES
1809 05:05:52.042483 ME: TXT Support : NO
1810 05:05:52.049135 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 05:05:52.059650 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 05:05:52.062724 CBFS: 'fallback/slic' not found.
1813 05:05:52.065676 ACPI: Writing ACPI tables at 76b01000.
1814 05:05:52.065900 ACPI: * FACS
1815 05:05:52.068937 ACPI: * DSDT
1816 05:05:52.072176 Ramoops buffer: 0x100000@0x76a00000.
1817 05:05:52.075583 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 05:05:52.082095 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 05:05:52.085701 Google Chrome EC: version:
1820 05:05:52.088792 ro: voema_v2.0.10114-a447f03e46
1821 05:05:52.092457 rw: voema_v2.0.10114-a447f03e46
1822 05:05:52.092769 running image: 2
1823 05:05:52.098376 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 05:05:52.104370 ACPI: * FADT
1825 05:05:52.104591 SCI is IRQ9
1826 05:05:52.110224 ACPI: added table 1/32, length now 40
1827 05:05:52.110447 ACPI: * SSDT
1828 05:05:52.113399 Found 1 CPU(s) with 8 core(s) each.
1829 05:05:52.119700 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 05:05:52.123000 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 05:05:52.126769 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 05:05:52.130061 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 05:05:52.136645 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 05:05:52.143303 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 05:05:52.146323 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 05:05:52.152594 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 05:05:52.159520 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 05:05:52.162588 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 05:05:52.169872 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 05:05:52.173077 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 05:05:52.179374 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 05:05:52.183164 PS2K: Passing 80 keymaps to kernel
1843 05:05:52.189834 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 05:05:52.196390 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 05:05:52.202496 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 05:05:52.209751 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 05:05:52.215949 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 05:05:52.222936 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 05:05:52.229738 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 05:05:52.235842 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 05:05:52.239300 ACPI: added table 2/32, length now 44
1852 05:05:52.240267 ACPI: * MCFG
1853 05:05:52.245765 ACPI: added table 3/32, length now 48
1854 05:05:52.246197 ACPI: * TPM2
1855 05:05:52.248874 TPM2 log created at 0x769f0000
1856 05:05:52.252121 ACPI: added table 4/32, length now 52
1857 05:05:52.255407 ACPI: * MADT
1858 05:05:52.255871 SCI is IRQ9
1859 05:05:52.258754 ACPI: added table 5/32, length now 56
1860 05:05:52.264234 current = 76b09850
1861 05:05:52.264662 ACPI: * DMAR
1862 05:05:52.265472 ACPI: added table 6/32, length now 60
1863 05:05:52.271854 ACPI: added table 7/32, length now 64
1864 05:05:52.272284 ACPI: * HPET
1865 05:05:52.275138 ACPI: added table 8/32, length now 68
1866 05:05:52.278518 ACPI: done.
1867 05:05:52.279043 ACPI tables: 35216 bytes.
1868 05:05:52.283009 smbios_write_tables: 769ef000
1869 05:05:52.285916 EC returned error result code 3
1870 05:05:52.289356 Couldn't obtain OEM name from CBI
1871 05:05:52.293342 Create SMBIOS type 16
1872 05:05:52.297011 Create SMBIOS type 17
1873 05:05:52.300256 GENERIC: 0.0 (WIFI Device)
1874 05:05:52.303307 SMBIOS tables: 1734 bytes.
1875 05:05:52.307257 Writing table forward entry at 0x00000500
1876 05:05:52.313579 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 05:05:52.316804 Writing coreboot table at 0x76b25000
1878 05:05:52.323109 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 05:05:52.326540 1. 0000000000001000-000000000009ffff: RAM
1880 05:05:52.329873 2. 00000000000a0000-00000000000fffff: RESERVED
1881 05:05:52.336569 3. 0000000000100000-00000000769eefff: RAM
1882 05:05:52.340522 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 05:05:52.346287 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 05:05:52.353397 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 05:05:52.356340 7. 0000000077000000-000000007fbfffff: RESERVED
1886 05:05:52.362940 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 05:05:52.366466 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 05:05:52.369712 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 05:05:52.375986 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 05:05:52.380037 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 05:05:52.386840 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 05:05:52.389833 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 05:05:52.395983 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 05:05:52.399596 16. 0000000100000000-00000004803fffff: RAM
1895 05:05:52.402884 Passing 4 GPIOs to payload:
1896 05:05:52.406016 NAME | PORT | POLARITY | VALUE
1897 05:05:52.412436 lid | undefined | high | high
1898 05:05:52.419393 power | undefined | high | low
1899 05:05:52.422896 oprom | undefined | high | low
1900 05:05:52.429457 EC in RW | 0x000000e5 | high | high
1901 05:05:52.436918 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1902 05:05:52.439048 coreboot table: 1576 bytes.
1903 05:05:52.442066 IMD ROOT 0. 0x76fff000 0x00001000
1904 05:05:52.445642 IMD SMALL 1. 0x76ffe000 0x00001000
1905 05:05:52.449775 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 05:05:52.451802 VPD 3. 0x76c4d000 0x00000367
1907 05:05:52.455481 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 05:05:52.458903 CONSOLE 5. 0x76c2c000 0x00020000
1909 05:05:52.465816 FMAP 6. 0x76c2b000 0x00000578
1910 05:05:52.468462 TIME STAMP 7. 0x76c2a000 0x00000910
1911 05:05:52.472133 VBOOT WORK 8. 0x76c16000 0x00014000
1912 05:05:52.474975 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 05:05:52.478552 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 05:05:52.482039 RAMSTAGE 11. 0x76b97000 0x00073000
1915 05:05:52.485239 REFCODE 12. 0x76b42000 0x00055000
1916 05:05:52.488725 SMM BACKUP 13. 0x76b32000 0x00010000
1917 05:05:52.495418 4f444749 14. 0x76b30000 0x00002000
1918 05:05:52.498261 EXT VBT15. 0x76b2d000 0x0000219f
1919 05:05:52.502173 COREBOOT 16. 0x76b25000 0x00008000
1920 05:05:52.504941 ACPI 17. 0x76b01000 0x00024000
1921 05:05:52.507966 ACPI GNVS 18. 0x76b00000 0x00001000
1922 05:05:52.511344 RAMOOPS 19. 0x76a00000 0x00100000
1923 05:05:52.514872 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 05:05:52.518637 SMBIOS 21. 0x769ef000 0x00000800
1925 05:05:52.521195 IMD small region:
1926 05:05:52.524701 IMD ROOT 0. 0x76ffec00 0x00000400
1927 05:05:52.527595 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 05:05:52.534348 POWER STATE 2. 0x76ffeb80 0x00000044
1929 05:05:52.537975 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 05:05:52.540671 MEM INFO 4. 0x76ffe980 0x000001e0
1931 05:05:52.547999 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1932 05:05:52.550675 MTRR: Physical address space:
1933 05:05:52.554297 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 05:05:52.561529 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 05:05:52.568455 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 05:05:52.574488 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 05:05:52.580768 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 05:05:52.587978 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 05:05:52.594541 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 05:05:52.597248 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 05:05:52.600554 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 05:05:52.603967 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 05:05:52.610732 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 05:05:52.614156 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 05:05:52.616978 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 05:05:52.620125 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 05:05:52.627458 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 05:05:52.630548 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 05:05:52.634212 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 05:05:52.637424 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 05:05:52.641880 call enable_fixed_mtrr()
1952 05:05:52.646109 CPU physical address size: 39 bits
1953 05:05:52.651941 MTRR: default type WB/UC MTRR counts: 6/7.
1954 05:05:52.655277 MTRR: WB selected as default type.
1955 05:05:52.661569 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 05:05:52.665194 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 05:05:52.671636 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 05:05:52.678333 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 05:05:52.685160 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 05:05:52.691729 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 05:05:52.695458
1962 05:05:52.696164 MTRR check
1963 05:05:52.698409 Fixed MTRRs : Enabled
1964 05:05:52.698942 Variable MTRRs: Enabled
1965 05:05:52.699332
1966 05:05:52.704942 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 05:05:52.709671 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 05:05:52.712040 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 05:05:52.714950 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 05:05:52.721486 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 05:05:52.725447 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 05:05:52.728670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 05:05:52.732048 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 05:05:52.738814 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 05:05:52.742056 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 05:05:52.745011 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 05:05:52.752397 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1978 05:05:52.755297 call enable_fixed_mtrr()
1979 05:05:52.759357 Checking cr50 for pending updates
1980 05:05:52.762893 CPU physical address size: 39 bits
1981 05:05:52.766283 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 05:05:52.769793 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 05:05:52.776181 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 05:05:52.780019 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 05:05:52.782903 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 05:05:52.786428 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 05:05:52.791385 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 05:05:52.795995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 05:05:52.799601 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 05:05:52.803247 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 05:05:52.806394 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 05:05:52.812401 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 05:05:52.816010 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 05:05:52.819461 call enable_fixed_mtrr()
1995 05:05:52.822825 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 05:05:52.829333 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 05:05:52.832507 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 05:05:52.835455 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 05:05:52.839166 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 05:05:52.845562 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 05:05:52.848899 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 05:05:52.852191 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 05:05:52.855475 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 05:05:52.860414 CPU physical address size: 39 bits
2005 05:05:52.867146 call enable_fixed_mtrr()
2006 05:05:52.870547 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 05:05:52.873729 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 05:05:52.880371 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 05:05:52.884044 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 05:05:52.886773 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 05:05:52.890131 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 05:05:52.894052 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 05:05:52.900193 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 05:05:52.903379 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 05:05:52.906789 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 05:05:52.910754 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 05:05:52.916478 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 05:05:52.920173 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 05:05:52.926587 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 05:05:52.930680 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 05:05:52.933863 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 05:05:52.936899 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 05:05:52.942874 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 05:05:52.946637 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 05:05:52.949943 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 05:05:52.953803 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 05:05:52.960181 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 05:05:52.962940 call enable_fixed_mtrr()
2029 05:05:52.966734 call enable_fixed_mtrr()
2030 05:05:52.969843 CPU physical address size: 39 bits
2031 05:05:52.973601 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 05:05:52.976769 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 05:05:52.979641 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 05:05:52.986872 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 05:05:52.990629 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 05:05:52.993103 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 05:05:52.995959 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 05:05:53.003464 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 05:05:53.006248 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 05:05:53.009677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 05:05:53.013112 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 05:05:53.016010 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 05:05:53.022384 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 05:05:53.025730 call enable_fixed_mtrr()
2045 05:05:53.029261 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 05:05:53.033086 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 05:05:53.039131 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 05:05:53.042419 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 05:05:53.045527 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 05:05:53.048950 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 05:05:53.055825 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 05:05:53.059008 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 05:05:53.062028 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 05:05:53.066308 CPU physical address size: 39 bits
2055 05:05:53.072749 call enable_fixed_mtrr()
2056 05:05:53.076234 CPU physical address size: 39 bits
2057 05:05:53.080066 CPU physical address size: 39 bits
2058 05:05:53.086390 CPU physical address size: 39 bits
2059 05:05:53.086684 Reading cr50 TPM mode
2060 05:05:53.096753 BS: BS_PAYLOAD_LOAD entry times (exec / console): 332 / 6 ms
2061 05:05:53.107236 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 05:05:53.109892 Checking segment from ROM address 0xffc02b38
2063 05:05:53.113051 Checking segment from ROM address 0xffc02b54
2064 05:05:53.120709 Loading segment from ROM address 0xffc02b38
2065 05:05:53.121007 code (compression=0)
2066 05:05:53.130011 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 05:05:53.139716 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 05:05:53.140108 it's not compressed!
2069 05:05:53.280779 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 05:05:53.287535 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 05:05:53.294342 Loading segment from ROM address 0xffc02b54
2072 05:05:53.297813 Entry Point 0x30000000
2073 05:05:53.298229 Loaded segments
2074 05:05:53.304121 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2075 05:05:53.349449 Finalizing chipset.
2076 05:05:53.352543 Finalizing SMM.
2077 05:05:53.352929 APMC done.
2078 05:05:53.359231 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 05:05:53.362124 mp_park_aps done after 0 msecs.
2080 05:05:53.365246 Jumping to boot code at 0x30000000(0x76b25000)
2081 05:05:53.375280 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 05:05:53.375666
2083 05:05:53.378436
2084 05:05:53.378856
2085 05:05:53.380016 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2086 05:05:53.380480 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2087 05:05:53.380847 Setting prompt string to ['volteer:']
2088 05:05:53.381216 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2089 05:05:53.381953 Starting depthcharge on Voema...
2090 05:05:53.382285
2091 05:05:53.388504 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 05:05:53.388898
2093 05:05:53.395085 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 05:05:53.395471
2095 05:05:53.401820 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 05:05:53.402204
2097 05:05:53.404855 Failed to find eMMC card reader
2098 05:05:53.405238
2099 05:05:53.408665 Wipe memory regions:
2100 05:05:53.409048
2101 05:05:53.412008 [0x00000000001000, 0x000000000a0000)
2102 05:05:53.412298
2103 05:05:53.414924 [0x00000000100000, 0x00000030000000)
2104 05:05:53.449690
2105 05:05:53.453034 [0x00000032662db0, 0x000000769ef000)
2106 05:05:53.500826
2107 05:05:53.503352 [0x00000100000000, 0x00000480400000)
2108 05:05:54.146565
2109 05:05:54.148966 ec_init: CrosEC protocol v3 supported (256, 256)
2110 05:05:54.579941
2111 05:05:54.580093 R8152: Initializing
2112 05:05:54.580162
2113 05:05:54.584425 Version 6 (ocp_data = 5c30)
2114 05:05:54.584507
2115 05:05:54.586608 R8152: Done initializing
2116 05:05:54.586688
2117 05:05:54.589649 Adding net device
2118 05:05:54.891118
2119 05:05:54.894832 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 05:05:54.894920
2121 05:05:54.894983
2122 05:05:54.895042
2123 05:05:54.897726 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 05:05:54.998094 volteer: tftpboot 192.168.201.1 12711602/tftp-deploy-_3jo2s09/kernel/bzImage 12711602/tftp-deploy-_3jo2s09/kernel/cmdline 12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
2126 05:05:54.998265 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 05:05:54.998377 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 05:05:55.002240 tftpboot 192.168.201.1 12711602/tftp-deploy-_3jo2s09/kernel/bzIploy-_3jo2s09/kernel/cmdline 12711602/tftp-deploy-_3jo2s09/ramdisk/ramdisk.cpio.gz
2129 05:05:55.002323
2130 05:05:55.002386 Waiting for link
2131 05:05:55.205486
2132 05:05:55.205623 done.
2133 05:05:55.205691
2134 05:05:55.205752 MAC: 00:24:32:30:7d:ab
2135 05:05:55.205812
2136 05:05:55.208833 Sending DHCP discover... done.
2137 05:05:55.208917
2138 05:05:55.212575 Waiting for reply... done.
2139 05:05:55.212665
2140 05:05:55.216900 Sending DHCP request... done.
2141 05:05:55.216982
2142 05:05:55.222404 Waiting for reply... done.
2143 05:05:55.222486
2144 05:05:55.222551 My ip is 192.168.201.20
2145 05:05:55.222615
2146 05:05:55.225841 The DHCP server ip is 192.168.201.1
2147 05:05:55.228889
2148 05:05:55.232157 TFTP server IP predefined by user: 192.168.201.1
2149 05:05:55.232240
2150 05:05:55.238584 Bootfile predefined by user: 12711602/tftp-deploy-_3jo2s09/kernel/bzImage
2151 05:05:55.238667
2152 05:05:55.241832 Sending tftp read request... done.
2153 05:05:55.241913
2154 05:05:55.248486 Waiting for the transfer...
2155 05:05:55.248570
2156 05:05:55.827099 00000000 ################################################################
2157 05:05:55.827245
2158 05:05:56.422067 00080000 ################################################################
2159 05:05:56.422213
2160 05:05:57.015509 00100000 ################################################################
2161 05:05:57.015657
2162 05:05:57.605206 00180000 ################################################################
2163 05:05:57.605360
2164 05:05:58.190162 00200000 ################################################################
2165 05:05:58.190308
2166 05:05:58.783925 00280000 ################################################################
2167 05:05:58.784075
2168 05:05:59.372695 00300000 ################################################################
2169 05:05:59.372843
2170 05:05:59.952633 00380000 ################################################################
2171 05:05:59.952780
2172 05:06:00.532051 00400000 ################################################################
2173 05:06:00.532192
2174 05:06:01.118470 00480000 ################################################################
2175 05:06:01.118618
2176 05:06:01.701079 00500000 ################################################################
2177 05:06:01.701218
2178 05:06:02.271999 00580000 ################################################################
2179 05:06:02.272153
2180 05:06:02.863226 00600000 ################################################################
2181 05:06:02.863375
2182 05:06:03.452409 00680000 ################################################################
2183 05:06:03.452845
2184 05:06:04.150737 00700000 ################################################################
2185 05:06:04.151216
2186 05:06:04.847832 00780000 ################################################################
2187 05:06:04.848484
2188 05:06:05.106169 00800000 ####################### done.
2189 05:06:05.106696
2190 05:06:05.109681 The bootfile was 8576912 bytes long.
2191 05:06:05.110260
2192 05:06:05.112369 Sending tftp read request... done.
2193 05:06:05.112787
2194 05:06:05.115809 Waiting for the transfer...
2195 05:06:05.116222
2196 05:06:05.824202 00000000 ################################################################
2197 05:06:05.824714
2198 05:06:06.532368 00080000 ################################################################
2199 05:06:06.532892
2200 05:06:07.236770 00100000 ################################################################
2201 05:06:07.237277
2202 05:06:07.934551 00180000 ################################################################
2203 05:06:07.935080
2204 05:06:08.517461 00200000 ################################################################
2205 05:06:08.517601
2206 05:06:09.200473 00280000 ################################################################
2207 05:06:09.201013
2208 05:06:09.915846 00300000 ################################################################
2209 05:06:09.916411
2210 05:06:10.636378 00380000 ################################################################
2211 05:06:10.636926
2212 05:06:11.349369 00400000 ################################################################
2213 05:06:11.349935
2214 05:06:12.069619 00480000 ################################################################
2215 05:06:12.070255
2216 05:06:12.788493 00500000 ################################################################
2217 05:06:12.789075
2218 05:06:13.500263 00580000 ################################################################
2219 05:06:13.500836
2220 05:06:14.211809 00600000 ################################################################
2221 05:06:14.212312
2222 05:06:14.902238 00680000 ################################################################
2223 05:06:14.902912
2224 05:06:15.579058 00700000 ################################################################
2225 05:06:15.579577
2226 05:06:16.257933 00780000 ################################################################
2227 05:06:16.258438
2228 05:06:16.834052 00800000 ####################################################### done.
2229 05:06:16.834717
2230 05:06:16.836785 Sending tftp read request... done.
2231 05:06:16.837426
2232 05:06:16.840979 Waiting for the transfer...
2233 05:06:16.841550
2234 05:06:16.842102 00000000 # done.
2235 05:06:16.843335
2236 05:06:16.849919 Command line loaded dynamically from TFTP file: 12711602/tftp-deploy-_3jo2s09/kernel/cmdline
2237 05:06:16.850473
2238 05:06:16.866457 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2239 05:06:16.870789
2240 05:06:16.874302 Shutting down all USB controllers.
2241 05:06:16.874922
2242 05:06:16.875477 Removing current net device
2243 05:06:16.876013
2244 05:06:16.877907 Finalizing coreboot
2245 05:06:16.878446
2246 05:06:16.884138 Exiting depthcharge with code 4 at timestamp: 32079874
2247 05:06:16.884563
2248 05:06:16.884901
2249 05:06:16.885219 Starting kernel ...
2250 05:06:16.885522
2251 05:06:16.886923 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2252 05:06:16.887419 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2253 05:06:16.887824 Setting prompt string to ['Linux version [0-9]']
2254 05:06:16.888173 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2255 05:06:16.888515 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 05:06:16.889319
2258 05:10:37.888382 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2260 05:10:37.889854 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2262 05:10:37.890772 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2265 05:10:37.892290 end: 2 depthcharge-action (duration 00:05:00) [common]
2267 05:10:37.893139 Cleaning after the job
2268 05:10:37.893228 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/ramdisk
2269 05:10:37.894477 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/kernel
2270 05:10:37.895937 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711602/tftp-deploy-_3jo2s09/modules
2271 05:10:37.896281 start: 5.1 power-off (timeout 00:00:30) [common]
2272 05:10:37.896436 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2273 05:10:37.977838 >> Command sent successfully.
2274 05:10:37.984218 Returned 0 in 0 seconds
2275 05:10:38.085250 end: 5.1 power-off (duration 00:00:00) [common]
2277 05:10:38.087162 start: 5.2 read-feedback (timeout 00:10:00) [common]
2278 05:10:38.088429 Listened to connection for namespace 'common' for up to 1s
2279 05:10:39.089187 Finalising connection for namespace 'common'
2280 05:10:39.089904 Disconnecting from shell: Finalise
2281 05:10:39.090336
2282 05:10:39.191377 end: 5.2 read-feedback (duration 00:00:01) [common]
2283 05:10:39.192132 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12711602
2284 05:10:39.211907 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12711602
2285 05:10:39.212044 JobError: Your job cannot terminate cleanly.