Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 19:42:30.656923 lava-dispatcher, installed at version: 2024.01
2 19:42:30.657085 start: 0 validate
3 19:42:30.657196 Start time: 2024-02-07 19:42:30.657189+00:00 (UTC)
4 19:42:30.657299 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:42:30.657409 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 19:42:30.927657 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:42:30.928270 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1251-g681701bd9bc1f%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 19:42:31.203654 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:42:31.204248 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1251-g681701bd9bc1f%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 19:42:34.867885 validate duration: 4.21
12 19:42:34.868150 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 19:42:34.868254 start: 1.1 download-retry (timeout 00:10:00) [common]
14 19:42:34.868339 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 19:42:34.868463 Not decompressing ramdisk as can be used compressed.
16 19:42:34.868545 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 19:42:34.868603 saving as /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/ramdisk/rootfs.cpio.gz
18 19:42:34.868656 total size: 8418130 (8 MB)
19 19:42:35.379605 progress 0 % (0 MB)
20 19:42:35.387684 progress 5 % (0 MB)
21 19:42:35.394730 progress 10 % (0 MB)
22 19:42:35.399371 progress 15 % (1 MB)
23 19:42:35.402322 progress 20 % (1 MB)
24 19:42:35.404449 progress 25 % (2 MB)
25 19:42:35.406165 progress 30 % (2 MB)
26 19:42:35.407619 progress 35 % (2 MB)
27 19:42:35.409159 progress 40 % (3 MB)
28 19:42:35.410688 progress 45 % (3 MB)
29 19:42:35.412218 progress 50 % (4 MB)
30 19:42:35.413774 progress 55 % (4 MB)
31 19:42:35.415325 progress 60 % (4 MB)
32 19:42:35.416762 progress 65 % (5 MB)
33 19:42:35.418327 progress 70 % (5 MB)
34 19:42:35.419817 progress 75 % (6 MB)
35 19:42:35.421320 progress 80 % (6 MB)
36 19:42:35.422816 progress 85 % (6 MB)
37 19:42:35.424305 progress 90 % (7 MB)
38 19:42:35.425800 progress 95 % (7 MB)
39 19:42:35.427317 progress 100 % (8 MB)
40 19:42:35.427512 8 MB downloaded in 0.56 s (14.37 MB/s)
41 19:42:35.427668 end: 1.1.1 http-download (duration 00:00:01) [common]
43 19:42:35.427925 end: 1.1 download-retry (duration 00:00:01) [common]
44 19:42:35.428027 start: 1.2 download-retry (timeout 00:09:59) [common]
45 19:42:35.428095 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 19:42:35.428219 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1251-g681701bd9bc1f/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 19:42:35.428284 saving as /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/kernel/bzImage
48 19:42:35.428333 total size: 8576912 (8 MB)
49 19:42:35.428384 No compression specified
50 19:42:35.429424 progress 0 % (0 MB)
51 19:42:35.431100 progress 5 % (0 MB)
52 19:42:35.432651 progress 10 % (0 MB)
53 19:42:35.434248 progress 15 % (1 MB)
54 19:42:35.435776 progress 20 % (1 MB)
55 19:42:35.437351 progress 25 % (2 MB)
56 19:42:35.438888 progress 30 % (2 MB)
57 19:42:35.440413 progress 35 % (2 MB)
58 19:42:35.441982 progress 40 % (3 MB)
59 19:42:35.443573 progress 45 % (3 MB)
60 19:42:35.445161 progress 50 % (4 MB)
61 19:42:35.446684 progress 55 % (4 MB)
62 19:42:35.448332 progress 60 % (4 MB)
63 19:42:35.449892 progress 65 % (5 MB)
64 19:42:35.451391 progress 70 % (5 MB)
65 19:42:35.452922 progress 75 % (6 MB)
66 19:42:35.454525 progress 80 % (6 MB)
67 19:42:35.456033 progress 85 % (6 MB)
68 19:42:35.457607 progress 90 % (7 MB)
69 19:42:35.459109 progress 95 % (7 MB)
70 19:42:35.460621 progress 100 % (8 MB)
71 19:42:35.460780 8 MB downloaded in 0.03 s (252.12 MB/s)
72 19:42:35.460904 end: 1.2.1 http-download (duration 00:00:00) [common]
74 19:42:35.461094 end: 1.2 download-retry (duration 00:00:00) [common]
75 19:42:35.461165 start: 1.3 download-retry (timeout 00:09:59) [common]
76 19:42:35.461229 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 19:42:35.461339 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1251-g681701bd9bc1f/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 19:42:35.461396 saving as /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/modules/modules.tar
79 19:42:35.461443 total size: 250912 (0 MB)
80 19:42:35.461507 Using unxz to decompress xz
81 19:42:35.465027 progress 13 % (0 MB)
82 19:42:35.465335 progress 26 % (0 MB)
83 19:42:35.465535 progress 39 % (0 MB)
84 19:42:35.467162 progress 52 % (0 MB)
85 19:42:35.468741 progress 65 % (0 MB)
86 19:42:35.470439 progress 78 % (0 MB)
87 19:42:35.471952 progress 91 % (0 MB)
88 19:42:35.473760 progress 100 % (0 MB)
89 19:42:35.478510 0 MB downloaded in 0.02 s (14.03 MB/s)
90 19:42:35.478744 end: 1.3.1 http-download (duration 00:00:00) [common]
92 19:42:35.479016 end: 1.3 download-retry (duration 00:00:00) [common]
93 19:42:35.479106 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 19:42:35.479212 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 19:42:35.479338 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 19:42:35.479425 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 19:42:35.479601 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3
98 19:42:35.479708 makedir: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin
99 19:42:35.479793 makedir: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/tests
100 19:42:35.479873 makedir: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/results
101 19:42:35.479965 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-add-keys
102 19:42:35.480082 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-add-sources
103 19:42:35.480188 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-background-process-start
104 19:42:35.480295 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-background-process-stop
105 19:42:35.480398 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-common-functions
106 19:42:35.480498 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-echo-ipv4
107 19:42:35.480595 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-install-packages
108 19:42:35.480693 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-installed-packages
109 19:42:35.480813 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-os-build
110 19:42:35.480922 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-probe-channel
111 19:42:35.481015 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-probe-ip
112 19:42:35.481108 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-target-ip
113 19:42:35.481202 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-target-mac
114 19:42:35.481295 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-target-storage
115 19:42:35.481393 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-case
116 19:42:35.481489 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-event
117 19:42:35.481582 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-feedback
118 19:42:35.481675 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-raise
119 19:42:35.481770 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-reference
120 19:42:35.481866 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-runner
121 19:42:35.481958 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-set
122 19:42:35.482052 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-test-shell
123 19:42:35.482149 Updating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-install-packages (oe)
124 19:42:35.482270 Updating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/bin/lava-installed-packages (oe)
125 19:42:35.482369 Creating /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/environment
126 19:42:35.482452 LAVA metadata
127 19:42:35.482513 - LAVA_JOB_ID=12714060
128 19:42:35.482566 - LAVA_DISPATCHER_IP=192.168.201.1
129 19:42:35.482647 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 19:42:35.482703 skipped lava-vland-overlay
131 19:42:35.482764 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 19:42:35.482827 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 19:42:35.482878 skipped lava-multinode-overlay
134 19:42:35.482934 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 19:42:35.482996 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 19:42:35.483054 Loading test definitions
137 19:42:35.483137 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 19:42:35.483199 Using /lava-12714060 at stage 0
139 19:42:35.483441 uuid=12714060_1.4.2.3.1 testdef=None
140 19:42:35.483516 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 19:42:35.483585 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 19:42:35.484001 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 19:42:35.484183 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 19:42:35.484679 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 19:42:35.484895 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 19:42:35.485398 runner path: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/0/tests/0_dmesg test_uuid 12714060_1.4.2.3.1
149 19:42:35.485523 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 19:42:35.485709 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 19:42:35.485764 Using /lava-12714060 at stage 1
153 19:42:35.485990 uuid=12714060_1.4.2.3.5 testdef=None
154 19:42:35.486060 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 19:42:35.486123 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 19:42:35.486478 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 19:42:35.486649 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 19:42:35.487164 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 19:42:35.487347 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 19:42:35.487820 runner path: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/1/tests/1_bootrr test_uuid 12714060_1.4.2.3.5
163 19:42:35.487937 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 19:42:35.488100 Creating lava-test-runner.conf files
166 19:42:35.488148 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/0 for stage 0
167 19:42:35.488216 - 0_dmesg
168 19:42:35.488279 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12714060/lava-overlay-cdzgaxk3/lava-12714060/1 for stage 1
169 19:42:35.488349 - 1_bootrr
170 19:42:35.488424 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 19:42:35.488490 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 19:42:35.494724 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 19:42:35.494818 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 19:42:35.494891 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 19:42:35.494959 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 19:42:35.495026 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 19:42:35.660297 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 19:42:35.660570 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 19:42:35.660666 extracting modules file /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12714060/extract-overlay-ramdisk-ua4s1gal/ramdisk
180 19:42:35.669549 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 19:42:35.669664 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 19:42:35.669740 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12714060/compress-overlay-1ozzc397/overlay-1.4.2.4.tar.gz to ramdisk
183 19:42:35.669796 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12714060/compress-overlay-1ozzc397/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12714060/extract-overlay-ramdisk-ua4s1gal/ramdisk
184 19:42:35.675658 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 19:42:35.675756 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 19:42:35.675831 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 19:42:35.675905 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 19:42:35.675967 Building ramdisk /var/lib/lava/dispatcher/tmp/12714060/extract-overlay-ramdisk-ua4s1gal/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12714060/extract-overlay-ramdisk-ua4s1gal/ramdisk
189 19:42:35.742083 >> 49790 blocks
190 19:42:36.472940 rename /var/lib/lava/dispatcher/tmp/12714060/extract-overlay-ramdisk-ua4s1gal/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
191 19:42:36.473318 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 19:42:36.473443 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 19:42:36.473571 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 19:42:36.473667 No mkimage arch provided, not using FIT.
195 19:42:36.473763 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 19:42:36.473842 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 19:42:36.473932 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 19:42:36.474025 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 19:42:36.474102 No LXC device requested
200 19:42:36.474194 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 19:42:36.474262 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 19:42:36.474327 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 19:42:36.474386 Checking files for TFTP limit of 4294967296 bytes.
204 19:42:36.474710 end: 1 tftp-deploy (duration 00:00:02) [common]
205 19:42:36.474798 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 19:42:36.474886 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 19:42:36.474979 substitutions:
208 19:42:36.475034 - {DTB}: None
209 19:42:36.475084 - {INITRD}: 12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
210 19:42:36.475130 - {KERNEL}: 12714060/tftp-deploy-6kd64ygl/kernel/bzImage
211 19:42:36.475174 - {LAVA_MAC}: None
212 19:42:36.475218 - {PRESEED_CONFIG}: None
213 19:42:36.475262 - {PRESEED_LOCAL}: None
214 19:42:36.475306 - {RAMDISK}: 12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
215 19:42:36.475351 - {ROOT_PART}: None
216 19:42:36.475395 - {ROOT}: None
217 19:42:36.475438 - {SERVER_IP}: 192.168.201.1
218 19:42:36.475482 - {TEE}: None
219 19:42:36.475525 Parsed boot commands:
220 19:42:36.475568 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 19:42:36.475708 Parsed boot commands: tftpboot 192.168.201.1 12714060/tftp-deploy-6kd64ygl/kernel/bzImage 12714060/tftp-deploy-6kd64ygl/kernel/cmdline 12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
222 19:42:36.475783 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 19:42:36.475853 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 19:42:36.475926 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 19:42:36.475995 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 19:42:36.476050 Not connected, no need to disconnect.
227 19:42:36.476114 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 19:42:36.476261 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 19:42:36.476316 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
230 19:42:36.479105 Setting prompt string to ['lava-test: # ']
231 19:42:36.479348 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 19:42:36.479444 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 19:42:36.479522 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 19:42:36.479592 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 19:42:36.479749 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
236 19:42:41.624043 >> Command sent successfully.
237 19:42:41.630135 Returned 0 in 5 seconds
238 19:42:41.730870 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 19:42:41.732167 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 19:42:41.732554 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 19:42:41.732926 Setting prompt string to 'Starting depthcharge on Volmar...'
243 19:42:41.733203 Changing prompt to 'Starting depthcharge on Volmar...'
244 19:42:41.733470 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 19:42:41.734333 [Enter `^Ec?' for help]
246 19:42:43.101802
247 19:42:43.102319
248 19:42:43.108622 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 19:42:43.112077 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 19:42:43.119425 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 19:42:43.123355 CPU: AES supported, TXT NOT supported, VT supported
252 19:42:43.130521 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 19:42:43.134440 Cache size = 10 MiB
254 19:42:43.138219 MCH: device id 4609 (rev 04) is Alderlake-P
255 19:42:43.141906 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 19:42:43.145304 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 19:42:43.148666 VBOOT: Loading verstage.
258 19:42:43.156344 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 19:42:43.159472 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 19:42:43.162571 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 19:42:43.173431 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 19:42:43.179918 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 19:42:43.180361
264 19:42:43.180611
265 19:42:43.189717 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 19:42:43.197260 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 19:42:43.200530 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 19:42:43.200962 done! DID_VID 0x00281ae0
269 19:42:43.203893 TPM ready after 0 ms
270 19:42:43.208098 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 19:42:43.221485 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
272 19:42:43.227837 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 19:42:43.285549 tlcl_send_startup: Startup return code is 0
274 19:42:43.286032 TPM: setup succeeded
275 19:42:43.307407 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 19:42:43.329257 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 19:42:43.333262 Chrome EC: UHEPI supported
278 19:42:43.336546 Reading cr50 boot mode
279 19:42:43.351128 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 19:42:43.351628 Phase 1
281 19:42:43.357350 FMAP: area GBB found @ 1805000 (458752 bytes)
282 19:42:43.364666 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 19:42:43.371808 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 19:42:43.378752 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 19:42:43.379233 Phase 2
286 19:42:43.379515 Phase 3
287 19:42:43.385884 FMAP: area GBB found @ 1805000 (458752 bytes)
288 19:42:43.389461 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 19:42:43.396343 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
290 19:42:43.399444 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 19:42:43.409969 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 19:42:43.415970 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 19:42:43.423004 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 19:42:43.436940 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
295 19:42:43.440684 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 19:42:43.444580 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 19:42:43.451516 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 19:42:43.458279 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 19:42:43.464243 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 19:42:43.470033 Phase 4
301 19:42:43.472891 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
302 19:42:43.480251 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 19:42:43.692047 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 19:42:43.698922 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 19:42:43.702331 Saving vboot hash.
306 19:42:43.708910 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 19:42:43.724653 tlcl_extend: response is 0
308 19:42:43.731245 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 19:42:43.737628 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 19:42:43.752325 tlcl_extend: response is 0
311 19:42:43.758679 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 19:42:43.781821 tlcl_lock_nv_write: response is 0
313 19:42:43.800831 tlcl_lock_nv_write: response is 0
314 19:42:43.801286 Slot A is selected
315 19:42:43.807891 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
316 19:42:43.814591 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
317 19:42:43.820994 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
318 19:42:43.827764 BS: verstage times (exec / console): total (unknown) / 256 ms
319 19:42:43.828290
320 19:42:43.828579
321 19:42:43.834701 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
322 19:42:43.839720 Google Chrome EC: version:
323 19:42:43.843508 ro: volmar_v2.0.14126-e605144e9c
324 19:42:43.846453 rw: volmar_v0.0.55-22d1557
325 19:42:43.850047 running image: 2
326 19:42:43.852847 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
327 19:42:43.862793 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 19:42:43.869488 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 19:42:43.876102 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
330 19:42:43.886255 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 19:42:43.896452 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
332 19:42:43.899470 EC took 981us to calculate image hash
333 19:42:43.909347 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 19:42:43.915673 VB2:sync_ec() select_rw=RW(active)
335 19:42:43.924509 Waited 269us to clear limit power flag.
336 19:42:43.927854 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 19:42:43.931397 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 19:42:43.934515 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 19:42:43.941261 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
340 19:42:43.944844 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
341 19:42:43.947727 TCO_STS: 0000 0000
342 19:42:43.948252 GEN_PMCON: d0015038 00002200
343 19:42:43.951516 GBLRST_CAUSE: 00000000 00000000
344 19:42:43.954792 HPR_CAUSE0: 00000000
345 19:42:43.957652 prev_sleep_state 5
346 19:42:43.960889 Abort disabling TXT, as CPU is not TXT capable.
347 19:42:43.969837 cse_lite: Number of partitions = 3
348 19:42:43.971582 cse_lite: Current partition = RO
349 19:42:43.971978 cse_lite: Next partition = RO
350 19:42:43.975287 cse_lite: Flags = 0x7
351 19:42:43.981894 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
352 19:42:43.991989 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
353 19:42:43.995781 FMAP: area SI_ME found @ 1000 (5238784 bytes)
354 19:42:44.001968 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
355 19:42:44.008315 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
356 19:42:44.015239 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
357 19:42:44.018752 cse_lite: CSE CBFS RW version : 16.1.25.2049
358 19:42:44.025398 cse_lite: Set Boot Partition Info Command (RW)
359 19:42:44.028191 HECI: Global Reset(Type:1) Command
360 19:42:45.439091
361 19:42:45.439597
362 19:42:45.445607 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
363 19:42:45.450045 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
364 19:42:45.456348 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
365 19:42:45.459670 CPU: AES supported, TXT NOT supported, VT supported
366 19:42:45.469573 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
367 19:42:45.470132 Cache size = 10 MiB
368 19:42:45.476390 MCH: device id 4609 (rev 04) is Alderlake-P
369 19:42:45.479633 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
370 19:42:45.482753 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
371 19:42:45.486699 VBOOT: Loading verstage.
372 19:42:45.493918 FMAP: Found "FLASH" version 1.1 at 0x1804000.
373 19:42:45.497623 FMAP: base = 0x0 size = 0x2000000 #areas = 37
374 19:42:45.501015 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
375 19:42:45.511784 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
376 19:42:45.518427 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
377 19:42:45.518943
378 19:42:45.519228
379 19:42:45.527923 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
380 19:42:45.534238 Probing TPM I2C: I2C bus 1 version 0x3230302a
381 19:42:45.537988 DW I2C bus 1 at 0xfe022000 (400 KHz)
382 19:42:45.541383 done! DID_VID 0x00281ae0
383 19:42:45.541895 TPM ready after 0 ms
384 19:42:45.545396 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
385 19:42:45.560208 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
386 19:42:45.563036 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
387 19:42:45.624661 tlcl_send_startup: Startup return code is 0
388 19:42:45.625167 TPM: setup succeeded
389 19:42:45.646053 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
390 19:42:45.667132 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
391 19:42:45.670904 Chrome EC: UHEPI supported
392 19:42:45.674076 Reading cr50 boot mode
393 19:42:45.688569 Cr50 says boot_mode is VERIFIED_RW(0x00).
394 19:42:45.689130 Phase 1
395 19:42:45.694936 FMAP: area GBB found @ 1805000 (458752 bytes)
396 19:42:45.702116 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 19:42:45.708628 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 19:42:45.715561 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 19:42:45.718928 Phase 2
400 19:42:45.719463 Phase 3
401 19:42:45.722074 FMAP: area GBB found @ 1805000 (458752 bytes)
402 19:42:45.729082 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
403 19:42:45.732583 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 19:42:45.738745 VB2:vb2_verify_keyblock() Checking keyblock signature...
405 19:42:45.745475 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
406 19:42:45.752028 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
407 19:42:45.761956 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
408 19:42:45.773971 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 19:42:45.777407 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 19:42:45.783796 VB2:vb2_verify_fw_preamble() Verifying preamble.
411 19:42:45.791113 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
412 19:42:45.797092 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
413 19:42:45.803473 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
414 19:42:45.807974 Phase 4
415 19:42:45.811379 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
416 19:42:45.817752 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
417 19:42:46.030248 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
418 19:42:46.036724 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
419 19:42:46.040163 Saving vboot hash.
420 19:42:46.046693 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
421 19:42:46.062738 tlcl_extend: response is 0
422 19:42:46.069767 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
423 19:42:46.075891 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
424 19:42:46.090176 tlcl_extend: response is 0
425 19:42:46.097130 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
426 19:42:46.116887 tlcl_lock_nv_write: response is 0
427 19:42:46.136469 tlcl_lock_nv_write: response is 0
428 19:42:46.136993 Slot A is selected
429 19:42:46.142699 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
430 19:42:46.150083 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
431 19:42:46.155914 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
432 19:42:46.162881 BS: verstage times (exec / console): total (unknown) / 256 ms
433 19:42:46.163382
434 19:42:46.163671
435 19:42:46.169513 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
436 19:42:46.172857 Google Chrome EC: version:
437 19:42:46.176385 ro: volmar_v2.0.14126-e605144e9c
438 19:42:46.179854 rw: volmar_v0.0.55-22d1557
439 19:42:46.183221 running image: 2
440 19:42:46.186614 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
441 19:42:46.196767 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
442 19:42:46.204098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
443 19:42:46.209516 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
444 19:42:46.219674 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
445 19:42:46.229725 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
446 19:42:46.232801 EC took 941us to calculate image hash
447 19:42:46.243002 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
448 19:42:46.246929 VB2:sync_ec() select_rw=RW(active)
449 19:42:46.262953 Waited 270us to clear limit power flag.
450 19:42:46.265953 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
451 19:42:46.269581 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
452 19:42:46.272912 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
453 19:42:46.279706 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
454 19:42:46.282855 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
455 19:42:46.286190 TCO_STS: 0000 0000
456 19:42:46.286578 GEN_PMCON: d1001038 00002200
457 19:42:46.289413 GBLRST_CAUSE: 00000040 00000000
458 19:42:46.292357 HPR_CAUSE0: 00000000
459 19:42:46.295784 prev_sleep_state 5
460 19:42:46.299761 Abort disabling TXT, as CPU is not TXT capable.
461 19:42:46.308017 cse_lite: Number of partitions = 3
462 19:42:46.310971 cse_lite: Current partition = RW
463 19:42:46.311469 cse_lite: Next partition = RW
464 19:42:46.313925 cse_lite: Flags = 0x7
465 19:42:46.320589 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
466 19:42:46.331615 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
467 19:42:46.333824 FMAP: area SI_ME found @ 1000 (5238784 bytes)
468 19:42:46.340854 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
469 19:42:46.347038 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
470 19:42:46.353771 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
471 19:42:46.356863 cse_lite: CSE CBFS RW version : 16.1.25.2049
472 19:42:46.360407 Boot Count incremented to 4257
473 19:42:46.367209 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
474 19:42:46.373980 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
475 19:42:46.386685 Probing TPM I2C: done! DID_VID 0x00281ae0
476 19:42:46.390399 Locality already claimed
477 19:42:46.393100 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
478 19:42:46.412737 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
479 19:42:46.419856 MRC: Hash idx 0x100d comparison successful.
480 19:42:46.423159 MRC cache found, size f6c8
481 19:42:46.423659 bootmode is set to: 2
482 19:42:46.426443 EC returned error result code 3
483 19:42:46.429877 FW_CONFIG value from CBI is 0x131
484 19:42:46.436021 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
485 19:42:46.440062 SPD index = 0
486 19:42:46.446640 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
487 19:42:46.447141 SPD: module type is LPDDR4X
488 19:42:46.453187 SPD: module part number is K4U6E3S4AB-MGCL
489 19:42:46.460315 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
490 19:42:46.463588 SPD: device width 16 bits, bus width 16 bits
491 19:42:46.466901 SPD: module size is 1024 MB (per channel)
492 19:42:46.535490 CBMEM:
493 19:42:46.538852 IMD: root @ 0x76fff000 254 entries.
494 19:42:46.542459 IMD: root @ 0x76ffec00 62 entries.
495 19:42:46.550066 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
496 19:42:46.553184 RO_VPD is uninitialized or empty.
497 19:42:46.556895 FMAP: area RW_VPD found @ f29000 (8192 bytes)
498 19:42:46.563286 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
499 19:42:46.566190 External stage cache:
500 19:42:46.570158 IMD: root @ 0x7bbff000 254 entries.
501 19:42:46.573520 IMD: root @ 0x7bbfec00 62 entries.
502 19:42:46.580096 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
503 19:42:46.587209 MRC: Checking cached data update for 'RW_MRC_CACHE'.
504 19:42:46.590435 MRC: 'RW_MRC_CACHE' does not need update.
505 19:42:46.590897 8 DIMMs found
506 19:42:46.593605 SMM Memory Map
507 19:42:46.596882 SMRAM : 0x7b800000 0x800000
508 19:42:46.599993 Subregion 0: 0x7b800000 0x200000
509 19:42:46.603610 Subregion 1: 0x7ba00000 0x200000
510 19:42:46.606807 Subregion 2: 0x7bc00000 0x400000
511 19:42:46.610188 top_of_ram = 0x77000000
512 19:42:46.613542 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
513 19:42:46.619892 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
514 19:42:46.626687 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
515 19:42:46.629916 MTRR Range: Start=ff000000 End=0 (Size 1000000)
516 19:42:46.630412 Normal boot
517 19:42:46.640034 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
518 19:42:46.646766 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
519 19:42:46.652903 Processing 237 relocs. Offset value of 0x74ab9000
520 19:42:46.661229 BS: romstage times (exec / console): total (unknown) / 377 ms
521 19:42:46.669155
522 19:42:46.669666
523 19:42:46.675606 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
524 19:42:46.676075 Normal boot
525 19:42:46.682442 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
526 19:42:46.688916 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
527 19:42:46.695685 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
528 19:42:46.705229 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
529 19:42:46.753753 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
530 19:42:46.760238 Processing 5931 relocs. Offset value of 0x72a2f000
531 19:42:46.764028 BS: postcar times (exec / console): total (unknown) / 51 ms
532 19:42:46.766798
533 19:42:46.767184
534 19:42:46.774387 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
535 19:42:46.776846 Reserving BERT start 76a1e000, size 10000
536 19:42:46.779781 Normal boot
537 19:42:46.784073 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
538 19:42:46.790261 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
539 19:42:46.800471 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
540 19:42:46.803459 FMAP: area RW_VPD found @ f29000 (8192 bytes)
541 19:42:46.806789 Google Chrome EC: version:
542 19:42:46.810310 ro: volmar_v2.0.14126-e605144e9c
543 19:42:46.813691 rw: volmar_v0.0.55-22d1557
544 19:42:46.816445 running image: 2
545 19:42:46.820933 ACPI _SWS is PM1 Index 8 GPE Index -1
546 19:42:46.824235 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
547 19:42:46.827663 EC returned error result code 3
548 19:42:46.831497 FW_CONFIG value from CBI is 0x131
549 19:42:46.837423 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
550 19:42:46.841281 PCI: 00:1c.2 disabled by fw_config
551 19:42:46.847773 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
552 19:42:46.851179 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
553 19:42:46.857989 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
554 19:42:46.861400 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
555 19:42:46.867600 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
556 19:42:46.874154 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
557 19:42:46.880427 microcode: sig=0x906a4 pf=0x80 revision=0x423
558 19:42:46.884127 microcode: Update skipped, already up-to-date
559 19:42:46.891538 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
560 19:42:46.923009 Detected 6 core, 8 thread CPU.
561 19:42:46.927176 Setting up SMI for CPU
562 19:42:46.929910 IED base = 0x7bc00000
563 19:42:46.930313 IED size = 0x00400000
564 19:42:46.933383 Will perform SMM setup.
565 19:42:46.936698 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
566 19:42:46.939775 LAPIC 0x0 in XAPIC mode.
567 19:42:46.949779 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
568 19:42:46.952632 Processing 18 relocs. Offset value of 0x00030000
569 19:42:46.957483 Attempting to start 7 APs
570 19:42:46.960291 Waiting for 10ms after sending INIT.
571 19:42:46.974114 Waiting for SIPI to complete...
572 19:42:46.977496 done.
573 19:42:46.977960 LAPIC 0x14 in XAPIC mode.
574 19:42:46.980455 LAPIC 0x1 in XAPIC mode.
575 19:42:46.987038 AP: slot 2 apic_id 14, MCU rev: 0x00000423
576 19:42:46.990429 AP: slot 5 apic_id 1, MCU rev: 0x00000423
577 19:42:46.993932 Waiting for SIPI to complete...
578 19:42:46.994402 done.
579 19:42:46.996902 LAPIC 0x12 in XAPIC mode.
580 19:42:47.000640 LAPIC 0x16 in XAPIC mode.
581 19:42:47.001161 LAPIC 0x10 in XAPIC mode.
582 19:42:47.007485 AP: slot 1 apic_id 12, MCU rev: 0x00000423
583 19:42:47.007957 LAPIC 0x8 in XAPIC mode.
584 19:42:47.013586 AP: slot 3 apic_id 16, MCU rev: 0x00000423
585 19:42:47.017293 AP: slot 4 apic_id 10, MCU rev: 0x00000423
586 19:42:47.020237 LAPIC 0x9 in XAPIC mode.
587 19:42:47.023259 AP: slot 6 apic_id 8, MCU rev: 0x00000423
588 19:42:47.027502 AP: slot 7 apic_id 9, MCU rev: 0x00000423
589 19:42:47.030402 smm_setup_relocation_handler: enter
590 19:42:47.033508 smm_setup_relocation_handler: exit
591 19:42:47.044171 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
592 19:42:47.047166 Processing 11 relocs. Offset value of 0x00038000
593 19:42:47.053441 smm_module_setup_stub: stack_top = 0x7b804000
594 19:42:47.056927 smm_module_setup_stub: per cpu stack_size = 0x800
595 19:42:47.063913 smm_module_setup_stub: runtime.start32_offset = 0x4c
596 19:42:47.067346 smm_module_setup_stub: runtime.smm_size = 0x10000
597 19:42:47.074333 SMM Module: stub loaded at 38000. Will call 0x76a52094
598 19:42:47.077139 Installing permanent SMM handler to 0x7b800000
599 19:42:47.083548 smm_load_module: total_smm_space_needed e468, available -> 200000
600 19:42:47.093344 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
601 19:42:47.096524 Processing 255 relocs. Offset value of 0x7b9f6000
602 19:42:47.103507 smm_load_module: smram_start: 0x7b800000
603 19:42:47.108263 smm_load_module: smram_end: 7ba00000
604 19:42:47.110723 smm_load_module: handler start 0x7b9f6d5f
605 19:42:47.113140 smm_load_module: handler_size 98d0
606 19:42:47.116899 smm_load_module: fxsave_area 0x7b9ff000
607 19:42:47.120448 smm_load_module: fxsave_size 1000
608 19:42:47.123419 smm_load_module: CONFIG_MSEG_SIZE 0x0
609 19:42:47.129854 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
610 19:42:47.136700 smm_load_module: handler_mod_params.smbase = 0x7b800000
611 19:42:47.139875 smm_load_module: per_cpu_save_state_size = 0x400
612 19:42:47.143367 smm_load_module: num_cpus = 0x8
613 19:42:47.150478 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
614 19:42:47.152740 smm_load_module: total_save_state_size = 0x2000
615 19:42:47.159824 smm_load_module: cpu0 entry: 7b9e6000
616 19:42:47.162825 smm_create_map: cpus allowed in one segment 30
617 19:42:47.166197 smm_create_map: min # of segments needed 1
618 19:42:47.166583 CPU 0x0
619 19:42:47.173536 smbase 7b9e6000 entry 7b9ee000
620 19:42:47.176535 ss_start 7b9f5c00 code_end 7b9ee208
621 19:42:47.177075 CPU 0x1
622 19:42:47.179514 smbase 7b9e5c00 entry 7b9edc00
623 19:42:47.186197 ss_start 7b9f5800 code_end 7b9ede08
624 19:42:47.186684 CPU 0x2
625 19:42:47.189741 smbase 7b9e5800 entry 7b9ed800
626 19:42:47.196508 ss_start 7b9f5400 code_end 7b9eda08
627 19:42:47.197031 CPU 0x3
628 19:42:47.199617 smbase 7b9e5400 entry 7b9ed400
629 19:42:47.203298 ss_start 7b9f5000 code_end 7b9ed608
630 19:42:47.206227 CPU 0x4
631 19:42:47.209542 smbase 7b9e5000 entry 7b9ed000
632 19:42:47.213442 ss_start 7b9f4c00 code_end 7b9ed208
633 19:42:47.213945 CPU 0x5
634 19:42:47.220285 smbase 7b9e4c00 entry 7b9ecc00
635 19:42:47.223130 ss_start 7b9f4800 code_end 7b9ece08
636 19:42:47.223636 CPU 0x6
637 19:42:47.226333 smbase 7b9e4800 entry 7b9ec800
638 19:42:47.232454 ss_start 7b9f4400 code_end 7b9eca08
639 19:42:47.232935 CPU 0x7
640 19:42:47.236092 smbase 7b9e4400 entry 7b9ec400
641 19:42:47.242803 ss_start 7b9f4000 code_end 7b9ec608
642 19:42:47.249410 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
643 19:42:47.256465 Processing 11 relocs. Offset value of 0x7b9ee000
644 19:42:47.259359 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
645 19:42:47.266250 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
646 19:42:47.272590 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
647 19:42:47.279487 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
648 19:42:47.285506 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
649 19:42:47.292690 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
650 19:42:47.299288 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
651 19:42:47.302433 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
652 19:42:47.309267 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
653 19:42:47.315921 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
654 19:42:47.322617 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
655 19:42:47.329069 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
656 19:42:47.335905 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
657 19:42:47.342834 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
658 19:42:47.349244 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
659 19:42:47.352112 smm_module_setup_stub: stack_top = 0x7b804000
660 19:42:47.358441 smm_module_setup_stub: per cpu stack_size = 0x800
661 19:42:47.361658 smm_module_setup_stub: runtime.start32_offset = 0x4c
662 19:42:47.368567 smm_module_setup_stub: runtime.smm_size = 0x200000
663 19:42:47.375924 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
664 19:42:47.378913 Clearing SMI status registers
665 19:42:47.381903 SMI_STS: PM1
666 19:42:47.382310 PM1_STS: WAK PWRBTN
667 19:42:47.388315 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
668 19:42:47.392311 In relocation handler: CPU 0
669 19:42:47.395317 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
670 19:42:47.402338 Writing SMRR. base = 0x7b800006, mask=0xff800c00
671 19:42:47.405490 Relocation complete.
672 19:42:47.412007 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
673 19:42:47.415244 In relocation handler: CPU 5
674 19:42:47.418593 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
675 19:42:47.422171 Relocation complete.
676 19:42:47.428481 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
677 19:42:47.432021 In relocation handler: CPU 1
678 19:42:47.434988 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
679 19:42:47.438319 Writing SMRR. base = 0x7b800006, mask=0xff800c00
680 19:42:47.441938 Relocation complete.
681 19:42:47.448677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
682 19:42:47.452081 In relocation handler: CPU 2
683 19:42:47.455112 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
684 19:42:47.461968 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 19:42:47.462468 Relocation complete.
686 19:42:47.468319 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
687 19:42:47.471383 In relocation handler: CPU 3
688 19:42:47.478280 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
689 19:42:47.481532 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 19:42:47.484458 Relocation complete.
691 19:42:47.491395 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
692 19:42:47.495096 In relocation handler: CPU 4
693 19:42:47.498454 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
694 19:42:47.501303 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 19:42:47.504692 Relocation complete.
696 19:42:47.511749 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
697 19:42:47.515183 In relocation handler: CPU 7
698 19:42:47.518488 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
699 19:42:47.521675 Relocation complete.
700 19:42:47.527787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
701 19:42:47.531507 In relocation handler: CPU 6
702 19:42:47.534934 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
703 19:42:47.541194 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 19:42:47.541693 Relocation complete.
705 19:42:47.544696 Initializing CPU #0
706 19:42:47.548259 CPU: vendor Intel device 906a4
707 19:42:47.551631 CPU: family 06, model 9a, stepping 04
708 19:42:47.554615 Clearing out pending MCEs
709 19:42:47.558074 cpu: energy policy set to 7
710 19:42:47.561529 Turbo is available but hidden
711 19:42:47.564833 Turbo is available and visible
712 19:42:47.567969 microcode: Update skipped, already up-to-date
713 19:42:47.571383 CPU #0 initialized
714 19:42:47.571881 Initializing CPU #5
715 19:42:47.574580 Initializing CPU #4
716 19:42:47.577699 Initializing CPU #2
717 19:42:47.581088 CPU: vendor Intel device 906a4
718 19:42:47.583880 CPU: family 06, model 9a, stepping 04
719 19:42:47.587422 CPU: vendor Intel device 906a4
720 19:42:47.590937 CPU: family 06, model 9a, stepping 04
721 19:42:47.591332 Initializing CPU #3
722 19:42:47.593819 Initializing CPU #1
723 19:42:47.597898 CPU: vendor Intel device 906a4
724 19:42:47.600585 CPU: family 06, model 9a, stepping 04
725 19:42:47.604652 Clearing out pending MCEs
726 19:42:47.607474 Clearing out pending MCEs
727 19:42:47.610936 CPU: vendor Intel device 906a4
728 19:42:47.614140 CPU: family 06, model 9a, stepping 04
729 19:42:47.617886 CPU: vendor Intel device 906a4
730 19:42:47.621431 CPU: family 06, model 9a, stepping 04
731 19:42:47.624318 cpu: energy policy set to 7
732 19:42:47.624714 Clearing out pending MCEs
733 19:42:47.627658 Clearing out pending MCEs
734 19:42:47.630475 cpu: energy policy set to 7
735 19:42:47.633943 cpu: energy policy set to 7
736 19:42:47.637619 Initializing CPU #6
737 19:42:47.640571 microcode: Update skipped, already up-to-date
738 19:42:47.644594 CPU #1 initialized
739 19:42:47.647623 microcode: Update skipped, already up-to-date
740 19:42:47.650771 CPU #4 initialized
741 19:42:47.651303 cpu: energy policy set to 7
742 19:42:47.657553 microcode: Update skipped, already up-to-date
743 19:42:47.658059 CPU #2 initialized
744 19:42:47.664027 microcode: Update skipped, already up-to-date
745 19:42:47.664541 CPU #3 initialized
746 19:42:47.667677 CPU: vendor Intel device 906a4
747 19:42:47.671358 CPU: family 06, model 9a, stepping 04
748 19:42:47.674281 Initializing CPU #7
749 19:42:47.677510 Clearing out pending MCEs
750 19:42:47.680870 CPU: vendor Intel device 906a4
751 19:42:47.683830 CPU: family 06, model 9a, stepping 04
752 19:42:47.687881 cpu: energy policy set to 7
753 19:42:47.690894 Clearing out pending MCEs
754 19:42:47.691410 Clearing out pending MCEs
755 19:42:47.697446 microcode: Update skipped, already up-to-date
756 19:42:47.697960 CPU #6 initialized
757 19:42:47.701094 cpu: energy policy set to 7
758 19:42:47.703983 cpu: energy policy set to 7
759 19:42:47.707261 microcode: Update skipped, already up-to-date
760 19:42:47.710719 CPU #7 initialized
761 19:42:47.713870 microcode: Update skipped, already up-to-date
762 19:42:47.717348 CPU #5 initialized
763 19:42:47.720437 bsp_do_flight_plan done after 723 msecs.
764 19:42:47.724201 CPU: frequency set to 4400 MHz
765 19:42:47.727396 Enabling SMIs.
766 19:42:47.733712 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
767 19:42:47.748934 Probing TPM I2C: done! DID_VID 0x00281ae0
768 19:42:47.751414 Locality already claimed
769 19:42:47.755021 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
770 19:42:47.766675 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
771 19:42:47.769869 Enabling GPIO PM b/c CR50 has long IRQ pulse support
772 19:42:47.776721 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
773 19:42:47.783103 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
774 19:42:47.786558 Found a VBT of 9216 bytes after decompression
775 19:42:47.790341 PCI 1.0, PIN A, using IRQ #16
776 19:42:47.793412 PCI 2.0, PIN A, using IRQ #17
777 19:42:47.796873 PCI 4.0, PIN A, using IRQ #18
778 19:42:47.799799 PCI 5.0, PIN A, using IRQ #16
779 19:42:47.803122 PCI 6.0, PIN A, using IRQ #16
780 19:42:47.806374 PCI 6.2, PIN C, using IRQ #18
781 19:42:47.809771 PCI 7.0, PIN A, using IRQ #19
782 19:42:47.813199 PCI 7.1, PIN B, using IRQ #20
783 19:42:47.816380 PCI 7.2, PIN C, using IRQ #21
784 19:42:47.819906 PCI 7.3, PIN D, using IRQ #22
785 19:42:47.822956 PCI 8.0, PIN A, using IRQ #23
786 19:42:47.826515 PCI D.0, PIN A, using IRQ #17
787 19:42:47.829598 PCI D.1, PIN B, using IRQ #19
788 19:42:47.830110 PCI 10.0, PIN A, using IRQ #24
789 19:42:47.832588 PCI 10.1, PIN B, using IRQ #25
790 19:42:47.836209 PCI 10.6, PIN C, using IRQ #20
791 19:42:47.839433 PCI 10.7, PIN D, using IRQ #21
792 19:42:47.842750 PCI 11.0, PIN A, using IRQ #26
793 19:42:47.845990 PCI 11.1, PIN B, using IRQ #27
794 19:42:47.849456 PCI 11.2, PIN C, using IRQ #28
795 19:42:47.853445 PCI 11.3, PIN D, using IRQ #29
796 19:42:47.856356 PCI 12.0, PIN A, using IRQ #30
797 19:42:47.860093 PCI 12.6, PIN B, using IRQ #31
798 19:42:47.862721 PCI 12.7, PIN C, using IRQ #22
799 19:42:47.866430 PCI 13.0, PIN A, using IRQ #32
800 19:42:47.869251 PCI 13.1, PIN B, using IRQ #33
801 19:42:47.872708 PCI 13.2, PIN C, using IRQ #34
802 19:42:47.876029 PCI 13.3, PIN D, using IRQ #35
803 19:42:47.879631 PCI 14.0, PIN B, using IRQ #23
804 19:42:47.882830 PCI 14.1, PIN A, using IRQ #36
805 19:42:47.883444 PCI 14.3, PIN C, using IRQ #17
806 19:42:47.886019 PCI 15.0, PIN A, using IRQ #37
807 19:42:47.889411 PCI 15.1, PIN B, using IRQ #38
808 19:42:47.893696 PCI 15.2, PIN C, using IRQ #39
809 19:42:47.895667 PCI 15.3, PIN D, using IRQ #40
810 19:42:47.899538 PCI 16.0, PIN A, using IRQ #18
811 19:42:47.902621 PCI 16.1, PIN B, using IRQ #19
812 19:42:47.905583 PCI 16.2, PIN C, using IRQ #20
813 19:42:47.909447 PCI 16.3, PIN D, using IRQ #21
814 19:42:47.912374 PCI 16.4, PIN A, using IRQ #18
815 19:42:47.915936 PCI 16.5, PIN B, using IRQ #19
816 19:42:47.918971 PCI 17.0, PIN A, using IRQ #22
817 19:42:47.922933 PCI 19.0, PIN A, using IRQ #41
818 19:42:47.926154 PCI 19.1, PIN B, using IRQ #42
819 19:42:47.929582 PCI 19.2, PIN C, using IRQ #43
820 19:42:47.932631 PCI 1C.0, PIN A, using IRQ #16
821 19:42:47.935870 PCI 1C.1, PIN B, using IRQ #17
822 19:42:47.936385 PCI 1C.2, PIN C, using IRQ #18
823 19:42:47.939164 PCI 1C.3, PIN D, using IRQ #19
824 19:42:47.942616 PCI 1C.4, PIN A, using IRQ #16
825 19:42:47.945941 PCI 1C.5, PIN B, using IRQ #17
826 19:42:47.949013 PCI 1C.6, PIN C, using IRQ #18
827 19:42:47.952632 PCI 1C.7, PIN D, using IRQ #19
828 19:42:47.956072 PCI 1D.0, PIN A, using IRQ #16
829 19:42:47.959192 PCI 1D.1, PIN B, using IRQ #17
830 19:42:47.962305 PCI 1D.2, PIN C, using IRQ #18
831 19:42:47.965543 PCI 1D.3, PIN D, using IRQ #19
832 19:42:47.968923 PCI 1E.0, PIN A, using IRQ #23
833 19:42:47.972556 PCI 1E.1, PIN B, using IRQ #20
834 19:42:47.976457 PCI 1E.2, PIN C, using IRQ #44
835 19:42:47.978915 PCI 1E.3, PIN D, using IRQ #45
836 19:42:47.982074 PCI 1F.3, PIN B, using IRQ #22
837 19:42:47.985661 PCI 1F.4, PIN C, using IRQ #23
838 19:42:47.986065 PCI 1F.6, PIN D, using IRQ #20
839 19:42:47.989012 PCI 1F.7, PIN A, using IRQ #21
840 19:42:47.996108 IRQ: Using dynamically assigned PCI IO-APIC IRQs
841 19:42:48.002330 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
842 19:42:48.181916 FSPS returned 0
843 19:42:48.184822 Executing Phase 1 of FspMultiPhaseSiInit
844 19:42:48.195303 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
845 19:42:48.198637 port C0 DISC req: usage 1 usb3 1 usb2 1
846 19:42:48.202153 Raw Buffer output 0 00000111
847 19:42:48.205306 Raw Buffer output 1 00000000
848 19:42:48.208404 pmc_send_ipc_cmd succeeded
849 19:42:48.215935 port C1 DISC req: usage 1 usb3 3 usb2 3
850 19:42:48.216445 Raw Buffer output 0 00000331
851 19:42:48.218724 Raw Buffer output 1 00000000
852 19:42:48.222617 pmc_send_ipc_cmd succeeded
853 19:42:48.226751 Detected 6 core, 8 thread CPU.
854 19:42:48.229839 Detected 6 core, 8 thread CPU.
855 19:42:48.235111 Detected 6 core, 8 thread CPU.
856 19:42:48.238508 Detected 6 core, 8 thread CPU.
857 19:42:48.242022 Detected 6 core, 8 thread CPU.
858 19:42:48.245371 Detected 6 core, 8 thread CPU.
859 19:42:48.248838 Detected 6 core, 8 thread CPU.
860 19:42:48.251954 Detected 6 core, 8 thread CPU.
861 19:42:48.255186 Detected 6 core, 8 thread CPU.
862 19:42:48.258858 Detected 6 core, 8 thread CPU.
863 19:42:48.262541 Detected 6 core, 8 thread CPU.
864 19:42:48.265365 Detected 6 core, 8 thread CPU.
865 19:42:48.268413 Detected 6 core, 8 thread CPU.
866 19:42:48.271824 Detected 6 core, 8 thread CPU.
867 19:42:48.275222 Detected 6 core, 8 thread CPU.
868 19:42:48.278123 Detected 6 core, 8 thread CPU.
869 19:42:48.282050 Detected 6 core, 8 thread CPU.
870 19:42:48.284723 Detected 6 core, 8 thread CPU.
871 19:42:48.287885 Detected 6 core, 8 thread CPU.
872 19:42:48.291511 Detected 6 core, 8 thread CPU.
873 19:42:48.294955 Detected 6 core, 8 thread CPU.
874 19:42:48.297937 Detected 6 core, 8 thread CPU.
875 19:42:48.578803 Detected 6 core, 8 thread CPU.
876 19:42:48.582470 Detected 6 core, 8 thread CPU.
877 19:42:48.585257 Detected 6 core, 8 thread CPU.
878 19:42:48.588426 Detected 6 core, 8 thread CPU.
879 19:42:48.592238 Detected 6 core, 8 thread CPU.
880 19:42:48.595360 Detected 6 core, 8 thread CPU.
881 19:42:48.598564 Detected 6 core, 8 thread CPU.
882 19:42:48.601838 Detected 6 core, 8 thread CPU.
883 19:42:48.604650 Detected 6 core, 8 thread CPU.
884 19:42:48.608597 Detected 6 core, 8 thread CPU.
885 19:42:48.611937 Detected 6 core, 8 thread CPU.
886 19:42:48.615211 Detected 6 core, 8 thread CPU.
887 19:42:48.618372 Detected 6 core, 8 thread CPU.
888 19:42:48.621807 Detected 6 core, 8 thread CPU.
889 19:42:48.625057 Detected 6 core, 8 thread CPU.
890 19:42:48.628391 Detected 6 core, 8 thread CPU.
891 19:42:48.631758 Detected 6 core, 8 thread CPU.
892 19:42:48.635120 Detected 6 core, 8 thread CPU.
893 19:42:48.638999 Detected 6 core, 8 thread CPU.
894 19:42:48.642138 Detected 6 core, 8 thread CPU.
895 19:42:48.645426 Display FSP Version Info HOB
896 19:42:48.649174 Reference Code - CPU = c.0.65.70
897 19:42:48.649683 uCode Version = 0.0.4.23
898 19:42:48.651843 TXT ACM version = ff.ff.ff.ffff
899 19:42:48.655238 Reference Code - ME = c.0.65.70
900 19:42:48.658395 MEBx version = 0.0.0.0
901 19:42:48.662010 ME Firmware Version = Lite SKU
902 19:42:48.665704 Reference Code - PCH = c.0.65.70
903 19:42:48.668649 PCH-CRID Status = Disabled
904 19:42:48.671626 PCH-CRID Original Value = ff.ff.ff.ffff
905 19:42:48.675112 PCH-CRID New Value = ff.ff.ff.ffff
906 19:42:48.678234 OPROM - RST - RAID = ff.ff.ff.ffff
907 19:42:48.681597 PCH Hsio Version = 4.0.0.0
908 19:42:48.684915 Reference Code - SA - System Agent = c.0.65.70
909 19:42:48.687932 Reference Code - MRC = 0.0.3.80
910 19:42:48.691544 SA - PCIe Version = c.0.65.70
911 19:42:48.695231 SA-CRID Status = Disabled
912 19:42:48.698225 SA-CRID Original Value = 0.0.0.4
913 19:42:48.701760 SA-CRID New Value = 0.0.0.4
914 19:42:48.705450 OPROM - VBIOS = ff.ff.ff.ffff
915 19:42:48.708349 IO Manageability Engine FW Version = 24.0.4.0
916 19:42:48.711572 PHY Build Version = 0.0.0.2016
917 19:42:48.714744 Thunderbolt(TM) FW Version = 0.0.0.0
918 19:42:48.721490 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
919 19:42:48.728074 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
920 19:42:48.731582 Enumerating buses...
921 19:42:48.735502 Show all devs... Before device enumeration.
922 19:42:48.738373 Root Device: enabled 1
923 19:42:48.738884 CPU_CLUSTER: 0: enabled 1
924 19:42:48.741421 DOMAIN: 0000: enabled 1
925 19:42:48.745094 GPIO: 0: enabled 1
926 19:42:48.748136 PCI: 00:00.0: enabled 1
927 19:42:48.748646 PCI: 00:01.0: enabled 0
928 19:42:48.751613 PCI: 00:01.1: enabled 0
929 19:42:48.755172 PCI: 00:02.0: enabled 1
930 19:42:48.755683 PCI: 00:04.0: enabled 1
931 19:42:48.757924 PCI: 00:05.0: enabled 0
932 19:42:48.761352 PCI: 00:06.0: enabled 1
933 19:42:48.764428 PCI: 00:06.2: enabled 0
934 19:42:48.764812 PCI: 00:07.0: enabled 0
935 19:42:48.768542 PCI: 00:07.1: enabled 0
936 19:42:48.771399 PCI: 00:07.2: enabled 0
937 19:42:48.774677 PCI: 00:07.3: enabled 0
938 19:42:48.775155 PCI: 00:08.0: enabled 0
939 19:42:48.778104 PCI: 00:09.0: enabled 0
940 19:42:48.781643 PCI: 00:0a.0: enabled 1
941 19:42:48.785100 PCI: 00:0d.0: enabled 1
942 19:42:48.785607 PCI: 00:0d.1: enabled 0
943 19:42:48.788207 PCI: 00:0d.2: enabled 0
944 19:42:48.791476 PCI: 00:0d.3: enabled 0
945 19:42:48.791982 PCI: 00:0e.0: enabled 0
946 19:42:48.794913 PCI: 00:10.0: enabled 0
947 19:42:48.797908 PCI: 00:10.1: enabled 0
948 19:42:48.801718 PCI: 00:10.6: enabled 0
949 19:42:48.802178 PCI: 00:10.7: enabled 0
950 19:42:48.804559 PCI: 00:12.0: enabled 0
951 19:42:48.808493 PCI: 00:12.6: enabled 0
952 19:42:48.811263 PCI: 00:12.7: enabled 0
953 19:42:48.811806 PCI: 00:13.0: enabled 0
954 19:42:48.814176 PCI: 00:14.0: enabled 1
955 19:42:48.817777 PCI: 00:14.1: enabled 0
956 19:42:48.821715 PCI: 00:14.2: enabled 1
957 19:42:48.822222 PCI: 00:14.3: enabled 1
958 19:42:48.824239 PCI: 00:15.0: enabled 1
959 19:42:48.828217 PCI: 00:15.1: enabled 1
960 19:42:48.831508 PCI: 00:15.2: enabled 0
961 19:42:48.832024 PCI: 00:15.3: enabled 1
962 19:42:48.834303 PCI: 00:16.0: enabled 1
963 19:42:48.837594 PCI: 00:16.1: enabled 0
964 19:42:48.838150 PCI: 00:16.2: enabled 0
965 19:42:48.840968 PCI: 00:16.3: enabled 0
966 19:42:48.844506 PCI: 00:16.4: enabled 0
967 19:42:48.848235 PCI: 00:16.5: enabled 0
968 19:42:48.848742 PCI: 00:17.0: enabled 1
969 19:42:48.851582 PCI: 00:19.0: enabled 0
970 19:42:48.854473 PCI: 00:19.1: enabled 1
971 19:42:48.857784 PCI: 00:19.2: enabled 0
972 19:42:48.858287 PCI: 00:1a.0: enabled 0
973 19:42:48.860962 PCI: 00:1c.0: enabled 0
974 19:42:48.864228 PCI: 00:1c.1: enabled 0
975 19:42:48.867913 PCI: 00:1c.2: enabled 0
976 19:42:48.868424 PCI: 00:1c.3: enabled 0
977 19:42:48.871208 PCI: 00:1c.4: enabled 0
978 19:42:48.874591 PCI: 00:1c.5: enabled 0
979 19:42:48.875153 PCI: 00:1c.6: enabled 0
980 19:42:48.878057 PCI: 00:1c.7: enabled 0
981 19:42:48.880982 PCI: 00:1d.0: enabled 0
982 19:42:48.884185 PCI: 00:1d.1: enabled 0
983 19:42:48.884704 PCI: 00:1d.2: enabled 0
984 19:42:48.887254 PCI: 00:1d.3: enabled 0
985 19:42:48.891058 PCI: 00:1e.0: enabled 1
986 19:42:48.894224 PCI: 00:1e.1: enabled 0
987 19:42:48.894730 PCI: 00:1e.2: enabled 0
988 19:42:48.897831 PCI: 00:1e.3: enabled 1
989 19:42:48.900844 PCI: 00:1f.0: enabled 1
990 19:42:48.904054 PCI: 00:1f.1: enabled 0
991 19:42:48.904582 PCI: 00:1f.2: enabled 1
992 19:42:48.907518 PCI: 00:1f.3: enabled 1
993 19:42:48.911117 PCI: 00:1f.4: enabled 0
994 19:42:48.913781 PCI: 00:1f.5: enabled 1
995 19:42:48.914174 PCI: 00:1f.6: enabled 0
996 19:42:48.917157 PCI: 00:1f.7: enabled 0
997 19:42:48.920328 GENERIC: 0.0: enabled 1
998 19:42:48.920723 GENERIC: 0.0: enabled 1
999 19:42:48.923899 GENERIC: 1.0: enabled 1
1000 19:42:48.927769 GENERIC: 0.0: enabled 1
1001 19:42:48.931116 GENERIC: 1.0: enabled 1
1002 19:42:48.931628 USB0 port 0: enabled 1
1003 19:42:48.934039 USB0 port 0: enabled 1
1004 19:42:48.937389 GENERIC: 0.0: enabled 1
1005 19:42:48.937876 I2C: 00:1a: enabled 1
1006 19:42:48.940681 I2C: 00:31: enabled 1
1007 19:42:48.944198 I2C: 00:32: enabled 1
1008 19:42:48.947315 I2C: 00:50: enabled 1
1009 19:42:48.947833 I2C: 00:10: enabled 1
1010 19:42:48.951515 I2C: 00:15: enabled 1
1011 19:42:48.954136 I2C: 00:2c: enabled 1
1012 19:42:48.954647 GENERIC: 0.0: enabled 1
1013 19:42:48.957981 SPI: 00: enabled 1
1014 19:42:48.960423 PNP: 0c09.0: enabled 1
1015 19:42:48.960815 GENERIC: 0.0: enabled 1
1016 19:42:48.964000 USB3 port 0: enabled 1
1017 19:42:48.967614 USB3 port 1: enabled 0
1018 19:42:48.968109 USB3 port 2: enabled 1
1019 19:42:48.970707 USB3 port 3: enabled 0
1020 19:42:48.974199 USB2 port 0: enabled 1
1021 19:42:48.977226 USB2 port 1: enabled 0
1022 19:42:48.977621 USB2 port 2: enabled 1
1023 19:42:48.980361 USB2 port 3: enabled 0
1024 19:42:48.983802 USB2 port 4: enabled 0
1025 19:42:48.984328 USB2 port 5: enabled 1
1026 19:42:48.986896 USB2 port 6: enabled 0
1027 19:42:48.990233 USB2 port 7: enabled 0
1028 19:42:48.990619 USB2 port 8: enabled 1
1029 19:42:48.993594 USB2 port 9: enabled 1
1030 19:42:48.997409 USB3 port 0: enabled 1
1031 19:42:49.000901 USB3 port 1: enabled 0
1032 19:42:49.001401 USB3 port 2: enabled 0
1033 19:42:49.003831 USB3 port 3: enabled 0
1034 19:42:49.007439 GENERIC: 0.0: enabled 1
1035 19:42:49.007951 GENERIC: 1.0: enabled 1
1036 19:42:49.011438 APIC: 00: enabled 1
1037 19:42:49.014248 APIC: 12: enabled 1
1038 19:42:49.014733 APIC: 14: enabled 1
1039 19:42:49.017832 APIC: 16: enabled 1
1040 19:42:49.020578 APIC: 10: enabled 1
1041 19:42:49.020963 APIC: 01: enabled 1
1042 19:42:49.024311 APIC: 08: enabled 1
1043 19:42:49.024857 APIC: 09: enabled 1
1044 19:42:49.027821 Compare with tree...
1045 19:42:49.030937 Root Device: enabled 1
1046 19:42:49.033891 CPU_CLUSTER: 0: enabled 1
1047 19:42:49.034284 APIC: 00: enabled 1
1048 19:42:49.037390 APIC: 12: enabled 1
1049 19:42:49.040806 APIC: 14: enabled 1
1050 19:42:49.041564 APIC: 16: enabled 1
1051 19:42:49.043562 APIC: 10: enabled 1
1052 19:42:49.046997 APIC: 01: enabled 1
1053 19:42:49.047467 APIC: 08: enabled 1
1054 19:42:49.050602 APIC: 09: enabled 1
1055 19:42:49.053640 DOMAIN: 0000: enabled 1
1056 19:42:49.054098 GPIO: 0: enabled 1
1057 19:42:49.057054 PCI: 00:00.0: enabled 1
1058 19:42:49.060409 PCI: 00:01.0: enabled 0
1059 19:42:49.063666 PCI: 00:01.1: enabled 0
1060 19:42:49.067025 PCI: 00:02.0: enabled 1
1061 19:42:49.067508 PCI: 00:04.0: enabled 1
1062 19:42:49.070536 GENERIC: 0.0: enabled 1
1063 19:42:49.073849 PCI: 00:05.0: enabled 0
1064 19:42:49.076729 PCI: 00:06.0: enabled 1
1065 19:42:49.080078 PCI: 00:06.2: enabled 0
1066 19:42:49.080474 PCI: 00:08.0: enabled 0
1067 19:42:49.083647 PCI: 00:09.0: enabled 0
1068 19:42:49.087689 PCI: 00:0a.0: enabled 1
1069 19:42:49.089790 PCI: 00:0d.0: enabled 1
1070 19:42:49.093050 USB0 port 0: enabled 1
1071 19:42:49.093438 USB3 port 0: enabled 1
1072 19:42:49.096341 USB3 port 1: enabled 0
1073 19:42:49.100298 USB3 port 2: enabled 1
1074 19:42:49.103808 USB3 port 3: enabled 0
1075 19:42:49.106701 PCI: 00:0d.1: enabled 0
1076 19:42:49.107170 PCI: 00:0d.2: enabled 0
1077 19:42:49.110129 PCI: 00:0d.3: enabled 0
1078 19:42:49.113331 PCI: 00:0e.0: enabled 0
1079 19:42:49.116718 PCI: 00:10.0: enabled 0
1080 19:42:49.120232 PCI: 00:10.1: enabled 0
1081 19:42:49.123222 PCI: 00:10.6: enabled 0
1082 19:42:49.123718 PCI: 00:10.7: enabled 0
1083 19:42:49.126650 PCI: 00:12.0: enabled 0
1084 19:42:49.129953 PCI: 00:12.6: enabled 0
1085 19:42:49.132730 PCI: 00:12.7: enabled 0
1086 19:42:49.133144 PCI: 00:13.0: enabled 0
1087 19:42:49.136734 PCI: 00:14.0: enabled 1
1088 19:42:49.139918 USB0 port 0: enabled 1
1089 19:42:49.143768 USB2 port 0: enabled 1
1090 19:42:49.146863 USB2 port 1: enabled 0
1091 19:42:49.149604 USB2 port 2: enabled 1
1092 19:42:49.150103 USB2 port 3: enabled 0
1093 19:42:49.153212 USB2 port 4: enabled 0
1094 19:42:49.156276 USB2 port 5: enabled 1
1095 19:42:49.160696 USB2 port 6: enabled 0
1096 19:42:49.163524 USB2 port 7: enabled 0
1097 19:42:49.163980 USB2 port 8: enabled 1
1098 19:42:49.166434 USB2 port 9: enabled 1
1099 19:42:49.169873 USB3 port 0: enabled 1
1100 19:42:49.172822 USB3 port 1: enabled 0
1101 19:42:49.176188 USB3 port 2: enabled 0
1102 19:42:49.180015 USB3 port 3: enabled 0
1103 19:42:49.180463 PCI: 00:14.1: enabled 0
1104 19:42:49.182671 PCI: 00:14.2: enabled 1
1105 19:42:49.186334 PCI: 00:14.3: enabled 1
1106 19:42:49.189646 GENERIC: 0.0: enabled 1
1107 19:42:49.192596 PCI: 00:15.0: enabled 1
1108 19:42:49.192984 I2C: 00:1a: enabled 1
1109 19:42:49.196227 I2C: 00:31: enabled 1
1110 19:42:49.199839 I2C: 00:32: enabled 1
1111 19:42:49.202744 PCI: 00:15.1: enabled 1
1112 19:42:49.203192 I2C: 00:50: enabled 1
1113 19:42:49.206204 PCI: 00:15.2: enabled 0
1114 19:42:49.209414 PCI: 00:15.3: enabled 1
1115 19:42:49.212467 I2C: 00:10: enabled 1
1116 19:42:49.216566 PCI: 00:16.0: enabled 1
1117 19:42:49.217074 PCI: 00:16.1: enabled 0
1118 19:42:49.219674 PCI: 00:16.2: enabled 0
1119 19:42:49.223103 PCI: 00:16.3: enabled 0
1120 19:42:49.226101 PCI: 00:16.4: enabled 0
1121 19:42:49.229458 PCI: 00:16.5: enabled 0
1122 19:42:49.229867 PCI: 00:17.0: enabled 1
1123 19:42:49.232746 PCI: 00:19.0: enabled 0
1124 19:42:49.236258 PCI: 00:19.1: enabled 1
1125 19:42:49.239478 I2C: 00:15: enabled 1
1126 19:42:49.239936 I2C: 00:2c: enabled 1
1127 19:42:49.242453 PCI: 00:19.2: enabled 0
1128 19:42:49.246361 PCI: 00:1a.0: enabled 0
1129 19:42:49.250060 PCI: 00:1e.0: enabled 1
1130 19:42:49.253407 PCI: 00:1e.1: enabled 0
1131 19:42:49.253901 PCI: 00:1e.2: enabled 0
1132 19:42:49.256211 PCI: 00:1e.3: enabled 1
1133 19:42:49.259253 SPI: 00: enabled 1
1134 19:42:49.263088 PCI: 00:1f.0: enabled 1
1135 19:42:49.266250 PNP: 0c09.0: enabled 1
1136 19:42:49.266738 PCI: 00:1f.1: enabled 0
1137 19:42:49.269482 PCI: 00:1f.2: enabled 1
1138 19:42:49.272592 GENERIC: 0.0: enabled 1
1139 19:42:49.275930 GENERIC: 0.0: enabled 1
1140 19:42:49.279632 GENERIC: 1.0: enabled 1
1141 19:42:49.280131 PCI: 00:1f.3: enabled 1
1142 19:42:49.282649 PCI: 00:1f.4: enabled 0
1143 19:42:49.285805 PCI: 00:1f.5: enabled 1
1144 19:42:49.289312 PCI: 00:1f.6: enabled 0
1145 19:42:49.292339 PCI: 00:1f.7: enabled 0
1146 19:42:49.292780 Root Device scanning...
1147 19:42:49.296790 scan_static_bus for Root Device
1148 19:42:49.299846 CPU_CLUSTER: 0 enabled
1149 19:42:49.302502 DOMAIN: 0000 enabled
1150 19:42:49.302998 DOMAIN: 0000 scanning...
1151 19:42:49.305585 PCI: pci_scan_bus for bus 00
1152 19:42:49.309455 PCI: 00:00.0 [8086/0000] ops
1153 19:42:49.312817 PCI: 00:00.0 [8086/4609] enabled
1154 19:42:49.316043 PCI: 00:02.0 [8086/0000] bus ops
1155 19:42:49.319150 PCI: 00:02.0 [8086/46b3] enabled
1156 19:42:49.322642 PCI: 00:04.0 [8086/0000] bus ops
1157 19:42:49.326596 PCI: 00:04.0 [8086/461d] enabled
1158 19:42:49.328821 PCI: 00:06.0 [8086/0000] bus ops
1159 19:42:49.332095 PCI: 00:06.0 [8086/464d] enabled
1160 19:42:49.336360 PCI: 00:08.0 [8086/464f] disabled
1161 19:42:49.339138 PCI: 00:0a.0 [8086/467d] enabled
1162 19:42:49.341973 PCI: 00:0d.0 [8086/0000] bus ops
1163 19:42:49.345957 PCI: 00:0d.0 [8086/461e] enabled
1164 19:42:49.350027 PCI: 00:14.0 [8086/0000] bus ops
1165 19:42:49.352688 PCI: 00:14.0 [8086/51ed] enabled
1166 19:42:49.356308 PCI: 00:14.2 [8086/51ef] enabled
1167 19:42:49.359228 PCI: 00:14.3 [8086/0000] bus ops
1168 19:42:49.362772 PCI: 00:14.3 [8086/51f0] enabled
1169 19:42:49.366116 PCI: 00:15.0 [8086/0000] bus ops
1170 19:42:49.369300 PCI: 00:15.0 [8086/51e8] enabled
1171 19:42:49.372746 PCI: 00:15.1 [8086/0000] bus ops
1172 19:42:49.376143 PCI: 00:15.1 [8086/51e9] enabled
1173 19:42:49.379707 PCI: 00:15.2 [8086/0000] bus ops
1174 19:42:49.382798 PCI: 00:15.2 [8086/51ea] disabled
1175 19:42:49.386364 PCI: 00:15.3 [8086/0000] bus ops
1176 19:42:49.389238 PCI: 00:15.3 [8086/51eb] enabled
1177 19:42:49.392143 PCI: 00:16.0 [8086/0000] ops
1178 19:42:49.396222 PCI: 00:16.0 [8086/51e0] enabled
1179 19:42:49.402790 PCI: Static device PCI: 00:17.0 not found, disabling it.
1180 19:42:49.405876 PCI: 00:19.0 [8086/0000] bus ops
1181 19:42:49.409207 PCI: 00:19.0 [8086/51c5] disabled
1182 19:42:49.412681 PCI: 00:19.1 [8086/0000] bus ops
1183 19:42:49.416524 PCI: 00:19.1 [8086/51c6] enabled
1184 19:42:49.419008 PCI: 00:1e.0 [8086/0000] ops
1185 19:42:49.422425 PCI: 00:1e.0 [8086/51a8] enabled
1186 19:42:49.425885 PCI: 00:1e.3 [8086/0000] bus ops
1187 19:42:49.428789 PCI: 00:1e.3 [8086/51ab] enabled
1188 19:42:49.432174 PCI: 00:1f.0 [8086/0000] bus ops
1189 19:42:49.435978 PCI: 00:1f.0 [8086/5182] enabled
1190 19:42:49.439338 RTC Init
1191 19:42:49.442555 Set power on after power failure.
1192 19:42:49.442941 Disabling Deep S3
1193 19:42:49.445966 Disabling Deep S3
1194 19:42:49.449197 Disabling Deep S4
1195 19:42:49.449690 Disabling Deep S4
1196 19:42:49.452394 Disabling Deep S5
1197 19:42:49.452792 Disabling Deep S5
1198 19:42:49.456484 PCI: 00:1f.2 [0000/0000] hidden
1199 19:42:49.459040 PCI: 00:1f.3 [8086/0000] bus ops
1200 19:42:49.462723 PCI: 00:1f.3 [8086/51c8] enabled
1201 19:42:49.466146 PCI: 00:1f.5 [8086/0000] bus ops
1202 19:42:49.468954 PCI: 00:1f.5 [8086/51a4] enabled
1203 19:42:49.472637 GPIO: 0 enabled
1204 19:42:49.475749 PCI: Leftover static devices:
1205 19:42:49.476233 PCI: 00:01.0
1206 19:42:49.476511 PCI: 00:01.1
1207 19:42:49.479342 PCI: 00:05.0
1208 19:42:49.479829 PCI: 00:06.2
1209 19:42:49.482806 PCI: 00:09.0
1210 19:42:49.483293 PCI: 00:0d.1
1211 19:42:49.485738 PCI: 00:0d.2
1212 19:42:49.486175 PCI: 00:0d.3
1213 19:42:49.486449 PCI: 00:0e.0
1214 19:42:49.488955 PCI: 00:10.0
1215 19:42:49.489455 PCI: 00:10.1
1216 19:42:49.492007 PCI: 00:10.6
1217 19:42:49.492326 PCI: 00:10.7
1218 19:42:49.492569 PCI: 00:12.0
1219 19:42:49.495694 PCI: 00:12.6
1220 19:42:49.496146 PCI: 00:12.7
1221 19:42:49.499344 PCI: 00:13.0
1222 19:42:49.499840 PCI: 00:14.1
1223 19:42:49.500121 PCI: 00:16.1
1224 19:42:49.502282 PCI: 00:16.2
1225 19:42:49.502769 PCI: 00:16.3
1226 19:42:49.505291 PCI: 00:16.4
1227 19:42:49.505640 PCI: 00:16.5
1228 19:42:49.509386 PCI: 00:17.0
1229 19:42:49.509875 PCI: 00:19.2
1230 19:42:49.510154 PCI: 00:1a.0
1231 19:42:49.512255 PCI: 00:1e.1
1232 19:42:49.512743 PCI: 00:1e.2
1233 19:42:49.515660 PCI: 00:1f.1
1234 19:42:49.516145 PCI: 00:1f.4
1235 19:42:49.516426 PCI: 00:1f.6
1236 19:42:49.518876 PCI: 00:1f.7
1237 19:42:49.521973 PCI: Check your devicetree.cb.
1238 19:42:49.525617 PCI: 00:02.0 scanning...
1239 19:42:49.528984 scan_generic_bus for PCI: 00:02.0
1240 19:42:49.532721 scan_generic_bus for PCI: 00:02.0 done
1241 19:42:49.535503 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1242 19:42:49.538781 PCI: 00:04.0 scanning...
1243 19:42:49.542112 scan_generic_bus for PCI: 00:04.0
1244 19:42:49.545608 GENERIC: 0.0 enabled
1245 19:42:49.548909 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1246 19:42:49.555797 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1247 19:42:49.559298 PCI: 00:06.0 scanning...
1248 19:42:49.562084 do_pci_scan_bridge for PCI: 00:06.0
1249 19:42:49.565200 PCI: pci_scan_bus for bus 01
1250 19:42:49.568458 PCI: 01:00.0 [15b7/5009] enabled
1251 19:42:49.572321 Enabling Common Clock Configuration
1252 19:42:49.575153 L1 Sub-State supported from root port 6
1253 19:42:49.578593 L1 Sub-State Support = 0x5
1254 19:42:49.582391 CommonModeRestoreTime = 0x6e
1255 19:42:49.586062 Power On Value = 0x5, Power On Scale = 0x2
1256 19:42:49.586565 ASPM: Enabled L1
1257 19:42:49.591731 PCIe: Max_Payload_Size adjusted to 256
1258 19:42:49.592209 PCI: 01:00.0: Enabled LTR
1259 19:42:49.598775 PCI: 01:00.0: Programmed LTR max latencies
1260 19:42:49.602505 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1261 19:42:49.605767 PCI: 00:0d.0 scanning...
1262 19:42:49.608976 scan_static_bus for PCI: 00:0d.0
1263 19:42:49.612230 USB0 port 0 enabled
1264 19:42:49.612723 USB0 port 0 scanning...
1265 19:42:49.615408 scan_static_bus for USB0 port 0
1266 19:42:49.618900 USB3 port 0 enabled
1267 19:42:49.621992 USB3 port 1 disabled
1268 19:42:49.622380 USB3 port 2 enabled
1269 19:42:49.625592 USB3 port 3 disabled
1270 19:42:49.628933 USB3 port 0 scanning...
1271 19:42:49.631926 scan_static_bus for USB3 port 0
1272 19:42:49.635653 scan_static_bus for USB3 port 0 done
1273 19:42:49.639383 scan_bus: bus USB3 port 0 finished in 6 msecs
1274 19:42:49.641785 USB3 port 2 scanning...
1275 19:42:49.645206 scan_static_bus for USB3 port 2
1276 19:42:49.648866 scan_static_bus for USB3 port 2 done
1277 19:42:49.651742 scan_bus: bus USB3 port 2 finished in 6 msecs
1278 19:42:49.655121 scan_static_bus for USB0 port 0 done
1279 19:42:49.661738 scan_bus: bus USB0 port 0 finished in 43 msecs
1280 19:42:49.665170 scan_static_bus for PCI: 00:0d.0 done
1281 19:42:49.668814 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1282 19:42:49.671653 PCI: 00:14.0 scanning...
1283 19:42:49.675766 scan_static_bus for PCI: 00:14.0
1284 19:42:49.678847 USB0 port 0 enabled
1285 19:42:49.679333 USB0 port 0 scanning...
1286 19:42:49.681886 scan_static_bus for USB0 port 0
1287 19:42:49.685143 USB2 port 0 enabled
1288 19:42:49.688166 USB2 port 1 disabled
1289 19:42:49.688615 USB2 port 2 enabled
1290 19:42:49.691932 USB2 port 3 disabled
1291 19:42:49.694826 USB2 port 4 disabled
1292 19:42:49.695230 USB2 port 5 enabled
1293 19:42:49.698600 USB2 port 6 disabled
1294 19:42:49.701619 USB2 port 7 disabled
1295 19:42:49.702008 USB2 port 8 enabled
1296 19:42:49.704696 USB2 port 9 enabled
1297 19:42:49.705128 USB3 port 0 enabled
1298 19:42:49.708499 USB3 port 1 disabled
1299 19:42:49.712152 USB3 port 2 disabled
1300 19:42:49.712670 USB3 port 3 disabled
1301 19:42:49.715200 USB2 port 0 scanning...
1302 19:42:49.718299 scan_static_bus for USB2 port 0
1303 19:42:49.721192 scan_static_bus for USB2 port 0 done
1304 19:42:49.728253 scan_bus: bus USB2 port 0 finished in 6 msecs
1305 19:42:49.728747 USB2 port 2 scanning...
1306 19:42:49.731202 scan_static_bus for USB2 port 2
1307 19:42:49.735019 scan_static_bus for USB2 port 2 done
1308 19:42:49.741296 scan_bus: bus USB2 port 2 finished in 6 msecs
1309 19:42:49.741789 USB2 port 5 scanning...
1310 19:42:49.744985 scan_static_bus for USB2 port 5
1311 19:42:49.751861 scan_static_bus for USB2 port 5 done
1312 19:42:49.754884 scan_bus: bus USB2 port 5 finished in 6 msecs
1313 19:42:49.758376 USB2 port 8 scanning...
1314 19:42:49.761658 scan_static_bus for USB2 port 8
1315 19:42:49.765111 scan_static_bus for USB2 port 8 done
1316 19:42:49.768213 scan_bus: bus USB2 port 8 finished in 6 msecs
1317 19:42:49.771626 USB2 port 9 scanning...
1318 19:42:49.775007 scan_static_bus for USB2 port 9
1319 19:42:49.778017 scan_static_bus for USB2 port 9 done
1320 19:42:49.781422 scan_bus: bus USB2 port 9 finished in 6 msecs
1321 19:42:49.784586 USB3 port 0 scanning...
1322 19:42:49.788460 scan_static_bus for USB3 port 0
1323 19:42:49.791165 scan_static_bus for USB3 port 0 done
1324 19:42:49.798214 scan_bus: bus USB3 port 0 finished in 6 msecs
1325 19:42:49.801199 scan_static_bus for USB0 port 0 done
1326 19:42:49.804426 scan_bus: bus USB0 port 0 finished in 120 msecs
1327 19:42:49.808260 scan_static_bus for PCI: 00:14.0 done
1328 19:42:49.814939 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1329 19:42:49.815472 PCI: 00:14.3 scanning...
1330 19:42:49.818019 scan_static_bus for PCI: 00:14.3
1331 19:42:49.821011 GENERIC: 0.0 enabled
1332 19:42:49.824263 scan_static_bus for PCI: 00:14.3 done
1333 19:42:49.831864 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1334 19:42:49.832373 PCI: 00:15.0 scanning...
1335 19:42:49.835065 scan_static_bus for PCI: 00:15.0
1336 19:42:49.838237 I2C: 00:1a enabled
1337 19:42:49.841437 I2C: 00:31 enabled
1338 19:42:49.841931 I2C: 00:32 enabled
1339 19:42:49.844435 scan_static_bus for PCI: 00:15.0 done
1340 19:42:49.851606 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1341 19:42:49.854715 PCI: 00:15.1 scanning...
1342 19:42:49.857780 scan_static_bus for PCI: 00:15.1
1343 19:42:49.858273 I2C: 00:50 enabled
1344 19:42:49.861563 scan_static_bus for PCI: 00:15.1 done
1345 19:42:49.868018 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1346 19:42:49.868505 PCI: 00:15.3 scanning...
1347 19:42:49.871789 scan_static_bus for PCI: 00:15.3
1348 19:42:49.874452 I2C: 00:10 enabled
1349 19:42:49.878221 scan_static_bus for PCI: 00:15.3 done
1350 19:42:49.884591 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1351 19:42:49.885129 PCI: 00:19.1 scanning...
1352 19:42:49.887937 scan_static_bus for PCI: 00:19.1
1353 19:42:49.891216 I2C: 00:15 enabled
1354 19:42:49.894751 I2C: 00:2c enabled
1355 19:42:49.897502 scan_static_bus for PCI: 00:19.1 done
1356 19:42:49.900629 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1357 19:42:49.904515 PCI: 00:1e.3 scanning...
1358 19:42:49.907303 scan_generic_bus for PCI: 00:1e.3
1359 19:42:49.907691 SPI: 00 enabled
1360 19:42:49.914744 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1361 19:42:49.921448 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1362 19:42:49.921922 PCI: 00:1f.0 scanning...
1363 19:42:49.923815 scan_static_bus for PCI: 00:1f.0
1364 19:42:49.927538 PNP: 0c09.0 enabled
1365 19:42:49.930561 PNP: 0c09.0 scanning...
1366 19:42:49.934078 scan_static_bus for PNP: 0c09.0
1367 19:42:49.937321 scan_static_bus for PNP: 0c09.0 done
1368 19:42:49.941135 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1369 19:42:49.943890 scan_static_bus for PCI: 00:1f.0 done
1370 19:42:49.951156 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1371 19:42:49.954281 PCI: 00:1f.2 scanning...
1372 19:42:49.957491 scan_static_bus for PCI: 00:1f.2
1373 19:42:49.957981 GENERIC: 0.0 enabled
1374 19:42:49.960431 GENERIC: 0.0 scanning...
1375 19:42:49.963751 scan_static_bus for GENERIC: 0.0
1376 19:42:49.967350 GENERIC: 0.0 enabled
1377 19:42:49.967753 GENERIC: 1.0 enabled
1378 19:42:49.970813 scan_static_bus for GENERIC: 0.0 done
1379 19:42:49.977336 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1380 19:42:49.980646 scan_static_bus for PCI: 00:1f.2 done
1381 19:42:49.987423 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1382 19:42:49.987914 PCI: 00:1f.3 scanning...
1383 19:42:49.990635 scan_static_bus for PCI: 00:1f.3
1384 19:42:49.993637 scan_static_bus for PCI: 00:1f.3 done
1385 19:42:50.000384 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1386 19:42:50.003846 PCI: 00:1f.5 scanning...
1387 19:42:50.007077 scan_generic_bus for PCI: 00:1f.5
1388 19:42:50.010441 scan_generic_bus for PCI: 00:1f.5 done
1389 19:42:50.013836 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1390 19:42:50.020314 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1391 19:42:50.023993 scan_static_bus for Root Device done
1392 19:42:50.027145 scan_bus: bus Root Device finished in 729 msecs
1393 19:42:50.027648 done
1394 19:42:50.033685 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1395 19:42:50.040542 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1396 19:42:50.047061 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1397 19:42:50.050157 SPI flash protection: WPSW=1 SRP0=0
1398 19:42:50.053653 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1399 19:42:50.060709 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1400 19:42:50.063950 found VGA at PCI: 00:02.0
1401 19:42:50.067222 Setting up VGA for PCI: 00:02.0
1402 19:42:50.070141 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1403 19:42:50.077331 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1404 19:42:50.080850 Allocating resources...
1405 19:42:50.081344 Reading resources...
1406 19:42:50.087408 Root Device read_resources bus 0 link: 0
1407 19:42:50.090406 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1408 19:42:50.093442 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1409 19:42:50.100045 DOMAIN: 0000 read_resources bus 0 link: 0
1410 19:42:50.106944 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1411 19:42:50.110312 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1412 19:42:50.116964 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1413 19:42:50.123168 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1414 19:42:50.130419 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1415 19:42:50.136973 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1416 19:42:50.143769 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1417 19:42:50.150210 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1418 19:42:50.157124 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1419 19:42:50.163349 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1420 19:42:50.169827 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1421 19:42:50.176368 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1422 19:42:50.179714 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1423 19:42:50.186302 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1424 19:42:50.192915 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1425 19:42:50.199637 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1426 19:42:50.206511 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1427 19:42:50.212832 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1428 19:42:50.219547 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1429 19:42:50.226301 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1430 19:42:50.232872 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1431 19:42:50.236432 PCI: 00:04.0 read_resources bus 1 link: 0
1432 19:42:50.239944 PCI: 00:04.0 read_resources bus 1 link: 0 done
1433 19:42:50.246115 PCI: 00:06.0 read_resources bus 1 link: 0
1434 19:42:50.249614 PCI: 00:06.0 read_resources bus 1 link: 0 done
1435 19:42:50.252447 PCI: 00:0d.0 read_resources bus 0 link: 0
1436 19:42:50.256052 USB0 port 0 read_resources bus 0 link: 0
1437 19:42:50.262971 USB0 port 0 read_resources bus 0 link: 0 done
1438 19:42:50.265872 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1439 19:42:50.272456 PCI: 00:14.0 read_resources bus 0 link: 0
1440 19:42:50.275727 USB0 port 0 read_resources bus 0 link: 0
1441 19:42:50.279466 USB0 port 0 read_resources bus 0 link: 0 done
1442 19:42:50.286246 PCI: 00:14.0 read_resources bus 0 link: 0 done
1443 19:42:50.288804 PCI: 00:14.3 read_resources bus 0 link: 0
1444 19:42:50.292615 PCI: 00:14.3 read_resources bus 0 link: 0 done
1445 19:42:50.300136 PCI: 00:15.0 read_resources bus 0 link: 0
1446 19:42:50.303604 PCI: 00:15.0 read_resources bus 0 link: 0 done
1447 19:42:50.306598 PCI: 00:15.1 read_resources bus 0 link: 0
1448 19:42:50.312506 PCI: 00:15.1 read_resources bus 0 link: 0 done
1449 19:42:50.316179 PCI: 00:15.3 read_resources bus 0 link: 0
1450 19:42:50.319450 PCI: 00:15.3 read_resources bus 0 link: 0 done
1451 19:42:50.326087 PCI: 00:19.1 read_resources bus 0 link: 0
1452 19:42:50.329260 PCI: 00:19.1 read_resources bus 0 link: 0 done
1453 19:42:50.332918 PCI: 00:1e.3 read_resources bus 2 link: 0
1454 19:42:50.339105 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1455 19:42:50.342695 PCI: 00:1f.0 read_resources bus 0 link: 0
1456 19:42:50.349436 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1457 19:42:50.352614 PCI: 00:1f.2 read_resources bus 0 link: 0
1458 19:42:50.356345 GENERIC: 0.0 read_resources bus 0 link: 0
1459 19:42:50.362684 GENERIC: 0.0 read_resources bus 0 link: 0 done
1460 19:42:50.365488 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1461 19:42:50.372266 DOMAIN: 0000 read_resources bus 0 link: 0 done
1462 19:42:50.376049 Root Device read_resources bus 0 link: 0 done
1463 19:42:50.378982 Done reading resources.
1464 19:42:50.382726 Show resources in subtree (Root Device)...After reading.
1465 19:42:50.389116 Root Device child on link 0 CPU_CLUSTER: 0
1466 19:42:50.392293 CPU_CLUSTER: 0 child on link 0 APIC: 00
1467 19:42:50.392834 APIC: 00
1468 19:42:50.395101 APIC: 12
1469 19:42:50.395599 APIC: 14
1470 19:42:50.395893 APIC: 16
1471 19:42:50.398961 APIC: 10
1472 19:42:50.399427 APIC: 01
1473 19:42:50.402260 APIC: 08
1474 19:42:50.402613 APIC: 09
1475 19:42:50.405911 DOMAIN: 0000 child on link 0 GPIO: 0
1476 19:42:50.415656 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1477 19:42:50.425810 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1478 19:42:50.426288 GPIO: 0
1479 19:42:50.428622 PCI: 00:00.0
1480 19:42:50.438749 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1481 19:42:50.445646 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1482 19:42:50.455554 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1483 19:42:50.465180 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1484 19:42:50.475314 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1485 19:42:50.485524 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1486 19:42:50.495031 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1487 19:42:50.502005 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1488 19:42:50.511573 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1489 19:42:50.521805 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1490 19:42:50.532634 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1491 19:42:50.541599 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1492 19:42:50.552909 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1493 19:42:50.561411 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1494 19:42:50.568243 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1495 19:42:50.578006 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1496 19:42:50.588413 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1497 19:42:50.598004 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1498 19:42:50.608329 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1499 19:42:50.617960 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1500 19:42:50.628038 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1501 19:42:50.637597 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1502 19:42:50.644219 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1503 19:42:50.654558 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1504 19:42:50.664190 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1505 19:42:50.674244 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1506 19:42:50.684315 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1507 19:42:50.694549 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1508 19:42:50.695039 PCI: 00:02.0
1509 19:42:50.703985 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1510 19:42:50.716852 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1511 19:42:50.723729 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1512 19:42:50.730436 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1513 19:42:50.740729 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1514 19:42:50.741274 GENERIC: 0.0
1515 19:42:50.744015 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1516 19:42:50.754294 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1517 19:42:50.763596 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1518 19:42:50.773773 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1519 19:42:50.774249 PCI: 01:00.0
1520 19:42:50.783520 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1521 19:42:50.793605 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1522 19:42:50.797776 PCI: 00:08.0
1523 19:42:50.798260 PCI: 00:0a.0
1524 19:42:50.807296 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1525 19:42:50.813595 PCI: 00:0d.0 child on link 0 USB0 port 0
1526 19:42:50.823470 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1527 19:42:50.826744 USB0 port 0 child on link 0 USB3 port 0
1528 19:42:50.827237 USB3 port 0
1529 19:42:50.829833 USB3 port 1
1530 19:42:50.833399 USB3 port 2
1531 19:42:50.833903 USB3 port 3
1532 19:42:50.836320 PCI: 00:14.0 child on link 0 USB0 port 0
1533 19:42:50.846992 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1534 19:42:50.853500 USB0 port 0 child on link 0 USB2 port 0
1535 19:42:50.853994 USB2 port 0
1536 19:42:50.857136 USB2 port 1
1537 19:42:50.857628 USB2 port 2
1538 19:42:50.860056 USB2 port 3
1539 19:42:50.860540 USB2 port 4
1540 19:42:50.863899 USB2 port 5
1541 19:42:50.864408 USB2 port 6
1542 19:42:50.866545 USB2 port 7
1543 19:42:50.869976 USB2 port 8
1544 19:42:50.870368 USB2 port 9
1545 19:42:50.873692 USB3 port 0
1546 19:42:50.874043 USB3 port 1
1547 19:42:50.876669 USB3 port 2
1548 19:42:50.877052 USB3 port 3
1549 19:42:50.880371 PCI: 00:14.2
1550 19:42:50.889876 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1551 19:42:50.899961 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1552 19:42:50.903563 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1553 19:42:50.913259 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 19:42:50.917149 GENERIC: 0.0
1555 19:42:50.920292 PCI: 00:15.0 child on link 0 I2C: 00:1a
1556 19:42:50.929854 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1557 19:42:50.930346 I2C: 00:1a
1558 19:42:50.933412 I2C: 00:31
1559 19:42:50.933910 I2C: 00:32
1560 19:42:50.939997 PCI: 00:15.1 child on link 0 I2C: 00:50
1561 19:42:50.949943 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 19:42:50.950441 I2C: 00:50
1563 19:42:50.950725 PCI: 00:15.2
1564 19:42:50.956523 PCI: 00:15.3 child on link 0 I2C: 00:10
1565 19:42:50.966345 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 19:42:50.966841 I2C: 00:10
1567 19:42:50.969478 PCI: 00:16.0
1568 19:42:50.980132 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 19:42:50.980625 PCI: 00:19.0
1570 19:42:50.986356 PCI: 00:19.1 child on link 0 I2C: 00:15
1571 19:42:50.996293 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 19:42:50.996843 I2C: 00:15
1573 19:42:50.997128 I2C: 00:2c
1574 19:42:50.999569 PCI: 00:1e.0
1575 19:42:51.009837 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1576 19:42:51.016577 PCI: 00:1e.3 child on link 0 SPI: 00
1577 19:42:51.026198 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 19:42:51.026698 SPI: 00
1579 19:42:51.029567 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1580 19:42:51.039615 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1581 19:42:51.040118 PNP: 0c09.0
1582 19:42:51.049374 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1583 19:42:51.052862 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1584 19:42:51.062669 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1585 19:42:51.072615 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1586 19:42:51.075732 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1587 19:42:51.079766 GENERIC: 0.0
1588 19:42:51.083066 GENERIC: 1.0
1589 19:42:51.083556 PCI: 00:1f.3
1590 19:42:51.092589 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1591 19:42:51.103324 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1592 19:42:51.106341 PCI: 00:1f.5
1593 19:42:51.112696 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1594 19:42:51.122529 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1595 19:42:51.125789 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1596 19:42:51.132350 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1597 19:42:51.139101 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1598 19:42:51.142927 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1599 19:42:51.146216 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1600 19:42:51.155847 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1601 19:42:51.163280 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1602 19:42:51.169119 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1603 19:42:51.175632 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1604 19:42:51.182419 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1605 19:42:51.188983 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1606 19:42:51.198840 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1607 19:42:51.205326 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1608 19:42:51.209362 DOMAIN: 0000: Resource ranges:
1609 19:42:51.212005 * Base: 1000, Size: 800, Tag: 100
1610 19:42:51.215428 * Base: 1900, Size: e700, Tag: 100
1611 19:42:51.222441 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1612 19:42:51.229041 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1613 19:42:51.235214 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1614 19:42:51.242336 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1615 19:42:51.249077 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1616 19:42:51.258945 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1617 19:42:51.265195 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1618 19:42:51.272166 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1619 19:42:51.281669 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1620 19:42:51.288497 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1621 19:42:51.295116 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1622 19:42:51.304970 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1623 19:42:51.311703 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1624 19:42:51.318361 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1625 19:42:51.327998 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1626 19:42:51.334860 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1627 19:42:51.341722 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1628 19:42:51.351854 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1629 19:42:51.358270 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1630 19:42:51.364806 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1631 19:42:51.375028 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1632 19:42:51.381333 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1633 19:42:51.388050 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1634 19:42:51.397994 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1635 19:42:51.404527 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1636 19:42:51.411349 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1637 19:42:51.421527 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1638 19:42:51.427825 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1639 19:42:51.434555 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1640 19:42:51.445348 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1641 19:42:51.451201 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1642 19:42:51.457616 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1643 19:42:51.467822 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1644 19:42:51.470934 DOMAIN: 0000: Resource ranges:
1645 19:42:51.474454 * Base: 80400000, Size: 3fc00000, Tag: 200
1646 19:42:51.477769 * Base: d0000000, Size: 28000000, Tag: 200
1647 19:42:51.484074 * Base: fa000000, Size: 1000000, Tag: 200
1648 19:42:51.487721 * Base: fb001000, Size: 17ff000, Tag: 200
1649 19:42:51.490649 * Base: fe800000, Size: 300000, Tag: 200
1650 19:42:51.494191 * Base: feb80000, Size: 80000, Tag: 200
1651 19:42:51.500797 * Base: fed00000, Size: 40000, Tag: 200
1652 19:42:51.503893 * Base: fed70000, Size: 10000, Tag: 200
1653 19:42:51.507370 * Base: fed88000, Size: 8000, Tag: 200
1654 19:42:51.510726 * Base: fed93000, Size: d000, Tag: 200
1655 19:42:51.513507 * Base: feda2000, Size: 1e000, Tag: 200
1656 19:42:51.520736 * Base: fede0000, Size: 1220000, Tag: 200
1657 19:42:51.524049 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1658 19:42:51.530569 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1659 19:42:51.536833 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1660 19:42:51.544015 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1661 19:42:51.550830 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1662 19:42:51.556877 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1663 19:42:51.563686 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1664 19:42:51.570385 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1665 19:42:51.576954 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1666 19:42:51.583880 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1667 19:42:51.590104 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1668 19:42:51.596566 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1669 19:42:51.603050 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1670 19:42:51.610190 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1671 19:42:51.616971 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1672 19:42:51.623175 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1673 19:42:51.629740 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1674 19:42:51.636505 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1675 19:42:51.643106 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1676 19:42:51.650294 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1677 19:42:51.659960 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1678 19:42:51.666322 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1679 19:42:51.670430 PCI: 00:06.0: Resource ranges:
1680 19:42:51.673097 * Base: 80400000, Size: 100000, Tag: 200
1681 19:42:51.679475 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1682 19:42:51.686667 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1683 19:42:51.696340 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1684 19:42:51.702950 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1685 19:42:51.706734 Root Device assign_resources, bus 0 link: 0
1686 19:42:51.712573 DOMAIN: 0000 assign_resources, bus 0 link: 0
1687 19:42:51.719427 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1688 19:42:51.729414 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1689 19:42:51.735993 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1690 19:42:51.742799 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1691 19:42:51.749193 PCI: 00:04.0 assign_resources, bus 1 link: 0
1692 19:42:51.752699 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1693 19:42:51.762499 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1694 19:42:51.772490 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1695 19:42:51.779835 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1696 19:42:51.786034 PCI: 00:06.0 assign_resources, bus 1 link: 0
1697 19:42:51.793131 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1698 19:42:51.799293 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1699 19:42:51.805649 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1700 19:42:51.812386 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1701 19:42:51.822567 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1702 19:42:51.825887 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1703 19:42:51.832271 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1704 19:42:51.838686 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1705 19:42:51.842402 PCI: 00:14.0 assign_resources, bus 0 link: 0
1706 19:42:51.848871 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1707 19:42:51.855858 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1708 19:42:51.865519 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1709 19:42:51.872184 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1710 19:42:51.875710 PCI: 00:14.3 assign_resources, bus 0 link: 0
1711 19:42:51.882144 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1712 19:42:51.888900 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1713 19:42:51.895082 PCI: 00:15.0 assign_resources, bus 0 link: 0
1714 19:42:51.898980 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1715 19:42:51.908724 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1716 19:42:51.911870 PCI: 00:15.1 assign_resources, bus 0 link: 0
1717 19:42:51.918808 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1718 19:42:51.924598 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1719 19:42:51.928227 PCI: 00:15.3 assign_resources, bus 0 link: 0
1720 19:42:51.935853 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1721 19:42:51.941348 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1722 19:42:51.951786 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1723 19:42:51.954593 PCI: 00:19.1 assign_resources, bus 0 link: 0
1724 19:42:51.961508 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1725 19:42:51.968008 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1726 19:42:51.971268 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1727 19:42:51.978234 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1728 19:42:51.981421 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1729 19:42:51.987704 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1730 19:42:51.991564 LPC: Trying to open IO window from 800 size 1ff
1731 19:42:52.001601 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1732 19:42:52.007607 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1733 19:42:52.014409 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1734 19:42:52.021464 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1735 19:42:52.024436 Root Device assign_resources, bus 0 link: 0 done
1736 19:42:52.027777 Done setting resources.
1737 19:42:52.034054 Show resources in subtree (Root Device)...After assigning values.
1738 19:42:52.037613 Root Device child on link 0 CPU_CLUSTER: 0
1739 19:42:52.044277 CPU_CLUSTER: 0 child on link 0 APIC: 00
1740 19:42:52.044793 APIC: 00
1741 19:42:52.045075 APIC: 12
1742 19:42:52.047398 APIC: 14
1743 19:42:52.047777 APIC: 16
1744 19:42:52.051231 APIC: 10
1745 19:42:52.051678 APIC: 01
1746 19:42:52.051926 APIC: 08
1747 19:42:52.054611 APIC: 09
1748 19:42:52.058676 DOMAIN: 0000 child on link 0 GPIO: 0
1749 19:42:52.067829 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1750 19:42:52.077650 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1751 19:42:52.078146 GPIO: 0
1752 19:42:52.078424 PCI: 00:00.0
1753 19:42:52.087546 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1754 19:42:52.097527 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1755 19:42:52.107253 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1756 19:42:52.117328 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1757 19:42:52.127524 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1758 19:42:52.133650 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1759 19:42:52.143906 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1760 19:42:52.153717 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1761 19:42:52.163694 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1762 19:42:52.174658 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1763 19:42:52.183756 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1764 19:42:52.193659 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1765 19:42:52.200089 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1766 19:42:52.210441 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1767 19:42:52.220322 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1768 19:42:52.229817 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1769 19:42:52.240129 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1770 19:42:52.249664 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1771 19:42:52.259794 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1772 19:42:52.270256 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1773 19:42:52.279931 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1774 19:42:52.286950 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1775 19:42:52.296217 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1776 19:42:52.306597 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1777 19:42:52.316512 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1778 19:42:52.326310 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1779 19:42:52.336471 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1780 19:42:52.346185 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1781 19:42:52.346673 PCI: 00:02.0
1782 19:42:52.356380 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1783 19:42:52.369570 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1784 19:42:52.375559 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1785 19:42:52.382660 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1786 19:42:52.392958 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1787 19:42:52.393461 GENERIC: 0.0
1788 19:42:52.399123 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1789 19:42:52.406004 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1790 19:42:52.418966 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1791 19:42:52.428915 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1792 19:42:52.432538 PCI: 01:00.0
1793 19:42:52.441915 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1794 19:42:52.452812 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1795 19:42:52.453260 PCI: 00:08.0
1796 19:42:52.455636 PCI: 00:0a.0
1797 19:42:52.465065 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1798 19:42:52.468893 PCI: 00:0d.0 child on link 0 USB0 port 0
1799 19:42:52.482119 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1800 19:42:52.484884 USB0 port 0 child on link 0 USB3 port 0
1801 19:42:52.485266 USB3 port 0
1802 19:42:52.489263 USB3 port 1
1803 19:42:52.489763 USB3 port 2
1804 19:42:52.491891 USB3 port 3
1805 19:42:52.495346 PCI: 00:14.0 child on link 0 USB0 port 0
1806 19:42:52.505288 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1807 19:42:52.511867 USB0 port 0 child on link 0 USB2 port 0
1808 19:42:52.512348 USB2 port 0
1809 19:42:52.515290 USB2 port 1
1810 19:42:52.515671 USB2 port 2
1811 19:42:52.518296 USB2 port 3
1812 19:42:52.518779 USB2 port 4
1813 19:42:52.522066 USB2 port 5
1814 19:42:52.522634 USB2 port 6
1815 19:42:52.525202 USB2 port 7
1816 19:42:52.529004 USB2 port 8
1817 19:42:52.529489 USB2 port 9
1818 19:42:52.531986 USB3 port 0
1819 19:42:52.532480 USB3 port 1
1820 19:42:52.535101 USB3 port 2
1821 19:42:52.535587 USB3 port 3
1822 19:42:52.538629 PCI: 00:14.2
1823 19:42:52.548546 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1824 19:42:52.558678 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1825 19:42:52.561405 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1826 19:42:52.571903 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1827 19:42:52.575327 GENERIC: 0.0
1828 19:42:52.578434 PCI: 00:15.0 child on link 0 I2C: 00:1a
1829 19:42:52.588688 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1830 19:42:52.592080 I2C: 00:1a
1831 19:42:52.592577 I2C: 00:31
1832 19:42:52.594727 I2C: 00:32
1833 19:42:52.597792 PCI: 00:15.1 child on link 0 I2C: 00:50
1834 19:42:52.608187 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1835 19:42:52.611770 I2C: 00:50
1836 19:42:52.612271 PCI: 00:15.2
1837 19:42:52.617482 PCI: 00:15.3 child on link 0 I2C: 00:10
1838 19:42:52.628004 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1839 19:42:52.628483 I2C: 00:10
1840 19:42:52.631026 PCI: 00:16.0
1841 19:42:52.641237 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1842 19:42:52.641739 PCI: 00:19.0
1843 19:42:52.647039 PCI: 00:19.1 child on link 0 I2C: 00:15
1844 19:42:52.658210 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1845 19:42:52.658711 I2C: 00:15
1846 19:42:52.661231 I2C: 00:2c
1847 19:42:52.661725 PCI: 00:1e.0
1848 19:42:52.671058 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1849 19:42:52.678278 PCI: 00:1e.3 child on link 0 SPI: 00
1850 19:42:52.687907 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1851 19:42:52.688409 SPI: 00
1852 19:42:52.692163 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1853 19:42:52.701290 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1854 19:42:52.703769 PNP: 0c09.0
1855 19:42:52.711291 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1856 19:42:52.717671 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1857 19:42:52.724037 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1858 19:42:52.733998 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1859 19:42:52.740820 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1860 19:42:52.741325 GENERIC: 0.0
1861 19:42:52.744324 GENERIC: 1.0
1862 19:42:52.744846 PCI: 00:1f.3
1863 19:42:52.753882 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1864 19:42:52.767109 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1865 19:42:52.767605 PCI: 00:1f.5
1866 19:42:52.777247 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1867 19:42:52.780450 Done allocating resources.
1868 19:42:52.787515 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1869 19:42:52.790267 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1870 19:42:52.797106 Configure audio over I2S with MAX98373 NAU88L25B.
1871 19:42:52.801218 Enabling BT offload
1872 19:42:52.808486 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1873 19:42:52.812003 Enabling resources...
1874 19:42:52.815244 PCI: 00:00.0 subsystem <- 8086/4609
1875 19:42:52.818320 PCI: 00:00.0 cmd <- 06
1876 19:42:52.822052 PCI: 00:02.0 subsystem <- 8086/46b3
1877 19:42:52.825460 PCI: 00:02.0 cmd <- 03
1878 19:42:52.828580 PCI: 00:04.0 subsystem <- 8086/461d
1879 19:42:52.829113 PCI: 00:04.0 cmd <- 02
1880 19:42:52.831845 PCI: 00:06.0 bridge ctrl <- 0013
1881 19:42:52.835883 PCI: 00:06.0 subsystem <- 8086/464d
1882 19:42:52.838671 PCI: 00:06.0 cmd <- 106
1883 19:42:52.842222 PCI: 00:0a.0 subsystem <- 8086/467d
1884 19:42:52.845120 PCI: 00:0a.0 cmd <- 02
1885 19:42:52.848389 PCI: 00:0d.0 subsystem <- 8086/461e
1886 19:42:52.851723 PCI: 00:0d.0 cmd <- 02
1887 19:42:52.855059 PCI: 00:14.0 subsystem <- 8086/51ed
1888 19:42:52.858345 PCI: 00:14.0 cmd <- 02
1889 19:42:52.861614 PCI: 00:14.2 subsystem <- 8086/51ef
1890 19:42:52.862074 PCI: 00:14.2 cmd <- 02
1891 19:42:52.868374 PCI: 00:14.3 subsystem <- 8086/51f0
1892 19:42:52.868908 PCI: 00:14.3 cmd <- 02
1893 19:42:52.871909 PCI: 00:15.0 subsystem <- 8086/51e8
1894 19:42:52.875017 PCI: 00:15.0 cmd <- 02
1895 19:42:52.878514 PCI: 00:15.1 subsystem <- 8086/51e9
1896 19:42:52.881136 PCI: 00:15.1 cmd <- 06
1897 19:42:52.885296 PCI: 00:15.3 subsystem <- 8086/51eb
1898 19:42:52.888433 PCI: 00:15.3 cmd <- 02
1899 19:42:52.891717 PCI: 00:16.0 subsystem <- 8086/51e0
1900 19:42:52.892389 PCI: 00:16.0 cmd <- 02
1901 19:42:52.898289 PCI: 00:19.1 subsystem <- 8086/51c6
1902 19:42:52.898788 PCI: 00:19.1 cmd <- 02
1903 19:42:52.901423 PCI: 00:1e.0 subsystem <- 8086/51a8
1904 19:42:52.904794 PCI: 00:1e.0 cmd <- 06
1905 19:42:52.907757 PCI: 00:1e.3 subsystem <- 8086/51ab
1906 19:42:52.911467 PCI: 00:1e.3 cmd <- 02
1907 19:42:52.914992 PCI: 00:1f.0 subsystem <- 8086/5182
1908 19:42:52.918253 PCI: 00:1f.0 cmd <- 407
1909 19:42:52.921717 PCI: 00:1f.3 subsystem <- 8086/51c8
1910 19:42:52.922101 PCI: 00:1f.3 cmd <- 02
1911 19:42:52.928099 PCI: 00:1f.5 subsystem <- 8086/51a4
1912 19:42:52.928574 PCI: 00:1f.5 cmd <- 406
1913 19:42:52.931415 PCI: 01:00.0 cmd <- 02
1914 19:42:52.931888 done.
1915 19:42:52.938275 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1916 19:42:52.941369 ME: Version: Unavailable
1917 19:42:52.944927 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1918 19:42:52.947725 Initializing devices...
1919 19:42:52.951828 Root Device init
1920 19:42:52.952331 mainboard: EC init
1921 19:42:52.957995 Chrome EC: Set SMI mask to 0x0000000000000000
1922 19:42:52.961311 Chrome EC: UHEPI supported
1923 19:42:52.964516 Chrome EC: clear events_b mask to 0x0000000000000000
1924 19:42:52.972429 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1925 19:42:52.978731 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1926 19:42:52.984726 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1927 19:42:52.991496 Chrome EC: Set WAKE mask to 0x0000000000000000
1928 19:42:52.994967 Root Device init finished in 42 msecs
1929 19:42:52.998450 PCI: 00:00.0 init
1930 19:42:53.002294 CPU TDP = 15 Watts
1931 19:42:53.002811 CPU PL1 = 15 Watts
1932 19:42:53.004841 CPU PL2 = 55 Watts
1933 19:42:53.008429 CPU PL4 = 123 Watts
1934 19:42:53.011826 PCI: 00:00.0 init finished in 8 msecs
1935 19:42:53.012309 PCI: 00:02.0 init
1936 19:42:53.014868 GMA: Found VBT in CBFS
1937 19:42:53.018125 GMA: Found valid VBT in CBFS
1938 19:42:53.024720 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1939 19:42:53.031806 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1940 19:42:53.034739 PCI: 00:02.0 init finished in 18 msecs
1941 19:42:53.038171 PCI: 00:06.0 init
1942 19:42:53.041168 Initializing PCH PCIe bridge.
1943 19:42:53.045202 PCI: 00:06.0 init finished in 3 msecs
1944 19:42:53.045729 PCI: 00:0a.0 init
1945 19:42:53.051608 PCI: 00:0a.0 init finished in 0 msecs
1946 19:42:53.052114 PCI: 00:14.0 init
1947 19:42:53.055248 PCI: 00:14.0 init finished in 0 msecs
1948 19:42:53.058072 PCI: 00:14.2 init
1949 19:42:53.062038 PCI: 00:14.2 init finished in 0 msecs
1950 19:42:53.065223 PCI: 00:15.0 init
1951 19:42:53.065724 I2C bus 0 version 0x3230302a
1952 19:42:53.071355 DW I2C bus 0 at 0x80655000 (400 KHz)
1953 19:42:53.074839 PCI: 00:15.0 init finished in 6 msecs
1954 19:42:53.075342 PCI: 00:15.1 init
1955 19:42:53.078144 I2C bus 1 version 0x3230302a
1956 19:42:53.081524 DW I2C bus 1 at 0x80656000 (400 KHz)
1957 19:42:53.084957 PCI: 00:15.1 init finished in 6 msecs
1958 19:42:53.088279 PCI: 00:15.3 init
1959 19:42:53.091342 I2C bus 3 version 0x3230302a
1960 19:42:53.095184 DW I2C bus 3 at 0x80657000 (400 KHz)
1961 19:42:53.097399 PCI: 00:15.3 init finished in 6 msecs
1962 19:42:53.101270 PCI: 00:16.0 init
1963 19:42:53.104346 PCI: 00:16.0 init finished in 0 msecs
1964 19:42:53.104869 PCI: 00:19.1 init
1965 19:42:53.107530 I2C bus 5 version 0x3230302a
1966 19:42:53.110802 DW I2C bus 5 at 0x80659000 (400 KHz)
1967 19:42:53.117787 PCI: 00:19.1 init finished in 6 msecs
1968 19:42:53.118268 PCI: 00:1f.0 init
1969 19:42:53.121706 IOAPIC: Initializing IOAPIC at 0xfec00000
1970 19:42:53.123876 IOAPIC: ID = 0x02
1971 19:42:53.127442 IOAPIC: Dumping registers
1972 19:42:53.130621 reg 0x0000: 0x02000000
1973 19:42:53.131047 reg 0x0001: 0x00770020
1974 19:42:53.134368 reg 0x0002: 0x00000000
1975 19:42:53.137898 IOAPIC: 120 interrupts
1976 19:42:53.140840 IOAPIC: Clearing IOAPIC at 0xfec00000
1977 19:42:53.144273 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1978 19:42:53.150752 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1979 19:42:53.154058 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1980 19:42:53.161198 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1981 19:42:53.164124 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1982 19:42:53.170915 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1983 19:42:53.174366 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1984 19:42:53.181021 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1985 19:42:53.184279 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1986 19:42:53.187605 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1987 19:42:53.194081 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1988 19:42:53.197692 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1989 19:42:53.204258 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1990 19:42:53.207351 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1991 19:42:53.213951 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1992 19:42:53.217189 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1993 19:42:53.220472 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1994 19:42:53.227293 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1995 19:42:53.230273 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1996 19:42:53.237459 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1997 19:42:53.240193 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1998 19:42:53.247224 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1999 19:42:53.250758 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2000 19:42:53.257608 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2001 19:42:53.260276 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2002 19:42:53.263583 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2003 19:42:53.270389 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2004 19:42:53.273697 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2005 19:42:53.281175 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2006 19:42:53.283816 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2007 19:42:53.290714 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2008 19:42:53.293458 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2009 19:42:53.300453 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2010 19:42:53.304228 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2011 19:42:53.307063 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2012 19:42:53.313457 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2013 19:42:53.316889 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2014 19:42:53.323345 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2015 19:42:53.326745 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2016 19:42:53.333126 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2017 19:42:53.336676 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2018 19:42:53.343832 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2019 19:42:53.346531 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2020 19:42:53.349372 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2021 19:42:53.357123 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2022 19:42:53.360160 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2023 19:42:53.366487 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2024 19:42:53.370334 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2025 19:42:53.376801 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2026 19:42:53.380416 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2027 19:42:53.386704 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2028 19:42:53.390123 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2029 19:42:53.396428 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2030 19:42:53.399664 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2031 19:42:53.403101 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2032 19:42:53.410020 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2033 19:42:53.413027 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2034 19:42:53.419866 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2035 19:42:53.423222 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2036 19:42:53.429407 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2037 19:42:53.433077 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2038 19:42:53.436325 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2039 19:42:53.443249 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2040 19:42:53.446455 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2041 19:42:53.452892 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2042 19:42:53.456152 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2043 19:42:53.462698 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2044 19:42:53.466191 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2045 19:42:53.472923 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2046 19:42:53.475733 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2047 19:42:53.482615 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2048 19:42:53.485832 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2049 19:42:53.488711 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2050 19:42:53.495722 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2051 19:42:53.498628 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2052 19:42:53.505526 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2053 19:42:53.508843 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2054 19:42:53.515708 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2055 19:42:53.518637 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2056 19:42:53.525301 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2057 19:42:53.529311 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2058 19:42:53.532062 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2059 19:42:53.539546 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2060 19:42:53.542269 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2061 19:42:53.549351 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2062 19:42:53.552231 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2063 19:42:53.558752 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2064 19:42:53.562067 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2065 19:42:53.565296 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2066 19:42:53.572170 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2067 19:42:53.575488 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2068 19:42:53.582309 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2069 19:42:53.585418 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2070 19:42:53.592124 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2071 19:42:53.595491 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2072 19:42:53.602326 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2073 19:42:53.605387 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2074 19:42:53.608783 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2075 19:42:53.615318 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2076 19:42:53.619169 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2077 19:42:53.625662 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2078 19:42:53.629089 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2079 19:42:53.635439 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2080 19:42:53.638924 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2081 19:42:53.645570 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2082 19:42:53.648416 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2083 19:42:53.652418 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2084 19:42:53.658797 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2085 19:42:53.661833 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2086 19:42:53.668892 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2087 19:42:53.672096 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2088 19:42:53.678725 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2089 19:42:53.681585 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2090 19:42:53.689411 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2091 19:42:53.691958 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2092 19:42:53.695270 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2093 19:42:53.701726 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2094 19:42:53.705139 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2095 19:42:53.711886 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2096 19:42:53.714871 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2097 19:42:53.721895 IOAPIC: Bootstrap Processor Local APIC = 0x00
2098 19:42:53.725129 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2099 19:42:53.728922 PCI: 00:1f.0 init finished in 607 msecs
2100 19:42:53.731436 PCI: 00:1f.2 init
2101 19:42:53.734741 apm_control: Disabling ACPI.
2102 19:42:53.740170 APMC done.
2103 19:42:53.743385 PCI: 00:1f.2 init finished in 8 msecs
2104 19:42:53.746637 PCI: 00:1f.3 init
2105 19:42:53.749940 PCI: 00:1f.3 init finished in 0 msecs
2106 19:42:53.750307 PCI: 01:00.0 init
2107 19:42:53.753104 PCI: 01:00.0 init finished in 0 msecs
2108 19:42:53.756672 PNP: 0c09.0 init
2109 19:42:53.760186 Google Chrome EC uptime: 12.144 seconds
2110 19:42:53.766748 Google Chrome AP resets since EC boot: 1
2111 19:42:53.770044 Google Chrome most recent AP reset causes:
2112 19:42:53.773187 0.341: 32775 shutdown: entering G3
2113 19:42:53.779475 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2114 19:42:53.783223 PNP: 0c09.0 init finished in 23 msecs
2115 19:42:53.786288 GENERIC: 0.0 init
2116 19:42:53.789536 GENERIC: 0.0 init finished in 0 msecs
2117 19:42:53.790033 GENERIC: 1.0 init
2118 19:42:53.796375 GENERIC: 1.0 init finished in 0 msecs
2119 19:42:53.796927 Devices initialized
2120 19:42:53.799495 Show all devs... After init.
2121 19:42:53.803037 Root Device: enabled 1
2122 19:42:53.806003 CPU_CLUSTER: 0: enabled 1
2123 19:42:53.806395 DOMAIN: 0000: enabled 1
2124 19:42:53.809579 GPIO: 0: enabled 1
2125 19:42:53.812394 PCI: 00:00.0: enabled 1
2126 19:42:53.812791 PCI: 00:01.0: enabled 0
2127 19:42:53.816594 PCI: 00:01.1: enabled 0
2128 19:42:53.819401 PCI: 00:02.0: enabled 1
2129 19:42:53.822640 PCI: 00:04.0: enabled 1
2130 19:42:53.823142 PCI: 00:05.0: enabled 0
2131 19:42:53.826095 PCI: 00:06.0: enabled 1
2132 19:42:53.829509 PCI: 00:06.2: enabled 0
2133 19:42:53.832725 PCI: 00:07.0: enabled 0
2134 19:42:53.833147 PCI: 00:07.1: enabled 0
2135 19:42:53.836170 PCI: 00:07.2: enabled 0
2136 19:42:53.839552 PCI: 00:07.3: enabled 0
2137 19:42:53.840056 PCI: 00:08.0: enabled 0
2138 19:42:53.842687 PCI: 00:09.0: enabled 0
2139 19:42:53.846114 PCI: 00:0a.0: enabled 1
2140 19:42:53.849290 PCI: 00:0d.0: enabled 1
2141 19:42:53.849878 PCI: 00:0d.1: enabled 0
2142 19:42:53.852899 PCI: 00:0d.2: enabled 0
2143 19:42:53.856060 PCI: 00:0d.3: enabled 0
2144 19:42:53.859270 PCI: 00:0e.0: enabled 0
2145 19:42:53.859770 PCI: 00:10.0: enabled 0
2146 19:42:53.862888 PCI: 00:10.1: enabled 0
2147 19:42:53.865943 PCI: 00:10.6: enabled 0
2148 19:42:53.869355 PCI: 00:10.7: enabled 0
2149 19:42:53.869855 PCI: 00:12.0: enabled 0
2150 19:42:53.872340 PCI: 00:12.6: enabled 0
2151 19:42:53.875891 PCI: 00:12.7: enabled 0
2152 19:42:53.879285 PCI: 00:13.0: enabled 0
2153 19:42:53.879789 PCI: 00:14.0: enabled 1
2154 19:42:53.882719 PCI: 00:14.1: enabled 0
2155 19:42:53.886466 PCI: 00:14.2: enabled 1
2156 19:42:53.886970 PCI: 00:14.3: enabled 1
2157 19:42:53.889543 PCI: 00:15.0: enabled 1
2158 19:42:53.892830 PCI: 00:15.1: enabled 1
2159 19:42:53.895821 PCI: 00:15.2: enabled 0
2160 19:42:53.896363 PCI: 00:15.3: enabled 1
2161 19:42:53.899271 PCI: 00:16.0: enabled 1
2162 19:42:53.902509 PCI: 00:16.1: enabled 0
2163 19:42:53.905778 PCI: 00:16.2: enabled 0
2164 19:42:53.906166 PCI: 00:16.3: enabled 0
2165 19:42:53.909041 PCI: 00:16.4: enabled 0
2166 19:42:53.912647 PCI: 00:16.5: enabled 0
2167 19:42:53.915913 PCI: 00:17.0: enabled 0
2168 19:42:53.916424 PCI: 00:19.0: enabled 0
2169 19:42:53.918822 PCI: 00:19.1: enabled 1
2170 19:42:53.922855 PCI: 00:19.2: enabled 0
2171 19:42:53.925511 PCI: 00:1a.0: enabled 0
2172 19:42:53.925902 PCI: 00:1c.0: enabled 0
2173 19:42:53.928701 PCI: 00:1c.1: enabled 0
2174 19:42:53.932216 PCI: 00:1c.2: enabled 0
2175 19:42:53.932567 PCI: 00:1c.3: enabled 0
2176 19:42:53.935231 PCI: 00:1c.4: enabled 0
2177 19:42:53.939050 PCI: 00:1c.5: enabled 0
2178 19:42:53.942027 PCI: 00:1c.6: enabled 0
2179 19:42:53.942386 PCI: 00:1c.7: enabled 0
2180 19:42:53.945402 PCI: 00:1d.0: enabled 0
2181 19:42:53.948869 PCI: 00:1d.1: enabled 0
2182 19:42:53.952027 PCI: 00:1d.2: enabled 0
2183 19:42:53.952509 PCI: 00:1d.3: enabled 0
2184 19:42:53.955824 PCI: 00:1e.0: enabled 1
2185 19:42:53.958220 PCI: 00:1e.1: enabled 0
2186 19:42:53.961877 PCI: 00:1e.2: enabled 0
2187 19:42:53.962347 PCI: 00:1e.3: enabled 1
2188 19:42:53.964929 PCI: 00:1f.0: enabled 1
2189 19:42:53.968365 PCI: 00:1f.1: enabled 0
2190 19:42:53.972549 PCI: 00:1f.2: enabled 1
2191 19:42:53.973105 PCI: 00:1f.3: enabled 1
2192 19:42:53.974963 PCI: 00:1f.4: enabled 0
2193 19:42:53.978307 PCI: 00:1f.5: enabled 1
2194 19:42:53.982412 PCI: 00:1f.6: enabled 0
2195 19:42:53.982920 PCI: 00:1f.7: enabled 0
2196 19:42:53.984640 GENERIC: 0.0: enabled 1
2197 19:42:53.988403 GENERIC: 0.0: enabled 1
2198 19:42:53.988958 GENERIC: 1.0: enabled 1
2199 19:42:53.991865 GENERIC: 0.0: enabled 1
2200 19:42:53.995876 GENERIC: 1.0: enabled 1
2201 19:42:53.998937 USB0 port 0: enabled 1
2202 19:42:53.999447 USB0 port 0: enabled 1
2203 19:42:54.001814 GENERIC: 0.0: enabled 1
2204 19:42:54.005421 I2C: 00:1a: enabled 1
2205 19:42:54.005926 I2C: 00:31: enabled 1
2206 19:42:54.008237 I2C: 00:32: enabled 1
2207 19:42:54.011826 I2C: 00:50: enabled 1
2208 19:42:54.012366 I2C: 00:10: enabled 1
2209 19:42:54.014769 I2C: 00:15: enabled 1
2210 19:42:54.018138 I2C: 00:2c: enabled 1
2211 19:42:54.021274 GENERIC: 0.0: enabled 1
2212 19:42:54.021631 SPI: 00: enabled 1
2213 19:42:54.024615 PNP: 0c09.0: enabled 1
2214 19:42:54.028216 GENERIC: 0.0: enabled 1
2215 19:42:54.028735 USB3 port 0: enabled 1
2216 19:42:54.031054 USB3 port 1: enabled 0
2217 19:42:54.034667 USB3 port 2: enabled 1
2218 19:42:54.035142 USB3 port 3: enabled 0
2219 19:42:54.037845 USB2 port 0: enabled 1
2220 19:42:54.041195 USB2 port 1: enabled 0
2221 19:42:54.044794 USB2 port 2: enabled 1
2222 19:42:54.045313 USB2 port 3: enabled 0
2223 19:42:54.047883 USB2 port 4: enabled 0
2224 19:42:54.051469 USB2 port 5: enabled 1
2225 19:42:54.051866 USB2 port 6: enabled 0
2226 19:42:54.054681 USB2 port 7: enabled 0
2227 19:42:54.057735 USB2 port 8: enabled 1
2228 19:42:54.061209 USB2 port 9: enabled 1
2229 19:42:54.061683 USB3 port 0: enabled 1
2230 19:42:54.064846 USB3 port 1: enabled 0
2231 19:42:54.067807 USB3 port 2: enabled 0
2232 19:42:54.068304 USB3 port 3: enabled 0
2233 19:42:54.071340 GENERIC: 0.0: enabled 1
2234 19:42:54.074730 GENERIC: 1.0: enabled 1
2235 19:42:54.075238 APIC: 00: enabled 1
2236 19:42:54.078532 APIC: 12: enabled 1
2237 19:42:54.081463 APIC: 14: enabled 1
2238 19:42:54.081967 APIC: 16: enabled 1
2239 19:42:54.084488 APIC: 10: enabled 1
2240 19:42:54.087998 APIC: 01: enabled 1
2241 19:42:54.088499 APIC: 08: enabled 1
2242 19:42:54.091030 APIC: 09: enabled 1
2243 19:42:54.094441 PCI: 01:00.0: enabled 1
2244 19:42:54.098329 BS: BS_DEV_INIT run times (exec / console): 14 / 1133 ms
2245 19:42:54.104216 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2246 19:42:54.107951 ELOG: NV offset 0xf20000 size 0x4000
2247 19:42:54.113914 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2248 19:42:54.121347 ELOG: Event(17) added with size 13 at 2024-02-07 19:42:55 UTC
2249 19:42:54.127336 ELOG: Event(9E) added with size 10 at 2024-02-07 19:42:55 UTC
2250 19:42:54.133718 ELOG: Event(9F) added with size 14 at 2024-02-07 19:42:55 UTC
2251 19:42:54.140683 ELOG: Event(16) added with size 11 at 2024-02-07 19:42:55 UTC
2252 19:42:54.143594 Erasing flash addr f20000 + 4 KiB
2253 19:42:54.196902 BS: BS_DEV_INIT exit times (exec / console): 48 / 43 ms
2254 19:42:54.203987 ELOG: Event(A0) added with size 9 at 2024-02-07 19:42:55 UTC
2255 19:42:54.207073 elog_add_boot_reason: Logged dev mode boot
2256 19:42:54.213267 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2257 19:42:54.216460 Finalize devices...
2258 19:42:54.216894 PCI: 00:16.0 final
2259 19:42:54.220124 PCI: 00:1f.2 final
2260 19:42:54.223471 GENERIC: 0.0 final
2261 19:42:54.226890 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2262 19:42:54.230600 GENERIC: 1.0 final
2263 19:42:54.236554 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2264 19:42:54.237152 Devices finalized
2265 19:42:54.243302 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2266 19:42:54.249473 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2267 19:42:54.253257 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2268 19:42:54.259787 ME: HFSTS1 : 0x90000245
2269 19:42:54.262989 ME: HFSTS2 : 0x82100116
2270 19:42:54.266929 ME: HFSTS3 : 0x00000050
2271 19:42:54.273213 ME: HFSTS4 : 0x00004000
2272 19:42:54.276826 ME: HFSTS5 : 0x00000000
2273 19:42:54.282989 ME: HFSTS6 : 0x40600006
2274 19:42:54.286668 ME: Manufacturing Mode : NO
2275 19:42:54.289355 ME: SPI Protection Mode Enabled : YES
2276 19:42:54.292532 ME: FPFs Committed : YES
2277 19:42:54.296694 ME: Manufacturing Vars Locked : YES
2278 19:42:54.299748 ME: FW Partition Table : OK
2279 19:42:54.303403 ME: Bringup Loader Failure : NO
2280 19:42:54.306632 ME: Firmware Init Complete : YES
2281 19:42:54.313446 ME: Boot Options Present : NO
2282 19:42:54.316032 ME: Update In Progress : NO
2283 19:42:54.319685 ME: D0i3 Support : YES
2284 19:42:54.322878 ME: Low Power State Enabled : NO
2285 19:42:54.326600 ME: CPU Replaced : YES
2286 19:42:54.329550 ME: CPU Replacement Valid : YES
2287 19:42:54.333099 ME: Current Working State : 5
2288 19:42:54.336736 ME: Current Operation State : 1
2289 19:42:54.343045 ME: Current Operation Mode : 0
2290 19:42:54.346373 ME: Error Code : 0
2291 19:42:54.349263 ME: Enhanced Debug Mode : NO
2292 19:42:54.353127 ME: CPU Debug Disabled : YES
2293 19:42:54.356431 ME: TXT Support : NO
2294 19:42:54.359413 ME: WP for RO is enabled : YES
2295 19:42:54.366308 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2296 19:42:54.372783 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2297 19:42:54.376881 Ramoops buffer: 0x100000@0x76899000.
2298 19:42:54.382396 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2299 19:42:54.389520 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2300 19:42:54.393115 CBFS: 'fallback/slic' not found.
2301 19:42:54.395668 ACPI: Writing ACPI tables at 7686d000.
2302 19:42:54.399977 ACPI: * FACS
2303 19:42:54.400506 ACPI: * DSDT
2304 19:42:54.405795 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2305 19:42:54.409964 ACPI: * FADT
2306 19:42:54.410457 SCI is IRQ9
2307 19:42:54.416437 ACPI: added table 1/32, length now 40
2308 19:42:54.416943 ACPI: * SSDT
2309 19:42:54.422842 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2310 19:42:54.426227 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2311 19:42:54.433125 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2312 19:42:54.436259 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2313 19:42:54.443189 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2314 19:42:54.446377 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2315 19:42:54.453236 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2316 19:42:54.459604 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2317 19:42:54.462978 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2318 19:42:54.469433 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2319 19:42:54.472819 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2320 19:42:54.479573 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2321 19:42:54.483339 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2322 19:42:54.489412 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2323 19:42:54.495890 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2324 19:42:54.499423 PS2K: Passing 80 keymaps to kernel
2325 19:42:54.506330 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2326 19:42:54.512821 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2327 19:42:54.519002 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2328 19:42:54.526610 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2329 19:42:54.529453 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2330 19:42:54.535927 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2331 19:42:54.542091 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2332 19:42:54.549003 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2333 19:42:54.555928 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2334 19:42:54.561860 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2335 19:42:54.565299 ACPI: added table 2/32, length now 44
2336 19:42:54.568703 ACPI: * MCFG
2337 19:42:54.572659 ACPI: added table 3/32, length now 48
2338 19:42:54.573181 ACPI: * TPM2
2339 19:42:54.575508 TPM2 log created at 0x7685d000
2340 19:42:54.578638 ACPI: added table 4/32, length now 52
2341 19:42:54.582452 ACPI: * LPIT
2342 19:42:54.585240 ACPI: added table 5/32, length now 56
2343 19:42:54.588510 ACPI: * MADT
2344 19:42:54.588984 SCI is IRQ9
2345 19:42:54.591860 ACPI: added table 6/32, length now 60
2346 19:42:54.595109 cmd_reg from pmc_make_ipc_cmd 1052838
2347 19:42:54.602535 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2348 19:42:54.609241 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2349 19:42:54.615542 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2350 19:42:54.618748 PMC CrashLog size in discovery mode: 0xC00
2351 19:42:54.621599 cpu crashlog bar addr: 0x80640000
2352 19:42:54.625050 cpu discovery table offset: 0x6030
2353 19:42:54.632008 cpu_crashlog_discovery_table buffer count: 0x3
2354 19:42:54.635483 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2355 19:42:54.641583 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2356 19:42:54.651898 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2357 19:42:54.655487 PMC crashLog size in discovery mode : 0xC00
2358 19:42:54.662064 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2359 19:42:54.665216 discover mode PMC crashlog size adjusted to: 0x200
2360 19:42:54.672311 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2361 19:42:54.678742 discover mode PMC crashlog size adjusted to: 0x0
2362 19:42:54.681831 m_cpu_crashLog_size : 0x3480 bytes
2363 19:42:54.685008 CPU crashLog present.
2364 19:42:54.688390 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2365 19:42:54.695044 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2366 19:42:54.698161 current = 76876550
2367 19:42:54.698661 ACPI: * DMAR
2368 19:42:54.705035 ACPI: added table 7/32, length now 64
2369 19:42:54.708491 ACPI: added table 8/32, length now 68
2370 19:42:54.709023 ACPI: * HPET
2371 19:42:54.711564 ACPI: added table 9/32, length now 72
2372 19:42:54.715125 ACPI: done.
2373 19:42:54.718534 ACPI tables: 38528 bytes.
2374 19:42:54.721660 smbios_write_tables: 76857000
2375 19:42:54.724848 EC returned error result code 3
2376 19:42:54.728223 Couldn't obtain OEM name from CBI
2377 19:42:54.731957 Create SMBIOS type 16
2378 19:42:54.732433 Create SMBIOS type 17
2379 19:42:54.735115 Create SMBIOS type 20
2380 19:42:54.738399 GENERIC: 0.0 (WIFI Device)
2381 19:42:54.741549 SMBIOS tables: 2156 bytes.
2382 19:42:54.744680 Writing table forward entry at 0x00000500
2383 19:42:54.751322 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2384 19:42:54.754646 Writing coreboot table at 0x76891000
2385 19:42:54.761589 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2386 19:42:54.765242 1. 0000000000001000-000000000009ffff: RAM
2387 19:42:54.768510 2. 00000000000a0000-00000000000fffff: RESERVED
2388 19:42:54.775037 3. 0000000000100000-0000000076856fff: RAM
2389 19:42:54.778546 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2390 19:42:54.784517 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2391 19:42:54.791293 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2392 19:42:54.795009 7. 0000000077000000-00000000803fffff: RESERVED
2393 19:42:54.801342 8. 00000000c0000000-00000000cfffffff: RESERVED
2394 19:42:54.804641 9. 00000000f8000000-00000000f9ffffff: RESERVED
2395 19:42:54.808439 10. 00000000fb000000-00000000fb000fff: RESERVED
2396 19:42:54.814762 11. 00000000fc800000-00000000fe7fffff: RESERVED
2397 19:42:54.817709 12. 00000000feb00000-00000000feb7ffff: RESERVED
2398 19:42:54.824331 13. 00000000fec00000-00000000fecfffff: RESERVED
2399 19:42:54.828205 14. 00000000fed40000-00000000fed6ffff: RESERVED
2400 19:42:54.835031 15. 00000000fed80000-00000000fed87fff: RESERVED
2401 19:42:54.838123 16. 00000000fed90000-00000000fed92fff: RESERVED
2402 19:42:54.844379 17. 00000000feda0000-00000000feda1fff: RESERVED
2403 19:42:54.847328 18. 00000000fedc0000-00000000feddffff: RESERVED
2404 19:42:54.851001 19. 0000000100000000-000000027fbfffff: RAM
2405 19:42:54.854038 Passing 4 GPIOs to payload:
2406 19:42:54.860842 NAME | PORT | POLARITY | VALUE
2407 19:42:54.864524 lid | undefined | high | high
2408 19:42:54.871225 power | undefined | high | low
2409 19:42:54.877470 oprom | undefined | high | low
2410 19:42:54.880977 EC in RW | 0x00000151 | high | high
2411 19:42:54.884315 Board ID: 3
2412 19:42:54.884836 FW config: 0x131
2413 19:42:54.890724 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 63fa
2414 19:42:54.893911 coreboot table: 1788 bytes.
2415 19:42:54.897650 IMD ROOT 0. 0x76fff000 0x00001000
2416 19:42:54.900779 IMD SMALL 1. 0x76ffe000 0x00001000
2417 19:42:54.904196 FSP MEMORY 2. 0x76afe000 0x00500000
2418 19:42:54.907500 CONSOLE 3. 0x76ade000 0x00020000
2419 19:42:54.910344 RW MCACHE 4. 0x76add000 0x0000043c
2420 19:42:54.917145 RO MCACHE 5. 0x76adc000 0x00000fd8
2421 19:42:54.920748 FMAP 6. 0x76adb000 0x0000064a
2422 19:42:54.923991 TIME STAMP 7. 0x76ada000 0x00000910
2423 19:42:54.927605 VBOOT WORK 8. 0x76ac6000 0x00014000
2424 19:42:54.930452 MEM INFO 9. 0x76ac5000 0x000003b8
2425 19:42:54.934488 ROMSTG STCK10. 0x76ac4000 0x00001000
2426 19:42:54.936620 AFTER CAR 11. 0x76ab8000 0x0000c000
2427 19:42:54.940373 RAMSTAGE 12. 0x76a2e000 0x0008a000
2428 19:42:54.946918 ACPI BERT 13. 0x76a1e000 0x00010000
2429 19:42:54.950747 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2430 19:42:54.953365 REFCODE 15. 0x769ae000 0x0006f000
2431 19:42:54.956974 SMM BACKUP 16. 0x7699e000 0x00010000
2432 19:42:54.960193 IGD OPREGION17. 0x76999000 0x00004203
2433 19:42:54.963630 RAMOOPS 18. 0x76899000 0x00100000
2434 19:42:54.966844 COREBOOT 19. 0x76891000 0x00008000
2435 19:42:54.973896 ACPI 20. 0x7686d000 0x00024000
2436 19:42:54.977177 TPM2 TCGLOG21. 0x7685d000 0x00010000
2437 19:42:54.980298 PMC CRASHLOG22. 0x7685c000 0x00000c00
2438 19:42:54.983592 CPU CRASHLOG23. 0x76858000 0x00003480
2439 19:42:54.987063 SMBIOS 24. 0x76857000 0x00001000
2440 19:42:54.990401 IMD small region:
2441 19:42:54.993393 IMD ROOT 0. 0x76ffec00 0x00000400
2442 19:42:54.997040 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2443 19:42:54.999981 VPD 2. 0x76ffeb60 0x0000006c
2444 19:42:55.003449 POWER STATE 3. 0x76ffeb00 0x00000044
2445 19:42:55.009775 ROMSTAGE 4. 0x76ffeae0 0x00000004
2446 19:42:55.013195 ACPI GNVS 5. 0x76ffea80 0x00000048
2447 19:42:55.017174 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2448 19:42:55.023491 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2449 19:42:55.026570 MTRR: Physical address space:
2450 19:42:55.033082 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2451 19:42:55.036562 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2452 19:42:55.043037 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2453 19:42:55.050180 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2454 19:42:55.056832 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2455 19:42:55.063045 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2456 19:42:55.070017 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2457 19:42:55.073163 MTRR: Fixed MSR 0x250 0x0606060606060606
2458 19:42:55.076444 MTRR: Fixed MSR 0x258 0x0606060606060606
2459 19:42:55.083158 MTRR: Fixed MSR 0x259 0x0000000000000000
2460 19:42:55.085892 MTRR: Fixed MSR 0x268 0x0606060606060606
2461 19:42:55.089677 MTRR: Fixed MSR 0x269 0x0606060606060606
2462 19:42:55.093156 MTRR: Fixed MSR 0x26a 0x0606060606060606
2463 19:42:55.096383 MTRR: Fixed MSR 0x26b 0x0606060606060606
2464 19:42:55.102732 MTRR: Fixed MSR 0x26c 0x0606060606060606
2465 19:42:55.106363 MTRR: Fixed MSR 0x26d 0x0606060606060606
2466 19:42:55.109579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2467 19:42:55.113089 MTRR: Fixed MSR 0x26f 0x0606060606060606
2468 19:42:55.117385 call enable_fixed_mtrr()
2469 19:42:55.120370 CPU physical address size: 39 bits
2470 19:42:55.128489 MTRR: default type WB/UC MTRR counts: 6/6.
2471 19:42:55.130352 MTRR: UC selected as default type.
2472 19:42:55.136878 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2473 19:42:55.140363 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2474 19:42:55.146731 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2475 19:42:55.154111 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2476 19:42:55.160348 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2477 19:42:55.167248 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2478 19:42:55.173520 MTRR: Fixed MSR 0x250 0x0606060606060606
2479 19:42:55.176737 MTRR: Fixed MSR 0x258 0x0606060606060606
2480 19:42:55.180486 MTRR: Fixed MSR 0x259 0x0000000000000000
2481 19:42:55.183514 MTRR: Fixed MSR 0x268 0x0606060606060606
2482 19:42:55.190620 MTRR: Fixed MSR 0x269 0x0606060606060606
2483 19:42:55.193739 MTRR: Fixed MSR 0x26a 0x0606060606060606
2484 19:42:55.196935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2485 19:42:55.200738 MTRR: Fixed MSR 0x26c 0x0606060606060606
2486 19:42:55.206758 MTRR: Fixed MSR 0x26d 0x0606060606060606
2487 19:42:55.210250 MTRR: Fixed MSR 0x26e 0x0606060606060606
2488 19:42:55.213579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2489 19:42:55.216898 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 19:42:55.219704 call enable_fixed_mtrr()
2491 19:42:55.223441 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 19:42:55.230320 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 19:42:55.233125 MTRR: Fixed MSR 0x258 0x0606060606060606
2494 19:42:55.236467 MTRR: Fixed MSR 0x259 0x0000000000000000
2495 19:42:55.239696 MTRR: Fixed MSR 0x268 0x0606060606060606
2496 19:42:55.242875 MTRR: Fixed MSR 0x269 0x0606060606060606
2497 19:42:55.249747 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 19:42:55.252384 MTRR: Fixed MSR 0x259 0x0000000000000000
2499 19:42:55.256938 MTRR: Fixed MSR 0x268 0x0606060606060606
2500 19:42:55.259723 MTRR: Fixed MSR 0x269 0x0606060606060606
2501 19:42:55.266843 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 19:42:55.269498 MTRR: Fixed MSR 0x26a 0x0606060606060606
2503 19:42:55.272466 MTRR: Fixed MSR 0x26b 0x0606060606060606
2504 19:42:55.276825 MTRR: Fixed MSR 0x26c 0x0606060606060606
2505 19:42:55.282587 MTRR: Fixed MSR 0x26d 0x0606060606060606
2506 19:42:55.286752 MTRR: Fixed MSR 0x26e 0x0606060606060606
2507 19:42:55.289734 MTRR: Fixed MSR 0x26f 0x0606060606060606
2508 19:42:55.293282 MTRR: Fixed MSR 0x258 0x0606060606060606
2509 19:42:55.299687 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 19:42:55.302629 CPU physical address size: 39 bits
2511 19:42:55.306494 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 19:42:55.310082 MTRR: Fixed MSR 0x250 0x0606060606060606
2513 19:42:55.312708 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 19:42:55.319895 MTRR: Fixed MSR 0x259 0x0000000000000000
2515 19:42:55.323689 MTRR: Fixed MSR 0x268 0x0606060606060606
2516 19:42:55.326169 MTRR: Fixed MSR 0x269 0x0606060606060606
2517 19:42:55.329387 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 19:42:55.333293 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 19:42:55.339865 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 19:42:55.342719 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 19:42:55.346071 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 19:42:55.349312 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 19:42:55.355907 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 19:42:55.358950 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 19:42:55.362719 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 19:42:55.366110 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 19:42:55.372658 MTRR: Fixed MSR 0x26a 0x0606060606060606
2528 19:42:55.373186 call enable_fixed_mtrr()
2529 19:42:55.379733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 19:42:55.382287 MTRR: Fixed MSR 0x259 0x0000000000000000
2531 19:42:55.386152 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 19:42:55.389103 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 19:42:55.395873 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 19:42:55.399860 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 19:42:55.402596 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 19:42:55.406225 CPU physical address size: 39 bits
2537 19:42:55.408821 call enable_fixed_mtrr()
2538 19:42:55.412616 MTRR: Fixed MSR 0x268 0x0606060606060606
2539 19:42:55.415746 CPU physical address size: 39 bits
2540 19:42:55.418802 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 19:42:55.422072 call enable_fixed_mtrr()
2542 19:42:55.425759 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 19:42:55.432141 MTRR: Fixed MSR 0x26a 0x0606060606060606
2544 19:42:55.435432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2545 19:42:55.439443 MTRR: Fixed MSR 0x26c 0x0606060606060606
2546 19:42:55.441975 MTRR: Fixed MSR 0x26d 0x0606060606060606
2547 19:42:55.449656 MTRR: Fixed MSR 0x26e 0x0606060606060606
2548 19:42:55.451910 MTRR: Fixed MSR 0x26f 0x0606060606060606
2549 19:42:55.455525 CPU physical address size: 39 bits
2550 19:42:55.458827 call enable_fixed_mtrr()
2551 19:42:55.461952 MTRR: Fixed MSR 0x26c 0x0606060606060606
2552 19:42:55.465683 CPU physical address size: 39 bits
2553 19:42:55.468647 MTRR: Fixed MSR 0x259 0x0000000000000000
2554 19:42:55.472139 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 19:42:55.478838 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 19:42:55.482333 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 19:42:55.485526 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 19:42:55.489001 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 19:42:55.495685 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 19:42:55.498682 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 19:42:55.502090 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 19:42:55.504844 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 19:42:55.509583 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 19:42:55.512534 call enable_fixed_mtrr()
2565 19:42:55.516485 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 19:42:55.522478 CPU physical address size: 39 bits
2567 19:42:55.525504 call enable_fixed_mtrr()
2568 19:42:55.529416 CPU physical address size: 39 bits
2569 19:42:55.529907
2570 19:42:55.532616 MTRR check
2571 19:42:55.533138 Fixed MTRRs : Enabled
2572 19:42:55.536106 Variable MTRRs: Enabled
2573 19:42:55.536590
2574 19:42:55.542952 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2575 19:42:55.546503 Checking cr50 for pending updates
2576 19:42:55.557116 Reading cr50 TPM mode
2577 19:42:55.572473 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2578 19:42:55.582408 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2579 19:42:55.585677 Checking segment from ROM address 0xf96cbe6c
2580 19:42:55.588917 Checking segment from ROM address 0xf96cbe88
2581 19:42:55.595749 Loading segment from ROM address 0xf96cbe6c
2582 19:42:55.596237 code (compression=1)
2583 19:42:55.605745 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2584 19:42:55.612450 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2585 19:42:55.615411 using LZMA
2586 19:42:55.637877 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2587 19:42:55.644221 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2588 19:42:55.652006 Loading segment from ROM address 0xf96cbe88
2589 19:42:55.655764 Entry Point 0x30000000
2590 19:42:55.656222 Loaded segments
2591 19:42:55.662671 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2592 19:42:55.669022 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2593 19:42:55.672358 Finalizing chipset.
2594 19:42:55.676047 apm_control: Finalizing SMM.
2595 19:42:55.676508 APMC done.
2596 19:42:55.679151 HECI: CSE device 16.1 is disabled
2597 19:42:55.682145 HECI: CSE device 16.2 is disabled
2598 19:42:55.685311 HECI: CSE device 16.3 is disabled
2599 19:42:55.688839 HECI: CSE device 16.4 is disabled
2600 19:42:55.692427 HECI: CSE device 16.5 is disabled
2601 19:42:55.695680 HECI: Sending End-of-Post
2602 19:42:55.704099 CSE: EOP requested action: continue boot
2603 19:42:55.707403 CSE EOP successful, continuing boot
2604 19:42:55.713914 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2605 19:42:55.717398 mp_park_aps done after 0 msecs.
2606 19:42:55.720621 Jumping to boot code at 0x30000000(0x76891000)
2607 19:42:55.730630 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2608 19:42:55.734599
2609 19:42:55.734967
2610 19:42:55.735210
2611 19:42:55.738439 Starting depthcharge on Volmar...
2612 19:42:55.738905
2613 19:42:55.739852 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2614 19:42:55.740267 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2615 19:42:55.740578 Setting prompt string to ['brya:']
2616 19:42:55.740929 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2617 19:42:55.744571 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2618 19:42:55.744976
2619 19:42:55.751665 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2620 19:42:55.752128
2621 19:42:55.758415 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2622 19:42:55.758873
2623 19:42:55.761178 configure_storage: Failed to remap 1C:2
2624 19:42:55.761665
2625 19:42:55.764481 Wipe memory regions:
2626 19:42:55.764975
2627 19:42:55.768134 [0x00000000001000, 0x000000000a0000)
2628 19:42:55.768628
2629 19:42:55.771635 [0x00000000100000, 0x00000030000000)
2630 19:42:55.876161
2631 19:42:55.879437 [0x00000032668e60, 0x00000076857000)
2632 19:42:56.027413
2633 19:42:56.030682 [0x00000100000000, 0x0000027fc00000)
2634 19:42:56.861431
2635 19:42:56.864702 ec_init: CrosEC protocol v3 supported (256, 256)
2636 19:42:57.473553
2637 19:42:57.474069 R8152: Initializing
2638 19:42:57.474375
2639 19:42:57.476632 Version 9 (ocp_data = 6010)
2640 19:42:57.477052
2641 19:42:57.480114 R8152: Done initializing
2642 19:42:57.480602
2643 19:42:57.483165 Adding net device
2644 19:42:57.784100
2645 19:42:57.787422 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2646 19:42:57.787911
2647 19:42:57.788194
2648 19:42:57.788445
2649 19:42:57.789053 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2651 19:42:57.890190 brya: tftpboot 192.168.201.1 12714060/tftp-deploy-6kd64ygl/kernel/bzImage 12714060/tftp-deploy-6kd64ygl/kernel/cmdline 12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
2652 19:42:57.890803 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 19:42:57.891188 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2654 19:42:57.895981 tftpboot 192.168.201.1 12714060/tftp-deploy-6kd64ygl/kernel/bzIploy-6kd64ygl/kernel/cmdline 12714060/tftp-deploy-6kd64ygl/ramdisk/ramdisk.cpio.gz
2655 19:42:57.896490
2656 19:42:57.896800 Waiting for link
2657 19:42:58.098272
2658 19:42:58.098757 done.
2659 19:42:58.099038
2660 19:42:58.099280 MAC: 00:e0:4c:68:03:d9
2661 19:42:58.099510
2662 19:42:58.101527 Sending DHCP discover... done.
2663 19:42:58.101908
2664 19:42:58.105120 Waiting for reply... done.
2665 19:42:58.105636
2666 19:42:58.108291 Sending DHCP request... done.
2667 19:42:58.108674
2668 19:42:58.114888 Waiting for reply... done.
2669 19:42:58.115375
2670 19:42:58.115664 My ip is 192.168.201.14
2671 19:42:58.115908
2672 19:42:58.118670 The DHCP server ip is 192.168.201.1
2673 19:42:58.121865
2674 19:42:58.124866 TFTP server IP predefined by user: 192.168.201.1
2675 19:42:58.125257
2676 19:42:58.132300 Bootfile predefined by user: 12714060/tftp-deploy-6kd64ygl/kernel/bzImage
2677 19:42:58.132854
2678 19:42:58.134960 Sending tftp read request... done.
2679 19:42:58.135332
2680 19:42:58.142554 Waiting for the transfer...
2681 19:42:58.143005
2682 19:42:58.372295 00000000 ################################################################
2683 19:42:58.372424
2684 19:42:58.602294 00080000 ################################################################
2685 19:42:58.602422
2686 19:42:58.829089 00100000 ################################################################
2687 19:42:58.829225
2688 19:42:59.058569 00180000 ################################################################
2689 19:42:59.058705
2690 19:42:59.285718 00200000 ################################################################
2691 19:42:59.285866
2692 19:42:59.513858 00280000 ################################################################
2693 19:42:59.513984
2694 19:42:59.742022 00300000 ################################################################
2695 19:42:59.742160
2696 19:42:59.971005 00380000 ################################################################
2697 19:42:59.971155
2698 19:43:00.196577 00400000 ################################################################
2699 19:43:00.196709
2700 19:43:00.424027 00480000 ################################################################
2701 19:43:00.424155
2702 19:43:00.651392 00500000 ################################################################
2703 19:43:00.651531
2704 19:43:00.881695 00580000 ################################################################
2705 19:43:00.881820
2706 19:43:01.109236 00600000 ################################################################
2707 19:43:01.109378
2708 19:43:01.336607 00680000 ################################################################
2709 19:43:01.336741
2710 19:43:01.564826 00700000 ################################################################
2711 19:43:01.564963
2712 19:43:01.795039 00780000 ################################################################
2713 19:43:01.795182
2714 19:43:01.877572 00800000 ####################### done.
2715 19:43:01.877673
2716 19:43:01.880804 The bootfile was 8576912 bytes long.
2717 19:43:01.880876
2718 19:43:01.884403 Sending tftp read request... done.
2719 19:43:01.884461
2720 19:43:01.887241 Waiting for the transfer...
2721 19:43:01.887297
2722 19:43:02.115846 00000000 ################################################################
2723 19:43:02.115991
2724 19:43:02.342536 00080000 ################################################################
2725 19:43:02.342668
2726 19:43:02.568630 00100000 ################################################################
2727 19:43:02.568762
2728 19:43:02.794694 00180000 ################################################################
2729 19:43:02.794835
2730 19:43:03.020531 00200000 ################################################################
2731 19:43:03.020661
2732 19:43:03.247839 00280000 ################################################################
2733 19:43:03.247983
2734 19:43:03.478305 00300000 ################################################################
2735 19:43:03.478446
2736 19:43:03.708391 00380000 ################################################################
2737 19:43:03.708521
2738 19:43:03.936544 00400000 ################################################################
2739 19:43:03.936675
2740 19:43:04.162598 00480000 ################################################################
2741 19:43:04.162729
2742 19:43:04.389847 00500000 ################################################################
2743 19:43:04.389984
2744 19:43:04.618935 00580000 ################################################################
2745 19:43:04.619062
2746 19:43:04.845323 00600000 ################################################################
2747 19:43:04.845457
2748 19:43:05.072158 00680000 ################################################################
2749 19:43:05.072300
2750 19:43:05.297801 00700000 ################################################################
2751 19:43:05.297938
2752 19:43:05.524140 00780000 ################################################################
2753 19:43:05.524284
2754 19:43:05.711025 00800000 ##################################################### done.
2755 19:43:05.711165
2756 19:43:05.715684 Sending tftp read request... done.
2757 19:43:05.715754
2758 19:43:05.715822 Waiting for the transfer...
2759 19:43:05.717963
2760 19:43:05.718020 00000000 # done.
2761 19:43:05.718082
2762 19:43:05.728534 Command line loaded dynamically from TFTP file: 12714060/tftp-deploy-6kd64ygl/kernel/cmdline
2763 19:43:05.729061
2764 19:43:05.740875 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2765 19:43:05.748865
2766 19:43:05.751722 Shutting down all USB controllers.
2767 19:43:05.752086
2768 19:43:05.752414 Removing current net device
2769 19:43:05.752691
2770 19:43:05.755134 Finalizing coreboot
2771 19:43:05.755486
2772 19:43:05.762184 Exiting depthcharge with code 4 at timestamp: 20333335
2773 19:43:05.762662
2774 19:43:05.762934
2775 19:43:05.763160 Starting kernel ...
2776 19:43:05.763373
2777 19:43:05.763581
2778 19:43:05.764481 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2779 19:43:05.764874 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2780 19:43:05.765159 Setting prompt string to ['Linux version [0-9]']
2781 19:43:05.765410 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2782 19:43:05.765657 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2784 19:47:36.765784 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2786 19:47:36.767094 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2788 19:47:36.768084 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2791 19:47:36.769747 end: 2 depthcharge-action (duration 00:05:00) [common]
2793 19:47:36.770390 Cleaning after the job
2794 19:47:36.770482 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/ramdisk
2795 19:47:36.771407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/kernel
2796 19:47:36.772221 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12714060/tftp-deploy-6kd64ygl/modules
2797 19:47:36.772472 start: 5.1 power-off (timeout 00:00:30) [common]
2798 19:47:36.772609 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2799 19:47:36.849545 >> Command sent successfully.
2800 19:47:36.857611 Returned 0 in 0 seconds
2801 19:47:36.958659 end: 5.1 power-off (duration 00:00:00) [common]
2803 19:47:36.959889 start: 5.2 read-feedback (timeout 00:10:00) [common]
2804 19:47:36.960814 Listened to connection for namespace 'common' for up to 1s
2806 19:47:36.961867 Listened to connection for namespace 'common' for up to 1s
2807 19:47:37.961637 Finalising connection for namespace 'common'
2808 19:47:37.962221 Disconnecting from shell: Finalise
2809 19:47:37.962564