Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 20:51:12.528978 lava-dispatcher, installed at version: 2024.01
2 20:51:12.529175 start: 0 validate
3 20:51:12.529309 Start time: 2024-03-12 20:51:12.529302+00:00 (UTC)
4 20:51:12.529428 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:51:12.529554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 20:51:12.796986 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:51:12.797161 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1455-g73293d3cb91e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:51:13.064545 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:51:13.065619 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1455-g73293d3cb91e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:51:13.336009 validate duration: 0.81
12 20:51:13.336378 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:51:13.336493 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:51:13.336592 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:51:13.336726 Not decompressing ramdisk as can be used compressed.
16 20:51:13.336829 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 20:51:13.336893 saving as /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/ramdisk/rootfs.cpio.gz
18 20:51:13.336981 total size: 8418130 (8 MB)
19 20:51:13.338023 progress 0 % (0 MB)
20 20:51:13.340458 progress 5 % (0 MB)
21 20:51:13.342784 progress 10 % (0 MB)
22 20:51:13.345139 progress 15 % (1 MB)
23 20:51:13.347516 progress 20 % (1 MB)
24 20:51:13.350030 progress 25 % (2 MB)
25 20:51:13.352484 progress 30 % (2 MB)
26 20:51:13.354647 progress 35 % (2 MB)
27 20:51:13.356936 progress 40 % (3 MB)
28 20:51:13.359274 progress 45 % (3 MB)
29 20:51:13.361662 progress 50 % (4 MB)
30 20:51:13.364055 progress 55 % (4 MB)
31 20:51:13.366385 progress 60 % (4 MB)
32 20:51:13.368509 progress 65 % (5 MB)
33 20:51:13.370753 progress 70 % (5 MB)
34 20:51:13.373094 progress 75 % (6 MB)
35 20:51:13.375505 progress 80 % (6 MB)
36 20:51:13.377951 progress 85 % (6 MB)
37 20:51:13.380374 progress 90 % (7 MB)
38 20:51:13.382674 progress 95 % (7 MB)
39 20:51:13.384740 progress 100 % (8 MB)
40 20:51:13.384969 8 MB downloaded in 0.05 s (167.29 MB/s)
41 20:51:13.385149 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:51:13.385387 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:51:13.385477 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:51:13.385560 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:51:13.385703 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1455-g73293d3cb91e/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:51:13.385770 saving as /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/kernel/bzImage
48 20:51:13.385830 total size: 9367440 (8 MB)
49 20:51:13.385889 No compression specified
50 20:51:13.387263 progress 0 % (0 MB)
51 20:51:13.389982 progress 5 % (0 MB)
52 20:51:13.392607 progress 10 % (0 MB)
53 20:51:13.395208 progress 15 % (1 MB)
54 20:51:13.397819 progress 20 % (1 MB)
55 20:51:13.400361 progress 25 % (2 MB)
56 20:51:13.403056 progress 30 % (2 MB)
57 20:51:13.405716 progress 35 % (3 MB)
58 20:51:13.408259 progress 40 % (3 MB)
59 20:51:13.410777 progress 45 % (4 MB)
60 20:51:13.413263 progress 50 % (4 MB)
61 20:51:13.416140 progress 55 % (4 MB)
62 20:51:13.418711 progress 60 % (5 MB)
63 20:51:13.421285 progress 65 % (5 MB)
64 20:51:13.423933 progress 70 % (6 MB)
65 20:51:13.426354 progress 75 % (6 MB)
66 20:51:13.429014 progress 80 % (7 MB)
67 20:51:13.431540 progress 85 % (7 MB)
68 20:51:13.434212 progress 90 % (8 MB)
69 20:51:13.436717 progress 95 % (8 MB)
70 20:51:13.439142 progress 100 % (8 MB)
71 20:51:13.439379 8 MB downloaded in 0.05 s (166.84 MB/s)
72 20:51:13.439572 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:51:13.439841 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:51:13.439965 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:51:13.440079 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:51:13.440255 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1455-g73293d3cb91e/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:51:13.440350 saving as /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/modules/modules.tar
79 20:51:13.440438 total size: 251244 (0 MB)
80 20:51:13.440528 Using unxz to decompress xz
81 20:51:13.444854 progress 13 % (0 MB)
82 20:51:13.445278 progress 26 % (0 MB)
83 20:51:13.445534 progress 39 % (0 MB)
84 20:51:13.447222 progress 52 % (0 MB)
85 20:51:13.449134 progress 65 % (0 MB)
86 20:51:13.451008 progress 78 % (0 MB)
87 20:51:13.452920 progress 91 % (0 MB)
88 20:51:13.454801 progress 100 % (0 MB)
89 20:51:13.460352 0 MB downloaded in 0.02 s (12.04 MB/s)
90 20:51:13.460627 end: 1.3.1 http-download (duration 00:00:00) [common]
92 20:51:13.460988 end: 1.3 download-retry (duration 00:00:00) [common]
93 20:51:13.461090 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 20:51:13.461220 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 20:51:13.461345 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 20:51:13.461437 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 20:51:13.461694 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8
98 20:51:13.461881 makedir: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin
99 20:51:13.462022 makedir: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/tests
100 20:51:13.462143 makedir: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/results
101 20:51:13.462269 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-add-keys
102 20:51:13.462417 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-add-sources
103 20:51:13.462548 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-background-process-start
104 20:51:13.462718 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-background-process-stop
105 20:51:13.462846 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-common-functions
106 20:51:13.462977 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-echo-ipv4
107 20:51:13.463104 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-install-packages
108 20:51:13.463227 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-installed-packages
109 20:51:13.463349 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-os-build
110 20:51:13.463476 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-probe-channel
111 20:51:13.463599 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-probe-ip
112 20:51:13.463722 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-target-ip
113 20:51:13.463843 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-target-mac
114 20:51:13.463967 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-target-storage
115 20:51:13.464098 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-case
116 20:51:13.464221 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-event
117 20:51:13.464344 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-feedback
118 20:51:13.464467 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-raise
119 20:51:13.464595 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-reference
120 20:51:13.464723 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-runner
121 20:51:13.464847 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-set
122 20:51:13.464973 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-test-shell
123 20:51:13.465100 Updating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-install-packages (oe)
124 20:51:13.465250 Updating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/bin/lava-installed-packages (oe)
125 20:51:13.465384 Creating /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/environment
126 20:51:13.465483 LAVA metadata
127 20:51:13.465572 - LAVA_JOB_ID=13035066
128 20:51:13.465638 - LAVA_DISPATCHER_IP=192.168.201.1
129 20:51:13.465740 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 20:51:13.465806 skipped lava-vland-overlay
131 20:51:13.465882 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 20:51:13.465963 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 20:51:13.466028 skipped lava-multinode-overlay
134 20:51:13.466102 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 20:51:13.466193 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 20:51:13.466266 Loading test definitions
137 20:51:13.466387 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 20:51:13.466468 Using /lava-13035066 at stage 0
139 20:51:13.466833 uuid=13035066_1.4.2.3.1 testdef=None
140 20:51:13.466921 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 20:51:13.467004 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 20:51:13.467573 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 20:51:13.467794 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 20:51:13.468472 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 20:51:13.468744 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 20:51:13.469425 runner path: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/0/tests/0_dmesg test_uuid 13035066_1.4.2.3.1
149 20:51:13.469588 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 20:51:13.469815 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 20:51:13.469888 Using /lava-13035066 at stage 1
153 20:51:13.470195 uuid=13035066_1.4.2.3.5 testdef=None
154 20:51:13.470281 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 20:51:13.470364 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 20:51:13.470892 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 20:51:13.471198 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 20:51:13.472209 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 20:51:13.472572 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 20:51:13.473495 runner path: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/1/tests/1_bootrr test_uuid 13035066_1.4.2.3.5
163 20:51:13.473683 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 20:51:13.474018 Creating lava-test-runner.conf files
166 20:51:13.474109 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/0 for stage 0
167 20:51:13.474227 - 0_dmesg
168 20:51:13.474334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13035066/lava-overlay-1qk57la8/lava-13035066/1 for stage 1
169 20:51:13.474453 - 1_bootrr
170 20:51:13.474577 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 20:51:13.474725 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 20:51:13.482746 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 20:51:13.482849 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 20:51:13.482933 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 20:51:13.483016 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 20:51:13.483100 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 20:51:13.739935 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 20:51:13.740314 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 20:51:13.740564 extracting modules file /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13035066/extract-overlay-ramdisk-0s5paszt/ramdisk
180 20:51:13.756468 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 20:51:13.756600 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 20:51:13.756693 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13035066/compress-overlay-5r8llppl/overlay-1.4.2.4.tar.gz to ramdisk
183 20:51:13.756767 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13035066/compress-overlay-5r8llppl/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13035066/extract-overlay-ramdisk-0s5paszt/ramdisk
184 20:51:13.765064 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 20:51:13.765182 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 20:51:13.765272 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 20:51:13.765388 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 20:51:13.765464 Building ramdisk /var/lib/lava/dispatcher/tmp/13035066/extract-overlay-ramdisk-0s5paszt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13035066/extract-overlay-ramdisk-0s5paszt/ramdisk
189 20:51:13.894435 >> 49790 blocks
190 20:51:14.789813 rename /var/lib/lava/dispatcher/tmp/13035066/extract-overlay-ramdisk-0s5paszt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
191 20:51:14.790272 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 20:51:14.790431 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 20:51:14.790572 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 20:51:14.790715 No mkimage arch provided, not using FIT.
195 20:51:14.790807 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 20:51:14.790893 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 20:51:14.791002 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 20:51:14.791099 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 20:51:14.791185 No LXC device requested
200 20:51:14.791269 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 20:51:14.791359 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 20:51:14.791441 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 20:51:14.791516 Checking files for TFTP limit of 4294967296 bytes.
204 20:51:14.791906 end: 1 tftp-deploy (duration 00:00:01) [common]
205 20:51:14.792010 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 20:51:14.792122 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 20:51:14.792260 substitutions:
208 20:51:14.792326 - {DTB}: None
209 20:51:14.792390 - {INITRD}: 13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
210 20:51:14.792448 - {KERNEL}: 13035066/tftp-deploy-q_3zewjt/kernel/bzImage
211 20:51:14.792504 - {LAVA_MAC}: None
212 20:51:14.792582 - {PRESEED_CONFIG}: None
213 20:51:14.792641 - {PRESEED_LOCAL}: None
214 20:51:14.792696 - {RAMDISK}: 13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
215 20:51:14.792750 - {ROOT_PART}: None
216 20:51:14.792803 - {ROOT}: None
217 20:51:14.792856 - {SERVER_IP}: 192.168.201.1
218 20:51:14.792909 - {TEE}: None
219 20:51:14.792967 Parsed boot commands:
220 20:51:14.793061 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 20:51:14.793277 Parsed boot commands: tftpboot 192.168.201.1 13035066/tftp-deploy-q_3zewjt/kernel/bzImage 13035066/tftp-deploy-q_3zewjt/kernel/cmdline 13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
222 20:51:14.793399 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 20:51:14.793556 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 20:51:14.793681 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 20:51:14.793798 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 20:51:14.793896 Not connected, no need to disconnect.
227 20:51:14.793998 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 20:51:14.794197 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 20:51:14.794271 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-9'
230 20:51:14.798198 Setting prompt string to ['lava-test: # ']
231 20:51:14.798590 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 20:51:14.798760 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 20:51:14.798859 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 20:51:14.798950 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 20:51:14.799211 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
236 20:51:19.932558 >> Command sent successfully.
237 20:51:19.935116 Returned 0 in 5 seconds
238 20:51:20.035469 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 20:51:20.035833 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 20:51:20.035927 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 20:51:20.036019 Setting prompt string to 'Starting depthcharge on Magolor...'
243 20:51:20.036087 Changing prompt to 'Starting depthcharge on Magolor...'
244 20:51:20.036155 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 20:51:20.036419 [Enter `^Ec?' for help]
246 20:51:21.179493
247 20:51:21.179680
248 20:51:21.190363 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 20:51:21.193694 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 20:51:21.197152 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 20:51:21.203844 CPU: AES supported, TXT NOT supported, VT supported
252 20:51:21.207121 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 20:51:21.214219 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 20:51:21.216982 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 20:51:21.220453 VBOOT: Loading verstage.
256 20:51:21.227002 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 20:51:21.230550 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 20:51:21.237377 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 20:51:21.241487 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 20:51:21.241574
261 20:51:21.241641
262 20:51:21.254522 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 20:51:21.268002 Probing TPM: . done!
264 20:51:21.271764 TPM ready after 0 ms
265 20:51:21.274973 Connected to device vid:did:rid of 1ae0:0028:00
266 20:51:21.286052 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 20:51:21.293259 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 20:51:21.340444 Initialized TPM device CR50 revision 0
269 20:51:21.350000 tlcl_send_startup: Startup return code is 0
270 20:51:21.350108 TPM: setup succeeded
271 20:51:21.365284 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 20:51:21.378880 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 20:51:21.393932 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 20:51:21.404547 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 20:51:21.408003 Chrome EC: UHEPI supported
276 20:51:21.408085 Phase 1
277 20:51:21.415606 FMAP: area GBB found @ c05000 (12288 bytes)
278 20:51:21.422495 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 20:51:21.429488 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 20:51:21.429567 Recovery requested (1009000e)
281 20:51:21.436763 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 20:51:21.446825 tlcl_extend: response is 0
283 20:51:21.452811 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 20:51:21.462357 tlcl_extend: response is 0
285 20:51:21.468808 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 20:51:21.472517 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 20:51:21.478911 BS: verstage times (exec / console): total (unknown) / 124 ms
288 20:51:21.481939
289 20:51:21.482058
290 20:51:21.493046 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 20:51:21.496818 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 20:51:21.502861 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 20:51:21.506492 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 20:51:21.509318 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 20:51:21.516121 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 20:51:21.519470 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 20:51:21.523059 TCO_STS: 0000 0001
298 20:51:21.526411 GEN_PMCON: d0015038 00002200
299 20:51:21.529275 GBLRST_CAUSE: 00000000 00000000
300 20:51:21.529385 prev_sleep_state 5
301 20:51:21.532745 Boot Count incremented to 9993
302 20:51:21.539272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 20:51:21.542420 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 20:51:21.546541 Chrome EC: UHEPI supported
305 20:51:21.553155 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 20:51:21.560081 Probing TPM: done!
307 20:51:21.566629 Connected to device vid:did:rid of 1ae0:0028:00
308 20:51:21.576331 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 20:51:21.584387 Initialized TPM device CR50 revision 0
310 20:51:21.595640 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 20:51:21.599640 MRC: Hash idx 0x100b comparison successful.
312 20:51:21.602505 MRC cache found, size 5458
313 20:51:21.605902 bootmode is set to: 2
314 20:51:21.605990 SPD INDEX = 0
315 20:51:21.609903 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 20:51:21.613992 SPD: module type is LPDDR4X
317 20:51:21.620632 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 20:51:21.627158 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 20:51:21.630551 SPD: device width 16 bits, bus width 32 bits
320 20:51:21.633660 SPD: module size is 4096 MB (per channel)
321 20:51:21.637092 meminit_channels: DRAM half-populated
322 20:51:21.721108 CBMEM:
323 20:51:21.724168 IMD: root @ 0x76fff000 254 entries.
324 20:51:21.727535 IMD: root @ 0x76ffec00 62 entries.
325 20:51:21.730779 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 20:51:21.737586 WARNING: RO_VPD is uninitialized or empty.
327 20:51:21.740297 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 20:51:21.744361 External stage cache:
329 20:51:21.747178 IMD: root @ 0x7b3ff000 254 entries.
330 20:51:21.750552 IMD: root @ 0x7b3fec00 62 entries.
331 20:51:21.760601 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 20:51:21.767328 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 20:51:21.773899 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 20:51:21.782488 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 20:51:21.788993 cse_lite: Skip switching to RW in the recovery path
336 20:51:21.789082 1 DIMMs found
337 20:51:21.789170 SMM Memory Map
338 20:51:21.791979 SMRAM : 0x7b000000 0x800000
339 20:51:21.798532 Subregion 0: 0x7b000000 0x200000
340 20:51:21.801823 Subregion 1: 0x7b200000 0x200000
341 20:51:21.805283 Subregion 2: 0x7b400000 0x400000
342 20:51:21.805367 top_of_ram = 0x77000000
343 20:51:21.811959 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 20:51:21.818665 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 20:51:21.821911 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 20:51:21.828412 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 20:51:21.831967 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 20:51:21.843854 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 20:51:21.850258 Processing 188 relocs. Offset value of 0x74c0e000
350 20:51:21.857572 BS: romstage times (exec / console): total (unknown) / 255 ms
351 20:51:21.862283
352 20:51:21.862371
353 20:51:21.872021 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 20:51:21.878539 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 20:51:21.881931 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 20:51:21.888362 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 20:51:21.944899 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 20:51:21.951584 Processing 4805 relocs. Offset value of 0x75da8000
359 20:51:21.954539 BS: postcar times (exec / console): total (unknown) / 42 ms
360 20:51:21.958357
361 20:51:21.958442
362 20:51:21.967664 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 20:51:21.967750 Normal boot
364 20:51:21.971522 EC returned error result code 3
365 20:51:21.974914 FW_CONFIG value is 0x204
366 20:51:21.978243 GENERIC: 0.0 disabled by fw_config
367 20:51:21.984907 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 20:51:21.988163 I2C: 00:10 disabled by fw_config
369 20:51:21.991519 I2C: 00:10 disabled by fw_config
370 20:51:21.994798 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 20:51:22.001318 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 20:51:22.005046 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 20:51:22.011585 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 20:51:22.014712 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 20:51:22.017979 I2C: 00:10 disabled by fw_config
376 20:51:22.024791 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 20:51:22.031410 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 20:51:22.034525 I2C: 00:1a disabled by fw_config
379 20:51:22.037939 I2C: 00:1a disabled by fw_config
380 20:51:22.044370 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 20:51:22.048164 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 20:51:22.051331 GENERIC: 0.0 disabled by fw_config
383 20:51:22.057604 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 20:51:22.061211 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 20:51:22.067608 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 20:51:22.070961 microcode: Update skipped, already up-to-date
387 20:51:22.077316 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 20:51:22.103373 Detected 2 core, 2 thread CPU.
389 20:51:22.106491 Setting up SMI for CPU
390 20:51:22.109903 IED base = 0x7b400000
391 20:51:22.109998 IED size = 0x00400000
392 20:51:22.113425 Will perform SMM setup.
393 20:51:22.116379 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 20:51:22.126453 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 20:51:22.129544 Processing 16 relocs. Offset value of 0x00030000
396 20:51:22.133525 Attempting to start 1 APs
397 20:51:22.137028 Waiting for 10ms after sending INIT.
398 20:51:22.152994 Waiting for 1st SIPI to complete...done.
399 20:51:22.153088 AP: slot 1 apic_id 2.
400 20:51:22.160406 Waiting for 2nd SIPI to complete...done.
401 20:51:22.166336 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 20:51:22.173368 Processing 13 relocs. Offset value of 0x00038000
403 20:51:22.173447 Unable to locate Global NVS
404 20:51:22.183061 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 20:51:22.185975 Installing permanent SMM handler to 0x7b000000
406 20:51:22.196106 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 20:51:22.199692 Processing 704 relocs. Offset value of 0x7b010000
408 20:51:22.209728 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 20:51:22.212673 Processing 13 relocs. Offset value of 0x7b008000
410 20:51:22.219155 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 20:51:22.222356 Unable to locate Global NVS
412 20:51:22.229530 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 20:51:22.232431 Clearing SMI status registers
414 20:51:22.232517 SMI_STS: PM1
415 20:51:22.236352 PM1_STS: PWRBTN
416 20:51:22.236436 TCO_STS: INTRD_DET
417 20:51:22.239060 GPE0 STD STS:
418 20:51:22.245488 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 20:51:22.248977 In relocation handler: CPU 0
420 20:51:22.252302 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 20:51:22.258889 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 20:51:22.258985 Relocation complete.
423 20:51:22.268626 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 20:51:22.268711 In relocation handler: CPU 1
425 20:51:22.275760 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 20:51:22.279245 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 20:51:22.282953 Relocation complete.
428 20:51:22.283038 Initializing CPU #0
429 20:51:22.286584 CPU: vendor Intel device 906c0
430 20:51:22.289598 CPU: family 06, model 9c, stepping 00
431 20:51:22.293518 Clearing out pending MCEs
432 20:51:22.296401 Setting up local APIC...
433 20:51:22.296489 apic_id: 0x00 done.
434 20:51:22.300074 Turbo is available but hidden
435 20:51:22.303137 Turbo is available and visible
436 20:51:22.309882 microcode: Update skipped, already up-to-date
437 20:51:22.309982 CPU #0 initialized
438 20:51:22.312972 Initializing CPU #1
439 20:51:22.316435 CPU: vendor Intel device 906c0
440 20:51:22.319686 CPU: family 06, model 9c, stepping 00
441 20:51:22.323044 Clearing out pending MCEs
442 20:51:22.325994 Setting up local APIC...
443 20:51:22.326078 apic_id: 0x02 done.
444 20:51:22.333317 microcode: Update skipped, already up-to-date
445 20:51:22.333401 CPU #1 initialized
446 20:51:22.339636 bsp_do_flight_plan done after 175 msecs.
447 20:51:22.339722 CPU: frequency set to 2800 MHz
448 20:51:22.342826 Enabling SMIs.
449 20:51:22.349170 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 288 ms
450 20:51:22.359070 Probing TPM: done!
451 20:51:22.365682 Connected to device vid:did:rid of 1ae0:0028:00
452 20:51:22.375420 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 20:51:22.379028 Initialized TPM device CR50 revision 0
454 20:51:22.385805 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 20:51:22.388761 Found a VBT of 7680 bytes after decompression
456 20:51:22.398404 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 20:51:22.431260 Detected 2 core, 2 thread CPU.
458 20:51:22.434573 Detected 2 core, 2 thread CPU.
459 20:51:22.796748 Display FSP Version Info HOB
460 20:51:22.799438 Reference Code - CPU = 8.7.22.30
461 20:51:22.802843 uCode Version = 24.0.0.1f
462 20:51:22.806100 TXT ACM version = ff.ff.ff.ffff
463 20:51:22.809318 Reference Code - ME = 8.7.22.30
464 20:51:22.812701 MEBx version = 0.0.0.0
465 20:51:22.815949 ME Firmware Version = Consumer SKU
466 20:51:22.819262 Reference Code - PCH = 8.7.22.30
467 20:51:22.822737 PCH-CRID Status = Disabled
468 20:51:22.826170 PCH-CRID Original Value = ff.ff.ff.ffff
469 20:51:22.829525 PCH-CRID New Value = ff.ff.ff.ffff
470 20:51:22.832605 OPROM - RST - RAID = ff.ff.ff.ffff
471 20:51:22.835747 PCH Hsio Version = 4.0.0.0
472 20:51:22.838942 Reference Code - SA - System Agent = 8.7.22.30
473 20:51:22.842405 Reference Code - MRC = 0.0.4.68
474 20:51:22.845960 SA - PCIe Version = 8.7.22.30
475 20:51:22.848767 SA-CRID Status = Disabled
476 20:51:22.852164 SA-CRID Original Value = 0.0.0.0
477 20:51:22.855457 SA-CRID New Value = 0.0.0.0
478 20:51:22.859518 OPROM - VBIOS = ff.ff.ff.ffff
479 20:51:22.863157 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 20:51:22.866945 PHY Build Version = ff.ff.ff.ffff
481 20:51:22.869619 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 20:51:22.877931 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 20:51:22.880705 ITSS IRQ Polarities Before:
484 20:51:22.880812 IPC0: 0xffffffff
485 20:51:22.883836 IPC1: 0xffffffff
486 20:51:22.883915 IPC2: 0xffffffff
487 20:51:22.887387 IPC3: 0xffffffff
488 20:51:22.890454 ITSS IRQ Polarities After:
489 20:51:22.890559 IPC0: 0xffffffff
490 20:51:22.894003 IPC1: 0xffffffff
491 20:51:22.894076 IPC2: 0xffffffff
492 20:51:22.897442 IPC3: 0xffffffff
493 20:51:22.907058 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 20:51:22.913888 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
495 20:51:22.917403 Enumerating buses...
496 20:51:22.920451 Show all devs... Before device enumeration.
497 20:51:22.923801 Root Device: enabled 1
498 20:51:22.927224 CPU_CLUSTER: 0: enabled 1
499 20:51:22.930409 DOMAIN: 0000: enabled 1
500 20:51:22.930493 PCI: 00:00.0: enabled 1
501 20:51:22.933826 PCI: 00:02.0: enabled 1
502 20:51:22.937108 PCI: 00:04.0: enabled 1
503 20:51:22.937191 PCI: 00:05.0: enabled 1
504 20:51:22.940858 PCI: 00:09.0: enabled 0
505 20:51:22.944113 PCI: 00:12.6: enabled 0
506 20:51:22.946941 PCI: 00:14.0: enabled 1
507 20:51:22.947025 PCI: 00:14.1: enabled 0
508 20:51:22.950625 PCI: 00:14.2: enabled 0
509 20:51:22.953480 PCI: 00:14.3: enabled 1
510 20:51:22.957119 PCI: 00:14.5: enabled 1
511 20:51:22.957202 PCI: 00:15.0: enabled 1
512 20:51:22.960121 PCI: 00:15.1: enabled 1
513 20:51:22.963445 PCI: 00:15.2: enabled 1
514 20:51:22.966811 PCI: 00:15.3: enabled 1
515 20:51:22.966895 PCI: 00:16.0: enabled 1
516 20:51:22.969905 PCI: 00:16.1: enabled 0
517 20:51:22.973495 PCI: 00:16.4: enabled 0
518 20:51:22.973582 PCI: 00:16.5: enabled 0
519 20:51:22.976957 PCI: 00:17.0: enabled 0
520 20:51:22.980195 PCI: 00:19.0: enabled 1
521 20:51:22.983716 PCI: 00:19.1: enabled 0
522 20:51:22.983799 PCI: 00:19.2: enabled 1
523 20:51:22.986487 PCI: 00:1a.0: enabled 1
524 20:51:22.989584 PCI: 00:1c.0: enabled 0
525 20:51:22.993206 PCI: 00:1c.1: enabled 0
526 20:51:22.993358 PCI: 00:1c.2: enabled 0
527 20:51:22.996379 PCI: 00:1c.3: enabled 0
528 20:51:22.999684 PCI: 00:1c.4: enabled 0
529 20:51:23.003137 PCI: 00:1c.5: enabled 0
530 20:51:23.003221 PCI: 00:1c.6: enabled 0
531 20:51:23.006659 PCI: 00:1c.7: enabled 1
532 20:51:23.009474 PCI: 00:1e.0: enabled 0
533 20:51:23.012744 PCI: 00:1e.1: enabled 0
534 20:51:23.012828 PCI: 00:1e.2: enabled 1
535 20:51:23.016785 PCI: 00:1e.3: enabled 0
536 20:51:23.019474 PCI: 00:1f.0: enabled 1
537 20:51:23.019557 PCI: 00:1f.1: enabled 1
538 20:51:23.022700 PCI: 00:1f.2: enabled 1
539 20:51:23.026284 PCI: 00:1f.3: enabled 1
540 20:51:23.029488 PCI: 00:1f.4: enabled 0
541 20:51:23.029571 PCI: 00:1f.5: enabled 1
542 20:51:23.032685 PCI: 00:1f.7: enabled 0
543 20:51:23.036095 GENERIC: 0.0: enabled 1
544 20:51:23.039287 GENERIC: 0.0: enabled 1
545 20:51:23.039371 USB0 port 0: enabled 1
546 20:51:23.042527 GENERIC: 0.0: enabled 1
547 20:51:23.045924 I2C: 00:2c: enabled 1
548 20:51:23.046024 I2C: 00:15: enabled 1
549 20:51:23.049519 GENERIC: 0.0: enabled 0
550 20:51:23.052605 I2C: 00:15: enabled 1
551 20:51:23.052688 I2C: 00:10: enabled 0
552 20:51:23.056476 I2C: 00:10: enabled 0
553 20:51:23.059092 I2C: 00:2c: enabled 1
554 20:51:23.062863 I2C: 00:40: enabled 1
555 20:51:23.062946 I2C: 00:10: enabled 1
556 20:51:23.065979 I2C: 00:39: enabled 1
557 20:51:23.069264 I2C: 00:36: enabled 1
558 20:51:23.069347 I2C: 00:10: enabled 0
559 20:51:23.072560 I2C: 00:0c: enabled 1
560 20:51:23.076006 I2C: 00:50: enabled 1
561 20:51:23.076089 I2C: 00:1a: enabled 1
562 20:51:23.078965 I2C: 00:1a: enabled 0
563 20:51:23.082774 I2C: 00:1a: enabled 0
564 20:51:23.082857 I2C: 00:28: enabled 1
565 20:51:23.085680 I2C: 00:29: enabled 1
566 20:51:23.088974 PCI: 00:00.0: enabled 1
567 20:51:23.089058 SPI: 00: enabled 1
568 20:51:23.092653 PNP: 0c09.0: enabled 1
569 20:51:23.095607 GENERIC: 0.0: enabled 0
570 20:51:23.095689 USB2 port 0: enabled 1
571 20:51:23.099010 USB2 port 1: enabled 1
572 20:51:23.102330 USB2 port 2: enabled 1
573 20:51:23.105364 USB2 port 3: enabled 1
574 20:51:23.105447 USB2 port 4: enabled 0
575 20:51:23.109040 USB2 port 5: enabled 1
576 20:51:23.112572 USB2 port 6: enabled 0
577 20:51:23.112655 USB2 port 7: enabled 1
578 20:51:23.115208 USB3 port 0: enabled 1
579 20:51:23.118911 USB3 port 1: enabled 1
580 20:51:23.118993 USB3 port 2: enabled 1
581 20:51:23.122347 USB3 port 3: enabled 1
582 20:51:23.125537 APIC: 00: enabled 1
583 20:51:23.125620 APIC: 02: enabled 1
584 20:51:23.128662 Compare with tree...
585 20:51:23.131784 Root Device: enabled 1
586 20:51:23.135218 CPU_CLUSTER: 0: enabled 1
587 20:51:23.135301 APIC: 00: enabled 1
588 20:51:23.138640 APIC: 02: enabled 1
589 20:51:23.141915 DOMAIN: 0000: enabled 1
590 20:51:23.144958 PCI: 00:00.0: enabled 1
591 20:51:23.145041 PCI: 00:02.0: enabled 1
592 20:51:23.148713 PCI: 00:04.0: enabled 1
593 20:51:23.152026 GENERIC: 0.0: enabled 1
594 20:51:23.155334 PCI: 00:05.0: enabled 1
595 20:51:23.158754 GENERIC: 0.0: enabled 1
596 20:51:23.158837 PCI: 00:09.0: enabled 0
597 20:51:23.161653 PCI: 00:12.6: enabled 0
598 20:51:23.164854 PCI: 00:14.0: enabled 1
599 20:51:23.168316 USB0 port 0: enabled 1
600 20:51:23.171569 USB2 port 0: enabled 1
601 20:51:23.171652 USB2 port 1: enabled 1
602 20:51:23.174992 USB2 port 2: enabled 1
603 20:51:23.178313 USB2 port 3: enabled 1
604 20:51:23.181385 USB2 port 4: enabled 0
605 20:51:23.184750 USB2 port 5: enabled 1
606 20:51:23.184833 USB2 port 6: enabled 0
607 20:51:23.187923 USB2 port 7: enabled 1
608 20:51:23.191315 USB3 port 0: enabled 1
609 20:51:23.194997 USB3 port 1: enabled 1
610 20:51:23.197972 USB3 port 2: enabled 1
611 20:51:23.201309 USB3 port 3: enabled 1
612 20:51:23.201393 PCI: 00:14.1: enabled 0
613 20:51:23.204846 PCI: 00:14.2: enabled 0
614 20:51:23.208297 PCI: 00:14.3: enabled 1
615 20:51:23.211059 GENERIC: 0.0: enabled 1
616 20:51:23.214781 PCI: 00:14.5: enabled 1
617 20:51:23.214864 PCI: 00:15.0: enabled 1
618 20:51:23.218123 I2C: 00:2c: enabled 1
619 20:51:23.221062 I2C: 00:15: enabled 1
620 20:51:23.224478 PCI: 00:15.1: enabled 1
621 20:51:23.224560 PCI: 00:15.2: enabled 1
622 20:51:23.227823 GENERIC: 0.0: enabled 0
623 20:51:23.231105 I2C: 00:15: enabled 1
624 20:51:23.234546 I2C: 00:10: enabled 0
625 20:51:23.237538 I2C: 00:10: enabled 0
626 20:51:23.237621 I2C: 00:2c: enabled 1
627 20:51:23.242584 I2C: 00:40: enabled 1
628 20:51:23.244119 I2C: 00:10: enabled 1
629 20:51:23.247595 I2C: 00:39: enabled 1
630 20:51:23.247679 PCI: 00:15.3: enabled 1
631 20:51:23.250953 I2C: 00:36: enabled 1
632 20:51:23.254607 I2C: 00:10: enabled 0
633 20:51:23.257655 I2C: 00:0c: enabled 1
634 20:51:23.261266 I2C: 00:50: enabled 1
635 20:51:23.261349 PCI: 00:16.0: enabled 1
636 20:51:23.264163 PCI: 00:16.1: enabled 0
637 20:51:23.267546 PCI: 00:16.4: enabled 0
638 20:51:23.270586 PCI: 00:16.5: enabled 0
639 20:51:23.270710 PCI: 00:17.0: enabled 0
640 20:51:23.274132 PCI: 00:19.0: enabled 1
641 20:51:23.277829 I2C: 00:1a: enabled 1
642 20:51:23.280528 I2C: 00:1a: enabled 0
643 20:51:23.284255 I2C: 00:1a: enabled 0
644 20:51:23.284338 I2C: 00:28: enabled 1
645 20:51:23.287347 I2C: 00:29: enabled 1
646 20:51:23.290809 PCI: 00:19.1: enabled 0
647 20:51:23.293728 PCI: 00:19.2: enabled 1
648 20:51:23.293806 PCI: 00:1a.0: enabled 1
649 20:51:23.297019 PCI: 00:1e.0: enabled 0
650 20:51:23.300719 PCI: 00:1e.1: enabled 0
651 20:51:23.304057 PCI: 00:1e.2: enabled 1
652 20:51:23.306911 SPI: 00: enabled 1
653 20:51:23.306998 PCI: 00:1e.3: enabled 0
654 20:51:23.310327 PCI: 00:1f.0: enabled 1
655 20:51:23.313804 PNP: 0c09.0: enabled 1
656 20:51:23.317132 PCI: 00:1f.1: enabled 1
657 20:51:23.320200 PCI: 00:1f.2: enabled 1
658 20:51:23.320283 PCI: 00:1f.3: enabled 1
659 20:51:23.323523 GENERIC: 0.0: enabled 0
660 20:51:23.326947 PCI: 00:1f.4: enabled 0
661 20:51:23.330354 PCI: 00:1f.5: enabled 1
662 20:51:23.333885 PCI: 00:1f.7: enabled 0
663 20:51:23.333969 Root Device scanning...
664 20:51:23.336912 scan_static_bus for Root Device
665 20:51:23.340048 CPU_CLUSTER: 0 enabled
666 20:51:23.343658 DOMAIN: 0000 enabled
667 20:51:23.343741 DOMAIN: 0000 scanning...
668 20:51:23.346906 PCI: pci_scan_bus for bus 00
669 20:51:23.350451 PCI: 00:00.0 [8086/0000] ops
670 20:51:23.353449 PCI: 00:00.0 [8086/4e22] enabled
671 20:51:23.356658 PCI: 00:02.0 [8086/0000] bus ops
672 20:51:23.359790 PCI: 00:02.0 [8086/4e55] enabled
673 20:51:23.363529 PCI: 00:04.0 [8086/0000] bus ops
674 20:51:23.366413 PCI: 00:04.0 [8086/4e03] enabled
675 20:51:23.370446 PCI: 00:05.0 [8086/0000] bus ops
676 20:51:23.372971 PCI: 00:05.0 [8086/4e19] enabled
677 20:51:23.376403 PCI: 00:08.0 [8086/4e11] enabled
678 20:51:23.379743 PCI: 00:14.0 [8086/0000] bus ops
679 20:51:23.383454 PCI: 00:14.0 [8086/4ded] enabled
680 20:51:23.386670 PCI: 00:14.2 [8086/4def] disabled
681 20:51:23.390072 PCI: 00:14.3 [8086/0000] bus ops
682 20:51:23.393359 PCI: 00:14.3 [8086/4df0] enabled
683 20:51:23.396850 PCI: 00:14.5 [8086/0000] ops
684 20:51:23.400137 PCI: 00:14.5 [8086/4df8] enabled
685 20:51:23.403423 PCI: 00:15.0 [8086/0000] bus ops
686 20:51:23.406848 PCI: 00:15.0 [8086/4de8] enabled
687 20:51:23.409967 PCI: 00:15.1 [8086/0000] bus ops
688 20:51:23.413163 PCI: 00:15.1 [8086/4de9] enabled
689 20:51:23.416561 PCI: 00:15.2 [8086/0000] bus ops
690 20:51:23.420039 PCI: 00:15.2 [8086/4dea] enabled
691 20:51:23.422979 PCI: 00:15.3 [8086/0000] bus ops
692 20:51:23.426714 PCI: 00:15.3 [8086/4deb] enabled
693 20:51:23.429606 PCI: 00:16.0 [8086/0000] ops
694 20:51:23.433179 PCI: 00:16.0 [8086/4de0] enabled
695 20:51:23.436184 PCI: 00:19.0 [8086/0000] bus ops
696 20:51:23.439443 PCI: 00:19.0 [8086/4dc5] enabled
697 20:51:23.443317 PCI: 00:19.2 [8086/0000] ops
698 20:51:23.446339 PCI: 00:19.2 [8086/4dc7] enabled
699 20:51:23.449820 PCI: 00:1a.0 [8086/0000] ops
700 20:51:23.452875 PCI: 00:1a.0 [8086/4dc4] enabled
701 20:51:23.455983 PCI: 00:1e.0 [8086/0000] ops
702 20:51:23.459643 PCI: 00:1e.0 [8086/4da8] disabled
703 20:51:23.463085 PCI: 00:1e.2 [8086/0000] bus ops
704 20:51:23.465899 PCI: 00:1e.2 [8086/4daa] enabled
705 20:51:23.469508 PCI: 00:1f.0 [8086/0000] bus ops
706 20:51:23.472457 PCI: 00:1f.0 [8086/4d87] enabled
707 20:51:23.475735 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 20:51:23.479958 RTC Init
709 20:51:23.482581 Set power on after power failure.
710 20:51:23.482697 Disabling Deep S3
711 20:51:23.485498 Disabling Deep S3
712 20:51:23.489001 Disabling Deep S4
713 20:51:23.489084 Disabling Deep S4
714 20:51:23.492648 Disabling Deep S5
715 20:51:23.492730 Disabling Deep S5
716 20:51:23.495724 PCI: 00:1f.2 [0000/0000] hidden
717 20:51:23.498850 PCI: 00:1f.3 [8086/0000] bus ops
718 20:51:23.502541 PCI: 00:1f.3 [8086/4dc8] enabled
719 20:51:23.505662 PCI: 00:1f.5 [8086/0000] bus ops
720 20:51:23.508888 PCI: 00:1f.5 [8086/4da4] enabled
721 20:51:23.512462 PCI: Leftover static devices:
722 20:51:23.515811 PCI: 00:12.6
723 20:51:23.515893 PCI: 00:09.0
724 20:51:23.515959 PCI: 00:14.1
725 20:51:23.519394 PCI: 00:16.1
726 20:51:23.519477 PCI: 00:16.4
727 20:51:23.522127 PCI: 00:16.5
728 20:51:23.522210 PCI: 00:17.0
729 20:51:23.522274 PCI: 00:19.1
730 20:51:23.525692 PCI: 00:1e.1
731 20:51:23.525775 PCI: 00:1e.3
732 20:51:23.529080 PCI: 00:1f.1
733 20:51:23.529196 PCI: 00:1f.4
734 20:51:23.529288 PCI: 00:1f.7
735 20:51:23.532105 PCI: Check your devicetree.cb.
736 20:51:23.535212 PCI: 00:02.0 scanning...
737 20:51:23.539052 scan_generic_bus for PCI: 00:02.0
738 20:51:23.542548 scan_generic_bus for PCI: 00:02.0 done
739 20:51:23.546743 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 20:51:23.550061 PCI: 00:04.0 scanning...
741 20:51:23.552975 scan_generic_bus for PCI: 00:04.0
742 20:51:23.556372 GENERIC: 0.0 enabled
743 20:51:23.562971 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 20:51:23.566679 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 20:51:23.569569 PCI: 00:05.0 scanning...
746 20:51:23.572711 scan_generic_bus for PCI: 00:05.0
747 20:51:23.576612 GENERIC: 0.0 enabled
748 20:51:23.582882 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 20:51:23.586536 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 20:51:23.589703 PCI: 00:14.0 scanning...
751 20:51:23.592865 scan_static_bus for PCI: 00:14.0
752 20:51:23.592949 USB0 port 0 enabled
753 20:51:23.595784 USB0 port 0 scanning...
754 20:51:23.599584 scan_static_bus for USB0 port 0
755 20:51:23.603082 USB2 port 0 enabled
756 20:51:23.603165 USB2 port 1 enabled
757 20:51:23.606004 USB2 port 2 enabled
758 20:51:23.609071 USB2 port 3 enabled
759 20:51:23.609154 USB2 port 4 disabled
760 20:51:23.612701 USB2 port 5 enabled
761 20:51:23.615823 USB2 port 6 disabled
762 20:51:23.615906 USB2 port 7 enabled
763 20:51:23.619295 USB3 port 0 enabled
764 20:51:23.619378 USB3 port 1 enabled
765 20:51:23.622731 USB3 port 2 enabled
766 20:51:23.626055 USB3 port 3 enabled
767 20:51:23.626138 USB2 port 0 scanning...
768 20:51:23.629137 scan_static_bus for USB2 port 0
769 20:51:23.636521 scan_static_bus for USB2 port 0 done
770 20:51:23.639483 scan_bus: bus USB2 port 0 finished in 6 msecs
771 20:51:23.642725 USB2 port 1 scanning...
772 20:51:23.645954 scan_static_bus for USB2 port 1
773 20:51:23.649178 scan_static_bus for USB2 port 1 done
774 20:51:23.652437 scan_bus: bus USB2 port 1 finished in 6 msecs
775 20:51:23.655820 USB2 port 2 scanning...
776 20:51:23.658762 scan_static_bus for USB2 port 2
777 20:51:23.662066 scan_static_bus for USB2 port 2 done
778 20:51:23.665309 scan_bus: bus USB2 port 2 finished in 6 msecs
779 20:51:23.668862 USB2 port 3 scanning...
780 20:51:23.672209 scan_static_bus for USB2 port 3
781 20:51:23.675498 scan_static_bus for USB2 port 3 done
782 20:51:23.681981 scan_bus: bus USB2 port 3 finished in 6 msecs
783 20:51:23.682064 USB2 port 5 scanning...
784 20:51:23.685585 scan_static_bus for USB2 port 5
785 20:51:23.691834 scan_static_bus for USB2 port 5 done
786 20:51:23.695386 scan_bus: bus USB2 port 5 finished in 6 msecs
787 20:51:23.698845 USB2 port 7 scanning...
788 20:51:23.702145 scan_static_bus for USB2 port 7
789 20:51:23.705092 scan_static_bus for USB2 port 7 done
790 20:51:23.708701 scan_bus: bus USB2 port 7 finished in 6 msecs
791 20:51:23.711821 USB3 port 0 scanning...
792 20:51:23.715004 scan_static_bus for USB3 port 0
793 20:51:23.718434 scan_static_bus for USB3 port 0 done
794 20:51:23.721829 scan_bus: bus USB3 port 0 finished in 6 msecs
795 20:51:23.724811 USB3 port 1 scanning...
796 20:51:23.728077 scan_static_bus for USB3 port 1
797 20:51:23.731427 scan_static_bus for USB3 port 1 done
798 20:51:23.738016 scan_bus: bus USB3 port 1 finished in 6 msecs
799 20:51:23.738098 USB3 port 2 scanning...
800 20:51:23.741595 scan_static_bus for USB3 port 2
801 20:51:23.748185 scan_static_bus for USB3 port 2 done
802 20:51:23.751598 scan_bus: bus USB3 port 2 finished in 6 msecs
803 20:51:23.754843 USB3 port 3 scanning...
804 20:51:23.758207 scan_static_bus for USB3 port 3
805 20:51:23.761191 scan_static_bus for USB3 port 3 done
806 20:51:23.764701 scan_bus: bus USB3 port 3 finished in 6 msecs
807 20:51:23.768228 scan_static_bus for USB0 port 0 done
808 20:51:23.774397 scan_bus: bus USB0 port 0 finished in 172 msecs
809 20:51:23.777859 scan_static_bus for PCI: 00:14.0 done
810 20:51:23.781272 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
811 20:51:23.784469 PCI: 00:14.3 scanning...
812 20:51:23.787948 scan_static_bus for PCI: 00:14.3
813 20:51:23.791504 GENERIC: 0.0 enabled
814 20:51:23.794316 scan_static_bus for PCI: 00:14.3 done
815 20:51:23.797977 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 20:51:23.801409 PCI: 00:15.0 scanning...
817 20:51:23.804290 scan_static_bus for PCI: 00:15.0
818 20:51:23.807844 I2C: 00:2c enabled
819 20:51:23.807928 I2C: 00:15 enabled
820 20:51:23.814388 scan_static_bus for PCI: 00:15.0 done
821 20:51:23.818075 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
822 20:51:23.821122 PCI: 00:15.1 scanning...
823 20:51:23.824106 scan_static_bus for PCI: 00:15.1
824 20:51:23.827429 scan_static_bus for PCI: 00:15.1 done
825 20:51:23.830623 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 20:51:23.834219 PCI: 00:15.2 scanning...
827 20:51:23.837741 scan_static_bus for PCI: 00:15.2
828 20:51:23.840776 GENERIC: 0.0 disabled
829 20:51:23.840859 I2C: 00:15 enabled
830 20:51:23.843967 I2C: 00:10 disabled
831 20:51:23.847431 I2C: 00:10 disabled
832 20:51:23.847515 I2C: 00:2c enabled
833 20:51:23.850879 I2C: 00:40 enabled
834 20:51:23.850962 I2C: 00:10 enabled
835 20:51:23.853989 I2C: 00:39 enabled
836 20:51:23.857402 scan_static_bus for PCI: 00:15.2 done
837 20:51:23.863562 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 20:51:23.863647 PCI: 00:15.3 scanning...
839 20:51:23.867087 scan_static_bus for PCI: 00:15.3
840 20:51:23.870943 I2C: 00:36 enabled
841 20:51:23.873541 I2C: 00:10 disabled
842 20:51:23.873629 I2C: 00:0c enabled
843 20:51:23.876951 I2C: 00:50 enabled
844 20:51:23.880368 scan_static_bus for PCI: 00:15.3 done
845 20:51:23.884251 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 20:51:23.887121 PCI: 00:19.0 scanning...
847 20:51:23.890423 scan_static_bus for PCI: 00:19.0
848 20:51:23.893756 I2C: 00:1a enabled
849 20:51:23.893845 I2C: 00:1a disabled
850 20:51:23.897018 I2C: 00:1a disabled
851 20:51:23.900252 I2C: 00:28 enabled
852 20:51:23.900342 I2C: 00:29 enabled
853 20:51:23.903742 scan_static_bus for PCI: 00:19.0 done
854 20:51:23.910112 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 20:51:23.913449 PCI: 00:1e.2 scanning...
856 20:51:23.916843 scan_generic_bus for PCI: 00:1e.2
857 20:51:23.916928 SPI: 00 enabled
858 20:51:23.923487 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 20:51:23.926774 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 20:51:23.929806 PCI: 00:1f.0 scanning...
861 20:51:23.933264 scan_static_bus for PCI: 00:1f.0
862 20:51:23.936447 PNP: 0c09.0 enabled
863 20:51:23.940071 PNP: 0c09.0 scanning...
864 20:51:23.942902 scan_static_bus for PNP: 0c09.0
865 20:51:23.946549 scan_static_bus for PNP: 0c09.0 done
866 20:51:23.950426 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 20:51:23.953335 scan_static_bus for PCI: 00:1f.0 done
868 20:51:23.959543 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 20:51:23.963404 PCI: 00:1f.3 scanning...
870 20:51:23.966164 scan_static_bus for PCI: 00:1f.3
871 20:51:23.966266 GENERIC: 0.0 disabled
872 20:51:23.969506 scan_static_bus for PCI: 00:1f.3 done
873 20:51:23.976417 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 20:51:23.979359 PCI: 00:1f.5 scanning...
875 20:51:23.983032 scan_generic_bus for PCI: 00:1f.5
876 20:51:23.986033 scan_generic_bus for PCI: 00:1f.5 done
877 20:51:23.989646 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 20:51:23.995914 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
879 20:51:23.999530 scan_static_bus for Root Device done
880 20:51:24.003024 scan_bus: bus Root Device finished in 664 msecs
881 20:51:24.005912 done
882 20:51:24.009319 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
883 20:51:24.013755 Chrome EC: UHEPI supported
884 20:51:24.020592 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 20:51:24.027173 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 20:51:24.030322 SPI flash protection: WPSW=1 SRP0=0
887 20:51:24.037100 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 20:51:24.040332 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
889 20:51:24.043607 found VGA at PCI: 00:02.0
890 20:51:24.046435 Setting up VGA for PCI: 00:02.0
891 20:51:24.053583 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 20:51:24.057187 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 20:51:24.059951 Allocating resources...
894 20:51:24.063178 Reading resources...
895 20:51:24.066981 Root Device read_resources bus 0 link: 0
896 20:51:24.070099 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 20:51:24.076423 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 20:51:24.079827 DOMAIN: 0000 read_resources bus 0 link: 0
899 20:51:24.086510 PCI: 00:04.0 read_resources bus 1 link: 0
900 20:51:24.089928 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 20:51:24.092891 PCI: 00:05.0 read_resources bus 2 link: 0
902 20:51:24.099730 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 20:51:24.103365 PCI: 00:14.0 read_resources bus 0 link: 0
904 20:51:24.109733 USB0 port 0 read_resources bus 0 link: 0
905 20:51:24.116177 USB0 port 0 read_resources bus 0 link: 0 done
906 20:51:24.119779 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 20:51:24.123380 PCI: 00:14.3 read_resources bus 0 link: 0
908 20:51:24.131006 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 20:51:24.177700 PCI: 00:15.0 read_resources bus 0 link: 0
910 20:51:24.177788 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 20:51:24.178088 PCI: 00:15.2 read_resources bus 0 link: 0
912 20:51:24.178189 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 20:51:24.178293 PCI: 00:15.3 read_resources bus 0 link: 0
914 20:51:24.178396 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 20:51:24.178472 PCI: 00:19.0 read_resources bus 0 link: 0
916 20:51:24.178534 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 20:51:24.178592 PCI: 00:1e.2 read_resources bus 3 link: 0
918 20:51:24.181555 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 20:51:24.184931 PCI: 00:1f.0 read_resources bus 0 link: 0
920 20:51:24.188290 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 20:51:24.194953 PCI: 00:1f.3 read_resources bus 0 link: 0
922 20:51:24.198058 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 20:51:24.205048 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 20:51:24.208093 Root Device read_resources bus 0 link: 0 done
925 20:51:24.211559 Done reading resources.
926 20:51:24.214513 Show resources in subtree (Root Device)...After reading.
927 20:51:24.221249 Root Device child on link 0 CPU_CLUSTER: 0
928 20:51:24.224697 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 20:51:24.224798 APIC: 00
930 20:51:24.228073 APIC: 02
931 20:51:24.231051 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 20:51:24.241263 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 20:51:24.251243 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 20:51:24.251352 PCI: 00:00.0
935 20:51:24.261042 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 20:51:24.270958 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 20:51:24.280670 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 20:51:24.290448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 20:51:24.300717 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 20:51:24.307398 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 20:51:24.316833 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 20:51:24.327031 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 20:51:24.337016 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 20:51:24.347106 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 20:51:24.353699 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 20:51:24.363263 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 20:51:24.373036 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 20:51:24.383210 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 20:51:24.393313 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 20:51:24.399920 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 20:51:24.409631 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 20:51:24.419115 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 20:51:24.429046 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 20:51:24.432626 PCI: 00:02.0
955 20:51:24.442542 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 20:51:24.452737 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 20:51:24.459073 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 20:51:24.465800 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 20:51:24.475364 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 20:51:24.475441 GENERIC: 0.0
961 20:51:24.482369 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 20:51:24.492505 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 20:51:24.492615 GENERIC: 0.0
964 20:51:24.495497 PCI: 00:08.0
965 20:51:24.505585 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 20:51:24.508877 PCI: 00:14.0 child on link 0 USB0 port 0
967 20:51:24.519031 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 20:51:24.521884 USB0 port 0 child on link 0 USB2 port 0
969 20:51:24.525385 USB2 port 0
970 20:51:24.525490 USB2 port 1
971 20:51:24.528740 USB2 port 2
972 20:51:24.528810 USB2 port 3
973 20:51:24.531934 USB2 port 4
974 20:51:24.535002 USB2 port 5
975 20:51:24.535107 USB2 port 6
976 20:51:24.538603 USB2 port 7
977 20:51:24.538738 USB3 port 0
978 20:51:24.541886 USB3 port 1
979 20:51:24.541981 USB3 port 2
980 20:51:24.544932 USB3 port 3
981 20:51:24.545029 PCI: 00:14.2
982 20:51:24.551779 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 20:51:24.561412 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 20:51:24.561515 GENERIC: 0.0
985 20:51:24.565184 PCI: 00:14.5
986 20:51:24.574855 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 20:51:24.578169 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 20:51:24.587841 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 20:51:24.587950 I2C: 00:2c
990 20:51:24.591385 I2C: 00:15
991 20:51:24.591499 PCI: 00:15.1
992 20:51:24.601490 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 20:51:24.608086 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 20:51:24.617927 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 20:51:24.618041 GENERIC: 0.0
996 20:51:24.621265 I2C: 00:15
997 20:51:24.621367 I2C: 00:10
998 20:51:24.624786 I2C: 00:10
999 20:51:24.624900 I2C: 00:2c
1000 20:51:24.627875 I2C: 00:40
1001 20:51:24.627979 I2C: 00:10
1002 20:51:24.628071 I2C: 00:39
1003 20:51:24.634043 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 20:51:24.644658 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 20:51:24.644775 I2C: 00:36
1006 20:51:24.647481 I2C: 00:10
1007 20:51:24.647582 I2C: 00:0c
1008 20:51:24.651072 I2C: 00:50
1009 20:51:24.651185 PCI: 00:16.0
1010 20:51:24.660957 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 20:51:24.664358 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 20:51:24.674002 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 20:51:24.677331 I2C: 00:1a
1014 20:51:24.677437 I2C: 00:1a
1015 20:51:24.680506 I2C: 00:1a
1016 20:51:24.680616 I2C: 00:28
1017 20:51:24.684180 I2C: 00:29
1018 20:51:24.684318 PCI: 00:19.2
1019 20:51:24.697048 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 20:51:24.706879 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 20:51:24.706970 PCI: 00:1a.0
1022 20:51:24.716848 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 20:51:24.720343 PCI: 00:1e.0
1024 20:51:24.723379 PCI: 00:1e.2 child on link 0 SPI: 00
1025 20:51:24.733441 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 20:51:24.733549 SPI: 00
1027 20:51:24.740182 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 20:51:24.746386 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 20:51:24.750302 PNP: 0c09.0
1030 20:51:24.756801 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 20:51:24.759758 PCI: 00:1f.2
1032 20:51:24.770197 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 20:51:24.776333 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 20:51:24.783299 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 20:51:24.792992 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 20:51:24.803166 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 20:51:24.803280 GENERIC: 0.0
1038 20:51:24.806274 PCI: 00:1f.5
1039 20:51:24.814083 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 20:51:24.824130 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 20:51:24.830492 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 20:51:24.836998 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 20:51:24.843710 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 20:51:24.850865 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 20:51:24.857082 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 20:51:24.860348 DOMAIN: 0000: Resource ranges:
1047 20:51:24.863649 * Base: 1000, Size: 800, Tag: 100
1048 20:51:24.870316 * Base: 1900, Size: e700, Tag: 100
1049 20:51:24.873452 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 20:51:24.880147 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 20:51:24.886757 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 20:51:24.893175 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 20:51:24.903453 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 20:51:24.910057 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 20:51:24.916977 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 20:51:24.926306 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 20:51:24.933287 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 20:51:24.939913 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 20:51:24.949741 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 20:51:24.956417 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 20:51:24.962788 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 20:51:24.972730 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 20:51:24.979406 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 20:51:24.986413 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 20:51:24.996179 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 20:51:25.002656 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 20:51:25.009297 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 20:51:25.018878 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 20:51:25.025583 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 20:51:25.032730 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 20:51:25.042219 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 20:51:25.048745 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 20:51:25.052350 DOMAIN: 0000: Resource ranges:
1074 20:51:25.055224 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 20:51:25.061958 * Base: d0000000, Size: 2b000000, Tag: 200
1076 20:51:25.065483 * Base: fb001000, Size: 2fff000, Tag: 200
1077 20:51:25.068893 * Base: fe010000, Size: 22000, Tag: 200
1078 20:51:25.071719 * Base: fe033000, Size: a4d000, Tag: 200
1079 20:51:25.078513 * Base: fea88000, Size: 2f8000, Tag: 200
1080 20:51:25.081984 * Base: fed88000, Size: 8000, Tag: 200
1081 20:51:25.085204 * Base: fed93000, Size: d000, Tag: 200
1082 20:51:25.088634 * Base: feda2000, Size: 125e000, Tag: 200
1083 20:51:25.094880 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 20:51:25.102013 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 20:51:25.108628 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 20:51:25.114786 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 20:51:25.121505 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 20:51:25.128218 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 20:51:25.134648 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 20:51:25.141738 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 20:51:25.147764 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 20:51:25.154769 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 20:51:25.161637 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 20:51:25.168116 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 20:51:25.174334 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 20:51:25.180813 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 20:51:25.187741 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 20:51:25.194357 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 20:51:25.200994 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 20:51:25.207259 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 20:51:25.214080 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 20:51:25.221138 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 20:51:25.227717 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 20:51:25.234365 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 20:51:25.240442 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 20:51:25.247242 Root Device assign_resources, bus 0 link: 0
1107 20:51:25.250404 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 20:51:25.256978 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 20:51:25.267203 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 20:51:25.273650 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 20:51:25.283186 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 20:51:25.286719 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 20:51:25.293239 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 20:51:25.299795 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 20:51:25.303254 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 20:51:25.309714 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 20:51:25.316181 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 20:51:25.326057 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 20:51:25.329284 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 20:51:25.335833 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 20:51:25.342396 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 20:51:25.346021 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 20:51:25.352948 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 20:51:25.359018 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 20:51:25.369093 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 20:51:25.372433 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 20:51:25.375903 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 20:51:25.385614 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 20:51:25.392438 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 20:51:25.399179 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 20:51:25.402746 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 20:51:25.409250 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 20:51:25.415480 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 20:51:25.419050 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 20:51:25.428857 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 20:51:25.435309 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 20:51:25.441929 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 20:51:25.445194 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 20:51:25.452121 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 20:51:25.461585 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 20:51:25.468187 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 20:51:25.474694 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 20:51:25.478582 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 20:51:25.484624 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 20:51:25.487784 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 20:51:25.491217 LPC: Trying to open IO window from 800 size 1ff
1147 20:51:25.501265 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 20:51:25.508102 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 20:51:25.514937 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 20:51:25.518002 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 20:51:25.527648 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 20:51:25.531288 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 20:51:25.534758 Root Device assign_resources, bus 0 link: 0
1154 20:51:25.537793 Done setting resources.
1155 20:51:25.544645 Show resources in subtree (Root Device)...After assigning values.
1156 20:51:25.547652 Root Device child on link 0 CPU_CLUSTER: 0
1157 20:51:25.554079 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 20:51:25.554162 APIC: 00
1159 20:51:25.554258 APIC: 02
1160 20:51:25.561164 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 20:51:25.567334 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 20:51:25.577476 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 20:51:25.580360 PCI: 00:00.0
1164 20:51:25.590541 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 20:51:25.600739 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 20:51:25.610341 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 20:51:25.617111 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 20:51:25.627034 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 20:51:25.636769 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 20:51:25.646547 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 20:51:25.656416 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 20:51:25.663452 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 20:51:25.672842 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 20:51:25.682964 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 20:51:25.692889 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 20:51:25.703135 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 20:51:25.709036 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 20:51:25.719472 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 20:51:25.728971 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 20:51:25.739000 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 20:51:25.749142 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 20:51:25.758844 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 20:51:25.758958 PCI: 00:02.0
1184 20:51:25.768626 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 20:51:25.781723 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 20:51:25.788646 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 20:51:25.795011 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 20:51:25.804921 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 20:51:25.805005 GENERIC: 0.0
1190 20:51:25.811676 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 20:51:25.821428 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 20:51:25.824955 GENERIC: 0.0
1193 20:51:25.825030 PCI: 00:08.0
1194 20:51:25.834966 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 20:51:25.838279 PCI: 00:14.0 child on link 0 USB0 port 0
1196 20:51:25.851544 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 20:51:25.854757 USB0 port 0 child on link 0 USB2 port 0
1198 20:51:25.854837 USB2 port 0
1199 20:51:25.858446 USB2 port 1
1200 20:51:25.858542 USB2 port 2
1201 20:51:25.861094 USB2 port 3
1202 20:51:25.865148 USB2 port 4
1203 20:51:25.865223 USB2 port 5
1204 20:51:25.868037 USB2 port 6
1205 20:51:25.868106 USB2 port 7
1206 20:51:25.871162 USB3 port 0
1207 20:51:25.871237 USB3 port 1
1208 20:51:25.874677 USB3 port 2
1209 20:51:25.874751 USB3 port 3
1210 20:51:25.878302 PCI: 00:14.2
1211 20:51:25.881541 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 20:51:25.891421 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 20:51:25.894462 GENERIC: 0.0
1214 20:51:25.894570 PCI: 00:14.5
1215 20:51:25.904464 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 20:51:25.911016 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 20:51:25.920893 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 20:51:25.920973 I2C: 00:2c
1219 20:51:25.924642 I2C: 00:15
1220 20:51:25.924713 PCI: 00:15.1
1221 20:51:25.934239 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 20:51:25.940910 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 20:51:25.950518 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 20:51:25.950631 GENERIC: 0.0
1225 20:51:25.953890 I2C: 00:15
1226 20:51:25.953997 I2C: 00:10
1227 20:51:25.956970 I2C: 00:10
1228 20:51:25.957050 I2C: 00:2c
1229 20:51:25.960933 I2C: 00:40
1230 20:51:25.961005 I2C: 00:10
1231 20:51:25.963802 I2C: 00:39
1232 20:51:25.967135 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 20:51:25.977402 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 20:51:25.977476 I2C: 00:36
1235 20:51:25.980339 I2C: 00:10
1236 20:51:25.980414 I2C: 00:0c
1237 20:51:25.983981 I2C: 00:50
1238 20:51:25.984051 PCI: 00:16.0
1239 20:51:25.996996 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 20:51:25.999995 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 20:51:26.009980 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 20:51:26.010065 I2C: 00:1a
1243 20:51:26.013440 I2C: 00:1a
1244 20:51:26.013521 I2C: 00:1a
1245 20:51:26.016617 I2C: 00:28
1246 20:51:26.016689 I2C: 00:29
1247 20:51:26.020022 PCI: 00:19.2
1248 20:51:26.030229 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 20:51:26.040236 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 20:51:26.043153 PCI: 00:1a.0
1251 20:51:26.052852 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 20:51:26.052945 PCI: 00:1e.0
1253 20:51:26.059873 PCI: 00:1e.2 child on link 0 SPI: 00
1254 20:51:26.069868 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 20:51:26.069948 SPI: 00
1256 20:51:26.073219 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 20:51:26.083031 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 20:51:26.083106 PNP: 0c09.0
1259 20:51:26.092506 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 20:51:26.096242 PCI: 00:1f.2
1261 20:51:26.102777 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 20:51:26.112657 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 20:51:26.118999 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 20:51:26.129071 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 20:51:26.138988 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 20:51:26.139074 GENERIC: 0.0
1267 20:51:26.142721 PCI: 00:1f.5
1268 20:51:26.151997 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 20:51:26.155835 Done allocating resources.
1270 20:51:26.161993 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2094 ms
1271 20:51:26.165120 Enabling resources...
1272 20:51:26.168483 PCI: 00:00.0 subsystem <- 8086/4e22
1273 20:51:26.168554 PCI: 00:00.0 cmd <- 06
1274 20:51:26.175374 PCI: 00:02.0 subsystem <- 8086/4e55
1275 20:51:26.175451 PCI: 00:02.0 cmd <- 03
1276 20:51:26.178596 PCI: 00:04.0 subsystem <- 8086/4e03
1277 20:51:26.182367 PCI: 00:04.0 cmd <- 02
1278 20:51:26.185255 PCI: 00:05.0 bridge ctrl <- 0003
1279 20:51:26.188272 PCI: 00:05.0 subsystem <- 8086/4e19
1280 20:51:26.192407 PCI: 00:05.0 cmd <- 02
1281 20:51:26.195134 PCI: 00:08.0 cmd <- 06
1282 20:51:26.198576 PCI: 00:14.0 subsystem <- 8086/4ded
1283 20:51:26.201757 PCI: 00:14.0 cmd <- 02
1284 20:51:26.204975 PCI: 00:14.3 subsystem <- 8086/4df0
1285 20:51:26.205056 PCI: 00:14.3 cmd <- 02
1286 20:51:26.211730 PCI: 00:14.5 subsystem <- 8086/4df8
1287 20:51:26.211808 PCI: 00:14.5 cmd <- 06
1288 20:51:26.215270 PCI: 00:15.0 subsystem <- 8086/4de8
1289 20:51:26.218338 PCI: 00:15.0 cmd <- 02
1290 20:51:26.222147 PCI: 00:15.1 subsystem <- 8086/4de9
1291 20:51:26.224910 PCI: 00:15.1 cmd <- 02
1292 20:51:26.228607 PCI: 00:15.2 subsystem <- 8086/4dea
1293 20:51:26.231785 PCI: 00:15.2 cmd <- 02
1294 20:51:26.235218 PCI: 00:15.3 subsystem <- 8086/4deb
1295 20:51:26.238879 PCI: 00:15.3 cmd <- 02
1296 20:51:26.241804 PCI: 00:16.0 subsystem <- 8086/4de0
1297 20:51:26.245027 PCI: 00:16.0 cmd <- 02
1298 20:51:26.248009 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 20:51:26.248087 PCI: 00:19.0 cmd <- 02
1300 20:51:26.254902 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 20:51:26.254984 PCI: 00:19.2 cmd <- 06
1302 20:51:26.258201 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 20:51:26.261539 PCI: 00:1a.0 cmd <- 06
1304 20:51:26.265198 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 20:51:26.268128 PCI: 00:1e.2 cmd <- 06
1306 20:51:26.271505 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 20:51:26.274821 PCI: 00:1f.0 cmd <- 407
1308 20:51:26.277922 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 20:51:26.281061 PCI: 00:1f.3 cmd <- 02
1310 20:51:26.284729 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 20:51:26.287856 PCI: 00:1f.5 cmd <- 406
1312 20:51:26.287929 done.
1313 20:51:26.294774 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 20:51:26.297853 Initializing devices...
1315 20:51:26.297927 Root Device init
1316 20:51:26.301283 mainboard: EC init
1317 20:51:26.304643 Chrome EC: Set SMI mask to 0x0000000000000000
1318 20:51:26.311445 Chrome EC: clear events_b mask to 0x0000000000000000
1319 20:51:26.318338 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 20:51:26.324695 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 20:51:26.327961 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 20:51:26.335260 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 20:51:26.338112 Root Device init finished in 35 msecs
1324 20:51:26.341480 PCI: 00:00.0 init
1325 20:51:26.345041 CPU TDP = 6 Watts
1326 20:51:26.345115 CPU PL1 = 7 Watts
1327 20:51:26.347902 CPU PL2 = 12 Watts
1328 20:51:26.351670 PCI: 00:00.0 init finished in 6 msecs
1329 20:51:26.354707 PCI: 00:02.0 init
1330 20:51:26.358425 GMA: Found VBT in CBFS
1331 20:51:26.358524 GMA: Found valid VBT in CBFS
1332 20:51:26.364823 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 20:51:26.371430 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 20:51:26.377636 PCI: 00:02.0 init finished in 18 msecs
1335 20:51:26.377725 PCI: 00:08.0 init
1336 20:51:26.384737 PCI: 00:08.0 init finished in 0 msecs
1337 20:51:26.384839 PCI: 00:14.0 init
1338 20:51:26.391175 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 20:51:26.394330 PCI: 00:14.0 init finished in 4 msecs
1340 20:51:26.397735 PCI: 00:15.0 init
1341 20:51:26.397835 I2C bus 0 version 0x3230302a
1342 20:51:26.404172 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 20:51:26.407556 PCI: 00:15.0 init finished in 6 msecs
1344 20:51:26.407637 PCI: 00:15.1 init
1345 20:51:26.411006 I2C bus 1 version 0x3230302a
1346 20:51:26.414393 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 20:51:26.417681 PCI: 00:15.1 init finished in 6 msecs
1348 20:51:26.420990 PCI: 00:15.2 init
1349 20:51:26.424058 I2C bus 2 version 0x3230302a
1350 20:51:26.427692 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 20:51:26.430932 PCI: 00:15.2 init finished in 6 msecs
1352 20:51:26.434438 PCI: 00:15.3 init
1353 20:51:26.437302 I2C bus 3 version 0x3230302a
1354 20:51:26.440832 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 20:51:26.444092 PCI: 00:15.3 init finished in 6 msecs
1356 20:51:26.447674 PCI: 00:16.0 init
1357 20:51:26.451099 PCI: 00:16.0 init finished in 0 msecs
1358 20:51:26.451193 PCI: 00:19.0 init
1359 20:51:26.454032 I2C bus 4 version 0x3230302a
1360 20:51:26.457222 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 20:51:26.460797 PCI: 00:19.0 init finished in 6 msecs
1362 20:51:26.464504 PCI: 00:1a.0 init
1363 20:51:26.468435 PCI: 00:1a.0 init finished in 0 msecs
1364 20:51:26.471008 PCI: 00:1f.0 init
1365 20:51:26.474338 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 20:51:26.480987 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 20:51:26.481064 IOAPIC: ID = 0x02
1368 20:51:26.484377 IOAPIC: Dumping registers
1369 20:51:26.487795 reg 0x0000: 0x02000000
1370 20:51:26.487872 reg 0x0001: 0x00770020
1371 20:51:26.491153 reg 0x0002: 0x00000000
1372 20:51:26.494338 PCI: 00:1f.0 init finished in 21 msecs
1373 20:51:26.497814 PCI: 00:1f.2 init
1374 20:51:26.501494 Disabling ACPI via APMC.
1375 20:51:26.504470 APMC done.
1376 20:51:26.508059 PCI: 00:1f.2 init finished in 6 msecs
1377 20:51:26.518801 PNP: 0c09.0 init
1378 20:51:26.522180 Google Chrome EC uptime: 6.499 seconds
1379 20:51:26.528885 Google Chrome AP resets since EC boot: 0
1380 20:51:26.532251 Google Chrome most recent AP reset causes:
1381 20:51:26.538489 Google Chrome EC reset flags at last EC boot: reset-pin
1382 20:51:26.542133 PNP: 0c09.0 init finished in 18 msecs
1383 20:51:26.542207 Devices initialized
1384 20:51:26.545562 Show all devs... After init.
1385 20:51:26.548858 Root Device: enabled 1
1386 20:51:26.552080 CPU_CLUSTER: 0: enabled 1
1387 20:51:26.555341 DOMAIN: 0000: enabled 1
1388 20:51:26.555455 PCI: 00:00.0: enabled 1
1389 20:51:26.558588 PCI: 00:02.0: enabled 1
1390 20:51:26.562170 PCI: 00:04.0: enabled 1
1391 20:51:26.562251 PCI: 00:05.0: enabled 1
1392 20:51:26.565520 PCI: 00:09.0: enabled 0
1393 20:51:26.568432 PCI: 00:12.6: enabled 0
1394 20:51:26.571911 PCI: 00:14.0: enabled 1
1395 20:51:26.572009 PCI: 00:14.1: enabled 0
1396 20:51:26.575292 PCI: 00:14.2: enabled 0
1397 20:51:26.578699 PCI: 00:14.3: enabled 1
1398 20:51:26.581695 PCI: 00:14.5: enabled 1
1399 20:51:26.581776 PCI: 00:15.0: enabled 1
1400 20:51:26.585065 PCI: 00:15.1: enabled 1
1401 20:51:26.588680 PCI: 00:15.2: enabled 1
1402 20:51:26.591937 PCI: 00:15.3: enabled 1
1403 20:51:26.592018 PCI: 00:16.0: enabled 1
1404 20:51:26.594794 PCI: 00:16.1: enabled 0
1405 20:51:26.598589 PCI: 00:16.4: enabled 0
1406 20:51:26.601820 PCI: 00:16.5: enabled 0
1407 20:51:26.601901 PCI: 00:17.0: enabled 0
1408 20:51:26.605162 PCI: 00:19.0: enabled 1
1409 20:51:26.608169 PCI: 00:19.1: enabled 0
1410 20:51:26.608251 PCI: 00:19.2: enabled 1
1411 20:51:26.611413 PCI: 00:1a.0: enabled 1
1412 20:51:26.614984 PCI: 00:1c.0: enabled 0
1413 20:51:26.618269 PCI: 00:1c.1: enabled 0
1414 20:51:26.618351 PCI: 00:1c.2: enabled 0
1415 20:51:26.621403 PCI: 00:1c.3: enabled 0
1416 20:51:26.624539 PCI: 00:1c.4: enabled 0
1417 20:51:26.628208 PCI: 00:1c.5: enabled 0
1418 20:51:26.628290 PCI: 00:1c.6: enabled 0
1419 20:51:26.631524 PCI: 00:1c.7: enabled 1
1420 20:51:26.634688 PCI: 00:1e.0: enabled 0
1421 20:51:26.637979 PCI: 00:1e.1: enabled 0
1422 20:51:26.638060 PCI: 00:1e.2: enabled 1
1423 20:51:26.641415 PCI: 00:1e.3: enabled 0
1424 20:51:26.644308 PCI: 00:1f.0: enabled 1
1425 20:51:26.644390 PCI: 00:1f.1: enabled 0
1426 20:51:26.647933 PCI: 00:1f.2: enabled 1
1427 20:51:26.650965 PCI: 00:1f.3: enabled 1
1428 20:51:26.654709 PCI: 00:1f.4: enabled 0
1429 20:51:26.654791 PCI: 00:1f.5: enabled 1
1430 20:51:26.657504 PCI: 00:1f.7: enabled 0
1431 20:51:26.660937 GENERIC: 0.0: enabled 1
1432 20:51:26.664940 GENERIC: 0.0: enabled 1
1433 20:51:26.665022 USB0 port 0: enabled 1
1434 20:51:26.667855 GENERIC: 0.0: enabled 1
1435 20:51:26.670879 I2C: 00:2c: enabled 1
1436 20:51:26.670956 I2C: 00:15: enabled 1
1437 20:51:26.673944 GENERIC: 0.0: enabled 0
1438 20:51:26.677548 I2C: 00:15: enabled 1
1439 20:51:26.681025 I2C: 00:10: enabled 0
1440 20:51:26.681130 I2C: 00:10: enabled 0
1441 20:51:26.684096 I2C: 00:2c: enabled 1
1442 20:51:26.687504 I2C: 00:40: enabled 1
1443 20:51:26.687607 I2C: 00:10: enabled 1
1444 20:51:26.690865 I2C: 00:39: enabled 1
1445 20:51:26.694144 I2C: 00:36: enabled 1
1446 20:51:26.694251 I2C: 00:10: enabled 0
1447 20:51:26.697184 I2C: 00:0c: enabled 1
1448 20:51:26.700785 I2C: 00:50: enabled 1
1449 20:51:26.700884 I2C: 00:1a: enabled 1
1450 20:51:26.704173 I2C: 00:1a: enabled 0
1451 20:51:26.707133 I2C: 00:1a: enabled 0
1452 20:51:26.707237 I2C: 00:28: enabled 1
1453 20:51:26.710733 I2C: 00:29: enabled 1
1454 20:51:26.713849 PCI: 00:00.0: enabled 1
1455 20:51:26.713937 SPI: 00: enabled 1
1456 20:51:26.717180 PNP: 0c09.0: enabled 1
1457 20:51:26.720547 GENERIC: 0.0: enabled 0
1458 20:51:26.720638 USB2 port 0: enabled 1
1459 20:51:26.723490 USB2 port 1: enabled 1
1460 20:51:26.727162 USB2 port 2: enabled 1
1461 20:51:26.730853 USB2 port 3: enabled 1
1462 20:51:26.730926 USB2 port 4: enabled 0
1463 20:51:26.733692 USB2 port 5: enabled 1
1464 20:51:26.737328 USB2 port 6: enabled 0
1465 20:51:26.737400 USB2 port 7: enabled 1
1466 20:51:26.740099 USB3 port 0: enabled 1
1467 20:51:26.743995 USB3 port 1: enabled 1
1468 20:51:26.746714 USB3 port 2: enabled 1
1469 20:51:26.746815 USB3 port 3: enabled 1
1470 20:51:26.750242 APIC: 00: enabled 1
1471 20:51:26.750323 APIC: 02: enabled 1
1472 20:51:26.753866 PCI: 00:08.0: enabled 1
1473 20:51:26.760089 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1474 20:51:26.763473 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 20:51:26.766485 ELOG: NV offset 0xbfa000 size 0x1000
1476 20:51:26.774982 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 20:51:26.781444 ELOG: Event(17) added with size 13 at 2024-03-12 20:51:27 UTC
1478 20:51:26.788236 ELOG: Event(92) added with size 9 at 2024-03-12 20:51:27 UTC
1479 20:51:26.794858 ELOG: Event(93) added with size 9 at 2024-03-12 20:51:27 UTC
1480 20:51:26.801218 ELOG: Event(9E) added with size 10 at 2024-03-12 20:51:27 UTC
1481 20:51:26.807982 ELOG: Event(9F) added with size 14 at 2024-03-12 20:51:27 UTC
1482 20:51:26.814979 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 20:51:26.818255 ELOG: Event(A1) added with size 10 at 2024-03-12 20:51:27 UTC
1484 20:51:26.828124 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 20:51:26.834348 ELOG: Event(A0) added with size 9 at 2024-03-12 20:51:27 UTC
1486 20:51:26.838090 elog_add_boot_reason: Logged dev mode boot
1487 20:51:26.844680 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 20:51:26.844760 Finalize devices...
1489 20:51:26.847875 Devices finalized
1490 20:51:26.851016 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 20:51:26.858075 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 20:51:26.864483 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 20:51:26.867670 ME: HFSTS1 : 0x80030045
1494 20:51:26.871422 ME: HFSTS2 : 0x30280136
1495 20:51:26.874461 ME: HFSTS3 : 0x00000050
1496 20:51:26.881080 ME: HFSTS4 : 0x00004000
1497 20:51:26.884379 ME: HFSTS5 : 0x00000000
1498 20:51:26.887755 ME: HFSTS6 : 0x40400006
1499 20:51:26.891011 ME: Manufacturing Mode : NO
1500 20:51:26.894690 ME: FW Partition Table : OK
1501 20:51:26.897729 ME: Bringup Loader Failure : NO
1502 20:51:26.901125 ME: Firmware Init Complete : NO
1503 20:51:26.904463 ME: Boot Options Present : NO
1504 20:51:26.907561 ME: Update In Progress : NO
1505 20:51:26.910524 ME: D0i3 Support : YES
1506 20:51:26.913872 ME: Low Power State Enabled : NO
1507 20:51:26.917332 ME: CPU Replaced : YES
1508 20:51:26.920561 ME: CPU Replacement Valid : YES
1509 20:51:26.924270 ME: Current Working State : 5
1510 20:51:26.927065 ME: Current Operation State : 1
1511 20:51:26.930954 ME: Current Operation Mode : 3
1512 20:51:26.934025 ME: Error Code : 0
1513 20:51:26.937118 ME: CPU Debug Disabled : YES
1514 20:51:26.940527 ME: TXT Support : NO
1515 20:51:26.947218 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 20:51:26.953856 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 20:51:26.956846 ACPI: Writing ACPI tables at 76b27000.
1518 20:51:26.956919 ACPI: * FACS
1519 20:51:26.960471 ACPI: * DSDT
1520 20:51:26.963930 Ramoops buffer: 0x100000@0x76a26000.
1521 20:51:26.966987 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 20:51:26.973992 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 20:51:26.976985 Google Chrome EC: version:
1524 20:51:26.979998 ro: magolor_1.1.9999-103b6f9
1525 20:51:26.983634 rw: magolor_1.1.9999-103b6f9
1526 20:51:26.983709 running image: 1
1527 20:51:26.989938 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 20:51:26.994114 ACPI: * FADT
1529 20:51:26.994196 SCI is IRQ9
1530 20:51:27.000842 ACPI: added table 1/32, length now 40
1531 20:51:27.000957 ACPI: * SSDT
1532 20:51:27.003954 Found 1 CPU(s) with 2 core(s) each.
1533 20:51:27.007454 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 20:51:27.013779 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 20:51:27.017550 Could not locate 'wifi_sar' in VPD.
1536 20:51:27.020673 Checking CBFS for default SAR values
1537 20:51:27.027211 wifi_sar_defaults.hex has bad len in CBFS
1538 20:51:27.030397 failed from getting SAR limits!
1539 20:51:27.033555 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 20:51:27.040327 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 20:51:27.043805 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 20:51:27.050211 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 20:51:27.053737 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 20:51:27.060449 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 20:51:27.063878 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 20:51:27.070260 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 20:51:27.076829 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 20:51:27.083670 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 20:51:27.087019 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 20:51:27.093371 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 20:51:27.096521 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 20:51:27.103271 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 20:51:27.106554 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 20:51:27.114920 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 20:51:27.118489 PS2K: Passing 101 keymaps to kernel
1556 20:51:27.125077 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 20:51:27.131501 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 20:51:27.134986 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 20:51:27.141574 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 20:51:27.145034 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 20:51:27.151582 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 20:51:27.158557 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 20:51:27.164674 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 20:51:27.168378 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 20:51:27.174904 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 20:51:27.178014 ACPI: added table 2/32, length now 44
1567 20:51:27.181728 ACPI: * MCFG
1568 20:51:27.184661 ACPI: added table 3/32, length now 48
1569 20:51:27.184834 ACPI: * TPM2
1570 20:51:27.188248 TPM2 log created at 0x76a16000
1571 20:51:27.191559 ACPI: added table 4/32, length now 52
1572 20:51:27.194505 ACPI: * MADT
1573 20:51:27.194742 SCI is IRQ9
1574 20:51:27.197896 ACPI: added table 5/32, length now 56
1575 20:51:27.201808 current = 76b2d580
1576 20:51:27.204827 ACPI: * DMAR
1577 20:51:27.208309 ACPI: added table 6/32, length now 60
1578 20:51:27.211956 ACPI: added table 7/32, length now 64
1579 20:51:27.212469 ACPI: * HPET
1580 20:51:27.214817 ACPI: added table 8/32, length now 68
1581 20:51:27.218152 ACPI: done.
1582 20:51:27.221228 ACPI tables: 26304 bytes.
1583 20:51:27.225272 smbios_write_tables: 76a15000
1584 20:51:27.228322 EC returned error result code 3
1585 20:51:27.231545 Couldn't obtain OEM name from CBI
1586 20:51:27.234702 Create SMBIOS type 16
1587 20:51:27.235167 Create SMBIOS type 17
1588 20:51:27.238694 GENERIC: 0.0 (WIFI Device)
1589 20:51:27.241732 SMBIOS tables: 913 bytes.
1590 20:51:27.245196 Writing table forward entry at 0x00000500
1591 20:51:27.251473 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 20:51:27.254756 Writing coreboot table at 0x76b4b000
1593 20:51:27.261539 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 20:51:27.264670 1. 0000000000001000-000000000009ffff: RAM
1595 20:51:27.271192 2. 00000000000a0000-00000000000fffff: RESERVED
1596 20:51:27.274773 3. 0000000000100000-0000000076a14fff: RAM
1597 20:51:27.281109 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 20:51:27.285178 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 20:51:27.290993 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 20:51:27.294109 7. 0000000077000000-000000007fbfffff: RESERVED
1601 20:51:27.301293 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 20:51:27.304419 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 20:51:27.311520 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 20:51:27.314018 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 20:51:27.320473 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 20:51:27.323806 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 20:51:27.327794 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 20:51:27.333959 15. 0000000100000000-00000001803fffff: RAM
1609 20:51:27.337478 Passing 4 GPIOs to payload:
1610 20:51:27.340368 NAME | PORT | POLARITY | VALUE
1611 20:51:27.347152 lid | undefined | high | high
1612 20:51:27.350529 power | undefined | high | low
1613 20:51:27.357387 oprom | undefined | high | low
1614 20:51:27.364034 EC in RW | 0x000000b9 | high | low
1615 20:51:27.367260 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 4e36
1616 20:51:27.370605 coreboot table: 1504 bytes.
1617 20:51:27.373862 IMD ROOT 0. 0x76fff000 0x00001000
1618 20:51:27.380511 IMD SMALL 1. 0x76ffe000 0x00001000
1619 20:51:27.383831 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 20:51:27.386782 CONSOLE 3. 0x76c2e000 0x00020000
1621 20:51:27.390300 FMAP 4. 0x76c2d000 0x00000578
1622 20:51:27.393742 TIME STAMP 5. 0x76c2c000 0x00000910
1623 20:51:27.396655 VBOOT WORK 6. 0x76c18000 0x00014000
1624 20:51:27.399841 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 20:51:27.403460 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 20:51:27.409969 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 20:51:27.414060 REFCODE 10. 0x76b67000 0x00040000
1628 20:51:27.416854 SMM BACKUP 11. 0x76b57000 0x00010000
1629 20:51:27.419722 4f444749 12. 0x76b55000 0x00002000
1630 20:51:27.423333 EXT VBT13. 0x76b53000 0x00001c43
1631 20:51:27.426412 COREBOOT 14. 0x76b4b000 0x00008000
1632 20:51:27.430196 ACPI 15. 0x76b27000 0x00024000
1633 20:51:27.433574 ACPI GNVS 16. 0x76b26000 0x00001000
1634 20:51:27.437315 RAMOOPS 17. 0x76a26000 0x00100000
1635 20:51:27.439976 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 20:51:27.446592 SMBIOS 19. 0x76a15000 0x00000800
1637 20:51:27.447194 IMD small region:
1638 20:51:27.449787 IMD ROOT 0. 0x76ffec00 0x00000400
1639 20:51:27.453088 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 20:51:27.459841 VPD 2. 0x76ffeb80 0x00000058
1641 20:51:27.463471 POWER STATE 3. 0x76ffeb40 0x00000040
1642 20:51:27.466678 ROMSTAGE 4. 0x76ffeb20 0x00000004
1643 20:51:27.469787 MEM INFO 5. 0x76ffe940 0x000001e0
1644 20:51:27.476339 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1645 20:51:27.479776 MTRR: Physical address space:
1646 20:51:27.486724 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 20:51:27.493085 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 20:51:27.496319 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 20:51:27.503179 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 20:51:27.509675 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 20:51:27.516142 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 20:51:27.522451 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 20:51:27.526376 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 20:51:27.529525 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 20:51:27.536074 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 20:51:27.539465 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 20:51:27.543141 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 20:51:27.545976 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 20:51:27.552706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 20:51:27.555910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 20:51:27.559215 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 20:51:27.562826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 20:51:27.569196 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 20:51:27.569735 call enable_fixed_mtrr()
1665 20:51:27.576190 CPU physical address size: 39 bits
1666 20:51:27.579231 MTRR: default type WB/UC MTRR counts: 6/5.
1667 20:51:27.582876 MTRR: UC selected as default type.
1668 20:51:27.589149 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 20:51:27.595583 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 20:51:27.602347 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 20:51:27.605709 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 20:51:27.612322 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 20:51:27.615382
1674 20:51:27.615839 MTRR check
1675 20:51:27.618820 Fixed MTRRs : Enabled
1676 20:51:27.619309 Variable MTRRs: Enabled
1677 20:51:27.619679
1678 20:51:27.625841 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 20:51:27.628422 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 20:51:27.631893 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 20:51:27.635202 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 20:51:27.642119 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 20:51:27.645645 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 20:51:27.648260 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 20:51:27.652306 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 20:51:27.655017 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 20:51:27.661963 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 20:51:27.665241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 20:51:27.671874 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 20:51:27.672442 call enable_fixed_mtrr()
1691 20:51:27.679220 Checking cr50 for pending updates
1692 20:51:27.679769 CPU physical address size: 39 bits
1693 20:51:27.683937 Reading cr50 TPM mode
1694 20:51:27.693979 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1695 20:51:27.701346 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 20:51:27.704776 Checking segment from ROM address 0xfff9d5b8
1697 20:51:27.711103 Checking segment from ROM address 0xfff9d5d4
1698 20:51:27.715003 Loading segment from ROM address 0xfff9d5b8
1699 20:51:27.717684 code (compression=0)
1700 20:51:27.724502 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 20:51:27.734320 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 20:51:27.737867 it's not compressed!
1703 20:51:27.863188 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 20:51:27.869668 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 20:51:27.877259 Loading segment from ROM address 0xfff9d5d4
1706 20:51:27.880248 Entry Point 0x30000000
1707 20:51:27.880710 Loaded segments
1708 20:51:27.887231 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 20:51:27.903297 Finalizing chipset.
1710 20:51:27.906603 Finalizing SMM.
1711 20:51:27.907220 APMC done.
1712 20:51:27.913460 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 20:51:27.916739 mp_park_aps done after 0 msecs.
1714 20:51:27.920169 Jumping to boot code at 0x30000000(0x76b4b000)
1715 20:51:27.930196 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 20:51:27.930717
1717 20:51:27.931094
1718 20:51:27.931433
1719 20:51:27.933240 Starting depthcharge on Magolor...
1720 20:51:27.933746
1721 20:51:27.934822 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 20:51:27.935329 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 20:51:27.935758 Setting prompt string to ['dedede:']
1724 20:51:27.936181 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 20:51:27.943375 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 20:51:27.943952
1727 20:51:27.949948 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 20:51:27.950471
1729 20:51:27.953173 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 20:51:27.953694
1731 20:51:27.956315 Wipe memory regions:
1732 20:51:27.956900
1733 20:51:27.959343 [0x00000000001000, 0x000000000a0000)
1734 20:51:27.959761
1735 20:51:27.963328 [0x00000000100000, 0x00000030000000)
1736 20:51:28.091519
1737 20:51:28.094890 [0x00000031062170, 0x00000076a15000)
1738 20:51:28.264494
1739 20:51:28.267419 [0x00000100000000, 0x00000180400000)
1740 20:51:29.330824
1741 20:51:29.331483 R8152: Initializing
1742 20:51:29.331955
1743 20:51:29.334495 Version 9 (ocp_data = 6010)
1744 20:51:29.335055
1745 20:51:29.337658 R8152: Done initializing
1746 20:51:29.338247
1747 20:51:29.340674 Adding net device
1748 20:51:29.341234
1749 20:51:29.343842 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 20:51:29.343918
1751 20:51:29.347234
1752 20:51:29.347316
1753 20:51:29.347613 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 20:51:29.448142 dedede: tftpboot 192.168.201.1 13035066/tftp-deploy-q_3zewjt/kernel/bzImage 13035066/tftp-deploy-q_3zewjt/kernel/cmdline 13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
1756 20:51:29.448646 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 20:51:29.449009 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 20:51:29.453224 tftpboot 192.168.201.1 13035066/tftp-deploy-q_3zewjt/kernel/bzImploy-q_3zewjt/kernel/cmdline 13035066/tftp-deploy-q_3zewjt/ramdisk/ramdisk.cpio.gz
1759 20:51:29.453533
1760 20:51:29.453768 Waiting for link
1761 20:51:29.655765
1762 20:51:29.656102 done.
1763 20:51:29.656445
1764 20:51:29.656807 MAC: 00:e0:4c:72:3d:b7
1765 20:51:29.657048
1766 20:51:29.658536 Sending DHCP discover... done.
1767 20:51:29.658881
1768 20:51:29.662149 Waiting for reply... done.
1769 20:51:29.662479
1770 20:51:29.665644 Sending DHCP request... done.
1771 20:51:29.666049
1772 20:51:29.668919 Waiting for reply... done.
1773 20:51:29.669208
1774 20:51:29.671813 My ip is 192.168.201.22
1775 20:51:29.672074
1776 20:51:29.675554 The DHCP server ip is 192.168.201.1
1777 20:51:29.675866
1778 20:51:29.678480 TFTP server IP predefined by user: 192.168.201.1
1779 20:51:29.678906
1780 20:51:29.685050 Bootfile predefined by user: 13035066/tftp-deploy-q_3zewjt/kernel/bzImage
1781 20:51:29.685441
1782 20:51:29.688184 Sending tftp read request... done.
1783 20:51:29.688468
1784 20:51:29.696886 Waiting for the transfer...
1785 20:51:29.697209
1786 20:51:29.980813 00000000 ################################################################
1787 20:51:29.980946
1788 20:51:30.239951 00080000 ################################################################
1789 20:51:30.240084
1790 20:51:30.502139 00100000 ################################################################
1791 20:51:30.502295
1792 20:51:30.760070 00180000 ################################################################
1793 20:51:30.760211
1794 20:51:31.018784 00200000 ################################################################
1795 20:51:31.018923
1796 20:51:31.277031 00280000 ################################################################
1797 20:51:31.277169
1798 20:51:31.535643 00300000 ################################################################
1799 20:51:31.535777
1800 20:51:31.797990 00380000 ################################################################
1801 20:51:31.798139
1802 20:51:32.091554 00400000 ################################################################
1803 20:51:32.091707
1804 20:51:32.389550 00480000 ################################################################
1805 20:51:32.389729
1806 20:51:32.680201 00500000 ################################################################
1807 20:51:32.680331
1808 20:51:32.970906 00580000 ################################################################
1809 20:51:32.971065
1810 20:51:33.275922 00600000 ################################################################
1811 20:51:33.276265
1812 20:51:33.618440 00680000 ################################################################
1813 20:51:33.618588
1814 20:51:33.909316 00700000 ################################################################
1815 20:51:33.909448
1816 20:51:34.199869 00780000 ################################################################
1817 20:51:34.199996
1818 20:51:34.468729 00800000 ################################################################
1819 20:51:34.468897
1820 20:51:34.714358 00880000 ######################################################## done.
1821 20:51:34.714558
1822 20:51:34.717890 The bootfile was 9367440 bytes long.
1823 20:51:34.721420
1824 20:51:34.724429 Sending tftp read request... done.
1825 20:51:34.724564
1826 20:51:34.724681 Waiting for the transfer...
1827 20:51:34.724797
1828 20:51:35.029445 00000000 ################################################################
1829 20:51:35.029583
1830 20:51:35.337303 00080000 ################################################################
1831 20:51:35.337434
1832 20:51:35.640911 00100000 ################################################################
1833 20:51:35.641044
1834 20:51:35.946607 00180000 ################################################################
1835 20:51:35.946780
1836 20:51:36.253937 00200000 ################################################################
1837 20:51:36.254072
1838 20:51:36.562887 00280000 ################################################################
1839 20:51:36.563022
1840 20:51:36.866280 00300000 ################################################################
1841 20:51:36.866412
1842 20:51:37.175620 00380000 ################################################################
1843 20:51:37.175755
1844 20:51:37.479987 00400000 ################################################################
1845 20:51:37.480119
1846 20:51:37.776596 00480000 ################################################################
1847 20:51:37.776728
1848 20:51:38.075949 00500000 ################################################################
1849 20:51:38.076076
1850 20:51:38.382033 00580000 ################################################################
1851 20:51:38.382159
1852 20:51:38.686216 00600000 ################################################################
1853 20:51:38.686341
1854 20:51:38.982788 00680000 ################################################################
1855 20:51:38.982921
1856 20:51:39.286577 00700000 ################################################################
1857 20:51:39.286747
1858 20:51:39.653393 00780000 ################################################################
1859 20:51:39.654089
1860 20:51:39.941155 00800000 ##################################################### done.
1861 20:51:39.941285
1862 20:51:39.944561 Sending tftp read request... done.
1863 20:51:39.944643
1864 20:51:39.948034 Waiting for the transfer...
1865 20:51:39.948202
1866 20:51:39.951564 00000000 # done.
1867 20:51:39.951661
1868 20:51:39.958008 Command line loaded dynamically from TFTP file: 13035066/tftp-deploy-q_3zewjt/kernel/cmdline
1869 20:51:39.961048
1870 20:51:39.974450 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1871 20:51:39.974675
1872 20:51:39.981586 ec_init: CrosEC protocol v3 supported (256, 256)
1873 20:51:39.987902
1874 20:51:39.990733 Shutting down all USB controllers.
1875 20:51:39.991293
1876 20:51:39.991668 Removing current net device
1877 20:51:39.992014
1878 20:51:39.994067 Finalizing coreboot
1879 20:51:39.994576
1880 20:51:40.000719 Exiting depthcharge with code 4 at timestamp: 18858857
1881 20:51:40.001177
1882 20:51:40.001535
1883 20:51:40.001873 Starting kernel ...
1884 20:51:40.002194
1885 20:51:40.002507
1886 20:51:40.003937 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
1887 20:51:40.004453 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
1888 20:51:40.004823 Setting prompt string to ['Linux version [0-9]']
1889 20:51:40.005175 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1890 20:51:40.005545 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1892 20:56:15.004682 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
1894 20:56:15.004883 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
1896 20:56:15.005045 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1899 20:56:15.005299 end: 2 depthcharge-action (duration 00:05:00) [common]
1901 20:56:15.005514 Cleaning after the job
1902 20:56:15.005602 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/ramdisk
1903 20:56:15.006832 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/kernel
1904 20:56:15.008213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035066/tftp-deploy-q_3zewjt/modules
1905 20:56:15.008661 start: 5.1 power-off (timeout 00:00:30) [common]
1906 20:56:15.008823 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1907 20:56:15.084952 >> Command sent successfully.
1908 20:56:15.087471 Returned 0 in 0 seconds
1909 20:56:15.187862 end: 5.1 power-off (duration 00:00:00) [common]
1911 20:56:15.188172 start: 5.2 read-feedback (timeout 00:10:00) [common]
1912 20:56:15.188427 Listened to connection for namespace 'common' for up to 1s
1914 20:56:15.188795 Listened to connection for namespace 'common' for up to 1s
1915 20:56:16.189247 Finalising connection for namespace 'common'
1916 20:56:16.189437 Disconnecting from shell: Finalise
1917 20:56:16.189549
1918 20:56:16.289887 end: 5.2 read-feedback (duration 00:00:01) [common]
1919 20:56:16.290041 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13035066
1920 20:56:16.308442 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13035066
1921 20:56:16.308601 JobError: Your job cannot terminate cleanly.