Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 20:50:57.407578 lava-dispatcher, installed at version: 2024.01
2 20:50:57.407779 start: 0 validate
3 20:50:57.407905 Start time: 2024-03-12 20:50:57.407897+00:00 (UTC)
4 20:50:57.408020 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:50:57.408147 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 20:50:57.411050 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:50:57.411168 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1455-g73293d3cb91e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:51:00.423511 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:51:00.424185 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:51:00.696096 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:51:00.696862 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-1455-g73293d3cb91e%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 20:51:01.707139 validate duration: 4.30
14 20:51:01.707644 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:51:01.707754 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:51:01.707840 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:51:01.707958 Not decompressing ramdisk as can be used compressed.
18 20:51:01.708043 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 20:51:01.708105 saving as /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/ramdisk/initrd.cpio.gz
20 20:51:01.708168 total size: 5431448 (5 MB)
21 20:51:01.709557 progress 0 % (0 MB)
22 20:51:01.711292 progress 5 % (0 MB)
23 20:51:01.712804 progress 10 % (0 MB)
24 20:51:01.714495 progress 15 % (0 MB)
25 20:51:01.716286 progress 20 % (1 MB)
26 20:51:01.717737 progress 25 % (1 MB)
27 20:51:01.719213 progress 30 % (1 MB)
28 20:51:01.720782 progress 35 % (1 MB)
29 20:51:01.722284 progress 40 % (2 MB)
30 20:51:01.723738 progress 45 % (2 MB)
31 20:51:01.725198 progress 50 % (2 MB)
32 20:51:01.726966 progress 55 % (2 MB)
33 20:51:01.728555 progress 60 % (3 MB)
34 20:51:01.730260 progress 65 % (3 MB)
35 20:51:01.732079 progress 70 % (3 MB)
36 20:51:01.733583 progress 75 % (3 MB)
37 20:51:01.735256 progress 80 % (4 MB)
38 20:51:01.736845 progress 85 % (4 MB)
39 20:51:01.738570 progress 90 % (4 MB)
40 20:51:01.740077 progress 95 % (4 MB)
41 20:51:01.741562 progress 100 % (5 MB)
42 20:51:01.741819 5 MB downloaded in 0.03 s (153.93 MB/s)
43 20:51:01.742019 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:51:01.742321 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:51:01.742422 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:51:01.742507 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:51:01.742644 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1455-g73293d3cb91e/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 20:51:01.742748 saving as /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/kernel/bzImage
50 20:51:01.742809 total size: 9367440 (8 MB)
51 20:51:01.742869 No compression specified
52 20:51:01.744355 progress 0 % (0 MB)
53 20:51:01.746931 progress 5 % (0 MB)
54 20:51:01.749346 progress 10 % (0 MB)
55 20:51:01.751816 progress 15 % (1 MB)
56 20:51:01.754480 progress 20 % (1 MB)
57 20:51:01.756918 progress 25 % (2 MB)
58 20:51:01.759427 progress 30 % (2 MB)
59 20:51:01.762257 progress 35 % (3 MB)
60 20:51:01.764741 progress 40 % (3 MB)
61 20:51:01.767371 progress 45 % (4 MB)
62 20:51:01.770145 progress 50 % (4 MB)
63 20:51:01.773018 progress 55 % (4 MB)
64 20:51:01.775782 progress 60 % (5 MB)
65 20:51:01.778439 progress 65 % (5 MB)
66 20:51:01.781274 progress 70 % (6 MB)
67 20:51:01.784565 progress 75 % (6 MB)
68 20:51:01.787100 progress 80 % (7 MB)
69 20:51:01.789682 progress 85 % (7 MB)
70 20:51:01.792426 progress 90 % (8 MB)
71 20:51:01.795052 progress 95 % (8 MB)
72 20:51:01.797564 progress 100 % (8 MB)
73 20:51:01.797791 8 MB downloaded in 0.05 s (162.49 MB/s)
74 20:51:01.798008 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:51:01.798277 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:51:01.798372 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:51:01.798456 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:51:01.798585 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 20:51:01.798653 saving as /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/nfsrootfs/full.rootfs.tar
81 20:51:01.798713 total size: 133429172 (127 MB)
82 20:51:01.798780 Using unxz to decompress xz
83 20:51:01.803452 progress 0 % (0 MB)
84 20:51:02.160541 progress 5 % (6 MB)
85 20:51:02.525116 progress 10 % (12 MB)
86 20:51:02.828768 progress 15 % (19 MB)
87 20:51:03.012554 progress 20 % (25 MB)
88 20:51:03.254695 progress 25 % (31 MB)
89 20:51:03.604715 progress 30 % (38 MB)
90 20:51:03.950401 progress 35 % (44 MB)
91 20:51:04.352024 progress 40 % (50 MB)
92 20:51:04.742223 progress 45 % (57 MB)
93 20:51:05.103128 progress 50 % (63 MB)
94 20:51:05.483131 progress 55 % (70 MB)
95 20:51:05.847869 progress 60 % (76 MB)
96 20:51:06.216029 progress 65 % (82 MB)
97 20:51:06.583462 progress 70 % (89 MB)
98 20:51:06.950778 progress 75 % (95 MB)
99 20:51:07.393627 progress 80 % (101 MB)
100 20:51:07.830193 progress 85 % (108 MB)
101 20:51:08.104359 progress 90 % (114 MB)
102 20:51:08.462761 progress 95 % (120 MB)
103 20:51:08.867982 progress 100 % (127 MB)
104 20:51:08.874579 127 MB downloaded in 7.08 s (17.98 MB/s)
105 20:51:08.874833 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:51:08.875092 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:51:08.875182 start: 1.4 download-retry (timeout 00:09:53) [common]
109 20:51:08.875271 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 20:51:08.875421 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-1455-g73293d3cb91e/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 20:51:08.875493 saving as /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/modules/modules.tar
112 20:51:08.875553 total size: 251244 (0 MB)
113 20:51:08.875615 Using unxz to decompress xz
114 20:51:08.879902 progress 13 % (0 MB)
115 20:51:08.880302 progress 26 % (0 MB)
116 20:51:08.880541 progress 39 % (0 MB)
117 20:51:08.882211 progress 52 % (0 MB)
118 20:51:08.884177 progress 65 % (0 MB)
119 20:51:08.886013 progress 78 % (0 MB)
120 20:51:08.887878 progress 91 % (0 MB)
121 20:51:08.889696 progress 100 % (0 MB)
122 20:51:08.895195 0 MB downloaded in 0.02 s (12.20 MB/s)
123 20:51:08.895428 end: 1.4.1 http-download (duration 00:00:00) [common]
125 20:51:08.895689 end: 1.4 download-retry (duration 00:00:00) [common]
126 20:51:08.895782 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 20:51:08.895877 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 20:51:11.067466 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13035056/extract-nfsrootfs-rrezjf1b
129 20:51:11.067652 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 20:51:11.067750 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 20:51:11.067908 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786
132 20:51:11.068038 makedir: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin
133 20:51:11.068143 makedir: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/tests
134 20:51:11.068242 makedir: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/results
135 20:51:11.068340 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-add-keys
136 20:51:11.068479 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-add-sources
137 20:51:11.068609 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-background-process-start
138 20:51:11.068735 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-background-process-stop
139 20:51:11.068861 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-common-functions
140 20:51:11.068985 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-echo-ipv4
141 20:51:11.069108 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-install-packages
142 20:51:11.069230 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-installed-packages
143 20:51:11.069352 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-os-build
144 20:51:11.069474 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-probe-channel
145 20:51:11.069596 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-probe-ip
146 20:51:11.069717 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-target-ip
147 20:51:11.069843 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-target-mac
148 20:51:11.070001 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-target-storage
149 20:51:11.070130 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-case
150 20:51:11.070253 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-event
151 20:51:11.070377 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-feedback
152 20:51:11.070499 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-raise
153 20:51:11.070621 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-reference
154 20:51:11.070744 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-runner
155 20:51:11.070867 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-set
156 20:51:11.070989 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-test-shell
157 20:51:11.071114 Updating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-install-packages (oe)
158 20:51:11.071265 Updating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/bin/lava-installed-packages (oe)
159 20:51:11.071388 Creating /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/environment
160 20:51:11.071483 LAVA metadata
161 20:51:11.071553 - LAVA_JOB_ID=13035056
162 20:51:11.071614 - LAVA_DISPATCHER_IP=192.168.201.1
163 20:51:11.071714 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 20:51:11.071779 skipped lava-vland-overlay
165 20:51:11.071852 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 20:51:11.071928 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 20:51:11.071987 skipped lava-multinode-overlay
168 20:51:11.072058 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 20:51:11.072165 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 20:51:11.072236 Loading test definitions
171 20:51:11.072321 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 20:51:11.072389 Using /lava-13035056 at stage 0
173 20:51:11.072700 uuid=13035056_1.5.2.3.1 testdef=None
174 20:51:11.072788 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 20:51:11.072871 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 20:51:11.073381 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 20:51:11.073603 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 20:51:11.074286 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 20:51:11.074512 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 20:51:11.075123 runner path: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/0/tests/0_dmesg test_uuid 13035056_1.5.2.3.1
183 20:51:11.075281 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 20:51:11.075501 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 20:51:11.075601 Using /lava-13035056 at stage 1
187 20:51:11.075899 uuid=13035056_1.5.2.3.5 testdef=None
188 20:51:11.075986 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 20:51:11.076068 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 20:51:11.076533 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 20:51:11.076746 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 20:51:11.077384 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 20:51:11.077610 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 20:51:11.078483 runner path: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/1/tests/1_bootrr test_uuid 13035056_1.5.2.3.5
197 20:51:11.078637 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 20:51:11.078836 Creating lava-test-runner.conf files
200 20:51:11.078898 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/0 for stage 0
201 20:51:11.078985 - 0_dmesg
202 20:51:11.079063 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13035056/lava-overlay-4ll61786/lava-13035056/1 for stage 1
203 20:51:11.079152 - 1_bootrr
204 20:51:11.079245 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 20:51:11.079361 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 20:51:11.086643 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 20:51:11.086766 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 20:51:11.086852 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 20:51:11.086938 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 20:51:11.087021 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 20:51:11.223173 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 20:51:11.223541 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 20:51:11.223660 extracting modules file /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13035056/extract-nfsrootfs-rrezjf1b
214 20:51:11.236981 extracting modules file /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13035056/extract-overlay-ramdisk-oz8d1c4r/ramdisk
215 20:51:11.250305 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 20:51:11.250436 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 20:51:11.250525 [common] Applying overlay to NFS
218 20:51:11.250593 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13035056/compress-overlay-tnuivs3y/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13035056/extract-nfsrootfs-rrezjf1b
219 20:51:11.258728 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 20:51:11.258840 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 20:51:11.258926 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 20:51:11.259010 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 20:51:11.259089 Building ramdisk /var/lib/lava/dispatcher/tmp/13035056/extract-overlay-ramdisk-oz8d1c4r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13035056/extract-overlay-ramdisk-oz8d1c4r/ramdisk
224 20:51:11.328211 >> 26153 blocks
225 20:51:11.868181 rename /var/lib/lava/dispatcher/tmp/13035056/extract-overlay-ramdisk-oz8d1c4r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
226 20:51:11.868610 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 20:51:11.868739 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 20:51:11.868841 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 20:51:11.868941 No mkimage arch provided, not using FIT.
230 20:51:11.869033 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 20:51:11.869117 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 20:51:11.869218 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 20:51:11.869311 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 20:51:11.869387 No LXC device requested
235 20:51:11.869464 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 20:51:11.869554 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 20:51:11.869632 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 20:51:11.869704 Checking files for TFTP limit of 4294967296 bytes.
239 20:51:11.870138 end: 1 tftp-deploy (duration 00:00:10) [common]
240 20:51:11.870243 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 20:51:11.870339 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 20:51:11.870463 substitutions:
243 20:51:11.870530 - {DTB}: None
244 20:51:11.870590 - {INITRD}: 13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
245 20:51:11.870648 - {KERNEL}: 13035056/tftp-deploy-oupemtey/kernel/bzImage
246 20:51:11.870704 - {LAVA_MAC}: None
247 20:51:11.870759 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13035056/extract-nfsrootfs-rrezjf1b
248 20:51:11.870814 - {NFS_SERVER_IP}: 192.168.201.1
249 20:51:11.870867 - {PRESEED_CONFIG}: None
250 20:51:11.870920 - {PRESEED_LOCAL}: None
251 20:51:11.870973 - {RAMDISK}: 13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
252 20:51:11.871026 - {ROOT_PART}: None
253 20:51:11.871078 - {ROOT}: None
254 20:51:11.871130 - {SERVER_IP}: 192.168.201.1
255 20:51:11.871182 - {TEE}: None
256 20:51:11.871234 Parsed boot commands:
257 20:51:11.871286 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 20:51:11.871477 Parsed boot commands: tftpboot 192.168.201.1 13035056/tftp-deploy-oupemtey/kernel/bzImage 13035056/tftp-deploy-oupemtey/kernel/cmdline 13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
259 20:51:11.871596 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 20:51:11.871685 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 20:51:11.871778 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 20:51:11.871862 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 20:51:11.871931 Not connected, no need to disconnect.
264 20:51:11.872005 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 20:51:11.872087 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 20:51:11.872156 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
267 20:51:11.876209 Setting prompt string to ['lava-test: # ']
268 20:51:11.876554 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 20:51:11.876663 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 20:51:11.876758 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 20:51:11.876847 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 20:51:11.877041 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
273 20:51:17.022397 >> Command sent successfully.
274 20:51:17.035455 Returned 0 in 5 seconds
275 20:51:17.136691 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 20:51:17.138806 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 20:51:17.139609 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 20:51:17.140258 Setting prompt string to 'Starting depthcharge on Volmar...'
280 20:51:17.140716 Changing prompt to 'Starting depthcharge on Volmar...'
281 20:51:17.141314 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 20:51:17.143210 [Enter `^Ec?' for help]
283 20:51:18.503234
284 20:51:18.503702
285 20:51:18.511017 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 20:51:18.514651 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 20:51:18.517708 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 20:51:18.524436 CPU: AES supported, TXT NOT supported, VT supported
289 20:51:18.531003 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 20:51:18.535112 Cache size = 10 MiB
291 20:51:18.538647 MCH: device id 4609 (rev 04) is Alderlake-P
292 20:51:18.542137 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 20:51:18.549570 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 20:51:18.549998 VBOOT: Loading verstage.
295 20:51:18.556623 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 20:51:18.560448 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 20:51:18.567349 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 20:51:18.573935 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 20:51:18.580317 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 20:51:18.583985
301 20:51:18.584520
302 20:51:18.591099 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 20:51:18.598524 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 20:51:18.602393 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 20:51:18.606046 I2C TX abort detected (00000001)
306 20:51:18.606465 cr50_i2c_read: Address write failed
307 20:51:18.619249 .done! DID_VID 0x00281ae0
308 20:51:18.622963 TPM ready after 0 ms
309 20:51:18.626332 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 20:51:18.639459 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 20:51:18.646088 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 20:51:18.697013 tlcl_send_startup: Startup return code is 0
313 20:51:18.697452 TPM: setup succeeded
314 20:51:18.720943 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 20:51:18.742624 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 20:51:18.746835 Chrome EC: UHEPI supported
317 20:51:18.750018 Reading cr50 boot mode
318 20:51:18.764903 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 20:51:18.765292 Phase 1
320 20:51:18.771237 FMAP: area GBB found @ 1805000 (458752 bytes)
321 20:51:18.778237 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 20:51:18.785254 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 20:51:18.791524 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
324 20:51:18.791989 Phase 2
325 20:51:18.795172 Phase 3
326 20:51:18.798408 FMAP: area GBB found @ 1805000 (458752 bytes)
327 20:51:18.805411 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 20:51:18.808582 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 20:51:18.815414 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 20:51:18.821615 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
331 20:51:18.828553 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
332 20:51:18.835245 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
333 20:51:18.850288 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 20:51:18.853394 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 20:51:18.860418 VB2:vb2_verify_fw_preamble() Verifying preamble.
336 20:51:18.866955 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
337 20:51:18.873550 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
338 20:51:18.879758 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
339 20:51:18.883821 Phase 4
340 20:51:18.887000 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
341 20:51:18.893588 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
342 20:51:19.106924 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
343 20:51:19.113635 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
344 20:51:19.117116 Saving vboot hash.
345 20:51:19.123484 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
346 20:51:19.139306 tlcl_extend: response is 0
347 20:51:19.146043 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
348 20:51:19.148862 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
349 20:51:19.166935 tlcl_extend: response is 0
350 20:51:19.173737 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
351 20:51:19.194252 tlcl_lock_nv_write: response is 0
352 20:51:19.212958 tlcl_lock_nv_write: response is 0
353 20:51:19.213458 Slot A is selected
354 20:51:19.219298 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
355 20:51:19.226078 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
356 20:51:19.232330 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
357 20:51:19.239118 BS: verstage times (exec / console): total (unknown) / 263 ms
358 20:51:19.239214
359 20:51:19.239348
360 20:51:19.246292 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
361 20:51:19.249742 Google Chrome EC: version:
362 20:51:19.252902 ro: volmar_v2.0.14126-e605144e9c
363 20:51:19.256591 rw: volmar_v0.0.55-22d1557
364 20:51:19.259475 running image: 2
365 20:51:19.263107 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
366 20:51:19.273096 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 20:51:19.279732 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 20:51:19.286191 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
369 20:51:19.296764 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
370 20:51:19.306645 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 20:51:19.309781 EC took 942us to calculate image hash
372 20:51:19.320020 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
373 20:51:19.323679 VB2:sync_ec() select_rw=RW(active)
374 20:51:19.335822 Waited 275us to clear limit power flag.
375 20:51:19.339584 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 20:51:19.342593 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 20:51:19.345606 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 20:51:19.352904 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 20:51:19.355963 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
380 20:51:19.359378 TCO_STS: 0000 0000
381 20:51:19.362405 GEN_PMCON: d0015038 00002200
382 20:51:19.365833 GBLRST_CAUSE: 00000000 00000000
383 20:51:19.366396 HPR_CAUSE0: 00000000
384 20:51:19.369191 prev_sleep_state 5
385 20:51:19.372652 Abort disabling TXT, as CPU is not TXT capable.
386 20:51:19.380520 cse_lite: Number of partitions = 3
387 20:51:19.384008 cse_lite: Current partition = RO
388 20:51:19.384439 cse_lite: Next partition = RO
389 20:51:19.386825 cse_lite: Flags = 0x7
390 20:51:19.394184 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
391 20:51:19.403805 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
392 20:51:19.407512 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 20:51:19.413811 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 20:51:19.420409 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
395 20:51:19.427399 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
396 20:51:19.430545 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 20:51:19.437506 cse_lite: Set Boot Partition Info Command (RW)
398 20:51:19.440346 HECI: Global Reset(Type:1) Command
399 20:51:20.873648 &6֘�h�U: AES supported, TXT NOT supported, VT supported
400 20:51:20.880345 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
401 20:51:20.884073 Cache size = 10 MiB
402 20:51:20.887098 MCH: device id 4609 (rev 04) is Alderlake-P
403 20:51:20.893814 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
404 20:51:20.897182 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
405 20:51:20.900714 VBOOT: Loading verstage.
406 20:51:20.904537 FMAP: Found "FLASH" version 1.1 at 0x1804000.
407 20:51:20.911590 FMAP: base = 0x0 size = 0x2000000 #areas = 37
408 20:51:20.915135 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 20:51:20.922625 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
410 20:51:20.932243 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
411 20:51:20.932330
412 20:51:20.932396
413 20:51:20.938956 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
414 20:51:20.947010 Probing TPM I2C: I2C bus 1 version 0x3230302a
415 20:51:20.950702 DW I2C bus 1 at 0xfe022000 (400 KHz)
416 20:51:20.953742 done! DID_VID 0x00281ae0
417 20:51:20.957307 TPM ready after 0 ms
418 20:51:20.960563 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
419 20:51:20.973429 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
420 20:51:20.976589 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
421 20:51:21.033438 tlcl_send_startup: Startup return code is 0
422 20:51:21.033575 TPM: setup succeeded
423 20:51:21.054569 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
424 20:51:21.076183 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
425 20:51:21.080158 Chrome EC: UHEPI supported
426 20:51:21.083526 Reading cr50 boot mode
427 20:51:21.098191 Cr50 says boot_mode is VERIFIED_RW(0x00).
428 20:51:21.098282 Phase 1
429 20:51:21.105068 FMAP: area GBB found @ 1805000 (458752 bytes)
430 20:51:21.111502 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 20:51:21.118533 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 20:51:21.124903 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
433 20:51:21.124989 Phase 2
434 20:51:21.128685 Phase 3
435 20:51:21.132167 FMAP: area GBB found @ 1805000 (458752 bytes)
436 20:51:21.138860 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 20:51:21.141824 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
438 20:51:21.148722 VB2:vb2_verify_keyblock() Checking keyblock signature...
439 20:51:21.155237 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
440 20:51:21.162474 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
441 20:51:21.171878 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
442 20:51:21.183365 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 20:51:21.186875 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 20:51:21.193335 VB2:vb2_verify_fw_preamble() Verifying preamble.
445 20:51:21.200668 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
446 20:51:21.206919 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
447 20:51:21.213602 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
448 20:51:21.217754 Phase 4
449 20:51:21.220510 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
450 20:51:21.227603 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
451 20:51:21.439585 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
452 20:51:21.446052 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
453 20:51:21.449532 Saving vboot hash.
454 20:51:21.456506 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
455 20:51:21.472763 tlcl_extend: response is 0
456 20:51:21.479292 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
457 20:51:21.482672 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
458 20:51:21.500221 tlcl_extend: response is 0
459 20:51:21.507204 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
460 20:51:21.527007 tlcl_lock_nv_write: response is 0
461 20:51:21.546209 tlcl_lock_nv_write: response is 0
462 20:51:21.546301 Slot A is selected
463 20:51:21.552641 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
464 20:51:21.559098 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
465 20:51:21.565863 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
466 20:51:21.572711 BS: verstage times (exec / console): total (unknown) / 256 ms
467 20:51:21.572797
468 20:51:21.572863
469 20:51:21.579119 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
470 20:51:21.583499 Google Chrome EC: version:
471 20:51:21.586706 ro: volmar_v2.0.14126-e605144e9c
472 20:51:21.590083 rw: volmar_v0.0.55-22d1557
473 20:51:21.592848 running image: 2
474 20:51:21.596760 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
475 20:51:21.606434 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
476 20:51:21.613149 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
477 20:51:21.619794 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
478 20:51:21.629701 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
479 20:51:21.640063 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
480 20:51:21.643636 EC took 941us to calculate image hash
481 20:51:21.653075 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
482 20:51:21.656523 VB2:sync_ec() select_rw=RW(active)
483 20:51:21.668205 Waited 275us to clear limit power flag.
484 20:51:21.671368 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
485 20:51:21.675101 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
486 20:51:21.678980 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
487 20:51:21.682543 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
488 20:51:21.689423 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
489 20:51:21.689510 TCO_STS: 0000 0000
490 20:51:21.692547 GEN_PMCON: d1001038 00002200
491 20:51:21.696032 GBLRST_CAUSE: 00000040 00000000
492 20:51:21.699208 HPR_CAUSE0: 00000000
493 20:51:21.699294 prev_sleep_state 5
494 20:51:21.706405 Abort disabling TXT, as CPU is not TXT capable.
495 20:51:21.713411 cse_lite: Number of partitions = 3
496 20:51:21.716619 cse_lite: Current partition = RW
497 20:51:21.716708 cse_lite: Next partition = RW
498 20:51:21.719940 cse_lite: Flags = 0x7
499 20:51:21.726476 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
500 20:51:21.736566 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
501 20:51:21.739623 FMAP: area SI_ME found @ 1000 (5238784 bytes)
502 20:51:21.746612 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
503 20:51:21.753101 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
504 20:51:21.759772 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
505 20:51:21.763382 cse_lite: CSE CBFS RW version : 16.1.25.2049
506 20:51:21.766822 Boot Count incremented to 2839
507 20:51:21.773323 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
508 20:51:21.779942 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 20:51:21.792683 Probing TPM I2C: done! DID_VID 0x00281ae0
510 20:51:21.796189 Locality already claimed
511 20:51:21.799166 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
512 20:51:21.818591 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
513 20:51:21.825284 MRC: Hash idx 0x100d comparison successful.
514 20:51:21.828795 MRC cache found, size f6c8
515 20:51:21.828882 bootmode is set to: 2
516 20:51:21.832479 EC returned error result code 3
517 20:51:21.835479 FW_CONFIG value from CBI is 0x131
518 20:51:21.842284 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
519 20:51:21.845901 SPD index = 0
520 20:51:21.849001 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
521 20:51:21.852751 SPD: module type is LPDDR4X
522 20:51:21.859798 SPD: module part number is K4U6E3S4AB-MGCL
523 20:51:21.866420 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
524 20:51:21.869655 SPD: device width 16 bits, bus width 16 bits
525 20:51:21.873293 SPD: module size is 1024 MB (per channel)
526 20:51:21.942738 CBMEM:
527 20:51:21.946027 IMD: root @ 0x76fff000 254 entries.
528 20:51:21.949275 IMD: root @ 0x76ffec00 62 entries.
529 20:51:21.956703 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
530 20:51:21.960360 RO_VPD is uninitialized or empty.
531 20:51:21.963733 FMAP: area RW_VPD found @ f29000 (8192 bytes)
532 20:51:21.970541 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
533 20:51:21.973697 External stage cache:
534 20:51:21.977471 IMD: root @ 0x7bbff000 254 entries.
535 20:51:21.980253 IMD: root @ 0x7bbfec00 62 entries.
536 20:51:21.987199 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
537 20:51:21.994083 MRC: Checking cached data update for 'RW_MRC_CACHE'.
538 20:51:21.997356 MRC: 'RW_MRC_CACHE' does not need update.
539 20:51:21.997436 8 DIMMs found
540 20:51:22.000323 SMM Memory Map
541 20:51:22.004197 SMRAM : 0x7b800000 0x800000
542 20:51:22.007499 Subregion 0: 0x7b800000 0x200000
543 20:51:22.010431 Subregion 1: 0x7ba00000 0x200000
544 20:51:22.014118 Subregion 2: 0x7bc00000 0x400000
545 20:51:22.017419 top_of_ram = 0x77000000
546 20:51:22.020434 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
547 20:51:22.027436 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
548 20:51:22.030432 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
549 20:51:22.037591 MTRR Range: Start=ff000000 End=0 (Size 1000000)
550 20:51:22.037700 Normal boot
551 20:51:22.044171 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
552 20:51:22.054593 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
553 20:51:22.058275 Processing 237 relocs. Offset value of 0x74ab9000
554 20:51:22.068324 BS: romstage times (exec / console): total (unknown) / 377 ms
555 20:51:22.075280
556 20:51:22.075359
557 20:51:22.082133 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
558 20:51:22.082210 Normal boot
559 20:51:22.088946 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 20:51:22.095737 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
561 20:51:22.102476 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
562 20:51:22.112439 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
563 20:51:22.159554 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
564 20:51:22.166587 Processing 5931 relocs. Offset value of 0x72a2f000
565 20:51:22.169643 BS: postcar times (exec / console): total (unknown) / 51 ms
566 20:51:22.169746
567 20:51:22.173192
568 20:51:22.180037 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
569 20:51:22.183081 Reserving BERT start 76a1e000, size 10000
570 20:51:22.187105 Normal boot
571 20:51:22.189729 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
572 20:51:22.196451 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
573 20:51:22.203382 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
574 20:51:22.209763 FMAP: area RW_VPD found @ f29000 (8192 bytes)
575 20:51:22.213308 Google Chrome EC: version:
576 20:51:22.216635 ro: volmar_v2.0.14126-e605144e9c
577 20:51:22.219839 rw: volmar_v0.0.55-22d1557
578 20:51:22.219920 running image: 2
579 20:51:22.223585 ACPI _SWS is PM1 Index 8 GPE Index -1
580 20:51:22.230376 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
581 20:51:22.233882 EC returned error result code 3
582 20:51:22.237387 FW_CONFIG value from CBI is 0x131
583 20:51:22.243666 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
584 20:51:22.247446 PCI: 00:1c.2 disabled by fw_config
585 20:51:22.253532 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 20:51:22.257723 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
587 20:51:22.261491 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
588 20:51:22.268006 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
589 20:51:22.271588 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
590 20:51:22.281780 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
591 20:51:22.284943 microcode: sig=0x906a4 pf=0x80 revision=0x423
592 20:51:22.291656 microcode: Update skipped, already up-to-date
593 20:51:22.298347 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
594 20:51:22.329620 Detected 6 core, 8 thread CPU.
595 20:51:22.333089 Setting up SMI for CPU
596 20:51:22.336147 IED base = 0x7bc00000
597 20:51:22.336250 IED size = 0x00400000
598 20:51:22.339696 Will perform SMM setup.
599 20:51:22.343113 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
600 20:51:22.346357 LAPIC 0x0 in XAPIC mode.
601 20:51:22.356335 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
602 20:51:22.359282 Processing 18 relocs. Offset value of 0x00030000
603 20:51:22.363938 Attempting to start 7 APs
604 20:51:22.367558 Waiting for 10ms after sending INIT.
605 20:51:22.380496 Waiting for SIPI to complete...
606 20:51:22.383673 done.
607 20:51:22.383748 LAPIC 0x12 in XAPIC mode.
608 20:51:22.386783 LAPIC 0x16 in XAPIC mode.
609 20:51:22.393608 AP: slot 1 apic_id 12, MCU rev: 0x00000423
610 20:51:22.393720 LAPIC 0x14 in XAPIC mode.
611 20:51:22.397228 LAPIC 0x9 in XAPIC mode.
612 20:51:22.400553 LAPIC 0x10 in XAPIC mode.
613 20:51:22.403682 AP: slot 3 apic_id 16, MCU rev: 0x00000423
614 20:51:22.406857 AP: slot 2 apic_id 14, MCU rev: 0x00000423
615 20:51:22.413820 AP: slot 4 apic_id 10, MCU rev: 0x00000423
616 20:51:22.417198 AP: slot 5 apic_id 9, MCU rev: 0x00000423
617 20:51:22.420293 LAPIC 0x8 in XAPIC mode.
618 20:51:22.424027 LAPIC 0x1 in XAPIC mode.
619 20:51:22.426914 AP: slot 6 apic_id 8, MCU rev: 0x00000423
620 20:51:22.430145 Waiting for SIPI to complete...
621 20:51:22.430218 done.
622 20:51:22.434066 AP: slot 7 apic_id 1, MCU rev: 0x00000423
623 20:51:22.437288 smm_setup_relocation_handler: enter
624 20:51:22.440431 smm_setup_relocation_handler: exit
625 20:51:22.450210 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
626 20:51:22.453549 Processing 11 relocs. Offset value of 0x00038000
627 20:51:22.460553 smm_module_setup_stub: stack_top = 0x7b804000
628 20:51:22.464044 smm_module_setup_stub: per cpu stack_size = 0x800
629 20:51:22.470347 smm_module_setup_stub: runtime.start32_offset = 0x4c
630 20:51:22.473820 smm_module_setup_stub: runtime.smm_size = 0x10000
631 20:51:22.480395 SMM Module: stub loaded at 38000. Will call 0x76a52094
632 20:51:22.483818 Installing permanent SMM handler to 0x7b800000
633 20:51:22.490428 smm_load_module: total_smm_space_needed e468, available -> 200000
634 20:51:22.500804 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
635 20:51:22.503892 Processing 255 relocs. Offset value of 0x7b9f6000
636 20:51:22.507055 smm_load_module: smram_start: 0x7b800000
637 20:51:22.513579 smm_load_module: smram_end: 7ba00000
638 20:51:22.517077 smm_load_module: handler start 0x7b9f6d5f
639 20:51:22.520573 smm_load_module: handler_size 98d0
640 20:51:22.524229 smm_load_module: fxsave_area 0x7b9ff000
641 20:51:22.527150 smm_load_module: fxsave_size 1000
642 20:51:22.530707 smm_load_module: CONFIG_MSEG_SIZE 0x0
643 20:51:22.537623 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
644 20:51:22.540527 smm_load_module: handler_mod_params.smbase = 0x7b800000
645 20:51:22.547640 smm_load_module: per_cpu_save_state_size = 0x400
646 20:51:22.550792 smm_load_module: num_cpus = 0x8
647 20:51:22.557586 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
648 20:51:22.561061 smm_load_module: total_save_state_size = 0x2000
649 20:51:22.564327 smm_load_module: cpu0 entry: 7b9e6000
650 20:51:22.570481 smm_create_map: cpus allowed in one segment 30
651 20:51:22.573798 smm_create_map: min # of segments needed 1
652 20:51:22.573931 CPU 0x0
653 20:51:22.577387 smbase 7b9e6000 entry 7b9ee000
654 20:51:22.584165 ss_start 7b9f5c00 code_end 7b9ee208
655 20:51:22.584241 CPU 0x1
656 20:51:22.587585 smbase 7b9e5c00 entry 7b9edc00
657 20:51:22.590886 ss_start 7b9f5800 code_end 7b9ede08
658 20:51:22.594302 CPU 0x2
659 20:51:22.597369 smbase 7b9e5800 entry 7b9ed800
660 20:51:22.600506 ss_start 7b9f5400 code_end 7b9eda08
661 20:51:22.600579 CPU 0x3
662 20:51:22.607770 smbase 7b9e5400 entry 7b9ed400
663 20:51:22.610837 ss_start 7b9f5000 code_end 7b9ed608
664 20:51:22.610916 CPU 0x4
665 20:51:22.614450 smbase 7b9e5000 entry 7b9ed000
666 20:51:22.621007 ss_start 7b9f4c00 code_end 7b9ed208
667 20:51:22.621081 CPU 0x5
668 20:51:22.624578 smbase 7b9e4c00 entry 7b9ecc00
669 20:51:22.627673 ss_start 7b9f4800 code_end 7b9ece08
670 20:51:22.631153 CPU 0x6
671 20:51:22.634819 smbase 7b9e4800 entry 7b9ec800
672 20:51:22.637857 ss_start 7b9f4400 code_end 7b9eca08
673 20:51:22.637945 CPU 0x7
674 20:51:22.644592 smbase 7b9e4400 entry 7b9ec400
675 20:51:22.647802 ss_start 7b9f4000 code_end 7b9ec608
676 20:51:22.654711 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
677 20:51:22.661411 Processing 11 relocs. Offset value of 0x7b9ee000
678 20:51:22.668029 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
679 20:51:22.671290 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
680 20:51:22.677672 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
681 20:51:22.685143 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
682 20:51:22.691057 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
683 20:51:22.698189 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
684 20:51:22.704534 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
685 20:51:22.711444 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
686 20:51:22.718119 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
687 20:51:22.721749 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
688 20:51:22.728527 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
689 20:51:22.734721 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
690 20:51:22.741480 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
691 20:51:22.748240 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
692 20:51:22.754592 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
693 20:51:22.757730 smm_module_setup_stub: stack_top = 0x7b804000
694 20:51:22.764568 smm_module_setup_stub: per cpu stack_size = 0x800
695 20:51:22.768111 smm_module_setup_stub: runtime.start32_offset = 0x4c
696 20:51:22.774769 smm_module_setup_stub: runtime.smm_size = 0x200000
697 20:51:22.781560 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
698 20:51:22.784830 Clearing SMI status registers
699 20:51:22.788046 SMI_STS: PM1
700 20:51:22.788121 PM1_STS: WAK PWRBTN
701 20:51:22.794539 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
702 20:51:22.798092 In relocation handler: CPU 0
703 20:51:22.804581 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
704 20:51:22.808084 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 20:51:22.811483 Relocation complete.
706 20:51:22.818027 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
707 20:51:22.821815 In relocation handler: CPU 7
708 20:51:22.824671 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
709 20:51:22.828149 Relocation complete.
710 20:51:22.834602 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
711 20:51:22.838227 In relocation handler: CPU 1
712 20:51:22.841419 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
713 20:51:22.845088 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 20:51:22.848122 Relocation complete.
715 20:51:22.854812 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
716 20:51:22.858286 In relocation handler: CPU 4
717 20:51:22.861899 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
718 20:51:22.868440 Writing SMRR. base = 0x7b800006, mask=0xff800c00
719 20:51:22.868517 Relocation complete.
720 20:51:22.875542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
721 20:51:22.878253 In relocation handler: CPU 2
722 20:51:22.885043 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
723 20:51:22.888195 Writing SMRR. base = 0x7b800006, mask=0xff800c00
724 20:51:22.891442 Relocation complete.
725 20:51:22.898372 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
726 20:51:22.901770 In relocation handler: CPU 3
727 20:51:22.905154 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
728 20:51:22.908239 Writing SMRR. base = 0x7b800006, mask=0xff800c00
729 20:51:22.911789 Relocation complete.
730 20:51:22.918494 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
731 20:51:22.922002 In relocation handler: CPU 6
732 20:51:22.925295 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
733 20:51:22.931944 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 20:51:22.932023 Relocation complete.
735 20:51:22.938499 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
736 20:51:22.941668 In relocation handler: CPU 5
737 20:51:22.948465 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
738 20:51:22.948540 Relocation complete.
739 20:51:22.952068 Initializing CPU #0
740 20:51:22.955171 CPU: vendor Intel device 906a4
741 20:51:22.958739 CPU: family 06, model 9a, stepping 04
742 20:51:22.962161 Clearing out pending MCEs
743 20:51:22.965260 cpu: energy policy set to 7
744 20:51:22.965334 Turbo is available but hidden
745 20:51:22.968312 Turbo is available and visible
746 20:51:22.975132 microcode: Update skipped, already up-to-date
747 20:51:22.975212 CPU #0 initialized
748 20:51:22.978550 Initializing CPU #7
749 20:51:22.982111 Initializing CPU #1
750 20:51:22.982182 Initializing CPU #2
751 20:51:22.985300 Initializing CPU #4
752 20:51:22.985369 Initializing CPU #6
753 20:51:22.988481 CPU: vendor Intel device 906a4
754 20:51:22.995194 CPU: family 06, model 9a, stepping 04
755 20:51:22.995270 Initializing CPU #3
756 20:51:22.998866 CPU: vendor Intel device 906a4
757 20:51:23.001745 CPU: family 06, model 9a, stepping 04
758 20:51:23.005142 Clearing out pending MCEs
759 20:51:23.008672 CPU: vendor Intel device 906a4
760 20:51:23.011905 CPU: family 06, model 9a, stepping 04
761 20:51:23.015405 Clearing out pending MCEs
762 20:51:23.018786 cpu: energy policy set to 7
763 20:51:23.022175 cpu: energy policy set to 7
764 20:51:23.022243 Clearing out pending MCEs
765 20:51:23.028719 microcode: Update skipped, already up-to-date
766 20:51:23.028795 CPU #2 initialized
767 20:51:23.036117 microcode: Update skipped, already up-to-date
768 20:51:23.036192 CPU #1 initialized
769 20:51:23.039301 cpu: energy policy set to 7
770 20:51:23.042099 CPU: vendor Intel device 906a4
771 20:51:23.045370 CPU: family 06, model 9a, stepping 04
772 20:51:23.049236 microcode: Update skipped, already up-to-date
773 20:51:23.052193 CPU #3 initialized
774 20:51:23.055971 Clearing out pending MCEs
775 20:51:23.056045 Initializing CPU #5
776 20:51:23.059576 cpu: energy policy set to 7
777 20:51:23.062542 CPU: vendor Intel device 906a4
778 20:51:23.065658 CPU: family 06, model 9a, stepping 04
779 20:51:23.069261 CPU: vendor Intel device 906a4
780 20:51:23.072339 CPU: family 06, model 9a, stepping 04
781 20:51:23.079092 microcode: Update skipped, already up-to-date
782 20:51:23.079165 CPU #4 initialized
783 20:51:23.082758 CPU: vendor Intel device 906a4
784 20:51:23.085695 CPU: family 06, model 9a, stepping 04
785 20:51:23.089377 Clearing out pending MCEs
786 20:51:23.092269 Clearing out pending MCEs
787 20:51:23.095814 Clearing out pending MCEs
788 20:51:23.099371 cpu: energy policy set to 7
789 20:51:23.102485 cpu: energy policy set to 7
790 20:51:23.102561 cpu: energy policy set to 7
791 20:51:23.109127 microcode: Update skipped, already up-to-date
792 20:51:23.109212 CPU #5 initialized
793 20:51:23.115882 microcode: Update skipped, already up-to-date
794 20:51:23.115962 CPU #6 initialized
795 20:51:23.122416 microcode: Update skipped, already up-to-date
796 20:51:23.122494 CPU #7 initialized
797 20:51:23.129054 bsp_do_flight_plan done after 693 msecs.
798 20:51:23.129131 CPU: frequency set to 4400 MHz
799 20:51:23.132756 Enabling SMIs.
800 20:51:23.139329 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
801 20:51:23.154565 Probing TPM I2C: done! DID_VID 0x00281ae0
802 20:51:23.158442 Locality already claimed
803 20:51:23.161237 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
804 20:51:23.173210 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
805 20:51:23.176214 Enabling GPIO PM b/c CR50 has long IRQ pulse support
806 20:51:23.182950 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
807 20:51:23.189995 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
808 20:51:23.193143 Found a VBT of 9216 bytes after decompression
809 20:51:23.196827 PCI 1.0, PIN A, using IRQ #16
810 20:51:23.200233 PCI 2.0, PIN A, using IRQ #17
811 20:51:23.203146 PCI 4.0, PIN A, using IRQ #18
812 20:51:23.206795 PCI 5.0, PIN A, using IRQ #16
813 20:51:23.209920 PCI 6.0, PIN A, using IRQ #16
814 20:51:23.213293 PCI 6.2, PIN C, using IRQ #18
815 20:51:23.216617 PCI 7.0, PIN A, using IRQ #19
816 20:51:23.219554 PCI 7.1, PIN B, using IRQ #20
817 20:51:23.223131 PCI 7.2, PIN C, using IRQ #21
818 20:51:23.226567 PCI 7.3, PIN D, using IRQ #22
819 20:51:23.226725 PCI 8.0, PIN A, using IRQ #23
820 20:51:23.229802 PCI D.0, PIN A, using IRQ #17
821 20:51:23.233312 PCI D.1, PIN B, using IRQ #19
822 20:51:23.236380 PCI 10.0, PIN A, using IRQ #24
823 20:51:23.240041 PCI 10.1, PIN B, using IRQ #25
824 20:51:23.243466 PCI 10.6, PIN C, using IRQ #20
825 20:51:23.246491 PCI 10.7, PIN D, using IRQ #21
826 20:51:23.250168 PCI 11.0, PIN A, using IRQ #26
827 20:51:23.253100 PCI 11.1, PIN B, using IRQ #27
828 20:51:23.256647 PCI 11.2, PIN C, using IRQ #28
829 20:51:23.260344 PCI 11.3, PIN D, using IRQ #29
830 20:51:23.263470 PCI 12.0, PIN A, using IRQ #30
831 20:51:23.266390 PCI 12.6, PIN B, using IRQ #31
832 20:51:23.270077 PCI 12.7, PIN C, using IRQ #22
833 20:51:23.273207 PCI 13.0, PIN A, using IRQ #32
834 20:51:23.276550 PCI 13.1, PIN B, using IRQ #33
835 20:51:23.276627 PCI 13.2, PIN C, using IRQ #34
836 20:51:23.279621 PCI 13.3, PIN D, using IRQ #35
837 20:51:23.283272 PCI 14.0, PIN B, using IRQ #23
838 20:51:23.286916 PCI 14.1, PIN A, using IRQ #36
839 20:51:23.289786 PCI 14.3, PIN C, using IRQ #17
840 20:51:23.293191 PCI 15.0, PIN A, using IRQ #37
841 20:51:23.296416 PCI 15.1, PIN B, using IRQ #38
842 20:51:23.300119 PCI 15.2, PIN C, using IRQ #39
843 20:51:23.303222 PCI 15.3, PIN D, using IRQ #40
844 20:51:23.306803 PCI 16.0, PIN A, using IRQ #18
845 20:51:23.309789 PCI 16.1, PIN B, using IRQ #19
846 20:51:23.313413 PCI 16.2, PIN C, using IRQ #20
847 20:51:23.316459 PCI 16.3, PIN D, using IRQ #21
848 20:51:23.320107 PCI 16.4, PIN A, using IRQ #18
849 20:51:23.323327 PCI 16.5, PIN B, using IRQ #19
850 20:51:23.326779 PCI 17.0, PIN A, using IRQ #22
851 20:51:23.326865 PCI 19.0, PIN A, using IRQ #41
852 20:51:23.329822 PCI 19.1, PIN B, using IRQ #42
853 20:51:23.333453 PCI 19.2, PIN C, using IRQ #43
854 20:51:23.336597 PCI 1C.0, PIN A, using IRQ #16
855 20:51:23.339986 PCI 1C.1, PIN B, using IRQ #17
856 20:51:23.343090 PCI 1C.2, PIN C, using IRQ #18
857 20:51:23.347062 PCI 1C.3, PIN D, using IRQ #19
858 20:51:23.350105 PCI 1C.4, PIN A, using IRQ #16
859 20:51:23.353403 PCI 1C.5, PIN B, using IRQ #17
860 20:51:23.356663 PCI 1C.6, PIN C, using IRQ #18
861 20:51:23.360112 PCI 1C.7, PIN D, using IRQ #19
862 20:51:23.363639 PCI 1D.0, PIN A, using IRQ #16
863 20:51:23.366609 PCI 1D.1, PIN B, using IRQ #17
864 20:51:23.369981 PCI 1D.2, PIN C, using IRQ #18
865 20:51:23.373595 PCI 1D.3, PIN D, using IRQ #19
866 20:51:23.373678 PCI 1E.0, PIN A, using IRQ #23
867 20:51:23.376670 PCI 1E.1, PIN B, using IRQ #20
868 20:51:23.380309 PCI 1E.2, PIN C, using IRQ #44
869 20:51:23.383455 PCI 1E.3, PIN D, using IRQ #45
870 20:51:23.386549 PCI 1F.3, PIN B, using IRQ #22
871 20:51:23.390311 PCI 1F.4, PIN C, using IRQ #23
872 20:51:23.393279 PCI 1F.6, PIN D, using IRQ #20
873 20:51:23.396913 PCI 1F.7, PIN A, using IRQ #21
874 20:51:23.400093 IRQ: Using dynamically assigned PCI IO-APIC IRQs
875 20:51:23.410349 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
876 20:51:23.588483 FSPS returned 0
877 20:51:23.591773 Executing Phase 1 of FspMultiPhaseSiInit
878 20:51:23.601629 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
879 20:51:23.605091 port C0 DISC req: usage 1 usb3 1 usb2 1
880 20:51:23.608022 Raw Buffer output 0 00000111
881 20:51:23.611608 Raw Buffer output 1 00000000
882 20:51:23.615029 pmc_send_ipc_cmd succeeded
883 20:51:23.621793 port C1 DISC req: usage 1 usb3 3 usb2 3
884 20:51:23.621896 Raw Buffer output 0 00000331
885 20:51:23.624904 Raw Buffer output 1 00000000
886 20:51:23.629192 pmc_send_ipc_cmd succeeded
887 20:51:23.633096 Detected 6 core, 8 thread CPU.
888 20:51:23.636108 Detected 6 core, 8 thread CPU.
889 20:51:23.641470 Detected 6 core, 8 thread CPU.
890 20:51:23.645066 Detected 6 core, 8 thread CPU.
891 20:51:23.648084 Detected 6 core, 8 thread CPU.
892 20:51:23.651913 Detected 6 core, 8 thread CPU.
893 20:51:23.654958 Detected 6 core, 8 thread CPU.
894 20:51:23.658559 Detected 6 core, 8 thread CPU.
895 20:51:23.661773 Detected 6 core, 8 thread CPU.
896 20:51:23.664959 Detected 6 core, 8 thread CPU.
897 20:51:23.668296 Detected 6 core, 8 thread CPU.
898 20:51:23.671887 Detected 6 core, 8 thread CPU.
899 20:51:23.675505 Detected 6 core, 8 thread CPU.
900 20:51:23.678511 Detected 6 core, 8 thread CPU.
901 20:51:23.681974 Detected 6 core, 8 thread CPU.
902 20:51:23.685699 Detected 6 core, 8 thread CPU.
903 20:51:23.688656 Detected 6 core, 8 thread CPU.
904 20:51:23.691857 Detected 6 core, 8 thread CPU.
905 20:51:23.695171 Detected 6 core, 8 thread CPU.
906 20:51:23.695246 Detected 6 core, 8 thread CPU.
907 20:51:23.698850 Detected 6 core, 8 thread CPU.
908 20:51:23.701814 Detected 6 core, 8 thread CPU.
909 20:51:23.993763 Detected 6 core, 8 thread CPU.
910 20:51:23.996849 Detected 6 core, 8 thread CPU.
911 20:51:24.000332 Detected 6 core, 8 thread CPU.
912 20:51:24.003834 Detected 6 core, 8 thread CPU.
913 20:51:24.006897 Detected 6 core, 8 thread CPU.
914 20:51:24.010570 Detected 6 core, 8 thread CPU.
915 20:51:24.013589 Detected 6 core, 8 thread CPU.
916 20:51:24.017163 Detected 6 core, 8 thread CPU.
917 20:51:24.020557 Detected 6 core, 8 thread CPU.
918 20:51:24.023936 Detected 6 core, 8 thread CPU.
919 20:51:24.027375 Detected 6 core, 8 thread CPU.
920 20:51:24.030862 Detected 6 core, 8 thread CPU.
921 20:51:24.033985 Detected 6 core, 8 thread CPU.
922 20:51:24.037018 Detected 6 core, 8 thread CPU.
923 20:51:24.040591 Detected 6 core, 8 thread CPU.
924 20:51:24.043609 Detected 6 core, 8 thread CPU.
925 20:51:24.047264 Detected 6 core, 8 thread CPU.
926 20:51:24.047347 Detected 6 core, 8 thread CPU.
927 20:51:24.050818 Detected 6 core, 8 thread CPU.
928 20:51:24.053609 Detected 6 core, 8 thread CPU.
929 20:51:24.056954 Display FSP Version Info HOB
930 20:51:24.060882 Reference Code - CPU = c.0.65.70
931 20:51:24.063806 uCode Version = 0.0.4.23
932 20:51:24.067482 TXT ACM version = ff.ff.ff.ffff
933 20:51:24.070561 Reference Code - ME = c.0.65.70
934 20:51:24.073595 MEBx version = 0.0.0.0
935 20:51:24.076956 ME Firmware Version = Lite SKU
936 20:51:24.080587 Reference Code - PCH = c.0.65.70
937 20:51:24.083678 PCH-CRID Status = Disabled
938 20:51:24.087364 PCH-CRID Original Value = ff.ff.ff.ffff
939 20:51:24.090294 PCH-CRID New Value = ff.ff.ff.ffff
940 20:51:24.093966 OPROM - RST - RAID = ff.ff.ff.ffff
941 20:51:24.097117 PCH Hsio Version = 4.0.0.0
942 20:51:24.100833 Reference Code - SA - System Agent = c.0.65.70
943 20:51:24.103853 Reference Code - MRC = 0.0.3.80
944 20:51:24.107369 SA - PCIe Version = c.0.65.70
945 20:51:24.110432 SA-CRID Status = Disabled
946 20:51:24.114105 SA-CRID Original Value = 0.0.0.4
947 20:51:24.117158 SA-CRID New Value = 0.0.0.4
948 20:51:24.117240 OPROM - VBIOS = ff.ff.ff.ffff
949 20:51:24.123851 IO Manageability Engine FW Version = 24.0.4.0
950 20:51:24.127516 PHY Build Version = 0.0.0.2016
951 20:51:24.130874 Thunderbolt(TM) FW Version = 0.0.0.0
952 20:51:24.137553 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
953 20:51:24.144099 BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms
954 20:51:24.144183 Enumerating buses...
955 20:51:24.150903 Show all devs... Before device enumeration.
956 20:51:24.150986 Root Device: enabled 1
957 20:51:24.154404 CPU_CLUSTER: 0: enabled 1
958 20:51:24.157186 DOMAIN: 0000: enabled 1
959 20:51:24.157269 GPIO: 0: enabled 1
960 20:51:24.160608 PCI: 00:00.0: enabled 1
961 20:51:24.164030 PCI: 00:01.0: enabled 0
962 20:51:24.167251 PCI: 00:01.1: enabled 0
963 20:51:24.167334 PCI: 00:02.0: enabled 1
964 20:51:24.170930 PCI: 00:04.0: enabled 1
965 20:51:24.174028 PCI: 00:05.0: enabled 0
966 20:51:24.177482 PCI: 00:06.0: enabled 1
967 20:51:24.177591 PCI: 00:06.2: enabled 0
968 20:51:24.181418 PCI: 00:07.0: enabled 0
969 20:51:24.184161 PCI: 00:07.1: enabled 0
970 20:51:24.187217 PCI: 00:07.2: enabled 0
971 20:51:24.187300 PCI: 00:07.3: enabled 0
972 20:51:24.190974 PCI: 00:08.0: enabled 0
973 20:51:24.193766 PCI: 00:09.0: enabled 0
974 20:51:24.193894 PCI: 00:0a.0: enabled 1
975 20:51:24.197186 PCI: 00:0d.0: enabled 1
976 20:51:24.200879 PCI: 00:0d.1: enabled 0
977 20:51:24.204321 PCI: 00:0d.2: enabled 0
978 20:51:24.204448 PCI: 00:0d.3: enabled 0
979 20:51:24.207460 PCI: 00:0e.0: enabled 0
980 20:51:24.210822 PCI: 00:10.0: enabled 0
981 20:51:24.214543 PCI: 00:10.1: enabled 0
982 20:51:24.214645 PCI: 00:10.6: enabled 0
983 20:51:24.217907 PCI: 00:10.7: enabled 0
984 20:51:24.221119 PCI: 00:12.0: enabled 0
985 20:51:24.221228 PCI: 00:12.6: enabled 0
986 20:51:24.224516 PCI: 00:12.7: enabled 0
987 20:51:24.227687 PCI: 00:13.0: enabled 0
988 20:51:24.230787 PCI: 00:14.0: enabled 1
989 20:51:24.230869 PCI: 00:14.1: enabled 0
990 20:51:24.234440 PCI: 00:14.2: enabled 1
991 20:51:24.237398 PCI: 00:14.3: enabled 1
992 20:51:24.240936 PCI: 00:15.0: enabled 1
993 20:51:24.241018 PCI: 00:15.1: enabled 1
994 20:51:24.244078 PCI: 00:15.2: enabled 0
995 20:51:24.247672 PCI: 00:15.3: enabled 1
996 20:51:24.250598 PCI: 00:16.0: enabled 1
997 20:51:24.250681 PCI: 00:16.1: enabled 0
998 20:51:24.254207 PCI: 00:16.2: enabled 0
999 20:51:24.257902 PCI: 00:16.3: enabled 0
1000 20:51:24.258030 PCI: 00:16.4: enabled 0
1001 20:51:24.260975 PCI: 00:16.5: enabled 0
1002 20:51:24.263991 PCI: 00:17.0: enabled 1
1003 20:51:24.267794 PCI: 00:19.0: enabled 0
1004 20:51:24.267877 PCI: 00:19.1: enabled 1
1005 20:51:24.271062 PCI: 00:19.2: enabled 0
1006 20:51:24.274088 PCI: 00:1a.0: enabled 0
1007 20:51:24.277430 PCI: 00:1c.0: enabled 0
1008 20:51:24.277539 PCI: 00:1c.1: enabled 0
1009 20:51:24.280964 PCI: 00:1c.2: enabled 0
1010 20:51:24.284012 PCI: 00:1c.3: enabled 0
1011 20:51:24.287383 PCI: 00:1c.4: enabled 0
1012 20:51:24.287466 PCI: 00:1c.5: enabled 0
1013 20:51:24.291003 PCI: 00:1c.6: enabled 0
1014 20:51:24.294102 PCI: 00:1c.7: enabled 0
1015 20:51:24.294184 PCI: 00:1d.0: enabled 0
1016 20:51:24.297712 PCI: 00:1d.1: enabled 0
1017 20:51:24.300761 PCI: 00:1d.2: enabled 0
1018 20:51:24.304232 PCI: 00:1d.3: enabled 0
1019 20:51:24.304331 PCI: 00:1e.0: enabled 1
1020 20:51:24.307753 PCI: 00:1e.1: enabled 0
1021 20:51:24.310851 PCI: 00:1e.2: enabled 0
1022 20:51:24.314055 PCI: 00:1e.3: enabled 1
1023 20:51:24.314137 PCI: 00:1f.0: enabled 1
1024 20:51:24.317700 PCI: 00:1f.1: enabled 0
1025 20:51:24.320758 PCI: 00:1f.2: enabled 1
1026 20:51:24.324087 PCI: 00:1f.3: enabled 1
1027 20:51:24.324171 PCI: 00:1f.4: enabled 0
1028 20:51:24.327485 PCI: 00:1f.5: enabled 1
1029 20:51:24.330692 PCI: 00:1f.6: enabled 0
1030 20:51:24.330774 PCI: 00:1f.7: enabled 0
1031 20:51:24.334420 GENERIC: 0.0: enabled 1
1032 20:51:24.337804 GENERIC: 0.0: enabled 1
1033 20:51:24.341049 GENERIC: 1.0: enabled 1
1034 20:51:24.341127 GENERIC: 0.0: enabled 1
1035 20:51:24.344579 GENERIC: 1.0: enabled 1
1036 20:51:24.347671 USB0 port 0: enabled 1
1037 20:51:24.347744 USB0 port 0: enabled 1
1038 20:51:24.351457 GENERIC: 0.0: enabled 1
1039 20:51:24.354665 I2C: 00:1a: enabled 1
1040 20:51:24.357545 I2C: 00:31: enabled 1
1041 20:51:24.357626 I2C: 00:32: enabled 1
1042 20:51:24.361189 I2C: 00:50: enabled 1
1043 20:51:24.364191 I2C: 00:10: enabled 1
1044 20:51:24.364270 I2C: 00:15: enabled 1
1045 20:51:24.367812 I2C: 00:2c: enabled 1
1046 20:51:24.370977 GENERIC: 0.0: enabled 1
1047 20:51:24.371048 SPI: 00: enabled 1
1048 20:51:24.374549 PNP: 0c09.0: enabled 1
1049 20:51:24.377758 GENERIC: 0.0: enabled 1
1050 20:51:24.377903 USB3 port 0: enabled 1
1051 20:51:24.381355 USB3 port 1: enabled 0
1052 20:51:24.384412 USB3 port 2: enabled 1
1053 20:51:24.384529 USB3 port 3: enabled 0
1054 20:51:24.388071 USB2 port 0: enabled 1
1055 20:51:24.391186 USB2 port 1: enabled 0
1056 20:51:24.394575 USB2 port 2: enabled 1
1057 20:51:24.394675 USB2 port 3: enabled 0
1058 20:51:24.398156 USB2 port 4: enabled 0
1059 20:51:24.401144 USB2 port 5: enabled 1
1060 20:51:24.401262 USB2 port 6: enabled 0
1061 20:51:24.404799 USB2 port 7: enabled 0
1062 20:51:24.407915 USB2 port 8: enabled 1
1063 20:51:24.408014 USB2 port 9: enabled 1
1064 20:51:24.411532 USB3 port 0: enabled 1
1065 20:51:24.414625 USB3 port 1: enabled 0
1066 20:51:24.417924 USB3 port 2: enabled 0
1067 20:51:24.418002 USB3 port 3: enabled 0
1068 20:51:24.421276 GENERIC: 0.0: enabled 1
1069 20:51:24.424669 GENERIC: 1.0: enabled 1
1070 20:51:24.424773 APIC: 00: enabled 1
1071 20:51:24.428239 APIC: 12: enabled 1
1072 20:51:24.431776 APIC: 14: enabled 1
1073 20:51:24.431880 APIC: 16: enabled 1
1074 20:51:24.434860 APIC: 10: enabled 1
1075 20:51:24.434937 APIC: 09: enabled 1
1076 20:51:24.438317 APIC: 08: enabled 1
1077 20:51:24.441530 APIC: 01: enabled 1
1078 20:51:24.441603 Compare with tree...
1079 20:51:24.444851 Root Device: enabled 1
1080 20:51:24.448001 CPU_CLUSTER: 0: enabled 1
1081 20:51:24.448080 APIC: 00: enabled 1
1082 20:51:24.451694 APIC: 12: enabled 1
1083 20:51:24.454754 APIC: 14: enabled 1
1084 20:51:24.454853 APIC: 16: enabled 1
1085 20:51:24.458031 APIC: 10: enabled 1
1086 20:51:24.461593 APIC: 09: enabled 1
1087 20:51:24.461664 APIC: 08: enabled 1
1088 20:51:24.465055 APIC: 01: enabled 1
1089 20:51:24.467929 DOMAIN: 0000: enabled 1
1090 20:51:24.471474 GPIO: 0: enabled 1
1091 20:51:24.471544 PCI: 00:00.0: enabled 1
1092 20:51:24.475131 PCI: 00:01.0: enabled 0
1093 20:51:24.478399 PCI: 00:01.1: enabled 0
1094 20:51:24.481674 PCI: 00:02.0: enabled 1
1095 20:51:24.481773 PCI: 00:04.0: enabled 1
1096 20:51:24.485003 GENERIC: 0.0: enabled 1
1097 20:51:24.488368 PCI: 00:05.0: enabled 0
1098 20:51:24.491557 PCI: 00:06.0: enabled 1
1099 20:51:24.495391 PCI: 00:06.2: enabled 0
1100 20:51:24.495474 PCI: 00:08.0: enabled 0
1101 20:51:24.498287 PCI: 00:09.0: enabled 0
1102 20:51:24.501724 PCI: 00:0a.0: enabled 1
1103 20:51:24.505176 PCI: 00:0d.0: enabled 1
1104 20:51:24.508131 USB0 port 0: enabled 1
1105 20:51:24.508206 USB3 port 0: enabled 1
1106 20:51:24.511903 USB3 port 1: enabled 0
1107 20:51:24.514865 USB3 port 2: enabled 1
1108 20:51:24.518650 USB3 port 3: enabled 0
1109 20:51:24.521666 PCI: 00:0d.1: enabled 0
1110 20:51:24.521763 PCI: 00:0d.2: enabled 0
1111 20:51:24.525069 PCI: 00:0d.3: enabled 0
1112 20:51:24.528633 PCI: 00:0e.0: enabled 0
1113 20:51:24.531964 PCI: 00:10.0: enabled 0
1114 20:51:24.535084 PCI: 00:10.1: enabled 0
1115 20:51:24.535160 PCI: 00:10.6: enabled 0
1116 20:51:24.538373 PCI: 00:10.7: enabled 0
1117 20:51:24.541958 PCI: 00:12.0: enabled 0
1118 20:51:24.545058 PCI: 00:12.6: enabled 0
1119 20:51:24.548622 PCI: 00:12.7: enabled 0
1120 20:51:24.548693 PCI: 00:13.0: enabled 0
1121 20:51:24.552067 PCI: 00:14.0: enabled 1
1122 20:51:24.555435 USB0 port 0: enabled 1
1123 20:51:24.558549 USB2 port 0: enabled 1
1124 20:51:24.562160 USB2 port 1: enabled 0
1125 20:51:24.562237 USB2 port 2: enabled 1
1126 20:51:24.565288 USB2 port 3: enabled 0
1127 20:51:24.569013 USB2 port 4: enabled 0
1128 20:51:24.572092 USB2 port 5: enabled 1
1129 20:51:24.575234 USB2 port 6: enabled 0
1130 20:51:24.575309 USB2 port 7: enabled 0
1131 20:51:24.578389 USB2 port 8: enabled 1
1132 20:51:24.581908 USB2 port 9: enabled 1
1133 20:51:24.585347 USB3 port 0: enabled 1
1134 20:51:24.588677 USB3 port 1: enabled 0
1135 20:51:24.592058 USB3 port 2: enabled 0
1136 20:51:24.592140 USB3 port 3: enabled 0
1137 20:51:24.595083 PCI: 00:14.1: enabled 0
1138 20:51:24.598751 PCI: 00:14.2: enabled 1
1139 20:51:24.602126 PCI: 00:14.3: enabled 1
1140 20:51:24.605383 GENERIC: 0.0: enabled 1
1141 20:51:24.605509 PCI: 00:15.0: enabled 1
1142 20:51:24.608915 I2C: 00:1a: enabled 1
1143 20:51:24.612235 I2C: 00:31: enabled 1
1144 20:51:24.615763 I2C: 00:32: enabled 1
1145 20:51:24.615841 PCI: 00:15.1: enabled 1
1146 20:51:24.618854 I2C: 00:50: enabled 1
1147 20:51:24.622628 PCI: 00:15.2: enabled 0
1148 20:51:24.625534 PCI: 00:15.3: enabled 1
1149 20:51:24.625607 I2C: 00:10: enabled 1
1150 20:51:24.629186 PCI: 00:16.0: enabled 1
1151 20:51:24.632135 PCI: 00:16.1: enabled 0
1152 20:51:24.635803 PCI: 00:16.2: enabled 0
1153 20:51:24.639277 PCI: 00:16.3: enabled 0
1154 20:51:24.639353 PCI: 00:16.4: enabled 0
1155 20:51:24.642442 PCI: 00:16.5: enabled 0
1156 20:51:24.645750 PCI: 00:17.0: enabled 1
1157 20:51:24.649192 PCI: 00:19.0: enabled 0
1158 20:51:24.652483 PCI: 00:19.1: enabled 1
1159 20:51:24.652587 I2C: 00:15: enabled 1
1160 20:51:24.655516 I2C: 00:2c: enabled 1
1161 20:51:24.659115 PCI: 00:19.2: enabled 0
1162 20:51:24.662646 PCI: 00:1a.0: enabled 0
1163 20:51:24.662727 PCI: 00:1e.0: enabled 1
1164 20:51:24.666076 PCI: 00:1e.1: enabled 0
1165 20:51:24.669094 PCI: 00:1e.2: enabled 0
1166 20:51:24.672463 PCI: 00:1e.3: enabled 1
1167 20:51:24.672544 SPI: 00: enabled 1
1168 20:51:24.676141 PCI: 00:1f.0: enabled 1
1169 20:51:24.679277 PNP: 0c09.0: enabled 1
1170 20:51:24.682337 PCI: 00:1f.1: enabled 0
1171 20:51:24.685990 PCI: 00:1f.2: enabled 1
1172 20:51:24.686072 GENERIC: 0.0: enabled 1
1173 20:51:24.689115 GENERIC: 0.0: enabled 1
1174 20:51:24.692764 GENERIC: 1.0: enabled 1
1175 20:51:24.695689 PCI: 00:1f.3: enabled 1
1176 20:51:24.699296 PCI: 00:1f.4: enabled 0
1177 20:51:24.699374 PCI: 00:1f.5: enabled 1
1178 20:51:24.702399 PCI: 00:1f.6: enabled 0
1179 20:51:24.706074 PCI: 00:1f.7: enabled 0
1180 20:51:24.709105 Root Device scanning...
1181 20:51:24.712397 scan_static_bus for Root Device
1182 20:51:24.715904 CPU_CLUSTER: 0 enabled
1183 20:51:24.715987 DOMAIN: 0000 enabled
1184 20:51:24.719126 DOMAIN: 0000 scanning...
1185 20:51:24.722343 PCI: pci_scan_bus for bus 00
1186 20:51:24.725876 PCI: 00:00.0 [8086/0000] ops
1187 20:51:24.729048 PCI: 00:00.0 [8086/4609] enabled
1188 20:51:24.732552 PCI: 00:02.0 [8086/0000] bus ops
1189 20:51:24.736167 PCI: 00:02.0 [8086/46b3] enabled
1190 20:51:24.739298 PCI: 00:04.0 [8086/0000] bus ops
1191 20:51:24.742942 PCI: 00:04.0 [8086/461d] enabled
1192 20:51:24.745999 PCI: 00:06.0 [8086/0000] bus ops
1193 20:51:24.749184 PCI: 00:06.0 [8086/464d] enabled
1194 20:51:24.752579 PCI: 00:08.0 [8086/464f] disabled
1195 20:51:24.755913 PCI: 00:0a.0 [8086/467d] enabled
1196 20:51:24.759281 PCI: 00:0d.0 [8086/0000] bus ops
1197 20:51:24.762804 PCI: 00:0d.0 [8086/461e] enabled
1198 20:51:24.765787 PCI: 00:14.0 [8086/0000] bus ops
1199 20:51:24.769360 PCI: 00:14.0 [8086/51ed] enabled
1200 20:51:24.772356 PCI: 00:14.2 [8086/51ef] enabled
1201 20:51:24.775836 PCI: 00:14.3 [8086/0000] bus ops
1202 20:51:24.779148 PCI: 00:14.3 [8086/51f0] enabled
1203 20:51:24.782353 PCI: 00:15.0 [8086/0000] bus ops
1204 20:51:24.785977 PCI: 00:15.0 [8086/51e8] enabled
1205 20:51:24.789040 PCI: 00:15.1 [8086/0000] bus ops
1206 20:51:24.792740 PCI: 00:15.1 [8086/51e9] enabled
1207 20:51:24.795729 PCI: 00:15.2 [8086/0000] bus ops
1208 20:51:24.799437 PCI: 00:15.2 [8086/51ea] disabled
1209 20:51:24.802516 PCI: 00:15.3 [8086/0000] bus ops
1210 20:51:24.805522 PCI: 00:15.3 [8086/51eb] enabled
1211 20:51:24.809252 PCI: 00:16.0 [8086/0000] ops
1212 20:51:24.812192 PCI: 00:16.0 [8086/51e0] enabled
1213 20:51:24.819394 PCI: Static device PCI: 00:17.0 not found, disabling it.
1214 20:51:24.822648 PCI: 00:19.0 [8086/0000] bus ops
1215 20:51:24.825810 PCI: 00:19.0 [8086/51c5] disabled
1216 20:51:24.829123 PCI: 00:19.1 [8086/0000] bus ops
1217 20:51:24.832877 PCI: 00:19.1 [8086/51c6] enabled
1218 20:51:24.835840 PCI: 00:1e.0 [8086/0000] ops
1219 20:51:24.839374 PCI: 00:1e.0 [8086/51a8] enabled
1220 20:51:24.842400 PCI: 00:1e.3 [8086/0000] bus ops
1221 20:51:24.845932 PCI: 00:1e.3 [8086/51ab] enabled
1222 20:51:24.849071 PCI: 00:1f.0 [8086/0000] bus ops
1223 20:51:24.852374 PCI: 00:1f.0 [8086/5182] enabled
1224 20:51:24.852455 RTC Init
1225 20:51:24.855937 Set power on after power failure.
1226 20:51:24.859533 Disabling Deep S3
1227 20:51:24.859614 Disabling Deep S3
1228 20:51:24.862672 Disabling Deep S4
1229 20:51:24.866121 Disabling Deep S4
1230 20:51:24.866202 Disabling Deep S5
1231 20:51:24.869120 Disabling Deep S5
1232 20:51:24.872696 PCI: 00:1f.2 [0000/0000] hidden
1233 20:51:24.875855 PCI: 00:1f.3 [8086/0000] bus ops
1234 20:51:24.879088 PCI: 00:1f.3 [8086/51c8] enabled
1235 20:51:24.882787 PCI: 00:1f.5 [8086/0000] bus ops
1236 20:51:24.885669 PCI: 00:1f.5 [8086/51a4] enabled
1237 20:51:24.885749 GPIO: 0 enabled
1238 20:51:24.889290 PCI: Leftover static devices:
1239 20:51:24.892794 PCI: 00:01.0
1240 20:51:24.892874 PCI: 00:01.1
1241 20:51:24.892937 PCI: 00:05.0
1242 20:51:24.896066 PCI: 00:06.2
1243 20:51:24.896147 PCI: 00:09.0
1244 20:51:24.899121 PCI: 00:0d.1
1245 20:51:24.899201 PCI: 00:0d.2
1246 20:51:24.899265 PCI: 00:0d.3
1247 20:51:24.902863 PCI: 00:0e.0
1248 20:51:24.902943 PCI: 00:10.0
1249 20:51:24.905957 PCI: 00:10.1
1250 20:51:24.906036 PCI: 00:10.6
1251 20:51:24.906099 PCI: 00:10.7
1252 20:51:24.909497 PCI: 00:12.0
1253 20:51:24.909621 PCI: 00:12.6
1254 20:51:24.912711 PCI: 00:12.7
1255 20:51:24.912793 PCI: 00:13.0
1256 20:51:24.912857 PCI: 00:14.1
1257 20:51:24.916377 PCI: 00:16.1
1258 20:51:24.916459 PCI: 00:16.2
1259 20:51:24.919438 PCI: 00:16.3
1260 20:51:24.919520 PCI: 00:16.4
1261 20:51:24.922945 PCI: 00:16.5
1262 20:51:24.923026 PCI: 00:17.0
1263 20:51:24.923125 PCI: 00:19.2
1264 20:51:24.926127 PCI: 00:1a.0
1265 20:51:24.926208 PCI: 00:1e.1
1266 20:51:24.929230 PCI: 00:1e.2
1267 20:51:24.929310 PCI: 00:1f.1
1268 20:51:24.929374 PCI: 00:1f.4
1269 20:51:24.932950 PCI: 00:1f.6
1270 20:51:24.933030 PCI: 00:1f.7
1271 20:51:24.935961 PCI: Check your devicetree.cb.
1272 20:51:24.939441 PCI: 00:02.0 scanning...
1273 20:51:24.942906 scan_generic_bus for PCI: 00:02.0
1274 20:51:24.946446 scan_generic_bus for PCI: 00:02.0 done
1275 20:51:24.949434 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1276 20:51:24.952908 PCI: 00:04.0 scanning...
1277 20:51:24.956448 scan_generic_bus for PCI: 00:04.0
1278 20:51:24.959683 GENERIC: 0.0 enabled
1279 20:51:24.966162 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1280 20:51:24.969623 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1281 20:51:24.972994 PCI: 00:06.0 scanning...
1282 20:51:24.976341 do_pci_scan_bridge for PCI: 00:06.0
1283 20:51:24.979767 PCI: pci_scan_bus for bus 01
1284 20:51:24.982927 PCI: 01:00.0 [15b7/5009] enabled
1285 20:51:24.986508 Enabling Common Clock Configuration
1286 20:51:24.989720 L1 Sub-State supported from root port 6
1287 20:51:24.993076 L1 Sub-State Support = 0x5
1288 20:51:24.996163 CommonModeRestoreTime = 0x6e
1289 20:51:24.999691 Power On Value = 0x5, Power On Scale = 0x2
1290 20:51:25.002905 ASPM: Enabled L1
1291 20:51:25.006353 PCIe: Max_Payload_Size adjusted to 256
1292 20:51:25.009810 PCI: 01:00.0: Enabled LTR
1293 20:51:25.012926 PCI: 01:00.0: Programmed LTR max latencies
1294 20:51:25.016140 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1295 20:51:25.019760 PCI: 00:0d.0 scanning...
1296 20:51:25.023321 scan_static_bus for PCI: 00:0d.0
1297 20:51:25.026283 USB0 port 0 enabled
1298 20:51:25.026363 USB0 port 0 scanning...
1299 20:51:25.029932 scan_static_bus for USB0 port 0
1300 20:51:25.032956 USB3 port 0 enabled
1301 20:51:25.036743 USB3 port 1 disabled
1302 20:51:25.036847 USB3 port 2 enabled
1303 20:51:25.039748 USB3 port 3 disabled
1304 20:51:25.042906 USB3 port 0 scanning...
1305 20:51:25.046222 scan_static_bus for USB3 port 0
1306 20:51:25.049632 scan_static_bus for USB3 port 0 done
1307 20:51:25.053067 scan_bus: bus USB3 port 0 finished in 6 msecs
1308 20:51:25.056548 USB3 port 2 scanning...
1309 20:51:25.059751 scan_static_bus for USB3 port 2
1310 20:51:25.063179 scan_static_bus for USB3 port 2 done
1311 20:51:25.066124 scan_bus: bus USB3 port 2 finished in 6 msecs
1312 20:51:25.069423 scan_static_bus for USB0 port 0 done
1313 20:51:25.076131 scan_bus: bus USB0 port 0 finished in 43 msecs
1314 20:51:25.080155 scan_static_bus for PCI: 00:0d.0 done
1315 20:51:25.083001 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1316 20:51:25.086683 PCI: 00:14.0 scanning...
1317 20:51:25.089812 scan_static_bus for PCI: 00:14.0
1318 20:51:25.092888 USB0 port 0 enabled
1319 20:51:25.092994 USB0 port 0 scanning...
1320 20:51:25.096446 scan_static_bus for USB0 port 0
1321 20:51:25.100050 USB2 port 0 enabled
1322 20:51:25.103400 USB2 port 1 disabled
1323 20:51:25.103481 USB2 port 2 enabled
1324 20:51:25.106753 USB2 port 3 disabled
1325 20:51:25.109713 USB2 port 4 disabled
1326 20:51:25.109810 USB2 port 5 enabled
1327 20:51:25.113097 USB2 port 6 disabled
1328 20:51:25.116317 USB2 port 7 disabled
1329 20:51:25.116398 USB2 port 8 enabled
1330 20:51:25.119909 USB2 port 9 enabled
1331 20:51:25.119989 USB3 port 0 enabled
1332 20:51:25.123124 USB3 port 1 disabled
1333 20:51:25.126821 USB3 port 2 disabled
1334 20:51:25.126902 USB3 port 3 disabled
1335 20:51:25.129808 USB2 port 0 scanning...
1336 20:51:25.133364 scan_static_bus for USB2 port 0
1337 20:51:25.136621 scan_static_bus for USB2 port 0 done
1338 20:51:25.143321 scan_bus: bus USB2 port 0 finished in 6 msecs
1339 20:51:25.143418 USB2 port 2 scanning...
1340 20:51:25.146449 scan_static_bus for USB2 port 2
1341 20:51:25.150016 scan_static_bus for USB2 port 2 done
1342 20:51:25.156393 scan_bus: bus USB2 port 2 finished in 6 msecs
1343 20:51:25.156474 USB2 port 5 scanning...
1344 20:51:25.159754 scan_static_bus for USB2 port 5
1345 20:51:25.163189 scan_static_bus for USB2 port 5 done
1346 20:51:25.169913 scan_bus: bus USB2 port 5 finished in 6 msecs
1347 20:51:25.173403 USB2 port 8 scanning...
1348 20:51:25.176845 scan_static_bus for USB2 port 8
1349 20:51:25.180049 scan_static_bus for USB2 port 8 done
1350 20:51:25.183169 scan_bus: bus USB2 port 8 finished in 6 msecs
1351 20:51:25.186802 USB2 port 9 scanning...
1352 20:51:25.189904 scan_static_bus for USB2 port 9
1353 20:51:25.193614 scan_static_bus for USB2 port 9 done
1354 20:51:25.196442 scan_bus: bus USB2 port 9 finished in 6 msecs
1355 20:51:25.199978 USB3 port 0 scanning...
1356 20:51:25.203509 scan_static_bus for USB3 port 0
1357 20:51:25.206883 scan_static_bus for USB3 port 0 done
1358 20:51:25.210270 scan_bus: bus USB3 port 0 finished in 6 msecs
1359 20:51:25.213686 scan_static_bus for USB0 port 0 done
1360 20:51:25.220417 scan_bus: bus USB0 port 0 finished in 120 msecs
1361 20:51:25.223465 scan_static_bus for PCI: 00:14.0 done
1362 20:51:25.226633 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1363 20:51:25.230373 PCI: 00:14.3 scanning...
1364 20:51:25.233723 scan_static_bus for PCI: 00:14.3
1365 20:51:25.236577 GENERIC: 0.0 enabled
1366 20:51:25.239924 scan_static_bus for PCI: 00:14.3 done
1367 20:51:25.243694 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1368 20:51:25.246674 PCI: 00:15.0 scanning...
1369 20:51:25.249787 scan_static_bus for PCI: 00:15.0
1370 20:51:25.253547 I2C: 00:1a enabled
1371 20:51:25.253627 I2C: 00:31 enabled
1372 20:51:25.256603 I2C: 00:32 enabled
1373 20:51:25.260519 scan_static_bus for PCI: 00:15.0 done
1374 20:51:25.266983 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1375 20:51:25.267064 PCI: 00:15.1 scanning...
1376 20:51:25.269897 scan_static_bus for PCI: 00:15.1
1377 20:51:25.273681 I2C: 00:50 enabled
1378 20:51:25.276938 scan_static_bus for PCI: 00:15.1 done
1379 20:51:25.280478 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1380 20:51:25.283540 PCI: 00:15.3 scanning...
1381 20:51:25.287228 scan_static_bus for PCI: 00:15.3
1382 20:51:25.290310 I2C: 00:10 enabled
1383 20:51:25.293399 scan_static_bus for PCI: 00:15.3 done
1384 20:51:25.297088 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1385 20:51:25.300279 PCI: 00:19.1 scanning...
1386 20:51:25.303948 scan_static_bus for PCI: 00:19.1
1387 20:51:25.307650 I2C: 00:15 enabled
1388 20:51:25.307731 I2C: 00:2c enabled
1389 20:51:25.310595 scan_static_bus for PCI: 00:19.1 done
1390 20:51:25.317325 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1391 20:51:25.317406 PCI: 00:1e.3 scanning...
1392 20:51:25.320551 scan_generic_bus for PCI: 00:1e.3
1393 20:51:25.323895 SPI: 00 enabled
1394 20:51:25.330322 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1395 20:51:25.333994 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1396 20:51:25.336922 PCI: 00:1f.0 scanning...
1397 20:51:25.340323 scan_static_bus for PCI: 00:1f.0
1398 20:51:25.343639 PNP: 0c09.0 enabled
1399 20:51:25.343719 PNP: 0c09.0 scanning...
1400 20:51:25.347324 scan_static_bus for PNP: 0c09.0
1401 20:51:25.350478 scan_static_bus for PNP: 0c09.0 done
1402 20:51:25.357339 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1403 20:51:25.360999 scan_static_bus for PCI: 00:1f.0 done
1404 20:51:25.363970 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1405 20:51:25.367271 PCI: 00:1f.2 scanning...
1406 20:51:25.370828 scan_static_bus for PCI: 00:1f.2
1407 20:51:25.373758 GENERIC: 0.0 enabled
1408 20:51:25.377110 GENERIC: 0.0 scanning...
1409 20:51:25.380434 scan_static_bus for GENERIC: 0.0
1410 20:51:25.380508 GENERIC: 0.0 enabled
1411 20:51:25.383640 GENERIC: 1.0 enabled
1412 20:51:25.387611 scan_static_bus for GENERIC: 0.0 done
1413 20:51:25.390560 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1414 20:51:25.397368 scan_static_bus for PCI: 00:1f.2 done
1415 20:51:25.401127 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1416 20:51:25.404257 PCI: 00:1f.3 scanning...
1417 20:51:25.407226 scan_static_bus for PCI: 00:1f.3
1418 20:51:25.410760 scan_static_bus for PCI: 00:1f.3 done
1419 20:51:25.414561 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1420 20:51:25.417617 PCI: 00:1f.5 scanning...
1421 20:51:25.420604 scan_generic_bus for PCI: 00:1f.5
1422 20:51:25.424289 scan_generic_bus for PCI: 00:1f.5 done
1423 20:51:25.431059 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1424 20:51:25.434214 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1425 20:51:25.437472 scan_static_bus for Root Device done
1426 20:51:25.444187 scan_bus: bus Root Device finished in 729 msecs
1427 20:51:25.444271 done
1428 20:51:25.450760 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1429 20:51:25.454184 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1430 20:51:25.461101 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1431 20:51:25.464413 SPI flash protection: WPSW=1 SRP0=0
1432 20:51:25.470910 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1433 20:51:25.474226 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1434 20:51:25.477416 found VGA at PCI: 00:02.0
1435 20:51:25.481107 Setting up VGA for PCI: 00:02.0
1436 20:51:25.487513 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1437 20:51:25.490795 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1438 20:51:25.494540 Allocating resources...
1439 20:51:25.497300 Reading resources...
1440 20:51:25.500959 Root Device read_resources bus 0 link: 0
1441 20:51:25.504026 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1442 20:51:25.510874 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1443 20:51:25.513981 DOMAIN: 0000 read_resources bus 0 link: 0
1444 20:51:25.520579 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1445 20:51:25.527369 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1446 20:51:25.530714 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1447 20:51:25.537686 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1448 20:51:25.544243 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1449 20:51:25.551047 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1450 20:51:25.557553 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1451 20:51:25.564182 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1452 20:51:25.570872 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1453 20:51:25.577579 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1454 20:51:25.584348 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1455 20:51:25.591238 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1456 20:51:25.597978 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1457 20:51:25.601258 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1458 20:51:25.607789 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1459 20:51:25.614501 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1460 20:51:25.621114 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1461 20:51:25.628077 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1462 20:51:25.634778 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1463 20:51:25.641450 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1464 20:51:25.645208 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1465 20:51:25.651115 PCI: 00:04.0 read_resources bus 1 link: 0
1466 20:51:25.655057 PCI: 00:04.0 read_resources bus 1 link: 0 done
1467 20:51:25.658055 PCI: 00:06.0 read_resources bus 1 link: 0
1468 20:51:25.664631 PCI: 00:06.0 read_resources bus 1 link: 0 done
1469 20:51:25.668183 PCI: 00:0d.0 read_resources bus 0 link: 0
1470 20:51:25.671363 USB0 port 0 read_resources bus 0 link: 0
1471 20:51:25.678060 USB0 port 0 read_resources bus 0 link: 0 done
1472 20:51:25.681738 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1473 20:51:25.684782 PCI: 00:14.0 read_resources bus 0 link: 0
1474 20:51:25.691529 USB0 port 0 read_resources bus 0 link: 0
1475 20:51:25.694909 USB0 port 0 read_resources bus 0 link: 0 done
1476 20:51:25.698205 PCI: 00:14.0 read_resources bus 0 link: 0 done
1477 20:51:25.704982 PCI: 00:14.3 read_resources bus 0 link: 0
1478 20:51:25.708039 PCI: 00:14.3 read_resources bus 0 link: 0 done
1479 20:51:25.711563 PCI: 00:15.0 read_resources bus 0 link: 0
1480 20:51:25.718422 PCI: 00:15.0 read_resources bus 0 link: 0 done
1481 20:51:25.722008 PCI: 00:15.1 read_resources bus 0 link: 0
1482 20:51:25.724889 PCI: 00:15.1 read_resources bus 0 link: 0 done
1483 20:51:25.731509 PCI: 00:15.3 read_resources bus 0 link: 0
1484 20:51:25.735225 PCI: 00:15.3 read_resources bus 0 link: 0 done
1485 20:51:25.738276 PCI: 00:19.1 read_resources bus 0 link: 0
1486 20:51:25.744851 PCI: 00:19.1 read_resources bus 0 link: 0 done
1487 20:51:25.748291 PCI: 00:1e.3 read_resources bus 2 link: 0
1488 20:51:25.755578 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1489 20:51:25.758607 PCI: 00:1f.0 read_resources bus 0 link: 0
1490 20:51:25.762259 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1491 20:51:25.765582 PCI: 00:1f.2 read_resources bus 0 link: 0
1492 20:51:25.772199 GENERIC: 0.0 read_resources bus 0 link: 0
1493 20:51:25.775785 GENERIC: 0.0 read_resources bus 0 link: 0 done
1494 20:51:25.778865 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1495 20:51:25.786018 DOMAIN: 0000 read_resources bus 0 link: 0 done
1496 20:51:25.789151 Root Device read_resources bus 0 link: 0 done
1497 20:51:25.792314 Done reading resources.
1498 20:51:25.798993 Show resources in subtree (Root Device)...After reading.
1499 20:51:25.802858 Root Device child on link 0 CPU_CLUSTER: 0
1500 20:51:25.805720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 20:51:25.809200 APIC: 00
1502 20:51:25.809307 APIC: 12
1503 20:51:25.809398 APIC: 14
1504 20:51:25.812637 APIC: 16
1505 20:51:25.812721 APIC: 10
1506 20:51:25.816188 APIC: 09
1507 20:51:25.816268 APIC: 08
1508 20:51:25.816331 APIC: 01
1509 20:51:25.819016 DOMAIN: 0000 child on link 0 GPIO: 0
1510 20:51:25.829281 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1511 20:51:25.839114 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1512 20:51:25.842672 GPIO: 0
1513 20:51:25.842753 PCI: 00:00.0
1514 20:51:25.852728 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1515 20:51:25.862699 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1516 20:51:25.869102 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1517 20:51:25.879316 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1518 20:51:25.889649 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1519 20:51:25.899414 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1520 20:51:25.909424 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1521 20:51:25.919608 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1522 20:51:25.926366 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1523 20:51:25.936028 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1524 20:51:25.946079 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1525 20:51:25.956326 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1526 20:51:25.966312 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1527 20:51:25.976398 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1528 20:51:25.983260 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1529 20:51:25.992862 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1530 20:51:26.002946 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1531 20:51:26.013375 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1532 20:51:26.023051 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1533 20:51:26.033178 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1534 20:51:26.043664 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1535 20:51:26.050301 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1536 20:51:26.060085 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1537 20:51:26.069951 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1538 20:51:26.080091 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1539 20:51:26.089973 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1540 20:51:26.099921 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1541 20:51:26.106780 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1542 20:51:26.110583 PCI: 00:02.0
1543 20:51:26.120098 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1544 20:51:26.130839 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1545 20:51:26.140718 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1546 20:51:26.143752 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1547 20:51:26.153973 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1548 20:51:26.154058 GENERIC: 0.0
1549 20:51:26.160700 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1550 20:51:26.167156 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1551 20:51:26.177380 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1552 20:51:26.187263 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1553 20:51:26.190971 PCI: 01:00.0
1554 20:51:26.200719 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 20:51:26.207559 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1556 20:51:26.210980 PCI: 00:08.0
1557 20:51:26.211076 PCI: 00:0a.0
1558 20:51:26.221188 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1559 20:51:26.227731 PCI: 00:0d.0 child on link 0 USB0 port 0
1560 20:51:26.237480 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1561 20:51:26.241277 USB0 port 0 child on link 0 USB3 port 0
1562 20:51:26.244169 USB3 port 0
1563 20:51:26.244267 USB3 port 1
1564 20:51:26.247513 USB3 port 2
1565 20:51:26.247595 USB3 port 3
1566 20:51:26.254207 PCI: 00:14.0 child on link 0 USB0 port 0
1567 20:51:26.264116 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1568 20:51:26.267364 USB0 port 0 child on link 0 USB2 port 0
1569 20:51:26.267445 USB2 port 0
1570 20:51:26.271015 USB2 port 1
1571 20:51:26.271096 USB2 port 2
1572 20:51:26.274433 USB2 port 3
1573 20:51:26.277740 USB2 port 4
1574 20:51:26.277856 USB2 port 5
1575 20:51:26.280832 USB2 port 6
1576 20:51:26.280913 USB2 port 7
1577 20:51:26.284577 USB2 port 8
1578 20:51:26.284667 USB2 port 9
1579 20:51:26.287579 USB3 port 0
1580 20:51:26.287674 USB3 port 1
1581 20:51:26.291259 USB3 port 2
1582 20:51:26.291341 USB3 port 3
1583 20:51:26.294222 PCI: 00:14.2
1584 20:51:26.304912 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1585 20:51:26.314174 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1586 20:51:26.317501 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1587 20:51:26.327804 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1588 20:51:26.331017 GENERIC: 0.0
1589 20:51:26.334444 PCI: 00:15.0 child on link 0 I2C: 00:1a
1590 20:51:26.344161 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1591 20:51:26.344281 I2C: 00:1a
1592 20:51:26.347979 I2C: 00:31
1593 20:51:26.348061 I2C: 00:32
1594 20:51:26.354400 PCI: 00:15.1 child on link 0 I2C: 00:50
1595 20:51:26.361267 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1596 20:51:26.364929 I2C: 00:50
1597 20:51:26.365011 PCI: 00:15.2
1598 20:51:26.371901 PCI: 00:15.3 child on link 0 I2C: 00:10
1599 20:51:26.381490 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1600 20:51:26.381575 I2C: 00:10
1601 20:51:26.384510 PCI: 00:16.0
1602 20:51:26.394917 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1603 20:51:26.395026 PCI: 00:19.0
1604 20:51:26.397986 PCI: 00:19.1 child on link 0 I2C: 00:15
1605 20:51:26.408715 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 20:51:26.411151 I2C: 00:15
1607 20:51:26.411267 I2C: 00:2c
1608 20:51:26.414815 PCI: 00:1e.0
1609 20:51:26.424788 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1610 20:51:26.428325 PCI: 00:1e.3 child on link 0 SPI: 00
1611 20:51:26.438151 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 20:51:26.441325 SPI: 00
1613 20:51:26.444480 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1614 20:51:26.454724 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1615 20:51:26.454809 PNP: 0c09.0
1616 20:51:26.464746 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1617 20:51:26.468201 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1618 20:51:26.478156 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1619 20:51:26.488034 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1620 20:51:26.491721 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1621 20:51:26.494583 GENERIC: 0.0
1622 20:51:26.494691 GENERIC: 1.0
1623 20:51:26.498292 PCI: 00:1f.3
1624 20:51:26.508190 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1625 20:51:26.518390 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1626 20:51:26.518473 PCI: 00:1f.5
1627 20:51:26.528454 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1628 20:51:26.534814 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1629 20:51:26.541373 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1630 20:51:26.548163 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1631 20:51:26.554956 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1632 20:51:26.558265 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1633 20:51:26.561822 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1634 20:51:26.568579 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1635 20:51:26.574911 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1636 20:51:26.584806 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1637 20:51:26.591683 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1638 20:51:26.598283 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1639 20:51:26.605142 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1640 20:51:26.611479 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1641 20:51:26.621933 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1642 20:51:26.622013 DOMAIN: 0000: Resource ranges:
1643 20:51:26.628579 * Base: 1000, Size: 800, Tag: 100
1644 20:51:26.631686 * Base: 1900, Size: e700, Tag: 100
1645 20:51:26.635340 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1646 20:51:26.641816 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1647 20:51:26.648528 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1648 20:51:26.658842 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1649 20:51:26.665345 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1650 20:51:26.672191 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1651 20:51:26.678872 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1652 20:51:26.688500 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1653 20:51:26.695582 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1654 20:51:26.702139 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1655 20:51:26.711660 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1656 20:51:26.718897 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1657 20:51:26.725327 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1658 20:51:26.735108 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1659 20:51:26.741747 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1660 20:51:26.748519 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1661 20:51:26.758602 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1662 20:51:26.765346 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1663 20:51:26.771802 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1664 20:51:26.778940 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1665 20:51:26.788638 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1666 20:51:26.795133 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1667 20:51:26.802346 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1668 20:51:26.812173 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1669 20:51:26.818889 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1670 20:51:26.825659 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1671 20:51:26.835160 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1672 20:51:26.841815 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1673 20:51:26.848692 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1674 20:51:26.858387 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1675 20:51:26.865679 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1676 20:51:26.871775 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1677 20:51:26.881736 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1678 20:51:26.885252 DOMAIN: 0000: Resource ranges:
1679 20:51:26.888891 * Base: 80400000, Size: 3fc00000, Tag: 200
1680 20:51:26.891914 * Base: d0000000, Size: 28000000, Tag: 200
1681 20:51:26.895615 * Base: fa000000, Size: 1000000, Tag: 200
1682 20:51:26.902180 * Base: fb001000, Size: 17ff000, Tag: 200
1683 20:51:26.905780 * Base: fe800000, Size: 300000, Tag: 200
1684 20:51:26.909318 * Base: feb80000, Size: 80000, Tag: 200
1685 20:51:26.912155 * Base: fed00000, Size: 40000, Tag: 200
1686 20:51:26.919164 * Base: fed70000, Size: 10000, Tag: 200
1687 20:51:26.922189 * Base: fed88000, Size: 8000, Tag: 200
1688 20:51:26.925304 * Base: fed93000, Size: d000, Tag: 200
1689 20:51:26.928990 * Base: feda2000, Size: 1e000, Tag: 200
1690 20:51:26.935710 * Base: fede0000, Size: 1220000, Tag: 200
1691 20:51:26.938797 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1692 20:51:26.945389 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1693 20:51:26.952182 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1694 20:51:26.958971 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1695 20:51:26.965314 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1696 20:51:26.972063 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1697 20:51:26.979058 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1698 20:51:26.985538 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1699 20:51:26.992474 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1700 20:51:26.998957 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1701 20:51:27.005708 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1702 20:51:27.012392 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1703 20:51:27.019018 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1704 20:51:27.025264 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1705 20:51:27.031917 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1706 20:51:27.038738 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1707 20:51:27.045618 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1708 20:51:27.052017 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1709 20:51:27.058613 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1710 20:51:27.065358 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1711 20:51:27.072202 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1712 20:51:27.082493 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1713 20:51:27.085244 PCI: 00:06.0: Resource ranges:
1714 20:51:27.088397 * Base: 80400000, Size: 100000, Tag: 200
1715 20:51:27.094976 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1716 20:51:27.101937 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1717 20:51:27.108246 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1718 20:51:27.118205 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1719 20:51:27.121786 Root Device assign_resources, bus 0 link: 0
1720 20:51:27.125172 DOMAIN: 0000 assign_resources, bus 0 link: 0
1721 20:51:27.135020 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1722 20:51:27.141736 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1723 20:51:27.151803 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1724 20:51:27.158378 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1725 20:51:27.161443 PCI: 00:04.0 assign_resources, bus 1 link: 0
1726 20:51:27.168234 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1727 20:51:27.174812 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1728 20:51:27.184869 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1729 20:51:27.194994 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1730 20:51:27.198424 PCI: 00:06.0 assign_resources, bus 1 link: 0
1731 20:51:27.208100 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1732 20:51:27.214455 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1733 20:51:27.221295 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1734 20:51:27.228103 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1735 20:51:27.234507 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1736 20:51:27.241434 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1737 20:51:27.244520 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1738 20:51:27.254802 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1739 20:51:27.257861 PCI: 00:14.0 assign_resources, bus 0 link: 0
1740 20:51:27.264432 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1741 20:51:27.271350 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1742 20:51:27.278025 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1743 20:51:27.287688 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1744 20:51:27.290811 PCI: 00:14.3 assign_resources, bus 0 link: 0
1745 20:51:27.297612 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1746 20:51:27.304113 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1747 20:51:27.307306 PCI: 00:15.0 assign_resources, bus 0 link: 0
1748 20:51:27.313889 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1749 20:51:27.321109 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1750 20:51:27.327370 PCI: 00:15.1 assign_resources, bus 0 link: 0
1751 20:51:27.330489 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1752 20:51:27.340619 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1753 20:51:27.343822 PCI: 00:15.3 assign_resources, bus 0 link: 0
1754 20:51:27.347117 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1755 20:51:27.357349 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1756 20:51:27.363867 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1757 20:51:27.370388 PCI: 00:19.1 assign_resources, bus 0 link: 0
1758 20:51:27.373742 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1759 20:51:27.380829 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1760 20:51:27.387349 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1761 20:51:27.390595 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1762 20:51:27.397061 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1763 20:51:27.400600 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1764 20:51:27.407208 LPC: Trying to open IO window from 800 size 1ff
1765 20:51:27.414265 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1766 20:51:27.420704 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1767 20:51:27.430292 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1768 20:51:27.433684 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1769 20:51:27.440239 Root Device assign_resources, bus 0 link: 0 done
1770 20:51:27.443864 Done setting resources.
1771 20:51:27.446919 Show resources in subtree (Root Device)...After assigning values.
1772 20:51:27.453660 Root Device child on link 0 CPU_CLUSTER: 0
1773 20:51:27.457336 CPU_CLUSTER: 0 child on link 0 APIC: 00
1774 20:51:27.457418 APIC: 00
1775 20:51:27.460426 APIC: 12
1776 20:51:27.460506 APIC: 14
1777 20:51:27.463903 APIC: 16
1778 20:51:27.463984 APIC: 10
1779 20:51:27.464048 APIC: 09
1780 20:51:27.466882 APIC: 08
1781 20:51:27.466962 APIC: 01
1782 20:51:27.470498 DOMAIN: 0000 child on link 0 GPIO: 0
1783 20:51:27.480372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1784 20:51:27.490141 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1785 20:51:27.490224 GPIO: 0
1786 20:51:27.493904 PCI: 00:00.0
1787 20:51:27.503290 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1788 20:51:27.513507 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1789 20:51:27.520311 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1790 20:51:27.530089 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1791 20:51:27.539983 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1792 20:51:27.550171 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1793 20:51:27.559968 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1794 20:51:27.569689 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1795 20:51:27.576661 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1796 20:51:27.586548 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1797 20:51:27.596359 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1798 20:51:27.606488 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1799 20:51:27.616337 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1800 20:51:27.626347 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1801 20:51:27.632797 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1802 20:51:27.642919 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1803 20:51:27.652881 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1804 20:51:27.662737 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1805 20:51:27.673232 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1806 20:51:27.682720 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1807 20:51:27.693176 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1808 20:51:27.702684 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1809 20:51:27.709538 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1810 20:51:27.719526 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1811 20:51:27.729711 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1812 20:51:27.739286 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1813 20:51:27.749716 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1814 20:51:27.759177 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1815 20:51:27.759261 PCI: 00:02.0
1816 20:51:27.772564 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1817 20:51:27.782647 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1818 20:51:27.793044 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1819 20:51:27.796226 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1820 20:51:27.805950 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1821 20:51:27.809729 GENERIC: 0.0
1822 20:51:27.812606 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1823 20:51:27.822564 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1824 20:51:27.832663 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1825 20:51:27.842572 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1826 20:51:27.845606 PCI: 01:00.0
1827 20:51:27.855720 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1828 20:51:27.865637 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1829 20:51:27.869497 PCI: 00:08.0
1830 20:51:27.869579 PCI: 00:0a.0
1831 20:51:27.878875 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1832 20:51:27.882705 PCI: 00:0d.0 child on link 0 USB0 port 0
1833 20:51:27.896147 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1834 20:51:27.899061 USB0 port 0 child on link 0 USB3 port 0
1835 20:51:27.899146 USB3 port 0
1836 20:51:27.902664 USB3 port 1
1837 20:51:27.905788 USB3 port 2
1838 20:51:27.905922 USB3 port 3
1839 20:51:27.909265 PCI: 00:14.0 child on link 0 USB0 port 0
1840 20:51:27.922190 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1841 20:51:27.925851 USB0 port 0 child on link 0 USB2 port 0
1842 20:51:27.925940 USB2 port 0
1843 20:51:27.929082 USB2 port 1
1844 20:51:27.929179 USB2 port 2
1845 20:51:27.932275 USB2 port 3
1846 20:51:27.935748 USB2 port 4
1847 20:51:27.935829 USB2 port 5
1848 20:51:27.939148 USB2 port 6
1849 20:51:27.939232 USB2 port 7
1850 20:51:27.942198 USB2 port 8
1851 20:51:27.942279 USB2 port 9
1852 20:51:27.945995 USB3 port 0
1853 20:51:27.946076 USB3 port 1
1854 20:51:27.948968 USB3 port 2
1855 20:51:27.949048 USB3 port 3
1856 20:51:27.952144 PCI: 00:14.2
1857 20:51:27.961957 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1858 20:51:27.971907 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1859 20:51:27.975395 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1860 20:51:27.985751 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1861 20:51:27.988727 GENERIC: 0.0
1862 20:51:27.992381 PCI: 00:15.0 child on link 0 I2C: 00:1a
1863 20:51:28.002132 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1864 20:51:28.005276 I2C: 00:1a
1865 20:51:28.005357 I2C: 00:31
1866 20:51:28.008722 I2C: 00:32
1867 20:51:28.012109 PCI: 00:15.1 child on link 0 I2C: 00:50
1868 20:51:28.022448 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1869 20:51:28.025373 I2C: 00:50
1870 20:51:28.025492 PCI: 00:15.2
1871 20:51:28.028706 PCI: 00:15.3 child on link 0 I2C: 00:10
1872 20:51:28.042169 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1873 20:51:28.042251 I2C: 00:10
1874 20:51:28.045107 PCI: 00:16.0
1875 20:51:28.055133 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1876 20:51:28.055214 PCI: 00:19.0
1877 20:51:28.058734 PCI: 00:19.1 child on link 0 I2C: 00:15
1878 20:51:28.072014 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1879 20:51:28.072097 I2C: 00:15
1880 20:51:28.075489 I2C: 00:2c
1881 20:51:28.075569 PCI: 00:1e.0
1882 20:51:28.085294 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1883 20:51:28.091792 PCI: 00:1e.3 child on link 0 SPI: 00
1884 20:51:28.101823 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1885 20:51:28.101933 SPI: 00
1886 20:51:28.105035 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1887 20:51:28.114888 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1888 20:51:28.118413 PNP: 0c09.0
1889 20:51:28.125355 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1890 20:51:28.131688 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1891 20:51:28.138105 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1892 20:51:28.148271 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1893 20:51:28.155095 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1894 20:51:28.155177 GENERIC: 0.0
1895 20:51:28.158358 GENERIC: 1.0
1896 20:51:28.158442 PCI: 00:1f.3
1897 20:51:28.168087 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1898 20:51:28.178372 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1899 20:51:28.181419 PCI: 00:1f.5
1900 20:51:28.191589 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1901 20:51:28.194772 Done allocating resources.
1902 20:51:28.201146 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2716 ms
1903 20:51:28.204697 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1904 20:51:28.211467 Configure audio over I2S with MAX98373 NAU88L25B.
1905 20:51:28.215191 Enabling BT offload
1906 20:51:28.222645 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1907 20:51:28.226019 Enabling resources...
1908 20:51:28.229537 PCI: 00:00.0 subsystem <- 8086/4609
1909 20:51:28.232399 PCI: 00:00.0 cmd <- 06
1910 20:51:28.236105 PCI: 00:02.0 subsystem <- 8086/46b3
1911 20:51:28.239230 PCI: 00:02.0 cmd <- 03
1912 20:51:28.242782 PCI: 00:04.0 subsystem <- 8086/461d
1913 20:51:28.242863 PCI: 00:04.0 cmd <- 02
1914 20:51:28.245883 PCI: 00:06.0 bridge ctrl <- 0013
1915 20:51:28.249498 PCI: 00:06.0 subsystem <- 8086/464d
1916 20:51:28.252545 PCI: 00:06.0 cmd <- 106
1917 20:51:28.255771 PCI: 00:0a.0 subsystem <- 8086/467d
1918 20:51:28.258962 PCI: 00:0a.0 cmd <- 02
1919 20:51:28.262760 PCI: 00:0d.0 subsystem <- 8086/461e
1920 20:51:28.265906 PCI: 00:0d.0 cmd <- 02
1921 20:51:28.269321 PCI: 00:14.0 subsystem <- 8086/51ed
1922 20:51:28.272432 PCI: 00:14.0 cmd <- 02
1923 20:51:28.275910 PCI: 00:14.2 subsystem <- 8086/51ef
1924 20:51:28.275992 PCI: 00:14.2 cmd <- 02
1925 20:51:28.279043 PCI: 00:14.3 subsystem <- 8086/51f0
1926 20:51:28.282608 PCI: 00:14.3 cmd <- 02
1927 20:51:28.285804 PCI: 00:15.0 subsystem <- 8086/51e8
1928 20:51:28.289010 PCI: 00:15.0 cmd <- 02
1929 20:51:28.292692 PCI: 00:15.1 subsystem <- 8086/51e9
1930 20:51:28.295846 PCI: 00:15.1 cmd <- 06
1931 20:51:28.299426 PCI: 00:15.3 subsystem <- 8086/51eb
1932 20:51:28.302344 PCI: 00:15.3 cmd <- 02
1933 20:51:28.306003 PCI: 00:16.0 subsystem <- 8086/51e0
1934 20:51:28.306083 PCI: 00:16.0 cmd <- 02
1935 20:51:28.308940 PCI: 00:19.1 subsystem <- 8086/51c6
1936 20:51:28.312214 PCI: 00:19.1 cmd <- 02
1937 20:51:28.315905 PCI: 00:1e.0 subsystem <- 8086/51a8
1938 20:51:28.319523 PCI: 00:1e.0 cmd <- 06
1939 20:51:28.322318 PCI: 00:1e.3 subsystem <- 8086/51ab
1940 20:51:28.325614 PCI: 00:1e.3 cmd <- 02
1941 20:51:28.329084 PCI: 00:1f.0 subsystem <- 8086/5182
1942 20:51:28.332657 PCI: 00:1f.0 cmd <- 407
1943 20:51:28.335852 PCI: 00:1f.3 subsystem <- 8086/51c8
1944 20:51:28.335934 PCI: 00:1f.3 cmd <- 02
1945 20:51:28.339028 PCI: 00:1f.5 subsystem <- 8086/51a4
1946 20:51:28.342248 PCI: 00:1f.5 cmd <- 406
1947 20:51:28.346050 PCI: 01:00.0 cmd <- 02
1948 20:51:28.346132 done.
1949 20:51:28.352419 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1950 20:51:28.356115 ME: Version: Unavailable
1951 20:51:28.359082 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1952 20:51:28.362246 Initializing devices...
1953 20:51:28.362326 Root Device init
1954 20:51:28.365990 mainboard: EC init
1955 20:51:28.369011 Chrome EC: Set SMI mask to 0x0000000000000000
1956 20:51:28.374096 Chrome EC: UHEPI supported
1957 20:51:28.381169 Chrome EC: clear events_b mask to 0x0000000000000000
1958 20:51:28.387430 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1959 20:51:28.394243 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1960 20:51:28.397367 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1961 20:51:28.403963 Chrome EC: Set WAKE mask to 0x0000000000000000
1962 20:51:28.407617 Root Device init finished in 40 msecs
1963 20:51:28.410704 PCI: 00:00.0 init
1964 20:51:28.414238 CPU TDP = 15 Watts
1965 20:51:28.414360 CPU PL1 = 15 Watts
1966 20:51:28.417663 CPU PL2 = 55 Watts
1967 20:51:28.417774 CPU PL4 = 123 Watts
1968 20:51:28.424625 PCI: 00:00.0 init finished in 8 msecs
1969 20:51:28.424751 PCI: 00:02.0 init
1970 20:51:28.427277 GMA: Found VBT in CBFS
1971 20:51:28.431047 GMA: Found valid VBT in CBFS
1972 20:51:28.437418 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1973 20:51:28.444368 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1974 20:51:28.447324 PCI: 00:02.0 init finished in 18 msecs
1975 20:51:28.450801 PCI: 00:06.0 init
1976 20:51:28.450912 Initializing PCH PCIe bridge.
1977 20:51:28.457348 PCI: 00:06.0 init finished in 3 msecs
1978 20:51:28.457429 PCI: 00:0a.0 init
1979 20:51:28.460926 PCI: 00:0a.0 init finished in 0 msecs
1980 20:51:28.463960 PCI: 00:14.0 init
1981 20:51:28.467634 PCI: 00:14.0 init finished in 0 msecs
1982 20:51:28.470628 PCI: 00:14.2 init
1983 20:51:28.474323 PCI: 00:14.2 init finished in 0 msecs
1984 20:51:28.474436 PCI: 00:15.0 init
1985 20:51:28.477324 I2C bus 0 version 0x3230302a
1986 20:51:28.480775 DW I2C bus 0 at 0x80655000 (400 KHz)
1987 20:51:28.484426 PCI: 00:15.0 init finished in 6 msecs
1988 20:51:28.487367 PCI: 00:15.1 init
1989 20:51:28.490886 I2C bus 1 version 0x3230302a
1990 20:51:28.494220 DW I2C bus 1 at 0x80656000 (400 KHz)
1991 20:51:28.497362 PCI: 00:15.1 init finished in 6 msecs
1992 20:51:28.501076 PCI: 00:15.3 init
1993 20:51:28.504112 I2C bus 3 version 0x3230302a
1994 20:51:28.507532 DW I2C bus 3 at 0x80657000 (400 KHz)
1995 20:51:28.511150 PCI: 00:15.3 init finished in 6 msecs
1996 20:51:28.511231 PCI: 00:16.0 init
1997 20:51:28.517281 PCI: 00:16.0 init finished in 0 msecs
1998 20:51:28.517363 PCI: 00:19.1 init
1999 20:51:28.520920 I2C bus 5 version 0x3230302a
2000 20:51:28.524217 DW I2C bus 5 at 0x80659000 (400 KHz)
2001 20:51:28.527656 PCI: 00:19.1 init finished in 6 msecs
2002 20:51:28.530567 PCI: 00:1f.0 init
2003 20:51:28.533819 IOAPIC: Initializing IOAPIC at 0xfec00000
2004 20:51:28.537682 IOAPIC: ID = 0x02
2005 20:51:28.537778 IOAPIC: Dumping registers
2006 20:51:28.540794 reg 0x0000: 0x02000000
2007 20:51:28.543851 reg 0x0001: 0x00770020
2008 20:51:28.547606 reg 0x0002: 0x00000000
2009 20:51:28.547687 IOAPIC: 120 interrupts
2010 20:51:28.554484 IOAPIC: Clearing IOAPIC at 0xfec00000
2011 20:51:28.557478 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2012 20:51:28.560986 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2013 20:51:28.567610 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2014 20:51:28.570456 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2015 20:51:28.577446 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2016 20:51:28.580587 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2017 20:51:28.587352 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2018 20:51:28.590999 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2019 20:51:28.597017 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2020 20:51:28.600677 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2021 20:51:28.603672 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2022 20:51:28.610764 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2023 20:51:28.613803 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2024 20:51:28.620492 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2025 20:51:28.623626 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2026 20:51:28.630330 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2027 20:51:28.634048 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2028 20:51:28.640204 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2029 20:51:28.643782 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2030 20:51:28.647143 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2031 20:51:28.653493 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2032 20:51:28.657147 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2033 20:51:28.663890 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2034 20:51:28.667065 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2035 20:51:28.673468 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2036 20:51:28.677150 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2037 20:51:28.680140 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2038 20:51:28.687162 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2039 20:51:28.690051 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2040 20:51:28.696959 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2041 20:51:28.700586 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2042 20:51:28.706931 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2043 20:51:28.710694 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2044 20:51:28.717452 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2045 20:51:28.720150 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2046 20:51:28.723435 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2047 20:51:28.730029 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2048 20:51:28.733692 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2049 20:51:28.739953 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2050 20:51:28.743542 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2051 20:51:28.750395 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2052 20:51:28.753474 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2053 20:51:28.760364 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2054 20:51:28.763417 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2055 20:51:28.767074 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2056 20:51:28.773242 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2057 20:51:28.776725 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2058 20:51:28.783281 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2059 20:51:28.786942 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2060 20:51:28.793734 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2061 20:51:28.796711 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2062 20:51:28.803257 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2063 20:51:28.806903 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2064 20:51:28.809727 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2065 20:51:28.816784 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2066 20:51:28.819763 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2067 20:51:28.826602 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2068 20:51:28.829624 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2069 20:51:28.836803 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2070 20:51:28.839687 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2071 20:51:28.843350 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2072 20:51:28.849887 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2073 20:51:28.852903 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2074 20:51:28.860065 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2075 20:51:28.862911 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2076 20:51:28.869918 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2077 20:51:28.873071 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2078 20:51:28.879686 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2079 20:51:28.883148 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2080 20:51:28.886742 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2081 20:51:28.893327 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2082 20:51:28.896322 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2083 20:51:28.902945 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2084 20:51:28.906449 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2085 20:51:28.912949 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2086 20:51:28.916466 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2087 20:51:28.923085 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2088 20:51:28.926550 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2089 20:51:28.929626 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2090 20:51:28.936217 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2091 20:51:28.940058 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2092 20:51:28.946522 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2093 20:51:28.949741 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2094 20:51:28.956087 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2095 20:51:28.959524 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2096 20:51:28.963089 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2097 20:51:28.969578 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2098 20:51:28.973137 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2099 20:51:28.979395 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2100 20:51:28.982989 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2101 20:51:28.989643 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2102 20:51:28.993065 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2103 20:51:28.999877 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2104 20:51:29.002813 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2105 20:51:29.006565 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2106 20:51:29.012952 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2107 20:51:29.016031 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2108 20:51:29.023247 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2109 20:51:29.026244 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2110 20:51:29.032900 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2111 20:51:29.036663 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2112 20:51:29.042710 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2113 20:51:29.046429 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2114 20:51:29.049540 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2115 20:51:29.056203 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2116 20:51:29.059743 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2117 20:51:29.065951 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2118 20:51:29.069583 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2119 20:51:29.075953 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2120 20:51:29.079444 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2121 20:51:29.083085 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2122 20:51:29.089525 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2123 20:51:29.093067 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2124 20:51:29.099323 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2125 20:51:29.102557 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2126 20:51:29.109344 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2127 20:51:29.113023 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2128 20:51:29.119672 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2129 20:51:29.122616 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2130 20:51:29.125800 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2131 20:51:29.132923 IOAPIC: Bootstrap Processor Local APIC = 0x00
2132 20:51:29.136032 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2133 20:51:29.142958 PCI: 00:1f.0 init finished in 607 msecs
2134 20:51:29.143069 PCI: 00:1f.2 init
2135 20:51:29.145876 apm_control: Disabling ACPI.
2136 20:51:29.150842 APMC done.
2137 20:51:29.154702 PCI: 00:1f.2 init finished in 7 msecs
2138 20:51:29.157983 PCI: 00:1f.3 init
2139 20:51:29.161319 PCI: 00:1f.3 init finished in 0 msecs
2140 20:51:29.161400 PCI: 01:00.0 init
2141 20:51:29.164817 PCI: 01:00.0 init finished in 0 msecs
2142 20:51:29.167994 PNP: 0c09.0 init
2143 20:51:29.171218 Google Chrome EC uptime: 12.031 seconds
2144 20:51:29.177742 Google Chrome AP resets since EC boot: 1
2145 20:51:29.181062 Google Chrome most recent AP reset causes:
2146 20:51:29.184743 0.339: 32775 shutdown: entering G3
2147 20:51:29.191445 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2148 20:51:29.195079 PNP: 0c09.0 init finished in 23 msecs
2149 20:51:29.198110 GENERIC: 0.0 init
2150 20:51:29.200990 GENERIC: 0.0 init finished in 0 msecs
2151 20:51:29.201072 GENERIC: 1.0 init
2152 20:51:29.207897 GENERIC: 1.0 init finished in 0 msecs
2153 20:51:29.207999 Devices initialized
2154 20:51:29.210932 Show all devs... After init.
2155 20:51:29.214294 Root Device: enabled 1
2156 20:51:29.217756 CPU_CLUSTER: 0: enabled 1
2157 20:51:29.217893 DOMAIN: 0000: enabled 1
2158 20:51:29.221058 GPIO: 0: enabled 1
2159 20:51:29.224613 PCI: 00:00.0: enabled 1
2160 20:51:29.224686 PCI: 00:01.0: enabled 0
2161 20:51:29.227538 PCI: 00:01.1: enabled 0
2162 20:51:29.231217 PCI: 00:02.0: enabled 1
2163 20:51:29.234398 PCI: 00:04.0: enabled 1
2164 20:51:29.234471 PCI: 00:05.0: enabled 0
2165 20:51:29.237939 PCI: 00:06.0: enabled 1
2166 20:51:29.240864 PCI: 00:06.2: enabled 0
2167 20:51:29.240935 PCI: 00:07.0: enabled 0
2168 20:51:29.244540 PCI: 00:07.1: enabled 0
2169 20:51:29.247695 PCI: 00:07.2: enabled 0
2170 20:51:29.251341 PCI: 00:07.3: enabled 0
2171 20:51:29.251411 PCI: 00:08.0: enabled 0
2172 20:51:29.254294 PCI: 00:09.0: enabled 0
2173 20:51:29.257367 PCI: 00:0a.0: enabled 1
2174 20:51:29.261192 PCI: 00:0d.0: enabled 1
2175 20:51:29.261265 PCI: 00:0d.1: enabled 0
2176 20:51:29.264156 PCI: 00:0d.2: enabled 0
2177 20:51:29.267681 PCI: 00:0d.3: enabled 0
2178 20:51:29.271326 PCI: 00:0e.0: enabled 0
2179 20:51:29.271406 PCI: 00:10.0: enabled 0
2180 20:51:29.274286 PCI: 00:10.1: enabled 0
2181 20:51:29.277982 PCI: 00:10.6: enabled 0
2182 20:51:29.278062 PCI: 00:10.7: enabled 0
2183 20:51:29.280993 PCI: 00:12.0: enabled 0
2184 20:51:29.284376 PCI: 00:12.6: enabled 0
2185 20:51:29.287796 PCI: 00:12.7: enabled 0
2186 20:51:29.287876 PCI: 00:13.0: enabled 0
2187 20:51:29.290818 PCI: 00:14.0: enabled 1
2188 20:51:29.294275 PCI: 00:14.1: enabled 0
2189 20:51:29.297650 PCI: 00:14.2: enabled 1
2190 20:51:29.297730 PCI: 00:14.3: enabled 1
2191 20:51:29.301139 PCI: 00:15.0: enabled 1
2192 20:51:29.304381 PCI: 00:15.1: enabled 1
2193 20:51:29.307604 PCI: 00:15.2: enabled 0
2194 20:51:29.307704 PCI: 00:15.3: enabled 1
2195 20:51:29.311197 PCI: 00:16.0: enabled 1
2196 20:51:29.314098 PCI: 00:16.1: enabled 0
2197 20:51:29.314174 PCI: 00:16.2: enabled 0
2198 20:51:29.317598 PCI: 00:16.3: enabled 0
2199 20:51:29.320878 PCI: 00:16.4: enabled 0
2200 20:51:29.324128 PCI: 00:16.5: enabled 0
2201 20:51:29.324209 PCI: 00:17.0: enabled 0
2202 20:51:29.327538 PCI: 00:19.0: enabled 0
2203 20:51:29.331027 PCI: 00:19.1: enabled 1
2204 20:51:29.334662 PCI: 00:19.2: enabled 0
2205 20:51:29.334743 PCI: 00:1a.0: enabled 0
2206 20:51:29.337659 PCI: 00:1c.0: enabled 0
2207 20:51:29.340718 PCI: 00:1c.1: enabled 0
2208 20:51:29.344317 PCI: 00:1c.2: enabled 0
2209 20:51:29.344397 PCI: 00:1c.3: enabled 0
2210 20:51:29.347449 PCI: 00:1c.4: enabled 0
2211 20:51:29.350932 PCI: 00:1c.5: enabled 0
2212 20:51:29.351012 PCI: 00:1c.6: enabled 0
2213 20:51:29.354047 PCI: 00:1c.7: enabled 0
2214 20:51:29.357169 PCI: 00:1d.0: enabled 0
2215 20:51:29.360621 PCI: 00:1d.1: enabled 0
2216 20:51:29.360702 PCI: 00:1d.2: enabled 0
2217 20:51:29.364384 PCI: 00:1d.3: enabled 0
2218 20:51:29.367392 PCI: 00:1e.0: enabled 1
2219 20:51:29.371213 PCI: 00:1e.1: enabled 0
2220 20:51:29.371294 PCI: 00:1e.2: enabled 0
2221 20:51:29.373946 PCI: 00:1e.3: enabled 1
2222 20:51:29.377663 PCI: 00:1f.0: enabled 1
2223 20:51:29.380770 PCI: 00:1f.1: enabled 0
2224 20:51:29.380850 PCI: 00:1f.2: enabled 1
2225 20:51:29.383907 PCI: 00:1f.3: enabled 1
2226 20:51:29.387707 PCI: 00:1f.4: enabled 0
2227 20:51:29.390596 PCI: 00:1f.5: enabled 1
2228 20:51:29.390676 PCI: 00:1f.6: enabled 0
2229 20:51:29.394104 PCI: 00:1f.7: enabled 0
2230 20:51:29.397524 GENERIC: 0.0: enabled 1
2231 20:51:29.400449 GENERIC: 0.0: enabled 1
2232 20:51:29.400529 GENERIC: 1.0: enabled 1
2233 20:51:29.404200 GENERIC: 0.0: enabled 1
2234 20:51:29.407325 GENERIC: 1.0: enabled 1
2235 20:51:29.407406 USB0 port 0: enabled 1
2236 20:51:29.410575 USB0 port 0: enabled 1
2237 20:51:29.413854 GENERIC: 0.0: enabled 1
2238 20:51:29.417370 I2C: 00:1a: enabled 1
2239 20:51:29.417450 I2C: 00:31: enabled 1
2240 20:51:29.420835 I2C: 00:32: enabled 1
2241 20:51:29.423737 I2C: 00:50: enabled 1
2242 20:51:29.423820 I2C: 00:10: enabled 1
2243 20:51:29.427432 I2C: 00:15: enabled 1
2244 20:51:29.430337 I2C: 00:2c: enabled 1
2245 20:51:29.430419 GENERIC: 0.0: enabled 1
2246 20:51:29.433931 SPI: 00: enabled 1
2247 20:51:29.436938 PNP: 0c09.0: enabled 1
2248 20:51:29.437019 GENERIC: 0.0: enabled 1
2249 20:51:29.440804 USB3 port 0: enabled 1
2250 20:51:29.443782 USB3 port 1: enabled 0
2251 20:51:29.443863 USB3 port 2: enabled 1
2252 20:51:29.447003 USB3 port 3: enabled 0
2253 20:51:29.450536 USB2 port 0: enabled 1
2254 20:51:29.454049 USB2 port 1: enabled 0
2255 20:51:29.454131 USB2 port 2: enabled 1
2256 20:51:29.457010 USB2 port 3: enabled 0
2257 20:51:29.460094 USB2 port 4: enabled 0
2258 20:51:29.460175 USB2 port 5: enabled 1
2259 20:51:29.463559 USB2 port 6: enabled 0
2260 20:51:29.467174 USB2 port 7: enabled 0
2261 20:51:29.470213 USB2 port 8: enabled 1
2262 20:51:29.470294 USB2 port 9: enabled 1
2263 20:51:29.473806 USB3 port 0: enabled 1
2264 20:51:29.476949 USB3 port 1: enabled 0
2265 20:51:29.477029 USB3 port 2: enabled 0
2266 20:51:29.480519 USB3 port 3: enabled 0
2267 20:51:29.483647 GENERIC: 0.0: enabled 1
2268 20:51:29.486912 GENERIC: 1.0: enabled 1
2269 20:51:29.486998 APIC: 00: enabled 1
2270 20:51:29.490379 APIC: 12: enabled 1
2271 20:51:29.490471 APIC: 14: enabled 1
2272 20:51:29.494078 APIC: 16: enabled 1
2273 20:51:29.497307 APIC: 10: enabled 1
2274 20:51:29.497482 APIC: 09: enabled 1
2275 20:51:29.500513 APIC: 08: enabled 1
2276 20:51:29.500645 APIC: 01: enabled 1
2277 20:51:29.503543 PCI: 01:00.0: enabled 1
2278 20:51:29.510393 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2279 20:51:29.513860 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2280 20:51:29.516948 ELOG: NV offset 0xf20000 size 0x4000
2281 20:51:29.525259 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2282 20:51:29.532709 ELOG: Event(17) added with size 13 at 2024-03-12 20:51:29 UTC
2283 20:51:29.539176 ELOG: Event(9E) added with size 10 at 2024-03-12 20:51:29 UTC
2284 20:51:29.545931 ELOG: Event(9F) added with size 14 at 2024-03-12 20:51:29 UTC
2285 20:51:29.552565 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2286 20:51:29.559032 ELOG: Event(A0) added with size 9 at 2024-03-12 20:51:29 UTC
2287 20:51:29.562667 elog_add_boot_reason: Logged dev mode boot
2288 20:51:29.569673 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2289 20:51:29.570223 Finalize devices...
2290 20:51:29.572605 PCI: 00:16.0 final
2291 20:51:29.576068 PCI: 00:1f.2 final
2292 20:51:29.576524 GENERIC: 0.0 final
2293 20:51:29.583003 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2294 20:51:29.585943 GENERIC: 1.0 final
2295 20:51:29.589030 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2296 20:51:29.592617 Devices finalized
2297 20:51:29.599383 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2298 20:51:29.602389 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2299 20:51:29.609088 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2300 20:51:29.612904 ME: HFSTS1 : 0x90000245
2301 20:51:29.618987 ME: HFSTS2 : 0x82100116
2302 20:51:29.622576 ME: HFSTS3 : 0x00000050
2303 20:51:29.625739 ME: HFSTS4 : 0x00004000
2304 20:51:29.633039 ME: HFSTS5 : 0x00000000
2305 20:51:29.635919 ME: HFSTS6 : 0x40600006
2306 20:51:29.639094 ME: Manufacturing Mode : NO
2307 20:51:29.642734 ME: SPI Protection Mode Enabled : YES
2308 20:51:29.649303 ME: FPFs Committed : YES
2309 20:51:29.652380 ME: Manufacturing Vars Locked : YES
2310 20:51:29.655667 ME: FW Partition Table : OK
2311 20:51:29.658884 ME: Bringup Loader Failure : NO
2312 20:51:29.662457 ME: Firmware Init Complete : YES
2313 20:51:29.665585 ME: Boot Options Present : NO
2314 20:51:29.669096 ME: Update In Progress : NO
2315 20:51:29.672470 ME: D0i3 Support : YES
2316 20:51:29.678958 ME: Low Power State Enabled : NO
2317 20:51:29.682437 ME: CPU Replaced : YES
2318 20:51:29.685809 ME: CPU Replacement Valid : YES
2319 20:51:29.688916 ME: Current Working State : 5
2320 20:51:29.692123 ME: Current Operation State : 1
2321 20:51:29.695924 ME: Current Operation Mode : 0
2322 20:51:29.698702 ME: Error Code : 0
2323 20:51:29.702327 ME: Enhanced Debug Mode : NO
2324 20:51:29.705967 ME: CPU Debug Disabled : YES
2325 20:51:29.712645 ME: TXT Support : NO
2326 20:51:29.715723 ME: WP for RO is enabled : YES
2327 20:51:29.719162 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2328 20:51:29.725809 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2329 20:51:29.728796 Ramoops buffer: 0x100000@0x76899000.
2330 20:51:29.735986 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2331 20:51:29.742793 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2332 20:51:29.745783 CBFS: 'fallback/slic' not found.
2333 20:51:29.752500 ACPI: Writing ACPI tables at 7686d000.
2334 20:51:29.752962 ACPI: * FACS
2335 20:51:29.755392 ACPI: * DSDT
2336 20:51:29.762530 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2337 20:51:29.765586 ACPI: * FADT
2338 20:51:29.766141 SCI is IRQ9
2339 20:51:29.768942 ACPI: added table 1/32, length now 40
2340 20:51:29.772539 ACPI: * SSDT
2341 20:51:29.775411 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2342 20:51:29.782586 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2343 20:51:29.785940 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2344 20:51:29.789559 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2345 20:51:29.795586 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2346 20:51:29.802605 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2347 20:51:29.808947 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2348 20:51:29.812293 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2349 20:51:29.818825 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2350 20:51:29.822586 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2351 20:51:29.829119 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2352 20:51:29.832164 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2353 20:51:29.839236 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2354 20:51:29.842191 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2355 20:51:29.850846 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2356 20:51:29.854157 PS2K: Passing 80 keymaps to kernel
2357 20:51:29.860763 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2358 20:51:29.867522 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2359 20:51:29.874101 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2360 20:51:29.880662 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2361 20:51:29.887212 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2362 20:51:29.891087 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2363 20:51:29.897352 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2364 20:51:29.903912 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2365 20:51:29.910955 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2366 20:51:29.917638 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2367 20:51:29.920825 ACPI: added table 2/32, length now 44
2368 20:51:29.924072 ACPI: * MCFG
2369 20:51:29.927189 ACPI: added table 3/32, length now 48
2370 20:51:29.927271 ACPI: * TPM2
2371 20:51:29.930680 TPM2 log created at 0x7685d000
2372 20:51:29.933947 ACPI: added table 4/32, length now 52
2373 20:51:29.937698 ACPI: * LPIT
2374 20:51:29.940669 ACPI: added table 5/32, length now 56
2375 20:51:29.944111 ACPI: * MADT
2376 20:51:29.944193 SCI is IRQ9
2377 20:51:29.947287 ACPI: added table 6/32, length now 60
2378 20:51:29.950634 cmd_reg from pmc_make_ipc_cmd 1052838
2379 20:51:29.957300 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2380 20:51:29.964145 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2381 20:51:29.970526 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2382 20:51:29.973989 PMC CrashLog size in discovery mode: 0xC00
2383 20:51:29.977085 cpu crashlog bar addr: 0x80640000
2384 20:51:29.980667 cpu discovery table offset: 0x6030
2385 20:51:29.987415 cpu_crashlog_discovery_table buffer count: 0x3
2386 20:51:29.993988 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2387 20:51:30.000580 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2388 20:51:30.007388 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2389 20:51:30.010438 PMC crashLog size in discovery mode : 0xC00
2390 20:51:30.017118 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2391 20:51:30.020308 discover mode PMC crashlog size adjusted to: 0x200
2392 20:51:30.027067 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2393 20:51:30.033874 discover mode PMC crashlog size adjusted to: 0x0
2394 20:51:30.037483 m_cpu_crashLog_size : 0x3480 bytes
2395 20:51:30.040631 CPU crashLog present.
2396 20:51:30.043944 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2397 20:51:30.050155 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2398 20:51:30.053601 current = 76876550
2399 20:51:30.053682 ACPI: * DMAR
2400 20:51:30.060249 ACPI: added table 7/32, length now 64
2401 20:51:30.063544 ACPI: added table 8/32, length now 68
2402 20:51:30.063626 ACPI: * HPET
2403 20:51:30.066949 ACPI: added table 9/32, length now 72
2404 20:51:30.070734 ACPI: done.
2405 20:51:30.073708 ACPI tables: 38528 bytes.
2406 20:51:30.077471 smbios_write_tables: 76857000
2407 20:51:30.080504 EC returned error result code 3
2408 20:51:30.084038 Couldn't obtain OEM name from CBI
2409 20:51:30.087235 Create SMBIOS type 16
2410 20:51:30.087317 Create SMBIOS type 17
2411 20:51:30.090704 Create SMBIOS type 20
2412 20:51:30.093747 GENERIC: 0.0 (WIFI Device)
2413 20:51:30.097376 SMBIOS tables: 2156 bytes.
2414 20:51:30.100360 Writing table forward entry at 0x00000500
2415 20:51:30.107261 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2416 20:51:30.110434 Writing coreboot table at 0x76891000
2417 20:51:30.117420 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2418 20:51:30.120607 1. 0000000000001000-000000000009ffff: RAM
2419 20:51:30.123754 2. 00000000000a0000-00000000000fffff: RESERVED
2420 20:51:30.130434 3. 0000000000100000-0000000076856fff: RAM
2421 20:51:30.134264 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2422 20:51:30.140624 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2423 20:51:30.147091 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2424 20:51:30.150742 7. 0000000077000000-00000000803fffff: RESERVED
2425 20:51:30.156810 8. 00000000c0000000-00000000cfffffff: RESERVED
2426 20:51:30.160813 9. 00000000f8000000-00000000f9ffffff: RESERVED
2427 20:51:30.163687 10. 00000000fb000000-00000000fb000fff: RESERVED
2428 20:51:30.170835 11. 00000000fc800000-00000000fe7fffff: RESERVED
2429 20:51:30.173908 12. 00000000feb00000-00000000feb7ffff: RESERVED
2430 20:51:30.180892 13. 00000000fec00000-00000000fecfffff: RESERVED
2431 20:51:30.184143 14. 00000000fed40000-00000000fed6ffff: RESERVED
2432 20:51:30.190787 15. 00000000fed80000-00000000fed87fff: RESERVED
2433 20:51:30.193813 16. 00000000fed90000-00000000fed92fff: RESERVED
2434 20:51:30.197401 17. 00000000feda0000-00000000feda1fff: RESERVED
2435 20:51:30.204145 18. 00000000fedc0000-00000000feddffff: RESERVED
2436 20:51:30.207253 19. 0000000100000000-000000027fbfffff: RAM
2437 20:51:30.210844 Passing 4 GPIOs to payload:
2438 20:51:30.217638 NAME | PORT | POLARITY | VALUE
2439 20:51:30.221105 lid | undefined | high | high
2440 20:51:30.227823 power | undefined | high | low
2441 20:51:30.230941 oprom | undefined | high | low
2442 20:51:30.237565 EC in RW | 0x00000151 | high | high
2443 20:51:30.238141 Board ID: 3
2444 20:51:30.241110 FW config: 0x131
2445 20:51:30.247688 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2446 20:51:30.250680 coreboot table: 1788 bytes.
2447 20:51:30.254174 IMD ROOT 0. 0x76fff000 0x00001000
2448 20:51:30.257678 IMD SMALL 1. 0x76ffe000 0x00001000
2449 20:51:30.260612 FSP MEMORY 2. 0x76afe000 0x00500000
2450 20:51:30.264245 CONSOLE 3. 0x76ade000 0x00020000
2451 20:51:30.267806 RW MCACHE 4. 0x76add000 0x0000043c
2452 20:51:30.270771 RO MCACHE 5. 0x76adc000 0x00000fd8
2453 20:51:30.274321 FMAP 6. 0x76adb000 0x0000064a
2454 20:51:30.281084 TIME STAMP 7. 0x76ada000 0x00000910
2455 20:51:30.284147 VBOOT WORK 8. 0x76ac6000 0x00014000
2456 20:51:30.287516 MEM INFO 9. 0x76ac5000 0x000003b8
2457 20:51:30.290542 ROMSTG STCK10. 0x76ac4000 0x00001000
2458 20:51:30.294397 AFTER CAR 11. 0x76ab8000 0x0000c000
2459 20:51:30.297410 RAMSTAGE 12. 0x76a2e000 0x0008a000
2460 20:51:30.300577 ACPI BERT 13. 0x76a1e000 0x00010000
2461 20:51:30.303903 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2462 20:51:30.310547 REFCODE 15. 0x769ae000 0x0006f000
2463 20:51:30.314308 SMM BACKUP 16. 0x7699e000 0x00010000
2464 20:51:30.317332 IGD OPREGION17. 0x76999000 0x00004203
2465 20:51:30.320886 RAMOOPS 18. 0x76899000 0x00100000
2466 20:51:30.324062 COREBOOT 19. 0x76891000 0x00008000
2467 20:51:30.327509 ACPI 20. 0x7686d000 0x00024000
2468 20:51:30.330649 TPM2 TCGLOG21. 0x7685d000 0x00010000
2469 20:51:30.334294 PMC CRASHLOG22. 0x7685c000 0x00000c00
2470 20:51:30.340845 CPU CRASHLOG23. 0x76858000 0x00003480
2471 20:51:30.344045 SMBIOS 24. 0x76857000 0x00001000
2472 20:51:30.344506 IMD small region:
2473 20:51:30.347354 IMD ROOT 0. 0x76ffec00 0x00000400
2474 20:51:30.354038 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2475 20:51:30.357787 VPD 2. 0x76ffeb60 0x0000006c
2476 20:51:30.360911 POWER STATE 3. 0x76ffeb00 0x00000044
2477 20:51:30.364142 ROMSTAGE 4. 0x76ffeae0 0x00000004
2478 20:51:30.367856 ACPI GNVS 5. 0x76ffea80 0x00000048
2479 20:51:30.370976 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2480 20:51:30.377411 BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms
2481 20:51:30.381027 MTRR: Physical address space:
2482 20:51:30.387130 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2483 20:51:30.394151 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2484 20:51:30.400746 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2485 20:51:30.407633 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2486 20:51:30.413747 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2487 20:51:30.417580 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2488 20:51:30.423690 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2489 20:51:30.430874 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 20:51:30.433658 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 20:51:30.437395 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 20:51:30.440593 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 20:51:30.448293 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 20:51:30.450589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 20:51:30.453969 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 20:51:30.457118 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 20:51:30.463469 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 20:51:30.467168 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 20:51:30.470342 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 20:51:30.473478 call enable_fixed_mtrr()
2501 20:51:30.476833 CPU physical address size: 39 bits
2502 20:51:30.484031 MTRR: default type WB/UC MTRR counts: 6/6.
2503 20:51:30.486562 MTRR: UC selected as default type.
2504 20:51:30.493359 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2505 20:51:30.496902 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2506 20:51:30.503808 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2507 20:51:30.510002 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2508 20:51:30.517015 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2509 20:51:30.523573 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2510 20:51:30.529747 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 20:51:30.533437 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 20:51:30.536348 MTRR: Fixed MSR 0x259 0x0000000000000000
2513 20:51:30.539892 MTRR: Fixed MSR 0x268 0x0606060606060606
2514 20:51:30.546202 MTRR: Fixed MSR 0x269 0x0606060606060606
2515 20:51:30.549967 MTRR: Fixed MSR 0x26a 0x0606060606060606
2516 20:51:30.552920 MTRR: Fixed MSR 0x26b 0x0606060606060606
2517 20:51:30.556573 MTRR: Fixed MSR 0x26c 0x0606060606060606
2518 20:51:30.563511 MTRR: Fixed MSR 0x26d 0x0606060606060606
2519 20:51:30.566165 MTRR: Fixed MSR 0x26e 0x0606060606060606
2520 20:51:30.569917 MTRR: Fixed MSR 0x26f 0x0606060606060606
2521 20:51:30.573024 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 20:51:30.576305 call enable_fixed_mtrr()
2523 20:51:30.579856 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 20:51:30.586442 MTRR: Fixed MSR 0x250 0x0606060606060606
2525 20:51:30.589958 MTRR: Fixed MSR 0x250 0x0606060606060606
2526 20:51:30.592710 CPU physical address size: 39 bits
2527 20:51:30.596125 MTRR: Fixed MSR 0x258 0x0606060606060606
2528 20:51:30.599306 MTRR: Fixed MSR 0x258 0x0606060606060606
2529 20:51:30.605944 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 20:51:30.609627 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 20:51:30.613131 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 20:51:30.616004 MTRR: Fixed MSR 0x26a 0x0606060606060606
2533 20:51:30.622749 MTRR: Fixed MSR 0x26b 0x0606060606060606
2534 20:51:30.626038 MTRR: Fixed MSR 0x26c 0x0606060606060606
2535 20:51:30.629005 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 20:51:30.632498 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 20:51:30.639361 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 20:51:30.642695 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 20:51:30.645614 call enable_fixed_mtrr()
2540 20:51:30.649365 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 20:51:30.652553 MTRR: Fixed MSR 0x250 0x0606060606060606
2542 20:51:30.655564 CPU physical address size: 39 bits
2543 20:51:30.659131 MTRR: Fixed MSR 0x250 0x0606060606060606
2544 20:51:30.665794 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 20:51:30.668879 MTRR: Fixed MSR 0x258 0x0606060606060606
2546 20:51:30.672668 MTRR: Fixed MSR 0x268 0x0606060606060606
2547 20:51:30.676017 MTRR: Fixed MSR 0x269 0x0606060606060606
2548 20:51:30.678986 MTRR: Fixed MSR 0x26a 0x0606060606060606
2549 20:51:30.685898 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 20:51:30.689304 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 20:51:30.692855 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 20:51:30.695726 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 20:51:30.702947 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 20:51:30.706348 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 20:51:30.709583 call enable_fixed_mtrr()
2556 20:51:30.712844 MTRR: Fixed MSR 0x259 0x0000000000000000
2557 20:51:30.716342 MTRR: Fixed MSR 0x268 0x0606060606060606
2558 20:51:30.719317 MTRR: Fixed MSR 0x269 0x0606060606060606
2559 20:51:30.722873 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 20:51:30.729471 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 20:51:30.732895 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 20:51:30.735825 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 20:51:30.739247 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 20:51:30.746004 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 20:51:30.749060 MTRR: Fixed MSR 0x259 0x0000000000000000
2566 20:51:30.752833 call enable_fixed_mtrr()
2567 20:51:30.755966 MTRR: Fixed MSR 0x258 0x0606060606060606
2568 20:51:30.758980 MTRR: Fixed MSR 0x259 0x0000000000000000
2569 20:51:30.762632 MTRR: Fixed MSR 0x268 0x0606060606060606
2570 20:51:30.769294 MTRR: Fixed MSR 0x269 0x0606060606060606
2571 20:51:30.772297 MTRR: Fixed MSR 0x26a 0x0606060606060606
2572 20:51:30.776104 MTRR: Fixed MSR 0x26b 0x0606060606060606
2573 20:51:30.779127 MTRR: Fixed MSR 0x26c 0x0606060606060606
2574 20:51:30.785961 MTRR: Fixed MSR 0x26d 0x0606060606060606
2575 20:51:30.788836 MTRR: Fixed MSR 0x26e 0x0606060606060606
2576 20:51:30.792293 MTRR: Fixed MSR 0x26f 0x0606060606060606
2577 20:51:30.795743 CPU physical address size: 39 bits
2578 20:51:30.798761 call enable_fixed_mtrr()
2579 20:51:30.802468 CPU physical address size: 39 bits
2580 20:51:30.805551 CPU physical address size: 39 bits
2581 20:51:30.809036 MTRR: Fixed MSR 0x268 0x0606060606060606
2582 20:51:30.812056 MTRR: Fixed MSR 0x268 0x0606060606060606
2583 20:51:30.819247 MTRR: Fixed MSR 0x269 0x0606060606060606
2584 20:51:30.822171 MTRR: Fixed MSR 0x26a 0x0606060606060606
2585 20:51:30.825878 MTRR: Fixed MSR 0x26b 0x0606060606060606
2586 20:51:30.828796 MTRR: Fixed MSR 0x26c 0x0606060606060606
2587 20:51:30.835411 MTRR: Fixed MSR 0x26d 0x0606060606060606
2588 20:51:30.838635 MTRR: Fixed MSR 0x26e 0x0606060606060606
2589 20:51:30.842067 MTRR: Fixed MSR 0x26f 0x0606060606060606
2590 20:51:30.845301 MTRR: Fixed MSR 0x269 0x0606060606060606
2591 20:51:30.848636 call enable_fixed_mtrr()
2592 20:51:30.852098 MTRR: Fixed MSR 0x26a 0x0606060606060606
2593 20:51:30.858904 MTRR: Fixed MSR 0x26b 0x0606060606060606
2594 20:51:30.862250 MTRR: Fixed MSR 0x26c 0x0606060606060606
2595 20:51:30.865699 MTRR: Fixed MSR 0x26d 0x0606060606060606
2596 20:51:30.868466 MTRR: Fixed MSR 0x26e 0x0606060606060606
2597 20:51:30.872231 MTRR: Fixed MSR 0x26f 0x0606060606060606
2598 20:51:30.879006 CPU physical address size: 39 bits
2599 20:51:30.879588 call enable_fixed_mtrr()
2600 20:51:30.881916 CPU physical address size: 39 bits
2601 20:51:30.886703
2602 20:51:30.887165 MTRR check
2603 20:51:30.889910 Fixed MTRRs : Enabled
2604 20:51:30.890384 Variable MTRRs: Enabled
2605 20:51:30.890763
2606 20:51:30.896790 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2607 20:51:30.900080 Checking cr50 for pending updates
2608 20:51:30.912249 Reading cr50 TPM mode
2609 20:51:30.927260 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2610 20:51:30.937602 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2611 20:51:30.940737 Checking segment from ROM address 0xf96cbe6c
2612 20:51:30.944028 Checking segment from ROM address 0xf96cbe88
2613 20:51:30.950810 Loading segment from ROM address 0xf96cbe6c
2614 20:51:30.951326 code (compression=1)
2615 20:51:30.960704 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2616 20:51:30.967563 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2617 20:51:30.971152 using LZMA
2618 20:51:30.993224 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2619 20:51:30.999944 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2620 20:51:31.008003 Loading segment from ROM address 0xf96cbe88
2621 20:51:31.011643 Entry Point 0x30000000
2622 20:51:31.012318 Loaded segments
2623 20:51:31.018580 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2624 20:51:31.025079 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2625 20:51:31.028337 Finalizing chipset.
2626 20:51:31.028817 apm_control: Finalizing SMM.
2627 20:51:31.031573 APMC done.
2628 20:51:31.034550 HECI: CSE device 16.1 is disabled
2629 20:51:31.038337 HECI: CSE device 16.2 is disabled
2630 20:51:31.041532 HECI: CSE device 16.3 is disabled
2631 20:51:31.044512 HECI: CSE device 16.4 is disabled
2632 20:51:31.048408 HECI: CSE device 16.5 is disabled
2633 20:51:31.051221 HECI: Sending End-of-Post
2634 20:51:31.059436 CSE: EOP requested action: continue boot
2635 20:51:31.062944 CSE EOP successful, continuing boot
2636 20:51:31.069243 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2637 20:51:31.072919 mp_park_aps done after 0 msecs.
2638 20:51:31.076367 Jumping to boot code at 0x30000000(0x76891000)
2639 20:51:31.086355 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2640 20:51:31.089981
2641 20:51:31.090450
2642 20:51:31.090808
2643 20:51:31.093963 Starting depthcharge on Volmar...
2644 20:51:31.094425
2645 20:51:31.096489 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2646 20:51:31.097043 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2647 20:51:31.097490 Setting prompt string to ['brya:']
2648 20:51:31.097967 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2649 20:51:31.100029 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2650 20:51:31.100457
2651 20:51:31.106637 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2652 20:51:31.107123
2653 20:51:31.113210 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2654 20:51:31.113771
2655 20:51:31.116880 configure_storage: Failed to remap 1C:2
2656 20:51:31.117359
2657 20:51:31.119896 Wipe memory regions:
2658 20:51:31.120348
2659 20:51:31.123333 [0x00000000001000, 0x000000000a0000)
2660 20:51:31.123789
2661 20:51:31.126867 [0x00000000100000, 0x00000030000000)
2662 20:51:31.234560
2663 20:51:31.237606 [0x00000032668e60, 0x00000076857000)
2664 20:51:31.389180
2665 20:51:31.392251 [0x00000100000000, 0x0000027fc00000)
2666 20:51:32.236055
2667 20:51:32.239351 ec_init: CrosEC protocol v3 supported (256, 256)
2668 20:51:32.848127
2669 20:51:32.848612 R8152: Initializing
2670 20:51:32.848944
2671 20:51:32.851974 Version 9 (ocp_data = 6010)
2672 20:51:32.852436
2673 20:51:32.854816 R8152: Done initializing
2674 20:51:32.855252
2675 20:51:32.858397 Adding net device
2676 20:51:33.158833
2677 20:51:33.162123 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2678 20:51:33.162223
2679 20:51:33.162300
2680 20:51:33.162377
2681 20:51:33.162684 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2683 20:51:33.263087 brya: tftpboot 192.168.201.1 13035056/tftp-deploy-oupemtey/kernel/bzImage 13035056/tftp-deploy-oupemtey/kernel/cmdline 13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
2684 20:51:33.263279 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2685 20:51:33.263405 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2686 20:51:33.268049 tftpboot 192.168.201.1 13035056/tftp-deploy-oupemtey/kernel/bzIploy-oupemtey/kernel/cmdline 13035056/tftp-deploy-oupemtey/ramdisk/ramdisk.cpio.gz
2687 20:51:33.268158
2688 20:51:33.268259 Waiting for link
2689 20:51:33.470676
2690 20:51:33.470809 done.
2691 20:51:33.470914
2692 20:51:33.471004 MAC: 00:e0:4c:68:02:37
2693 20:51:33.471092
2694 20:51:33.474451 Sending DHCP discover... done.
2695 20:51:33.474547
2696 20:51:33.477550 Waiting for reply... done.
2697 20:51:33.477637
2698 20:51:33.481094 Sending DHCP request... done.
2699 20:51:33.481190
2700 20:51:33.547526 Waiting for reply... done.
2701 20:51:33.547754
2702 20:51:33.547894 My ip is 192.168.201.15
2703 20:51:33.548020
2704 20:51:33.550543 The DHCP server ip is 192.168.201.1
2705 20:51:33.553858
2706 20:51:33.557229 TFTP server IP predefined by user: 192.168.201.1
2707 20:51:33.557403
2708 20:51:33.564407 Bootfile predefined by user: 13035056/tftp-deploy-oupemtey/kernel/bzImage
2709 20:51:33.564581
2710 20:51:33.567212 Sending tftp read request... done.
2711 20:51:33.567389
2712 20:51:33.574330 Waiting for the transfer...
2713 20:51:33.574467
2714 20:51:33.845646 00000000 ################################################################
2715 20:51:33.845806
2716 20:51:34.109158 00080000 ################################################################
2717 20:51:34.109294
2718 20:51:34.384430 00100000 ################################################################
2719 20:51:34.384563
2720 20:51:34.662404 00180000 ################################################################
2721 20:51:34.662539
2722 20:51:34.937680 00200000 ################################################################
2723 20:51:34.937846
2724 20:51:35.208167 00280000 ################################################################
2725 20:51:35.208296
2726 20:51:35.482413 00300000 ################################################################
2727 20:51:35.482548
2728 20:51:35.762116 00380000 ################################################################
2729 20:51:35.762250
2730 20:51:36.042339 00400000 ################################################################
2731 20:51:36.042469
2732 20:51:36.314749 00480000 ################################################################
2733 20:51:36.314909
2734 20:51:36.574835 00500000 ################################################################
2735 20:51:36.574994
2736 20:51:36.843609 00580000 ################################################################
2737 20:51:36.843744
2738 20:51:37.127512 00600000 ################################################################
2739 20:51:37.127664
2740 20:51:37.378935 00680000 ################################################################
2741 20:51:37.379094
2742 20:51:37.643075 00700000 ################################################################
2743 20:51:37.643259
2744 20:51:37.904312 00780000 ################################################################
2745 20:51:37.904440
2746 20:51:38.170528 00800000 ################################################################
2747 20:51:38.170656
2748 20:51:38.401217 00880000 ######################################################## done.
2749 20:51:38.401348
2750 20:51:38.404134 The bootfile was 9367440 bytes long.
2751 20:51:38.404221
2752 20:51:38.407659 Sending tftp read request... done.
2753 20:51:38.407742
2754 20:51:38.410968 Waiting for the transfer...
2755 20:51:38.411049
2756 20:51:38.690339 00000000 ################################################################
2757 20:51:38.690471
2758 20:51:38.958662 00080000 ################################################################
2759 20:51:38.958797
2760 20:51:39.229914 00100000 ################################################################
2761 20:51:39.230042
2762 20:51:39.507888 00180000 ################################################################
2763 20:51:39.508019
2764 20:51:39.786107 00200000 ################################################################
2765 20:51:39.786239
2766 20:51:40.066873 00280000 ################################################################
2767 20:51:40.067002
2768 20:51:40.315844 00300000 ################################################################
2769 20:51:40.315971
2770 20:51:40.581289 00380000 ################################################################
2771 20:51:40.581417
2772 20:51:40.830437 00400000 ################################################################
2773 20:51:40.830569
2774 20:51:41.091680 00480000 ################################################################
2775 20:51:41.091816
2776 20:51:41.349805 00500000 ############################################################### done.
2777 20:51:41.350391
2778 20:51:41.352834 Sending tftp read request... done.
2779 20:51:41.353305
2780 20:51:41.356150 Waiting for the transfer...
2781 20:51:41.356625
2782 20:51:41.357107 00000000 # done.
2783 20:51:41.357574
2784 20:51:41.365978 Command line loaded dynamically from TFTP file: 13035056/tftp-deploy-oupemtey/kernel/cmdline
2785 20:51:41.366517
2786 20:51:41.392768 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13035056/extract-nfsrootfs-rrezjf1b,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2787 20:51:41.397781
2788 20:51:41.401202 Shutting down all USB controllers.
2789 20:51:41.401674
2790 20:51:41.402194 Removing current net device
2791 20:51:41.402653
2792 20:51:41.404245 Finalizing coreboot
2793 20:51:41.404678
2794 20:51:41.410722 Exiting depthcharge with code 4 at timestamp: 20568039
2795 20:51:41.411195
2796 20:51:41.411677
2797 20:51:41.412130 Starting kernel ...
2798 20:51:41.412572
2799 20:51:41.413008
2800 20:51:41.414392 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2801 20:51:41.414974 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2802 20:51:41.415434 Setting prompt string to ['Linux version [0-9]']
2803 20:51:41.416024 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2804 20:51:41.416489 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2806 20:56:11.415901 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2808 20:56:11.417676 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2810 20:56:11.419114 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2813 20:56:11.420510 end: 2 depthcharge-action (duration 00:05:00) [common]
2815 20:56:11.420732 Cleaning after the job
2816 20:56:11.420822 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/ramdisk
2817 20:56:11.421747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/kernel
2818 20:56:11.423229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/nfsrootfs
2819 20:56:11.505569 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13035056/tftp-deploy-oupemtey/modules
2820 20:56:11.506050 start: 5.1 power-off (timeout 00:00:30) [common]
2821 20:56:11.506226 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
2822 20:56:11.582333 >> Command sent successfully.
2823 20:56:11.584719 Returned 0 in 0 seconds
2824 20:56:11.685507 end: 5.1 power-off (duration 00:00:00) [common]
2826 20:56:11.687427 start: 5.2 read-feedback (timeout 00:10:00) [common]
2827 20:56:11.688849 Listened to connection for namespace 'common' for up to 1s
2829 20:56:11.690355 Listened to connection for namespace 'common' for up to 1s
2830 20:56:12.689590 Finalising connection for namespace 'common'
2831 20:56:12.690502 Disconnecting from shell: Finalise
2832 20:56:12.691057
2833 20:56:12.792292 end: 5.2 read-feedback (duration 00:00:01) [common]
2834 20:56:12.792911 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13035056
2835 20:56:13.155959 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13035056
2836 20:56:13.156161 JobError: Your job cannot terminate cleanly.