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coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

CPU: ID 806c1, Tigerlake B0, ucode: 00000086

CPU: AES supported, TXT NOT supported, VT supported

MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

VBOOT: Loading verstage.

FMAP: Found "FLASH" version 1.1 at 0x1804000.

FMAP: base = 0x0 size = 0x2000000 #areas = 32

FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984





coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

Probing TPM: . done!

TPM ready after 0 ms

Connected to device vid:did:rid of 1ae0:0028:00

Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

Initialized TPM device CR50 revision 0

tlcl_send_startup: Startup return code is 0

TPM: setup succeeded

src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

Chrome EC: UHEPI supported

Phase 1

FMAP: area GBB found @ 1805000 (458752 bytes)

MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

Recovery requested (1009000e)

TPM: Extending digest for VBOOT: boot mode into PCR 0

tlcl_extend: response is 0

TPM: Extending digest for VBOOT: GBB HWID into PCR 1

tlcl_extend: response is 0

FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

BS: verstage times (exec / console): total (unknown) / 142 ms





coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

TCO_STS:   0000 0000

GEN_PMCON: d0015038 00002200

GBLRST_CAUSE: 00000000 00000000

HPR_CAUSE0: 00000000

prev_sleep_state 5

Boot Count incremented to 29426

FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

Chrome EC: UHEPI supported

FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

Probing TPM:  done!

Connected to device vid:did:rid of 1ae0:0028:00

Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

Initialized TPM device CR50 revision 0

src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

MRC: Hash idx 0x100b comparison successful.

MRC cache found, size faa8

bootmode is set to: 2

SPD index = 0

CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

SPD: module type is LPDDR4X

SPD: module part number is MT53E512M64D4NW-046

SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

SPD: device width 16 bits, bus width 16 bits

SPD: module size is 1024 MB (per channel)

CBMEM:

IMD: root @ 0x76fff000 254 entries.

IMD: root @ 0x76ffec00 62 entries.

FMAP: area RO_VPD found @ 1800000 (16384 bytes)

FMAP: area RW_VPD found @ f35000 (8192 bytes)

External stage cache:

IMD: root @ 0x7b3ff000 254 entries.

IMD: root @ 0x7b3fec00 62 entries.

FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

MRC: 'RECOVERY_MRC_CACHE' does not need update.

cse_lite: Skip switching to RW in the recovery path

8 DIMMs found

SMM Memory Map

SMRAM       : 0x7b000000 0x800000

 Subregion 0: 0x7b000000 0x200000

 Subregion 1: 0x7b200000 0x200000

 Subregion 2: 0x7b400000 0x400000

top_of_ram = 0x77000000

MTRR Range: Start=76000000 End=77000000 (Size 1000000)

MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

MTRR Range: Start=ff000000 End=0 (Size 1000000)

CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

Processing 211 relocs. Offset value of 0x74c0b000

BS: romstage times (exec / console): total (unknown) / 277 ms





coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

Processing 5008 relocs. Offset value of 0x75d98000

BS: postcar times (exec / console): total (unknown) / 59 ms





coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

Normal boot

FW_CONFIG value is 0x804c02

PCI: 00:07.0 disabled by fw_config

PCI: 00:07.1 disabled by fw_config

PCI: 00:0d.2 disabled by fw_config

PCI: 00:1c.7 disabled by fw_config

fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

GENERIC: 0.0 disabled by fw_config

GENERIC: 1.0 disabled by fw_config

fw_config match found: DB_USB=USB3_ACTIVE

fw_config match found: DB_USB=USB3_ACTIVE

fw_config match found: DB_USB=USB3_ACTIVE

fw_config match found: DB_USB=USB3_ACTIVE

FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

microcode: sig=0x806c1 pf=0x80 revision=0x86

microcode: Update skipped, already up-to-date

CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

Detected 4 core, 8 thread CPU.

Setting up SMI for CPU

IED base = 0x7b400000

IED size = 0x00400000

Will perform SMM setup.

CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

Processing 16 relocs. Offset value of 0x00030000

Attempting to start 7 APs

Waiting for 10ms after sending INIT.

Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

done.

AP: slot 5 apic_id 4.

AP: slot 4 apic_id 5.

Waiting for 2nd SIPI to complete...done.

AP: slot 6 apic_id 2.

AP: slot 2 apic_id 3.

AP: slot 7 apic_id 6.

AP: slot 3 apic_id 7.

Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

Processing 13 relocs. Offset value of 0x00038000

Unable to locate Global NVS

SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

Installing permanent SMM handler to 0x7b000000

Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

Processing 794 relocs. Offset value of 0x7b010000

Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

Processing 13 relocs. Offset value of 0x7b008000

SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

Unable to locate Global NVS

SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

Clearing SMI status registers

SMI_STS: PM1 

PM1_STS: PWRBTN 

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

In relocation handler: CPU 0

New SMBASE=0x7b000000 IEDBASE=0x7b400000

Writing SMRR. base = 0x7b000006, mask=0xff800c00

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

In relocation handler: CPU 1

New SMBASE=0x7afffc00 IEDBASE=0x7b400000

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

In relocation handler: CPU 2

New SMBASE=0x7afff800 IEDBASE=0x7b400000

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

In relocation handler: CPU 6

New SMBASE=0x7affe800 IEDBASE=0x7b400000

Writing SMRR. base = 0x7b000006, mask=0xff800c00

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

In relocation handler: CPU 4

New SMBASE=0x7afff000 IEDBASE=0x7b400000

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

In relocation handler: CPU 5

New SMBASE=0x7affec00 IEDBASE=0x7b400000

Writing SMRR. base = 0x7b000006, mask=0xff800c00

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

In relocation handler: CPU 3

New SMBASE=0x7afff400 IEDBASE=0x7b400000

Relocation complete.

smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

In relocation handler: CPU 7

New SMBASE=0x7affe400 IEDBASE=0x7b400000

Writing SMRR. base = 0x7b000006, mask=0xff800c00

Relocation complete.

Initializing CPU #0

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

Clearing out pending MCEs

Setting up local APIC...

 apic_id: 0x00 done.

Turbo is available but hidden

Turbo is available and visible

microcode: Update skipped, already up-to-date

CPU #0 initialized

Initializing CPU #2

Initializing CPU #6

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

Clearing out pending MCEs

Clearing out pending MCEs

Setting up local APIC...

Initializing CPU #7

Initializing CPU #3

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

Clearing out pending MCEs

Clearing out pending MCEs

Setting up local APIC...

 apic_id: 0x03 done.

Setting up local APIC...

Initializing CPU #1

 apic_id: 0x06 done.

Setting up local APIC...

Initializing CPU #5

Initializing CPU #4

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

Clearing out pending MCEs

Clearing out pending MCEs

Setting up local APIC...

microcode: Update skipped, already up-to-date

 apic_id: 0x04 done.

Setting up local APIC...

 apic_id: 0x02 done.

microcode: Update skipped, already up-to-date

microcode: Update skipped, already up-to-date

CPU #7 initialized

 apic_id: 0x07 done.

CPU #6 initialized

CPU #2 initialized

CPU: vendor Intel device 806c1

CPU: family 06, model 8c, stepping 01

 apic_id: 0x05 done.

microcode: Update skipped, already up-to-date

microcode: Update skipped, already up-to-date

CPU #5 initialized

CPU #4 initialized

microcode: Update skipped, already up-to-date

Clearing out pending MCEs

CPU #3 initialized

Setting up local APIC...

 apic_id: 0x01 done.

microcode: Update skipped, already up-to-date

CPU #1 initialized

bsp_do_flight_plan done after 464 msecs.

CPU: frequency set to 4000 MHz

Enabling SMIs.

BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

SATAXPCIE1 indicates PCIe NVMe is present

Probing TPM:  done!

Connected to device vid:did:rid of 1ae0:0028:00

Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

Initialized TPM device CR50 revision 0

Enabling S0i3.4

CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

Found a VBT of 8704 bytes after decompression

cse_lite: CSE RO boot. HybridStorageMode disabled

WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

FSPS returned 0

Executing Phase 1 of FspMultiPhaseSiInit

FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

port C0 DISC req: usage 1 usb3 1 usb2 5

Raw Buffer output 0 00000511

Raw Buffer output 1 00000000

pmc_send_ipc_cmd succeeded

port C1 DISC req: usage 1 usb3 2 usb2 3

Raw Buffer output 0 00000321

Raw Buffer output 1 00000000

pmc_send_ipc_cmd succeeded

Detected 4 core, 8 thread CPU.

Detected 4 core, 8 thread CPU.

Display FSP Version Info HOB

Reference Code - CPU = a.0.4c.31

uCode Version = 0.0.0.86

TXT ACM version = ff.ff.ff.ffff

Reference Code - ME = a.0.4c.31

MEBx version = 0.0.0.0

ME Firmware Version = Consumer SKU

Reference Code - PCH = a.0.4c.31

PCH-CRID Status = Disabled

PCH-CRID Original Value = ff.ff.ff.ffff

PCH-CRID New Value = ff.ff.ff.ffff

OPROM - RST - RAID = ff.ff.ff.ffff

PCH Hsio Version = 4.0.0.0

Reference Code - SA - System Agent = a.0.4c.31

Reference Code - MRC = 2.0.0.1

SA - PCIe Version = a.0.4c.31

SA-CRID Status = Disabled

SA-CRID Original Value = 0.0.0.1

SA-CRID New Value = 0.0.0.1

OPROM - VBIOS = ff.ff.ff.ffff

IO Manageability Engine FW Version = 11.1.4.0

PHY Build Version = 0.0.0.e0

Thunderbolt(TM) FW Version = 0.0.0.0

System Agent Manageability Engine FW Version = ff.ff.ff.ffff

ITSS IRQ Polarities Before:

IPC0: 0xffffffff

IPC1: 0xffffffff

IPC2: 0xffffffff

IPC3: 0xffffffff

ITSS IRQ Polarities After:

IPC0: 0xffffffff

IPC1: 0xffffffff

IPC2: 0xffffffff

IPC3: 0xffffffff

Found PCIe Root Port #9 at PCI: 00:1d.0.

pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

Enumerating buses...

Show all devs... Before device enumeration.

Root Device: enabled 1

DOMAIN: 0000: enabled 1

CPU_CLUSTER: 0: enabled 1

PCI: 00:00.0: enabled 1

PCI: 00:02.0: enabled 1

PCI: 00:04.0: enabled 1

PCI: 00:05.0: enabled 1

PCI: 00:06.0: enabled 0

PCI: 00:07.0: enabled 0

PCI: 00:07.1: enabled 0

PCI: 00:07.2: enabled 0

PCI: 00:07.3: enabled 0

PCI: 00:08.0: enabled 1

PCI: 00:09.0: enabled 0

PCI: 00:0a.0: enabled 0

PCI: 00:0d.0: enabled 1

PCI: 00:0d.1: enabled 0

PCI: 00:0d.2: enabled 0

PCI: 00:0d.3: enabled 0

PCI: 00:0e.0: enabled 0

PCI: 00:10.2: enabled 1

PCI: 00:10.6: enabled 0

PCI: 00:10.7: enabled 0

PCI: 00:12.0: enabled 0

PCI: 00:12.6: enabled 0

PCI: 00:13.0: enabled 0

PCI: 00:14.0: enabled 1

PCI: 00:14.1: enabled 0

PCI: 00:14.2: enabled 1

PCI: 00:14.3: enabled 1

PCI: 00:15.0: enabled 1

PCI: 00:15.1: enabled 1

PCI: 00:15.2: enabled 1

PCI: 00:15.3: enabled 1

PCI: 00:16.0: enabled 1

PCI: 00:16.1: enabled 0

PCI: 00:16.2: enabled 0

PCI: 00:16.3: enabled 0

PCI: 00:16.4: enabled 0

PCI: 00:16.5: enabled 0

PCI: 00:17.0: enabled 1

PCI: 00:19.0: enabled 0

PCI: 00:19.1: enabled 1

PCI: 00:19.2: enabled 0

PCI: 00:1c.0: enabled 1

PCI: 00:1c.1: enabled 0

PCI: 00:1c.2: enabled 0

PCI: 00:1c.3: enabled 0

PCI: 00:1c.4: enabled 0

PCI: 00:1c.5: enabled 0

PCI: 00:1c.6: enabled 1

PCI: 00:1c.7: enabled 0

PCI: 00:1d.0: enabled 1

PCI: 00:1d.1: enabled 0

PCI: 00:1d.2: enabled 1

PCI: 00:1d.3: enabled 0

PCI: 00:1e.0: enabled 1

PCI: 00:1e.1: enabled 0

PCI: 00:1e.2: enabled 1

PCI: 00:1e.3: enabled 1

PCI: 00:1f.0: enabled 1

PCI: 00:1f.1: enabled 0

PCI: 00:1f.2: enabled 1

PCI: 00:1f.3: enabled 1

PCI: 00:1f.4: enabled 0

PCI: 00:1f.5: enabled 1

PCI: 00:1f.6: enabled 0

PCI: 00:1f.7: enabled 0

APIC: 00: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

USB0 port 0: enabled 1

GENERIC: 0.0: enabled 1

USB0 port 0: enabled 1

GENERIC: 0.0: enabled 1

I2C: 00:1a: enabled 1

I2C: 00:31: enabled 1

I2C: 00:32: enabled 1

I2C: 00:10: enabled 1

I2C: 00:15: enabled 1

GENERIC: 0.0: enabled 0

GENERIC: 1.0: enabled 0

GENERIC: 0.0: enabled 1

SPI: 00: enabled 1

SPI: 00: enabled 1

PNP: 0c09.0: enabled 1

GENERIC: 0.0: enabled 1

USB3 port 0: enabled 1

USB3 port 1: enabled 1

USB3 port 2: enabled 0

USB3 port 3: enabled 0

USB2 port 0: enabled 0

USB2 port 1: enabled 1

USB2 port 2: enabled 1

USB2 port 3: enabled 0

USB2 port 4: enabled 1

USB2 port 5: enabled 0

USB2 port 6: enabled 0

USB2 port 7: enabled 0

USB2 port 8: enabled 0

USB2 port 9: enabled 0

USB3 port 0: enabled 0

USB3 port 1: enabled 1

USB3 port 2: enabled 0

USB3 port 3: enabled 0

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

APIC: 01: enabled 1

APIC: 03: enabled 1

APIC: 07: enabled 1

APIC: 05: enabled 1

APIC: 04: enabled 1

APIC: 02: enabled 1

APIC: 06: enabled 1

Compare with tree...

Root Device: enabled 1

 DOMAIN: 0000: enabled 1

  PCI: 00:00.0: enabled 1

  PCI: 00:02.0: enabled 1

  PCI: 00:04.0: enabled 1

   GENERIC: 0.0: enabled 1

  PCI: 00:05.0: enabled 1

  PCI: 00:06.0: enabled 0

  PCI: 00:07.0: enabled 0

   GENERIC: 0.0: enabled 1

  PCI: 00:07.1: enabled 0

   GENERIC: 1.0: enabled 1

  PCI: 00:07.2: enabled 0

   GENERIC: 0.0: enabled 1

  PCI: 00:07.3: enabled 0

   GENERIC: 1.0: enabled 1

  PCI: 00:08.0: enabled 1

  PCI: 00:09.0: enabled 0

  PCI: 00:0a.0: enabled 0

  PCI: 00:0d.0: enabled 1

   USB0 port 0: enabled 1

    USB3 port 0: enabled 1

    USB3 port 1: enabled 1

    USB3 port 2: enabled 0

    USB3 port 3: enabled 0

  PCI: 00:0d.1: enabled 0

  PCI: 00:0d.2: enabled 0

   GENERIC: 0.0: enabled 1

  PCI: 00:0d.3: enabled 0

  PCI: 00:0e.0: enabled 0

  PCI: 00:10.2: enabled 1

  PCI: 00:10.6: enabled 0

  PCI: 00:10.7: enabled 0

  PCI: 00:12.0: enabled 0

  PCI: 00:12.6: enabled 0

  PCI: 00:13.0: enabled 0

  PCI: 00:14.0: enabled 1

   USB0 port 0: enabled 1

    USB2 port 0: enabled 0

    USB2 port 1: enabled 1

    USB2 port 2: enabled 1

    USB2 port 3: enabled 0

    USB2 port 4: enabled 1

    USB2 port 5: enabled 0

    USB2 port 6: enabled 0

    USB2 port 7: enabled 0

    USB2 port 8: enabled 0

    USB2 port 9: enabled 0

    USB3 port 0: enabled 0

    USB3 port 1: enabled 1

    USB3 port 2: enabled 0

    USB3 port 3: enabled 0

  PCI: 00:14.1: enabled 0

  PCI: 00:14.2: enabled 1

  PCI: 00:14.3: enabled 1

   GENERIC: 0.0: enabled 1

  PCI: 00:15.0: enabled 1

   I2C: 00:1a: enabled 1

   I2C: 00:31: enabled 1

   I2C: 00:32: enabled 1

  PCI: 00:15.1: enabled 1

   I2C: 00:10: enabled 1

  PCI: 00:15.2: enabled 1

  PCI: 00:15.3: enabled 1

  PCI: 00:16.0: enabled 1

  PCI: 00:16.1: enabled 0

  PCI: 00:16.2: enabled 0

  PCI: 00:16.3: enabled 0

  PCI: 00:16.4: enabled 0

  PCI: 00:16.5: enabled 0

  PCI: 00:17.0: enabled 1

  PCI: 00:19.0: enabled 0

  PCI: 00:19.1: enabled 1

   I2C: 00:15: enabled 1

  PCI: 00:19.2: enabled 0

  PCI: 00:1d.0: enabled 1

   GENERIC: 0.0: enabled 1

  PCI: 00:1e.0: enabled 1

  PCI: 00:1e.1: enabled 0

  PCI: 00:1e.2: enabled 1

   SPI: 00: enabled 1

  PCI: 00:1e.3: enabled 1

   SPI: 00: enabled 1

  PCI: 00:1f.0: enabled 1

   PNP: 0c09.0: enabled 1

  PCI: 00:1f.1: enabled 0

  PCI: 00:1f.2: enabled 1

   GENERIC: 0.0: enabled 1

    GENERIC: 0.0: enabled 1

    GENERIC: 1.0: enabled 1

  PCI: 00:1f.3: enabled 1

  PCI: 00:1f.4: enabled 0

  PCI: 00:1f.5: enabled 1

  PCI: 00:1f.6: enabled 0

  PCI: 00:1f.7: enabled 0

 CPU_CLUSTER: 0: enabled 1

  APIC: 00: enabled 1

  APIC: 01: enabled 1

  APIC: 03: enabled 1

  APIC: 07: enabled 1

  APIC: 05: enabled 1

  APIC: 04: enabled 1

  APIC: 02: enabled 1

  APIC: 06: enabled 1

Root Device scanning...

scan_static_bus for Root Device

DOMAIN: 0000 enabled

CPU_CLUSTER: 0 enabled

DOMAIN: 0000 scanning...

PCI: pci_scan_bus for bus 00

PCI: 00:00.0 [8086/0000] ops

PCI: 00:00.0 [8086/9a12] enabled

PCI: 00:02.0 [8086/0000] bus ops

PCI: 00:02.0 [8086/9a40] enabled

PCI: 00:04.0 [8086/0000] bus ops

PCI: 00:04.0 [8086/9a03] enabled

PCI: 00:05.0 [8086/9a19] enabled

PCI: 00:07.0 [0000/0000] hidden

PCI: 00:08.0 [8086/9a11] enabled

PCI: 00:0a.0 [8086/9a0d] disabled

PCI: 00:0d.0 [8086/0000] bus ops

PCI: 00:0d.0 [8086/9a13] enabled

PCI: 00:14.0 [8086/0000] bus ops

PCI: 00:14.0 [8086/a0ed] enabled

PCI: 00:14.2 [8086/a0ef] enabled

PCI: 00:14.3 [8086/0000] bus ops

PCI: 00:14.3 [8086/a0f0] enabled

PCI: 00:15.0 [8086/0000] bus ops

PCI: 00:15.0 [8086/a0e8] enabled

PCI: 00:15.1 [8086/0000] bus ops

PCI: 00:15.1 [8086/a0e9] enabled

PCI: 00:15.2 [8086/0000] bus ops

PCI: 00:15.2 [8086/a0ea] enabled

PCI: 00:15.3 [8086/0000] bus ops

PCI: 00:15.3 [8086/a0eb] enabled

PCI: 00:16.0 [8086/0000] ops

PCI: 00:16.0 [8086/a0e0] enabled

PCI: Static device PCI: 00:17.0 not found, disabling it.

PCI: 00:19.0 [8086/0000] bus ops

PCI: 00:19.0 [8086/a0c5] disabled

PCI: 00:19.1 [8086/0000] bus ops

PCI: 00:19.1 [8086/a0c6] enabled

PCI: 00:1d.0 [8086/0000] bus ops

PCI: 00:1d.0 [8086/a0b0] enabled

PCI: 00:1e.0 [8086/0000] ops

PCI: 00:1e.0 [8086/a0a8] enabled

PCI: 00:1e.2 [8086/0000] bus ops

PCI: 00:1e.2 [8086/a0aa] enabled

PCI: 00:1e.3 [8086/0000] bus ops

PCI: 00:1e.3 [8086/a0ab] enabled

PCI: 00:1f.0 [8086/0000] bus ops

PCI: 00:1f.0 [8086/a087] enabled

RTC Init

Set power on after power failure.

Disabling Deep S3

Disabling Deep S3

Disabling Deep S4

Disabling Deep S4

Disabling Deep S5

Disabling Deep S5

PCI: 00:1f.2 [0000/0000] hidden

PCI: 00:1f.3 [8086/0000] bus ops

PCI: 00:1f.3 [8086/a0c8] enabled

PCI: 00:1f.5 [8086/0000] bus ops

PCI: 00:1f.5 [8086/a0a4] enabled

PCI: Leftover static devices:

PCI: 00:10.2

PCI: 00:10.6

PCI: 00:10.7

PCI: 00:06.0

PCI: 00:07.1

PCI: 00:07.2

PCI: 00:07.3

PCI: 00:09.0

PCI: 00:0d.1

PCI: 00:0d.2

PCI: 00:0d.3

PCI: 00:0e.0

PCI: 00:12.0

PCI: 00:12.6

PCI: 00:13.0

PCI: 00:14.1

PCI: 00:16.1

PCI: 00:16.2

PCI: 00:16.3

PCI: 00:16.4

PCI: 00:16.5

PCI: 00:17.0

PCI: 00:19.2

PCI: 00:1e.1

PCI: 00:1f.1

PCI: 00:1f.4

PCI: 00:1f.6

PCI: 00:1f.7

PCI: Check your devicetree.cb.

PCI: 00:02.0 scanning...

scan_generic_bus for PCI: 00:02.0

scan_generic_bus for PCI: 00:02.0 done

scan_bus: bus PCI: 00:02.0 finished in 7 msecs

PCI: 00:04.0 scanning...

scan_generic_bus for PCI: 00:04.0

GENERIC: 0.0 enabled

bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

scan_bus: bus PCI: 00:04.0 finished in 11 msecs

PCI: 00:0d.0 scanning...

scan_static_bus for PCI: 00:0d.0

USB0 port 0 enabled

USB0 port 0 scanning...

scan_static_bus for USB0 port 0

USB3 port 0 enabled

USB3 port 1 enabled

USB3 port 2 disabled

USB3 port 3 disabled

USB3 port 0 scanning...

scan_static_bus for USB3 port 0

scan_static_bus for USB3 port 0 done

scan_bus: bus USB3 port 0 finished in 6 msecs

USB3 port 1 scanning...

scan_static_bus for USB3 port 1

scan_static_bus for USB3 port 1 done

scan_bus: bus USB3 port 1 finished in 6 msecs

scan_static_bus for USB0 port 0 done

scan_bus: bus USB0 port 0 finished in 43 msecs

scan_static_bus for PCI: 00:0d.0 done

scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

PCI: 00:14.0 scanning...

scan_static_bus for PCI: 00:14.0

USB0 port 0 enabled

USB0 port 0 scanning...

scan_static_bus for USB0 port 0

USB2 port 0 disabled

USB2 port 1 enabled

USB2 port 2 enabled

USB2 port 3 disabled

USB2 port 4 enabled

USB2 port 5 disabled

USB2 port 6 disabled

USB2 port 7 disabled

USB2 port 8 disabled

USB2 port 9 disabled

USB3 port 0 disabled

USB3 port 1 enabled

USB3 port 2 disabled

USB3 port 3 disabled

USB2 port 1 scanning...

scan_static_bus for USB2 port 1

scan_static_bus for USB2 port 1 done

scan_bus: bus USB2 port 1 finished in 6 msecs

USB2 port 2 scanning...

scan_static_bus for USB2 port 2

scan_static_bus for USB2 port 2 done

scan_bus: bus USB2 port 2 finished in 6 msecs

USB2 port 4 scanning...

scan_static_bus for USB2 port 4

scan_static_bus for USB2 port 4 done

scan_bus: bus USB2 port 4 finished in 6 msecs

USB3 port 1 scanning...

scan_static_bus for USB3 port 1

scan_static_bus for USB3 port 1 done

scan_bus: bus USB3 port 1 finished in 6 msecs

scan_static_bus for USB0 port 0 done

scan_bus: bus USB0 port 0 finished in 93 msecs

scan_static_bus for PCI: 00:14.0 done

scan_bus: bus PCI: 00:14.0 finished in 110 msecs

PCI: 00:14.3 scanning...

scan_static_bus for PCI: 00:14.3

GENERIC: 0.0 enabled

scan_static_bus for PCI: 00:14.3 done

scan_bus: bus PCI: 00:14.3 finished in 9 msecs

PCI: 00:15.0 scanning...

scan_static_bus for PCI: 00:15.0

I2C: 00:1a enabled

I2C: 00:31 enabled

I2C: 00:32 enabled

scan_static_bus for PCI: 00:15.0 done

scan_bus: bus PCI: 00:15.0 finished in 12 msecs

PCI: 00:15.1 scanning...

scan_static_bus for PCI: 00:15.1

I2C: 00:10 enabled

scan_static_bus for PCI: 00:15.1 done

scan_bus: bus PCI: 00:15.1 finished in 9 msecs

PCI: 00:15.2 scanning...

scan_static_bus for PCI: 00:15.2

scan_static_bus for PCI: 00:15.2 done

scan_bus: bus PCI: 00:15.2 finished in 7 msecs

PCI: 00:15.3 scanning...

scan_static_bus for PCI: 00:15.3

scan_static_bus for PCI: 00:15.3 done

scan_bus: bus PCI: 00:15.3 finished in 7 msecs

PCI: 00:19.1 scanning...

scan_static_bus for PCI: 00:19.1

I2C: 00:15 enabled

scan_static_bus for PCI: 00:19.1 done

scan_bus: bus PCI: 00:19.1 finished in 9 msecs

PCI: 00:1d.0 scanning...

do_pci_scan_bridge for PCI: 00:1d.0

PCI: pci_scan_bus for bus 01

PCI: 01:00.0 [1c5c/174a] enabled

GENERIC: 0.0 enabled

Enabling Common Clock Configuration

L1 Sub-State supported from root port 29

L1 Sub-State Support = 0xf

CommonModeRestoreTime = 0x28

Power On Value = 0x16, Power On Scale = 0x0

ASPM: Enabled L1

PCIe: Max_Payload_Size adjusted to 128

scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

PCI: 00:1e.2 scanning...

scan_generic_bus for PCI: 00:1e.2

SPI: 00 enabled

bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

PCI: 00:1e.3 scanning...

scan_generic_bus for PCI: 00:1e.3

SPI: 00 enabled

bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

PCI: 00:1f.0 scanning...

scan_static_bus for PCI: 00:1f.0

PNP: 0c09.0 enabled

PNP: 0c09.0 scanning...

scan_static_bus for PNP: 0c09.0

scan_static_bus for PNP: 0c09.0 done

scan_bus: bus PNP: 0c09.0 finished in 6 msecs

scan_static_bus for PCI: 00:1f.0 done

scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

PCI: 00:1f.2 scanning...

scan_static_bus for PCI: 00:1f.2

GENERIC: 0.0 enabled

GENERIC: 0.0 scanning...

scan_static_bus for GENERIC: 0.0

GENERIC: 0.0 enabled

GENERIC: 1.0 enabled

scan_static_bus for GENERIC: 0.0 done

scan_bus: bus GENERIC: 0.0 finished in 11 msecs

scan_static_bus for PCI: 00:1f.2 done

scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

PCI: 00:1f.3 scanning...

scan_static_bus for PCI: 00:1f.3

scan_static_bus for PCI: 00:1f.3 done

scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

PCI: 00:1f.5 scanning...

scan_generic_bus for PCI: 00:1f.5

scan_generic_bus for PCI: 00:1f.5 done

scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

scan_bus: bus DOMAIN: 0000 finished in 717 msecs

scan_static_bus for Root Device done

scan_bus: bus Root Device finished in 737 msecs

done

BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

Chrome EC: UHEPI supported

FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

SPI flash protection: WPSW=0 SRP0=0

MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

found VGA at PCI: 00:02.0

Setting up VGA for PCI: 00:02.0

Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

Allocating resources...

Reading resources...

Root Device read_resources bus 0 link: 0

DOMAIN: 0000 read_resources bus 0 link: 0

PCI: 00:04.0 read_resources bus 1 link: 0

PCI: 00:04.0 read_resources bus 1 link: 0 done

PCI: 00:0d.0 read_resources bus 0 link: 0

USB0 port 0 read_resources bus 0 link: 0

USB0 port 0 read_resources bus 0 link: 0 done

PCI: 00:0d.0 read_resources bus 0 link: 0 done

PCI: 00:14.0 read_resources bus 0 link: 0

USB0 port 0 read_resources bus 0 link: 0

USB0 port 0 read_resources bus 0 link: 0 done

PCI: 00:14.0 read_resources bus 0 link: 0 done

PCI: 00:14.3 read_resources bus 0 link: 0

PCI: 00:14.3 read_resources bus 0 link: 0 done

PCI: 00:15.0 read_resources bus 0 link: 0

PCI: 00:15.0 read_resources bus 0 link: 0 done

PCI: 00:15.1 read_resources bus 0 link: 0

PCI: 00:15.1 read_resources bus 0 link: 0 done

PCI: 00:19.1 read_resources bus 0 link: 0

PCI: 00:19.1 read_resources bus 0 link: 0 done

PCI: 00:1d.0 read_resources bus 1 link: 0

PCI: 00:1d.0 read_resources bus 1 link: 0 done

PCI: 00:1e.2 read_resources bus 2 link: 0

PCI: 00:1e.2 read_resources bus 2 link: 0 done

PCI: 00:1e.3 read_resources bus 3 link: 0

PCI: 00:1e.3 read_resources bus 3 link: 0 done

PCI: 00:1f.0 read_resources bus 0 link: 0

PCI: 00:1f.0 read_resources bus 0 link: 0 done

PCI: 00:1f.2 read_resources bus 0 link: 0

GENERIC: 0.0 read_resources bus 0 link: 0

GENERIC: 0.0 read_resources bus 0 link: 0 done

PCI: 00:1f.2 read_resources bus 0 link: 0 done

DOMAIN: 0000 read_resources bus 0 link: 0 done

CPU_CLUSTER: 0 read_resources bus 0 link: 0

CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

Root Device read_resources bus 0 link: 0 done

Done reading resources.

Show resources in subtree (Root Device)...After reading.

 Root Device child on link 0 DOMAIN: 0000

  DOMAIN: 0000 child on link 0 PCI: 00:00.0

  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

   PCI: 00:00.0

   PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

   PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

   PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

   PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

   PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

   PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

   PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

   PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

   PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

   PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

   PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

   PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

   PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

   PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

   PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

   PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

   PCI: 00:02.0

   PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

   PCI: 00:04.0 child on link 0 GENERIC: 0.0

   PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

    GENERIC: 0.0

   PCI: 00:05.0

   PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

   PCI: 00:07.0 child on link 0 GENERIC: 0.0

    GENERIC: 0.0

   PCI: 00:08.0

   PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

   PCI: 00:0a.0

   PCI: 00:0d.0 child on link 0 USB0 port 0

   PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

    USB0 port 0 child on link 0 USB3 port 0

     USB3 port 0

     USB3 port 1

     USB3 port 2

     USB3 port 3

   PCI: 00:14.0 child on link 0 USB0 port 0

   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

    USB0 port 0 child on link 0 USB2 port 0

     USB2 port 0

     USB2 port 1

     USB2 port 2

     USB2 port 3

     USB2 port 4

     USB2 port 5

     USB2 port 6

     USB2 port 7

     USB2 port 8

     USB2 port 9

     USB3 port 0

     USB3 port 1

     USB3 port 2

     USB3 port 3

   PCI: 00:14.2

   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

   PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

   PCI: 00:14.3 child on link 0 GENERIC: 0.0

   PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

    GENERIC: 0.0

   PCI: 00:15.0 child on link 0 I2C: 00:1a

   PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

    I2C: 00:1a

    I2C: 00:31

    I2C: 00:32

   PCI: 00:15.1 child on link 0 I2C: 00:10

   PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

    I2C: 00:10

   PCI: 00:15.2

   PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

   PCI: 00:15.3

   PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

   PCI: 00:16.0

   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

   PCI: 00:19.0

   PCI: 00:19.1 child on link 0 I2C: 00:15

   PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

    I2C: 00:15

   PCI: 00:1d.0 child on link 0 GENERIC: 0.0

   PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

   PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

   PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

    GENERIC: 0.0

    PCI: 01:00.0

    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

    PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

    PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

   PCI: 00:1e.0

   PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

   PCI: 00:1e.2 child on link 0 SPI: 00

   PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

    SPI: 00

   PCI: 00:1e.3 child on link 0 SPI: 00

   PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

    SPI: 00

   PCI: 00:1f.0 child on link 0 PNP: 0c09.0

   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

    PNP: 0c09.0

    PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

   PCI: 00:1f.2 child on link 0 GENERIC: 0.0

   PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

   PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

    GENERIC: 0.0 child on link 0 GENERIC: 0.0

     GENERIC: 0.0

     GENERIC: 1.0

   PCI: 00:1f.3

   PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

   PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

   PCI: 00:1f.5

   PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

  CPU_CLUSTER: 0 child on link 0 APIC: 00

   APIC: 00

   APIC: 01

   APIC: 03

   APIC: 07

   APIC: 05

   APIC: 04

   APIC: 02

   APIC: 06

==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

  PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

  PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 DOMAIN: 0000: Resource ranges:

 * Base: 1000, Size: 800, Tag: 100

 * Base: 1900, Size: e700, Tag: 100

  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 DOMAIN: 0000: Resource ranges:

 * Base: 7fc00000, Size: 40400000, Tag: 200

 * Base: d0000000, Size: 28000000, Tag: 200

 * Base: fa000000, Size: 1000000, Tag: 200

 * Base: fb001000, Size: 2fff000, Tag: 200

 * Base: fe010000, Size: 2e000, Tag: 200

 * Base: fe03f000, Size: d41000, Tag: 200

 * Base: fed88000, Size: 8000, Tag: 200

 * Base: fed93000, Size: d000, Tag: 200

 * Base: feda2000, Size: 1e000, Tag: 200

 * Base: fede0000, Size: 1220000, Tag: 200

 * Base: 280400000, Size: 7d7fc00000, Tag: 100200

  PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

  PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

  PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

  PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

  PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

  PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

  PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

  PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

  PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

  PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

  PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

  PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

  PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

  PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

  PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

  PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

  PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

  PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

  PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

  PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

  PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

  PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 PCI: 00:1d.0: Resource ranges:

 * Base: 7fc00000, Size: 100000, Tag: 200

  PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

  PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

  PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===

Root Device assign_resources, bus 0 link: 0

DOMAIN: 0000 assign_resources, bus 0 link: 0

PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

PCI: 00:04.0 assign_resources, bus 1 link: 0

PCI: 00:04.0 assign_resources, bus 1 link: 0

PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

PCI: 00:0d.0 assign_resources, bus 0 link: 0

PCI: 00:0d.0 assign_resources, bus 0 link: 0

PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

PCI: 00:14.0 assign_resources, bus 0 link: 0

PCI: 00:14.0 assign_resources, bus 0 link: 0

PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

PCI: 00:14.3 assign_resources, bus 0 link: 0

PCI: 00:14.3 assign_resources, bus 0 link: 0

PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

PCI: 00:15.0 assign_resources, bus 0 link: 0

PCI: 00:15.0 assign_resources, bus 0 link: 0

PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

PCI: 00:15.1 assign_resources, bus 0 link: 0

PCI: 00:15.1 assign_resources, bus 0 link: 0

PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

PCI: 00:19.1 assign_resources, bus 0 link: 0

PCI: 00:19.1 assign_resources, bus 0 link: 0

PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

PCI: 00:1d.0 assign_resources, bus 1 link: 0

PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

PCI: 00:1d.0 assign_resources, bus 1 link: 0

PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

PCI: 00:1e.2 assign_resources, bus 2 link: 0

PCI: 00:1e.2 assign_resources, bus 2 link: 0

PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

PCI: 00:1e.3 assign_resources, bus 3 link: 0

PCI: 00:1e.3 assign_resources, bus 3 link: 0

PCI: 00:1f.0 assign_resources, bus 0 link: 0

PCI: 00:1f.0 assign_resources, bus 0 link: 0

LPC: Trying to open IO window from 800 size 1ff

PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

DOMAIN: 0000 assign_resources, bus 0 link: 0

Root Device assign_resources, bus 0 link: 0

Done setting resources.

Show resources in subtree (Root Device)...After assigning values.

 Root Device child on link 0 DOMAIN: 0000

  DOMAIN: 0000 child on link 0 PCI: 00:00.0

  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

   PCI: 00:00.0

   PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

   PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

   PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

   PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

   PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

   PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

   PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

   PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

   PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

   PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

   PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

   PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

   PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

   PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

   PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

   PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

   PCI: 00:02.0

   PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

   PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

   PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

   PCI: 00:04.0 child on link 0 GENERIC: 0.0

   PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

    GENERIC: 0.0

   PCI: 00:05.0

   PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

   PCI: 00:07.0 child on link 0 GENERIC: 0.0

    GENERIC: 0.0

   PCI: 00:08.0

   PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

   PCI: 00:0a.0

   PCI: 00:0d.0 child on link 0 USB0 port 0

   PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

    USB0 port 0 child on link 0 USB3 port 0

     USB3 port 0

     USB3 port 1

     USB3 port 2

     USB3 port 3

   PCI: 00:14.0 child on link 0 USB0 port 0

   PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

    USB0 port 0 child on link 0 USB2 port 0

     USB2 port 0

     USB2 port 1

     USB2 port 2

     USB2 port 3

     USB2 port 4

     USB2 port 5

     USB2 port 6

     USB2 port 7

     USB2 port 8

     USB2 port 9

     USB3 port 0

     USB3 port 1

     USB3 port 2

     USB3 port 3

   PCI: 00:14.2

   PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

   PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

   PCI: 00:14.3 child on link 0 GENERIC: 0.0

   PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

    GENERIC: 0.0

   PCI: 00:15.0 child on link 0 I2C: 00:1a

   PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

    I2C: 00:1a

    I2C: 00:31

    I2C: 00:32

   PCI: 00:15.1 child on link 0 I2C: 00:10

   PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

    I2C: 00:10

   PCI: 00:15.2

   PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

   PCI: 00:15.3

   PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

   PCI: 00:16.0

   PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

   PCI: 00:19.0

   PCI: 00:19.1 child on link 0 I2C: 00:15

   PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

    I2C: 00:15

   PCI: 00:1d.0 child on link 0 GENERIC: 0.0

   PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

   PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

   PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

    GENERIC: 0.0

    PCI: 01:00.0

    PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

    PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

    PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

   PCI: 00:1e.0

   PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

   PCI: 00:1e.2 child on link 0 SPI: 00

   PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

    SPI: 00

   PCI: 00:1e.3 child on link 0 SPI: 00

   PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

    SPI: 00

   PCI: 00:1f.0 child on link 0 PNP: 0c09.0

   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

    PNP: 0c09.0

    PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

   PCI: 00:1f.2 child on link 0 GENERIC: 0.0

   PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

   PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

    GENERIC: 0.0 child on link 0 GENERIC: 0.0

     GENERIC: 0.0

     GENERIC: 1.0

   PCI: 00:1f.3

   PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

   PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

   PCI: 00:1f.5

   PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

  CPU_CLUSTER: 0 child on link 0 APIC: 00

   APIC: 00

   APIC: 01

   APIC: 03

   APIC: 07

   APIC: 05

   APIC: 04

   APIC: 02

   APIC: 06

Done allocating resources.

BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

Configure GPIOs for I2S audio on UP4.

BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

Enabling resources...

PCI: 00:00.0 subsystem <- 8086/9a12

PCI: 00:00.0 cmd <- 06

PCI: 00:02.0 subsystem <- 8086/9a40

PCI: 00:02.0 cmd <- 03

PCI: 00:04.0 subsystem <- 8086/9a03

PCI: 00:04.0 cmd <- 02

PCI: 00:05.0 subsystem <- 8086/9a19

PCI: 00:05.0 cmd <- 02

PCI: 00:08.0 subsystem <- 8086/9a11

PCI: 00:08.0 cmd <- 06

PCI: 00:0d.0 subsystem <- 8086/9a13

PCI: 00:0d.0 cmd <- 02

PCI: 00:14.0 subsystem <- 8086/a0ed

PCI: 00:14.0 cmd <- 02

PCI: 00:14.2 subsystem <- 8086/a0ef

PCI: 00:14.2 cmd <- 02

PCI: 00:14.3 subsystem <- 8086/a0f0

PCI: 00:14.3 cmd <- 02

PCI: 00:15.0 subsystem <- 8086/a0e8

PCI: 00:15.0 cmd <- 02

PCI: 00:15.1 subsystem <- 8086/a0e9

PCI: 00:15.1 cmd <- 02

PCI: 00:15.2 subsystem <- 8086/a0ea

PCI: 00:15.2 cmd <- 02

PCI: 00:15.3 subsystem <- 8086/a0eb

PCI: 00:15.3 cmd <- 02

PCI: 00:16.0 subsystem <- 8086/a0e0

PCI: 00:16.0 cmd <- 02

PCI: 00:19.1 subsystem <- 8086/a0c6

PCI: 00:19.1 cmd <- 02

PCI: 00:1d.0 bridge ctrl <- 0013

PCI: 00:1d.0 subsystem <- 8086/a0b0

PCI: 00:1d.0 cmd <- 06

PCI: 00:1e.0 subsystem <- 8086/a0a8

PCI: 00:1e.0 cmd <- 06

PCI: 00:1e.2 subsystem <- 8086/a0aa

PCI: 00:1e.2 cmd <- 06

PCI: 00:1e.3 subsystem <- 8086/a0ab

PCI: 00:1e.3 cmd <- 02

PCI: 00:1f.0 subsystem <- 8086/a087

PCI: 00:1f.0 cmd <- 407

PCI: 00:1f.3 subsystem <- 8086/a0c8

PCI: 00:1f.3 cmd <- 02

PCI: 00:1f.5 subsystem <- 8086/a0a4

PCI: 00:1f.5 cmd <- 406

PCI: 01:00.0 cmd <- 02

done.

BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

Initializing devices...

Root Device init

Chrome EC: Set SMI mask to 0x0000000000000000

Chrome EC: clear events_b mask to 0x0000000000000000

Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

Chrome EC: Set WAKE mask to 0x0000000000000000

fw_config match found: DB_USB=USB3_ACTIVE

Configure Right Type-C port orientation for retimer

Root Device init finished in 42 msecs

PCI: 00:00.0 init

CPU TDP = 9 Watts

CPU PL1 = 9 Watts

CPU PL2 = 40 Watts

CPU PL4 = 83 Watts

PCI: 00:00.0 init finished in 8 msecs

PCI: 00:02.0 init

GMA: Found VBT in CBFS

GMA: Found valid VBT in CBFS

framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

                   x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

PCI: 00:02.0 init finished in 18 msecs

PCI: 00:05.0 init

PCI: 00:05.0 init finished in 0 msecs

PCI: 00:08.0 init

PCI: 00:08.0 init finished in 0 msecs

PCI: 00:14.0 init

PCI: 00:14.0 init finished in 0 msecs

PCI: 00:14.2 init

PCI: 00:14.2 init finished in 0 msecs

PCI: 00:15.0 init

I2C bus 0 version 0x3230302a

DW I2C bus 0 at 0x7fe4e000 (400 KHz)

PCI: 00:15.0 init finished in 6 msecs

PCI: 00:15.1 init

I2C bus 1 version 0x3230302a

DW I2C bus 1 at 0x7fe4f000 (400 KHz)

PCI: 00:15.1 init finished in 6 msecs

PCI: 00:15.2 init

I2C bus 2 version 0x3230302a

DW I2C bus 2 at 0x7fe50000 (400 KHz)

PCI: 00:15.2 init finished in 6 msecs

PCI: 00:15.3 init

I2C bus 3 version 0x3230302a

DW I2C bus 3 at 0x7fe51000 (400 KHz)

PCI: 00:15.3 init finished in 6 msecs

PCI: 00:16.0 init

PCI: 00:16.0 init finished in 0 msecs

PCI: 00:19.1 init

I2C bus 5 version 0x3230302a

DW I2C bus 5 at 0x7fe53000 (400 KHz)

PCI: 00:19.1 init finished in 6 msecs

PCI: 00:1d.0 init

Initializing PCH PCIe bridge.

PCI: 00:1d.0 init finished in 3 msecs

PCI: 00:1f.0 init

IOAPIC: Initializing IOAPIC at 0xfec00000

IOAPIC: Bootstrap Processor Local APIC = 0x00

IOAPIC: ID = 0x02

IOAPIC: Dumping registers

  reg 0x0000: 0x02000000

  reg 0x0001: 0x00770020

  reg 0x0002: 0x00000000

PCI: 00:1f.0 init finished in 21 msecs

PCI: 00:1f.2 init

Disabling ACPI via APMC.

APMC done.

PCI: 00:1f.2 init finished in 5 msecs

PCI: 01:00.0 init

PCI: 01:00.0 init finished in 0 msecs

PNP: 0c09.0 init

Google Chrome EC uptime: 8.393 seconds

Google Chrome AP resets since EC boot: 1

Google Chrome most recent AP reset causes:

	0.348: 32775 shutdown: entering G3

Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

PNP: 0c09.0 init finished in 22 msecs

Devices initialized

Show all devs... After init.

Root Device: enabled 1

DOMAIN: 0000: enabled 1

CPU_CLUSTER: 0: enabled 1

PCI: 00:00.0: enabled 1

PCI: 00:02.0: enabled 1

PCI: 00:04.0: enabled 1

PCI: 00:05.0: enabled 1

PCI: 00:06.0: enabled 0

PCI: 00:07.0: enabled 0

PCI: 00:07.1: enabled 0

PCI: 00:07.2: enabled 0

PCI: 00:07.3: enabled 0

PCI: 00:08.0: enabled 1

PCI: 00:09.0: enabled 0

PCI: 00:0a.0: enabled 0

PCI: 00:0d.0: enabled 1

PCI: 00:0d.1: enabled 0

PCI: 00:0d.2: enabled 0

PCI: 00:0d.3: enabled 0

PCI: 00:0e.0: enabled 0

PCI: 00:10.2: enabled 1

PCI: 00:10.6: enabled 0

PCI: 00:10.7: enabled 0

PCI: 00:12.0: enabled 0

PCI: 00:12.6: enabled 0

PCI: 00:13.0: enabled 0

PCI: 00:14.0: enabled 1

PCI: 00:14.1: enabled 0

PCI: 00:14.2: enabled 1

PCI: 00:14.3: enabled 1

PCI: 00:15.0: enabled 1

PCI: 00:15.1: enabled 1

PCI: 00:15.2: enabled 1

PCI: 00:15.3: enabled 1

PCI: 00:16.0: enabled 1

PCI: 00:16.1: enabled 0

PCI: 00:16.2: enabled 0

PCI: 00:16.3: enabled 0

PCI: 00:16.4: enabled 0

PCI: 00:16.5: enabled 0

PCI: 00:17.0: enabled 0

PCI: 00:19.0: enabled 0

PCI: 00:19.1: enabled 1

PCI: 00:19.2: enabled 0

PCI: 00:1c.0: enabled 1

PCI: 00:1c.1: enabled 0

PCI: 00:1c.2: enabled 0

PCI: 00:1c.3: enabled 0

PCI: 00:1c.4: enabled 0

PCI: 00:1c.5: enabled 0

PCI: 00:1c.6: enabled 1

PCI: 00:1c.7: enabled 0

PCI: 00:1d.0: enabled 1

PCI: 00:1d.1: enabled 0

PCI: 00:1d.2: enabled 1

PCI: 00:1d.3: enabled 0

PCI: 00:1e.0: enabled 1

PCI: 00:1e.1: enabled 0

PCI: 00:1e.2: enabled 1

PCI: 00:1e.3: enabled 1

PCI: 00:1f.0: enabled 1

PCI: 00:1f.1: enabled 0

PCI: 00:1f.2: enabled 1

PCI: 00:1f.3: enabled 1

PCI: 00:1f.4: enabled 0

PCI: 00:1f.5: enabled 1

PCI: 00:1f.6: enabled 0

PCI: 00:1f.7: enabled 0

APIC: 00: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

USB0 port 0: enabled 1

GENERIC: 0.0: enabled 1

USB0 port 0: enabled 1

GENERIC: 0.0: enabled 1

I2C: 00:1a: enabled 1

I2C: 00:31: enabled 1

I2C: 00:32: enabled 1

I2C: 00:10: enabled 1

I2C: 00:15: enabled 1

GENERIC: 0.0: enabled 0

GENERIC: 1.0: enabled 0

GENERIC: 0.0: enabled 1

SPI: 00: enabled 1

SPI: 00: enabled 1

PNP: 0c09.0: enabled 1

GENERIC: 0.0: enabled 1

USB3 port 0: enabled 1

USB3 port 1: enabled 1

USB3 port 2: enabled 0

USB3 port 3: enabled 0

USB2 port 0: enabled 0

USB2 port 1: enabled 1

USB2 port 2: enabled 1

USB2 port 3: enabled 0

USB2 port 4: enabled 1

USB2 port 5: enabled 0

USB2 port 6: enabled 0

USB2 port 7: enabled 0

USB2 port 8: enabled 0

USB2 port 9: enabled 0

USB3 port 0: enabled 0

USB3 port 1: enabled 1

USB3 port 2: enabled 0

USB3 port 3: enabled 0

GENERIC: 0.0: enabled 1

GENERIC: 1.0: enabled 1

APIC: 01: enabled 1

APIC: 03: enabled 1

APIC: 07: enabled 1

APIC: 05: enabled 1

APIC: 04: enabled 1

APIC: 02: enabled 1

APIC: 06: enabled 1

PCI: 01:00.0: enabled 1

BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms

FMAP: area RW_ELOG found @ f30000 (4096 bytes)

ELOG: NV offset 0xf30000 size 0x1000

ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

ELOG: Event(17) added with size 13 at 2024-03-12 21:03:31 UTC

ELOG: Event(92) added with size 9 at 2024-03-12 21:03:31 UTC

ELOG: Event(93) added with size 9 at 2024-03-12 21:03:31 UTC

ELOG: Event(9E) added with size 10 at 2024-03-12 21:03:31 UTC

ELOG: Event(9F) added with size 14 at 2024-03-12 21:03:31 UTC

BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

ELOG: Event(A1) added with size 10 at 2024-03-12 21:03:31 UTC

elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

Finalize devices...

Devices finalized

BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

ME: HFSTS1                      : 0x80030055

ME: HFSTS2                      : 0x30280116

ME: HFSTS3                      : 0x00000050

ME: HFSTS4                      : 0x00004000

ME: HFSTS5                      : 0x00000000

ME: HFSTS6                      : 0x00400006

ME: Manufacturing Mode          : YES

ME: SPI Protection Mode Enabled : NO

ME: FW Partition Table          : OK

ME: Bringup Loader Failure      : NO

ME: Firmware Init Complete      : NO

ME: Boot Options Present        : NO

ME: Update In Progress          : NO

ME: D0i3 Support                : YES

ME: Low Power State Enabled     : NO

ME: CPU Replaced                : YES

ME: CPU Replacement Valid       : YES

ME: Current Working State       : 5

ME: Current Operation State     : 1

ME: Current Operation Mode      : 3

ME: Error Code                  : 0

ME: Enhanced Debug Mode         : NO

ME: CPU Debug Disabled          : YES

ME: TXT Support                 : NO

BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

CBFS: 'fallback/slic' not found.

ACPI: Writing ACPI tables at 76b01000.

ACPI:    * FACS

ACPI:    * DSDT

Ramoops buffer: 0x100000@0x76a00000.

FMAP: area RO_VPD found @ 1800000 (16384 bytes)

FMAP: area RW_VPD found @ f35000 (8192 bytes)

Google Chrome EC: version:

	ro: voema_v2.0.7540-147f8d37d1

	rw: voema_v2.0.7540-147f8d37d1

  running image: 2

PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

ACPI:    * FADT

SCI is IRQ9

ACPI: added table 1/32, length now 40

ACPI:     * SSDT

Found 1 CPU(s) with 8 core(s) each.

\_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

\_SB.DPTF: Intel DPTF at GENERIC: 0.0

\_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

\_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

\_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

\_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

\_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

\_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

\_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

\_SB.PCI0.RP09: Added StorageD3Enable property

\_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

\_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

PS2K: Passing 80 keymaps to kernel

\_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

\_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

\_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

\_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

\_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

\_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

\_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

\_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

ACPI: added table 2/32, length now 44

ACPI:    * MCFG

ACPI: added table 3/32, length now 48

ACPI:    * TPM2

TPM2 log created at 0x769f0000

ACPI: added table 4/32, length now 52

ACPI:    * MADT

SCI is IRQ9

ACPI: added table 5/32, length now 56

current = 76b09850

ACPI:    * DMAR

ACPI: added table 6/32, length now 60

ACPI: added table 7/32, length now 64

ACPI:    * HPET

ACPI: added table 8/32, length now 68

ACPI: done.

ACPI tables: 35216 bytes.

smbios_write_tables: 769ef000

EC returned error result code 3

Couldn't obtain OEM name from CBI

Create SMBIOS type 16

Create SMBIOS type 17

GENERIC: 0.0 (WIFI Device)

SMBIOS tables: 1750 bytes.

Writing table forward entry at 0x00000500

Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

Writing coreboot table at 0x76b25000

 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1. 0000000000001000-000000000009ffff: RAM

 2. 00000000000a0000-00000000000fffff: RESERVED

 3. 0000000000100000-00000000769eefff: RAM

 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 7. 0000000077000000-000000007fbfffff: RESERVED

 8. 00000000c0000000-00000000cfffffff: RESERVED

 9. 00000000f8000000-00000000f9ffffff: RESERVED

10. 00000000fb000000-00000000fb000fff: RESERVED

11. 00000000fe000000-00000000fe00ffff: RESERVED

12. 00000000fed80000-00000000fed87fff: RESERVED

13. 00000000fed90000-00000000fed92fff: RESERVED

14. 00000000feda0000-00000000feda1fff: RESERVED

15. 00000000fedc0000-00000000feddffff: RESERVED

16. 0000000100000000-00000002803fffff: RAM

Passing 4 GPIOs to payload:

            NAME |       PORT | POLARITY |     VALUE

             lid |  undefined |     high |      high

           power |  undefined |     high |       low

           oprom |  undefined |     high |       low

        EC in RW | 0x000000e5 |     high |      high

Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 74c2

coreboot table: 1576 bytes.

IMD ROOT    0. 0x76fff000 0x00001000

IMD SMALL   1. 0x76ffe000 0x00001000

FSP MEMORY  2. 0x76c4e000 0x003b0000

VPD         3. 0x76c4d000 0x00000367

RO MCACHE   4. 0x76c4c000 0x00000fdc

CONSOLE     5. 0x76c2c000 0x00020000

FMAP        6. 0x76c2b000 0x00000578

TIME STAMP  7. 0x76c2a000 0x00000910

VBOOT WORK  8. 0x76c16000 0x00014000

ROMSTG STCK 9. 0x76c15000 0x00001000

AFTER CAR  10. 0x76c0a000 0x0000b000

RAMSTAGE   11. 0x76b97000 0x00073000

REFCODE    12. 0x76b42000 0x00055000

SMM BACKUP 13. 0x76b32000 0x00010000

4f444749   14. 0x76b30000 0x00002000

EXT VBT15. 0x76b2d000 0x0000219f

COREBOOT   16. 0x76b25000 0x00008000

ACPI       17. 0x76b01000 0x00024000

ACPI GNVS  18. 0x76b00000 0x00001000

RAMOOPS    19. 0x76a00000 0x00100000

TPM2 TCGLOG20. 0x769f0000 0x00010000

SMBIOS     21. 0x769ef000 0x00000800

IMD small region:

  IMD ROOT    0. 0x76ffec00 0x00000400

  FSP RUNTIME 1. 0x76ffebe0 0x00000004

  POWER STATE 2. 0x76ffeb80 0x00000044

  ROMSTAGE    3. 0x76ffeb60 0x00000004

  MEM INFO    4. 0x76ffe980 0x000001e0

BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

MTRR: Physical address space:

0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

call enable_fixed_mtrr()

CPU physical address size: 39 bits

MTRR: default type WB/UC MTRR counts: 6/6.

MTRR: UC selected as default type.

MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6



MTRR check

Fixed MTRRs   : Enabled

Variable MTRRs: Enabled



MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

call enable_fixed_mtrr()

Checking cr50 for pending updates

CPU physical address size: 39 bits

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

call enable_fixed_mtrr()

call enable_fixed_mtrr()

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

call enable_fixed_mtrr()

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

CPU physical address size: 39 bits

call enable_fixed_mtrr()

Reading cr50 TPM mode

CPU physical address size: 39 bits

CPU physical address size: 39 bits

BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x250 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR: Fixed MSR 0x258 0x0606060606060606

call enable_fixed_mtrr()

MTRR: Fixed MSR 0x259 0x0000000000000000

MTRR: Fixed MSR 0x268 0x0606060606060606

MTRR: Fixed MSR 0x269 0x0606060606060606

MTRR: Fixed MSR 0x26a 0x0606060606060606

MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR: Fixed MSR 0x26e 0x0606060606060606

MTRR: Fixed MSR 0x26f 0x0606060606060606

CPU physical address size: 39 bits

call enable_fixed_mtrr()

CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

CPU physical address size: 39 bits

CPU physical address size: 39 bits

Checking segment from ROM address 0xffc02b38

Checking segment from ROM address 0xffc02b54

Loading segment from ROM address 0xffc02b38

  code (compression=0)

  New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

it's not compressed!

[ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

Loading segment from ROM address 0xffc02b54

  Entry Point 0x30000000

Loaded segments

BS: BS_PAYLOAD_LOAD run times (exec / console): 244 / 63 ms

Finalizing chipset.

Finalizing SMM.

APMC done.

BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

mp_park_aps done after 0 msecs.

Jumping to boot code at 0x30000000(0x76b25000)

CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes






Starting depthcharge on Voema...


WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!


WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!


Looking for NVMe Controller 0x3005f220 @ 00:1d:00


Failed to find eMMC card reader


Wipe memory regions:


	[0x00000000001000, 0x000000000a0000)


	[0x00000000100000, 0x00000030000000)


	[0x00000032662db0, 0x000000769ef000)


	[0x00000100000000, 0x00000280400000)


ec_init: CrosEC protocol v3 supported (256, 256)


update_port_state: port C0 state: usb enable 1 mux conn 0


update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1


pmc_check_ipc_sts: STS_BUSY done after 1561 us


send_conn_disc_msg: pmc_send_cmd succeeded


R8152: Initializing


Version 6 (ocp_data = 5c30)


R8152: Done initializing


Adding net device


[firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35





volteer: tftpboot 192.168.201.1 13035036/tftp-deploy-q5crjcn7/kernel/bzImage 13035036/tftp-deploy-q5crjcn7/kernel/cmdline 13035036/tftp-deploy-q5crjcn7/ramdisk/ramdisk.cpio.gz

tftpboot 192.168.201.1 13035036/tftp-deploy-q5crjcn7/kernel/bzImploy-q5crjcn7/kernel/cmdline 13035036/tftp-deploy-q5crjcn7/ramdisk/ramdisk.cpio.gz


Waiting for link


done.


MAC: 00:24:32:30:7b:ec


Sending DHCP discover... done.


Waiting for reply... done.


Sending DHCP request... done.


Waiting for reply... done.


My ip is 192.168.201.11


The DHCP server ip is 192.168.201.1


TFTP server IP predefined by user: 192.168.201.1


Bootfile predefined by user: 13035036/tftp-deploy-q5crjcn7/kernel/bzImage


Sending tftp read request... done.


Waiting for the transfer... 


00000000 ################################################################


00080000 ################################################################


00100000 ################################################################


00180000 ################################################################


00200000 ################################################################


00280000 ################################################################


00300000 ################################################################


00380000 ################################################################


00400000 ################################################################


00480000 ################################################################


00500000 ################################################################


00580000 ################################################################


00600000 ################################################################


00680000 ################################################################


00700000 ################################################################


00780000 ################################################################


00800000 ################################################################


00880000 ######################################################## done.


The bootfile was 9367440 bytes long.


Sending tftp read request... done.


Waiting for the transfer... 


00000000 ################################################################


00080000 ################################################################


00100000 ################################################################


00180000 ################################################################


00200000 ################################################################


00280000 ################################################################


00300000 ################################################################


00380000 ################################################################


00400000 ################################################################


00480000 ################################################################


00500000 ################################################################ done.


Sending tftp read request... done.


Waiting for the transfer... 


00000000 # done.


Command line loaded dynamically from TFTP file: 13035036/tftp-deploy-q5crjcn7/kernel/cmdline


The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13035036/extract-nfsrootfs-zhn1i_4q,tcp,hard ip=dhcp tftpserverip=192.168.201.1


Shutting down all USB controllers.


Removing current net device


Finalizing coreboot


Exiting depthcharge with code 4 at timestamp: 30081574




Starting kernel ...