Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:52.207113 lava-dispatcher, installed at version: 2023.03
2 14:50:52.207327 start: 0 validate
3 14:50:52.207455 Start time: 2023-05-03 14:50:52.207448+00:00 (UTC)
4 14:50:52.207587 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:52.207723 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230421.0%2Fx86%2Frootfs.cpio.gz exists
6 14:50:52.495094 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:52.495281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:52.786119 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:52.786309 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:50:53.078927 validate duration: 0.87
12 14:50:53.079219 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:50:53.079324 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:50:53.079411 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:50:53.079533 Not decompressing ramdisk as can be used compressed.
16 14:50:53.079635 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230421.0/x86/rootfs.cpio.gz
17 14:50:53.079702 saving as /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/ramdisk/rootfs.cpio.gz
18 14:50:53.079763 total size: 8429989 (8MB)
19 14:50:53.080811 progress 0% (0MB)
20 14:50:53.083068 progress 5% (0MB)
21 14:50:53.085352 progress 10% (0MB)
22 14:50:53.087610 progress 15% (1MB)
23 14:50:53.089863 progress 20% (1MB)
24 14:50:53.092119 progress 25% (2MB)
25 14:50:53.094359 progress 30% (2MB)
26 14:50:53.096637 progress 35% (2MB)
27 14:50:53.098716 progress 40% (3MB)
28 14:50:53.100997 progress 45% (3MB)
29 14:50:53.103230 progress 50% (4MB)
30 14:50:53.105482 progress 55% (4MB)
31 14:50:53.107727 progress 60% (4MB)
32 14:50:53.109930 progress 65% (5MB)
33 14:50:53.112163 progress 70% (5MB)
34 14:50:53.114212 progress 75% (6MB)
35 14:50:53.116451 progress 80% (6MB)
36 14:50:53.118651 progress 85% (6MB)
37 14:50:53.120902 progress 90% (7MB)
38 14:50:53.123180 progress 95% (7MB)
39 14:50:53.125505 progress 100% (8MB)
40 14:50:53.125654 8MB downloaded in 0.05s (175.20MB/s)
41 14:50:53.125809 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:50:53.126056 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:50:53.126147 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:50:53.126235 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:50:53.126372 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:50:53.126445 saving as /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/kernel/bzImage
48 14:50:53.126506 total size: 7876496 (7MB)
49 14:50:53.126565 No compression specified
50 14:50:53.127739 progress 0% (0MB)
51 14:50:53.129873 progress 5% (0MB)
52 14:50:53.132016 progress 10% (0MB)
53 14:50:53.134099 progress 15% (1MB)
54 14:50:53.136297 progress 20% (1MB)
55 14:50:53.138374 progress 25% (1MB)
56 14:50:53.140494 progress 30% (2MB)
57 14:50:53.142571 progress 35% (2MB)
58 14:50:53.144694 progress 40% (3MB)
59 14:50:53.146767 progress 45% (3MB)
60 14:50:53.148879 progress 50% (3MB)
61 14:50:53.150917 progress 55% (4MB)
62 14:50:53.153002 progress 60% (4MB)
63 14:50:53.155104 progress 65% (4MB)
64 14:50:53.157223 progress 70% (5MB)
65 14:50:53.159282 progress 75% (5MB)
66 14:50:53.161383 progress 80% (6MB)
67 14:50:53.163464 progress 85% (6MB)
68 14:50:53.165589 progress 90% (6MB)
69 14:50:53.167819 progress 95% (7MB)
70 14:50:53.169922 progress 100% (7MB)
71 14:50:53.170103 7MB downloaded in 0.04s (172.31MB/s)
72 14:50:53.170245 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:50:53.170477 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:50:53.170567 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:50:53.170664 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:50:53.170840 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:50:53.170911 saving as /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/modules/modules.tar
79 14:50:53.170979 total size: 251268 (0MB)
80 14:50:53.171040 Using unxz to decompress xz
81 14:50:53.174727 progress 13% (0MB)
82 14:50:53.175144 progress 26% (0MB)
83 14:50:53.175427 progress 39% (0MB)
84 14:50:53.176790 progress 52% (0MB)
85 14:50:53.178714 progress 65% (0MB)
86 14:50:53.180650 progress 78% (0MB)
87 14:50:53.182517 progress 91% (0MB)
88 14:50:53.184359 progress 100% (0MB)
89 14:50:53.190223 0MB downloaded in 0.02s (12.46MB/s)
90 14:50:53.190488 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:50:53.190748 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:50:53.190847 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 14:50:53.190945 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 14:50:53.191058 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:50:53.191168 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 14:50:53.191427 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8
98 14:50:53.191604 makedir: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin
99 14:50:53.191741 makedir: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/tests
100 14:50:53.191877 makedir: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/results
101 14:50:53.192021 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-add-keys
102 14:50:53.192197 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-add-sources
103 14:50:53.192354 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-background-process-start
104 14:50:53.192517 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-background-process-stop
105 14:50:53.192673 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-common-functions
106 14:50:53.192825 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-echo-ipv4
107 14:50:53.192980 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-install-packages
108 14:50:53.193134 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-installed-packages
109 14:50:53.193285 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-os-build
110 14:50:53.193439 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-probe-channel
111 14:50:53.193592 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-probe-ip
112 14:50:53.193747 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-target-ip
113 14:50:53.193902 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-target-mac
114 14:50:53.194056 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-target-storage
115 14:50:53.194212 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-case
116 14:50:53.194368 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-event
117 14:50:53.194519 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-feedback
118 14:50:53.194668 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-raise
119 14:50:53.194791 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-reference
120 14:50:53.194916 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-runner
121 14:50:53.195039 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-set
122 14:50:53.195158 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-test-shell
123 14:50:53.195286 Updating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-install-packages (oe)
124 14:50:53.195432 Updating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/bin/lava-installed-packages (oe)
125 14:50:53.195555 Creating /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/environment
126 14:50:53.195706 LAVA metadata
127 14:50:53.195780 - LAVA_JOB_ID=10185577
128 14:50:53.195877 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:50:53.196012 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 14:50:53.196109 skipped lava-vland-overlay
131 14:50:53.196218 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:50:53.196329 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 14:50:53.196421 skipped lava-multinode-overlay
134 14:50:53.196525 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:50:53.196641 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 14:50:53.196743 Loading test definitions
137 14:50:53.196870 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 14:50:53.196974 Using /lava-10185577 at stage 0
139 14:50:53.197397 uuid=10185577_1.4.2.3.1 testdef=None
140 14:50:53.197501 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:50:53.197591 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 14:50:53.198300 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:50:53.198666 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 14:50:53.199659 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:50:53.200038 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 14:50:53.200738 runner path: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/0/tests/0_dmesg test_uuid 10185577_1.4.2.3.1
149 14:50:53.200900 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:50:53.201130 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 14:50:53.201210 Using /lava-10185577 at stage 1
153 14:50:53.201508 uuid=10185577_1.4.2.3.5 testdef=None
154 14:50:53.201596 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:50:53.201716 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 14:50:53.202430 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:50:53.202789 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 14:50:53.203736 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:50:53.203986 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 14:50:53.204625 runner path: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/1/tests/1_bootrr test_uuid 10185577_1.4.2.3.5
163 14:50:53.204786 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:50:53.205014 Creating lava-test-runner.conf files
166 14:50:53.205077 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/0 for stage 0
167 14:50:53.205173 - 0_dmesg
168 14:50:53.205256 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185577/lava-overlay-lhkja7p8/lava-10185577/1 for stage 1
169 14:50:53.205344 - 1_bootrr
170 14:50:53.205453 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:50:53.205539 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 14:50:53.215236 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:50:53.215370 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 14:50:53.215496 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:50:53.215690 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:50:53.215787 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 14:50:53.467553 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:50:53.467943 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 14:50:53.468068 extracting modules file /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185577/extract-overlay-ramdisk-da26em2g/ramdisk
180 14:50:53.482759 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:50:53.482950 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 14:50:53.483083 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185577/compress-overlay-qyh4yb58/overlay-1.4.2.4.tar.gz to ramdisk
183 14:50:53.483185 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185577/compress-overlay-qyh4yb58/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185577/extract-overlay-ramdisk-da26em2g/ramdisk
184 14:50:53.491858 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:50:53.491993 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 14:50:53.492098 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:50:53.492193 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 14:50:53.492280 Building ramdisk /var/lib/lava/dispatcher/tmp/10185577/extract-overlay-ramdisk-da26em2g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185577/extract-overlay-ramdisk-da26em2g/ramdisk
189 14:50:53.621547 >> 49791 blocks
190 14:50:54.483769 rename /var/lib/lava/dispatcher/tmp/10185577/extract-overlay-ramdisk-da26em2g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
191 14:50:54.484221 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:50:54.484356 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 14:50:54.484480 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 14:50:54.484579 No mkimage arch provided, not using FIT.
195 14:50:54.484682 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:50:54.484778 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:50:54.484912 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:50:54.485022 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 14:50:54.485105 No LXC device requested
200 14:50:54.485199 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:50:54.485291 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 14:50:54.485378 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:50:54.485477 Checking files for TFTP limit of 4294967296 bytes.
204 14:50:54.485951 end: 1 tftp-deploy (duration 00:00:01) [common]
205 14:50:54.486056 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:50:54.486150 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:50:54.486277 substitutions:
208 14:50:54.486344 - {DTB}: None
209 14:50:54.486411 - {INITRD}: 10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
210 14:50:54.486474 - {KERNEL}: 10185577/tftp-deploy-dewdggek/kernel/bzImage
211 14:50:54.486532 - {LAVA_MAC}: None
212 14:50:54.486590 - {PRESEED_CONFIG}: None
213 14:50:54.486647 - {PRESEED_LOCAL}: None
214 14:50:54.486709 - {RAMDISK}: 10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
215 14:50:54.486766 - {ROOT_PART}: None
216 14:50:54.486825 - {ROOT}: None
217 14:50:54.486887 - {SERVER_IP}: 192.168.201.1
218 14:50:54.486981 - {TEE}: None
219 14:50:54.487044 Parsed boot commands:
220 14:50:54.487101 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:50:54.487283 Parsed boot commands: tftpboot 192.168.201.1 10185577/tftp-deploy-dewdggek/kernel/bzImage 10185577/tftp-deploy-dewdggek/kernel/cmdline 10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
222 14:50:54.487374 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:50:54.487462 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:50:54.487573 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:50:54.487671 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:50:54.487742 Not connected, no need to disconnect.
227 14:50:54.487827 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:50:54.487910 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:50:54.487979 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
230 14:50:54.491744 Setting prompt string to ['lava-test: # ']
231 14:50:54.492116 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:50:54.492230 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:50:54.492332 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:50:54.492431 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:50:54.492635 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
236 14:50:59.624442 >> Command sent successfully.
237 14:50:59.627151 Returned 0 in 5 seconds
238 14:50:59.727513 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:50:59.727884 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:50:59.728003 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:50:59.728094 Setting prompt string to 'Starting depthcharge on Magolor...'
243 14:50:59.728167 Changing prompt to 'Starting depthcharge on Magolor...'
244 14:50:59.728245 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 14:50:59.728522 [Enter `^Ec?' for help]
246 14:51:00.868130
247 14:51:00.868286
248 14:51:00.878895 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 14:51:00.882252 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 14:51:00.885392 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 14:51:00.891868 CPU: AES supported, TXT NOT supported, VT supported
252 14:51:00.895382 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 14:51:00.901790 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 14:51:00.904767 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 14:51:00.909148 VBOOT: Loading verstage.
256 14:51:00.915944 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 14:51:00.919103 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 14:51:00.925879 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 14:51:00.929179 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 14:51:00.932396
261 14:51:00.932478
262 14:51:00.942407 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 14:51:00.956199 Probing TPM: . done!
264 14:51:00.960301 TPM ready after 0 ms
265 14:51:00.964151 Connected to device vid:did:rid of 1ae0:0028:00
266 14:51:00.973802 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 14:51:00.980904 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 14:51:00.984648 Initialized TPM device CR50 revision 0
269 14:51:01.049299 tlcl_send_startup: Startup return code is 0
270 14:51:01.049421 TPM: setup succeeded
271 14:51:01.059268 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 14:51:01.075706 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 14:51:01.082784 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 14:51:01.097142 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 14:51:01.100492 Chrome EC: UHEPI supported
276 14:51:01.103375 Phase 1
277 14:51:01.107014 FMAP: area GBB found @ c05000 (12288 bytes)
278 14:51:01.113548 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 14:51:01.119946 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 14:51:01.123529 Recovery requested (1009000e)
281 14:51:01.132649 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 14:51:01.138853 tlcl_extend: response is 0
283 14:51:01.145891 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 14:51:01.155244 tlcl_extend: response is 0
285 14:51:01.162090 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 14:51:01.165146 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 14:51:01.171537 BS: verstage times (exec / console): total (unknown) / 124 ms
288 14:51:01.175159
289 14:51:01.175275
290 14:51:01.184805 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 14:51:01.191426 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 14:51:01.194766 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 14:51:01.197969 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 14:51:01.204909 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 14:51:01.208119 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 14:51:01.211223 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 14:51:01.214836 TCO_STS: 0000 0001
298 14:51:01.218266 GEN_PMCON: d0015038 00002200
299 14:51:01.221172 GBLRST_CAUSE: 00000000 00000000
300 14:51:01.221256 prev_sleep_state 5
301 14:51:01.225312 Boot Count incremented to 15147
302 14:51:01.232131 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 14:51:01.235463 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 14:51:01.239455 Chrome EC: UHEPI supported
305 14:51:01.246555 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 14:51:01.252120 Probing TPM: done!
307 14:51:01.259150 Connected to device vid:did:rid of 1ae0:0028:00
308 14:51:01.269077 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 14:51:01.272375 Initialized TPM device CR50 revision 0
310 14:51:01.286578 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 14:51:01.293375 MRC: Hash idx 0x100b comparison successful.
312 14:51:01.296349 MRC cache found, size 5458
313 14:51:01.296441 bootmode is set to: 2
314 14:51:01.299849 SPD INDEX = 0
315 14:51:01.303073 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 14:51:01.306637 SPD: module type is LPDDR4X
317 14:51:01.313393 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 14:51:01.319774 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 14:51:01.322901 SPD: device width 16 bits, bus width 32 bits
320 14:51:01.326254 SPD: module size is 4096 MB (per channel)
321 14:51:01.329829 meminit_channels: DRAM half-populated
322 14:51:01.413057 CBMEM:
323 14:51:01.416149 IMD: root @ 0x76fff000 254 entries.
324 14:51:01.419347 IMD: root @ 0x76ffec00 62 entries.
325 14:51:01.422448 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 14:51:01.429404 WARNING: RO_VPD is uninitialized or empty.
327 14:51:01.432557 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 14:51:01.436465 External stage cache:
329 14:51:01.439417 IMD: root @ 0x7b3ff000 254 entries.
330 14:51:01.443014 IMD: root @ 0x7b3fec00 62 entries.
331 14:51:01.452849 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 14:51:01.459567 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 14:51:01.466183 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 14:51:01.474256 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 14:51:01.480945 cse_lite: Skip switching to RW in the recovery path
336 14:51:01.481036 1 DIMMs found
337 14:51:01.481125 SMM Memory Map
338 14:51:01.484199 SMRAM : 0x7b000000 0x800000
339 14:51:01.491139 Subregion 0: 0x7b000000 0x200000
340 14:51:01.494260 Subregion 1: 0x7b200000 0x200000
341 14:51:01.497439 Subregion 2: 0x7b400000 0x400000
342 14:51:01.497524 top_of_ram = 0x77000000
343 14:51:01.504129 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 14:51:01.510616 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 14:51:01.513896 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 14:51:01.520935 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 14:51:01.524093 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 14:51:01.536132 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 14:51:01.542700 Processing 188 relocs. Offset value of 0x74c0e000
350 14:51:01.550032 BS: romstage times (exec / console): total (unknown) / 255 ms
351 14:51:01.554580
352 14:51:01.554695
353 14:51:01.564247 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 14:51:01.567355 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 14:51:01.574408 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 14:51:01.580668 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 14:51:01.636642 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 14:51:01.643259 Processing 4805 relocs. Offset value of 0x75da8000
359 14:51:01.646544 BS: postcar times (exec / console): total (unknown) / 42 ms
360 14:51:01.649979
361 14:51:01.650065
362 14:51:01.659823 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 14:51:01.659916 Normal boot
364 14:51:01.663766 EC returned error result code 3
365 14:51:01.667197 FW_CONFIG value is 0x204
366 14:51:01.670292 GENERIC: 0.0 disabled by fw_config
367 14:51:01.677012 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 14:51:01.680130 I2C: 00:10 disabled by fw_config
369 14:51:01.683935 I2C: 00:10 disabled by fw_config
370 14:51:01.686920 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 14:51:01.693145 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 14:51:01.696713 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 14:51:01.704578 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 14:51:01.707912 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 14:51:01.711277 I2C: 00:10 disabled by fw_config
376 14:51:01.718231 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 14:51:01.724396 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 14:51:01.728425 I2C: 00:1a disabled by fw_config
379 14:51:01.731042 I2C: 00:1a disabled by fw_config
380 14:51:01.734714 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 14:51:01.740836 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 14:51:01.744569 GENERIC: 0.0 disabled by fw_config
383 14:51:01.747786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 14:51:01.754597 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 14:51:01.757601 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 14:51:01.764370 microcode: Update skipped, already up-to-date
387 14:51:01.767345 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 14:51:01.795465 Detected 2 core, 2 thread CPU.
389 14:51:01.798678 Setting up SMI for CPU
390 14:51:01.802319 IED base = 0x7b400000
391 14:51:01.802406 IED size = 0x00400000
392 14:51:01.805444 Will perform SMM setup.
393 14:51:01.808627 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 14:51:01.818977 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 14:51:01.822291 Processing 16 relocs. Offset value of 0x00030000
396 14:51:01.826041 Attempting to start 1 APs
397 14:51:01.829428 Waiting for 10ms after sending INIT.
398 14:51:01.845403 Waiting for 1st SIPI to complete...done.
399 14:51:01.848984 Waiting for 2nd SIPI to complete...done.
400 14:51:01.852070 AP: slot 1 apic_id 2.
401 14:51:01.858792 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 14:51:01.865155 Processing 13 relocs. Offset value of 0x00038000
403 14:51:01.865277 Unable to locate Global NVS
404 14:51:01.875412 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 14:51:01.878517 Installing permanent SMM handler to 0x7b000000
406 14:51:01.888317 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 14:51:01.891814 Processing 704 relocs. Offset value of 0x7b010000
408 14:51:01.898196 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 14:51:01.905036 Processing 13 relocs. Offset value of 0x7b008000
410 14:51:01.911521 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 14:51:01.914798 Unable to locate Global NVS
412 14:51:01.921648 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 14:51:01.925099 Clearing SMI status registers
414 14:51:01.925274 SMI_STS: PM1
415 14:51:01.928374 PM1_STS: PWRBTN
416 14:51:01.928547 TCO_STS: INTRD_DET
417 14:51:01.938087 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 14:51:01.938266 In relocation handler: CPU 0
419 14:51:01.944574 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 14:51:01.947893 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 14:51:01.951124 Relocation complete.
422 14:51:01.958123 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 14:51:01.961438 In relocation handler: CPU 1
424 14:51:01.964397 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 14:51:01.970849 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 14:51:01.971035 Relocation complete.
427 14:51:01.974257 Initializing CPU #0
428 14:51:01.977688 CPU: vendor Intel device 906c0
429 14:51:01.980863 CPU: family 06, model 9c, stepping 00
430 14:51:01.984052 Clearing out pending MCEs
431 14:51:01.987172 Setting up local APIC...
432 14:51:01.987280 apic_id: 0x00 done.
433 14:51:01.990878 Turbo is available but hidden
434 14:51:01.993974 Turbo is available and visible
435 14:51:02.000748 microcode: Update skipped, already up-to-date
436 14:51:02.000873 CPU #0 initialized
437 14:51:02.004043 Initializing CPU #1
438 14:51:02.007067 CPU: vendor Intel device 906c0
439 14:51:02.010588 CPU: family 06, model 9c, stepping 00
440 14:51:02.013788 Clearing out pending MCEs
441 14:51:02.016940 Setting up local APIC...
442 14:51:02.017036 apic_id: 0x02 done.
443 14:51:02.023313 microcode: Update skipped, already up-to-date
444 14:51:02.023423 CPU #1 initialized
445 14:51:02.030006 bsp_do_flight_plan done after 175 msecs.
446 14:51:02.030137 CPU: frequency set to 2800 MHz
447 14:51:02.033202 Enabling SMIs.
448 14:51:02.040207 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 14:51:02.049891 Probing TPM: done!
450 14:51:02.056851 Connected to device vid:did:rid of 1ae0:0028:00
451 14:51:02.066077 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 14:51:02.069378 Initialized TPM device CR50 revision 0
453 14:51:02.073310 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 14:51:02.080004 Found a VBT of 7680 bytes after decompression
455 14:51:02.086355 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 14:51:02.121326 Detected 2 core, 2 thread CPU.
457 14:51:02.124633 Detected 2 core, 2 thread CPU.
458 14:51:02.486048 Display FSP Version Info HOB
459 14:51:02.489330 Reference Code - CPU = 8.7.22.30
460 14:51:02.492613 uCode Version = 24.0.0.1f
461 14:51:02.496422 TXT ACM version = ff.ff.ff.ffff
462 14:51:02.499555 Reference Code - ME = 8.7.22.30
463 14:51:02.502450 MEBx version = 0.0.0.0
464 14:51:02.505641 ME Firmware Version = Consumer SKU
465 14:51:02.509334 Reference Code - PCH = 8.7.22.30
466 14:51:02.513001 PCH-CRID Status = Disabled
467 14:51:02.515894 PCH-CRID Original Value = ff.ff.ff.ffff
468 14:51:02.519322 PCH-CRID New Value = ff.ff.ff.ffff
469 14:51:02.522473 OPROM - RST - RAID = ff.ff.ff.ffff
470 14:51:02.525826 PCH Hsio Version = 4.0.0.0
471 14:51:02.529104 Reference Code - SA - System Agent = 8.7.22.30
472 14:51:02.532533 Reference Code - MRC = 0.0.4.68
473 14:51:02.535552 SA - PCIe Version = 8.7.22.30
474 14:51:02.538815 SA-CRID Status = Disabled
475 14:51:02.542200 SA-CRID Original Value = 0.0.0.0
476 14:51:02.545450 SA-CRID New Value = 0.0.0.0
477 14:51:02.548992 OPROM - VBIOS = ff.ff.ff.ffff
478 14:51:02.552274 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 14:51:02.555278 PHY Build Version = ff.ff.ff.ffff
480 14:51:02.561973 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 14:51:02.565251 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 14:51:02.568589 ITSS IRQ Polarities Before:
483 14:51:02.571994 IPC0: 0xffffffff
484 14:51:02.572081 IPC1: 0xffffffff
485 14:51:02.575574 IPC2: 0xffffffff
486 14:51:02.575680 IPC3: 0xffffffff
487 14:51:02.578390 ITSS IRQ Polarities After:
488 14:51:02.581885 IPC0: 0xffffffff
489 14:51:02.581970 IPC1: 0xffffffff
490 14:51:02.585363 IPC2: 0xffffffff
491 14:51:02.585472 IPC3: 0xffffffff
492 14:51:02.598332 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 14:51:02.604775 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
494 14:51:02.608803 Enumerating buses...
495 14:51:02.611446 Show all devs... Before device enumeration.
496 14:51:02.614744 Root Device: enabled 1
497 14:51:02.614854 CPU_CLUSTER: 0: enabled 1
498 14:51:02.618263 DOMAIN: 0000: enabled 1
499 14:51:02.621413 PCI: 00:00.0: enabled 1
500 14:51:02.624768 PCI: 00:02.0: enabled 1
501 14:51:02.624856 PCI: 00:04.0: enabled 1
502 14:51:02.627939 PCI: 00:05.0: enabled 1
503 14:51:02.631265 PCI: 00:09.0: enabled 0
504 14:51:02.634419 PCI: 00:12.6: enabled 0
505 14:51:02.634512 PCI: 00:14.0: enabled 1
506 14:51:02.637809 PCI: 00:14.1: enabled 0
507 14:51:02.640970 PCI: 00:14.2: enabled 0
508 14:51:02.641062 PCI: 00:14.3: enabled 1
509 14:51:02.644170 PCI: 00:14.5: enabled 1
510 14:51:02.647485 PCI: 00:15.0: enabled 1
511 14:51:02.650856 PCI: 00:15.1: enabled 1
512 14:51:02.650946 PCI: 00:15.2: enabled 1
513 14:51:02.654227 PCI: 00:15.3: enabled 1
514 14:51:02.657863 PCI: 00:16.0: enabled 1
515 14:51:02.660579 PCI: 00:16.1: enabled 0
516 14:51:02.660666 PCI: 00:16.4: enabled 0
517 14:51:02.664093 PCI: 00:16.5: enabled 0
518 14:51:02.667168 PCI: 00:17.0: enabled 0
519 14:51:02.670874 PCI: 00:19.0: enabled 1
520 14:51:02.670965 PCI: 00:19.1: enabled 0
521 14:51:02.674164 PCI: 00:19.2: enabled 1
522 14:51:02.677054 PCI: 00:1a.0: enabled 1
523 14:51:02.680497 PCI: 00:1c.0: enabled 0
524 14:51:02.680589 PCI: 00:1c.1: enabled 0
525 14:51:02.683940 PCI: 00:1c.2: enabled 0
526 14:51:02.687196 PCI: 00:1c.3: enabled 0
527 14:51:02.690450 PCI: 00:1c.4: enabled 0
528 14:51:02.690542 PCI: 00:1c.5: enabled 0
529 14:51:02.693818 PCI: 00:1c.6: enabled 0
530 14:51:02.697139 PCI: 00:1c.7: enabled 1
531 14:51:02.697229 PCI: 00:1e.0: enabled 0
532 14:51:02.700340 PCI: 00:1e.1: enabled 0
533 14:51:02.703475 PCI: 00:1e.2: enabled 1
534 14:51:02.706950 PCI: 00:1e.3: enabled 0
535 14:51:02.707039 PCI: 00:1f.0: enabled 1
536 14:51:02.710434 PCI: 00:1f.1: enabled 1
537 14:51:02.713474 PCI: 00:1f.2: enabled 1
538 14:51:02.716456 PCI: 00:1f.3: enabled 1
539 14:51:02.716542 PCI: 00:1f.4: enabled 0
540 14:51:02.719989 PCI: 00:1f.5: enabled 1
541 14:51:02.723242 PCI: 00:1f.7: enabled 0
542 14:51:02.726736 GENERIC: 0.0: enabled 1
543 14:51:02.726823 GENERIC: 0.0: enabled 1
544 14:51:02.729903 USB0 port 0: enabled 1
545 14:51:02.733113 GENERIC: 0.0: enabled 1
546 14:51:02.733201 I2C: 00:2c: enabled 1
547 14:51:02.736475 I2C: 00:15: enabled 1
548 14:51:02.739915 GENERIC: 0.0: enabled 0
549 14:51:02.743129 I2C: 00:15: enabled 1
550 14:51:02.743220 I2C: 00:10: enabled 0
551 14:51:02.746271 I2C: 00:10: enabled 0
552 14:51:02.750003 I2C: 00:2c: enabled 1
553 14:51:02.750092 I2C: 00:40: enabled 1
554 14:51:02.752927 I2C: 00:10: enabled 1
555 14:51:02.756215 I2C: 00:39: enabled 1
556 14:51:02.756301 I2C: 00:36: enabled 1
557 14:51:02.759452 I2C: 00:10: enabled 0
558 14:51:02.762860 I2C: 00:0c: enabled 1
559 14:51:02.762945 I2C: 00:50: enabled 1
560 14:51:02.766293 I2C: 00:1a: enabled 1
561 14:51:02.770031 I2C: 00:1a: enabled 0
562 14:51:02.770133 I2C: 00:1a: enabled 0
563 14:51:02.772967 I2C: 00:28: enabled 1
564 14:51:02.776260 I2C: 00:29: enabled 1
565 14:51:02.776393 PCI: 00:00.0: enabled 1
566 14:51:02.779420 SPI: 00: enabled 1
567 14:51:02.782608 PNP: 0c09.0: enabled 1
568 14:51:02.782723 GENERIC: 0.0: enabled 0
569 14:51:02.785810 USB2 port 0: enabled 1
570 14:51:02.789612 USB2 port 1: enabled 1
571 14:51:02.792888 USB2 port 2: enabled 1
572 14:51:02.792988 USB2 port 3: enabled 1
573 14:51:02.796011 USB2 port 4: enabled 0
574 14:51:02.799197 USB2 port 5: enabled 1
575 14:51:02.799299 USB2 port 6: enabled 0
576 14:51:02.802405 USB2 port 7: enabled 1
577 14:51:02.806302 USB3 port 0: enabled 1
578 14:51:02.809411 USB3 port 1: enabled 1
579 14:51:02.809490 USB3 port 2: enabled 1
580 14:51:02.812463 USB3 port 3: enabled 1
581 14:51:02.815971 APIC: 00: enabled 1
582 14:51:02.816103 APIC: 02: enabled 1
583 14:51:02.819364 Compare with tree...
584 14:51:02.822165 Root Device: enabled 1
585 14:51:02.822253 CPU_CLUSTER: 0: enabled 1
586 14:51:02.825870 APIC: 00: enabled 1
587 14:51:02.829071 APIC: 02: enabled 1
588 14:51:02.829167 DOMAIN: 0000: enabled 1
589 14:51:02.831937 PCI: 00:00.0: enabled 1
590 14:51:02.835535 PCI: 00:02.0: enabled 1
591 14:51:02.838860 PCI: 00:04.0: enabled 1
592 14:51:02.841941 GENERIC: 0.0: enabled 1
593 14:51:02.842031 PCI: 00:05.0: enabled 1
594 14:51:02.845356 GENERIC: 0.0: enabled 1
595 14:51:02.849001 PCI: 00:09.0: enabled 0
596 14:51:02.852011 PCI: 00:12.6: enabled 0
597 14:51:02.855297 PCI: 00:14.0: enabled 1
598 14:51:02.855382 USB0 port 0: enabled 1
599 14:51:02.858356 USB2 port 0: enabled 1
600 14:51:02.861800 USB2 port 1: enabled 1
601 14:51:02.865179 USB2 port 2: enabled 1
602 14:51:02.868599 USB2 port 3: enabled 1
603 14:51:02.871970 USB2 port 4: enabled 0
604 14:51:02.872064 USB2 port 5: enabled 1
605 14:51:02.875383 USB2 port 6: enabled 0
606 14:51:02.878492 USB2 port 7: enabled 1
607 14:51:02.881612 USB3 port 0: enabled 1
608 14:51:02.884700 USB3 port 1: enabled 1
609 14:51:02.888259 USB3 port 2: enabled 1
610 14:51:02.888358 USB3 port 3: enabled 1
611 14:51:02.891895 PCI: 00:14.1: enabled 0
612 14:51:02.894921 PCI: 00:14.2: enabled 0
613 14:51:02.898139 PCI: 00:14.3: enabled 1
614 14:51:02.901295 GENERIC: 0.0: enabled 1
615 14:51:02.901393 PCI: 00:14.5: enabled 1
616 14:51:02.904827 PCI: 00:15.0: enabled 1
617 14:51:02.907949 I2C: 00:2c: enabled 1
618 14:51:02.911163 I2C: 00:15: enabled 1
619 14:51:02.911259 PCI: 00:15.1: enabled 1
620 14:51:02.914435 PCI: 00:15.2: enabled 1
621 14:51:02.917679 GENERIC: 0.0: enabled 0
622 14:51:02.921143 I2C: 00:15: enabled 1
623 14:51:02.924396 I2C: 00:10: enabled 0
624 14:51:02.924481 I2C: 00:10: enabled 0
625 14:51:02.927844 I2C: 00:2c: enabled 1
626 14:51:02.931072 I2C: 00:40: enabled 1
627 14:51:02.934464 I2C: 00:10: enabled 1
628 14:51:02.934550 I2C: 00:39: enabled 1
629 14:51:02.937714 PCI: 00:15.3: enabled 1
630 14:51:02.940848 I2C: 00:36: enabled 1
631 14:51:02.944237 I2C: 00:10: enabled 0
632 14:51:02.948005 I2C: 00:0c: enabled 1
633 14:51:02.948093 I2C: 00:50: enabled 1
634 14:51:02.951209 PCI: 00:16.0: enabled 1
635 14:51:02.954821 PCI: 00:16.1: enabled 0
636 14:51:02.958335 PCI: 00:16.4: enabled 0
637 14:51:02.958423 PCI: 00:16.5: enabled 0
638 14:51:02.961688 PCI: 00:17.0: enabled 0
639 14:51:02.965322 PCI: 00:19.0: enabled 1
640 14:51:02.968361 I2C: 00:1a: enabled 1
641 14:51:02.968449 I2C: 00:1a: enabled 0
642 14:51:02.971715 I2C: 00:1a: enabled 0
643 14:51:02.975154 I2C: 00:28: enabled 1
644 14:51:02.978579 I2C: 00:29: enabled 1
645 14:51:02.978677 PCI: 00:19.1: enabled 0
646 14:51:02.982097 PCI: 00:19.2: enabled 1
647 14:51:02.985401 PCI: 00:1a.0: enabled 1
648 14:51:02.988454 PCI: 00:1e.0: enabled 0
649 14:51:02.991745 PCI: 00:1e.1: enabled 0
650 14:51:02.991840 PCI: 00:1e.2: enabled 1
651 14:51:02.994841 SPI: 00: enabled 1
652 14:51:02.998237 PCI: 00:1e.3: enabled 0
653 14:51:03.001376 PCI: 00:1f.0: enabled 1
654 14:51:03.001469 PNP: 0c09.0: enabled 1
655 14:51:03.004655 PCI: 00:1f.1: enabled 1
656 14:51:03.007914 PCI: 00:1f.2: enabled 1
657 14:51:03.011548 PCI: 00:1f.3: enabled 1
658 14:51:03.014669 GENERIC: 0.0: enabled 0
659 14:51:03.014758 PCI: 00:1f.4: enabled 0
660 14:51:03.018151 PCI: 00:1f.5: enabled 1
661 14:51:03.021233 PCI: 00:1f.7: enabled 0
662 14:51:03.024563 Root Device scanning...
663 14:51:03.027965 scan_static_bus for Root Device
664 14:51:03.028067 CPU_CLUSTER: 0 enabled
665 14:51:03.031260 DOMAIN: 0000 enabled
666 14:51:03.034911 DOMAIN: 0000 scanning...
667 14:51:03.038005 PCI: pci_scan_bus for bus 00
668 14:51:03.041255 PCI: 00:00.0 [8086/0000] ops
669 14:51:03.044472 PCI: 00:00.0 [8086/4e22] enabled
670 14:51:03.047519 PCI: 00:02.0 [8086/0000] bus ops
671 14:51:03.051264 PCI: 00:02.0 [8086/4e55] enabled
672 14:51:03.054330 PCI: 00:04.0 [8086/0000] bus ops
673 14:51:03.057934 PCI: 00:04.0 [8086/4e03] enabled
674 14:51:03.061124 PCI: 00:05.0 [8086/0000] bus ops
675 14:51:03.064231 PCI: 00:05.0 [8086/4e19] enabled
676 14:51:03.067681 PCI: 00:08.0 [8086/4e11] enabled
677 14:51:03.070979 PCI: 00:14.0 [8086/0000] bus ops
678 14:51:03.074222 PCI: 00:14.0 [8086/4ded] enabled
679 14:51:03.077635 PCI: 00:14.2 [8086/4def] disabled
680 14:51:03.081196 PCI: 00:14.3 [8086/0000] bus ops
681 14:51:03.084423 PCI: 00:14.3 [8086/4df0] enabled
682 14:51:03.087431 PCI: 00:14.5 [8086/0000] ops
683 14:51:03.090808 PCI: 00:14.5 [8086/4df8] enabled
684 14:51:03.094562 PCI: 00:15.0 [8086/0000] bus ops
685 14:51:03.097335 PCI: 00:15.0 [8086/4de8] enabled
686 14:51:03.100460 PCI: 00:15.1 [8086/0000] bus ops
687 14:51:03.103775 PCI: 00:15.1 [8086/4de9] enabled
688 14:51:03.107237 PCI: 00:15.2 [8086/0000] bus ops
689 14:51:03.110490 PCI: 00:15.2 [8086/4dea] enabled
690 14:51:03.114094 PCI: 00:15.3 [8086/0000] bus ops
691 14:51:03.117132 PCI: 00:15.3 [8086/4deb] enabled
692 14:51:03.120378 PCI: 00:16.0 [8086/0000] ops
693 14:51:03.123878 PCI: 00:16.0 [8086/4de0] enabled
694 14:51:03.127251 PCI: 00:19.0 [8086/0000] bus ops
695 14:51:03.130149 PCI: 00:19.0 [8086/4dc5] enabled
696 14:51:03.130246 PCI: 00:19.2 [8086/0000] ops
697 14:51:03.133954 PCI: 00:19.2 [8086/4dc7] enabled
698 14:51:03.136841 PCI: 00:1a.0 [8086/0000] ops
699 14:51:03.140531 PCI: 00:1a.0 [8086/4dc4] enabled
700 14:51:03.143788 PCI: 00:1e.0 [8086/0000] ops
701 14:51:03.147004 PCI: 00:1e.0 [8086/4da8] disabled
702 14:51:03.150502 PCI: 00:1e.2 [8086/0000] bus ops
703 14:51:03.153760 PCI: 00:1e.2 [8086/4daa] enabled
704 14:51:03.157025 PCI: 00:1f.0 [8086/0000] bus ops
705 14:51:03.160394 PCI: 00:1f.0 [8086/4d87] enabled
706 14:51:03.166641 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 14:51:03.166764 RTC Init
708 14:51:03.170288 Set power on after power failure.
709 14:51:03.173564 Disabling Deep S3
710 14:51:03.176554 Disabling Deep S3
711 14:51:03.176645 Disabling Deep S4
712 14:51:03.179896 Disabling Deep S4
713 14:51:03.179979 Disabling Deep S5
714 14:51:03.183246 Disabling Deep S5
715 14:51:03.186558 PCI: 00:1f.2 [0000/0000] hidden
716 14:51:03.190028 PCI: 00:1f.3 [8086/0000] bus ops
717 14:51:03.193300 PCI: 00:1f.3 [8086/4dc8] enabled
718 14:51:03.196644 PCI: 00:1f.5 [8086/0000] bus ops
719 14:51:03.199970 PCI: 00:1f.5 [8086/4da4] enabled
720 14:51:03.203551 PCI: Leftover static devices:
721 14:51:03.203641 PCI: 00:12.6
722 14:51:03.203707 PCI: 00:09.0
723 14:51:03.206368 PCI: 00:14.1
724 14:51:03.206450 PCI: 00:16.1
725 14:51:03.209586 PCI: 00:16.4
726 14:51:03.209668 PCI: 00:16.5
727 14:51:03.212838 PCI: 00:17.0
728 14:51:03.212921 PCI: 00:19.1
729 14:51:03.212986 PCI: 00:1e.1
730 14:51:03.216794 PCI: 00:1e.3
731 14:51:03.216877 PCI: 00:1f.1
732 14:51:03.219841 PCI: 00:1f.4
733 14:51:03.219939 PCI: 00:1f.7
734 14:51:03.223205 PCI: Check your devicetree.cb.
735 14:51:03.226817 PCI: 00:02.0 scanning...
736 14:51:03.229831 scan_generic_bus for PCI: 00:02.0
737 14:51:03.233023 scan_generic_bus for PCI: 00:02.0 done
738 14:51:03.236319 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 14:51:03.239452 PCI: 00:04.0 scanning...
740 14:51:03.243010 scan_generic_bus for PCI: 00:04.0
741 14:51:03.246139 GENERIC: 0.0 enabled
742 14:51:03.252700 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 14:51:03.255933 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 14:51:03.259174 PCI: 00:05.0 scanning...
745 14:51:03.262457 scan_generic_bus for PCI: 00:05.0
746 14:51:03.265870 GENERIC: 0.0 enabled
747 14:51:03.272474 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 14:51:03.276100 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 14:51:03.279072 PCI: 00:14.0 scanning...
750 14:51:03.282362 scan_static_bus for PCI: 00:14.0
751 14:51:03.282537 USB0 port 0 enabled
752 14:51:03.285926 USB0 port 0 scanning...
753 14:51:03.289143 scan_static_bus for USB0 port 0
754 14:51:03.292293 USB2 port 0 enabled
755 14:51:03.292395 USB2 port 1 enabled
756 14:51:03.295902 USB2 port 2 enabled
757 14:51:03.299091 USB2 port 3 enabled
758 14:51:03.299295 USB2 port 4 disabled
759 14:51:03.302455 USB2 port 5 enabled
760 14:51:03.305428 USB2 port 6 disabled
761 14:51:03.305640 USB2 port 7 enabled
762 14:51:03.308876 USB3 port 0 enabled
763 14:51:03.309096 USB3 port 1 enabled
764 14:51:03.311998 USB3 port 2 enabled
765 14:51:03.315644 USB3 port 3 enabled
766 14:51:03.315890 USB2 port 0 scanning...
767 14:51:03.319267 scan_static_bus for USB2 port 0
768 14:51:03.325142 scan_static_bus for USB2 port 0 done
769 14:51:03.329044 scan_bus: bus USB2 port 0 finished in 6 msecs
770 14:51:03.332315 USB2 port 1 scanning...
771 14:51:03.335546 scan_static_bus for USB2 port 1
772 14:51:03.338682 scan_static_bus for USB2 port 1 done
773 14:51:03.341811 scan_bus: bus USB2 port 1 finished in 6 msecs
774 14:51:03.345224 USB2 port 2 scanning...
775 14:51:03.348660 scan_static_bus for USB2 port 2
776 14:51:03.351846 scan_static_bus for USB2 port 2 done
777 14:51:03.355299 scan_bus: bus USB2 port 2 finished in 6 msecs
778 14:51:03.358570 USB2 port 3 scanning...
779 14:51:03.361754 scan_static_bus for USB2 port 3
780 14:51:03.365212 scan_static_bus for USB2 port 3 done
781 14:51:03.371537 scan_bus: bus USB2 port 3 finished in 6 msecs
782 14:51:03.375116 USB2 port 5 scanning...
783 14:51:03.378494 scan_static_bus for USB2 port 5
784 14:51:03.381496 scan_static_bus for USB2 port 5 done
785 14:51:03.384539 scan_bus: bus USB2 port 5 finished in 6 msecs
786 14:51:03.387704 USB2 port 7 scanning...
787 14:51:03.391334 scan_static_bus for USB2 port 7
788 14:51:03.394800 scan_static_bus for USB2 port 7 done
789 14:51:03.398058 scan_bus: bus USB2 port 7 finished in 6 msecs
790 14:51:03.401366 USB3 port 0 scanning...
791 14:51:03.404473 scan_static_bus for USB3 port 0
792 14:51:03.407849 scan_static_bus for USB3 port 0 done
793 14:51:03.414324 scan_bus: bus USB3 port 0 finished in 6 msecs
794 14:51:03.414905 USB3 port 1 scanning...
795 14:51:03.417293 scan_static_bus for USB3 port 1
796 14:51:03.420882 scan_static_bus for USB3 port 1 done
797 14:51:03.427648 scan_bus: bus USB3 port 1 finished in 6 msecs
798 14:51:03.430891 USB3 port 2 scanning...
799 14:51:03.434220 scan_static_bus for USB3 port 2
800 14:51:03.437361 scan_static_bus for USB3 port 2 done
801 14:51:03.440599 scan_bus: bus USB3 port 2 finished in 6 msecs
802 14:51:03.443604 USB3 port 3 scanning...
803 14:51:03.447102 scan_static_bus for USB3 port 3
804 14:51:03.450668 scan_static_bus for USB3 port 3 done
805 14:51:03.453721 scan_bus: bus USB3 port 3 finished in 6 msecs
806 14:51:03.460372 scan_static_bus for USB0 port 0 done
807 14:51:03.463980 scan_bus: bus USB0 port 0 finished in 172 msecs
808 14:51:03.466792 scan_static_bus for PCI: 00:14.0 done
809 14:51:03.473621 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 14:51:03.474131 PCI: 00:14.3 scanning...
811 14:51:03.476997 scan_static_bus for PCI: 00:14.3
812 14:51:03.480434 GENERIC: 0.0 enabled
813 14:51:03.483637 scan_static_bus for PCI: 00:14.3 done
814 14:51:03.489828 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 14:51:03.490318 PCI: 00:15.0 scanning...
816 14:51:03.493274 scan_static_bus for PCI: 00:15.0
817 14:51:03.496366 I2C: 00:2c enabled
818 14:51:03.499918 I2C: 00:15 enabled
819 14:51:03.503130 scan_static_bus for PCI: 00:15.0 done
820 14:51:03.506696 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
821 14:51:03.509772 PCI: 00:15.1 scanning...
822 14:51:03.512839 scan_static_bus for PCI: 00:15.1
823 14:51:03.516348 scan_static_bus for PCI: 00:15.1 done
824 14:51:03.522963 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 14:51:03.523502 PCI: 00:15.2 scanning...
826 14:51:03.526463 scan_static_bus for PCI: 00:15.2
827 14:51:03.529266 GENERIC: 0.0 disabled
828 14:51:03.532970 I2C: 00:15 enabled
829 14:51:03.533395 I2C: 00:10 disabled
830 14:51:03.536841 I2C: 00:10 disabled
831 14:51:03.537371 I2C: 00:2c enabled
832 14:51:03.540723 I2C: 00:40 enabled
833 14:51:03.541402 I2C: 00:10 enabled
834 14:51:03.543740 I2C: 00:39 enabled
835 14:51:03.547247 scan_static_bus for PCI: 00:15.2 done
836 14:51:03.550975 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 14:51:03.554902 PCI: 00:15.3 scanning...
838 14:51:03.558075 scan_static_bus for PCI: 00:15.3
839 14:51:03.561582 I2C: 00:36 enabled
840 14:51:03.562134 I2C: 00:10 disabled
841 14:51:03.564930 I2C: 00:0c enabled
842 14:51:03.567798 I2C: 00:50 enabled
843 14:51:03.571451 scan_static_bus for PCI: 00:15.3 done
844 14:51:03.574845 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 14:51:03.578001 PCI: 00:19.0 scanning...
846 14:51:03.581397 scan_static_bus for PCI: 00:19.0
847 14:51:03.584630 I2C: 00:1a enabled
848 14:51:03.585162 I2C: 00:1a disabled
849 14:51:03.587772 I2C: 00:1a disabled
850 14:51:03.588209 I2C: 00:28 enabled
851 14:51:03.591384 I2C: 00:29 enabled
852 14:51:03.594682 scan_static_bus for PCI: 00:19.0 done
853 14:51:03.600763 scan_bus: bus PCI: 00:19.0 finished in 16 msecs
854 14:51:03.601285 PCI: 00:1e.2 scanning...
855 14:51:03.604293 scan_generic_bus for PCI: 00:1e.2
856 14:51:03.607530 SPI: 00 enabled
857 14:51:03.614390 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 14:51:03.617244 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 14:51:03.620834 PCI: 00:1f.0 scanning...
860 14:51:03.624150 scan_static_bus for PCI: 00:1f.0
861 14:51:03.627281 PNP: 0c09.0 enabled
862 14:51:03.627783 PNP: 0c09.0 scanning...
863 14:51:03.630587 scan_static_bus for PNP: 0c09.0
864 14:51:03.634006 scan_static_bus for PNP: 0c09.0 done
865 14:51:03.640479 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 14:51:03.643821 scan_static_bus for PCI: 00:1f.0 done
867 14:51:03.647178 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 14:51:03.650828 PCI: 00:1f.3 scanning...
869 14:51:03.654002 scan_static_bus for PCI: 00:1f.3
870 14:51:03.657494 GENERIC: 0.0 disabled
871 14:51:03.660622 scan_static_bus for PCI: 00:1f.3 done
872 14:51:03.663740 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 14:51:03.666634 PCI: 00:1f.5 scanning...
874 14:51:03.669995 scan_generic_bus for PCI: 00:1f.5
875 14:51:03.676902 scan_generic_bus for PCI: 00:1f.5 done
876 14:51:03.680154 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 14:51:03.683699 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
878 14:51:03.690214 scan_static_bus for Root Device done
879 14:51:03.693295 scan_bus: bus Root Device finished in 664 msecs
880 14:51:03.693734 done
881 14:51:03.699933 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
882 14:51:03.703377 Chrome EC: UHEPI supported
883 14:51:03.709846 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 14:51:03.716297 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 14:51:03.719921 SPI flash protection: WPSW=0 SRP0=1
886 14:51:03.723220 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 14:51:03.729966 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 14:51:03.732734 found VGA at PCI: 00:02.0
889 14:51:03.736456 Setting up VGA for PCI: 00:02.0
890 14:51:03.739328 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 14:51:03.746207 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 14:51:03.749735 Allocating resources...
893 14:51:03.750271 Reading resources...
894 14:51:03.752614 Root Device read_resources bus 0 link: 0
895 14:51:03.759743 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 14:51:03.762609 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 14:51:03.769166 DOMAIN: 0000 read_resources bus 0 link: 0
898 14:51:03.772566 PCI: 00:04.0 read_resources bus 1 link: 0
899 14:51:03.779226 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 14:51:03.782939 PCI: 00:05.0 read_resources bus 2 link: 0
901 14:51:03.789100 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 14:51:03.792418 PCI: 00:14.0 read_resources bus 0 link: 0
903 14:51:03.795729 USB0 port 0 read_resources bus 0 link: 0
904 14:51:03.804202 USB0 port 0 read_resources bus 0 link: 0 done
905 14:51:03.807649 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 14:51:03.813635 PCI: 00:14.3 read_resources bus 0 link: 0
907 14:51:03.816654 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 14:51:03.872768 PCI: 00:15.0 read_resources bus 0 link: 0
909 14:51:03.873304 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 14:51:03.873655 PCI: 00:15.2 read_resources bus 0 link: 0
911 14:51:03.873979 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 14:51:03.874621 PCI: 00:15.3 read_resources bus 0 link: 0
913 14:51:03.874965 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 14:51:03.875279 PCI: 00:19.0 read_resources bus 0 link: 0
915 14:51:03.875605 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 14:51:03.875942 PCI: 00:1e.2 read_resources bus 3 link: 0
917 14:51:03.876303 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 14:51:03.876616 PCI: 00:1f.0 read_resources bus 0 link: 0
919 14:51:03.923174 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 14:51:03.923764 PCI: 00:1f.3 read_resources bus 0 link: 0
921 14:51:03.924126 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 14:51:03.924766 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 14:51:03.925111 Root Device read_resources bus 0 link: 0 done
924 14:51:03.925432 Done reading resources.
925 14:51:03.925741 Show resources in subtree (Root Device)...After reading.
926 14:51:03.926046 Root Device child on link 0 CPU_CLUSTER: 0
927 14:51:03.926345 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 14:51:03.926607 APIC: 00
929 14:51:03.926818 APIC: 02
930 14:51:03.927025 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 14:51:03.948690 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 14:51:03.949030 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 14:51:03.949145 PCI: 00:00.0
934 14:51:03.952706 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 14:51:03.959407 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 14:51:03.968915 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 14:51:03.978996 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 14:51:03.985150 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 14:51:03.995447 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 14:51:04.005364 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 14:51:04.015013 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 14:51:04.024732 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 14:51:04.034714 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 14:51:04.041539 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 14:51:04.051232 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 14:51:04.061285 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 14:51:04.070837 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 14:51:04.081208 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 14:51:04.087755 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 14:51:04.097912 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 14:51:04.107964 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 14:51:04.117171 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 14:51:04.121029 PCI: 00:02.0
954 14:51:04.130678 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 14:51:04.140349 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 14:51:04.147521 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 14:51:04.153437 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 14:51:04.163780 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 14:51:04.164019 GENERIC: 0.0
960 14:51:04.170291 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 14:51:04.179929 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 14:51:04.180187 GENERIC: 0.0
963 14:51:04.183466 PCI: 00:08.0
964 14:51:04.193376 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 14:51:04.197054 PCI: 00:14.0 child on link 0 USB0 port 0
966 14:51:04.206461 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 14:51:04.209822 USB0 port 0 child on link 0 USB2 port 0
968 14:51:04.213794 USB2 port 0
969 14:51:04.214036 USB2 port 1
970 14:51:04.217238 USB2 port 2
971 14:51:04.217457 USB2 port 3
972 14:51:04.220902 USB2 port 4
973 14:51:04.221164 USB2 port 5
974 14:51:04.224035 USB2 port 6
975 14:51:04.224264 USB2 port 7
976 14:51:04.227243 USB3 port 0
977 14:51:04.227492 USB3 port 1
978 14:51:04.230505 USB3 port 2
979 14:51:04.230724 USB3 port 3
980 14:51:04.233597 PCI: 00:14.2
981 14:51:04.237153 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 14:51:04.246907 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 14:51:04.250528 GENERIC: 0.0
984 14:51:04.250748 PCI: 00:14.5
985 14:51:04.260298 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 14:51:04.266911 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 14:51:04.277030 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 14:51:04.277467 I2C: 00:2c
989 14:51:04.280055 I2C: 00:15
990 14:51:04.280485 PCI: 00:15.1
991 14:51:04.290241 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 14:51:04.293586 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 14:51:04.303527 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 14:51:04.306674 GENERIC: 0.0
995 14:51:04.306982 I2C: 00:15
996 14:51:04.309965 I2C: 00:10
997 14:51:04.310276 I2C: 00:10
998 14:51:04.312997 I2C: 00:2c
999 14:51:04.313230 I2C: 00:40
1000 14:51:04.316478 I2C: 00:10
1001 14:51:04.316711 I2C: 00:39
1002 14:51:04.319665 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 14:51:04.329424 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 14:51:04.333269 I2C: 00:36
1005 14:51:04.333703 I2C: 00:10
1006 14:51:04.336370 I2C: 00:0c
1007 14:51:04.336803 I2C: 00:50
1008 14:51:04.339516 PCI: 00:16.0
1009 14:51:04.349375 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 14:51:04.352636 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 14:51:04.362418 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 14:51:04.365700 I2C: 00:1a
1013 14:51:04.365835 I2C: 00:1a
1014 14:51:04.368972 I2C: 00:1a
1015 14:51:04.369089 I2C: 00:28
1016 14:51:04.372486 I2C: 00:29
1017 14:51:04.372603 PCI: 00:19.2
1018 14:51:04.382431 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 14:51:04.392452 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 14:51:04.395552 PCI: 00:1a.0
1021 14:51:04.405577 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 14:51:04.406015 PCI: 00:1e.0
1023 14:51:04.412142 PCI: 00:1e.2 child on link 0 SPI: 00
1024 14:51:04.422008 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 14:51:04.422206 SPI: 00
1026 14:51:04.425174 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 14:51:04.435488 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 14:51:04.435716 PNP: 0c09.0
1029 14:51:04.445195 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 14:51:04.448370 PCI: 00:1f.2
1031 14:51:04.455022 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 14:51:04.464816 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 14:51:04.471966 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 14:51:04.478633 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 14:51:04.491773 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 14:51:04.492549 GENERIC: 0.0
1037 14:51:04.494857 PCI: 00:1f.5
1038 14:51:04.501111 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 14:51:04.511477 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 14:51:04.517643 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 14:51:04.524124 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 14:51:04.531069 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 14:51:04.537389 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 14:51:04.547353 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 14:51:04.550328 DOMAIN: 0000: Resource ranges:
1046 14:51:04.553672 * Base: 1000, Size: 800, Tag: 100
1047 14:51:04.557391 * Base: 1900, Size: e700, Tag: 100
1048 14:51:04.560189 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 14:51:04.567016 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 14:51:04.573933 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 14:51:04.583642 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 14:51:04.590253 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 14:51:04.597056 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 14:51:04.606337 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 14:51:04.613268 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 14:51:04.620208 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 14:51:04.629934 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 14:51:04.636284 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 14:51:04.642836 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 14:51:04.652691 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 14:51:04.659695 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 14:51:04.665869 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 14:51:04.675711 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 14:51:04.682273 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 14:51:04.688607 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 14:51:04.698723 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 14:51:04.705298 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 14:51:04.712065 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 14:51:04.721974 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 14:51:04.728595 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 14:51:04.734692 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 14:51:04.738027 DOMAIN: 0000: Resource ranges:
1073 14:51:04.744769 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 14:51:04.747814 * Base: d0000000, Size: 2b000000, Tag: 200
1075 14:51:04.751424 * Base: fb001000, Size: 2fff000, Tag: 200
1076 14:51:04.757951 * Base: fe010000, Size: 22000, Tag: 200
1077 14:51:04.761039 * Base: fe033000, Size: a4d000, Tag: 200
1078 14:51:04.764367 * Base: fea88000, Size: 2f8000, Tag: 200
1079 14:51:04.767521 * Base: fed88000, Size: 8000, Tag: 200
1080 14:51:04.770818 * Base: fed93000, Size: d000, Tag: 200
1081 14:51:04.777348 * Base: feda2000, Size: 125e000, Tag: 200
1082 14:51:04.780540 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 14:51:04.787625 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 14:51:04.794836 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 14:51:04.801281 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 14:51:04.807911 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 14:51:04.814777 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 14:51:04.821285 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 14:51:04.827774 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 14:51:04.834675 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 14:51:04.840889 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 14:51:04.847903 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 14:51:04.854175 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 14:51:04.860664 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 14:51:04.867139 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 14:51:04.873657 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 14:51:04.880681 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 14:51:04.886993 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 14:51:04.893769 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 14:51:04.900275 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 14:51:04.907403 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 14:51:04.913277 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 14:51:04.920676 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 14:51:04.930278 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 14:51:04.933977 Root Device assign_resources, bus 0 link: 0
1106 14:51:04.936771 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 14:51:04.946548 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 14:51:04.953203 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 14:51:04.963230 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 14:51:04.970060 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 14:51:04.973438 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 14:51:04.979836 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 14:51:04.986466 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 14:51:04.993164 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 14:51:04.996403 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 14:51:05.006060 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 14:51:05.012686 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 14:51:05.015796 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 14:51:05.022517 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 14:51:05.029001 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 14:51:05.035344 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 14:51:05.039039 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 14:51:05.045698 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 14:51:05.055970 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 14:51:05.059165 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 14:51:05.065965 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 14:51:05.072309 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 14:51:05.082519 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 14:51:05.085572 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 14:51:05.088625 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 14:51:05.098952 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 14:51:05.101910 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 14:51:05.108714 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 14:51:05.115748 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 14:51:05.125136 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 14:51:05.128133 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 14:51:05.132034 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 14:51:05.141798 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 14:51:05.148223 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 14:51:05.157788 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 14:51:05.161375 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 14:51:05.165196 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 14:51:05.171537 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 14:51:05.174715 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 14:51:05.181568 LPC: Trying to open IO window from 800 size 1ff
1146 14:51:05.187817 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 14:51:05.197623 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 14:51:05.201046 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 14:51:05.204129 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 14:51:05.214616 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 14:51:05.217702 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 14:51:05.224176 Root Device assign_resources, bus 0 link: 0
1153 14:51:05.224768 Done setting resources.
1154 14:51:05.230905 Show resources in subtree (Root Device)...After assigning values.
1155 14:51:05.237596 Root Device child on link 0 CPU_CLUSTER: 0
1156 14:51:05.240593 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 14:51:05.241186 APIC: 00
1158 14:51:05.244031 APIC: 02
1159 14:51:05.247214 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 14:51:05.257335 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 14:51:05.267031 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 14:51:05.267475 PCI: 00:00.0
1163 14:51:05.277003 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 14:51:05.286768 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 14:51:05.296728 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 14:51:05.306852 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 14:51:05.313528 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 14:51:05.323431 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 14:51:05.333304 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 14:51:05.343198 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 14:51:05.353077 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 14:51:05.362967 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 14:51:05.369378 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 14:51:05.379315 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 14:51:05.389027 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 14:51:05.398747 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 14:51:05.408395 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 14:51:05.418856 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 14:51:05.428395 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 14:51:05.434956 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 14:51:05.445361 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 14:51:05.448594 PCI: 00:02.0
1183 14:51:05.458467 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 14:51:05.468224 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 14:51:05.478607 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 14:51:05.481496 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 14:51:05.491497 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 14:51:05.494883 GENERIC: 0.0
1189 14:51:05.498133 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 14:51:05.507731 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 14:51:05.510964 GENERIC: 0.0
1192 14:51:05.511500 PCI: 00:08.0
1193 14:51:05.524466 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 14:51:05.527727 PCI: 00:14.0 child on link 0 USB0 port 0
1195 14:51:05.537882 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 14:51:05.540861 USB0 port 0 child on link 0 USB2 port 0
1197 14:51:05.543915 USB2 port 0
1198 14:51:05.544345 USB2 port 1
1199 14:51:05.547517 USB2 port 2
1200 14:51:05.547980 USB2 port 3
1201 14:51:05.550695 USB2 port 4
1202 14:51:05.554200 USB2 port 5
1203 14:51:05.554633 USB2 port 6
1204 14:51:05.557643 USB2 port 7
1205 14:51:05.558072 USB3 port 0
1206 14:51:05.560663 USB3 port 1
1207 14:51:05.561095 USB3 port 2
1208 14:51:05.563935 USB3 port 3
1209 14:51:05.564366 PCI: 00:14.2
1210 14:51:05.570754 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 14:51:05.580657 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 14:51:05.581175 GENERIC: 0.0
1213 14:51:05.584351 PCI: 00:14.5
1214 14:51:05.593734 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 14:51:05.597024 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 14:51:05.607241 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 14:51:05.610191 I2C: 00:2c
1218 14:51:05.610625 I2C: 00:15
1219 14:51:05.613631 PCI: 00:15.1
1220 14:51:05.623516 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 14:51:05.626725 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 14:51:05.636680 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 14:51:05.640080 GENERIC: 0.0
1224 14:51:05.640509 I2C: 00:15
1225 14:51:05.643372 I2C: 00:10
1226 14:51:05.643845 I2C: 00:10
1227 14:51:05.646576 I2C: 00:2c
1228 14:51:05.647005 I2C: 00:40
1229 14:51:05.650236 I2C: 00:10
1230 14:51:05.650756 I2C: 00:39
1231 14:51:05.653375 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 14:51:05.666287 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 14:51:05.666789 I2C: 00:36
1234 14:51:05.667135 I2C: 00:10
1235 14:51:05.669984 I2C: 00:0c
1236 14:51:05.670412 I2C: 00:50
1237 14:51:05.672844 PCI: 00:16.0
1238 14:51:05.683499 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 14:51:05.685953 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 14:51:05.696615 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 14:51:05.699469 I2C: 00:1a
1242 14:51:05.700177 I2C: 00:1a
1243 14:51:05.703037 I2C: 00:1a
1244 14:51:05.703499 I2C: 00:28
1245 14:51:05.706038 I2C: 00:29
1246 14:51:05.706469 PCI: 00:19.2
1247 14:51:05.719390 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 14:51:05.729419 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 14:51:05.729856 PCI: 00:1a.0
1250 14:51:05.739179 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 14:51:05.742694 PCI: 00:1e.0
1252 14:51:05.746249 PCI: 00:1e.2 child on link 0 SPI: 00
1253 14:51:05.755696 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 14:51:05.759030 SPI: 00
1255 14:51:05.762320 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 14:51:05.772077 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 14:51:05.772650 PNP: 0c09.0
1258 14:51:05.781845 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 14:51:05.782277 PCI: 00:1f.2
1260 14:51:05.792050 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 14:51:05.801911 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 14:51:05.805340 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 14:51:05.815175 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 14:51:05.825014 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 14:51:05.828112 GENERIC: 0.0
1266 14:51:05.828417 PCI: 00:1f.5
1267 14:51:05.841356 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 14:51:05.841670 Done allocating resources.
1269 14:51:05.847733 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1270 14:51:05.851268 Enabling resources...
1271 14:51:05.854460 PCI: 00:00.0 subsystem <- 8086/4e22
1272 14:51:05.857612 PCI: 00:00.0 cmd <- 06
1273 14:51:05.861169 PCI: 00:02.0 subsystem <- 8086/4e55
1274 14:51:05.864590 PCI: 00:02.0 cmd <- 03
1275 14:51:05.867925 PCI: 00:04.0 subsystem <- 8086/4e03
1276 14:51:05.870868 PCI: 00:04.0 cmd <- 02
1277 14:51:05.874036 PCI: 00:05.0 bridge ctrl <- 0003
1278 14:51:05.877952 PCI: 00:05.0 subsystem <- 8086/4e19
1279 14:51:05.880926 PCI: 00:05.0 cmd <- 02
1280 14:51:05.881500 PCI: 00:08.0 cmd <- 06
1281 14:51:05.884685 PCI: 00:14.0 subsystem <- 8086/4ded
1282 14:51:05.887602 PCI: 00:14.0 cmd <- 02
1283 14:51:05.891122 PCI: 00:14.3 subsystem <- 8086/4df0
1284 14:51:05.894465 PCI: 00:14.3 cmd <- 02
1285 14:51:05.897703 PCI: 00:14.5 subsystem <- 8086/4df8
1286 14:51:05.901105 PCI: 00:14.5 cmd <- 06
1287 14:51:05.904467 PCI: 00:15.0 subsystem <- 8086/4de8
1288 14:51:05.907310 PCI: 00:15.0 cmd <- 02
1289 14:51:05.910598 PCI: 00:15.1 subsystem <- 8086/4de9
1290 14:51:05.913847 PCI: 00:15.1 cmd <- 02
1291 14:51:05.917445 PCI: 00:15.2 subsystem <- 8086/4dea
1292 14:51:05.917864 PCI: 00:15.2 cmd <- 02
1293 14:51:05.923882 PCI: 00:15.3 subsystem <- 8086/4deb
1294 14:51:05.924283 PCI: 00:15.3 cmd <- 02
1295 14:51:05.927094 PCI: 00:16.0 subsystem <- 8086/4de0
1296 14:51:05.930604 PCI: 00:16.0 cmd <- 02
1297 14:51:05.933750 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 14:51:05.937182 PCI: 00:19.0 cmd <- 02
1299 14:51:05.940462 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 14:51:05.943463 PCI: 00:19.2 cmd <- 06
1301 14:51:05.946890 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 14:51:05.950204 PCI: 00:1a.0 cmd <- 06
1303 14:51:05.953589 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 14:51:05.956752 PCI: 00:1e.2 cmd <- 06
1305 14:51:05.960256 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 14:51:05.960564 PCI: 00:1f.0 cmd <- 407
1307 14:51:05.967101 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 14:51:05.967533 PCI: 00:1f.3 cmd <- 02
1309 14:51:05.970183 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 14:51:05.973594 PCI: 00:1f.5 cmd <- 406
1311 14:51:05.978143 done.
1312 14:51:05.981283 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1313 14:51:05.985315 Initializing devices...
1314 14:51:05.988192 Root Device init
1315 14:51:05.988620 mainboard: EC init
1316 14:51:05.994828 Chrome EC: Set SMI mask to 0x0000000000000000
1317 14:51:06.001364 Chrome EC: clear events_b mask to 0x0000000000000000
1318 14:51:06.004466 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 14:51:06.011870 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 14:51:06.018185 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 14:51:06.021446 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 14:51:06.029323 Root Device init finished in 36 msecs
1323 14:51:06.032732 PCI: 00:00.0 init
1324 14:51:06.033160 CPU TDP = 6 Watts
1325 14:51:06.035646 CPU PL1 = 7 Watts
1326 14:51:06.039271 CPU PL2 = 12 Watts
1327 14:51:06.042251 PCI: 00:00.0 init finished in 6 msecs
1328 14:51:06.042675 PCI: 00:02.0 init
1329 14:51:06.045643 GMA: Found VBT in CBFS
1330 14:51:06.049074 GMA: Found valid VBT in CBFS
1331 14:51:06.055682 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 14:51:06.062354 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 14:51:06.065315 PCI: 00:02.0 init finished in 18 msecs
1334 14:51:06.069075 PCI: 00:08.0 init
1335 14:51:06.072233 PCI: 00:08.0 init finished in 0 msecs
1336 14:51:06.075609 PCI: 00:14.0 init
1337 14:51:06.079199 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 14:51:06.081951 PCI: 00:14.0 init finished in 4 msecs
1339 14:51:06.085324 PCI: 00:15.0 init
1340 14:51:06.088493 I2C bus 0 version 0x3230302a
1341 14:51:06.091622 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 14:51:06.095088 PCI: 00:15.0 init finished in 6 msecs
1343 14:51:06.098431 PCI: 00:15.1 init
1344 14:51:06.101536 I2C bus 1 version 0x3230302a
1345 14:51:06.104879 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 14:51:06.108290 PCI: 00:15.1 init finished in 6 msecs
1347 14:51:06.111552 PCI: 00:15.2 init
1348 14:51:06.111675 I2C bus 2 version 0x3230302a
1349 14:51:06.118511 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 14:51:06.121540 PCI: 00:15.2 init finished in 6 msecs
1351 14:51:06.121619 PCI: 00:15.3 init
1352 14:51:06.124882 I2C bus 3 version 0x3230302a
1353 14:51:06.128174 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 14:51:06.131499 PCI: 00:15.3 init finished in 6 msecs
1355 14:51:06.135017 PCI: 00:16.0 init
1356 14:51:06.138166 PCI: 00:16.0 init finished in 0 msecs
1357 14:51:06.141486 PCI: 00:19.0 init
1358 14:51:06.145285 I2C bus 4 version 0x3230302a
1359 14:51:06.148301 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 14:51:06.151104 PCI: 00:19.0 init finished in 6 msecs
1361 14:51:06.154875 PCI: 00:1a.0 init
1362 14:51:06.157847 PCI: 00:1a.0 init finished in 0 msecs
1363 14:51:06.161065 PCI: 00:1f.0 init
1364 14:51:06.164405 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 14:51:06.167876 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 14:51:06.170999 IOAPIC: ID = 0x02
1367 14:51:06.174420 IOAPIC: Dumping registers
1368 14:51:06.174505 reg 0x0000: 0x02000000
1369 14:51:06.177582 reg 0x0001: 0x00770020
1370 14:51:06.180787 reg 0x0002: 0x00000000
1371 14:51:06.184041 PCI: 00:1f.0 init finished in 21 msecs
1372 14:51:06.187221 PCI: 00:1f.2 init
1373 14:51:06.191044 Disabling ACPI via APMC.
1374 14:51:06.194568 APMC done.
1375 14:51:06.197644 PCI: 00:1f.2 init finished in 5 msecs
1376 14:51:06.207802 PNP: 0c09.0 init
1377 14:51:06.211117 Google Chrome EC uptime: 6.540 seconds
1378 14:51:06.217884 Google Chrome AP resets since EC boot: 0
1379 14:51:06.221162 Google Chrome most recent AP reset causes:
1380 14:51:06.227702 Google Chrome EC reset flags at last EC boot: reset-pin
1381 14:51:06.231113 PNP: 0c09.0 init finished in 18 msecs
1382 14:51:06.231221 Devices initialized
1383 14:51:06.234385 Show all devs... After init.
1384 14:51:06.237485 Root Device: enabled 1
1385 14:51:06.241234 CPU_CLUSTER: 0: enabled 1
1386 14:51:06.244594 DOMAIN: 0000: enabled 1
1387 14:51:06.244697 PCI: 00:00.0: enabled 1
1388 14:51:06.248097 PCI: 00:02.0: enabled 1
1389 14:51:06.250820 PCI: 00:04.0: enabled 1
1390 14:51:06.250905 PCI: 00:05.0: enabled 1
1391 14:51:06.254067 PCI: 00:09.0: enabled 0
1392 14:51:06.257618 PCI: 00:12.6: enabled 0
1393 14:51:06.261033 PCI: 00:14.0: enabled 1
1394 14:51:06.261109 PCI: 00:14.1: enabled 0
1395 14:51:06.264155 PCI: 00:14.2: enabled 0
1396 14:51:06.267412 PCI: 00:14.3: enabled 1
1397 14:51:06.271033 PCI: 00:14.5: enabled 1
1398 14:51:06.271116 PCI: 00:15.0: enabled 1
1399 14:51:06.274500 PCI: 00:15.1: enabled 1
1400 14:51:06.277487 PCI: 00:15.2: enabled 1
1401 14:51:06.280906 PCI: 00:15.3: enabled 1
1402 14:51:06.280988 PCI: 00:16.0: enabled 1
1403 14:51:06.284379 PCI: 00:16.1: enabled 0
1404 14:51:06.287310 PCI: 00:16.4: enabled 0
1405 14:51:06.290319 PCI: 00:16.5: enabled 0
1406 14:51:06.290431 PCI: 00:17.0: enabled 0
1407 14:51:06.294176 PCI: 00:19.0: enabled 1
1408 14:51:06.297479 PCI: 00:19.1: enabled 0
1409 14:51:06.297561 PCI: 00:19.2: enabled 1
1410 14:51:06.301021 PCI: 00:1a.0: enabled 1
1411 14:51:06.303684 PCI: 00:1c.0: enabled 0
1412 14:51:06.306827 PCI: 00:1c.1: enabled 0
1413 14:51:06.306915 PCI: 00:1c.2: enabled 0
1414 14:51:06.310457 PCI: 00:1c.3: enabled 0
1415 14:51:06.313841 PCI: 00:1c.4: enabled 0
1416 14:51:06.317046 PCI: 00:1c.5: enabled 0
1417 14:51:06.317128 PCI: 00:1c.6: enabled 0
1418 14:51:06.320109 PCI: 00:1c.7: enabled 1
1419 14:51:06.323431 PCI: 00:1e.0: enabled 0
1420 14:51:06.326753 PCI: 00:1e.1: enabled 0
1421 14:51:06.326835 PCI: 00:1e.2: enabled 1
1422 14:51:06.330031 PCI: 00:1e.3: enabled 0
1423 14:51:06.333246 PCI: 00:1f.0: enabled 1
1424 14:51:06.333330 PCI: 00:1f.1: enabled 0
1425 14:51:06.336539 PCI: 00:1f.2: enabled 1
1426 14:51:06.340008 PCI: 00:1f.3: enabled 1
1427 14:51:06.343393 PCI: 00:1f.4: enabled 0
1428 14:51:06.343477 PCI: 00:1f.5: enabled 1
1429 14:51:06.346903 PCI: 00:1f.7: enabled 0
1430 14:51:06.350135 GENERIC: 0.0: enabled 1
1431 14:51:06.353706 GENERIC: 0.0: enabled 1
1432 14:51:06.353790 USB0 port 0: enabled 1
1433 14:51:06.356854 GENERIC: 0.0: enabled 1
1434 14:51:06.360002 I2C: 00:2c: enabled 1
1435 14:51:06.360086 I2C: 00:15: enabled 1
1436 14:51:06.363022 GENERIC: 0.0: enabled 0
1437 14:51:06.366397 I2C: 00:15: enabled 1
1438 14:51:06.370005 I2C: 00:10: enabled 0
1439 14:51:06.370098 I2C: 00:10: enabled 0
1440 14:51:06.372964 I2C: 00:2c: enabled 1
1441 14:51:06.376226 I2C: 00:40: enabled 1
1442 14:51:06.376320 I2C: 00:10: enabled 1
1443 14:51:06.379468 I2C: 00:39: enabled 1
1444 14:51:06.383216 I2C: 00:36: enabled 1
1445 14:51:06.383298 I2C: 00:10: enabled 0
1446 14:51:06.386547 I2C: 00:0c: enabled 1
1447 14:51:06.389903 I2C: 00:50: enabled 1
1448 14:51:06.389985 I2C: 00:1a: enabled 1
1449 14:51:06.392778 I2C: 00:1a: enabled 0
1450 14:51:06.396369 I2C: 00:1a: enabled 0
1451 14:51:06.396453 I2C: 00:28: enabled 1
1452 14:51:06.399329 I2C: 00:29: enabled 1
1453 14:51:06.402976 PCI: 00:00.0: enabled 1
1454 14:51:06.403058 SPI: 00: enabled 1
1455 14:51:06.406271 PNP: 0c09.0: enabled 1
1456 14:51:06.409536 GENERIC: 0.0: enabled 0
1457 14:51:06.409619 USB2 port 0: enabled 1
1458 14:51:06.412752 USB2 port 1: enabled 1
1459 14:51:06.415943 USB2 port 2: enabled 1
1460 14:51:06.419236 USB2 port 3: enabled 1
1461 14:51:06.419334 USB2 port 4: enabled 0
1462 14:51:06.423052 USB2 port 5: enabled 1
1463 14:51:06.425777 USB2 port 6: enabled 0
1464 14:51:06.425873 USB2 port 7: enabled 1
1465 14:51:06.429669 USB3 port 0: enabled 1
1466 14:51:06.433092 USB3 port 1: enabled 1
1467 14:51:06.435725 USB3 port 2: enabled 1
1468 14:51:06.435803 USB3 port 3: enabled 1
1469 14:51:06.439146 APIC: 00: enabled 1
1470 14:51:06.439219 APIC: 02: enabled 1
1471 14:51:06.442493 PCI: 00:08.0: enabled 1
1472 14:51:06.449434 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1473 14:51:06.452395 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 14:51:06.455737 ELOG: NV offset 0xbfa000 size 0x1000
1475 14:51:06.463873 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 14:51:06.470705 ELOG: Event(17) added with size 13 at 2023-05-03 14:51:06 UTC
1477 14:51:06.477116 ELOG: Event(92) added with size 9 at 2023-05-03 14:51:06 UTC
1478 14:51:06.483471 ELOG: Event(93) added with size 9 at 2023-05-03 14:51:06 UTC
1479 14:51:06.490404 ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:06 UTC
1480 14:51:06.497119 ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:06 UTC
1481 14:51:06.503239 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 14:51:06.507297 ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:06 UTC
1483 14:51:06.516663 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 14:51:06.523385 ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:06 UTC
1485 14:51:06.526486 elog_add_boot_reason: Logged dev mode boot
1486 14:51:06.533545 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 14:51:06.533630 Finalize devices...
1488 14:51:06.536825 Devices finalized
1489 14:51:06.542880 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 14:51:06.546371 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 14:51:06.552865 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 14:51:06.556794 ME: HFSTS1 : 0x80030045
1493 14:51:06.559813 ME: HFSTS2 : 0x30280136
1494 14:51:06.566128 ME: HFSTS3 : 0x00000050
1495 14:51:06.569380 ME: HFSTS4 : 0x00004000
1496 14:51:06.573112 ME: HFSTS5 : 0x00000000
1497 14:51:06.576308 ME: HFSTS6 : 0x40400006
1498 14:51:06.579521 ME: Manufacturing Mode : NO
1499 14:51:06.582987 ME: FW Partition Table : OK
1500 14:51:06.586318 ME: Bringup Loader Failure : NO
1501 14:51:06.589183 ME: Firmware Init Complete : NO
1502 14:51:06.592870 ME: Boot Options Present : NO
1503 14:51:06.596088 ME: Update In Progress : NO
1504 14:51:06.599400 ME: D0i3 Support : YES
1505 14:51:06.602711 ME: Low Power State Enabled : NO
1506 14:51:06.606047 ME: CPU Replaced : YES
1507 14:51:06.609096 ME: CPU Replacement Valid : YES
1508 14:51:06.612429 ME: Current Working State : 5
1509 14:51:06.615793 ME: Current Operation State : 1
1510 14:51:06.619092 ME: Current Operation Mode : 3
1511 14:51:06.622347 ME: Error Code : 0
1512 14:51:06.625444 ME: CPU Debug Disabled : YES
1513 14:51:06.629345 ME: TXT Support : NO
1514 14:51:06.635748 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1515 14:51:06.642329 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 14:51:06.646062 ACPI: Writing ACPI tables at 76b27000.
1517 14:51:06.648757 ACPI: * FACS
1518 14:51:06.648845 ACPI: * DSDT
1519 14:51:06.652018 Ramoops buffer: 0x100000@0x76a26000.
1520 14:51:06.659163 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 14:51:06.662315 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 14:51:06.665112 Google Chrome EC: version:
1523 14:51:06.668590 ro: magolor_1.1.9999-103b6f9
1524 14:51:06.671844 rw: magolor_1.1.9999-103b6f9
1525 14:51:06.675147 running image: 1
1526 14:51:06.678337 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 14:51:06.683032 ACPI: * FADT
1528 14:51:06.683116 SCI is IRQ9
1529 14:51:06.689900 ACPI: added table 1/32, length now 40
1530 14:51:06.689992 ACPI: * SSDT
1531 14:51:06.692881 Found 1 CPU(s) with 2 core(s) each.
1532 14:51:06.696318 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 14:51:06.702901 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 14:51:06.706349 Could not locate 'wifi_sar' in VPD.
1535 14:51:06.709505 Checking CBFS for default SAR values
1536 14:51:06.716442 wifi_sar_defaults.hex has bad len in CBFS
1537 14:51:06.719724 failed from getting SAR limits!
1538 14:51:06.723351 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 14:51:06.729304 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 14:51:06.733189 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 14:51:06.739427 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 14:51:06.742581 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 14:51:06.749385 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 14:51:06.752722 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 14:51:06.759323 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 14:51:06.766005 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 14:51:06.772828 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 14:51:06.775968 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 14:51:06.782417 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 14:51:06.789340 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 14:51:06.792250 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 14:51:06.795907 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 14:51:06.803536 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 14:51:06.806579 PS2K: Passing 101 keymaps to kernel
1555 14:51:06.813394 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 14:51:06.820098 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 14:51:06.823830 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 14:51:06.830117 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 14:51:06.833224 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 14:51:06.840307 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 14:51:06.846787 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 14:51:06.853258 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 14:51:06.856754 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 14:51:06.863386 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 14:51:06.866420 ACPI: added table 2/32, length now 44
1566 14:51:06.869824 ACPI: * MCFG
1567 14:51:06.872999 ACPI: added table 3/32, length now 48
1568 14:51:06.873082 ACPI: * TPM2
1569 14:51:06.876371 TPM2 log created at 0x76a16000
1570 14:51:06.879916 ACPI: added table 4/32, length now 52
1571 14:51:06.883338 ACPI: * MADT
1572 14:51:06.883421 SCI is IRQ9
1573 14:51:06.886616 ACPI: added table 5/32, length now 56
1574 14:51:06.889500 current = 76b2d580
1575 14:51:06.893139 ACPI: * DMAR
1576 14:51:06.896240 ACPI: added table 6/32, length now 60
1577 14:51:06.899614 ACPI: added table 7/32, length now 64
1578 14:51:06.899706 ACPI: * HPET
1579 14:51:06.903094 ACPI: added table 8/32, length now 68
1580 14:51:06.906336 ACPI: done.
1581 14:51:06.909555 ACPI tables: 26304 bytes.
1582 14:51:06.913312 smbios_write_tables: 76a15000
1583 14:51:06.916629 EC returned error result code 3
1584 14:51:06.919520 Couldn't obtain OEM name from CBI
1585 14:51:06.922819 Create SMBIOS type 16
1586 14:51:06.922905 Create SMBIOS type 17
1587 14:51:06.926344 GENERIC: 0.0 (WIFI Device)
1588 14:51:06.929581 SMBIOS tables: 913 bytes.
1589 14:51:06.932803 Writing table forward entry at 0x00000500
1590 14:51:06.939349 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 14:51:06.943151 Writing coreboot table at 0x76b4b000
1592 14:51:06.949537 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 14:51:06.953161 1. 0000000000001000-000000000009ffff: RAM
1594 14:51:06.959393 2. 00000000000a0000-00000000000fffff: RESERVED
1595 14:51:06.962595 3. 0000000000100000-0000000076a14fff: RAM
1596 14:51:06.969252 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 14:51:06.972550 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 14:51:06.979048 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 14:51:06.985642 7. 0000000077000000-000000007fbfffff: RESERVED
1600 14:51:06.989030 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 14:51:06.992401 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 14:51:06.998971 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 14:51:07.002631 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 14:51:07.009143 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 14:51:07.012262 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 14:51:07.019128 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 14:51:07.022221 15. 0000000100000000-00000001803fffff: RAM
1608 14:51:07.025959 Passing 4 GPIOs to payload:
1609 14:51:07.029066 NAME | PORT | POLARITY | VALUE
1610 14:51:07.035689 lid | undefined | high | high
1611 14:51:07.042325 power | undefined | high | low
1612 14:51:07.045690 oprom | undefined | high | low
1613 14:51:07.052131 EC in RW | 0x000000b9 | high | low
1614 14:51:07.058568 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum c2b4
1615 14:51:07.062623 coreboot table: 1504 bytes.
1616 14:51:07.065640 IMD ROOT 0. 0x76fff000 0x00001000
1617 14:51:07.068958 IMD SMALL 1. 0x76ffe000 0x00001000
1618 14:51:07.072452 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 14:51:07.075384 CONSOLE 3. 0x76c2e000 0x00020000
1620 14:51:07.078742 FMAP 4. 0x76c2d000 0x00000578
1621 14:51:07.082015 TIME STAMP 5. 0x76c2c000 0x00000910
1622 14:51:07.085331 VBOOT WORK 6. 0x76c18000 0x00014000
1623 14:51:07.091988 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 14:51:07.095489 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 14:51:07.098840 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 14:51:07.101718 REFCODE 10. 0x76b67000 0x00040000
1627 14:51:07.105020 SMM BACKUP 11. 0x76b57000 0x00010000
1628 14:51:07.108607 4f444749 12. 0x76b55000 0x00002000
1629 14:51:07.111874 EXT VBT13. 0x76b53000 0x00001c43
1630 14:51:07.115105 COREBOOT 14. 0x76b4b000 0x00008000
1631 14:51:07.118301 ACPI 15. 0x76b27000 0x00024000
1632 14:51:07.125253 ACPI GNVS 16. 0x76b26000 0x00001000
1633 14:51:07.128633 RAMOOPS 17. 0x76a26000 0x00100000
1634 14:51:07.131718 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 14:51:07.135055 SMBIOS 19. 0x76a15000 0x00000800
1636 14:51:07.135564 IMD small region:
1637 14:51:07.141447 IMD ROOT 0. 0x76ffec00 0x00000400
1638 14:51:07.144814 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 14:51:07.148079 VPD 2. 0x76ffeb80 0x0000004c
1640 14:51:07.151409 POWER STATE 3. 0x76ffeb40 0x00000040
1641 14:51:07.154877 ROMSTAGE 4. 0x76ffeb20 0x00000004
1642 14:51:07.161514 MEM INFO 5. 0x76ffe940 0x000001e0
1643 14:51:07.165132 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1644 14:51:07.168215 MTRR: Physical address space:
1645 14:51:07.174475 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 14:51:07.181545 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 14:51:07.187771 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 14:51:07.194494 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 14:51:07.201164 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 14:51:07.207820 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 14:51:07.210973 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 14:51:07.217897 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 14:51:07.221235 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 14:51:07.224495 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 14:51:07.227483 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 14:51:07.234185 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 14:51:07.237626 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 14:51:07.240776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 14:51:07.244213 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 14:51:07.250508 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 14:51:07.254092 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 14:51:07.257221 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 14:51:07.260485 call enable_fixed_mtrr()
1664 14:51:07.263836 CPU physical address size: 39 bits
1665 14:51:07.267204 MTRR: default type WB/UC MTRR counts: 6/5.
1666 14:51:07.270468 MTRR: UC selected as default type.
1667 14:51:07.277034 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 14:51:07.284085 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 14:51:07.290521 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 14:51:07.297062 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 14:51:07.304001 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 14:51:07.304431
1673 14:51:07.304770 MTRR check
1674 14:51:07.307139 Fixed MTRRs : Enabled
1675 14:51:07.310518 Variable MTRRs: Enabled
1676 14:51:07.311031
1677 14:51:07.313780 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 14:51:07.317117 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 14:51:07.323097 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 14:51:07.326742 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 14:51:07.330232 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 14:51:07.333793 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 14:51:07.336509 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 14:51:07.343804 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 14:51:07.346587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 14:51:07.349709 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 14:51:07.353192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 14:51:07.359860 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 14:51:07.363015 call enable_fixed_mtrr()
1690 14:51:07.366484 Checking cr50 for pending updates
1691 14:51:07.370340 CPU physical address size: 39 bits
1692 14:51:07.373707 Reading cr50 TPM mode
1693 14:51:07.383621 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1694 14:51:07.391164 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 14:51:07.393933 Checking segment from ROM address 0xfff9d5b8
1696 14:51:07.400527 Checking segment from ROM address 0xfff9d5d4
1697 14:51:07.404015 Loading segment from ROM address 0xfff9d5b8
1698 14:51:07.407277 code (compression=0)
1699 14:51:07.414173 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 14:51:07.423980 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 14:51:07.426953 it's not compressed!
1702 14:51:07.553426 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 14:51:07.559678 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 14:51:07.567405 Loading segment from ROM address 0xfff9d5d4
1705 14:51:07.570515 Entry Point 0x30000000
1706 14:51:07.571073 Loaded segments
1707 14:51:07.577081 BS: BS_PAYLOAD_LOAD run times (exec / console): 127 / 60 ms
1708 14:51:07.593293 Finalizing chipset.
1709 14:51:07.596544 Finalizing SMM.
1710 14:51:07.597203 APMC done.
1711 14:51:07.602922 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 14:51:07.606639 mp_park_aps done after 0 msecs.
1713 14:51:07.613766 Jumping to boot code at 0x30000000(0x76b4b000)
1714 14:51:07.619864 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 14:51:07.620300
1716 14:51:07.620741
1717 14:51:07.621065
1718 14:51:07.623079 Starting depthcharge on Magolor...
1719 14:51:07.623451
1720 14:51:07.624517 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 14:51:07.625067 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 14:51:07.625495 Setting prompt string to ['dedede:']
1723 14:51:07.626025 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 14:51:07.633428 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1725 14:51:07.633945
1726 14:51:07.639556 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1727 14:51:07.640024
1728 14:51:07.642793 fw_config match found: AUDIO_AMP=UNPROVISIONED
1729 14:51:07.643215
1730 14:51:07.646034 Wipe memory regions:
1731 14:51:07.646455
1732 14:51:07.649459 [0x00000000001000, 0x000000000a0000)
1733 14:51:07.649881
1734 14:51:07.652766 [0x00000000100000, 0x00000030000000)
1735 14:51:07.782382
1736 14:51:07.785411 [0x00000031062170, 0x00000076a15000)
1737 14:51:07.955032
1738 14:51:07.958276 [0x00000100000000, 0x00000180400000)
1739 14:51:09.020722
1740 14:51:09.021214 R8152: Initializing
1741 14:51:09.021621
1742 14:51:09.024076 Version 6 (ocp_data = 5c30)
1743 14:51:09.027552
1744 14:51:09.028091 R8152: Done initializing
1745 14:51:09.028434
1746 14:51:09.030951 Adding net device
1747 14:51:09.031393
1748 14:51:09.034303 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1749 14:51:09.037367
1750 14:51:09.037863
1751 14:51:09.038207
1752 14:51:09.038945 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 14:51:09.140121 dedede: tftpboot 192.168.201.1 10185577/tftp-deploy-dewdggek/kernel/bzImage 10185577/tftp-deploy-dewdggek/kernel/cmdline 10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
1755 14:51:09.140697 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 14:51:09.141122 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1757 14:51:09.145183 tftpboot 192.168.201.1 10185577/tftp-deploy-dewdggek/kernel/bzIploy-dewdggek/kernel/cmdline 10185577/tftp-deploy-dewdggek/ramdisk/ramdisk.cpio.gz
1758 14:51:09.145628
1759 14:51:09.146134 Waiting for link
1760 14:51:09.347082
1761 14:51:09.347564 done.
1762 14:51:09.347944
1763 14:51:09.348294 MAC: 00:24:32:30:7b:c4
1764 14:51:09.348808
1765 14:51:09.350534 Sending DHCP discover... done.
1766 14:51:09.350957
1767 14:51:09.353613 Waiting for reply... done.
1768 14:51:09.354036
1769 14:51:09.356833 Sending DHCP request... done.
1770 14:51:09.357258
1771 14:51:09.363922 Waiting for reply... done.
1772 14:51:09.364528
1773 14:51:09.365009 My ip is 192.168.201.12
1774 14:51:09.365462
1775 14:51:09.366736 The DHCP server ip is 192.168.201.1
1776 14:51:09.370257
1777 14:51:09.373455 TFTP server IP predefined by user: 192.168.201.1
1778 14:51:09.374101
1779 14:51:09.379953 Bootfile predefined by user: 10185577/tftp-deploy-dewdggek/kernel/bzImage
1780 14:51:09.380529
1781 14:51:09.383574 Sending tftp read request... done.
1782 14:51:09.384089
1783 14:51:09.392209 Waiting for the transfer...
1784 14:51:09.392666
1785 14:51:09.973969 00000000 ################################################################
1786 14:51:09.974133
1787 14:51:10.523492 00080000 ################################################################
1788 14:51:10.523683
1789 14:51:11.064915 00100000 ################################################################
1790 14:51:11.065048
1791 14:51:11.602157 00180000 ################################################################
1792 14:51:11.602301
1793 14:51:12.156287 00200000 ################################################################
1794 14:51:12.156430
1795 14:51:12.699976 00280000 ################################################################
1796 14:51:12.700114
1797 14:51:13.236210 00300000 ################################################################
1798 14:51:13.236385
1799 14:51:13.765370 00380000 ################################################################
1800 14:51:13.765509
1801 14:51:14.295030 00400000 ################################################################
1802 14:51:14.295168
1803 14:51:14.821937 00480000 ################################################################
1804 14:51:14.822075
1805 14:51:15.348895 00500000 ################################################################
1806 14:51:15.349069
1807 14:51:15.873751 00580000 ################################################################
1808 14:51:15.873932
1809 14:51:16.402238 00600000 ################################################################
1810 14:51:16.402374
1811 14:51:16.934901 00680000 ################################################################
1812 14:51:16.935042
1813 14:51:17.465862 00700000 ################################################################
1814 14:51:17.466002
1815 14:51:17.478642 00780000 ## done.
1816 14:51:17.478750
1817 14:51:17.482013 The bootfile was 7876496 bytes long.
1818 14:51:17.482102
1819 14:51:17.485161 Sending tftp read request... done.
1820 14:51:17.485251
1821 14:51:17.488364 Waiting for the transfer...
1822 14:51:17.488452
1823 14:51:18.024266 00000000 ################################################################
1824 14:51:18.024401
1825 14:51:18.552262 00080000 ################################################################
1826 14:51:18.552428
1827 14:51:19.079432 00100000 ################################################################
1828 14:51:19.079586
1829 14:51:19.609119 00180000 ################################################################
1830 14:51:19.609280
1831 14:51:20.153989 00200000 ################################################################
1832 14:51:20.154158
1833 14:51:20.690431 00280000 ################################################################
1834 14:51:20.690596
1835 14:51:21.229748 00300000 ################################################################
1836 14:51:21.229876
1837 14:51:21.771887 00380000 ################################################################
1838 14:51:21.772025
1839 14:51:22.312942 00400000 ################################################################
1840 14:51:22.313080
1841 14:51:22.859807 00480000 ################################################################
1842 14:51:22.859979
1843 14:51:23.412218 00500000 ################################################################
1844 14:51:23.412402
1845 14:51:23.928396 00580000 ################################################################
1846 14:51:23.928585
1847 14:51:24.450538 00600000 ################################################################
1848 14:51:24.450673
1849 14:51:24.987360 00680000 ################################################################
1850 14:51:24.987534
1851 14:51:25.512470 00700000 ################################################################
1852 14:51:25.512669
1853 14:51:26.035004 00780000 ################################################################
1854 14:51:26.035158
1855 14:51:26.464621 00800000 ##################################################### done.
1856 14:51:26.464767
1857 14:51:26.468036 Sending tftp read request... done.
1858 14:51:26.468141
1859 14:51:26.471213 Waiting for the transfer...
1860 14:51:26.471328
1861 14:51:26.471433 00000000 # done.
1862 14:51:26.471527
1863 14:51:26.481263 Command line loaded dynamically from TFTP file: 10185577/tftp-deploy-dewdggek/kernel/cmdline
1864 14:51:26.481354
1865 14:51:26.494644 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1866 14:51:26.494736
1867 14:51:26.497888 ec_init: CrosEC protocol v3 supported (256, 256)
1868 14:51:26.505312
1869 14:51:26.508437 Shutting down all USB controllers.
1870 14:51:26.508546
1871 14:51:26.508639 Removing current net device
1872 14:51:26.508737
1873 14:51:26.512057 Finalizing coreboot
1874 14:51:26.512204
1875 14:51:26.518557 Exiting depthcharge with code 4 at timestamp: 25691974
1876 14:51:26.518645
1877 14:51:26.518711
1878 14:51:26.518773 Starting kernel ...
1879 14:51:26.518833
1880 14:51:26.518891
1881 14:51:26.519253 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
1882 14:51:26.519350 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
1883 14:51:26.519489 Setting prompt string to ['Linux version [0-9]']
1884 14:51:26.519632 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1885 14:51:26.519711 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1887 14:55:54.519652 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
1889 14:55:54.519866 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
1891 14:55:54.520026 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1894 14:55:54.520276 end: 2 depthcharge-action (duration 00:05:00) [common]
1896 14:55:54.520499 Cleaning after the job
1897 14:55:54.520591 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/ramdisk
1898 14:55:54.521710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/kernel
1899 14:55:54.522659 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185577/tftp-deploy-dewdggek/modules
1900 14:55:54.522984 start: 5.1 power-off (timeout 00:00:30) [common]
1901 14:55:54.523149 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1902 14:55:54.600246 >> Command sent successfully.
1903 14:55:54.602651 Returned 0 in 0 seconds
1904 14:55:54.703061 end: 5.1 power-off (duration 00:00:00) [common]
1906 14:55:54.703417 start: 5.2 read-feedback (timeout 00:10:00) [common]
1907 14:55:54.703730 Listened to connection for namespace 'common' for up to 1s
1909 14:55:54.704124 Listened to connection for namespace 'common' for up to 1s
1910 14:55:55.703655 Finalising connection for namespace 'common'
1911 14:55:55.703851 Disconnecting from shell: Finalise
1912 14:55:55.703933
1913 14:55:55.804264 end: 5.2 read-feedback (duration 00:00:01) [common]
1914 14:55:55.804416 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185577
1915 14:55:55.818832 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185577
1916 14:55:55.819005 JobError: Your job cannot terminate cleanly.