Boot log: asus-C436FA-Flip-hatch

    1 14:50:46.309823  lava-dispatcher, installed at version: 2023.03
    2 14:50:46.310051  start: 0 validate
    3 14:50:46.310189  Start time: 2023-05-03 14:50:46.310180+00:00 (UTC)
    4 14:50:46.310337  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:50:46.310490  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230421.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:50:46.598135  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:50:46.598393  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:50:46.889166  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:50:46.889374  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:50:51.194371  validate duration: 4.88
   12 14:50:51.194722  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:50:51.194849  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:50:51.194960  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:50:51.195115  Not decompressing ramdisk as can be used compressed.
   16 14:50:51.195222  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230421.0/x86/rootfs.cpio.gz
   17 14:50:51.195304  saving as /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/ramdisk/rootfs.cpio.gz
   18 14:50:51.195383  total size: 8429989 (8MB)
   19 14:50:51.776344  progress   0% (0MB)
   20 14:50:51.783430  progress   5% (0MB)
   21 14:50:51.786211  progress  10% (0MB)
   22 14:50:51.788803  progress  15% (1MB)
   23 14:50:51.791534  progress  20% (1MB)
   24 14:50:51.794230  progress  25% (2MB)
   25 14:50:51.796809  progress  30% (2MB)
   26 14:50:51.799406  progress  35% (2MB)
   27 14:50:51.801803  progress  40% (3MB)
   28 14:50:51.804376  progress  45% (3MB)
   29 14:50:51.806956  progress  50% (4MB)
   30 14:50:51.809594  progress  55% (4MB)
   31 14:50:51.812100  progress  60% (4MB)
   32 14:50:51.814558  progress  65% (5MB)
   33 14:50:51.816899  progress  70% (5MB)
   34 14:50:51.819072  progress  75% (6MB)
   35 14:50:51.821765  progress  80% (6MB)
   36 14:50:51.824064  progress  85% (6MB)
   37 14:50:51.826595  progress  90% (7MB)
   38 14:50:51.828889  progress  95% (7MB)
   39 14:50:51.831393  progress 100% (8MB)
   40 14:50:51.831535  8MB downloaded in 0.64s (12.64MB/s)
   41 14:50:51.831683  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:50:51.831924  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:50:51.832024  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:50:51.832154  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:50:51.832284  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:50:51.832354  saving as /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/kernel/bzImage
   48 14:50:51.832414  total size: 7876496 (7MB)
   49 14:50:51.832473  No compression specified
   50 14:50:51.833645  progress   0% (0MB)
   51 14:50:51.835879  progress   5% (0MB)
   52 14:50:51.838211  progress  10% (0MB)
   53 14:50:51.840338  progress  15% (1MB)
   54 14:50:51.842514  progress  20% (1MB)
   55 14:50:51.844634  progress  25% (1MB)
   56 14:50:51.846807  progress  30% (2MB)
   57 14:50:51.848926  progress  35% (2MB)
   58 14:50:51.851105  progress  40% (3MB)
   59 14:50:51.853270  progress  45% (3MB)
   60 14:50:51.855562  progress  50% (3MB)
   61 14:50:51.857807  progress  55% (4MB)
   62 14:50:51.860043  progress  60% (4MB)
   63 14:50:51.862294  progress  65% (4MB)
   64 14:50:51.864535  progress  70% (5MB)
   65 14:50:51.866776  progress  75% (5MB)
   66 14:50:51.869015  progress  80% (6MB)
   67 14:50:51.871263  progress  85% (6MB)
   68 14:50:51.873501  progress  90% (6MB)
   69 14:50:51.875742  progress  95% (7MB)
   70 14:50:51.878005  progress 100% (7MB)
   71 14:50:51.878165  7MB downloaded in 0.05s (164.20MB/s)
   72 14:50:51.878311  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:50:51.878554  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:50:51.878646  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:50:51.878735  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:50:51.878880  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:50:51.878953  saving as /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/modules/modules.tar
   79 14:50:51.879019  total size: 251268 (0MB)
   80 14:50:51.879083  Using unxz to decompress xz
   81 14:50:51.883039  progress  13% (0MB)
   82 14:50:51.883462  progress  26% (0MB)
   83 14:50:51.883722  progress  39% (0MB)
   84 14:50:51.885231  progress  52% (0MB)
   85 14:50:51.887476  progress  65% (0MB)
   86 14:50:51.889540  progress  78% (0MB)
   87 14:50:51.891538  progress  91% (0MB)
   88 14:50:51.893501  progress 100% (0MB)
   89 14:50:51.899533  0MB downloaded in 0.02s (11.69MB/s)
   90 14:50:51.899823  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:50:51.900113  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:50:51.900234  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 14:50:51.900349  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 14:50:51.900437  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:50:51.900529  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 14:50:51.900763  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz
   98 14:50:51.900903  makedir: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin
   99 14:50:51.901014  makedir: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/tests
  100 14:50:51.901116  makedir: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/results
  101 14:50:51.901241  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-add-keys
  102 14:50:51.901396  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-add-sources
  103 14:50:51.901538  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-background-process-start
  104 14:50:51.901690  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-background-process-stop
  105 14:50:51.901825  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-common-functions
  106 14:50:51.901958  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-echo-ipv4
  107 14:50:51.902091  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-install-packages
  108 14:50:51.902242  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-installed-packages
  109 14:50:51.902457  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-os-build
  110 14:50:51.902673  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-probe-channel
  111 14:50:51.902812  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-probe-ip
  112 14:50:51.902950  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-target-ip
  113 14:50:51.903086  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-target-mac
  114 14:50:51.903306  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-target-storage
  115 14:50:51.903535  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-case
  116 14:50:51.903678  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-event
  117 14:50:51.903812  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-feedback
  118 14:50:51.903947  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-raise
  119 14:50:51.904086  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-reference
  120 14:50:51.904253  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-runner
  121 14:50:51.904414  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-set
  122 14:50:51.904552  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-test-shell
  123 14:50:51.904691  Updating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-install-packages (oe)
  124 14:50:51.904855  Updating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/bin/lava-installed-packages (oe)
  125 14:50:51.904994  Creating /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/environment
  126 14:50:51.905105  LAVA metadata
  127 14:50:51.905185  - LAVA_JOB_ID=10185529
  128 14:50:51.905254  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:50:51.905369  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 14:50:51.905440  skipped lava-vland-overlay
  131 14:50:51.905523  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:50:51.905621  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 14:50:51.905691  skipped lava-multinode-overlay
  134 14:50:51.905770  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:50:51.905860  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 14:50:51.905944  Loading test definitions
  137 14:50:51.906046  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 14:50:51.906125  Using /lava-10185529 at stage 0
  139 14:50:51.906457  uuid=10185529_1.4.2.3.1 testdef=None
  140 14:50:51.906554  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:50:51.906647  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 14:50:51.907219  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:50:51.907465  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 14:50:51.908226  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:50:51.908529  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 14:50:51.909237  runner path: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/0/tests/0_dmesg test_uuid 10185529_1.4.2.3.1
  149 14:50:51.909429  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:50:51.909742  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 14:50:51.909820  Using /lava-10185529 at stage 1
  153 14:50:51.910143  uuid=10185529_1.4.2.3.5 testdef=None
  154 14:50:51.910251  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:50:51.910348  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 14:50:51.910904  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:50:51.911144  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 14:50:51.911836  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:50:51.912087  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 14:50:51.912768  runner path: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/1/tests/1_bootrr test_uuid 10185529_1.4.2.3.5
  163 14:50:51.912932  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:50:51.913158  Creating lava-test-runner.conf files
  166 14:50:51.913227  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/0 for stage 0
  167 14:50:51.913321  - 0_dmesg
  168 14:50:51.913407  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185529/lava-overlay-glqalasz/lava-10185529/1 for stage 1
  169 14:50:51.913503  - 1_bootrr
  170 14:50:51.913612  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:50:51.913704  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 14:50:51.923195  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:50:51.923327  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 14:50:51.923422  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:50:51.923514  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:50:51.923609  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 14:50:52.197783  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:50:52.198181  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 14:50:52.198306  extracting modules file /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185529/extract-overlay-ramdisk-4wof9_4c/ramdisk
  180 14:50:52.212561  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:50:52.212731  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 14:50:52.212836  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185529/compress-overlay-qz916kt_/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:50:52.212920  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185529/compress-overlay-qz916kt_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185529/extract-overlay-ramdisk-4wof9_4c/ramdisk
  184 14:50:52.221890  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:50:52.222037  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 14:50:52.222150  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:50:52.222253  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 14:50:52.222344  Building ramdisk /var/lib/lava/dispatcher/tmp/10185529/extract-overlay-ramdisk-4wof9_4c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185529/extract-overlay-ramdisk-4wof9_4c/ramdisk
  189 14:50:52.377861  >> 49791 blocks

  190 14:50:53.313353  rename /var/lib/lava/dispatcher/tmp/10185529/extract-overlay-ramdisk-4wof9_4c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz
  191 14:50:53.313928  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:50:53.314113  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:50:53.314273  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:50:53.314426  No mkimage arch provided, not using FIT.
  195 14:50:53.314565  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:50:53.314704  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:50:53.314866  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:50:53.315022  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:50:53.315160  No LXC device requested
  200 14:50:53.315297  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:50:53.315444  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:50:53.315589  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:50:53.315711  Checking files for TFTP limit of 4294967296 bytes.
  204 14:50:53.316319  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:50:53.316484  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:50:53.316634  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:50:53.316827  substitutions:
  208 14:50:53.316939  - {DTB}: None
  209 14:50:53.317045  - {INITRD}: 10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz
  210 14:50:53.317149  - {KERNEL}: 10185529/tftp-deploy-4yj7dj6t/kernel/bzImage
  211 14:50:53.317252  - {LAVA_MAC}: None
  212 14:50:53.317354  - {PRESEED_CONFIG}: None
  213 14:50:53.317455  - {PRESEED_LOCAL}: None
  214 14:50:53.317558  - {RAMDISK}: 10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz
  215 14:50:53.317670  - {ROOT_PART}: None
  216 14:50:53.317767  - {ROOT}: None
  217 14:50:53.317873  - {SERVER_IP}: 192.168.201.1
  218 14:50:53.317971  - {TEE}: None
  219 14:50:53.318074  Parsed boot commands:
  220 14:50:53.318173  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:50:53.318431  Parsed boot commands: tftpboot 192.168.201.1 10185529/tftp-deploy-4yj7dj6t/kernel/bzImage 10185529/tftp-deploy-4yj7dj6t/kernel/cmdline 10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz
  222 14:50:53.318580  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:50:53.318721  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:50:53.318876  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:50:53.319022  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:50:53.319142  Not connected, no need to disconnect.
  227 14:50:53.319269  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:50:53.319406  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:50:53.319523  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  230 14:50:53.323996  Setting prompt string to ['lava-test: # ']
  231 14:50:53.324461  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:50:53.324625  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:50:53.324783  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:50:53.324924  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:50:53.325242  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  236 14:50:58.465397  >> Command sent successfully.

  237 14:50:58.467989  Returned 0 in 5 seconds
  238 14:50:58.568388  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:50:58.568746  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:50:58.568860  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:50:58.568975  Setting prompt string to 'Starting depthcharge on Helios...'
  243 14:50:58.569068  Changing prompt to 'Starting depthcharge on Helios...'
  244 14:50:58.569150  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 14:50:58.569446  [Enter `^Ec?' for help]

  246 14:50:59.190871  

  247 14:50:59.191036  

  248 14:50:59.200612  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 14:50:59.204190  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 14:50:59.210644  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 14:50:59.214127  CPU: AES supported, TXT NOT supported, VT supported

  252 14:50:59.220862  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 14:50:59.224099  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 14:50:59.230248  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 14:50:59.233880  VBOOT: Loading verstage.

  256 14:50:59.236923  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 14:50:59.243656  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 14:50:59.250368  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 14:50:59.250464  CBFS @ c08000 size 3f8000

  260 14:50:59.256951  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 14:50:59.260362  CBFS: Locating 'fallback/verstage'

  262 14:50:59.263747  CBFS: Found @ offset 10fb80 size 1072c

  263 14:50:59.267210  

  264 14:50:59.267307  

  265 14:50:59.277308  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 14:50:59.291612  Probing TPM: . done!

  267 14:50:59.295194  TPM ready after 0 ms

  268 14:50:59.298289  Connected to device vid:did:rid of 1ae0:0028:00

  269 14:50:59.308710  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  270 14:50:59.311946  Initialized TPM device CR50 revision 0

  271 14:50:59.354235  tlcl_send_startup: Startup return code is 0

  272 14:50:59.354392  TPM: setup succeeded

  273 14:50:59.366940  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 14:50:59.370785  Chrome EC: UHEPI supported

  275 14:50:59.374140  Phase 1

  276 14:50:59.377843  FMAP: area GBB found @ c05000 (12288 bytes)

  277 14:50:59.384364  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 14:50:59.388188  Phase 2

  279 14:50:59.388282  Phase 3

  280 14:50:59.391228  FMAP: area GBB found @ c05000 (12288 bytes)

  281 14:50:59.397832  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 14:50:59.404119  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  283 14:50:59.407760  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  284 14:50:59.414469  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 14:50:59.430096  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  286 14:50:59.433127  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  287 14:50:59.439466  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 14:50:59.443820  Phase 4

  289 14:50:59.447049  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  290 14:50:59.453815  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 14:50:59.633456  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 14:50:59.640176  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 14:50:59.640311  Saving nvdata

  294 14:50:59.642863  Reboot requested (10020007)

  295 14:50:59.646451  board_reset() called!

  296 14:50:59.646549  full_reset() called!

  297 14:51:04.157457  

  298 14:51:04.158016  

  299 14:51:04.167923  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 14:51:04.171106  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 14:51:04.177651  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 14:51:04.181239  CPU: AES supported, TXT NOT supported, VT supported

  303 14:51:04.188104  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 14:51:04.190936  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 14:51:04.197866  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 14:51:04.200729  VBOOT: Loading verstage.

  307 14:51:04.204121  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 14:51:04.210921  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 14:51:04.217526  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 14:51:04.218084  CBFS @ c08000 size 3f8000

  311 14:51:04.223957  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 14:51:04.227193  CBFS: Locating 'fallback/verstage'

  313 14:51:04.230983  CBFS: Found @ offset 10fb80 size 1072c

  314 14:51:04.234823  

  315 14:51:04.235329  

  316 14:51:04.244288  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 14:51:04.259146  Probing TPM: . done!

  318 14:51:04.262855  TPM ready after 0 ms

  319 14:51:04.266088  Connected to device vid:did:rid of 1ae0:0028:00

  320 14:51:04.276473  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  321 14:51:04.279448  Initialized TPM device CR50 revision 0

  322 14:51:04.322181  tlcl_send_startup: Startup return code is 0

  323 14:51:04.322725  TPM: setup succeeded

  324 14:51:04.334179  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 14:51:04.338063  Chrome EC: UHEPI supported

  326 14:51:04.341752  Phase 1

  327 14:51:04.344657  FMAP: area GBB found @ c05000 (12288 bytes)

  328 14:51:04.351586  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 14:51:04.357917  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 14:51:04.361546  Recovery requested (1009000e)

  331 14:51:04.367674  Saving nvdata

  332 14:51:04.373199  tlcl_extend: response is 0

  333 14:51:04.382015  tlcl_extend: response is 0

  334 14:51:04.389132  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 14:51:04.392657  CBFS @ c08000 size 3f8000

  336 14:51:04.399167  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 14:51:04.402634  CBFS: Locating 'fallback/romstage'

  338 14:51:04.405997  CBFS: Found @ offset 80 size 145fc

  339 14:51:04.408742  Accumulated console time in verstage 98 ms

  340 14:51:04.409195  

  341 14:51:04.409533  

  342 14:51:04.422482  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 14:51:04.428861  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 14:51:04.432595  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 14:51:04.436050  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 14:51:04.442192  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 14:51:04.446290  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 14:51:04.449273  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  349 14:51:04.452208  TCO_STS:   0000 0000

  350 14:51:04.455499  GEN_PMCON: e0015238 00000200

  351 14:51:04.458388  GBLRST_CAUSE: 00000000 00000000

  352 14:51:04.458815  prev_sleep_state 5

  353 14:51:04.461966  Boot Count incremented to 52009

  354 14:51:04.468667  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 14:51:04.472225  CBFS @ c08000 size 3f8000

  356 14:51:04.479179  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 14:51:04.479716  CBFS: Locating 'fspm.bin'

  358 14:51:04.485007  CBFS: Found @ offset 5ffc0 size 71000

  359 14:51:04.489034  Chrome EC: UHEPI supported

  360 14:51:04.494956  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 14:51:04.498417  Probing TPM:  done!

  362 14:51:04.505499  Connected to device vid:did:rid of 1ae0:0028:00

  363 14:51:04.515065  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  364 14:51:04.521621  Initialized TPM device CR50 revision 0

  365 14:51:04.530444  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 14:51:04.536772  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 14:51:04.539981  MRC cache found, size 1948

  368 14:51:04.543835  bootmode is set to: 2

  369 14:51:04.546985  PRMRR disabled by config.

  370 14:51:04.550196  SPD INDEX = 1

  371 14:51:04.553669  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 14:51:04.556604  CBFS @ c08000 size 3f8000

  373 14:51:04.563264  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 14:51:04.563694  CBFS: Locating 'spd.bin'

  375 14:51:04.566756  CBFS: Found @ offset 5fb80 size 400

  376 14:51:04.570162  SPD: module type is LPDDR3

  377 14:51:04.573460  SPD: module part is 

  378 14:51:04.579899  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 14:51:04.583385  SPD: device width 4 bits, bus width 8 bits

  380 14:51:04.586832  SPD: module size is 4096 MB (per channel)

  381 14:51:04.589811  memory slot: 0 configuration done.

  382 14:51:04.593408  memory slot: 2 configuration done.

  383 14:51:04.644775  CBMEM:

  384 14:51:04.647836  IMD: root @ 99fff000 254 entries.

  385 14:51:04.651132  IMD: root @ 99ffec00 62 entries.

  386 14:51:04.654498  External stage cache:

  387 14:51:04.657786  IMD: root @ 9abff000 254 entries.

  388 14:51:04.660962  IMD: root @ 9abfec00 62 entries.

  389 14:51:04.667843  Chrome EC: clear events_b mask to 0x0000000020004000

  390 14:51:04.680030  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 14:51:04.693394  tlcl_write: response is 0

  392 14:51:04.702394  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 14:51:04.708992  MRC: TPM MRC hash updated successfully.

  394 14:51:04.709529  2 DIMMs found

  395 14:51:04.712433  SMM Memory Map

  396 14:51:04.716034  SMRAM       : 0x9a000000 0x1000000

  397 14:51:04.718885   Subregion 0: 0x9a000000 0xa00000

  398 14:51:04.722237   Subregion 1: 0x9aa00000 0x200000

  399 14:51:04.725729   Subregion 2: 0x9ac00000 0x400000

  400 14:51:04.729031  top_of_ram = 0x9a000000

  401 14:51:04.732308  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 14:51:04.738914  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 14:51:04.742160  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 14:51:04.748870  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 14:51:04.751894  CBFS @ c08000 size 3f8000

  406 14:51:04.755181  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 14:51:04.758967  CBFS: Locating 'fallback/postcar'

  408 14:51:04.765746  CBFS: Found @ offset 107000 size 4b44

  409 14:51:04.768726  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 14:51:04.780950  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 14:51:04.784176  Processing 180 relocs. Offset value of 0x97c0c000

  412 14:51:04.792520  Accumulated console time in romstage 286 ms

  413 14:51:04.793027  

  414 14:51:04.793361  

  415 14:51:04.802793  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 14:51:04.808893  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 14:51:04.812600  CBFS @ c08000 size 3f8000

  418 14:51:04.818909  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 14:51:04.822371  CBFS: Locating 'fallback/ramstage'

  420 14:51:04.825846  CBFS: Found @ offset 43380 size 1b9e8

  421 14:51:04.832051  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 14:51:04.864762  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 14:51:04.868039  Processing 3976 relocs. Offset value of 0x98db0000

  424 14:51:04.874428  Accumulated console time in postcar 52 ms

  425 14:51:04.874949  

  426 14:51:04.875290  

  427 14:51:04.884532  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 14:51:04.891325  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 14:51:04.893909  WARNING: RO_VPD is uninitialized or empty.

  430 14:51:04.898105  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 14:51:04.904397  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 14:51:04.904948  Normal boot.

  433 14:51:04.910950  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 14:51:04.914409  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 14:51:04.917616  CBFS @ c08000 size 3f8000

  436 14:51:04.924326  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 14:51:04.927377  CBFS: Locating 'cpu_microcode_blob.bin'

  438 14:51:04.930470  CBFS: Found @ offset 14700 size 2ec00

  439 14:51:04.933716  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 14:51:04.937295  Skip microcode update

  441 14:51:04.944281  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 14:51:04.944716  CBFS @ c08000 size 3f8000

  443 14:51:04.950254  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 14:51:04.953898  CBFS: Locating 'fsps.bin'

  445 14:51:04.957034  CBFS: Found @ offset d1fc0 size 35000

  446 14:51:04.982183  Detected 4 core, 8 thread CPU.

  447 14:51:04.985991  Setting up SMI for CPU

  448 14:51:04.988872  IED base = 0x9ac00000

  449 14:51:04.989310  IED size = 0x00400000

  450 14:51:04.992454  Will perform SMM setup.

  451 14:51:04.999003  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 14:51:05.005621  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 14:51:05.008655  Processing 16 relocs. Offset value of 0x00030000

  454 14:51:05.013372  Attempting to start 7 APs

  455 14:51:05.015689  Waiting for 10ms after sending INIT.

  456 14:51:05.032331  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  457 14:51:05.032829  done.

  458 14:51:05.035185  AP: slot 5 apic_id 5.

  459 14:51:05.038695  AP: slot 2 apic_id 4.

  460 14:51:05.039156  AP: slot 7 apic_id 6.

  461 14:51:05.041957  AP: slot 6 apic_id 7.

  462 14:51:05.045332  AP: slot 4 apic_id 3.

  463 14:51:05.045799  AP: slot 1 apic_id 2.

  464 14:51:05.051706  Waiting for 2nd SIPI to complete...done.

  465 14:51:05.058812  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 14:51:05.064995  Processing 13 relocs. Offset value of 0x00038000

  467 14:51:05.068284  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 14:51:05.075475  Installing SMM handler to 0x9a000000

  469 14:51:05.081928  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 14:51:05.084939  Processing 658 relocs. Offset value of 0x9a010000

  471 14:51:05.095246  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 14:51:05.098571  Processing 13 relocs. Offset value of 0x9a008000

  473 14:51:05.105197  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 14:51:05.112280  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 14:51:05.118796  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 14:51:05.121547  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 14:51:05.128434  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 14:51:05.134367  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 14:51:05.138181  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 14:51:05.144214  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 14:51:05.148153  Clearing SMI status registers

  482 14:51:05.151676  SMI_STS: PM1 

  483 14:51:05.152101  PM1_STS: PWRBTN 

  484 14:51:05.154838  TCO_STS: SECOND_TO 

  485 14:51:05.158166  New SMBASE 0x9a000000

  486 14:51:05.161208  In relocation handler: CPU 0

  487 14:51:05.164413  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 14:51:05.167984  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 14:51:05.171462  Relocation complete.

  490 14:51:05.174429  New SMBASE 0x99fff400

  491 14:51:05.177669  In relocation handler: CPU 3

  492 14:51:05.181310  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  493 14:51:05.184318  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 14:51:05.188135  Relocation complete.

  495 14:51:05.191295  New SMBASE 0x99fff000

  496 14:51:05.191838  In relocation handler: CPU 4

  497 14:51:05.198263  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  498 14:51:05.201105  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 14:51:05.204331  Relocation complete.

  500 14:51:05.207944  New SMBASE 0x99fffc00

  501 14:51:05.208506  In relocation handler: CPU 1

  502 14:51:05.214396  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  503 14:51:05.217848  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 14:51:05.220980  Relocation complete.

  505 14:51:05.221422  New SMBASE 0x99ffe800

  506 14:51:05.224571  In relocation handler: CPU 6

  507 14:51:05.231101  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  508 14:51:05.234079  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 14:51:05.237954  Relocation complete.

  510 14:51:05.238502  New SMBASE 0x99ffe400

  511 14:51:05.240727  In relocation handler: CPU 7

  512 14:51:05.244238  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  513 14:51:05.251249  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 14:51:05.254238  Relocation complete.

  515 14:51:05.254685  New SMBASE 0x99ffec00

  516 14:51:05.257664  In relocation handler: CPU 5

  517 14:51:05.260951  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  518 14:51:05.267444  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 14:51:05.270831  Relocation complete.

  520 14:51:05.271277  New SMBASE 0x99fff800

  521 14:51:05.274261  In relocation handler: CPU 2

  522 14:51:05.277433  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  523 14:51:05.284000  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 14:51:05.284433  Relocation complete.

  525 14:51:05.287461  Initializing CPU #0

  526 14:51:05.291010  CPU: vendor Intel device 806ec

  527 14:51:05.293925  CPU: family 06, model 8e, stepping 0c

  528 14:51:05.297439  Clearing out pending MCEs

  529 14:51:05.300666  Setting up local APIC...

  530 14:51:05.301184   apic_id: 0x00 done.

  531 14:51:05.304590  Turbo is available but hidden

  532 14:51:05.307856  Turbo is available and visible

  533 14:51:05.311064  VMX status: enabled

  534 14:51:05.314117  IA32_FEATURE_CONTROL status: locked

  535 14:51:05.317290  Skip microcode update

  536 14:51:05.317848  CPU #0 initialized

  537 14:51:05.320877  Initializing CPU #3

  538 14:51:05.324211  Initializing CPU #6

  539 14:51:05.324743  CPU: vendor Intel device 806ec

  540 14:51:05.330880  CPU: family 06, model 8e, stepping 0c

  541 14:51:05.331312  Clearing out pending MCEs

  542 14:51:05.334305  Initializing CPU #7

  543 14:51:05.337454  CPU: vendor Intel device 806ec

  544 14:51:05.340750  CPU: family 06, model 8e, stepping 0c

  545 14:51:05.344111  CPU: vendor Intel device 806ec

  546 14:51:05.347074  CPU: family 06, model 8e, stepping 0c

  547 14:51:05.350635  Clearing out pending MCEs

  548 14:51:05.354217  Clearing out pending MCEs

  549 14:51:05.354737  Setting up local APIC...

  550 14:51:05.357574  Setting up local APIC...

  551 14:51:05.360365  Initializing CPU #1

  552 14:51:05.360791  Initializing CPU #4

  553 14:51:05.363818  CPU: vendor Intel device 806ec

  554 14:51:05.370794  CPU: family 06, model 8e, stepping 0c

  555 14:51:05.373763  CPU: vendor Intel device 806ec

  556 14:51:05.377049  CPU: family 06, model 8e, stepping 0c

  557 14:51:05.377474  Clearing out pending MCEs

  558 14:51:05.380653  Clearing out pending MCEs

  559 14:51:05.384342  Setting up local APIC...

  560 14:51:05.386795   apic_id: 0x01 done.

  561 14:51:05.387216   apic_id: 0x02 done.

  562 14:51:05.390159  Setting up local APIC...

  563 14:51:05.393912   apic_id: 0x06 done.

  564 14:51:05.394428  Setting up local APIC...

  565 14:51:05.397778  VMX status: enabled

  566 14:51:05.400062  Initializing CPU #2

  567 14:51:05.400486  Initializing CPU #5

  568 14:51:05.403712  CPU: vendor Intel device 806ec

  569 14:51:05.407089  CPU: family 06, model 8e, stepping 0c

  570 14:51:05.410100  CPU: vendor Intel device 806ec

  571 14:51:05.413869  CPU: family 06, model 8e, stepping 0c

  572 14:51:05.416602  VMX status: enabled

  573 14:51:05.420230   apic_id: 0x03 done.

  574 14:51:05.423420  IA32_FEATURE_CONTROL status: locked

  575 14:51:05.423925  VMX status: enabled

  576 14:51:05.427129  Skip microcode update

  577 14:51:05.430164  IA32_FEATURE_CONTROL status: locked

  578 14:51:05.433259  CPU #1 initialized

  579 14:51:05.433918  Skip microcode update

  580 14:51:05.439861  IA32_FEATURE_CONTROL status: locked

  581 14:51:05.440292  VMX status: enabled

  582 14:51:05.443320   apic_id: 0x07 done.

  583 14:51:05.446555  IA32_FEATURE_CONTROL status: locked

  584 14:51:05.450303  VMX status: enabled

  585 14:51:05.450802  Skip microcode update

  586 14:51:05.453988  IA32_FEATURE_CONTROL status: locked

  587 14:51:05.456918  CPU #7 initialized

  588 14:51:05.459910  Skip microcode update

  589 14:51:05.460342  Skip microcode update

  590 14:51:05.463571  CPU #6 initialized

  591 14:51:05.466952  Clearing out pending MCEs

  592 14:51:05.467381  Clearing out pending MCEs

  593 14:51:05.469692  Setting up local APIC...

  594 14:51:05.473133  CPU #4 initialized

  595 14:51:05.476944  Setting up local APIC...

  596 14:51:05.477375  CPU #3 initialized

  597 14:51:05.479741   apic_id: 0x04 done.

  598 14:51:05.480325   apic_id: 0x05 done.

  599 14:51:05.483713  VMX status: enabled

  600 14:51:05.486669  VMX status: enabled

  601 14:51:05.490041  IA32_FEATURE_CONTROL status: locked

  602 14:51:05.492906  IA32_FEATURE_CONTROL status: locked

  603 14:51:05.493338  Skip microcode update

  604 14:51:05.496435  Skip microcode update

  605 14:51:05.499911  CPU #2 initialized

  606 14:51:05.500344  CPU #5 initialized

  607 14:51:05.506538  bsp_do_flight_plan done after 452 msecs.

  608 14:51:05.509545  CPU: frequency set to 4200 MHz

  609 14:51:05.510017  Enabling SMIs.

  610 14:51:05.510361  Locking SMM.

  611 14:51:05.525882  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 14:51:05.529037  CBFS @ c08000 size 3f8000

  613 14:51:05.535981  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 14:51:05.536615  CBFS: Locating 'vbt.bin'

  615 14:51:05.539376  CBFS: Found @ offset 5f5c0 size 499

  616 14:51:05.546416  Found a VBT of 4608 bytes after decompression

  617 14:51:05.728368  Display FSP Version Info HOB

  618 14:51:05.731465  Reference Code - CPU = 9.0.1e.30

  619 14:51:05.735173  uCode Version = 0.0.0.ca

  620 14:51:05.738315  TXT ACM version = ff.ff.ff.ffff

  621 14:51:05.741346  Display FSP Version Info HOB

  622 14:51:05.745325  Reference Code - ME = 9.0.1e.30

  623 14:51:05.748413  MEBx version = 0.0.0.0

  624 14:51:05.751359  ME Firmware Version = Consumer SKU

  625 14:51:05.754782  Display FSP Version Info HOB

  626 14:51:05.758396  Reference Code - CML PCH = 9.0.1e.30

  627 14:51:05.761447  PCH-CRID Status = Disabled

  628 14:51:05.764869  PCH-CRID Original Value = ff.ff.ff.ffff

  629 14:51:05.768135  PCH-CRID New Value = ff.ff.ff.ffff

  630 14:51:05.771634  OPROM - RST - RAID = ff.ff.ff.ffff

  631 14:51:05.774861  ChipsetInit Base Version = ff.ff.ff.ffff

  632 14:51:05.778136  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 14:51:05.781097  Display FSP Version Info HOB

  634 14:51:05.787872  Reference Code - SA - System Agent = 9.0.1e.30

  635 14:51:05.791471  Reference Code - MRC = 0.7.1.6c

  636 14:51:05.792015  SA - PCIe Version = 9.0.1e.30

  637 14:51:05.794628  SA-CRID Status = Disabled

  638 14:51:05.798109  SA-CRID Original Value = 0.0.0.c

  639 14:51:05.801490  SA-CRID New Value = 0.0.0.c

  640 14:51:05.804746  OPROM - VBIOS = ff.ff.ff.ffff

  641 14:51:05.808217  RTC Init

  642 14:51:05.811401  Set power on after power failure.

  643 14:51:05.811831  Disabling Deep S3

  644 14:51:05.815074  Disabling Deep S3

  645 14:51:05.815502  Disabling Deep S4

  646 14:51:05.817977  Disabling Deep S4

  647 14:51:05.818402  Disabling Deep S5

  648 14:51:05.820986  Disabling Deep S5

  649 14:51:05.827741  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  650 14:51:05.828384  Enumerating buses...

  651 14:51:05.834381  Show all devs... Before device enumeration.

  652 14:51:05.834829  Root Device: enabled 1

  653 14:51:05.837461  CPU_CLUSTER: 0: enabled 1

  654 14:51:05.841290  DOMAIN: 0000: enabled 1

  655 14:51:05.844637  APIC: 00: enabled 1

  656 14:51:05.845185  PCI: 00:00.0: enabled 1

  657 14:51:05.847467  PCI: 00:02.0: enabled 1

  658 14:51:05.851363  PCI: 00:04.0: enabled 0

  659 14:51:05.854112  PCI: 00:05.0: enabled 0

  660 14:51:05.854541  PCI: 00:12.0: enabled 1

  661 14:51:05.857992  PCI: 00:12.5: enabled 0

  662 14:51:05.860873  PCI: 00:12.6: enabled 0

  663 14:51:05.861311  PCI: 00:14.0: enabled 1

  664 14:51:05.864490  PCI: 00:14.1: enabled 0

  665 14:51:05.867498  PCI: 00:14.3: enabled 1

  666 14:51:05.871159  PCI: 00:14.5: enabled 0

  667 14:51:05.871700  PCI: 00:15.0: enabled 1

  668 14:51:05.874085  PCI: 00:15.1: enabled 1

  669 14:51:05.877408  PCI: 00:15.2: enabled 0

  670 14:51:05.881012  PCI: 00:15.3: enabled 0

  671 14:51:05.881439  PCI: 00:16.0: enabled 1

  672 14:51:05.883921  PCI: 00:16.1: enabled 0

  673 14:51:05.887259  PCI: 00:16.2: enabled 0

  674 14:51:05.890994  PCI: 00:16.3: enabled 0

  675 14:51:05.891543  PCI: 00:16.4: enabled 0

  676 14:51:05.893777  PCI: 00:16.5: enabled 0

  677 14:51:05.897750  PCI: 00:17.0: enabled 1

  678 14:51:05.898189  PCI: 00:19.0: enabled 1

  679 14:51:05.900649  PCI: 00:19.1: enabled 0

  680 14:51:05.903847  PCI: 00:19.2: enabled 0

  681 14:51:05.907347  PCI: 00:1a.0: enabled 0

  682 14:51:05.907776  PCI: 00:1c.0: enabled 0

  683 14:51:05.910729  PCI: 00:1c.1: enabled 0

  684 14:51:05.914006  PCI: 00:1c.2: enabled 0

  685 14:51:05.917988  PCI: 00:1c.3: enabled 0

  686 14:51:05.918523  PCI: 00:1c.4: enabled 0

  687 14:51:05.920470  PCI: 00:1c.5: enabled 0

  688 14:51:05.923725  PCI: 00:1c.6: enabled 0

  689 14:51:05.927256  PCI: 00:1c.7: enabled 0

  690 14:51:05.928041  PCI: 00:1d.0: enabled 1

  691 14:51:05.930731  PCI: 00:1d.1: enabled 0

  692 14:51:05.933967  PCI: 00:1d.2: enabled 0

  693 14:51:05.934455  PCI: 00:1d.3: enabled 0

  694 14:51:05.937089  PCI: 00:1d.4: enabled 0

  695 14:51:05.940718  PCI: 00:1d.5: enabled 1

  696 14:51:05.943527  PCI: 00:1e.0: enabled 1

  697 14:51:05.943955  PCI: 00:1e.1: enabled 0

  698 14:51:05.947409  PCI: 00:1e.2: enabled 1

  699 14:51:05.950324  PCI: 00:1e.3: enabled 1

  700 14:51:05.954257  PCI: 00:1f.0: enabled 1

  701 14:51:05.954789  PCI: 00:1f.1: enabled 1

  702 14:51:05.957076  PCI: 00:1f.2: enabled 1

  703 14:51:05.960596  PCI: 00:1f.3: enabled 1

  704 14:51:05.963898  PCI: 00:1f.4: enabled 1

  705 14:51:05.964345  PCI: 00:1f.5: enabled 1

  706 14:51:05.966813  PCI: 00:1f.6: enabled 0

  707 14:51:05.970293  USB0 port 0: enabled 1

  708 14:51:05.970717  I2C: 00:15: enabled 1

  709 14:51:05.973900  I2C: 00:5d: enabled 1

  710 14:51:05.976790  GENERIC: 0.0: enabled 1

  711 14:51:05.980372  I2C: 00:1a: enabled 1

  712 14:51:05.980798  I2C: 00:38: enabled 1

  713 14:51:05.983897  I2C: 00:39: enabled 1

  714 14:51:05.987115  I2C: 00:3a: enabled 1

  715 14:51:05.987545  I2C: 00:3b: enabled 1

  716 14:51:05.990126  PCI: 00:00.0: enabled 1

  717 14:51:05.993733  SPI: 00: enabled 1

  718 14:51:05.994287  SPI: 01: enabled 1

  719 14:51:05.996704  PNP: 0c09.0: enabled 1

  720 14:51:06.000086  USB2 port 0: enabled 1

  721 14:51:06.000513  USB2 port 1: enabled 1

  722 14:51:06.003915  USB2 port 2: enabled 0

  723 14:51:06.006984  USB2 port 3: enabled 0

  724 14:51:06.007512  USB2 port 5: enabled 0

  725 14:51:06.009973  USB2 port 6: enabled 1

  726 14:51:06.013351  USB2 port 9: enabled 1

  727 14:51:06.013813  USB3 port 0: enabled 1

  728 14:51:06.016676  USB3 port 1: enabled 1

  729 14:51:06.019963  USB3 port 2: enabled 1

  730 14:51:06.023240  USB3 port 3: enabled 1

  731 14:51:06.023668  USB3 port 4: enabled 0

  732 14:51:06.026637  APIC: 02: enabled 1

  733 14:51:06.029785  APIC: 04: enabled 1

  734 14:51:06.030213  APIC: 01: enabled 1

  735 14:51:06.033358  APIC: 03: enabled 1

  736 14:51:06.033863  APIC: 05: enabled 1

  737 14:51:06.036286  APIC: 07: enabled 1

  738 14:51:06.040449  APIC: 06: enabled 1

  739 14:51:06.040873  Compare with tree...

  740 14:51:06.043108  Root Device: enabled 1

  741 14:51:06.046621   CPU_CLUSTER: 0: enabled 1

  742 14:51:06.047049    APIC: 00: enabled 1

  743 14:51:06.049875    APIC: 02: enabled 1

  744 14:51:06.053698    APIC: 04: enabled 1

  745 14:51:06.054234    APIC: 01: enabled 1

  746 14:51:06.056805    APIC: 03: enabled 1

  747 14:51:06.059545    APIC: 05: enabled 1

  748 14:51:06.062692    APIC: 07: enabled 1

  749 14:51:06.063304    APIC: 06: enabled 1

  750 14:51:06.066532   DOMAIN: 0000: enabled 1

  751 14:51:06.069167    PCI: 00:00.0: enabled 1

  752 14:51:06.072868    PCI: 00:02.0: enabled 1

  753 14:51:06.073295    PCI: 00:04.0: enabled 0

  754 14:51:06.076221    PCI: 00:05.0: enabled 0

  755 14:51:06.079495    PCI: 00:12.0: enabled 1

  756 14:51:06.083202    PCI: 00:12.5: enabled 0

  757 14:51:06.085905    PCI: 00:12.6: enabled 0

  758 14:51:06.086383    PCI: 00:14.0: enabled 1

  759 14:51:06.089692     USB0 port 0: enabled 1

  760 14:51:06.092643      USB2 port 0: enabled 1

  761 14:51:06.096338      USB2 port 1: enabled 1

  762 14:51:06.099659      USB2 port 2: enabled 0

  763 14:51:06.100157      USB2 port 3: enabled 0

  764 14:51:06.102710      USB2 port 5: enabled 0

  765 14:51:06.106115      USB2 port 6: enabled 1

  766 14:51:06.109350      USB2 port 9: enabled 1

  767 14:51:06.112720      USB3 port 0: enabled 1

  768 14:51:06.116072      USB3 port 1: enabled 1

  769 14:51:06.116502      USB3 port 2: enabled 1

  770 14:51:06.119392      USB3 port 3: enabled 1

  771 14:51:06.122541      USB3 port 4: enabled 0

  772 14:51:06.125816    PCI: 00:14.1: enabled 0

  773 14:51:06.129069    PCI: 00:14.3: enabled 1

  774 14:51:06.129771    PCI: 00:14.5: enabled 0

  775 14:51:06.132479    PCI: 00:15.0: enabled 1

  776 14:51:06.135600     I2C: 00:15: enabled 1

  777 14:51:06.139061    PCI: 00:15.1: enabled 1

  778 14:51:06.142010     I2C: 00:5d: enabled 1

  779 14:51:06.142585     GENERIC: 0.0: enabled 1

  780 14:51:06.145427    PCI: 00:15.2: enabled 0

  781 14:51:06.148764    PCI: 00:15.3: enabled 0

  782 14:51:06.152378    PCI: 00:16.0: enabled 1

  783 14:51:06.155797    PCI: 00:16.1: enabled 0

  784 14:51:06.156297    PCI: 00:16.2: enabled 0

  785 14:51:06.159354    PCI: 00:16.3: enabled 0

  786 14:51:06.162388    PCI: 00:16.4: enabled 0

  787 14:51:06.165288    PCI: 00:16.5: enabled 0

  788 14:51:06.168350    PCI: 00:17.0: enabled 1

  789 14:51:06.168775    PCI: 00:19.0: enabled 1

  790 14:51:06.172216     I2C: 00:1a: enabled 1

  791 14:51:06.175250     I2C: 00:38: enabled 1

  792 14:51:06.178460     I2C: 00:39: enabled 1

  793 14:51:06.178954     I2C: 00:3a: enabled 1

  794 14:51:06.182068     I2C: 00:3b: enabled 1

  795 14:51:06.185231    PCI: 00:19.1: enabled 0

  796 14:51:06.188921    PCI: 00:19.2: enabled 0

  797 14:51:06.191861    PCI: 00:1a.0: enabled 0

  798 14:51:06.192288    PCI: 00:1c.0: enabled 0

  799 14:51:06.194899    PCI: 00:1c.1: enabled 0

  800 14:51:06.198493    PCI: 00:1c.2: enabled 0

  801 14:51:06.201772    PCI: 00:1c.3: enabled 0

  802 14:51:06.202271    PCI: 00:1c.4: enabled 0

  803 14:51:06.205262    PCI: 00:1c.5: enabled 0

  804 14:51:06.208197    PCI: 00:1c.6: enabled 0

  805 14:51:06.211913    PCI: 00:1c.7: enabled 0

  806 14:51:06.214977    PCI: 00:1d.0: enabled 1

  807 14:51:06.215707    PCI: 00:1d.1: enabled 0

  808 14:51:06.218556    PCI: 00:1d.2: enabled 0

  809 14:51:06.221448    PCI: 00:1d.3: enabled 0

  810 14:51:06.224980    PCI: 00:1d.4: enabled 0

  811 14:51:06.228026    PCI: 00:1d.5: enabled 1

  812 14:51:06.228673     PCI: 00:00.0: enabled 1

  813 14:51:06.231438    PCI: 00:1e.0: enabled 1

  814 14:51:06.234972    PCI: 00:1e.1: enabled 0

  815 14:51:06.238208    PCI: 00:1e.2: enabled 1

  816 14:51:06.241436     SPI: 00: enabled 1

  817 14:51:06.242059    PCI: 00:1e.3: enabled 1

  818 14:51:06.244808     SPI: 01: enabled 1

  819 14:51:06.248001    PCI: 00:1f.0: enabled 1

  820 14:51:06.251503     PNP: 0c09.0: enabled 1

  821 14:51:06.252007    PCI: 00:1f.1: enabled 1

  822 14:51:06.254793    PCI: 00:1f.2: enabled 1

  823 14:51:06.258149    PCI: 00:1f.3: enabled 1

  824 14:51:06.261079    PCI: 00:1f.4: enabled 1

  825 14:51:06.264933    PCI: 00:1f.5: enabled 1

  826 14:51:06.265587    PCI: 00:1f.6: enabled 0

  827 14:51:06.267941  Root Device scanning...

  828 14:51:06.271760  scan_static_bus for Root Device

  829 14:51:06.274789  CPU_CLUSTER: 0 enabled

  830 14:51:06.275272  DOMAIN: 0000 enabled

  831 14:51:06.277782  DOMAIN: 0000 scanning...

  832 14:51:06.281690  PCI: pci_scan_bus for bus 00

  833 14:51:06.284521  PCI: 00:00.0 [8086/0000] ops

  834 14:51:06.287912  PCI: 00:00.0 [8086/9b61] enabled

  835 14:51:06.291125  PCI: 00:02.0 [8086/0000] bus ops

  836 14:51:06.294907  PCI: 00:02.0 [8086/9b41] enabled

  837 14:51:06.297829  PCI: 00:04.0 [8086/1903] disabled

  838 14:51:06.301338  PCI: 00:08.0 [8086/1911] enabled

  839 14:51:06.304628  PCI: 00:12.0 [8086/02f9] enabled

  840 14:51:06.307537  PCI: 00:14.0 [8086/0000] bus ops

  841 14:51:06.311105  PCI: 00:14.0 [8086/02ed] enabled

  842 14:51:06.314764  PCI: 00:14.2 [8086/02ef] enabled

  843 14:51:06.317941  PCI: 00:14.3 [8086/02f0] enabled

  844 14:51:06.321276  PCI: 00:15.0 [8086/0000] bus ops

  845 14:51:06.324492  PCI: 00:15.0 [8086/02e8] enabled

  846 14:51:06.327963  PCI: 00:15.1 [8086/0000] bus ops

  847 14:51:06.330978  PCI: 00:15.1 [8086/02e9] enabled

  848 14:51:06.334482  PCI: 00:16.0 [8086/0000] ops

  849 14:51:06.337761  PCI: 00:16.0 [8086/02e0] enabled

  850 14:51:06.340659  PCI: 00:17.0 [8086/0000] ops

  851 14:51:06.344493  PCI: 00:17.0 [8086/02d3] enabled

  852 14:51:06.347548  PCI: 00:19.0 [8086/0000] bus ops

  853 14:51:06.350701  PCI: 00:19.0 [8086/02c5] enabled

  854 14:51:06.354077  PCI: 00:1d.0 [8086/0000] bus ops

  855 14:51:06.357504  PCI: 00:1d.0 [8086/02b0] enabled

  856 14:51:06.363988  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 14:51:06.367495  PCI: 00:1e.0 [8086/0000] ops

  858 14:51:06.370856  PCI: 00:1e.0 [8086/02a8] enabled

  859 14:51:06.374221  PCI: 00:1e.2 [8086/0000] bus ops

  860 14:51:06.377440  PCI: 00:1e.2 [8086/02aa] enabled

  861 14:51:06.380956  PCI: 00:1e.3 [8086/0000] bus ops

  862 14:51:06.384166  PCI: 00:1e.3 [8086/02ab] enabled

  863 14:51:06.387904  PCI: 00:1f.0 [8086/0000] bus ops

  864 14:51:06.390973  PCI: 00:1f.0 [8086/0284] enabled

  865 14:51:06.393873  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 14:51:06.400979  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 14:51:06.403967  PCI: 00:1f.3 [8086/0000] bus ops

  868 14:51:06.407614  PCI: 00:1f.3 [8086/02c8] enabled

  869 14:51:06.411192  PCI: 00:1f.4 [8086/0000] bus ops

  870 14:51:06.414316  PCI: 00:1f.4 [8086/02a3] enabled

  871 14:51:06.417407  PCI: 00:1f.5 [8086/0000] bus ops

  872 14:51:06.420554  PCI: 00:1f.5 [8086/02a4] enabled

  873 14:51:06.423863  PCI: Leftover static devices:

  874 14:51:06.424298  PCI: 00:05.0

  875 14:51:06.427344  PCI: 00:12.5

  876 14:51:06.427773  PCI: 00:12.6

  877 14:51:06.430448  PCI: 00:14.1

  878 14:51:06.430868  PCI: 00:14.5

  879 14:51:06.431237  PCI: 00:15.2

  880 14:51:06.434122  PCI: 00:15.3

  881 14:51:06.434562  PCI: 00:16.1

  882 14:51:06.437198  PCI: 00:16.2

  883 14:51:06.437660  PCI: 00:16.3

  884 14:51:06.438049  PCI: 00:16.4

  885 14:51:06.440382  PCI: 00:16.5

  886 14:51:06.440821  PCI: 00:19.1

  887 14:51:06.443539  PCI: 00:19.2

  888 14:51:06.443960  PCI: 00:1a.0

  889 14:51:06.444382  PCI: 00:1c.0

  890 14:51:06.446864  PCI: 00:1c.1

  891 14:51:06.447285  PCI: 00:1c.2

  892 14:51:06.450204  PCI: 00:1c.3

  893 14:51:06.450695  PCI: 00:1c.4

  894 14:51:06.453688  PCI: 00:1c.5

  895 14:51:06.454106  PCI: 00:1c.6

  896 14:51:06.454586  PCI: 00:1c.7

  897 14:51:06.457450  PCI: 00:1d.1

  898 14:51:06.458057  PCI: 00:1d.2

  899 14:51:06.460539  PCI: 00:1d.3

  900 14:51:06.460996  PCI: 00:1d.4

  901 14:51:06.461330  PCI: 00:1d.5

  902 14:51:06.463549  PCI: 00:1e.1

  903 14:51:06.463964  PCI: 00:1f.1

  904 14:51:06.466948  PCI: 00:1f.2

  905 14:51:06.467477  PCI: 00:1f.6

  906 14:51:06.470487  PCI: Check your devicetree.cb.

  907 14:51:06.473714  PCI: 00:02.0 scanning...

  908 14:51:06.476725  scan_generic_bus for PCI: 00:02.0

  909 14:51:06.480580  scan_generic_bus for PCI: 00:02.0 done

  910 14:51:06.487231  scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs

  911 14:51:06.490270  PCI: 00:14.0 scanning...

  912 14:51:06.493291  scan_static_bus for PCI: 00:14.0

  913 14:51:06.493756  USB0 port 0 enabled

  914 14:51:06.497194  USB0 port 0 scanning...

  915 14:51:06.500198  scan_static_bus for USB0 port 0

  916 14:51:06.503454  USB2 port 0 enabled

  917 14:51:06.503874  USB2 port 1 enabled

  918 14:51:06.506921  USB2 port 2 disabled

  919 14:51:06.510067  USB2 port 3 disabled

  920 14:51:06.510490  USB2 port 5 disabled

  921 14:51:06.513279  USB2 port 6 enabled

  922 14:51:06.513816  USB2 port 9 enabled

  923 14:51:06.517067  USB3 port 0 enabled

  924 14:51:06.519866  USB3 port 1 enabled

  925 14:51:06.520288  USB3 port 2 enabled

  926 14:51:06.523480  USB3 port 3 enabled

  927 14:51:06.526439  USB3 port 4 disabled

  928 14:51:06.526857  USB2 port 0 scanning...

  929 14:51:06.530387  scan_static_bus for USB2 port 0

  930 14:51:06.533360  scan_static_bus for USB2 port 0 done

  931 14:51:06.540078  scan_bus: scanning of bus USB2 port 0 took 9697 usecs

  932 14:51:06.543143  USB2 port 1 scanning...

  933 14:51:06.546986  scan_static_bus for USB2 port 1

  934 14:51:06.549915  scan_static_bus for USB2 port 1 done

  935 14:51:06.556680  scan_bus: scanning of bus USB2 port 1 took 9691 usecs

  936 14:51:06.557174  USB2 port 6 scanning...

  937 14:51:06.559674  scan_static_bus for USB2 port 6

  938 14:51:06.562984  scan_static_bus for USB2 port 6 done

  939 14:51:06.570049  scan_bus: scanning of bus USB2 port 6 took 9698 usecs

  940 14:51:06.573064  USB2 port 9 scanning...

  941 14:51:06.576276  scan_static_bus for USB2 port 9

  942 14:51:06.579584  scan_static_bus for USB2 port 9 done

  943 14:51:06.586976  scan_bus: scanning of bus USB2 port 9 took 9706 usecs

  944 14:51:06.587429  USB3 port 0 scanning...

  945 14:51:06.589493  scan_static_bus for USB3 port 0

  946 14:51:06.596189  scan_static_bus for USB3 port 0 done

  947 14:51:06.600006  scan_bus: scanning of bus USB3 port 0 took 9710 usecs

  948 14:51:06.602686  USB3 port 1 scanning...

  949 14:51:06.606254  scan_static_bus for USB3 port 1

  950 14:51:06.609344  scan_static_bus for USB3 port 1 done

  951 14:51:06.616267  scan_bus: scanning of bus USB3 port 1 took 9706 usecs

  952 14:51:06.616777  USB3 port 2 scanning...

  953 14:51:06.619567  scan_static_bus for USB3 port 2

  954 14:51:06.626374  scan_static_bus for USB3 port 2 done

  955 14:51:06.629384  scan_bus: scanning of bus USB3 port 2 took 9692 usecs

  956 14:51:06.633199  USB3 port 3 scanning...

  957 14:51:06.636048  scan_static_bus for USB3 port 3

  958 14:51:06.639088  scan_static_bus for USB3 port 3 done

  959 14:51:06.646083  scan_bus: scanning of bus USB3 port 3 took 9699 usecs

  960 14:51:06.649653  scan_static_bus for USB0 port 0 done

  961 14:51:06.655736  scan_bus: scanning of bus USB0 port 0 took 155356 usecs

  962 14:51:06.659340  scan_static_bus for PCI: 00:14.0 done

  963 14:51:06.662441  scan_bus: scanning of bus PCI: 00:14.0 took 172983 usecs

  964 14:51:06.665557  PCI: 00:15.0 scanning...

  965 14:51:06.668984  scan_generic_bus for PCI: 00:15.0

  966 14:51:06.672338  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 14:51:06.679288  scan_generic_bus for PCI: 00:15.0 done

  968 14:51:06.682365  scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs

  969 14:51:06.685678  PCI: 00:15.1 scanning...

  970 14:51:06.688933  scan_generic_bus for PCI: 00:15.1

  971 14:51:06.692092  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 14:51:06.698950  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 14:51:06.702391  scan_generic_bus for PCI: 00:15.1 done

  974 14:51:06.709474  scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs

  975 14:51:06.710011  PCI: 00:19.0 scanning...

  976 14:51:06.712244  scan_generic_bus for PCI: 00:19.0

  977 14:51:06.719192  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 14:51:06.722073  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 14:51:06.725659  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 14:51:06.728644  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 14:51:06.735715  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 14:51:06.738874  scan_generic_bus for PCI: 00:19.0 done

  983 14:51:06.741925  scan_bus: scanning of bus PCI: 00:19.0 took 30749 usecs

  984 14:51:06.745707  PCI: 00:1d.0 scanning...

  985 14:51:06.748672  do_pci_scan_bridge for PCI: 00:1d.0

  986 14:51:06.752420  PCI: pci_scan_bus for bus 01

  987 14:51:06.755593  PCI: 01:00.0 [1c5c/1327] enabled

  988 14:51:06.758730  Enabling Common Clock Configuration

  989 14:51:06.765305  L1 Sub-State supported from root port 29

  990 14:51:06.769002  L1 Sub-State Support = 0xf

  991 14:51:06.769430  CommonModeRestoreTime = 0x28

  992 14:51:06.775637  Power On Value = 0x16, Power On Scale = 0x0

  993 14:51:06.776116  ASPM: Enabled L1

  994 14:51:06.782070  scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs

  995 14:51:06.785491  PCI: 00:1e.2 scanning...

  996 14:51:06.788727  scan_generic_bus for PCI: 00:1e.2

  997 14:51:06.791676  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 14:51:06.795020  scan_generic_bus for PCI: 00:1e.2 done

  999 14:51:06.801913  scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs

 1000 14:51:06.805168  PCI: 00:1e.3 scanning...

 1001 14:51:06.808669  scan_generic_bus for PCI: 00:1e.3

 1002 14:51:06.811616  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 14:51:06.814954  scan_generic_bus for PCI: 00:1e.3 done

 1004 14:51:06.821897  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs

 1005 14:51:06.824656  PCI: 00:1f.0 scanning...

 1006 14:51:06.828343  scan_static_bus for PCI: 00:1f.0

 1007 14:51:06.828851  PNP: 0c09.0 enabled

 1008 14:51:06.831685  scan_static_bus for PCI: 00:1f.0 done

 1009 14:51:06.838397  scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs

 1010 14:51:06.841222  PCI: 00:1f.3 scanning...

 1011 14:51:06.847905  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1012 14:51:06.848394  PCI: 00:1f.4 scanning...

 1013 14:51:06.851587  scan_generic_bus for PCI: 00:1f.4

 1014 14:51:06.857781  scan_generic_bus for PCI: 00:1f.4 done

 1015 14:51:06.861048  scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs

 1016 14:51:06.864563  PCI: 00:1f.5 scanning...

 1017 14:51:06.867607  scan_generic_bus for PCI: 00:1f.5

 1018 14:51:06.871152  scan_generic_bus for PCI: 00:1f.5 done

 1019 14:51:06.877905  scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs

 1020 14:51:06.884259  scan_bus: scanning of bus DOMAIN: 0000 took 605100 usecs

 1021 14:51:06.887835  scan_static_bus for Root Device done

 1022 14:51:06.894413  scan_bus: scanning of bus Root Device took 624973 usecs

 1023 14:51:06.894879  done

 1024 14:51:06.897754  Chrome EC: UHEPI supported

 1025 14:51:06.904295  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 14:51:06.907397  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 14:51:06.914431  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 14:51:06.921050  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 14:51:06.924277  SPI flash protection: WPSW=0 SRP0=0

 1030 14:51:06.931261  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 14:51:06.934397  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1032 14:51:06.937656  found VGA at PCI: 00:02.0

 1033 14:51:06.940896  Setting up VGA for PCI: 00:02.0

 1034 14:51:06.948168  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 14:51:06.951240  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 14:51:06.954496  Allocating resources...

 1037 14:51:06.957382  Reading resources...

 1038 14:51:06.961099  Root Device read_resources bus 0 link: 0

 1039 14:51:06.964453  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 14:51:06.970743  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 14:51:06.974266  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 14:51:06.981912  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 14:51:06.984456  USB0 port 0 read_resources bus 0 link: 0

 1044 14:51:06.993046  USB0 port 0 read_resources bus 0 link: 0 done

 1045 14:51:06.996282  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 14:51:07.003473  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 14:51:07.006771  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 14:51:07.013659  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 14:51:07.017128  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 14:51:07.024438  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 14:51:07.030925  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 14:51:07.033928  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 14:51:07.040620  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 14:51:07.044169  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 14:51:07.050991  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 14:51:07.054313  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 14:51:07.060708  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 14:51:07.063782  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 14:51:07.070629  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 14:51:07.077277  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 14:51:07.080489  Root Device read_resources bus 0 link: 0 done

 1062 14:51:07.084112  Done reading resources.

 1063 14:51:07.087027  Show resources in subtree (Root Device)...After reading.

 1064 14:51:07.093891   Root Device child on link 0 CPU_CLUSTER: 0

 1065 14:51:07.096890    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 14:51:07.097317     APIC: 00

 1067 14:51:07.100813     APIC: 02

 1068 14:51:07.101396     APIC: 04

 1069 14:51:07.103531     APIC: 01

 1070 14:51:07.103955     APIC: 03

 1071 14:51:07.104289     APIC: 05

 1072 14:51:07.107386     APIC: 07

 1073 14:51:07.107810     APIC: 06

 1074 14:51:07.110899    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 14:51:07.120218    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 14:51:07.176792    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 14:51:07.177305     PCI: 00:00.0

 1078 14:51:07.178285     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 14:51:07.178710     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 14:51:07.179103     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 14:51:07.179424     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 14:51:07.226323     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 14:51:07.226857     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 14:51:07.227641     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 14:51:07.228167     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 14:51:07.228563     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 14:51:07.228885     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 14:51:07.276412     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 14:51:07.276954     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 14:51:07.277547     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 14:51:07.278256     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 14:51:07.278604     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 14:51:07.314053     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 14:51:07.314894     PCI: 00:02.0

 1095 14:51:07.315312     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 14:51:07.315712     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 14:51:07.316043     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 14:51:07.316487     PCI: 00:04.0

 1099 14:51:07.319237     PCI: 00:08.0

 1100 14:51:07.326060     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 14:51:07.328918     PCI: 00:12.0

 1102 14:51:07.338954     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 14:51:07.341869     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 14:51:07.351845     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 14:51:07.355162      USB0 port 0 child on link 0 USB2 port 0

 1106 14:51:07.358618       USB2 port 0

 1107 14:51:07.359041       USB2 port 1

 1108 14:51:07.361902       USB2 port 2

 1109 14:51:07.365638       USB2 port 3

 1110 14:51:07.366061       USB2 port 5

 1111 14:51:07.368513       USB2 port 6

 1112 14:51:07.368930       USB2 port 9

 1113 14:51:07.372222       USB3 port 0

 1114 14:51:07.372638       USB3 port 1

 1115 14:51:07.375012       USB3 port 2

 1116 14:51:07.375425       USB3 port 3

 1117 14:51:07.378748       USB3 port 4

 1118 14:51:07.379280     PCI: 00:14.2

 1119 14:51:07.388374     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 14:51:07.398857     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 14:51:07.401423     PCI: 00:14.3

 1122 14:51:07.411734     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 14:51:07.414929     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 14:51:07.425037     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 14:51:07.428156      I2C: 01:15

 1126 14:51:07.431480     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 14:51:07.441037     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 14:51:07.441482      I2C: 02:5d

 1129 14:51:07.444855      GENERIC: 0.0

 1130 14:51:07.445278     PCI: 00:16.0

 1131 14:51:07.454327     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 14:51:07.457666     PCI: 00:17.0

 1133 14:51:07.467298     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 14:51:07.474265     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 14:51:07.484254     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 14:51:07.490733     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 14:51:07.500313     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 14:51:07.510663     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 14:51:07.513723     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 14:51:07.523423     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 14:51:07.523912      I2C: 03:1a

 1142 14:51:07.527188      I2C: 03:38

 1143 14:51:07.527609      I2C: 03:39

 1144 14:51:07.530055      I2C: 03:3a

 1145 14:51:07.530476      I2C: 03:3b

 1146 14:51:07.536861     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 14:51:07.544047     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 14:51:07.553542     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 14:51:07.563333     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 14:51:07.566872      PCI: 01:00.0

 1151 14:51:07.576635      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 14:51:07.577066     PCI: 00:1e.0

 1153 14:51:07.586376     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 14:51:07.596437     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 14:51:07.602935     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 14:51:07.613282     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 14:51:07.613803      SPI: 00

 1158 14:51:07.616440     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 14:51:07.626075     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 14:51:07.629864      SPI: 01

 1161 14:51:07.632928     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 14:51:07.642614     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 14:51:07.649327     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 14:51:07.652914      PNP: 0c09.0

 1165 14:51:07.659514      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 14:51:07.662484     PCI: 00:1f.3

 1167 14:51:07.672562     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 14:51:07.682590     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 14:51:07.683027     PCI: 00:1f.4

 1170 14:51:07.692539     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 14:51:07.702329     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 14:51:07.706078     PCI: 00:1f.5

 1173 14:51:07.712032     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 14:51:07.718899  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 14:51:07.725470  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 14:51:07.732148  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 14:51:07.735229  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 14:51:07.739005  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 14:51:07.745179  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 14:51:07.748752  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 14:51:07.755439  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 14:51:07.761835  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 14:51:07.768668  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 14:51:07.778687  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 14:51:07.785541  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 14:51:07.788345  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 14:51:07.794732  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 14:51:07.801815  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 14:51:07.804927  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 14:51:07.811413  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 14:51:07.815150  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 14:51:07.818029  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 14:51:07.824612  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 14:51:07.828311  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 14:51:07.834502  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 14:51:07.837823  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 14:51:07.844388  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 14:51:07.848273  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 14:51:07.854665  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 14:51:07.857638  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 14:51:07.864207  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 14:51:07.867885  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 14:51:07.874418  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 14:51:07.877962  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 14:51:07.884486  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 14:51:07.887549  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 14:51:07.893996  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 14:51:07.897667  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 14:51:07.901012  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 14:51:07.907563  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 14:51:07.917651  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 14:51:07.920506  avoid_fixed_resources: DOMAIN: 0000

 1213 14:51:07.924199  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 14:51:07.930709  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 14:51:07.940773  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 14:51:07.946981  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 14:51:07.953585  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 14:51:07.960117  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 14:51:07.970305  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 14:51:07.977295  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 14:51:07.983415  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 14:51:07.993241  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 14:51:08.000165  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 14:51:08.007210  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 14:51:08.009901  Setting resources...

 1226 14:51:08.016732  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 14:51:08.019914  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 14:51:08.023093  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 14:51:08.026557  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 14:51:08.029564  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 14:51:08.036601  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 14:51:08.042880  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 14:51:08.049795  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 14:51:08.056652  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 14:51:08.063006  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 14:51:08.066461  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 14:51:08.073090  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 14:51:08.076012  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 14:51:08.083192  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 14:51:08.085964  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 14:51:08.092607  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 14:51:08.096044  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 14:51:08.102461  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 14:51:08.105759  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 14:51:08.112513  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 14:51:08.115949  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 14:51:08.122529  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 14:51:08.125681  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 14:51:08.132474  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 14:51:08.135933  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 14:51:08.142992  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 14:51:08.145558  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 14:51:08.149318  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 14:51:08.156285  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 14:51:08.158905  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 14:51:08.165724  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 14:51:08.168592  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 14:51:08.178871  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 14:51:08.185851  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 14:51:08.192279  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 14:51:08.198736  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 14:51:08.205221  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 14:51:08.211926  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 14:51:08.215317  Root Device assign_resources, bus 0 link: 0

 1265 14:51:08.221716  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 14:51:08.228592  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 14:51:08.238347  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 14:51:08.245479  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 14:51:08.254776  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 14:51:08.261728  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 14:51:08.271352  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 14:51:08.274963  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 14:51:08.281108  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 14:51:08.287850  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 14:51:08.294631  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 14:51:08.304851  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 14:51:08.311388  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 14:51:08.318058  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 14:51:08.321684  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 14:51:08.331034  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 14:51:08.334422  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 14:51:08.338064  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 14:51:08.348541  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 14:51:08.355087  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 14:51:08.364687  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 14:51:08.371300  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 14:51:08.377833  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 14:51:08.387692  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 14:51:08.394139  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 14:51:08.404410  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 14:51:08.407892  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 14:51:08.411021  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 14:51:08.420558  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 14:51:08.430631  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 14:51:08.436855  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 14:51:08.443721  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 14:51:08.450134  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 14:51:08.457115  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 14:51:08.463238  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 14:51:08.473343  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 14:51:08.476934  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 14:51:08.479934  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 14:51:08.489965  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 14:51:08.492964  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 14:51:08.499733  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 14:51:08.502829  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 14:51:08.509540  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 14:51:08.513260  LPC: Trying to open IO window from 800 size 1ff

 1309 14:51:08.522807  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 14:51:08.529434  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 14:51:08.539431  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 14:51:08.546164  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 14:51:08.552325  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 14:51:08.555836  Root Device assign_resources, bus 0 link: 0

 1315 14:51:08.559447  Done setting resources.

 1316 14:51:08.565446  Show resources in subtree (Root Device)...After assigning values.

 1317 14:51:08.569259   Root Device child on link 0 CPU_CLUSTER: 0

 1318 14:51:08.572517    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 14:51:08.575356     APIC: 00

 1320 14:51:08.575769     APIC: 02

 1321 14:51:08.576135     APIC: 04

 1322 14:51:08.578935     APIC: 01

 1323 14:51:08.579343     APIC: 03

 1324 14:51:08.582081     APIC: 05

 1325 14:51:08.582489     APIC: 07

 1326 14:51:08.582811     APIC: 06

 1327 14:51:08.588761    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 14:51:08.598857    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 14:51:08.608675    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 14:51:08.609094     PCI: 00:00.0

 1331 14:51:08.618411     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 14:51:08.628159     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 14:51:08.638337     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 14:51:08.648456     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 14:51:08.658502     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 14:51:08.667806     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 14:51:08.674609     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 14:51:08.684433     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 14:51:08.694210     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 14:51:08.704633     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 14:51:08.714288     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 14:51:08.721043     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 14:51:08.730760     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 14:51:08.740636     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 14:51:08.750458     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 14:51:08.760642     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 14:51:08.761163     PCI: 00:02.0

 1348 14:51:08.773981     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 14:51:08.783703     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 14:51:08.793456     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 14:51:08.793898     PCI: 00:04.0

 1352 14:51:08.796489     PCI: 00:08.0

 1353 14:51:08.806894     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 14:51:08.807419     PCI: 00:12.0

 1355 14:51:08.816694     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 14:51:08.823115     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 14:51:08.833420     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 14:51:08.836222      USB0 port 0 child on link 0 USB2 port 0

 1359 14:51:08.839523       USB2 port 0

 1360 14:51:08.839937       USB2 port 1

 1361 14:51:08.843204       USB2 port 2

 1362 14:51:08.843619       USB2 port 3

 1363 14:51:08.846436       USB2 port 5

 1364 14:51:08.846852       USB2 port 6

 1365 14:51:08.849346       USB2 port 9

 1366 14:51:08.849773       USB3 port 0

 1367 14:51:08.853404       USB3 port 1

 1368 14:51:08.853976       USB3 port 2

 1369 14:51:08.856403       USB3 port 3

 1370 14:51:08.859957       USB3 port 4

 1371 14:51:08.860420     PCI: 00:14.2

 1372 14:51:08.869256     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 14:51:08.878926     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 14:51:08.882356     PCI: 00:14.3

 1375 14:51:08.892748     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 14:51:08.896030     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 14:51:08.905473     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 14:51:08.908897      I2C: 01:15

 1379 14:51:08.912669     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 14:51:08.922187     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 14:51:08.925507      I2C: 02:5d

 1382 14:51:08.925969      GENERIC: 0.0

 1383 14:51:08.929048     PCI: 00:16.0

 1384 14:51:08.938565     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 14:51:08.939007     PCI: 00:17.0

 1386 14:51:08.948987     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 14:51:08.962123     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 14:51:08.968821     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 14:51:08.978358     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 14:51:08.988276     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 14:51:08.998370     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 14:51:09.001695     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 14:51:09.011725     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 14:51:09.015254      I2C: 03:1a

 1395 14:51:09.015818      I2C: 03:38

 1396 14:51:09.018773      I2C: 03:39

 1397 14:51:09.019189      I2C: 03:3a

 1398 14:51:09.021525      I2C: 03:3b

 1399 14:51:09.024919     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 14:51:09.034514     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 14:51:09.044494     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 14:51:09.054789     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 14:51:09.057963      PCI: 01:00.0

 1404 14:51:09.067772      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 14:51:09.068335     PCI: 00:1e.0

 1406 14:51:09.081170     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 14:51:09.091102     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 14:51:09.093903     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 14:51:09.104070     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 14:51:09.104553      SPI: 00

 1411 14:51:09.111179     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 14:51:09.120390     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 14:51:09.120856      SPI: 01

 1414 14:51:09.124194     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 14:51:09.134044     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 14:51:09.143914     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 14:51:09.144337      PNP: 0c09.0

 1418 14:51:09.153765      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 14:51:09.154297     PCI: 00:1f.3

 1420 14:51:09.163526     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 14:51:09.176815     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 14:51:09.177411     PCI: 00:1f.4

 1423 14:51:09.186478     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 14:51:09.196440     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 14:51:09.196876     PCI: 00:1f.5

 1426 14:51:09.209779     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 14:51:09.210241  Done allocating resources.

 1428 14:51:09.216566  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 14:51:09.219920  Enabling resources...

 1430 14:51:09.222655  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 14:51:09.226116  PCI: 00:00.0 cmd <- 06

 1432 14:51:09.229626  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 14:51:09.232974  PCI: 00:02.0 cmd <- 03

 1434 14:51:09.236328  PCI: 00:08.0 cmd <- 06

 1435 14:51:09.239416  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 14:51:09.243017  PCI: 00:12.0 cmd <- 02

 1437 14:51:09.245882  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 14:51:09.246317  PCI: 00:14.0 cmd <- 02

 1439 14:51:09.249629  PCI: 00:14.2 cmd <- 02

 1440 14:51:09.252982  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 14:51:09.256318  PCI: 00:14.3 cmd <- 02

 1442 14:51:09.259433  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 14:51:09.263116  PCI: 00:15.0 cmd <- 02

 1444 14:51:09.266087  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 14:51:09.269204  PCI: 00:15.1 cmd <- 02

 1446 14:51:09.273008  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 14:51:09.276082  PCI: 00:16.0 cmd <- 02

 1448 14:51:09.279521  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 14:51:09.282698  PCI: 00:17.0 cmd <- 03

 1450 14:51:09.286043  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 14:51:09.289044  PCI: 00:19.0 cmd <- 02

 1452 14:51:09.292731  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 14:51:09.295705  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 14:51:09.296128  PCI: 00:1d.0 cmd <- 06

 1455 14:51:09.303090  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 14:51:09.303521  PCI: 00:1e.0 cmd <- 06

 1457 14:51:09.306294  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 14:51:09.309229  PCI: 00:1e.2 cmd <- 06

 1459 14:51:09.312775  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 14:51:09.316214  PCI: 00:1e.3 cmd <- 02

 1461 14:51:09.319379  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 14:51:09.322711  PCI: 00:1f.0 cmd <- 407

 1463 14:51:09.326246  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 14:51:09.329363  PCI: 00:1f.3 cmd <- 02

 1465 14:51:09.332958  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 14:51:09.335556  PCI: 00:1f.4 cmd <- 03

 1467 14:51:09.338964  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 14:51:09.342623  PCI: 00:1f.5 cmd <- 406

 1469 14:51:09.350595  PCI: 01:00.0 cmd <- 02

 1470 14:51:09.356027  done.

 1471 14:51:09.368287  ME: Version: 14.0.39.1367

 1472 14:51:09.375099  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1473 14:51:09.378228  Initializing devices...

 1474 14:51:09.378763  Root Device init ...

 1475 14:51:09.384836  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 14:51:09.388384  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 14:51:09.395368  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 14:51:09.402188  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 14:51:09.408170  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 14:51:09.411602  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 14:51:09.414915  Root Device init finished in 35186 usecs

 1482 14:51:09.418562  CPU_CLUSTER: 0 init ...

 1483 14:51:09.424774  CPU_CLUSTER: 0 init finished in 2449 usecs

 1484 14:51:09.429634  PCI: 00:00.0 init ...

 1485 14:51:09.432881  CPU TDP: 15 Watts

 1486 14:51:09.436214  CPU PL2 = 64 Watts

 1487 14:51:09.439201  PCI: 00:00.0 init finished in 7074 usecs

 1488 14:51:09.442395  PCI: 00:02.0 init ...

 1489 14:51:09.446023  PCI: 00:02.0 init finished in 2253 usecs

 1490 14:51:09.448780  PCI: 00:08.0 init ...

 1491 14:51:09.452441  PCI: 00:08.0 init finished in 2252 usecs

 1492 14:51:09.456056  PCI: 00:12.0 init ...

 1493 14:51:09.459074  PCI: 00:12.0 init finished in 2254 usecs

 1494 14:51:09.462037  PCI: 00:14.0 init ...

 1495 14:51:09.465546  PCI: 00:14.0 init finished in 2244 usecs

 1496 14:51:09.469215  PCI: 00:14.2 init ...

 1497 14:51:09.472491  PCI: 00:14.2 init finished in 2243 usecs

 1498 14:51:09.475573  PCI: 00:14.3 init ...

 1499 14:51:09.479159  PCI: 00:14.3 init finished in 2272 usecs

 1500 14:51:09.482349  PCI: 00:15.0 init ...

 1501 14:51:09.485488  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 14:51:09.488442  PCI: 00:15.0 init finished in 5977 usecs

 1503 14:51:09.492234  PCI: 00:15.1 init ...

 1504 14:51:09.495319  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 14:51:09.501727  PCI: 00:15.1 init finished in 5977 usecs

 1506 14:51:09.502154  PCI: 00:16.0 init ...

 1507 14:51:09.508465  PCI: 00:16.0 init finished in 2253 usecs

 1508 14:51:09.508896  PCI: 00:19.0 init ...

 1509 14:51:09.515455  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 14:51:09.518992  PCI: 00:19.0 init finished in 5979 usecs

 1511 14:51:09.521650  PCI: 00:1d.0 init ...

 1512 14:51:09.525156  Initializing PCH PCIe bridge.

 1513 14:51:09.528552  PCI: 00:1d.0 init finished in 5286 usecs

 1514 14:51:09.531360  PCI: 00:1f.0 init ...

 1515 14:51:09.534903  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 14:51:09.541414  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 14:51:09.541878  IOAPIC: ID = 0x02

 1518 14:51:09.544541  IOAPIC: Dumping registers

 1519 14:51:09.547836    reg 0x0000: 0x02000000

 1520 14:51:09.551280    reg 0x0001: 0x00770020

 1521 14:51:09.551716    reg 0x0002: 0x00000000

 1522 14:51:09.557938  PCI: 00:1f.0 init finished in 23538 usecs

 1523 14:51:09.561381  PCI: 00:1f.4 init ...

 1524 14:51:09.564516  PCI: 00:1f.4 init finished in 2262 usecs

 1525 14:51:09.575487  PCI: 01:00.0 init ...

 1526 14:51:09.578293  PCI: 01:00.0 init finished in 2253 usecs

 1527 14:51:09.582927  PNP: 0c09.0 init ...

 1528 14:51:09.586236  Google Chrome EC uptime: 11.054 seconds

 1529 14:51:09.592912  Google Chrome AP resets since EC boot: 0

 1530 14:51:09.596331  Google Chrome most recent AP reset causes:

 1531 14:51:09.602757  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 14:51:09.605896  PNP: 0c09.0 init finished in 20576 usecs

 1533 14:51:09.608913  Devices initialized

 1534 14:51:09.609340  Show all devs... After init.

 1535 14:51:09.612950  Root Device: enabled 1

 1536 14:51:09.615566  CPU_CLUSTER: 0: enabled 1

 1537 14:51:09.619142  DOMAIN: 0000: enabled 1

 1538 14:51:09.619614  APIC: 00: enabled 1

 1539 14:51:09.622702  PCI: 00:00.0: enabled 1

 1540 14:51:09.625905  PCI: 00:02.0: enabled 1

 1541 14:51:09.629166  PCI: 00:04.0: enabled 0

 1542 14:51:09.629611  PCI: 00:05.0: enabled 0

 1543 14:51:09.632349  PCI: 00:12.0: enabled 1

 1544 14:51:09.635860  PCI: 00:12.5: enabled 0

 1545 14:51:09.636429  PCI: 00:12.6: enabled 0

 1546 14:51:09.639224  PCI: 00:14.0: enabled 1

 1547 14:51:09.642191  PCI: 00:14.1: enabled 0

 1548 14:51:09.645729  PCI: 00:14.3: enabled 1

 1549 14:51:09.646247  PCI: 00:14.5: enabled 0

 1550 14:51:09.648966  PCI: 00:15.0: enabled 1

 1551 14:51:09.651844  PCI: 00:15.1: enabled 1

 1552 14:51:09.655266  PCI: 00:15.2: enabled 0

 1553 14:51:09.655778  PCI: 00:15.3: enabled 0

 1554 14:51:09.658684  PCI: 00:16.0: enabled 1

 1555 14:51:09.662230  PCI: 00:16.1: enabled 0

 1556 14:51:09.665630  PCI: 00:16.2: enabled 0

 1557 14:51:09.666135  PCI: 00:16.3: enabled 0

 1558 14:51:09.668924  PCI: 00:16.4: enabled 0

 1559 14:51:09.672238  PCI: 00:16.5: enabled 0

 1560 14:51:09.675566  PCI: 00:17.0: enabled 1

 1561 14:51:09.676082  PCI: 00:19.0: enabled 1

 1562 14:51:09.678729  PCI: 00:19.1: enabled 0

 1563 14:51:09.681950  PCI: 00:19.2: enabled 0

 1564 14:51:09.685376  PCI: 00:1a.0: enabled 0

 1565 14:51:09.685842  PCI: 00:1c.0: enabled 0

 1566 14:51:09.688566  PCI: 00:1c.1: enabled 0

 1567 14:51:09.691980  PCI: 00:1c.2: enabled 0

 1568 14:51:09.692402  PCI: 00:1c.3: enabled 0

 1569 14:51:09.695640  PCI: 00:1c.4: enabled 0

 1570 14:51:09.698257  PCI: 00:1c.5: enabled 0

 1571 14:51:09.701917  PCI: 00:1c.6: enabled 0

 1572 14:51:09.702353  PCI: 00:1c.7: enabled 0

 1573 14:51:09.704920  PCI: 00:1d.0: enabled 1

 1574 14:51:09.708959  PCI: 00:1d.1: enabled 0

 1575 14:51:09.712187  PCI: 00:1d.2: enabled 0

 1576 14:51:09.712771  PCI: 00:1d.3: enabled 0

 1577 14:51:09.715352  PCI: 00:1d.4: enabled 0

 1578 14:51:09.718176  PCI: 00:1d.5: enabled 0

 1579 14:51:09.721679  PCI: 00:1e.0: enabled 1

 1580 14:51:09.722110  PCI: 00:1e.1: enabled 0

 1581 14:51:09.724964  PCI: 00:1e.2: enabled 1

 1582 14:51:09.728284  PCI: 00:1e.3: enabled 1

 1583 14:51:09.728706  PCI: 00:1f.0: enabled 1

 1584 14:51:09.732252  PCI: 00:1f.1: enabled 0

 1585 14:51:09.734998  PCI: 00:1f.2: enabled 0

 1586 14:51:09.737837  PCI: 00:1f.3: enabled 1

 1587 14:51:09.738259  PCI: 00:1f.4: enabled 1

 1588 14:51:09.741575  PCI: 00:1f.5: enabled 1

 1589 14:51:09.744927  PCI: 00:1f.6: enabled 0

 1590 14:51:09.748371  USB0 port 0: enabled 1

 1591 14:51:09.748840  I2C: 01:15: enabled 1

 1592 14:51:09.751300  I2C: 02:5d: enabled 1

 1593 14:51:09.754521  GENERIC: 0.0: enabled 1

 1594 14:51:09.754944  I2C: 03:1a: enabled 1

 1595 14:51:09.757760  I2C: 03:38: enabled 1

 1596 14:51:09.761273  I2C: 03:39: enabled 1

 1597 14:51:09.761966  I2C: 03:3a: enabled 1

 1598 14:51:09.764516  I2C: 03:3b: enabled 1

 1599 14:51:09.767902  PCI: 00:00.0: enabled 1

 1600 14:51:09.768449  SPI: 00: enabled 1

 1601 14:51:09.771560  SPI: 01: enabled 1

 1602 14:51:09.774563  PNP: 0c09.0: enabled 1

 1603 14:51:09.775136  USB2 port 0: enabled 1

 1604 14:51:09.777715  USB2 port 1: enabled 1

 1605 14:51:09.781152  USB2 port 2: enabled 0

 1606 14:51:09.784557  USB2 port 3: enabled 0

 1607 14:51:09.784979  USB2 port 5: enabled 0

 1608 14:51:09.787969  USB2 port 6: enabled 1

 1609 14:51:09.791170  USB2 port 9: enabled 1

 1610 14:51:09.791592  USB3 port 0: enabled 1

 1611 14:51:09.794336  USB3 port 1: enabled 1

 1612 14:51:09.797975  USB3 port 2: enabled 1

 1613 14:51:09.798495  USB3 port 3: enabled 1

 1614 14:51:09.801336  USB3 port 4: enabled 0

 1615 14:51:09.804693  APIC: 02: enabled 1

 1616 14:51:09.805209  APIC: 04: enabled 1

 1617 14:51:09.807710  APIC: 01: enabled 1

 1618 14:51:09.811153  APIC: 03: enabled 1

 1619 14:51:09.811674  APIC: 05: enabled 1

 1620 14:51:09.814325  APIC: 07: enabled 1

 1621 14:51:09.817478  APIC: 06: enabled 1

 1622 14:51:09.818033  PCI: 00:08.0: enabled 1

 1623 14:51:09.821199  PCI: 00:14.2: enabled 1

 1624 14:51:09.823928  PCI: 01:00.0: enabled 1

 1625 14:51:09.827363  Disabling ACPI via APMC:

 1626 14:51:09.831322  done.

 1627 14:51:09.834454  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 14:51:09.837465  ELOG: NV offset 0xaf0000 size 0x4000

 1629 14:51:09.844709  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 14:51:09.851239  ELOG: Event(17) added with size 13 at 2023-05-03 14:51:10 UTC

 1631 14:51:09.857432  ELOG: Event(92) added with size 9 at 2023-05-03 14:51:10 UTC

 1632 14:51:09.864419  ELOG: Event(93) added with size 9 at 2023-05-03 14:51:10 UTC

 1633 14:51:09.870756  ELOG: Event(9A) added with size 9 at 2023-05-03 14:51:10 UTC

 1634 14:51:09.877095  ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:10 UTC

 1635 14:51:09.884038  ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:10 UTC

 1636 14:51:09.887419  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1637 14:51:09.895143  ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:10 UTC

 1638 14:51:09.904632  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1639 14:51:09.911851  ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:10 UTC

 1640 14:51:09.914932  elog_add_boot_reason: Logged dev mode boot

 1641 14:51:09.917707  Finalize devices...

 1642 14:51:09.918130  PCI: 00:17.0 final

 1643 14:51:09.921645  Devices finalized

 1644 14:51:09.924794  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1645 14:51:09.931087  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1646 14:51:09.934271  ME: HFSTS1                  : 0x90000245

 1647 14:51:09.937718  ME: HFSTS2                  : 0x3B850126

 1648 14:51:09.944427  ME: HFSTS3                  : 0x00000020

 1649 14:51:09.947860  ME: HFSTS4                  : 0x00004800

 1650 14:51:09.950702  ME: HFSTS5                  : 0x00000000

 1651 14:51:09.954162  ME: HFSTS6                  : 0x40400006

 1652 14:51:09.957722  ME: Manufacturing Mode      : NO

 1653 14:51:09.960917  ME: FW Partition Table      : OK

 1654 14:51:09.964010  ME: Bringup Loader Failure  : NO

 1655 14:51:09.967773  ME: Firmware Init Complete  : YES

 1656 14:51:09.970909  ME: Boot Options Present    : NO

 1657 14:51:09.974276  ME: Update In Progress      : NO

 1658 14:51:09.977104  ME: D0i3 Support            : YES

 1659 14:51:09.980427  ME: Low Power State Enabled : NO

 1660 14:51:09.983688  ME: CPU Replaced            : NO

 1661 14:51:09.987413  ME: CPU Replacement Valid   : YES

 1662 14:51:09.990446  ME: Current Working State   : 5

 1663 14:51:09.994004  ME: Current Operation State : 1

 1664 14:51:09.997572  ME: Current Operation Mode  : 0

 1665 14:51:10.000427  ME: Error Code              : 0

 1666 14:51:10.004010  ME: CPU Debug Disabled      : YES

 1667 14:51:10.006890  ME: TXT Support             : NO

 1668 14:51:10.013860  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1669 14:51:10.020628  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1670 14:51:10.021245  CBFS @ c08000 size 3f8000

 1671 14:51:10.026814  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1672 14:51:10.030475  CBFS: Locating 'fallback/dsdt.aml'

 1673 14:51:10.033551  CBFS: Found @ offset 10bb80 size 3fa5

 1674 14:51:10.040664  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1675 14:51:10.043668  CBFS @ c08000 size 3f8000

 1676 14:51:10.046814  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1677 14:51:10.049865  CBFS: Locating 'fallback/slic'

 1678 14:51:10.055463  CBFS: 'fallback/slic' not found.

 1679 14:51:10.062083  ACPI: Writing ACPI tables at 99b3e000.

 1680 14:51:10.062681  ACPI:    * FACS

 1681 14:51:10.065127  ACPI:    * DSDT

 1682 14:51:10.068711  Ramoops buffer: 0x100000@0x99a3d000.

 1683 14:51:10.072073  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1684 14:51:10.078233  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1685 14:51:10.081689  Google Chrome EC: version:

 1686 14:51:10.084986  	ro: helios_v2.0.2659-56403530b

 1687 14:51:10.088505  	rw: helios_v2.0.2849-c41de27e7d

 1688 14:51:10.088921    running image: 1

 1689 14:51:10.092570  ACPI:    * FADT

 1690 14:51:10.093086  SCI is IRQ9

 1691 14:51:10.099317  ACPI: added table 1/32, length now 40

 1692 14:51:10.099736  ACPI:     * SSDT

 1693 14:51:10.102396  Found 1 CPU(s) with 8 core(s) each.

 1694 14:51:10.106028  Error: Could not locate 'wifi_sar' in VPD.

 1695 14:51:10.112327  Checking CBFS for default SAR values

 1696 14:51:10.115562  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1697 14:51:10.119363  CBFS @ c08000 size 3f8000

 1698 14:51:10.125761  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1699 14:51:10.129039  CBFS: Locating 'wifi_sar_defaults.hex'

 1700 14:51:10.131976  CBFS: Found @ offset 5fac0 size 77

 1701 14:51:10.135568  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1702 14:51:10.142238  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1703 14:51:10.146035  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1704 14:51:10.151883  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1705 14:51:10.155741  failed to find key in VPD: dsm_calib_r0_0

 1706 14:51:10.165382  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1707 14:51:10.169308  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1708 14:51:10.171900  failed to find key in VPD: dsm_calib_r0_1

 1709 14:51:10.181722  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1710 14:51:10.188451  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1711 14:51:10.191756  failed to find key in VPD: dsm_calib_r0_2

 1712 14:51:10.201774  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1713 14:51:10.205436  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1714 14:51:10.211487  failed to find key in VPD: dsm_calib_r0_3

 1715 14:51:10.218502  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1716 14:51:10.224788  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1717 14:51:10.228343  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1718 14:51:10.234676  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1719 14:51:10.238085  EC returned error result code 1

 1720 14:51:10.242057  EC returned error result code 1

 1721 14:51:10.245115  EC returned error result code 1

 1722 14:51:10.248475  PS2K: Bad resp from EC. Vivaldi disabled!

 1723 14:51:10.255498  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1724 14:51:10.261544  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1725 14:51:10.265333  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1726 14:51:10.271555  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1727 14:51:10.275063  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1728 14:51:10.281548  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1729 14:51:10.288188  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1730 14:51:10.294727  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1731 14:51:10.298126  ACPI: added table 2/32, length now 44

 1732 14:51:10.298551  ACPI:    * MCFG

 1733 14:51:10.304849  ACPI: added table 3/32, length now 48

 1734 14:51:10.305366  ACPI:    * TPM2

 1735 14:51:10.308297  TPM2 log created at 99a2d000

 1736 14:51:10.311334  ACPI: added table 4/32, length now 52

 1737 14:51:10.314818  ACPI:    * MADT

 1738 14:51:10.315237  SCI is IRQ9

 1739 14:51:10.318120  ACPI: added table 5/32, length now 56

 1740 14:51:10.320935  current = 99b43ac0

 1741 14:51:10.321356  ACPI:    * DMAR

 1742 14:51:10.324329  ACPI: added table 6/32, length now 60

 1743 14:51:10.328124  ACPI:    * IGD OpRegion

 1744 14:51:10.330828  GMA: Found VBT in CBFS

 1745 14:51:10.334411  GMA: Found valid VBT in CBFS

 1746 14:51:10.337775  ACPI: added table 7/32, length now 64

 1747 14:51:10.338199  ACPI:    * HPET

 1748 14:51:10.340954  ACPI: added table 8/32, length now 68

 1749 14:51:10.344314  ACPI: done.

 1750 14:51:10.347738  ACPI tables: 31744 bytes.

 1751 14:51:10.350774  smbios_write_tables: 99a2c000

 1752 14:51:10.354391  EC returned error result code 3

 1753 14:51:10.357812  Couldn't obtain OEM name from CBI

 1754 14:51:10.360960  Create SMBIOS type 17

 1755 14:51:10.364314  PCI: 00:00.0 (Intel Cannonlake)

 1756 14:51:10.364841  PCI: 00:14.3 (Intel WiFi)

 1757 14:51:10.367673  SMBIOS tables: 939 bytes.

 1758 14:51:10.371306  Writing table forward entry at 0x00000500

 1759 14:51:10.377775  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1760 14:51:10.380870  Writing coreboot table at 0x99b62000

 1761 14:51:10.387331   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1762 14:51:10.390764   1. 0000000000001000-000000000009ffff: RAM

 1763 14:51:10.397261   2. 00000000000a0000-00000000000fffff: RESERVED

 1764 14:51:10.400366   3. 0000000000100000-0000000099a2bfff: RAM

 1765 14:51:10.407484   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1766 14:51:10.410913   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1767 14:51:10.416987   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1768 14:51:10.424063   7. 000000009a000000-000000009f7fffff: RESERVED

 1769 14:51:10.427219   8. 00000000e0000000-00000000efffffff: RESERVED

 1770 14:51:10.430366   9. 00000000fc000000-00000000fc000fff: RESERVED

 1771 14:51:10.437205  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1772 14:51:10.440288  11. 00000000fed10000-00000000fed17fff: RESERVED

 1773 14:51:10.446676  12. 00000000fed80000-00000000fed83fff: RESERVED

 1774 14:51:10.450393  13. 00000000fed90000-00000000fed91fff: RESERVED

 1775 14:51:10.457018  14. 00000000feda0000-00000000feda1fff: RESERVED

 1776 14:51:10.460155  15. 0000000100000000-000000045e7fffff: RAM

 1777 14:51:10.463679  Graphics framebuffer located at 0xc0000000

 1778 14:51:10.466874  Passing 5 GPIOs to payload:

 1779 14:51:10.473545              NAME |       PORT | POLARITY |     VALUE

 1780 14:51:10.476727     write protect |  undefined |     high |       low

 1781 14:51:10.483436               lid |  undefined |     high |      high

 1782 14:51:10.490069             power |  undefined |     high |       low

 1783 14:51:10.493065             oprom |  undefined |     high |       low

 1784 14:51:10.499649          EC in RW | 0x000000cb |     high |       low

 1785 14:51:10.500075  Board ID: 4

 1786 14:51:10.506144  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1787 14:51:10.506578  CBFS @ c08000 size 3f8000

 1788 14:51:10.513073  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1789 14:51:10.519506  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1790 14:51:10.522525  coreboot table: 1492 bytes.

 1791 14:51:10.526183  IMD ROOT    0. 99fff000 00001000

 1792 14:51:10.529811  IMD SMALL   1. 99ffe000 00001000

 1793 14:51:10.532713  FSP MEMORY  2. 99c4e000 003b0000

 1794 14:51:10.536010  CONSOLE     3. 99c2e000 00020000

 1795 14:51:10.539435  FMAP        4. 99c2d000 0000054e

 1796 14:51:10.542687  TIME STAMP  5. 99c2c000 00000910

 1797 14:51:10.546570  VBOOT WORK  6. 99c18000 00014000

 1798 14:51:10.549885  MRC DATA    7. 99c16000 00001958

 1799 14:51:10.553056  ROMSTG STCK 8. 99c15000 00001000

 1800 14:51:10.556393  AFTER CAR   9. 99c0b000 0000a000

 1801 14:51:10.559532  RAMSTAGE   10. 99baf000 0005c000

 1802 14:51:10.563001  REFCODE    11. 99b7a000 00035000

 1803 14:51:10.566686  SMM BACKUP 12. 99b6a000 00010000

 1804 14:51:10.570141  COREBOOT   13. 99b62000 00008000

 1805 14:51:10.573210  ACPI       14. 99b3e000 00024000

 1806 14:51:10.576281  ACPI GNVS  15. 99b3d000 00001000

 1807 14:51:10.579992  RAMOOPS    16. 99a3d000 00100000

 1808 14:51:10.582929  TPM2 TCGLOG17. 99a2d000 00010000

 1809 14:51:10.586554  SMBIOS     18. 99a2c000 00000800

 1810 14:51:10.586960  IMD small region:

 1811 14:51:10.589730    IMD ROOT    0. 99ffec00 00000400

 1812 14:51:10.596373    FSP RUNTIME 1. 99ffebe0 00000004

 1813 14:51:10.599355    EC HOSTEVENT 2. 99ffebc0 00000008

 1814 14:51:10.602563    POWER STATE 3. 99ffeb80 00000040

 1815 14:51:10.606116    ROMSTAGE    4. 99ffeb60 00000004

 1816 14:51:10.609719    MEM INFO    5. 99ffe9a0 000001b9

 1817 14:51:10.612538    VPD         6. 99ffe920 0000006c

 1818 14:51:10.615930  MTRR: Physical address space:

 1819 14:51:10.622515  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1820 14:51:10.629385  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1821 14:51:10.632825  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1822 14:51:10.639219  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1823 14:51:10.645987  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1824 14:51:10.652221  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1825 14:51:10.659219  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1826 14:51:10.663259  MTRR: Fixed MSR 0x250 0x0606060606060606

 1827 14:51:10.665676  MTRR: Fixed MSR 0x258 0x0606060606060606

 1828 14:51:10.672174  MTRR: Fixed MSR 0x259 0x0000000000000000

 1829 14:51:10.675429  MTRR: Fixed MSR 0x268 0x0606060606060606

 1830 14:51:10.679075  MTRR: Fixed MSR 0x269 0x0606060606060606

 1831 14:51:10.682158  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1832 14:51:10.688778  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1833 14:51:10.691970  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1834 14:51:10.695525  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1835 14:51:10.698597  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1836 14:51:10.705331  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1837 14:51:10.708345  call enable_fixed_mtrr()

 1838 14:51:10.712083  CPU physical address size: 39 bits

 1839 14:51:10.715067  MTRR: default type WB/UC MTRR counts: 6/8.

 1840 14:51:10.718703  MTRR: WB selected as default type.

 1841 14:51:10.725278  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1842 14:51:10.731545  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1843 14:51:10.738081  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1844 14:51:10.744925  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1845 14:51:10.751220  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1846 14:51:10.754464  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1847 14:51:10.761700  MTRR: Fixed MSR 0x250 0x0606060606060606

 1848 14:51:10.765376  MTRR: Fixed MSR 0x258 0x0606060606060606

 1849 14:51:10.768501  MTRR: Fixed MSR 0x259 0x0000000000000000

 1850 14:51:10.772593  MTRR: Fixed MSR 0x268 0x0606060606060606

 1851 14:51:10.778413  MTRR: Fixed MSR 0x269 0x0606060606060606

 1852 14:51:10.781724  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1853 14:51:10.785475  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1854 14:51:10.788463  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1855 14:51:10.795040  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1856 14:51:10.798309  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1857 14:51:10.801193  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1858 14:51:10.801635  

 1859 14:51:10.804987  MTRR check

 1860 14:51:10.805495  Fixed MTRRs   : Enabled

 1861 14:51:10.807987  Variable MTRRs: Enabled

 1862 14:51:10.808504  

 1863 14:51:10.811203  call enable_fixed_mtrr()

 1864 14:51:10.817788  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1865 14:51:10.821555  CPU physical address size: 39 bits

 1866 14:51:10.824615  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1867 14:51:10.828418  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 14:51:10.834217  MTRR: Fixed MSR 0x250 0x0606060606060606

 1869 14:51:10.837505  MTRR: Fixed MSR 0x258 0x0606060606060606

 1870 14:51:10.841047  MTRR: Fixed MSR 0x259 0x0000000000000000

 1871 14:51:10.844251  MTRR: Fixed MSR 0x268 0x0606060606060606

 1872 14:51:10.851070  MTRR: Fixed MSR 0x269 0x0606060606060606

 1873 14:51:10.854157  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1874 14:51:10.857692  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1875 14:51:10.861103  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1876 14:51:10.867668  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1877 14:51:10.871384  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1878 14:51:10.874164  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1879 14:51:10.877498  MTRR: Fixed MSR 0x258 0x0606060606060606

 1880 14:51:10.881332  call enable_fixed_mtrr()

 1881 14:51:10.884146  MTRR: Fixed MSR 0x259 0x0000000000000000

 1882 14:51:10.891122  MTRR: Fixed MSR 0x268 0x0606060606060606

 1883 14:51:10.894166  MTRR: Fixed MSR 0x269 0x0606060606060606

 1884 14:51:10.897231  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1885 14:51:10.900893  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1886 14:51:10.907318  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1887 14:51:10.910929  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1888 14:51:10.913948  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1889 14:51:10.917026  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1890 14:51:10.921121  CPU physical address size: 39 bits

 1891 14:51:10.923617  call enable_fixed_mtrr()

 1892 14:51:10.930553  MTRR: Fixed MSR 0x250 0x0606060606060606

 1893 14:51:10.933575  MTRR: Fixed MSR 0x250 0x0606060606060606

 1894 14:51:10.937050  MTRR: Fixed MSR 0x258 0x0606060606060606

 1895 14:51:10.939985  MTRR: Fixed MSR 0x259 0x0000000000000000

 1896 14:51:10.946569  MTRR: Fixed MSR 0x268 0x0606060606060606

 1897 14:51:10.950050  MTRR: Fixed MSR 0x269 0x0606060606060606

 1898 14:51:10.953329  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1899 14:51:10.957295  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1900 14:51:10.963397  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1901 14:51:10.966651  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1902 14:51:10.970151  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1903 14:51:10.973281  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1904 14:51:10.979538  MTRR: Fixed MSR 0x258 0x0606060606060606

 1905 14:51:10.980010  call enable_fixed_mtrr()

 1906 14:51:10.986428  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 14:51:10.989912  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 14:51:10.993223  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 14:51:10.996348  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 14:51:11.003266  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 14:51:11.006025  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 14:51:11.009862  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 14:51:11.013211  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 14:51:11.016225  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 14:51:11.022829  CPU physical address size: 39 bits

 1916 14:51:11.023353  call enable_fixed_mtrr()

 1917 14:51:11.025935  CBFS @ c08000 size 3f8000

 1918 14:51:11.032917  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1919 14:51:11.035816  CPU physical address size: 39 bits

 1920 14:51:11.039366  CPU physical address size: 39 bits

 1921 14:51:11.042887  CBFS: Locating 'fallback/payload'

 1922 14:51:11.045999  MTRR: Fixed MSR 0x250 0x0606060606060606

 1923 14:51:11.052419  MTRR: Fixed MSR 0x258 0x0606060606060606

 1924 14:51:11.056122  MTRR: Fixed MSR 0x259 0x0000000000000000

 1925 14:51:11.059001  MTRR: Fixed MSR 0x268 0x0606060606060606

 1926 14:51:11.062626  MTRR: Fixed MSR 0x269 0x0606060606060606

 1927 14:51:11.069553  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1928 14:51:11.071903  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1929 14:51:11.075566  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1930 14:51:11.078737  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1931 14:51:11.085651  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1932 14:51:11.088479  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1933 14:51:11.091941  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 14:51:11.095416  call enable_fixed_mtrr()

 1935 14:51:11.099022  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 14:51:11.101975  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 14:51:11.108369  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 14:51:11.112377  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 14:51:11.115233  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 14:51:11.118297  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 14:51:11.125100  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 14:51:11.128257  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 14:51:11.131969  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 14:51:11.134811  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 14:51:11.138556  CPU physical address size: 39 bits

 1946 14:51:11.141531  call enable_fixed_mtrr()

 1947 14:51:11.144576  CBFS: Found @ offset 1c96c0 size 3f798

 1948 14:51:11.151943  CPU physical address size: 39 bits

 1949 14:51:11.154968  Checking segment from ROM address 0xffdd16f8

 1950 14:51:11.157981  Checking segment from ROM address 0xffdd1714

 1951 14:51:11.165137  Loading segment from ROM address 0xffdd16f8

 1952 14:51:11.165556    code (compression=0)

 1953 14:51:11.174559    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1954 14:51:11.181053  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1955 14:51:11.184229  it's not compressed!

 1956 14:51:11.277228  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1957 14:51:11.283926  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1958 14:51:11.286804  Loading segment from ROM address 0xffdd1714

 1959 14:51:11.290248    Entry Point 0x30000000

 1960 14:51:11.293488  Loaded segments

 1961 14:51:11.299166  Finalizing chipset.

 1962 14:51:11.302385  Finalizing SMM.

 1963 14:51:11.305749  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1964 14:51:11.308809  mp_park_aps done after 0 msecs.

 1965 14:51:11.315426  Jumping to boot code at 30000000(99b62000)

 1966 14:51:11.321938  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1967 14:51:11.322513  

 1968 14:51:11.323031  

 1969 14:51:11.323532  

 1970 14:51:11.325405  Starting depthcharge on Helios...

 1971 14:51:11.325887  

 1972 14:51:11.326902  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1973 14:51:11.327382  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1974 14:51:11.327800  Setting prompt string to ['hatch:']
 1975 14:51:11.328200  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1976 14:51:11.335275  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1977 14:51:11.335693  

 1978 14:51:11.341808  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1979 14:51:11.342238  

 1980 14:51:11.348743  board_setup: Info: eMMC controller not present; skipping

 1981 14:51:11.349168  

 1982 14:51:11.351699  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1983 14:51:11.352126  

 1984 14:51:11.358157  board_setup: Info: SDHCI controller not present; skipping

 1985 14:51:11.358577  

 1986 14:51:11.364884  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1987 14:51:11.365318  

 1988 14:51:11.365748  Wipe memory regions:

 1989 14:51:11.366073  

 1990 14:51:11.368600  	[0x00000000001000, 0x000000000a0000)

 1991 14:51:11.369012  

 1992 14:51:11.374670  	[0x00000000100000, 0x00000030000000)

 1993 14:51:11.438502  

 1994 14:51:11.441380  	[0x00000030657430, 0x00000099a2c000)

 1995 14:51:11.587926  

 1996 14:51:11.590971  	[0x00000100000000, 0x0000045e800000)

 1997 14:51:13.047909  

 1998 14:51:13.048440  R8152: Initializing

 1999 14:51:13.048785  

 2000 14:51:13.050855  Version 9 (ocp_data = 6010)

 2001 14:51:13.055198  

 2002 14:51:13.055690  R8152: Done initializing

 2003 14:51:13.056051  

 2004 14:51:13.058158  Adding net device

 2005 14:51:13.541439  

 2006 14:51:13.542168  R8152: Initializing

 2007 14:51:13.542541  

 2008 14:51:13.544263  Version 6 (ocp_data = 5c30)

 2009 14:51:13.544643  

 2010 14:51:13.547763  R8152: Done initializing

 2011 14:51:13.548266  

 2012 14:51:13.551194  net_add_device: Attemp to include the same device

 2013 14:51:13.554082  

 2014 14:51:13.561415  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2015 14:51:13.561918  

 2016 14:51:13.562249  

 2017 14:51:13.562553  

 2018 14:51:13.563268  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 14:51:13.664431  hatch: tftpboot 192.168.201.1 10185529/tftp-deploy-4yj7dj6t/kernel/bzImage 10185529/tftp-deploy-4yj7dj6t/kernel/cmdline 10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz

 2021 14:51:13.664998  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 14:51:13.665387  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2023 14:51:13.669871  tftpboot 192.168.201.1 10185529/tftp-deploy-4yj7dj6t/kernel/bzIploy-4yj7dj6t/kernel/cmdline 10185529/tftp-deploy-4yj7dj6t/ramdisk/ramdisk.cpio.gz

 2024 14:51:13.670462  

 2025 14:51:13.670808  Waiting for link

 2026 14:51:13.870855  

 2027 14:51:13.871347  done.

 2028 14:51:13.871682  

 2029 14:51:13.871995  MAC: 00:24:32:50:1a:59

 2030 14:51:13.872442  

 2031 14:51:13.874299  Sending DHCP discover... done.

 2032 14:51:13.874720  

 2033 14:51:13.877402  Waiting for reply... done.

 2034 14:51:13.877992  

 2035 14:51:13.880814  Sending DHCP request... done.

 2036 14:51:13.881231  

 2037 14:51:13.883770  Waiting for reply... done.

 2038 14:51:13.884187  

 2039 14:51:13.887210  My ip is 192.168.201.14

 2040 14:51:13.887626  

 2041 14:51:13.890596  The DHCP server ip is 192.168.201.1

 2042 14:51:13.891022  

 2043 14:51:13.894128  TFTP server IP predefined by user: 192.168.201.1

 2044 14:51:13.894547  

 2045 14:51:13.900086  Bootfile predefined by user: 10185529/tftp-deploy-4yj7dj6t/kernel/bzImage

 2046 14:51:13.900508  

 2047 14:51:13.903759  Sending tftp read request... done.

 2048 14:51:13.907069  

 2049 14:51:13.912952  Waiting for the transfer... 

 2050 14:51:13.913376  

 2051 14:51:14.450886  00000000 ################################################################

 2052 14:51:14.451039  

 2053 14:51:14.994584  00080000 ################################################################

 2054 14:51:14.994732  

 2055 14:51:15.525079  00100000 ################################################################

 2056 14:51:15.525227  

 2057 14:51:16.058437  00180000 ################################################################

 2058 14:51:16.058621  

 2059 14:51:16.593380  00200000 ################################################################

 2060 14:51:16.593567  

 2061 14:51:17.118833  00280000 ################################################################

 2062 14:51:17.118984  

 2063 14:51:17.640720  00300000 ################################################################

 2064 14:51:17.640873  

 2065 14:51:18.175142  00380000 ################################################################

 2066 14:51:18.175298  

 2067 14:51:18.712984  00400000 ################################################################

 2068 14:51:18.713138  

 2069 14:51:19.237158  00480000 ################################################################

 2070 14:51:19.237317  

 2071 14:51:19.765788  00500000 ################################################################

 2072 14:51:19.765935  

 2073 14:51:20.327882  00580000 ################################################################

 2074 14:51:20.328038  

 2075 14:51:20.927562  00600000 ################################################################

 2076 14:51:20.927726  

 2077 14:51:21.521345  00680000 ################################################################

 2078 14:51:21.521530  

 2079 14:51:22.153111  00700000 ################################################################

 2080 14:51:22.153703  

 2081 14:51:22.168376  00780000 ## done.

 2082 14:51:22.168867  

 2083 14:51:22.171894  The bootfile was 7876496 bytes long.

 2084 14:51:22.172335  

 2085 14:51:22.175330  Sending tftp read request... done.

 2086 14:51:22.175751  

 2087 14:51:22.178448  Waiting for the transfer... 

 2088 14:51:22.178872  

 2089 14:51:22.779765  00000000 ################################################################

 2090 14:51:22.779912  

 2091 14:51:23.374627  00080000 ################################################################

 2092 14:51:23.374773  

 2093 14:51:23.970238  00100000 ################################################################

 2094 14:51:23.970382  

 2095 14:51:24.535649  00180000 ################################################################

 2096 14:51:24.535797  

 2097 14:51:25.092021  00200000 ################################################################

 2098 14:51:25.092196  

 2099 14:51:25.661472  00280000 ################################################################

 2100 14:51:25.661631  

 2101 14:51:26.206946  00300000 ################################################################

 2102 14:51:26.207093  

 2103 14:51:26.760226  00380000 ################################################################

 2104 14:51:26.760373  

 2105 14:51:27.299447  00400000 ################################################################

 2106 14:51:27.299633  

 2107 14:51:27.834378  00480000 ################################################################

 2108 14:51:27.834566  

 2109 14:51:28.373973  00500000 ################################################################

 2110 14:51:28.374156  

 2111 14:51:28.906826  00580000 ################################################################

 2112 14:51:28.906980  

 2113 14:51:29.458498  00600000 ################################################################

 2114 14:51:29.458645  

 2115 14:51:30.015638  00680000 ################################################################

 2116 14:51:30.015784  

 2117 14:51:30.563359  00700000 ################################################################

 2118 14:51:30.563502  

 2119 14:51:31.121943  00780000 ################################################################

 2120 14:51:31.122089  

 2121 14:51:31.634633  00800000 ###################################################### done.

 2122 14:51:31.634791  

 2123 14:51:31.637810  Sending tftp read request... done.

 2124 14:51:31.637911  

 2125 14:51:31.641479  Waiting for the transfer... 

 2126 14:51:31.641670  

 2127 14:51:31.644375  00000000 # done.

 2128 14:51:31.644565  

 2129 14:51:31.651626  Command line loaded dynamically from TFTP file: 10185529/tftp-deploy-4yj7dj6t/kernel/cmdline

 2130 14:51:31.652160  

 2131 14:51:31.671043  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 14:51:31.671576  

 2133 14:51:31.674158  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 14:51:31.680442  

 2135 14:51:31.683851  Shutting down all USB controllers.

 2136 14:51:31.684382  

 2137 14:51:31.684721  Removing current net device

 2138 14:51:31.687430  

 2139 14:51:31.687993  Finalizing coreboot

 2140 14:51:31.688338  

 2141 14:51:31.693858  Exiting depthcharge with code 4 at timestamp: 27706853

 2142 14:51:31.694284  

 2143 14:51:31.694614  

 2144 14:51:31.694921  Starting kernel ...

 2145 14:51:31.695221  

 2146 14:51:31.695512  

 2147 14:51:31.696671  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2148 14:51:31.697160  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2149 14:51:31.697539  Setting prompt string to ['Linux version [0-9]']
 2150 14:51:31.697923  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2151 14:51:31.698271  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2153 14:55:53.698286  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2155 14:55:53.699389  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2157 14:55:53.700232  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 14:55:53.701733  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 14:55:53.702942  Cleaning after the job
 2163 14:55:53.703187  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/ramdisk
 2164 14:55:53.704405  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/kernel
 2165 14:55:53.705425  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185529/tftp-deploy-4yj7dj6t/modules
 2166 14:55:53.705826  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 14:55:53.706003  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2168 14:55:53.786776  >> Command sent successfully.

 2169 14:55:53.793577  Returned 0 in 0 seconds
 2170 14:55:53.894800  end: 5.1 power-off (duration 00:00:00) [common]
 2172 14:55:53.896348  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2173 14:55:53.897639  Listened to connection for namespace 'common' for up to 1s
 2175 14:55:53.899032  Listened to connection for namespace 'common' for up to 1s
 2176 14:55:54.897913  Finalising connection for namespace 'common'
 2177 14:55:54.898594  Disconnecting from shell: Finalise
 2178 14:55:54.899040  
 2179 14:55:55.000210  end: 5.2 read-feedback (duration 00:00:01) [common]
 2180 14:55:55.000840  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185529
 2181 14:55:55.019130  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185529
 2182 14:55:55.019291  JobError: Your job cannot terminate cleanly.