Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:26.813879 lava-dispatcher, installed at version: 2023.03
2 14:50:26.814080 start: 0 validate
3 14:50:26.814210 Start time: 2023-05-03 14:50:26.814201+00:00 (UTC)
4 14:50:26.814328 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:26.814452 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230421.0%2Fx86%2Frootfs.cpio.gz exists
6 14:50:27.109050 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:27.109252 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:27.407287 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:27.407499 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:50:31.154342 validate duration: 4.34
12 14:50:31.154619 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:50:31.154716 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:50:31.154800 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:50:31.154920 Not decompressing ramdisk as can be used compressed.
16 14:50:31.155002 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230421.0/x86/rootfs.cpio.gz
17 14:50:31.155067 saving as /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/ramdisk/rootfs.cpio.gz
18 14:50:31.155128 total size: 8429989 (8MB)
19 14:50:31.738012 progress 0% (0MB)
20 14:50:31.751916 progress 5% (0MB)
21 14:50:31.764226 progress 10% (0MB)
22 14:50:31.771709 progress 15% (1MB)
23 14:50:31.777155 progress 20% (1MB)
24 14:50:31.781604 progress 25% (2MB)
25 14:50:31.785495 progress 30% (2MB)
26 14:50:31.789041 progress 35% (2MB)
27 14:50:31.792020 progress 40% (3MB)
28 14:50:31.795070 progress 45% (3MB)
29 14:50:31.797910 progress 50% (4MB)
30 14:50:31.800490 progress 55% (4MB)
31 14:50:31.802986 progress 60% (4MB)
32 14:50:31.805313 progress 65% (5MB)
33 14:50:31.807621 progress 70% (5MB)
34 14:50:31.809801 progress 75% (6MB)
35 14:50:31.812027 progress 80% (6MB)
36 14:50:31.814274 progress 85% (6MB)
37 14:50:31.816513 progress 90% (7MB)
38 14:50:31.818786 progress 95% (7MB)
39 14:50:31.820975 progress 100% (8MB)
40 14:50:31.821108 8MB downloaded in 0.67s (12.07MB/s)
41 14:50:31.821249 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:50:31.821486 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:50:31.821573 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:50:31.821654 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:50:31.821779 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:50:31.821847 saving as /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/kernel/bzImage
48 14:50:31.821906 total size: 7876496 (7MB)
49 14:50:31.821964 No compression specified
50 14:50:31.823159 progress 0% (0MB)
51 14:50:31.825463 progress 5% (0MB)
52 14:50:31.827530 progress 10% (0MB)
53 14:50:31.829555 progress 15% (1MB)
54 14:50:31.831647 progress 20% (1MB)
55 14:50:31.833677 progress 25% (1MB)
56 14:50:31.835729 progress 30% (2MB)
57 14:50:31.837814 progress 35% (2MB)
58 14:50:31.839937 progress 40% (3MB)
59 14:50:31.842055 progress 45% (3MB)
60 14:50:31.844210 progress 50% (3MB)
61 14:50:31.846213 progress 55% (4MB)
62 14:50:31.848240 progress 60% (4MB)
63 14:50:31.850207 progress 65% (4MB)
64 14:50:31.852206 progress 70% (5MB)
65 14:50:31.854166 progress 75% (5MB)
66 14:50:31.856132 progress 80% (6MB)
67 14:50:31.858099 progress 85% (6MB)
68 14:50:31.860053 progress 90% (6MB)
69 14:50:31.862009 progress 95% (7MB)
70 14:50:31.863980 progress 100% (7MB)
71 14:50:31.864124 7MB downloaded in 0.04s (177.94MB/s)
72 14:50:31.864258 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:50:31.864476 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:50:31.864565 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:50:31.864649 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:50:31.864777 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:50:31.864844 saving as /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/modules/modules.tar
79 14:50:31.864903 total size: 251268 (0MB)
80 14:50:31.864961 Using unxz to decompress xz
81 14:50:31.868549 progress 13% (0MB)
82 14:50:31.868922 progress 26% (0MB)
83 14:50:31.869151 progress 39% (0MB)
84 14:50:31.870473 progress 52% (0MB)
85 14:50:31.872355 progress 65% (0MB)
86 14:50:31.874199 progress 78% (0MB)
87 14:50:31.876024 progress 91% (0MB)
88 14:50:31.877763 progress 100% (0MB)
89 14:50:31.883211 0MB downloaded in 0.02s (13.11MB/s)
90 14:50:31.883461 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:50:31.883717 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:50:31.883814 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 14:50:31.883912 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 14:50:31.883992 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:50:31.884074 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 14:50:31.884271 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x
98 14:50:31.884391 makedir: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin
99 14:50:31.884489 makedir: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/tests
100 14:50:31.884581 makedir: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/results
101 14:50:31.884688 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-add-keys
102 14:50:31.884824 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-add-sources
103 14:50:31.884948 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-background-process-start
104 14:50:31.885070 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-background-process-stop
105 14:50:31.885189 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-common-functions
106 14:50:31.885308 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-echo-ipv4
107 14:50:31.885427 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-install-packages
108 14:50:31.885543 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-installed-packages
109 14:50:31.885661 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-os-build
110 14:50:31.885778 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-probe-channel
111 14:50:31.885894 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-probe-ip
112 14:50:31.886010 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-target-ip
113 14:50:31.886128 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-target-mac
114 14:50:31.886245 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-target-storage
115 14:50:31.886365 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-case
116 14:50:31.886482 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-event
117 14:50:31.886598 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-feedback
118 14:50:31.886714 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-raise
119 14:50:31.886834 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-reference
120 14:50:31.886952 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-runner
121 14:50:31.887069 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-set
122 14:50:31.887223 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-test-shell
123 14:50:31.887362 Updating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-install-packages (oe)
124 14:50:31.887505 Updating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/bin/lava-installed-packages (oe)
125 14:50:31.887619 Creating /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/environment
126 14:50:31.887720 LAVA metadata
127 14:50:31.887793 - LAVA_JOB_ID=10185542
128 14:50:31.887854 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:50:31.887952 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 14:50:31.888019 skipped lava-vland-overlay
131 14:50:31.888093 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:50:31.888171 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 14:50:31.888231 skipped lava-multinode-overlay
134 14:50:31.888301 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:50:31.888377 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 14:50:31.888448 Loading test definitions
137 14:50:31.888537 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 14:50:31.888613 Using /lava-10185542 at stage 0
139 14:50:31.888897 uuid=10185542_1.4.2.3.1 testdef=None
140 14:50:31.888982 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:50:31.889065 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 14:50:31.889572 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:50:31.889786 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 14:50:31.890398 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:50:31.890622 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 14:50:31.891261 runner path: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/0/tests/0_dmesg test_uuid 10185542_1.4.2.3.1
149 14:50:31.891411 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:50:31.891632 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 14:50:31.891703 Using /lava-10185542 at stage 1
153 14:50:31.891988 uuid=10185542_1.4.2.3.5 testdef=None
154 14:50:31.892075 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:50:31.892157 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 14:50:31.892641 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:50:31.892910 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 14:50:31.893527 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:50:31.893749 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 14:50:31.894345 runner path: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/1/tests/1_bootrr test_uuid 10185542_1.4.2.3.5
163 14:50:31.894489 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:50:31.894691 Creating lava-test-runner.conf files
166 14:50:31.894753 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/0 for stage 0
167 14:50:31.894837 - 0_dmesg
168 14:50:31.894914 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185542/lava-overlay-y3ghdt2x/lava-10185542/1 for stage 1
169 14:50:31.895001 - 1_bootrr
170 14:50:31.895092 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:50:31.895180 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 14:50:31.903554 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:50:31.903660 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 14:50:31.903748 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:50:31.903830 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:50:31.903911 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 14:50:32.147591 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:50:32.147967 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 14:50:32.148092 extracting modules file /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185542/extract-overlay-ramdisk-5l90wkyo/ramdisk
180 14:50:32.160892 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:50:32.161031 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 14:50:32.161126 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185542/compress-overlay-2wtcfyl2/overlay-1.4.2.4.tar.gz to ramdisk
183 14:50:32.161202 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185542/compress-overlay-2wtcfyl2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185542/extract-overlay-ramdisk-5l90wkyo/ramdisk
184 14:50:32.169092 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:50:32.169208 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 14:50:32.169302 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:50:32.169394 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 14:50:32.169473 Building ramdisk /var/lib/lava/dispatcher/tmp/10185542/extract-overlay-ramdisk-5l90wkyo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185542/extract-overlay-ramdisk-5l90wkyo/ramdisk
189 14:50:32.303333 >> 49791 blocks
190 14:50:33.136721 rename /var/lib/lava/dispatcher/tmp/10185542/extract-overlay-ramdisk-5l90wkyo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
191 14:50:33.137150 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:50:33.137274 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 14:50:33.137375 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 14:50:33.137475 No mkimage arch provided, not using FIT.
195 14:50:33.137566 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:50:33.137654 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:50:33.137764 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:50:33.137858 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 14:50:33.137974 No LXC device requested
200 14:50:33.138085 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:50:33.138186 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 14:50:33.138272 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:50:33.138345 Checking files for TFTP limit of 4294967296 bytes.
204 14:50:33.138760 end: 1 tftp-deploy (duration 00:00:02) [common]
205 14:50:33.138862 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:50:33.138962 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:50:33.139083 substitutions:
208 14:50:33.139152 - {DTB}: None
209 14:50:33.139265 - {INITRD}: 10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
210 14:50:33.139326 - {KERNEL}: 10185542/tftp-deploy-5mtewu3w/kernel/bzImage
211 14:50:33.139385 - {LAVA_MAC}: None
212 14:50:33.139442 - {PRESEED_CONFIG}: None
213 14:50:33.139506 - {PRESEED_LOCAL}: None
214 14:50:33.139563 - {RAMDISK}: 10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
215 14:50:33.139618 - {ROOT_PART}: None
216 14:50:33.139672 - {ROOT}: None
217 14:50:33.139727 - {SERVER_IP}: 192.168.201.1
218 14:50:33.139781 - {TEE}: None
219 14:50:33.139835 Parsed boot commands:
220 14:50:33.139889 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:50:33.140091 Parsed boot commands: tftpboot 192.168.201.1 10185542/tftp-deploy-5mtewu3w/kernel/bzImage 10185542/tftp-deploy-5mtewu3w/kernel/cmdline 10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
222 14:50:33.140212 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:50:33.140309 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:50:33.140405 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:50:33.140494 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:50:33.140563 Not connected, no need to disconnect.
227 14:50:33.140638 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:50:33.140716 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:50:33.140785 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
230 14:50:33.144509 Setting prompt string to ['lava-test: # ']
231 14:50:33.144976 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:50:33.145137 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:50:33.145252 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:50:33.145343 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:50:33.145539 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
236 14:50:38.278213 >> Command sent successfully.
237 14:50:38.280715 Returned 0 in 5 seconds
238 14:50:38.381089 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:50:38.381430 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:50:38.381533 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:50:38.381623 Setting prompt string to 'Starting depthcharge on Voema...'
243 14:50:38.381692 Changing prompt to 'Starting depthcharge on Voema...'
244 14:50:38.381767 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 14:50:38.382030 [Enter `^Ec?' for help]
246 14:50:39.983360 xpectedFail: 1, Skip: 1251, Dura
247 14:50:39.983529
248 14:50:39.993490 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 14:50:39.996858 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 14:50:40.003223 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 14:50:40.007751 CPU: AES supported, TXT NOT supported, VT supported
252 14:50:40.013524 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 14:50:40.020157 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 14:50:40.023430 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 14:50:40.026702 VBOOT: Loading verstage.
256 14:50:40.029766 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 14:50:40.036424 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 14:50:40.039883 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 14:50:40.050274 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 14:50:40.057105 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 14:50:40.057194
262 14:50:40.057261
263 14:50:40.070430 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 14:50:40.084170 Probing TPM: . done!
265 14:50:40.087690 TPM ready after 0 ms
266 14:50:40.090918 Connected to device vid:did:rid of 1ae0:0028:00
267 14:50:40.102359 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
268 14:50:40.108718 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 14:50:40.112091 Initialized TPM device CR50 revision 0
270 14:50:40.163605 tlcl_send_startup: Startup return code is 0
271 14:50:40.163746 TPM: setup succeeded
272 14:50:40.178315 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 14:50:40.191953 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 14:50:40.205138 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 14:50:40.215129 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 14:50:40.218431 Chrome EC: UHEPI supported
277 14:50:40.221753 Phase 1
278 14:50:40.225363 FMAP: area GBB found @ 1805000 (458752 bytes)
279 14:50:40.235109 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 14:50:40.241889 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 14:50:40.248826 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 14:50:40.255067 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 14:50:40.258447 Recovery requested (1009000e)
284 14:50:40.262013 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 14:50:40.274039 tlcl_extend: response is 0
286 14:50:40.280171 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 14:50:40.289904 tlcl_extend: response is 0
288 14:50:40.296466 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 14:50:40.303104 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 14:50:40.309993 BS: verstage times (exec / console): total (unknown) / 142 ms
291 14:50:40.310097
292 14:50:40.310169
293 14:50:40.322998 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 14:50:40.329426 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 14:50:40.333143 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 14:50:40.336500 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 14:50:40.343291 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 14:50:40.346275 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 14:50:40.349762 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 14:50:40.352948 TCO_STS: 0000 0000
301 14:50:40.356297 GEN_PMCON: d0015038 00002200
302 14:50:40.359571 GBLRST_CAUSE: 00000000 00000000
303 14:50:40.362675 HPR_CAUSE0: 00000000
304 14:50:40.362762 prev_sleep_state 5
305 14:50:40.366013 Boot Count incremented to 18876
306 14:50:40.372724 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 14:50:40.379210 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 14:50:40.389674 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 14:50:40.395805 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 14:50:40.399167 Chrome EC: UHEPI supported
311 14:50:40.405854 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 14:50:40.416695 Probing TPM: done!
313 14:50:40.423437 Connected to device vid:did:rid of 1ae0:0028:00
314 14:50:40.434894 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
315 14:50:40.441509 Initialized TPM device CR50 revision 0
316 14:50:40.452037 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 14:50:40.458694 MRC: Hash idx 0x100b comparison successful.
318 14:50:40.461894 MRC cache found, size faa8
319 14:50:40.461985 bootmode is set to: 2
320 14:50:40.465533 SPD index = 0
321 14:50:40.472294 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 14:50:40.475388 SPD: module type is LPDDR4X
323 14:50:40.478676 SPD: module part number is MT53E512M64D4NW-046
324 14:50:40.485195 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 14:50:40.488517 SPD: device width 16 bits, bus width 16 bits
326 14:50:40.495113 SPD: module size is 1024 MB (per channel)
327 14:50:40.927559 CBMEM:
328 14:50:40.930989 IMD: root @ 0x76fff000 254 entries.
329 14:50:40.934237 IMD: root @ 0x76ffec00 62 entries.
330 14:50:40.937365 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 14:50:40.944041 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 14:50:40.947386 External stage cache:
333 14:50:40.950688 IMD: root @ 0x7b3ff000 254 entries.
334 14:50:40.954273 IMD: root @ 0x7b3fec00 62 entries.
335 14:50:40.969660 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 14:50:40.976144 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 14:50:40.982935 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 14:50:40.997047 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 14:50:41.003086 cse_lite: Skip switching to RW in the recovery path
340 14:50:41.003256 8 DIMMs found
341 14:50:41.003334 SMM Memory Map
342 14:50:41.009829 SMRAM : 0x7b000000 0x800000
343 14:50:41.009925 Subregion 0: 0x7b000000 0x200000
344 14:50:41.014475 Subregion 1: 0x7b200000 0x200000
345 14:50:41.017404 Subregion 2: 0x7b400000 0x400000
346 14:50:41.020442 top_of_ram = 0x77000000
347 14:50:41.027093 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 14:50:41.030393 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 14:50:41.036908 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 14:50:41.040389 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 14:50:41.050202 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 14:50:41.056909 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 14:50:41.066860 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 14:50:41.070354 Processing 211 relocs. Offset value of 0x74c0b000
355 14:50:41.079795 BS: romstage times (exec / console): total (unknown) / 277 ms
356 14:50:41.085308
357 14:50:41.085418
358 14:50:41.095417 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 14:50:41.099046 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 14:50:41.108420 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 14:50:41.115839 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 14:50:41.121861 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 14:50:41.128984 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 14:50:41.175867 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 14:50:41.181972 Processing 5008 relocs. Offset value of 0x75d98000
366 14:50:41.185268 BS: postcar times (exec / console): total (unknown) / 59 ms
367 14:50:41.188975
368 14:50:41.189083
369 14:50:41.198554 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 14:50:41.198691 Normal boot
371 14:50:41.202849 FW_CONFIG value is 0x804c02
372 14:50:41.206146 PCI: 00:07.0 disabled by fw_config
373 14:50:41.209460 PCI: 00:07.1 disabled by fw_config
374 14:50:41.212737 PCI: 00:0d.2 disabled by fw_config
375 14:50:41.219039 PCI: 00:1c.7 disabled by fw_config
376 14:50:41.222620 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 14:50:41.229186 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 14:50:41.232707 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 14:50:41.235971 GENERIC: 0.0 disabled by fw_config
380 14:50:41.242385 GENERIC: 1.0 disabled by fw_config
381 14:50:41.246098 fw_config match found: DB_USB=USB3_ACTIVE
382 14:50:41.248710 fw_config match found: DB_USB=USB3_ACTIVE
383 14:50:41.252232 fw_config match found: DB_USB=USB3_ACTIVE
384 14:50:41.259036 fw_config match found: DB_USB=USB3_ACTIVE
385 14:50:41.262384 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 14:50:41.268678 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 14:50:41.278568 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 14:50:41.285293 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 14:50:41.289192 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 14:50:41.295455 microcode: Update skipped, already up-to-date
391 14:50:41.302100 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 14:50:41.329965 Detected 4 core, 8 thread CPU.
393 14:50:41.333187 Setting up SMI for CPU
394 14:50:41.336294 IED base = 0x7b400000
395 14:50:41.336378 IED size = 0x00400000
396 14:50:41.340315 Will perform SMM setup.
397 14:50:41.346678 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 14:50:41.353113 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 14:50:41.359503 Processing 16 relocs. Offset value of 0x00030000
400 14:50:41.362996 Attempting to start 7 APs
401 14:50:41.366192 Waiting for 10ms after sending INIT.
402 14:50:41.381629 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 14:50:41.381730 done.
404 14:50:41.384890 AP: slot 7 apic_id 4.
405 14:50:41.388004 AP: slot 3 apic_id 5.
406 14:50:41.388090 AP: slot 2 apic_id 3.
407 14:50:41.391634 AP: slot 6 apic_id 2.
408 14:50:41.395103 Waiting for 2nd SIPI to complete...done.
409 14:50:41.398447 AP: slot 4 apic_id 7.
410 14:50:41.401604 AP: slot 5 apic_id 6.
411 14:50:41.408087 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 14:50:41.414974 Processing 13 relocs. Offset value of 0x00038000
413 14:50:41.418284 Unable to locate Global NVS
414 14:50:41.424679 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 14:50:41.428395 Installing permanent SMM handler to 0x7b000000
416 14:50:41.437846 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 14:50:41.441661 Processing 794 relocs. Offset value of 0x7b010000
418 14:50:41.451725 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 14:50:41.454745 Processing 13 relocs. Offset value of 0x7b008000
420 14:50:41.461302 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 14:50:41.468015 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 14:50:41.471413 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 14:50:41.477998 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 14:50:41.484601 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 14:50:41.491277 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 14:50:41.497854 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 14:50:41.497945 Unable to locate Global NVS
428 14:50:41.507809 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 14:50:41.510926 Clearing SMI status registers
430 14:50:41.511013 SMI_STS: PM1
431 14:50:41.514294 PM1_STS: PWRBTN
432 14:50:41.520859 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 14:50:41.523935 In relocation handler: CPU 0
434 14:50:41.527540 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 14:50:41.534008 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 14:50:41.534094 Relocation complete.
437 14:50:41.543936 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 14:50:41.547984 In relocation handler: CPU 1
439 14:50:41.550730 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 14:50:41.550816 Relocation complete.
441 14:50:41.560783 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 14:50:41.560869 In relocation handler: CPU 3
443 14:50:41.567749 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 14:50:41.567834 Relocation complete.
445 14:50:41.577284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 14:50:41.577368 In relocation handler: CPU 7
447 14:50:41.583898 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 14:50:41.587110 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 14:50:41.590560 Relocation complete.
450 14:50:41.597185 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 14:50:41.600563 In relocation handler: CPU 4
452 14:50:41.603802 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 14:50:41.607085 Relocation complete.
454 14:50:41.613725 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 14:50:41.617246 In relocation handler: CPU 5
456 14:50:41.620879 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 14:50:41.626931 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 14:50:41.627016 Relocation complete.
459 14:50:41.633527 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 14:50:41.636901 In relocation handler: CPU 2
461 14:50:41.643772 New SMBASE=0x7afff800 IEDBASE=0x7b400000
462 14:50:41.643857 Relocation complete.
463 14:50:41.650242 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
464 14:50:41.653578 In relocation handler: CPU 6
465 14:50:41.656765 New SMBASE=0x7affe800 IEDBASE=0x7b400000
466 14:50:41.663628 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 14:50:41.666637 Relocation complete.
468 14:50:41.666720 Initializing CPU #0
469 14:50:41.670080 CPU: vendor Intel device 806c1
470 14:50:41.673483 CPU: family 06, model 8c, stepping 01
471 14:50:41.677358 Clearing out pending MCEs
472 14:50:41.681002 Setting up local APIC...
473 14:50:41.681087 apic_id: 0x00 done.
474 14:50:41.684110 Turbo is available but hidden
475 14:50:41.687503 Turbo is available and visible
476 14:50:41.694326 microcode: Update skipped, already up-to-date
477 14:50:41.694413 CPU #0 initialized
478 14:50:41.697821 Initializing CPU #3
479 14:50:41.701084 Initializing CPU #7
480 14:50:41.701171 CPU: vendor Intel device 806c1
481 14:50:41.707446 CPU: family 06, model 8c, stepping 01
482 14:50:41.710782 CPU: vendor Intel device 806c1
483 14:50:41.714382 CPU: family 06, model 8c, stepping 01
484 14:50:41.717472 Clearing out pending MCEs
485 14:50:41.717557 Clearing out pending MCEs
486 14:50:41.720752 Setting up local APIC...
487 14:50:41.724064 Initializing CPU #6
488 14:50:41.724149 Initializing CPU #2
489 14:50:41.727359 CPU: vendor Intel device 806c1
490 14:50:41.730606 CPU: family 06, model 8c, stepping 01
491 14:50:41.734061 CPU: vendor Intel device 806c1
492 14:50:41.738024 CPU: family 06, model 8c, stepping 01
493 14:50:41.741056 Clearing out pending MCEs
494 14:50:41.744142 Clearing out pending MCEs
495 14:50:41.747409 Setting up local APIC...
496 14:50:41.747493 apic_id: 0x05 done.
497 14:50:41.750591 Setting up local APIC...
498 14:50:41.754402 Initializing CPU #1
499 14:50:41.754486 apic_id: 0x04 done.
500 14:50:41.761228 microcode: Update skipped, already up-to-date
501 14:50:41.763909 microcode: Update skipped, already up-to-date
502 14:50:41.767434 CPU #3 initialized
503 14:50:41.767518 CPU #7 initialized
504 14:50:41.770722 CPU: vendor Intel device 806c1
505 14:50:41.777353 CPU: family 06, model 8c, stepping 01
506 14:50:41.777438 apic_id: 0x02 done.
507 14:50:41.780622 Setting up local APIC...
508 14:50:41.783814 Clearing out pending MCEs
509 14:50:41.783898 apic_id: 0x03 done.
510 14:50:41.791009 microcode: Update skipped, already up-to-date
511 14:50:41.794094 microcode: Update skipped, already up-to-date
512 14:50:41.797278 CPU #6 initialized
513 14:50:41.797361 CPU #2 initialized
514 14:50:41.801215 Setting up local APIC...
515 14:50:41.804242 Initializing CPU #4
516 14:50:41.804327 Initializing CPU #5
517 14:50:41.807412 CPU: vendor Intel device 806c1
518 14:50:41.810757 CPU: family 06, model 8c, stepping 01
519 14:50:41.814306 CPU: vendor Intel device 806c1
520 14:50:41.817310 CPU: family 06, model 8c, stepping 01
521 14:50:41.820910 Clearing out pending MCEs
522 14:50:41.824131 Clearing out pending MCEs
523 14:50:41.827365 Setting up local APIC...
524 14:50:41.827450 apic_id: 0x01 done.
525 14:50:41.830550 Setting up local APIC...
526 14:50:41.837233 microcode: Update skipped, already up-to-date
527 14:50:41.837318 apic_id: 0x06 done.
528 14:50:41.840751 apic_id: 0x07 done.
529 14:50:41.844100 microcode: Update skipped, already up-to-date
530 14:50:41.850545 microcode: Update skipped, already up-to-date
531 14:50:41.850629 CPU #5 initialized
532 14:50:41.853921 CPU #4 initialized
533 14:50:41.854004 CPU #1 initialized
534 14:50:41.860425 bsp_do_flight_plan done after 459 msecs.
535 14:50:41.863920 CPU: frequency set to 4000 MHz
536 14:50:41.864005 Enabling SMIs.
537 14:50:41.870594 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
538 14:50:41.886307 SATAXPCIE1 indicates PCIe NVMe is present
539 14:50:41.889622 Probing TPM: done!
540 14:50:41.893258 Connected to device vid:did:rid of 1ae0:0028:00
541 14:50:41.904146 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
542 14:50:41.906794 Initialized TPM device CR50 revision 0
543 14:50:41.910292 Enabling S0i3.4
544 14:50:41.916871 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 14:50:41.920175 Found a VBT of 8704 bytes after decompression
546 14:50:41.926949 cse_lite: CSE RO boot. HybridStorageMode disabled
547 14:50:41.933557 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 14:50:42.008991 FSPS returned 0
549 14:50:42.012236 Executing Phase 1 of FspMultiPhaseSiInit
550 14:50:42.022276 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 14:50:42.025799 port C0 DISC req: usage 1 usb3 1 usb2 5
552 14:50:42.028755 Raw Buffer output 0 00000511
553 14:50:42.032204 Raw Buffer output 1 00000000
554 14:50:42.036192 pmc_send_ipc_cmd succeeded
555 14:50:42.042988 port C1 DISC req: usage 1 usb3 2 usb2 3
556 14:50:42.043076 Raw Buffer output 0 00000321
557 14:50:42.045711 Raw Buffer output 1 00000000
558 14:50:42.049909 pmc_send_ipc_cmd succeeded
559 14:50:42.055536 Detected 4 core, 8 thread CPU.
560 14:50:42.058530 Detected 4 core, 8 thread CPU.
561 14:50:42.292736 Display FSP Version Info HOB
562 14:50:42.296446 Reference Code - CPU = a.0.4c.31
563 14:50:42.299322 uCode Version = 0.0.0.86
564 14:50:42.302739 TXT ACM version = ff.ff.ff.ffff
565 14:50:42.306674 Reference Code - ME = a.0.4c.31
566 14:50:42.309860 MEBx version = 0.0.0.0
567 14:50:42.312791 ME Firmware Version = Consumer SKU
568 14:50:42.316222 Reference Code - PCH = a.0.4c.31
569 14:50:42.319569 PCH-CRID Status = Disabled
570 14:50:42.323105 PCH-CRID Original Value = ff.ff.ff.ffff
571 14:50:42.326225 PCH-CRID New Value = ff.ff.ff.ffff
572 14:50:42.329635 OPROM - RST - RAID = ff.ff.ff.ffff
573 14:50:42.333095 PCH Hsio Version = 4.0.0.0
574 14:50:42.336618 Reference Code - SA - System Agent = a.0.4c.31
575 14:50:42.339373 Reference Code - MRC = 2.0.0.1
576 14:50:42.342714 SA - PCIe Version = a.0.4c.31
577 14:50:42.345946 SA-CRID Status = Disabled
578 14:50:42.349669 SA-CRID Original Value = 0.0.0.1
579 14:50:42.352777 SA-CRID New Value = 0.0.0.1
580 14:50:42.356145 OPROM - VBIOS = ff.ff.ff.ffff
581 14:50:42.359661 IO Manageability Engine FW Version = 11.1.4.0
582 14:50:42.362877 PHY Build Version = 0.0.0.e0
583 14:50:42.366275 Thunderbolt(TM) FW Version = 0.0.0.0
584 14:50:42.372813 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 14:50:42.376139 ITSS IRQ Polarities Before:
586 14:50:42.376225 IPC0: 0xffffffff
587 14:50:42.379329 IPC1: 0xffffffff
588 14:50:42.379414 IPC2: 0xffffffff
589 14:50:42.382843 IPC3: 0xffffffff
590 14:50:42.386154 ITSS IRQ Polarities After:
591 14:50:42.386241 IPC0: 0xffffffff
592 14:50:42.389807 IPC1: 0xffffffff
593 14:50:42.389891 IPC2: 0xffffffff
594 14:50:42.392860 IPC3: 0xffffffff
595 14:50:42.396105 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 14:50:42.409278 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 14:50:42.419397 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 14:50:42.432590 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 14:50:42.439049 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 14:50:42.439142 Enumerating buses...
601 14:50:42.445825 Show all devs... Before device enumeration.
602 14:50:42.445911 Root Device: enabled 1
603 14:50:42.449160 DOMAIN: 0000: enabled 1
604 14:50:42.452424 CPU_CLUSTER: 0: enabled 1
605 14:50:42.455810 PCI: 00:00.0: enabled 1
606 14:50:42.455895 PCI: 00:02.0: enabled 1
607 14:50:42.459162 PCI: 00:04.0: enabled 1
608 14:50:42.462439 PCI: 00:05.0: enabled 1
609 14:50:42.466157 PCI: 00:06.0: enabled 0
610 14:50:42.466241 PCI: 00:07.0: enabled 0
611 14:50:42.469110 PCI: 00:07.1: enabled 0
612 14:50:42.472527 PCI: 00:07.2: enabled 0
613 14:50:42.476136 PCI: 00:07.3: enabled 0
614 14:50:42.476219 PCI: 00:08.0: enabled 1
615 14:50:42.479387 PCI: 00:09.0: enabled 0
616 14:50:42.482559 PCI: 00:0a.0: enabled 0
617 14:50:42.486074 PCI: 00:0d.0: enabled 1
618 14:50:42.486157 PCI: 00:0d.1: enabled 0
619 14:50:42.489176 PCI: 00:0d.2: enabled 0
620 14:50:42.492493 PCI: 00:0d.3: enabled 0
621 14:50:42.492576 PCI: 00:0e.0: enabled 0
622 14:50:42.495980 PCI: 00:10.2: enabled 1
623 14:50:42.498990 PCI: 00:10.6: enabled 0
624 14:50:42.502603 PCI: 00:10.7: enabled 0
625 14:50:42.502686 PCI: 00:12.0: enabled 0
626 14:50:42.505735 PCI: 00:12.6: enabled 0
627 14:50:42.508996 PCI: 00:13.0: enabled 0
628 14:50:42.512459 PCI: 00:14.0: enabled 1
629 14:50:42.512546 PCI: 00:14.1: enabled 0
630 14:50:42.516155 PCI: 00:14.2: enabled 1
631 14:50:42.519361 PCI: 00:14.3: enabled 1
632 14:50:42.522273 PCI: 00:15.0: enabled 1
633 14:50:42.522358 PCI: 00:15.1: enabled 1
634 14:50:42.525863 PCI: 00:15.2: enabled 1
635 14:50:42.529190 PCI: 00:15.3: enabled 1
636 14:50:42.529273 PCI: 00:16.0: enabled 1
637 14:50:42.532199 PCI: 00:16.1: enabled 0
638 14:50:42.535647 PCI: 00:16.2: enabled 0
639 14:50:42.538881 PCI: 00:16.3: enabled 0
640 14:50:42.538963 PCI: 00:16.4: enabled 0
641 14:50:42.542686 PCI: 00:16.5: enabled 0
642 14:50:42.545632 PCI: 00:17.0: enabled 1
643 14:50:42.548934 PCI: 00:19.0: enabled 0
644 14:50:42.549030 PCI: 00:19.1: enabled 1
645 14:50:42.552287 PCI: 00:19.2: enabled 0
646 14:50:42.555491 PCI: 00:1c.0: enabled 1
647 14:50:42.558955 PCI: 00:1c.1: enabled 0
648 14:50:42.559039 PCI: 00:1c.2: enabled 0
649 14:50:42.562370 PCI: 00:1c.3: enabled 0
650 14:50:42.565719 PCI: 00:1c.4: enabled 0
651 14:50:42.569082 PCI: 00:1c.5: enabled 0
652 14:50:42.569166 PCI: 00:1c.6: enabled 1
653 14:50:42.572212 PCI: 00:1c.7: enabled 0
654 14:50:42.575303 PCI: 00:1d.0: enabled 1
655 14:50:42.575389 PCI: 00:1d.1: enabled 0
656 14:50:42.578791 PCI: 00:1d.2: enabled 1
657 14:50:42.582180 PCI: 00:1d.3: enabled 0
658 14:50:42.585463 PCI: 00:1e.0: enabled 1
659 14:50:42.585546 PCI: 00:1e.1: enabled 0
660 14:50:42.589264 PCI: 00:1e.2: enabled 1
661 14:50:42.592248 PCI: 00:1e.3: enabled 1
662 14:50:42.595446 PCI: 00:1f.0: enabled 1
663 14:50:42.595530 PCI: 00:1f.1: enabled 0
664 14:50:42.598771 PCI: 00:1f.2: enabled 1
665 14:50:42.602207 PCI: 00:1f.3: enabled 1
666 14:50:42.605414 PCI: 00:1f.4: enabled 0
667 14:50:42.605498 PCI: 00:1f.5: enabled 1
668 14:50:42.608513 PCI: 00:1f.6: enabled 0
669 14:50:42.612023 PCI: 00:1f.7: enabled 0
670 14:50:42.612107 APIC: 00: enabled 1
671 14:50:42.615510 GENERIC: 0.0: enabled 1
672 14:50:42.618854 GENERIC: 0.0: enabled 1
673 14:50:42.622256 GENERIC: 1.0: enabled 1
674 14:50:42.622342 GENERIC: 0.0: enabled 1
675 14:50:42.625255 GENERIC: 1.0: enabled 1
676 14:50:42.628838 USB0 port 0: enabled 1
677 14:50:42.628921 GENERIC: 0.0: enabled 1
678 14:50:42.631968 USB0 port 0: enabled 1
679 14:50:42.635319 GENERIC: 0.0: enabled 1
680 14:50:42.638592 I2C: 00:1a: enabled 1
681 14:50:42.638675 I2C: 00:31: enabled 1
682 14:50:42.642057 I2C: 00:32: enabled 1
683 14:50:42.645360 I2C: 00:10: enabled 1
684 14:50:42.645444 I2C: 00:15: enabled 1
685 14:50:42.648661 GENERIC: 0.0: enabled 0
686 14:50:42.652248 GENERIC: 1.0: enabled 0
687 14:50:42.655118 GENERIC: 0.0: enabled 1
688 14:50:42.655240 SPI: 00: enabled 1
689 14:50:42.658454 SPI: 00: enabled 1
690 14:50:42.658537 PNP: 0c09.0: enabled 1
691 14:50:42.661799 GENERIC: 0.0: enabled 1
692 14:50:42.665533 USB3 port 0: enabled 1
693 14:50:42.668396 USB3 port 1: enabled 1
694 14:50:42.668480 USB3 port 2: enabled 0
695 14:50:42.672208 USB3 port 3: enabled 0
696 14:50:42.675353 USB2 port 0: enabled 0
697 14:50:42.675436 USB2 port 1: enabled 1
698 14:50:42.678687 USB2 port 2: enabled 1
699 14:50:42.681976 USB2 port 3: enabled 0
700 14:50:42.682059 USB2 port 4: enabled 1
701 14:50:42.685134 USB2 port 5: enabled 0
702 14:50:42.688433 USB2 port 6: enabled 0
703 14:50:42.691955 USB2 port 7: enabled 0
704 14:50:42.692038 USB2 port 8: enabled 0
705 14:50:42.695130 USB2 port 9: enabled 0
706 14:50:42.698297 USB3 port 0: enabled 0
707 14:50:42.698380 USB3 port 1: enabled 1
708 14:50:42.702455 USB3 port 2: enabled 0
709 14:50:42.705087 USB3 port 3: enabled 0
710 14:50:42.708868 GENERIC: 0.0: enabled 1
711 14:50:42.708951 GENERIC: 1.0: enabled 1
712 14:50:42.711730 APIC: 01: enabled 1
713 14:50:42.715014 APIC: 03: enabled 1
714 14:50:42.715096 APIC: 05: enabled 1
715 14:50:42.718280 APIC: 07: enabled 1
716 14:50:42.718363 APIC: 06: enabled 1
717 14:50:42.722417 APIC: 02: enabled 1
718 14:50:42.725082 APIC: 04: enabled 1
719 14:50:42.725166 Compare with tree...
720 14:50:42.728338 Root Device: enabled 1
721 14:50:42.731703 DOMAIN: 0000: enabled 1
722 14:50:42.734836 PCI: 00:00.0: enabled 1
723 14:50:42.734919 PCI: 00:02.0: enabled 1
724 14:50:42.738643 PCI: 00:04.0: enabled 1
725 14:50:42.741478 GENERIC: 0.0: enabled 1
726 14:50:42.745038 PCI: 00:05.0: enabled 1
727 14:50:42.748593 PCI: 00:06.0: enabled 0
728 14:50:42.748677 PCI: 00:07.0: enabled 0
729 14:50:42.751913 GENERIC: 0.0: enabled 1
730 14:50:42.755050 PCI: 00:07.1: enabled 0
731 14:50:42.758100 GENERIC: 1.0: enabled 1
732 14:50:42.761514 PCI: 00:07.2: enabled 0
733 14:50:42.761598 GENERIC: 0.0: enabled 1
734 14:50:42.764767 PCI: 00:07.3: enabled 0
735 14:50:42.768175 GENERIC: 1.0: enabled 1
736 14:50:42.771469 PCI: 00:08.0: enabled 1
737 14:50:42.774804 PCI: 00:09.0: enabled 0
738 14:50:42.774888 PCI: 00:0a.0: enabled 0
739 14:50:42.778158 PCI: 00:0d.0: enabled 1
740 14:50:42.781464 USB0 port 0: enabled 1
741 14:50:42.784891 USB3 port 0: enabled 1
742 14:50:42.788618 USB3 port 1: enabled 1
743 14:50:42.788703 USB3 port 2: enabled 0
744 14:50:42.791591 USB3 port 3: enabled 0
745 14:50:42.794919 PCI: 00:0d.1: enabled 0
746 14:50:42.798050 PCI: 00:0d.2: enabled 0
747 14:50:42.801227 GENERIC: 0.0: enabled 1
748 14:50:42.801313 PCI: 00:0d.3: enabled 0
749 14:50:42.804843 PCI: 00:0e.0: enabled 0
750 14:50:42.808311 PCI: 00:10.2: enabled 1
751 14:50:42.811527 PCI: 00:10.6: enabled 0
752 14:50:42.814907 PCI: 00:10.7: enabled 0
753 14:50:42.814992 PCI: 00:12.0: enabled 0
754 14:50:42.818231 PCI: 00:12.6: enabled 0
755 14:50:42.821354 PCI: 00:13.0: enabled 0
756 14:50:42.824927 PCI: 00:14.0: enabled 1
757 14:50:42.828158 USB0 port 0: enabled 1
758 14:50:42.828247 USB2 port 0: enabled 0
759 14:50:42.831315 USB2 port 1: enabled 1
760 14:50:42.834852 USB2 port 2: enabled 1
761 14:50:42.837826 USB2 port 3: enabled 0
762 14:50:42.841360 USB2 port 4: enabled 1
763 14:50:42.844469 USB2 port 5: enabled 0
764 14:50:42.844555 USB2 port 6: enabled 0
765 14:50:42.848224 USB2 port 7: enabled 0
766 14:50:42.851382 USB2 port 8: enabled 0
767 14:50:42.854673 USB2 port 9: enabled 0
768 14:50:42.858015 USB3 port 0: enabled 0
769 14:50:42.861342 USB3 port 1: enabled 1
770 14:50:42.861431 USB3 port 2: enabled 0
771 14:50:42.864340 USB3 port 3: enabled 0
772 14:50:42.868070 PCI: 00:14.1: enabled 0
773 14:50:42.871452 PCI: 00:14.2: enabled 1
774 14:50:42.874517 PCI: 00:14.3: enabled 1
775 14:50:42.874605 GENERIC: 0.0: enabled 1
776 14:50:42.877996 PCI: 00:15.0: enabled 1
777 14:50:42.881168 I2C: 00:1a: enabled 1
778 14:50:42.884436 I2C: 00:31: enabled 1
779 14:50:42.884522 I2C: 00:32: enabled 1
780 14:50:42.887727 PCI: 00:15.1: enabled 1
781 14:50:42.891402 I2C: 00:10: enabled 1
782 14:50:42.894479 PCI: 00:15.2: enabled 1
783 14:50:42.897608 PCI: 00:15.3: enabled 1
784 14:50:42.897695 PCI: 00:16.0: enabled 1
785 14:50:42.901018 PCI: 00:16.1: enabled 0
786 14:50:42.904574 PCI: 00:16.2: enabled 0
787 14:50:42.907784 PCI: 00:16.3: enabled 0
788 14:50:42.910846 PCI: 00:16.4: enabled 0
789 14:50:42.910933 PCI: 00:16.5: enabled 0
790 14:50:42.914394 PCI: 00:17.0: enabled 1
791 14:50:42.917657 PCI: 00:19.0: enabled 0
792 14:50:42.921512 PCI: 00:19.1: enabled 1
793 14:50:42.925200 I2C: 00:15: enabled 1
794 14:50:42.925287 PCI: 00:19.2: enabled 0
795 14:50:42.928871 PCI: 00:1d.0: enabled 1
796 14:50:42.932105 GENERIC: 0.0: enabled 1
797 14:50:42.932190 PCI: 00:1e.0: enabled 1
798 14:50:42.935137 PCI: 00:1e.1: enabled 0
799 14:50:42.938398 PCI: 00:1e.2: enabled 1
800 14:50:42.941993 SPI: 00: enabled 1
801 14:50:42.945334 PCI: 00:1e.3: enabled 1
802 14:50:42.945420 SPI: 00: enabled 1
803 14:50:42.948569 PCI: 00:1f.0: enabled 1
804 14:50:42.952241 PNP: 0c09.0: enabled 1
805 14:50:42.955084 PCI: 00:1f.1: enabled 0
806 14:50:42.955168 PCI: 00:1f.2: enabled 1
807 14:50:43.007129 GENERIC: 0.0: enabled 1
808 14:50:43.007320 GENERIC: 0.0: enabled 1
809 14:50:43.007580 GENERIC: 1.0: enabled 1
810 14:50:43.007674 PCI: 00:1f.3: enabled 1
811 14:50:43.007950 PCI: 00:1f.4: enabled 0
812 14:50:43.008047 PCI: 00:1f.5: enabled 1
813 14:50:43.008137 PCI: 00:1f.6: enabled 0
814 14:50:43.008211 PCI: 00:1f.7: enabled 0
815 14:50:43.008279 CPU_CLUSTER: 0: enabled 1
816 14:50:43.008391 APIC: 00: enabled 1
817 14:50:43.008483 APIC: 01: enabled 1
818 14:50:43.008572 APIC: 03: enabled 1
819 14:50:43.008671 APIC: 05: enabled 1
820 14:50:43.008757 APIC: 07: enabled 1
821 14:50:43.008841 APIC: 06: enabled 1
822 14:50:43.008957 APIC: 02: enabled 1
823 14:50:43.009035 APIC: 04: enabled 1
824 14:50:43.009091 Root Device scanning...
825 14:50:43.009147 scan_static_bus for Root Device
826 14:50:43.009201 DOMAIN: 0000 enabled
827 14:50:43.057414 CPU_CLUSTER: 0 enabled
828 14:50:43.057572 DOMAIN: 0000 scanning...
829 14:50:43.057835 PCI: pci_scan_bus for bus 00
830 14:50:43.057906 PCI: 00:00.0 [8086/0000] ops
831 14:50:43.057978 PCI: 00:00.0 [8086/9a12] enabled
832 14:50:43.058040 PCI: 00:02.0 [8086/0000] bus ops
833 14:50:43.058286 PCI: 00:02.0 [8086/9a40] enabled
834 14:50:43.058353 PCI: 00:04.0 [8086/0000] bus ops
835 14:50:43.058653 PCI: 00:04.0 [8086/9a03] enabled
836 14:50:43.058751 PCI: 00:05.0 [8086/9a19] enabled
837 14:50:43.059068 PCI: 00:07.0 [0000/0000] hidden
838 14:50:43.059139 PCI: 00:08.0 [8086/9a11] enabled
839 14:50:43.059254 PCI: 00:0a.0 [8086/9a0d] disabled
840 14:50:43.059325 PCI: 00:0d.0 [8086/0000] bus ops
841 14:50:43.059391 PCI: 00:0d.0 [8086/9a13] enabled
842 14:50:43.107279 PCI: 00:14.0 [8086/0000] bus ops
843 14:50:43.107434 PCI: 00:14.0 [8086/a0ed] enabled
844 14:50:43.107690 PCI: 00:14.2 [8086/a0ef] enabled
845 14:50:43.107769 PCI: 00:14.3 [8086/0000] bus ops
846 14:50:43.107934 PCI: 00:14.3 [8086/a0f0] enabled
847 14:50:43.108033 PCI: 00:15.0 [8086/0000] bus ops
848 14:50:43.108684 PCI: 00:15.0 [8086/a0e8] enabled
849 14:50:43.108801 PCI: 00:15.1 [8086/0000] bus ops
850 14:50:43.109101 PCI: 00:15.1 [8086/a0e9] enabled
851 14:50:43.109183 PCI: 00:15.2 [8086/0000] bus ops
852 14:50:43.109257 PCI: 00:15.2 [8086/a0ea] enabled
853 14:50:43.109379 PCI: 00:15.3 [8086/0000] bus ops
854 14:50:43.109484 PCI: 00:15.3 [8086/a0eb] enabled
855 14:50:43.109605 PCI: 00:16.0 [8086/0000] ops
856 14:50:43.109704 PCI: 00:16.0 [8086/a0e0] enabled
857 14:50:43.122532 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 14:50:43.122709 PCI: 00:19.0 [8086/0000] bus ops
859 14:50:43.123350 PCI: 00:19.0 [8086/a0c5] disabled
860 14:50:43.123434 PCI: 00:19.1 [8086/0000] bus ops
861 14:50:43.126126 PCI: 00:19.1 [8086/a0c6] enabled
862 14:50:43.129424 PCI: 00:1d.0 [8086/0000] bus ops
863 14:50:43.132697 PCI: 00:1d.0 [8086/a0b0] enabled
864 14:50:43.132813 PCI: 00:1e.0 [8086/0000] ops
865 14:50:43.136210 PCI: 00:1e.0 [8086/a0a8] enabled
866 14:50:43.139272 PCI: 00:1e.2 [8086/0000] bus ops
867 14:50:43.142637 PCI: 00:1e.2 [8086/a0aa] enabled
868 14:50:43.145936 PCI: 00:1e.3 [8086/0000] bus ops
869 14:50:43.149541 PCI: 00:1e.3 [8086/a0ab] enabled
870 14:50:43.152698 PCI: 00:1f.0 [8086/0000] bus ops
871 14:50:43.156403 PCI: 00:1f.0 [8086/a087] enabled
872 14:50:43.159194 RTC Init
873 14:50:43.163016 Set power on after power failure.
874 14:50:43.163099 Disabling Deep S3
875 14:50:43.166147 Disabling Deep S3
876 14:50:43.169344 Disabling Deep S4
877 14:50:43.169430 Disabling Deep S4
878 14:50:43.172926 Disabling Deep S5
879 14:50:43.173014 Disabling Deep S5
880 14:50:43.176652 PCI: 00:1f.2 [0000/0000] hidden
881 14:50:43.179567 PCI: 00:1f.3 [8086/0000] bus ops
882 14:50:43.182867 PCI: 00:1f.3 [8086/a0c8] enabled
883 14:50:43.186110 PCI: 00:1f.5 [8086/0000] bus ops
884 14:50:43.189392 PCI: 00:1f.5 [8086/a0a4] enabled
885 14:50:43.192520 PCI: Leftover static devices:
886 14:50:43.195951 PCI: 00:10.2
887 14:50:43.196044 PCI: 00:10.6
888 14:50:43.196110 PCI: 00:10.7
889 14:50:43.199405 PCI: 00:06.0
890 14:50:43.199490 PCI: 00:07.1
891 14:50:43.202774 PCI: 00:07.2
892 14:50:43.202860 PCI: 00:07.3
893 14:50:43.202926 PCI: 00:09.0
894 14:50:43.206119 PCI: 00:0d.1
895 14:50:43.206205 PCI: 00:0d.2
896 14:50:43.209107 PCI: 00:0d.3
897 14:50:43.209220 PCI: 00:0e.0
898 14:50:43.212819 PCI: 00:12.0
899 14:50:43.212910 PCI: 00:12.6
900 14:50:43.212975 PCI: 00:13.0
901 14:50:43.216192 PCI: 00:14.1
902 14:50:43.216279 PCI: 00:16.1
903 14:50:43.219770 PCI: 00:16.2
904 14:50:43.219865 PCI: 00:16.3
905 14:50:43.219936 PCI: 00:16.4
906 14:50:43.222617 PCI: 00:16.5
907 14:50:43.222739 PCI: 00:17.0
908 14:50:43.226092 PCI: 00:19.2
909 14:50:43.226183 PCI: 00:1e.1
910 14:50:43.226249 PCI: 00:1f.1
911 14:50:43.229188 PCI: 00:1f.4
912 14:50:43.229273 PCI: 00:1f.6
913 14:50:43.232785 PCI: 00:1f.7
914 14:50:43.235811 PCI: Check your devicetree.cb.
915 14:50:43.235901 PCI: 00:02.0 scanning...
916 14:50:43.242506 scan_generic_bus for PCI: 00:02.0
917 14:50:43.245991 scan_generic_bus for PCI: 00:02.0 done
918 14:50:43.249716 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 14:50:43.253011 PCI: 00:04.0 scanning...
920 14:50:43.255746 scan_generic_bus for PCI: 00:04.0
921 14:50:43.259407 GENERIC: 0.0 enabled
922 14:50:43.262709 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 14:50:43.269174 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 14:50:43.272559 PCI: 00:0d.0 scanning...
925 14:50:43.276527 scan_static_bus for PCI: 00:0d.0
926 14:50:43.276620 USB0 port 0 enabled
927 14:50:43.278928 USB0 port 0 scanning...
928 14:50:43.282639 scan_static_bus for USB0 port 0
929 14:50:43.285820 USB3 port 0 enabled
930 14:50:43.285902 USB3 port 1 enabled
931 14:50:43.289226 USB3 port 2 disabled
932 14:50:43.292776 USB3 port 3 disabled
933 14:50:43.292859 USB3 port 0 scanning...
934 14:50:43.295676 scan_static_bus for USB3 port 0
935 14:50:43.302373 scan_static_bus for USB3 port 0 done
936 14:50:43.305452 scan_bus: bus USB3 port 0 finished in 6 msecs
937 14:50:43.308903 USB3 port 1 scanning...
938 14:50:43.312386 scan_static_bus for USB3 port 1
939 14:50:43.315887 scan_static_bus for USB3 port 1 done
940 14:50:43.318819 scan_bus: bus USB3 port 1 finished in 6 msecs
941 14:50:43.322808 scan_static_bus for USB0 port 0 done
942 14:50:43.329226 scan_bus: bus USB0 port 0 finished in 43 msecs
943 14:50:43.332011 scan_static_bus for PCI: 00:0d.0 done
944 14:50:43.335159 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 14:50:43.338591 PCI: 00:14.0 scanning...
946 14:50:43.342165 scan_static_bus for PCI: 00:14.0
947 14:50:43.345247 USB0 port 0 enabled
948 14:50:43.348812 USB0 port 0 scanning...
949 14:50:43.352123 scan_static_bus for USB0 port 0
950 14:50:43.352208 USB2 port 0 disabled
951 14:50:43.355104 USB2 port 1 enabled
952 14:50:43.355215 USB2 port 2 enabled
953 14:50:43.359004 USB2 port 3 disabled
954 14:50:43.361779 USB2 port 4 enabled
955 14:50:43.361863 USB2 port 5 disabled
956 14:50:43.365129 USB2 port 6 disabled
957 14:50:43.368485 USB2 port 7 disabled
958 14:50:43.368569 USB2 port 8 disabled
959 14:50:43.371945 USB2 port 9 disabled
960 14:50:43.375151 USB3 port 0 disabled
961 14:50:43.375246 USB3 port 1 enabled
962 14:50:43.378783 USB3 port 2 disabled
963 14:50:43.381846 USB3 port 3 disabled
964 14:50:43.381930 USB2 port 1 scanning...
965 14:50:43.385203 scan_static_bus for USB2 port 1
966 14:50:43.388689 scan_static_bus for USB2 port 1 done
967 14:50:43.394968 scan_bus: bus USB2 port 1 finished in 6 msecs
968 14:50:43.398297 USB2 port 2 scanning...
969 14:50:43.401618 scan_static_bus for USB2 port 2
970 14:50:43.405356 scan_static_bus for USB2 port 2 done
971 14:50:43.408409 scan_bus: bus USB2 port 2 finished in 6 msecs
972 14:50:43.412448 USB2 port 4 scanning...
973 14:50:43.414883 scan_static_bus for USB2 port 4
974 14:50:43.418567 scan_static_bus for USB2 port 4 done
975 14:50:43.421750 scan_bus: bus USB2 port 4 finished in 6 msecs
976 14:50:43.425008 USB3 port 1 scanning...
977 14:50:43.428843 scan_static_bus for USB3 port 1
978 14:50:43.431682 scan_static_bus for USB3 port 1 done
979 14:50:43.438364 scan_bus: bus USB3 port 1 finished in 6 msecs
980 14:50:43.441436 scan_static_bus for USB0 port 0 done
981 14:50:43.444924 scan_bus: bus USB0 port 0 finished in 93 msecs
982 14:50:43.448308 scan_static_bus for PCI: 00:14.0 done
983 14:50:43.455058 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 14:50:43.458079 PCI: 00:14.3 scanning...
985 14:50:43.461479 scan_static_bus for PCI: 00:14.3
986 14:50:43.461568 GENERIC: 0.0 enabled
987 14:50:43.465018 scan_static_bus for PCI: 00:14.3 done
988 14:50:43.471494 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 14:50:43.474669 PCI: 00:15.0 scanning...
990 14:50:43.478163 scan_static_bus for PCI: 00:15.0
991 14:50:43.478260 I2C: 00:1a enabled
992 14:50:43.481506 I2C: 00:31 enabled
993 14:50:43.481596 I2C: 00:32 enabled
994 14:50:43.487808 scan_static_bus for PCI: 00:15.0 done
995 14:50:43.491356 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 14:50:43.494554 PCI: 00:15.1 scanning...
997 14:50:43.497926 scan_static_bus for PCI: 00:15.1
998 14:50:43.501580 I2C: 00:10 enabled
999 14:50:43.505312 scan_static_bus for PCI: 00:15.1 done
1000 14:50:43.508449 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 14:50:43.511618 PCI: 00:15.2 scanning...
1002 14:50:43.514912 scan_static_bus for PCI: 00:15.2
1003 14:50:43.518411 scan_static_bus for PCI: 00:15.2 done
1004 14:50:43.521694 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 14:50:43.524948 PCI: 00:15.3 scanning...
1006 14:50:43.528222 scan_static_bus for PCI: 00:15.3
1007 14:50:43.532320 scan_static_bus for PCI: 00:15.3 done
1008 14:50:43.538182 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 14:50:43.538328 PCI: 00:19.1 scanning...
1010 14:50:43.541830 scan_static_bus for PCI: 00:19.1
1011 14:50:43.545001 I2C: 00:15 enabled
1012 14:50:43.548592 scan_static_bus for PCI: 00:19.1 done
1013 14:50:43.554841 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 14:50:43.554965 PCI: 00:1d.0 scanning...
1015 14:50:43.561657 do_pci_scan_bridge for PCI: 00:1d.0
1016 14:50:43.561772 PCI: pci_scan_bus for bus 01
1017 14:50:43.565195 PCI: 01:00.0 [1c5c/174a] enabled
1018 14:50:43.568318 GENERIC: 0.0 enabled
1019 14:50:43.571797 Enabling Common Clock Configuration
1020 14:50:43.578234 L1 Sub-State supported from root port 29
1021 14:50:43.578319 L1 Sub-State Support = 0xf
1022 14:50:43.581828 CommonModeRestoreTime = 0x28
1023 14:50:43.588234 Power On Value = 0x16, Power On Scale = 0x0
1024 14:50:43.588320 ASPM: Enabled L1
1025 14:50:43.591628 PCIe: Max_Payload_Size adjusted to 128
1026 14:50:43.598422 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 14:50:43.598514 PCI: 00:1e.2 scanning...
1028 14:50:43.605129 scan_generic_bus for PCI: 00:1e.2
1029 14:50:43.605213 SPI: 00 enabled
1030 14:50:43.611789 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 14:50:43.615122 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 14:50:43.618524 PCI: 00:1e.3 scanning...
1033 14:50:43.621574 scan_generic_bus for PCI: 00:1e.3
1034 14:50:43.625140 SPI: 00 enabled
1035 14:50:43.632144 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 14:50:43.634655 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 14:50:43.638028 PCI: 00:1f.0 scanning...
1038 14:50:43.641476 scan_static_bus for PCI: 00:1f.0
1039 14:50:43.641564 PNP: 0c09.0 enabled
1040 14:50:43.645348 PNP: 0c09.0 scanning...
1041 14:50:43.648563 scan_static_bus for PNP: 0c09.0
1042 14:50:43.651775 scan_static_bus for PNP: 0c09.0 done
1043 14:50:43.658312 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 14:50:43.661333 scan_static_bus for PCI: 00:1f.0 done
1045 14:50:43.665072 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 14:50:43.668417 PCI: 00:1f.2 scanning...
1047 14:50:43.671552 scan_static_bus for PCI: 00:1f.2
1048 14:50:43.674871 GENERIC: 0.0 enabled
1049 14:50:43.674965 GENERIC: 0.0 scanning...
1050 14:50:43.678398 scan_static_bus for GENERIC: 0.0
1051 14:50:43.681664 GENERIC: 0.0 enabled
1052 14:50:43.685009 GENERIC: 1.0 enabled
1053 14:50:43.688079 scan_static_bus for GENERIC: 0.0 done
1054 14:50:43.691705 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 14:50:43.698269 scan_static_bus for PCI: 00:1f.2 done
1056 14:50:43.701596 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 14:50:43.704847 PCI: 00:1f.3 scanning...
1058 14:50:43.708113 scan_static_bus for PCI: 00:1f.3
1059 14:50:43.711727 scan_static_bus for PCI: 00:1f.3 done
1060 14:50:43.714956 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 14:50:43.718419 PCI: 00:1f.5 scanning...
1062 14:50:43.721315 scan_generic_bus for PCI: 00:1f.5
1063 14:50:43.724671 scan_generic_bus for PCI: 00:1f.5 done
1064 14:50:43.731629 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 14:50:43.734660 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 14:50:43.738072 scan_static_bus for Root Device done
1067 14:50:43.744529 scan_bus: bus Root Device finished in 737 msecs
1068 14:50:43.744613 done
1069 14:50:43.751137 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 14:50:43.754656 Chrome EC: UHEPI supported
1071 14:50:43.761353 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 14:50:43.767829 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 14:50:43.771508 SPI flash protection: WPSW=0 SRP0=0
1074 14:50:43.775136 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 14:50:43.781735 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 14:50:43.785267 found VGA at PCI: 00:02.0
1077 14:50:43.788061 Setting up VGA for PCI: 00:02.0
1078 14:50:43.791360 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 14:50:43.798004 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 14:50:43.798093 Allocating resources...
1081 14:50:43.801231 Reading resources...
1082 14:50:43.804377 Root Device read_resources bus 0 link: 0
1083 14:50:43.811316 DOMAIN: 0000 read_resources bus 0 link: 0
1084 14:50:43.814495 PCI: 00:04.0 read_resources bus 1 link: 0
1085 14:50:43.821116 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 14:50:43.824376 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 14:50:43.831249 USB0 port 0 read_resources bus 0 link: 0
1088 14:50:43.834382 USB0 port 0 read_resources bus 0 link: 0 done
1089 14:50:43.841114 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 14:50:43.844375 PCI: 00:14.0 read_resources bus 0 link: 0
1091 14:50:43.847492 USB0 port 0 read_resources bus 0 link: 0
1092 14:50:43.854708 USB0 port 0 read_resources bus 0 link: 0 done
1093 14:50:43.858398 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 14:50:43.865343 PCI: 00:14.3 read_resources bus 0 link: 0
1095 14:50:43.868924 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 14:50:43.875460 PCI: 00:15.0 read_resources bus 0 link: 0
1097 14:50:43.878452 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 14:50:43.885306 PCI: 00:15.1 read_resources bus 0 link: 0
1099 14:50:43.888327 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 14:50:43.895891 PCI: 00:19.1 read_resources bus 0 link: 0
1101 14:50:43.899238 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 14:50:43.906368 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 14:50:43.909193 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 14:50:43.916403 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 14:50:43.919396 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 14:50:43.925709 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 14:50:43.929599 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 14:50:43.936120 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 14:50:43.939440 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 14:50:43.942454 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 14:50:43.949471 GENERIC: 0.0 read_resources bus 0 link: 0
1112 14:50:43.952858 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 14:50:43.959064 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 14:50:43.965805 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 14:50:43.969224 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 14:50:43.972416 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 14:50:43.979274 Root Device read_resources bus 0 link: 0 done
1118 14:50:43.982502 Done reading resources.
1119 14:50:43.986612 Show resources in subtree (Root Device)...After reading.
1120 14:50:43.992927 Root Device child on link 0 DOMAIN: 0000
1121 14:50:43.996388 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 14:50:44.006220 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 14:50:44.016452 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 14:50:44.016975 PCI: 00:00.0
1125 14:50:44.025925 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 14:50:44.036124 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 14:50:44.045950 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 14:50:44.055830 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 14:50:44.062478 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 14:50:44.072580 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 14:50:44.082649 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 14:50:44.092313 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 14:50:44.102319 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 14:50:44.112220 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 14:50:44.119578 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 14:50:44.128655 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 14:50:44.138828 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 14:50:44.148639 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 14:50:44.155031 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 14:50:44.164857 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 14:50:44.175238 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 14:50:44.185369 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 14:50:44.195410 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 14:50:44.204912 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 14:50:44.205556 PCI: 00:02.0
1146 14:50:44.218876 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:50:44.228522 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:50:44.234641 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:50:44.241628 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 14:50:44.251662 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 14:50:44.252199 GENERIC: 0.0
1152 14:50:44.254903 PCI: 00:05.0
1153 14:50:44.265068 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:50:44.268472 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 14:50:44.271880 GENERIC: 0.0
1156 14:50:44.272408 PCI: 00:08.0
1157 14:50:44.281890 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 14:50:44.284752 PCI: 00:0a.0
1159 14:50:44.288144 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 14:50:44.298133 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 14:50:44.301221 USB0 port 0 child on link 0 USB3 port 0
1162 14:50:44.304636 USB3 port 0
1163 14:50:44.305064 USB3 port 1
1164 14:50:44.307814 USB3 port 2
1165 14:50:44.308237 USB3 port 3
1166 14:50:44.314709 PCI: 00:14.0 child on link 0 USB0 port 0
1167 14:50:44.324445 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 14:50:44.327816 USB0 port 0 child on link 0 USB2 port 0
1169 14:50:44.331286 USB2 port 0
1170 14:50:44.331715 USB2 port 1
1171 14:50:44.334533 USB2 port 2
1172 14:50:44.335066 USB2 port 3
1173 14:50:44.338102 USB2 port 4
1174 14:50:44.338633 USB2 port 5
1175 14:50:44.341279 USB2 port 6
1176 14:50:44.341707 USB2 port 7
1177 14:50:44.344503 USB2 port 8
1178 14:50:44.344929 USB2 port 9
1179 14:50:44.347796 USB3 port 0
1180 14:50:44.348188 USB3 port 1
1181 14:50:44.351376 USB3 port 2
1182 14:50:44.351768 USB3 port 3
1183 14:50:44.354924 PCI: 00:14.2
1184 14:50:44.364617 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 14:50:44.374442 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 14:50:44.378234 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 14:50:44.387826 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 14:50:44.390831 GENERIC: 0.0
1189 14:50:44.394261 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 14:50:44.404078 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:50:44.407789 I2C: 00:1a
1192 14:50:44.408186 I2C: 00:31
1193 14:50:44.411245 I2C: 00:32
1194 14:50:44.414399 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 14:50:44.424213 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:50:44.424505 I2C: 00:10
1197 14:50:44.427505 PCI: 00:15.2
1198 14:50:44.437793 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 14:50:44.438058 PCI: 00:15.3
1200 14:50:44.447564 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:50:44.450786 PCI: 00:16.0
1202 14:50:44.460672 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:50:44.460923 PCI: 00:19.0
1204 14:50:44.467266 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 14:50:44.477472 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:50:44.477869 I2C: 00:15
1207 14:50:44.481086 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 14:50:44.490704 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 14:50:44.500389 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 14:50:44.510311 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 14:50:44.510711 GENERIC: 0.0
1212 14:50:44.513800 PCI: 01:00.0
1213 14:50:44.523677 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:50:44.533432 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 14:50:44.540352 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 14:50:44.543706 PCI: 00:1e.0
1217 14:50:44.553415 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 14:50:44.557015 PCI: 00:1e.2 child on link 0 SPI: 00
1219 14:50:44.567336 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 14:50:44.570351 SPI: 00
1221 14:50:44.573625 PCI: 00:1e.3 child on link 0 SPI: 00
1222 14:50:44.583345 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 14:50:44.583672 SPI: 00
1224 14:50:44.590373 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 14:50:44.596821 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 14:50:44.600164 PNP: 0c09.0
1227 14:50:44.609989 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 14:50:44.613294 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 14:50:44.623885 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 14:50:44.633359 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 14:50:44.637359 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 14:50:44.637794 GENERIC: 0.0
1233 14:50:44.639923 GENERIC: 1.0
1234 14:50:44.643523 PCI: 00:1f.3
1235 14:50:44.653584 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 14:50:44.663529 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 14:50:44.664057 PCI: 00:1f.5
1238 14:50:44.673198 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 14:50:44.676171 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 14:50:44.676600 APIC: 00
1241 14:50:44.679941 APIC: 01
1242 14:50:44.680370 APIC: 03
1243 14:50:44.683540 APIC: 05
1244 14:50:44.684060 APIC: 07
1245 14:50:44.684471 APIC: 06
1246 14:50:44.686624 APIC: 02
1247 14:50:44.687379 APIC: 04
1248 14:50:44.697161 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 14:50:44.700131 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 14:50:44.706380 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 14:50:44.713094 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 14:50:44.716734 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 14:50:44.719682 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 14:50:44.726075 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 14:50:44.733066 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 14:50:44.739490 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 14:50:44.746358 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 14:50:44.756289 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 14:50:44.759244 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 14:50:44.769616 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 14:50:44.776115 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 14:50:44.782505 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 14:50:44.786104 DOMAIN: 0000: Resource ranges:
1264 14:50:44.789919 * Base: 1000, Size: 800, Tag: 100
1265 14:50:44.793054 * Base: 1900, Size: e700, Tag: 100
1266 14:50:44.799626 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 14:50:44.806051 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 14:50:44.812566 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 14:50:44.818823 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 14:50:44.828681 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 14:50:44.835669 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 14:50:44.842169 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 14:50:44.852152 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 14:50:44.858905 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 14:50:44.865427 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 14:50:44.875656 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 14:50:44.882239 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 14:50:44.889021 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 14:50:44.899046 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 14:50:44.905610 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 14:50:44.912170 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 14:50:44.922005 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 14:50:44.928362 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 14:50:44.935073 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 14:50:44.945410 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 14:50:44.951996 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 14:50:44.958745 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 14:50:44.968812 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 14:50:44.975307 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 14:50:44.981970 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 14:50:44.984760 DOMAIN: 0000: Resource ranges:
1292 14:50:44.991604 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 14:50:44.994951 * Base: d0000000, Size: 28000000, Tag: 200
1294 14:50:44.998462 * Base: fa000000, Size: 1000000, Tag: 200
1295 14:50:45.001655 * Base: fb001000, Size: 2fff000, Tag: 200
1296 14:50:45.008166 * Base: fe010000, Size: 2e000, Tag: 200
1297 14:50:45.011384 * Base: fe03f000, Size: d41000, Tag: 200
1298 14:50:45.015061 * Base: fed88000, Size: 8000, Tag: 200
1299 14:50:45.018607 * Base: fed93000, Size: d000, Tag: 200
1300 14:50:45.025516 * Base: feda2000, Size: 1e000, Tag: 200
1301 14:50:45.028445 * Base: fede0000, Size: 1220000, Tag: 200
1302 14:50:45.031270 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 14:50:45.038214 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 14:50:45.045105 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 14:50:45.051648 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 14:50:45.058361 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 14:50:45.064952 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 14:50:45.071114 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 14:50:45.078559 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 14:50:45.084664 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 14:50:45.091030 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 14:50:45.098245 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 14:50:45.104610 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 14:50:45.111294 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 14:50:45.118230 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 14:50:45.124680 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 14:50:45.130897 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 14:50:45.138045 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 14:50:45.144591 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 14:50:45.150794 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 14:50:45.157662 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 14:50:45.164339 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 14:50:45.171031 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 14:50:45.177291 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 14:50:45.187729 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 14:50:45.193995 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 14:50:45.197178 PCI: 00:1d.0: Resource ranges:
1328 14:50:45.200959 * Base: 7fc00000, Size: 100000, Tag: 200
1329 14:50:45.207190 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 14:50:45.214172 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 14:50:45.220576 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 14:50:45.230561 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 14:50:45.237418 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 14:50:45.241064 Root Device assign_resources, bus 0 link: 0
1335 14:50:45.247233 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 14:50:45.254052 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 14:50:45.264085 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 14:50:45.270449 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 14:50:45.280599 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 14:50:45.283238 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 14:50:45.289714 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 14:50:45.296464 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 14:50:45.306729 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 14:50:45.313151 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 14:50:45.316424 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 14:50:45.322957 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 14:50:45.329317 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 14:50:45.336325 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 14:50:45.339455 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 14:50:45.349537 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 14:50:45.355659 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 14:50:45.365706 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 14:50:45.369310 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 14:50:45.372353 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 14:50:45.382921 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 14:50:45.385672 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 14:50:45.392347 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 14:50:45.398973 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 14:50:45.402090 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 14:50:45.409269 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 14:50:45.416020 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 14:50:45.426420 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 14:50:45.432336 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 14:50:45.442331 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 14:50:45.445698 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 14:50:45.452437 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 14:50:45.459086 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 14:50:45.468801 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 14:50:45.478623 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 14:50:45.481977 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 14:50:45.492112 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 14:50:45.498541 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 14:50:45.505471 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 14:50:45.512393 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 14:50:45.518733 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 14:50:45.525273 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 14:50:45.528577 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 14:50:45.538876 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 14:50:45.541879 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 14:50:45.545445 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 14:50:45.551889 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 14:50:45.554854 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 14:50:45.561542 LPC: Trying to open IO window from 800 size 1ff
1384 14:50:45.568731 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 14:50:45.578276 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 14:50:45.584952 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 14:50:45.591692 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 14:50:45.594504 Root Device assign_resources, bus 0 link: 0
1389 14:50:45.598484 Done setting resources.
1390 14:50:45.605188 Show resources in subtree (Root Device)...After assigning values.
1391 14:50:45.608059 Root Device child on link 0 DOMAIN: 0000
1392 14:50:45.611402 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 14:50:45.621053 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 14:50:45.631115 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 14:50:45.631595 PCI: 00:00.0
1396 14:50:45.641714 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 14:50:45.650967 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 14:50:45.660889 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 14:50:45.671495 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 14:50:45.680968 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 14:50:45.691355 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 14:50:45.697646 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 14:50:45.707536 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 14:50:45.717714 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 14:50:45.727584 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 14:50:45.737309 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 14:50:45.744308 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 14:50:45.753792 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 14:50:45.764203 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 14:50:45.774439 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 14:50:45.783929 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 14:50:45.793844 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 14:50:45.803643 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 14:50:45.810248 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 14:50:45.820609 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 14:50:45.824049 PCI: 00:02.0
1417 14:50:45.833686 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 14:50:45.843654 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 14:50:45.853831 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 14:50:45.857300 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 14:50:45.866978 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 14:50:45.870383 GENERIC: 0.0
1423 14:50:45.870923 PCI: 00:05.0
1424 14:50:45.883857 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 14:50:45.887375 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 14:50:45.891010 GENERIC: 0.0
1427 14:50:45.891577 PCI: 00:08.0
1428 14:50:45.900149 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 14:50:45.904063 PCI: 00:0a.0
1430 14:50:45.907338 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 14:50:45.916996 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 14:50:45.920275 USB0 port 0 child on link 0 USB3 port 0
1433 14:50:45.923322 USB3 port 0
1434 14:50:45.923744 USB3 port 1
1435 14:50:45.927078 USB3 port 2
1436 14:50:45.930244 USB3 port 3
1437 14:50:45.933648 PCI: 00:14.0 child on link 0 USB0 port 0
1438 14:50:45.943733 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 14:50:45.947321 USB0 port 0 child on link 0 USB2 port 0
1440 14:50:45.950239 USB2 port 0
1441 14:50:45.950659 USB2 port 1
1442 14:50:45.953997 USB2 port 2
1443 14:50:45.954418 USB2 port 3
1444 14:50:45.956581 USB2 port 4
1445 14:50:45.957003 USB2 port 5
1446 14:50:45.960560 USB2 port 6
1447 14:50:45.963647 USB2 port 7
1448 14:50:45.964071 USB2 port 8
1449 14:50:45.966776 USB2 port 9
1450 14:50:45.967255 USB3 port 0
1451 14:50:45.970699 USB3 port 1
1452 14:50:45.971256 USB3 port 2
1453 14:50:45.974327 USB3 port 3
1454 14:50:45.974850 PCI: 00:14.2
1455 14:50:45.983752 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 14:50:45.993814 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 14:50:46.000491 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 14:50:46.010262 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 14:50:46.010772 GENERIC: 0.0
1460 14:50:46.016560 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 14:50:46.026484 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 14:50:46.027024 I2C: 00:1a
1463 14:50:46.029947 I2C: 00:31
1464 14:50:46.030502 I2C: 00:32
1465 14:50:46.036279 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 14:50:46.046522 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 14:50:46.046951 I2C: 00:10
1468 14:50:46.049668 PCI: 00:15.2
1469 14:50:46.059716 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 14:50:46.060147 PCI: 00:15.3
1471 14:50:46.070645 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 14:50:46.073120 PCI: 00:16.0
1473 14:50:46.083423 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 14:50:46.086865 PCI: 00:19.0
1475 14:50:46.089784 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 14:50:46.099687 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 14:50:46.100235 I2C: 00:15
1478 14:50:46.106426 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 14:50:46.116372 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 14:50:46.127091 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 14:50:46.136238 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 14:50:46.139717 GENERIC: 0.0
1483 14:50:46.140147 PCI: 01:00.0
1484 14:50:46.149618 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 14:50:46.162747 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 14:50:46.172755 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 14:50:46.173280 PCI: 00:1e.0
1488 14:50:46.186482 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 14:50:46.189296 PCI: 00:1e.2 child on link 0 SPI: 00
1490 14:50:46.199159 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 14:50:46.199907 SPI: 00
1492 14:50:46.203025 PCI: 00:1e.3 child on link 0 SPI: 00
1493 14:50:46.215643 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 14:50:46.216153 SPI: 00
1495 14:50:46.219774 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 14:50:46.229718 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 14:50:46.230245 PNP: 0c09.0
1498 14:50:46.239259 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 14:50:46.242144 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 14:50:46.252672 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 14:50:46.262703 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 14:50:46.266066 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 14:50:46.268753 GENERIC: 0.0
1504 14:50:46.272203 GENERIC: 1.0
1505 14:50:46.272628 PCI: 00:1f.3
1506 14:50:46.282712 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 14:50:46.292259 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 14:50:46.295469 PCI: 00:1f.5
1509 14:50:46.305667 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 14:50:46.308592 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 14:50:46.312214 APIC: 00
1512 14:50:46.312638 APIC: 01
1513 14:50:46.312974 APIC: 03
1514 14:50:46.315395 APIC: 05
1515 14:50:46.315892 APIC: 07
1516 14:50:46.316272 APIC: 06
1517 14:50:46.319041 APIC: 02
1518 14:50:46.319504 APIC: 04
1519 14:50:46.322051 Done allocating resources.
1520 14:50:46.329216 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 14:50:46.335942 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 14:50:46.338734 Configure GPIOs for I2S audio on UP4.
1523 14:50:46.345618 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 14:50:46.348734 Enabling resources...
1525 14:50:46.351993 PCI: 00:00.0 subsystem <- 8086/9a12
1526 14:50:46.355669 PCI: 00:00.0 cmd <- 06
1527 14:50:46.358963 PCI: 00:02.0 subsystem <- 8086/9a40
1528 14:50:46.359573 PCI: 00:02.0 cmd <- 03
1529 14:50:46.365771 PCI: 00:04.0 subsystem <- 8086/9a03
1530 14:50:46.366336 PCI: 00:04.0 cmd <- 02
1531 14:50:46.368694 PCI: 00:05.0 subsystem <- 8086/9a19
1532 14:50:46.372746 PCI: 00:05.0 cmd <- 02
1533 14:50:46.375406 PCI: 00:08.0 subsystem <- 8086/9a11
1534 14:50:46.379014 PCI: 00:08.0 cmd <- 06
1535 14:50:46.382177 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 14:50:46.385469 PCI: 00:0d.0 cmd <- 02
1537 14:50:46.388581 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 14:50:46.392086 PCI: 00:14.0 cmd <- 02
1539 14:50:46.395374 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 14:50:46.399070 PCI: 00:14.2 cmd <- 02
1541 14:50:46.402261 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 14:50:46.405497 PCI: 00:14.3 cmd <- 02
1543 14:50:46.408490 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 14:50:46.408919 PCI: 00:15.0 cmd <- 02
1545 14:50:46.415019 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 14:50:46.415487 PCI: 00:15.1 cmd <- 02
1547 14:50:46.418503 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 14:50:46.422060 PCI: 00:15.2 cmd <- 02
1549 14:50:46.426065 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 14:50:46.429070 PCI: 00:15.3 cmd <- 02
1551 14:50:46.431672 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 14:50:46.435348 PCI: 00:16.0 cmd <- 02
1553 14:50:46.438765 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 14:50:46.441951 PCI: 00:19.1 cmd <- 02
1555 14:50:46.445081 PCI: 00:1d.0 bridge ctrl <- 0013
1556 14:50:46.448673 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 14:50:46.451882 PCI: 00:1d.0 cmd <- 06
1558 14:50:46.455025 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 14:50:46.455637 PCI: 00:1e.0 cmd <- 06
1560 14:50:46.462390 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 14:50:46.463221 PCI: 00:1e.2 cmd <- 06
1562 14:50:46.465440 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 14:50:46.468790 PCI: 00:1e.3 cmd <- 02
1564 14:50:46.472606 PCI: 00:1f.0 subsystem <- 8086/a087
1565 14:50:46.475587 PCI: 00:1f.0 cmd <- 407
1566 14:50:46.478815 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 14:50:46.482301 PCI: 00:1f.3 cmd <- 02
1568 14:50:46.485377 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 14:50:46.488303 PCI: 00:1f.5 cmd <- 406
1570 14:50:46.492551 PCI: 01:00.0 cmd <- 02
1571 14:50:46.497198 done.
1572 14:50:46.500029 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 14:50:46.503411 Initializing devices...
1574 14:50:46.506754 Root Device init
1575 14:50:46.510278 Chrome EC: Set SMI mask to 0x0000000000000000
1576 14:50:46.517199 Chrome EC: clear events_b mask to 0x0000000000000000
1577 14:50:46.524145 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 14:50:46.530602 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 14:50:46.533860 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 14:50:46.540454 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 14:50:46.547167 fw_config match found: DB_USB=USB3_ACTIVE
1582 14:50:46.550884 Configure Right Type-C port orientation for retimer
1583 14:50:46.554001 Root Device init finished in 45 msecs
1584 14:50:46.558355 PCI: 00:00.0 init
1585 14:50:46.561484 CPU TDP = 9 Watts
1586 14:50:46.561916 CPU PL1 = 9 Watts
1587 14:50:46.564783 CPU PL2 = 40 Watts
1588 14:50:46.568352 CPU PL4 = 83 Watts
1589 14:50:46.571710 PCI: 00:00.0 init finished in 8 msecs
1590 14:50:46.572135 PCI: 00:02.0 init
1591 14:50:46.574863 GMA: Found VBT in CBFS
1592 14:50:46.577814 GMA: Found valid VBT in CBFS
1593 14:50:46.584797 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 14:50:46.591606 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 14:50:46.594466 PCI: 00:02.0 init finished in 18 msecs
1596 14:50:46.598195 PCI: 00:05.0 init
1597 14:50:46.601071 PCI: 00:05.0 init finished in 0 msecs
1598 14:50:46.604561 PCI: 00:08.0 init
1599 14:50:46.608154 PCI: 00:08.0 init finished in 0 msecs
1600 14:50:46.611096 PCI: 00:14.0 init
1601 14:50:46.614838 PCI: 00:14.0 init finished in 0 msecs
1602 14:50:46.617827 PCI: 00:14.2 init
1603 14:50:46.621549 PCI: 00:14.2 init finished in 0 msecs
1604 14:50:46.624360 PCI: 00:15.0 init
1605 14:50:46.624784 I2C bus 0 version 0x3230302a
1606 14:50:46.631274 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 14:50:46.634570 PCI: 00:15.0 init finished in 6 msecs
1608 14:50:46.634993 PCI: 00:15.1 init
1609 14:50:46.637858 I2C bus 1 version 0x3230302a
1610 14:50:46.641325 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 14:50:46.647488 PCI: 00:15.1 init finished in 6 msecs
1612 14:50:46.647911 PCI: 00:15.2 init
1613 14:50:46.651611 I2C bus 2 version 0x3230302a
1614 14:50:46.654499 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 14:50:46.657503 PCI: 00:15.2 init finished in 6 msecs
1616 14:50:46.660768 PCI: 00:15.3 init
1617 14:50:46.664266 I2C bus 3 version 0x3230302a
1618 14:50:46.667975 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 14:50:46.670717 PCI: 00:15.3 init finished in 6 msecs
1620 14:50:46.674070 PCI: 00:16.0 init
1621 14:50:46.677779 PCI: 00:16.0 init finished in 0 msecs
1622 14:50:46.680943 PCI: 00:19.1 init
1623 14:50:46.684576 I2C bus 5 version 0x3230302a
1624 14:50:46.687833 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 14:50:46.691021 PCI: 00:19.1 init finished in 6 msecs
1626 14:50:46.691493 PCI: 00:1d.0 init
1627 14:50:46.694481 Initializing PCH PCIe bridge.
1628 14:50:46.700837 PCI: 00:1d.0 init finished in 3 msecs
1629 14:50:46.701259 PCI: 00:1f.0 init
1630 14:50:46.707331 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 14:50:46.711045 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 14:50:46.714214 IOAPIC: ID = 0x02
1633 14:50:46.714642 IOAPIC: Dumping registers
1634 14:50:46.717697 reg 0x0000: 0x02000000
1635 14:50:46.721089 reg 0x0001: 0x00770020
1636 14:50:46.724129 reg 0x0002: 0x00000000
1637 14:50:46.727890 PCI: 00:1f.0 init finished in 21 msecs
1638 14:50:46.730732 PCI: 00:1f.2 init
1639 14:50:46.731161 Disabling ACPI via APMC.
1640 14:50:46.735710 APMC done.
1641 14:50:46.738520 PCI: 00:1f.2 init finished in 5 msecs
1642 14:50:46.750803 PCI: 01:00.0 init
1643 14:50:46.754144 PCI: 01:00.0 init finished in 0 msecs
1644 14:50:46.757335 PNP: 0c09.0 init
1645 14:50:46.760583 Google Chrome EC uptime: 8.387 seconds
1646 14:50:46.766774 Google Chrome AP resets since EC boot: 1
1647 14:50:46.770202 Google Chrome most recent AP reset causes:
1648 14:50:46.773957 0.349: 32775 shutdown: entering G3
1649 14:50:46.780444 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 14:50:46.783293 PNP: 0c09.0 init finished in 22 msecs
1651 14:50:46.789215 Devices initialized
1652 14:50:46.792674 Show all devs... After init.
1653 14:50:46.796180 Root Device: enabled 1
1654 14:50:46.796665 DOMAIN: 0000: enabled 1
1655 14:50:46.799268 CPU_CLUSTER: 0: enabled 1
1656 14:50:46.802372 PCI: 00:00.0: enabled 1
1657 14:50:46.805790 PCI: 00:02.0: enabled 1
1658 14:50:46.806214 PCI: 00:04.0: enabled 1
1659 14:50:46.808895 PCI: 00:05.0: enabled 1
1660 14:50:46.812703 PCI: 00:06.0: enabled 0
1661 14:50:46.815764 PCI: 00:07.0: enabled 0
1662 14:50:46.816329 PCI: 00:07.1: enabled 0
1663 14:50:46.819606 PCI: 00:07.2: enabled 0
1664 14:50:46.822694 PCI: 00:07.3: enabled 0
1665 14:50:46.826077 PCI: 00:08.0: enabled 1
1666 14:50:46.826597 PCI: 00:09.0: enabled 0
1667 14:50:46.829318 PCI: 00:0a.0: enabled 0
1668 14:50:46.832278 PCI: 00:0d.0: enabled 1
1669 14:50:46.835784 PCI: 00:0d.1: enabled 0
1670 14:50:46.836211 PCI: 00:0d.2: enabled 0
1671 14:50:46.838938 PCI: 00:0d.3: enabled 0
1672 14:50:46.842937 PCI: 00:0e.0: enabled 0
1673 14:50:46.843403 PCI: 00:10.2: enabled 1
1674 14:50:46.845951 PCI: 00:10.6: enabled 0
1675 14:50:46.848870 PCI: 00:10.7: enabled 0
1676 14:50:46.852505 PCI: 00:12.0: enabled 0
1677 14:50:46.852927 PCI: 00:12.6: enabled 0
1678 14:50:46.855985 PCI: 00:13.0: enabled 0
1679 14:50:46.859075 PCI: 00:14.0: enabled 1
1680 14:50:46.862844 PCI: 00:14.1: enabled 0
1681 14:50:46.863411 PCI: 00:14.2: enabled 1
1682 14:50:46.865492 PCI: 00:14.3: enabled 1
1683 14:50:46.869035 PCI: 00:15.0: enabled 1
1684 14:50:46.872248 PCI: 00:15.1: enabled 1
1685 14:50:46.872671 PCI: 00:15.2: enabled 1
1686 14:50:46.875832 PCI: 00:15.3: enabled 1
1687 14:50:46.880110 PCI: 00:16.0: enabled 1
1688 14:50:46.880631 PCI: 00:16.1: enabled 0
1689 14:50:46.882032 PCI: 00:16.2: enabled 0
1690 14:50:46.885381 PCI: 00:16.3: enabled 0
1691 14:50:46.889155 PCI: 00:16.4: enabled 0
1692 14:50:46.889713 PCI: 00:16.5: enabled 0
1693 14:50:46.892083 PCI: 00:17.0: enabled 0
1694 14:50:46.895561 PCI: 00:19.0: enabled 0
1695 14:50:46.898817 PCI: 00:19.1: enabled 1
1696 14:50:46.899374 PCI: 00:19.2: enabled 0
1697 14:50:46.902201 PCI: 00:1c.0: enabled 1
1698 14:50:46.905373 PCI: 00:1c.1: enabled 0
1699 14:50:46.908879 PCI: 00:1c.2: enabled 0
1700 14:50:46.909301 PCI: 00:1c.3: enabled 0
1701 14:50:46.912304 PCI: 00:1c.4: enabled 0
1702 14:50:46.915630 PCI: 00:1c.5: enabled 0
1703 14:50:46.918638 PCI: 00:1c.6: enabled 1
1704 14:50:46.919058 PCI: 00:1c.7: enabled 0
1705 14:50:46.922057 PCI: 00:1d.0: enabled 1
1706 14:50:46.925484 PCI: 00:1d.1: enabled 0
1707 14:50:46.925920 PCI: 00:1d.2: enabled 1
1708 14:50:46.928687 PCI: 00:1d.3: enabled 0
1709 14:50:46.931720 PCI: 00:1e.0: enabled 1
1710 14:50:46.935282 PCI: 00:1e.1: enabled 0
1711 14:50:46.935702 PCI: 00:1e.2: enabled 1
1712 14:50:46.938538 PCI: 00:1e.3: enabled 1
1713 14:50:46.941947 PCI: 00:1f.0: enabled 1
1714 14:50:46.945848 PCI: 00:1f.1: enabled 0
1715 14:50:46.946415 PCI: 00:1f.2: enabled 1
1716 14:50:46.948487 PCI: 00:1f.3: enabled 1
1717 14:50:46.952234 PCI: 00:1f.4: enabled 0
1718 14:50:46.955437 PCI: 00:1f.5: enabled 1
1719 14:50:46.955879 PCI: 00:1f.6: enabled 0
1720 14:50:46.958921 PCI: 00:1f.7: enabled 0
1721 14:50:46.962020 APIC: 00: enabled 1
1722 14:50:46.962459 GENERIC: 0.0: enabled 1
1723 14:50:46.965308 GENERIC: 0.0: enabled 1
1724 14:50:46.968399 GENERIC: 1.0: enabled 1
1725 14:50:46.972076 GENERIC: 0.0: enabled 1
1726 14:50:46.972516 GENERIC: 1.0: enabled 1
1727 14:50:46.975072 USB0 port 0: enabled 1
1728 14:50:46.978695 GENERIC: 0.0: enabled 1
1729 14:50:46.979133 USB0 port 0: enabled 1
1730 14:50:46.982211 GENERIC: 0.0: enabled 1
1731 14:50:46.985040 I2C: 00:1a: enabled 1
1732 14:50:46.988589 I2C: 00:31: enabled 1
1733 14:50:46.989013 I2C: 00:32: enabled 1
1734 14:50:46.991699 I2C: 00:10: enabled 1
1735 14:50:46.995208 I2C: 00:15: enabled 1
1736 14:50:46.995733 GENERIC: 0.0: enabled 0
1737 14:50:46.998463 GENERIC: 1.0: enabled 0
1738 14:50:47.002208 GENERIC: 0.0: enabled 1
1739 14:50:47.002679 SPI: 00: enabled 1
1740 14:50:47.005395 SPI: 00: enabled 1
1741 14:50:47.008976 PNP: 0c09.0: enabled 1
1742 14:50:47.009399 GENERIC: 0.0: enabled 1
1743 14:50:47.011580 USB3 port 0: enabled 1
1744 14:50:47.015148 USB3 port 1: enabled 1
1745 14:50:47.015706 USB3 port 2: enabled 0
1746 14:50:47.018329 USB3 port 3: enabled 0
1747 14:50:47.021654 USB2 port 0: enabled 0
1748 14:50:47.025170 USB2 port 1: enabled 1
1749 14:50:47.025592 USB2 port 2: enabled 1
1750 14:50:47.028765 USB2 port 3: enabled 0
1751 14:50:47.031806 USB2 port 4: enabled 1
1752 14:50:47.032226 USB2 port 5: enabled 0
1753 14:50:47.035124 USB2 port 6: enabled 0
1754 14:50:47.038626 USB2 port 7: enabled 0
1755 14:50:47.042009 USB2 port 8: enabled 0
1756 14:50:47.042428 USB2 port 9: enabled 0
1757 14:50:47.044839 USB3 port 0: enabled 0
1758 14:50:47.049070 USB3 port 1: enabled 1
1759 14:50:47.049596 USB3 port 2: enabled 0
1760 14:50:47.051521 USB3 port 3: enabled 0
1761 14:50:47.054871 GENERIC: 0.0: enabled 1
1762 14:50:47.058112 GENERIC: 1.0: enabled 1
1763 14:50:47.058528 APIC: 01: enabled 1
1764 14:50:47.061548 APIC: 03: enabled 1
1765 14:50:47.061967 APIC: 05: enabled 1
1766 14:50:47.065113 APIC: 07: enabled 1
1767 14:50:47.068413 APIC: 06: enabled 1
1768 14:50:47.068834 APIC: 02: enabled 1
1769 14:50:47.071486 APIC: 04: enabled 1
1770 14:50:47.074898 PCI: 01:00.0: enabled 1
1771 14:50:47.078412 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1772 14:50:47.084988 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 14:50:47.088144 ELOG: NV offset 0xf30000 size 0x1000
1774 14:50:47.094907 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 14:50:47.101500 ELOG: Event(17) added with size 13 at 2023-05-03 14:50:47 UTC
1776 14:50:47.108744 ELOG: Event(92) added with size 9 at 2023-05-03 14:50:47 UTC
1777 14:50:47.114626 ELOG: Event(93) added with size 9 at 2023-05-03 14:50:47 UTC
1778 14:50:47.121253 ELOG: Event(9E) added with size 10 at 2023-05-03 14:50:47 UTC
1779 14:50:47.128150 ELOG: Event(9F) added with size 14 at 2023-05-03 14:50:47 UTC
1780 14:50:47.131448 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 14:50:47.137812 ELOG: Event(A1) added with size 10 at 2023-05-03 14:50:47 UTC
1782 14:50:47.144666 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 14:50:47.151168 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 14:50:47.154589 Finalize devices...
1785 14:50:47.155327 Devices finalized
1786 14:50:47.161328 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 14:50:47.164620 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 14:50:47.171162 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 14:50:47.174570 ME: HFSTS1 : 0x80030055
1790 14:50:47.181162 ME: HFSTS2 : 0x30280116
1791 14:50:47.184703 ME: HFSTS3 : 0x00000050
1792 14:50:47.191306 ME: HFSTS4 : 0x00004000
1793 14:50:47.194745 ME: HFSTS5 : 0x00000000
1794 14:50:47.197768 ME: HFSTS6 : 0x00400006
1795 14:50:47.201077 ME: Manufacturing Mode : YES
1796 14:50:47.207460 ME: SPI Protection Mode Enabled : NO
1797 14:50:47.210966 ME: FW Partition Table : OK
1798 14:50:47.214144 ME: Bringup Loader Failure : NO
1799 14:50:47.217818 ME: Firmware Init Complete : NO
1800 14:50:47.221152 ME: Boot Options Present : NO
1801 14:50:47.224269 ME: Update In Progress : NO
1802 14:50:47.227410 ME: D0i3 Support : YES
1803 14:50:47.231013 ME: Low Power State Enabled : NO
1804 14:50:47.237611 ME: CPU Replaced : YES
1805 14:50:47.241099 ME: CPU Replacement Valid : YES
1806 14:50:47.244075 ME: Current Working State : 5
1807 14:50:47.247614 ME: Current Operation State : 1
1808 14:50:47.250981 ME: Current Operation Mode : 3
1809 14:50:47.254310 ME: Error Code : 0
1810 14:50:47.257624 ME: Enhanced Debug Mode : NO
1811 14:50:47.260874 ME: CPU Debug Disabled : YES
1812 14:50:47.264063 ME: TXT Support : NO
1813 14:50:47.270980 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 14:50:47.280783 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 14:50:47.284093 CBFS: 'fallback/slic' not found.
1816 14:50:47.287356 ACPI: Writing ACPI tables at 76b01000.
1817 14:50:47.287784 ACPI: * FACS
1818 14:50:47.290603 ACPI: * DSDT
1819 14:50:47.294094 Ramoops buffer: 0x100000@0x76a00000.
1820 14:50:47.296948 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 14:50:47.304470 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 14:50:47.307422 Google Chrome EC: version:
1823 14:50:47.310685 ro: voema_v2.0.7540-147f8d37d1
1824 14:50:47.313981 rw: voema_v2.0.7540-147f8d37d1
1825 14:50:47.314531 running image: 2
1826 14:50:47.320548 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 14:50:47.325715 ACPI: * FADT
1828 14:50:47.326263 SCI is IRQ9
1829 14:50:47.332306 ACPI: added table 1/32, length now 40
1830 14:50:47.332850 ACPI: * SSDT
1831 14:50:47.335611 Found 1 CPU(s) with 8 core(s) each.
1832 14:50:47.341950 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 14:50:47.345603 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 14:50:47.348834 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 14:50:47.352296 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 14:50:47.358748 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 14:50:47.365452 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 14:50:47.368467 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 14:50:47.375276 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 14:50:47.382243 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 14:50:47.385440 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 14:50:47.391880 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 14:50:47.395239 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 14:50:47.402087 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 14:50:47.405529 PS2K: Passing 80 keymaps to kernel
1846 14:50:47.411804 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 14:50:47.418454 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 14:50:47.424979 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 14:50:47.431674 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 14:50:47.438290 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 14:50:47.444824 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 14:50:47.451431 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 14:50:47.458667 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 14:50:47.461482 ACPI: added table 2/32, length now 44
1855 14:50:47.461908 ACPI: * MCFG
1856 14:50:47.468193 ACPI: added table 3/32, length now 48
1857 14:50:47.468657 ACPI: * TPM2
1858 14:50:47.471744 TPM2 log created at 0x769f0000
1859 14:50:47.474711 ACPI: added table 4/32, length now 52
1860 14:50:47.477882 ACPI: * MADT
1861 14:50:47.478306 SCI is IRQ9
1862 14:50:47.481287 ACPI: added table 5/32, length now 56
1863 14:50:47.484674 current = 76b09850
1864 14:50:47.485092 ACPI: * DMAR
1865 14:50:47.488013 ACPI: added table 6/32, length now 60
1866 14:50:47.495034 ACPI: added table 7/32, length now 64
1867 14:50:47.495575 ACPI: * HPET
1868 14:50:47.498135 ACPI: added table 8/32, length now 68
1869 14:50:47.501613 ACPI: done.
1870 14:50:47.502029 ACPI tables: 35216 bytes.
1871 14:50:47.504534 smbios_write_tables: 769ef000
1872 14:50:47.507634 EC returned error result code 3
1873 14:50:47.510848 Couldn't obtain OEM name from CBI
1874 14:50:47.515461 Create SMBIOS type 16
1875 14:50:47.518813 Create SMBIOS type 17
1876 14:50:47.522495 GENERIC: 0.0 (WIFI Device)
1877 14:50:47.522906 SMBIOS tables: 1750 bytes.
1878 14:50:47.528666 Writing table forward entry at 0x00000500
1879 14:50:47.535262 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 14:50:47.538896 Writing coreboot table at 0x76b25000
1881 14:50:47.545385 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 14:50:47.549562 1. 0000000000001000-000000000009ffff: RAM
1883 14:50:47.552181 2. 00000000000a0000-00000000000fffff: RESERVED
1884 14:50:47.558820 3. 0000000000100000-00000000769eefff: RAM
1885 14:50:47.562127 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 14:50:47.568521 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 14:50:47.575425 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 14:50:47.578411 7. 0000000077000000-000000007fbfffff: RESERVED
1889 14:50:47.581639 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 14:50:47.588756 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 14:50:47.591738 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 14:50:47.598485 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 14:50:47.601852 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 14:50:47.608851 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 14:50:47.611805 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 14:50:47.618674 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 14:50:47.621708 16. 0000000100000000-00000002803fffff: RAM
1898 14:50:47.625170 Passing 4 GPIOs to payload:
1899 14:50:47.628443 NAME | PORT | POLARITY | VALUE
1900 14:50:47.635003 lid | undefined | high | high
1901 14:50:47.638420 power | undefined | high | low
1902 14:50:47.645021 oprom | undefined | high | low
1903 14:50:47.651631 EC in RW | 0x000000e5 | high | high
1904 14:50:47.658417 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 3016
1905 14:50:47.658835 coreboot table: 1576 bytes.
1906 14:50:47.664672 IMD ROOT 0. 0x76fff000 0x00001000
1907 14:50:47.668373 IMD SMALL 1. 0x76ffe000 0x00001000
1908 14:50:47.671569 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 14:50:47.675044 VPD 3. 0x76c4d000 0x00000367
1910 14:50:47.678700 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 14:50:47.681345 CONSOLE 5. 0x76c2c000 0x00020000
1912 14:50:47.684698 FMAP 6. 0x76c2b000 0x00000578
1913 14:50:47.688445 TIME STAMP 7. 0x76c2a000 0x00000910
1914 14:50:47.691452 VBOOT WORK 8. 0x76c16000 0x00014000
1915 14:50:47.698447 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 14:50:47.701406 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 14:50:47.705237 RAMSTAGE 11. 0x76b97000 0x00073000
1918 14:50:47.708288 REFCODE 12. 0x76b42000 0x00055000
1919 14:50:47.711480 SMM BACKUP 13. 0x76b32000 0x00010000
1920 14:50:47.714825 4f444749 14. 0x76b30000 0x00002000
1921 14:50:47.718392 EXT VBT15. 0x76b2d000 0x0000219f
1922 14:50:47.721981 COREBOOT 16. 0x76b25000 0x00008000
1923 14:50:47.724923 ACPI 17. 0x76b01000 0x00024000
1924 14:50:47.731496 ACPI GNVS 18. 0x76b00000 0x00001000
1925 14:50:47.735008 RAMOOPS 19. 0x76a00000 0x00100000
1926 14:50:47.738337 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 14:50:47.741430 SMBIOS 21. 0x769ef000 0x00000800
1928 14:50:47.741849 IMD small region:
1929 14:50:47.747864 IMD ROOT 0. 0x76ffec00 0x00000400
1930 14:50:47.751730 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 14:50:47.754994 POWER STATE 2. 0x76ffeb80 0x00000044
1932 14:50:47.758271 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 14:50:47.761543 MEM INFO 4. 0x76ffe980 0x000001e0
1934 14:50:47.768586 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1935 14:50:47.771379 MTRR: Physical address space:
1936 14:50:47.777894 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 14:50:47.784647 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 14:50:47.791366 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 14:50:47.798039 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 14:50:47.801510 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 14:50:47.807952 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 14:50:47.814662 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 14:50:47.817993 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:50:47.824973 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 14:50:47.828105 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 14:50:47.831215 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 14:50:47.834392 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 14:50:47.841514 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 14:50:47.844427 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 14:50:47.847894 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 14:50:47.850978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 14:50:47.857567 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 14:50:47.861118 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 14:50:47.864227 call enable_fixed_mtrr()
1955 14:50:47.867609 CPU physical address size: 39 bits
1956 14:50:47.871223 MTRR: default type WB/UC MTRR counts: 6/6.
1957 14:50:47.874281 MTRR: UC selected as default type.
1958 14:50:47.880917 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 14:50:47.887408 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 14:50:47.894309 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 14:50:47.901176 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 14:50:47.907703 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 14:50:47.913996 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 14:50:47.914300
1965 14:50:47.914542 MTRR check
1966 14:50:47.917580 Fixed MTRRs : Enabled
1967 14:50:47.920824 Variable MTRRs: Enabled
1968 14:50:47.921159
1969 14:50:47.923923 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 14:50:47.927448 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 14:50:47.934051 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 14:50:47.937660 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 14:50:47.940480 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 14:50:47.943853 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 14:50:47.950878 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 14:50:47.953935 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 14:50:47.957505 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 14:50:47.961016 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 14:50:47.967105 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 14:50:47.973760 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1981 14:50:47.974201 call enable_fixed_mtrr()
1982 14:50:47.977217 Checking cr50 for pending updates
1983 14:50:47.981427 CPU physical address size: 39 bits
1984 14:50:47.987370 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 14:50:47.990629 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 14:50:47.993951 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 14:50:47.997873 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 14:50:48.004300 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 14:50:48.007231 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 14:50:48.010664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 14:50:48.013897 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 14:50:48.020590 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 14:50:48.023787 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 14:50:48.027367 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 14:50:48.030418 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 14:50:48.037974 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 14:50:48.038277 call enable_fixed_mtrr()
1998 14:50:48.044686 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 14:50:48.047469 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 14:50:48.051025 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 14:50:48.054440 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 14:50:48.061148 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 14:50:48.064568 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 14:50:48.067696 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 14:50:48.070876 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 14:50:48.077628 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 14:50:48.081331 CPU physical address size: 39 bits
2008 14:50:48.084661 call enable_fixed_mtrr()
2009 14:50:48.087760 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 14:50:48.090805 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 14:50:48.097465 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 14:50:48.100817 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 14:50:48.104620 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 14:50:48.107383 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 14:50:48.113998 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 14:50:48.117549 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 14:50:48.120752 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 14:50:48.124015 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 14:50:48.130356 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 14:50:48.133983 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 14:50:48.136982 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 14:50:48.140524 call enable_fixed_mtrr()
2023 14:50:48.143547 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 14:50:48.150346 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 14:50:48.153746 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 14:50:48.156774 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 14:50:48.159924 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 14:50:48.167017 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 14:50:48.170043 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 14:50:48.173503 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 14:50:48.176723 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 14:50:48.180791 CPU physical address size: 39 bits
2033 14:50:48.187937 call enable_fixed_mtrr()
2034 14:50:48.188418 Reading cr50 TPM mode
2035 14:50:48.192492 CPU physical address size: 39 bits
2036 14:50:48.195512 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 14:50:48.198951 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 14:50:48.205886 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 14:50:48.208834 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 14:50:48.212145 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 14:50:48.215772 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 14:50:48.222740 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 14:50:48.225452 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 14:50:48.228798 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 14:50:48.232406 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 14:50:48.235548 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 14:50:48.242141 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 14:50:48.245243 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 14:50:48.248574 call enable_fixed_mtrr()
2050 14:50:48.252805 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 14:50:48.255593 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 14:50:48.262083 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 14:50:48.265505 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 14:50:48.268661 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 14:50:48.272135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 14:50:48.278677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 14:50:48.282352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 14:50:48.285748 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 14:50:48.288859 CPU physical address size: 39 bits
2060 14:50:48.295317 call enable_fixed_mtrr()
2061 14:50:48.298890 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2062 14:50:48.302240 CPU physical address size: 39 bits
2063 14:50:48.308773 CPU physical address size: 39 bits
2064 14:50:48.315156 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 14:50:48.318523 Checking segment from ROM address 0xffc02b38
2066 14:50:48.321863 Checking segment from ROM address 0xffc02b54
2067 14:50:48.329500 Loading segment from ROM address 0xffc02b38
2068 14:50:48.331694 code (compression=0)
2069 14:50:48.338730 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 14:50:48.348711 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 14:50:48.349173 it's not compressed!
2072 14:50:48.488405 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 14:50:48.495118 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 14:50:48.501549 Loading segment from ROM address 0xffc02b54
2075 14:50:48.501980 Entry Point 0x30000000
2076 14:50:48.505479 Loaded segments
2077 14:50:48.511560 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2078 14:50:48.554643 Finalizing chipset.
2079 14:50:48.558069 Finalizing SMM.
2080 14:50:48.558498 APMC done.
2081 14:50:48.564555 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 14:50:48.567843 mp_park_aps done after 0 msecs.
2083 14:50:48.571264 Jumping to boot code at 0x30000000(0x76b25000)
2084 14:50:48.581210 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 14:50:48.581642
2086 14:50:48.581980
2087 14:50:48.582302
2088 14:50:48.584297 Starting depthcharge on Voema...
2089 14:50:48.584723
2090 14:50:48.585785 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 14:50:48.586289 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 14:50:48.586714 Setting prompt string to ['volteer:']
2093 14:50:48.587109 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 14:50:48.594485 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 14:50:48.594918
2096 14:50:48.600792 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 14:50:48.601224
2098 14:50:48.604604 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 14:50:48.607665
2100 14:50:48.611308 Failed to find eMMC card reader
2101 14:50:48.611835
2102 14:50:48.612180 Wipe memory regions:
2103 14:50:48.612505
2104 14:50:48.617708 [0x00000000001000, 0x000000000a0000)
2105 14:50:48.618139
2106 14:50:48.621184 [0x00000000100000, 0x00000030000000)
2107 14:50:48.646546
2108 14:50:48.649252 [0x00000032662db0, 0x000000769ef000)
2109 14:50:48.685238
2110 14:50:48.688442 [0x00000100000000, 0x00000280400000)
2111 14:50:48.888133
2112 14:50:48.891337 ec_init: CrosEC protocol v3 supported (256, 256)
2113 14:50:48.891829
2114 14:50:48.898352 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 14:50:48.898892
2116 14:50:48.908091 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 14:50:48.908581
2118 14:50:48.914319 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2119 14:50:48.914764
2120 14:50:48.917606 send_conn_disc_msg: pmc_send_cmd succeeded
2121 14:50:49.352030
2122 14:50:49.352588 R8152: Initializing
2123 14:50:49.352941
2124 14:50:49.354891 Version 6 (ocp_data = 5c30)
2125 14:50:49.355363
2126 14:50:49.358563 R8152: Done initializing
2127 14:50:49.359120
2128 14:50:49.361417 Adding net device
2129 14:50:49.663254
2130 14:50:49.666850 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 14:50:49.667486
2132 14:50:49.667836
2133 14:50:49.668161
2134 14:50:49.670635 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 14:50:49.771900 volteer: tftpboot 192.168.201.1 10185542/tftp-deploy-5mtewu3w/kernel/bzImage 10185542/tftp-deploy-5mtewu3w/kernel/cmdline 10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
2137 14:50:49.772476 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 14:50:49.772871 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 14:50:49.777594 tftpboot 192.168.201.1 10185542/tftp-deploy-5mtewu3w/kernel/bzIploy-5mtewu3w/kernel/cmdline 10185542/tftp-deploy-5mtewu3w/ramdisk/ramdisk.cpio.gz
2140 14:50:49.778041
2141 14:50:49.778379 Waiting for link
2142 14:50:49.981115
2143 14:50:49.981610 done.
2144 14:50:49.981954
2145 14:50:49.982357 MAC: 00:24:32:30:7d:bc
2146 14:50:49.982853
2147 14:50:49.984088 Sending DHCP discover... done.
2148 14:50:49.984515
2149 14:50:49.987275 Waiting for reply... done.
2150 14:50:49.987702
2151 14:50:49.990528 Sending DHCP request... done.
2152 14:50:49.990957
2153 14:50:49.998091 Waiting for reply... done.
2154 14:50:49.998674
2155 14:50:49.999084 My ip is 192.168.201.22
2156 14:50:49.999485
2157 14:50:50.001725 The DHCP server ip is 192.168.201.1
2158 14:50:50.004410
2159 14:50:50.007657 TFTP server IP predefined by user: 192.168.201.1
2160 14:50:50.008083
2161 14:50:50.014460 Bootfile predefined by user: 10185542/tftp-deploy-5mtewu3w/kernel/bzImage
2162 14:50:50.014967
2163 14:50:50.017562 Sending tftp read request... done.
2164 14:50:50.018214
2165 14:50:50.026304 Waiting for the transfer...
2166 14:50:50.026737
2167 14:50:50.675420 00000000 ################################################################
2168 14:50:50.675558
2169 14:50:51.277220 00080000 ################################################################
2170 14:50:51.277361
2171 14:50:51.883700 00100000 ################################################################
2172 14:50:51.883844
2173 14:50:52.490014 00180000 ################################################################
2174 14:50:52.490151
2175 14:50:53.063254 00200000 ################################################################
2176 14:50:53.063399
2177 14:50:53.620502 00280000 ################################################################
2178 14:50:53.620643
2179 14:50:54.180799 00300000 ################################################################
2180 14:50:54.180937
2181 14:50:54.704136 00380000 ################################################################
2182 14:50:54.704278
2183 14:50:55.240660 00400000 ################################################################
2184 14:50:55.240844
2185 14:50:55.785754 00480000 ################################################################
2186 14:50:55.785934
2187 14:50:56.318932 00500000 ################################################################
2188 14:50:56.319080
2189 14:50:56.857054 00580000 ################################################################
2190 14:50:56.857200
2191 14:50:57.401874 00600000 ################################################################
2192 14:50:57.402011
2193 14:50:57.937231 00680000 ################################################################
2194 14:50:57.937380
2195 14:50:58.479344 00700000 ################################################################
2196 14:50:58.479491
2197 14:50:58.492219 00780000 ## done.
2198 14:50:58.492305
2199 14:50:58.495902 The bootfile was 7876496 bytes long.
2200 14:50:58.495983
2201 14:50:58.498793 Sending tftp read request... done.
2202 14:50:58.498874
2203 14:50:58.501989 Waiting for the transfer...
2204 14:50:58.502070
2205 14:50:59.062135 00000000 ################################################################
2206 14:50:59.062283
2207 14:50:59.621737 00080000 ################################################################
2208 14:50:59.621881
2209 14:51:00.190422 00100000 ################################################################
2210 14:51:00.190571
2211 14:51:00.768075 00180000 ################################################################
2212 14:51:00.768250
2213 14:51:01.343071 00200000 ################################################################
2214 14:51:01.343282
2215 14:51:01.904436 00280000 ################################################################
2216 14:51:01.904604
2217 14:51:02.468401 00300000 ################################################################
2218 14:51:02.468554
2219 14:51:03.062176 00380000 ################################################################
2220 14:51:03.062325
2221 14:51:03.713660 00400000 ################################################################
2222 14:51:03.714156
2223 14:51:04.390325 00480000 ################################################################
2224 14:51:04.390851
2225 14:51:05.079865 00500000 ################################################################
2226 14:51:05.080381
2227 14:51:05.760647 00580000 ################################################################
2228 14:51:05.761192
2229 14:51:06.446185 00600000 ################################################################
2230 14:51:06.446783
2231 14:51:07.093411 00680000 ################################################################
2232 14:51:07.093943
2233 14:51:07.750582 00700000 ################################################################
2234 14:51:07.751107
2235 14:51:08.375332 00780000 ################################################################
2236 14:51:08.375479
2237 14:51:08.888748 00800000 ###################################################### done.
2238 14:51:08.888893
2239 14:51:08.891782 Sending tftp read request... done.
2240 14:51:08.891867
2241 14:51:08.894990 Waiting for the transfer...
2242 14:51:08.895107
2243 14:51:08.898984 00000000 # done.
2244 14:51:08.899094
2245 14:51:08.908435 Command line loaded dynamically from TFTP file: 10185542/tftp-deploy-5mtewu3w/kernel/cmdline
2246 14:51:08.908517
2247 14:51:08.919209 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 14:51:08.924688
2249 14:51:08.928137 Shutting down all USB controllers.
2250 14:51:08.928598
2251 14:51:08.929052 Removing current net device
2252 14:51:08.929459
2253 14:51:08.931459 Finalizing coreboot
2254 14:51:08.931890
2255 14:51:08.937717 Exiting depthcharge with code 4 at timestamp: 28993481
2256 14:51:08.938151
2257 14:51:08.938636
2258 14:51:08.939164 Starting kernel ...
2259 14:51:08.939604
2260 14:51:08.939997
2261 14:51:08.941544 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2262 14:51:08.942096 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2263 14:51:08.942662 Setting prompt string to ['Linux version [0-9]']
2264 14:51:08.943269 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 14:51:08.943708 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 14:55:32.943377 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2269 14:55:32.944503 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2271 14:55:32.945354 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 14:55:32.947028 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 14:55:32.948335 Cleaning after the job
2277 14:55:32.948806 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/ramdisk
2278 14:55:32.954162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/kernel
2279 14:55:32.958878 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185542/tftp-deploy-5mtewu3w/modules
2280 14:55:32.960619 start: 5.1 power-off (timeout 00:00:30) [common]
2281 14:55:32.961499 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2282 14:55:33.041128 >> Command sent successfully.
2283 14:55:33.047146 Returned 0 in 0 seconds
2284 14:55:33.148126 end: 5.1 power-off (duration 00:00:00) [common]
2286 14:55:33.149659 start: 5.2 read-feedback (timeout 00:10:00) [common]
2287 14:55:33.150875 Listened to connection for namespace 'common' for up to 1s
2288 14:55:34.151461 Finalising connection for namespace 'common'
2289 14:55:34.152125 Disconnecting from shell: Finalise
2290 14:55:34.152576
2291 14:55:34.253698 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 14:55:34.254328 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185542
2293 14:55:34.304122 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185542
2294 14:55:34.304355 JobError: Your job cannot terminate cleanly.