Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:32.483923 lava-dispatcher, installed at version: 2023.03
2 14:50:32.484154 start: 0 validate
3 14:50:32.484295 Start time: 2023-05-03 14:50:32.484285+00:00 (UTC)
4 14:50:32.484435 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:32.484579 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
6 14:50:32.777609 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:32.777819 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:33.062973 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:33.063167 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:50:35.348181 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:50:35.348387 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:50:35.636549 validate duration: 3.15
14 14:50:35.636836 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:50:35.636946 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:50:35.637042 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:50:35.637176 Not decompressing ramdisk as can be used compressed.
18 14:50:35.637271 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/initrd.cpio.gz
19 14:50:35.637361 saving as /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/ramdisk/initrd.cpio.gz
20 14:50:35.637430 total size: 5432141 (5MB)
21 14:50:36.202347 progress 0% (0MB)
22 14:50:36.204085 progress 5% (0MB)
23 14:50:36.205667 progress 10% (0MB)
24 14:50:36.207214 progress 15% (0MB)
25 14:50:36.208948 progress 20% (1MB)
26 14:50:36.210508 progress 25% (1MB)
27 14:50:36.212039 progress 30% (1MB)
28 14:50:36.213747 progress 35% (1MB)
29 14:50:36.215280 progress 40% (2MB)
30 14:50:36.216853 progress 45% (2MB)
31 14:50:36.218381 progress 50% (2MB)
32 14:50:36.220075 progress 55% (2MB)
33 14:50:36.221609 progress 60% (3MB)
34 14:50:36.223128 progress 65% (3MB)
35 14:50:36.224833 progress 70% (3MB)
36 14:50:36.226370 progress 75% (3MB)
37 14:50:36.227890 progress 80% (4MB)
38 14:50:36.229412 progress 85% (4MB)
39 14:50:36.231107 progress 90% (4MB)
40 14:50:36.232627 progress 95% (4MB)
41 14:50:36.234163 progress 100% (5MB)
42 14:50:36.234396 5MB downloaded in 0.60s (8.68MB/s)
43 14:50:36.234560 end: 1.1.1 http-download (duration 00:00:01) [common]
45 14:50:36.234823 end: 1.1 download-retry (duration 00:00:01) [common]
46 14:50:36.234919 start: 1.2 download-retry (timeout 00:09:59) [common]
47 14:50:36.235013 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 14:50:36.235159 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:50:36.235239 saving as /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/kernel/bzImage
50 14:50:36.235307 total size: 7876496 (7MB)
51 14:50:36.235374 No compression specified
52 14:50:36.236545 progress 0% (0MB)
53 14:50:36.238891 progress 5% (0MB)
54 14:50:36.241181 progress 10% (0MB)
55 14:50:36.243454 progress 15% (1MB)
56 14:50:36.245765 progress 20% (1MB)
57 14:50:36.248055 progress 25% (1MB)
58 14:50:36.250417 progress 30% (2MB)
59 14:50:36.252707 progress 35% (2MB)
60 14:50:36.254985 progress 40% (3MB)
61 14:50:36.257266 progress 45% (3MB)
62 14:50:36.259535 progress 50% (3MB)
63 14:50:36.261784 progress 55% (4MB)
64 14:50:36.264023 progress 60% (4MB)
65 14:50:36.266279 progress 65% (4MB)
66 14:50:36.268598 progress 70% (5MB)
67 14:50:36.270961 progress 75% (5MB)
68 14:50:36.273300 progress 80% (6MB)
69 14:50:36.275559 progress 85% (6MB)
70 14:50:36.277863 progress 90% (6MB)
71 14:50:36.280110 progress 95% (7MB)
72 14:50:36.282396 progress 100% (7MB)
73 14:50:36.282565 7MB downloaded in 0.05s (158.96MB/s)
74 14:50:36.282721 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:50:36.282973 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:50:36.283069 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:50:36.283164 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:50:36.283311 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/full.rootfs.tar.xz
80 14:50:36.283393 saving as /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/nfsrootfs/full.rootfs.tar
81 14:50:36.283462 total size: 133369160 (127MB)
82 14:50:36.283531 Using unxz to decompress xz
83 14:50:36.287491 progress 0% (0MB)
84 14:50:36.661552 progress 5% (6MB)
85 14:50:37.055695 progress 10% (12MB)
86 14:50:37.377150 progress 15% (19MB)
87 14:50:37.584467 progress 20% (25MB)
88 14:50:37.856291 progress 25% (31MB)
89 14:50:38.247481 progress 30% (38MB)
90 14:50:38.632029 progress 35% (44MB)
91 14:50:39.070656 progress 40% (50MB)
92 14:50:39.494352 progress 45% (57MB)
93 14:50:39.889618 progress 50% (63MB)
94 14:50:40.301118 progress 55% (69MB)
95 14:50:40.699449 progress 60% (76MB)
96 14:50:41.097558 progress 65% (82MB)
97 14:50:41.497755 progress 70% (89MB)
98 14:50:41.898646 progress 75% (95MB)
99 14:50:42.387177 progress 80% (101MB)
100 14:50:42.865553 progress 85% (108MB)
101 14:50:43.169630 progress 90% (114MB)
102 14:50:43.547786 progress 95% (120MB)
103 14:50:43.976822 progress 100% (127MB)
104 14:50:43.982118 127MB downloaded in 7.70s (16.52MB/s)
105 14:50:43.982426 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:50:43.982717 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:50:43.982818 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:50:43.982916 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:50:43.983081 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:50:43.983163 saving as /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/modules/modules.tar
112 14:50:43.983233 total size: 251268 (0MB)
113 14:50:43.983304 Using unxz to decompress xz
114 14:50:43.987740 progress 13% (0MB)
115 14:50:43.988188 progress 26% (0MB)
116 14:50:43.988485 progress 39% (0MB)
117 14:50:43.989967 progress 52% (0MB)
118 14:50:43.992106 progress 65% (0MB)
119 14:50:43.994251 progress 78% (0MB)
120 14:50:43.996363 progress 91% (0MB)
121 14:50:43.998373 progress 100% (0MB)
122 14:50:44.004721 0MB downloaded in 0.02s (11.16MB/s)
123 14:50:44.004996 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:50:44.005293 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:50:44.005402 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 14:50:44.005510 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 14:50:46.282050 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185518/extract-nfsrootfs-5xj_eavk
129 14:50:46.282268 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 14:50:46.282376 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 14:50:46.282551 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip
132 14:50:46.282692 makedir: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin
133 14:50:46.282809 makedir: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/tests
134 14:50:46.282918 makedir: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/results
135 14:50:46.283030 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-add-keys
136 14:50:46.283182 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-add-sources
137 14:50:46.283321 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-background-process-start
138 14:50:46.283460 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-background-process-stop
139 14:50:46.283596 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-common-functions
140 14:50:46.283730 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-echo-ipv4
141 14:50:46.283866 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-install-packages
142 14:50:46.283999 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-installed-packages
143 14:50:46.284132 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-os-build
144 14:50:46.284264 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-probe-channel
145 14:50:46.284404 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-probe-ip
146 14:50:46.284540 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-target-ip
147 14:50:46.284674 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-target-mac
148 14:50:46.284808 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-target-storage
149 14:50:46.284945 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-case
150 14:50:46.285080 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-event
151 14:50:46.285213 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-feedback
152 14:50:46.285346 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-raise
153 14:50:46.285478 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-reference
154 14:50:46.285609 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-runner
155 14:50:46.285748 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-set
156 14:50:46.285880 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-test-shell
157 14:50:46.286013 Updating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-install-packages (oe)
158 14:50:46.286183 Updating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/bin/lava-installed-packages (oe)
159 14:50:46.286314 Creating /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/environment
160 14:50:46.286417 LAVA metadata
161 14:50:46.286495 - LAVA_JOB_ID=10185518
162 14:50:46.286568 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:50:46.286677 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 14:50:46.286751 skipped lava-vland-overlay
165 14:50:46.286835 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:50:46.286923 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 14:50:46.286991 skipped lava-multinode-overlay
168 14:50:46.287072 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:50:46.287159 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 14:50:46.287240 Loading test definitions
171 14:50:46.287339 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 14:50:46.287417 Using /lava-10185518 at stage 0
173 14:50:46.287758 uuid=10185518_1.5.2.3.1 testdef=None
174 14:50:46.287859 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 14:50:46.287953 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 14:50:46.288499 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 14:50:46.288747 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 14:50:46.289442 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 14:50:46.289700 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 14:50:46.290372 runner path: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/0/tests/0_dmesg test_uuid 10185518_1.5.2.3.1
183 14:50:46.290541 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 14:50:46.290791 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 14:50:46.290871 Using /lava-10185518 at stage 1
187 14:50:46.291186 uuid=10185518_1.5.2.3.5 testdef=None
188 14:50:46.291284 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 14:50:46.291379 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 14:50:46.291883 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 14:50:46.292125 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 14:50:46.292825 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 14:50:46.293081 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 14:50:46.293762 runner path: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/1/tests/1_bootrr test_uuid 10185518_1.5.2.3.5
197 14:50:46.293927 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 14:50:46.294156 Creating lava-test-runner.conf files
200 14:50:46.294227 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/0 for stage 0
201 14:50:46.294324 - 0_dmesg
202 14:50:46.294410 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185518/lava-overlay-nmflbxip/lava-10185518/1 for stage 1
203 14:50:46.294511 - 1_bootrr
204 14:50:46.294614 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 14:50:46.294708 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 14:50:46.302627 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 14:50:46.302742 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 14:50:46.302837 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 14:50:46.302931 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 14:50:46.303025 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 14:50:46.447950 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 14:50:46.448344 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 14:50:46.448478 extracting modules file /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185518/extract-nfsrootfs-5xj_eavk
214 14:50:46.462735 extracting modules file /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185518/extract-overlay-ramdisk-u5mcc_jm/ramdisk
215 14:50:46.476501 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 14:50:46.476626 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 14:50:46.476725 [common] Applying overlay to NFS
218 14:50:46.476804 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185518/compress-overlay-f5mgz89i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185518/extract-nfsrootfs-5xj_eavk
219 14:50:46.485445 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 14:50:46.485566 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 14:50:46.485670 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 14:50:46.485769 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 14:50:46.485856 Building ramdisk /var/lib/lava/dispatcher/tmp/10185518/extract-overlay-ramdisk-u5mcc_jm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185518/extract-overlay-ramdisk-u5mcc_jm/ramdisk
224 14:50:46.561430 >> 26161 blocks
225 14:50:47.154511 rename /var/lib/lava/dispatcher/tmp/10185518/extract-overlay-ramdisk-u5mcc_jm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
226 14:50:47.154976 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 14:50:47.155113 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 14:50:47.155225 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 14:50:47.155329 No mkimage arch provided, not using FIT.
230 14:50:47.155428 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 14:50:47.155531 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 14:50:47.155695 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 14:50:47.155832 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 14:50:47.155927 No LXC device requested
235 14:50:47.156019 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 14:50:47.156123 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 14:50:47.156213 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 14:50:47.156290 Checking files for TFTP limit of 4294967296 bytes.
239 14:50:47.156734 end: 1 tftp-deploy (duration 00:00:12) [common]
240 14:50:47.156853 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 14:50:47.156954 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 14:50:47.157090 substitutions:
243 14:50:47.157165 - {DTB}: None
244 14:50:47.157235 - {INITRD}: 10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
245 14:50:47.157301 - {KERNEL}: 10185518/tftp-deploy-3djbd5bw/kernel/bzImage
246 14:50:47.157366 - {LAVA_MAC}: None
247 14:50:47.157429 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185518/extract-nfsrootfs-5xj_eavk
248 14:50:47.157494 - {NFS_SERVER_IP}: 192.168.201.1
249 14:50:47.157556 - {PRESEED_CONFIG}: None
250 14:50:47.157618 - {PRESEED_LOCAL}: None
251 14:50:47.157678 - {RAMDISK}: 10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
252 14:50:47.157740 - {ROOT_PART}: None
253 14:50:47.157801 - {ROOT}: None
254 14:50:47.157862 - {SERVER_IP}: 192.168.201.1
255 14:50:47.157922 - {TEE}: None
256 14:50:47.157982 Parsed boot commands:
257 14:50:47.158043 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 14:50:47.158232 Parsed boot commands: tftpboot 192.168.201.1 10185518/tftp-deploy-3djbd5bw/kernel/bzImage 10185518/tftp-deploy-3djbd5bw/kernel/cmdline 10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
259 14:50:47.158330 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 14:50:47.158421 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 14:50:47.158519 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 14:50:47.158614 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 14:50:47.158692 Not connected, no need to disconnect.
264 14:50:47.158772 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 14:50:47.158862 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 14:50:47.158934 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-4'
267 14:50:47.162590 Setting prompt string to ['lava-test: # ']
268 14:50:47.162959 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 14:50:47.163077 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 14:50:47.163181 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 14:50:47.163281 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 14:50:47.163487 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=reboot'
273 14:50:52.300295 >> Command sent successfully.
274 14:50:52.303002 Returned 0 in 5 seconds
275 14:50:52.403419 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 14:50:52.403781 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 14:50:52.403912 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 14:50:52.404065 Setting prompt string to 'Starting depthcharge on Magolor...'
280 14:50:52.404179 Changing prompt to 'Starting depthcharge on Magolor...'
281 14:50:52.404305 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 14:50:52.404629 [Enter `^Ec?' for help]
283 14:50:53.548197
284 14:50:53.548379
285 14:50:53.555644 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 14:50:53.563010 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 14:50:53.566610 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 14:50:53.570156 CPU: AES supported, TXT NOT supported, VT supported
289 14:50:53.576544 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 14:50:53.579957 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 14:50:53.586312 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 14:50:53.589723 VBOOT: Loading verstage.
293 14:50:53.592942 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 14:50:53.599943 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 14:50:53.603712 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 14:50:53.610302 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 14:50:53.610460
298 14:50:53.610598
299 14:50:53.621123 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 14:50:53.636143 Probing TPM: . done!
301 14:50:53.640149 TPM ready after 0 ms
302 14:50:53.643792 Connected to device vid:did:rid of 1ae0:0028:00
303 14:50:53.654322 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
304 14:50:53.661031 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 14:50:53.664810 Initialized TPM device CR50 revision 0
306 14:50:53.720418 tlcl_send_startup: Startup return code is 0
307 14:50:53.720663 TPM: setup succeeded
308 14:50:53.735943 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 14:50:53.749322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 14:50:53.761877 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 14:50:53.772131 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 14:50:53.775880 Chrome EC: UHEPI supported
313 14:50:53.776044 Phase 1
314 14:50:53.783227 FMAP: area GBB found @ c05000 (12288 bytes)
315 14:50:53.789851 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 14:50:53.796199 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 14:50:53.799801 Recovery requested (1009000e)
318 14:50:53.803256 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 14:50:53.814804 tlcl_extend: response is 0
320 14:50:53.827690 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 14:50:53.834204 tlcl_extend: response is 0
322 14:50:53.842229 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 14:50:53.845913 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 14:50:53.849784 BS: verstage times (exec / console): total (unknown) / 125 ms
325 14:50:53.854208
326 14:50:53.854321
327 14:50:53.861333 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 14:50:53.869475 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 14:50:53.873221 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 14:50:53.879588 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 14:50:53.883260 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 14:50:53.886462 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 14:50:53.890163 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
334 14:50:53.893222 TCO_STS: 0000 0001
335 14:50:53.896411 GEN_PMCON: d0015038 00002200
336 14:50:53.899698 GBLRST_CAUSE: 00000000 00000000
337 14:50:53.903002 prev_sleep_state 5
338 14:50:53.906375 Boot Count incremented to 10236
339 14:50:53.909917 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 14:50:53.916640 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 14:50:53.920902 Chrome EC: UHEPI supported
342 14:50:53.926341 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 14:50:53.931824 Probing TPM: done!
344 14:50:53.939060 Connected to device vid:did:rid of 1ae0:0028:00
345 14:50:53.949348 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
346 14:50:53.956771 Initialized TPM device CR50 revision 0
347 14:50:53.967435 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 14:50:53.971105 MRC: Hash idx 0x100b comparison successful.
349 14:50:53.974724 MRC cache found, size 5458
350 14:50:53.977638 bootmode is set to: 2
351 14:50:53.982093 SPD INDEX = 0
352 14:50:53.985397 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 14:50:53.985497 SPD: module type is LPDDR4X
354 14:50:53.992676 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 14:50:53.998978 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 14:50:54.002291 SPD: device width 16 bits, bus width 32 bits
357 14:50:54.005361 SPD: module size is 4096 MB (per channel)
358 14:50:54.012005 meminit_channels: DRAM half-populated
359 14:50:54.093279 CBMEM:
360 14:50:54.096357 IMD: root @ 0x76fff000 254 entries.
361 14:50:54.099959 IMD: root @ 0x76ffec00 62 entries.
362 14:50:54.103010 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 14:50:54.109917 WARNING: RO_VPD is uninitialized or empty.
364 14:50:54.112858 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 14:50:54.117286 External stage cache:
366 14:50:54.120491 IMD: root @ 0x7b3ff000 254 entries.
367 14:50:54.123647 IMD: root @ 0x7b3fec00 62 entries.
368 14:50:54.133208 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 14:50:54.140762 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 14:50:54.146935 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 14:50:54.155328 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 14:50:54.161592 cse_lite: Skip switching to RW in the recovery path
373 14:50:54.161743 1 DIMMs found
374 14:50:54.161886 SMM Memory Map
375 14:50:54.164812 SMRAM : 0x7b000000 0x800000
376 14:50:54.171384 Subregion 0: 0x7b000000 0x200000
377 14:50:54.175271 Subregion 1: 0x7b200000 0x200000
378 14:50:54.178552 Subregion 2: 0x7b400000 0x400000
379 14:50:54.178697 top_of_ram = 0x77000000
380 14:50:54.185028 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 14:50:54.192239 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 14:50:54.194920 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 14:50:54.202346 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 14:50:54.208387 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 14:50:54.218787 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 14:50:54.221644 Processing 188 relocs. Offset value of 0x74c0e000
387 14:50:54.230993 BS: romstage times (exec / console): total (unknown) / 257 ms
388 14:50:54.236015
389 14:50:54.236143
390 14:50:54.245285 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 14:50:54.252108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 14:50:54.255287 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 14:50:54.261861 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 14:50:54.318056 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 14:50:54.324824 Processing 4805 relocs. Offset value of 0x75da8000
396 14:50:54.327908 BS: postcar times (exec / console): total (unknown) / 43 ms
397 14:50:54.331805
398 14:50:54.331930
399 14:50:54.341372 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 14:50:54.341472 Normal boot
401 14:50:54.345223 EC returned error result code 3
402 14:50:54.348766 FW_CONFIG value is 0x204
403 14:50:54.351718 GENERIC: 0.0 disabled by fw_config
404 14:50:54.358596 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 14:50:54.361864 I2C: 00:10 disabled by fw_config
406 14:50:54.365613 I2C: 00:10 disabled by fw_config
407 14:50:54.368447 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 14:50:54.376043 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 14:50:54.379004 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 14:50:54.385225 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 14:50:54.388651 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 14:50:54.392623 I2C: 00:10 disabled by fw_config
413 14:50:54.398535 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 14:50:54.405121 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 14:50:54.409177 I2C: 00:1a disabled by fw_config
416 14:50:54.411883 I2C: 00:1a disabled by fw_config
417 14:50:54.418463 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 14:50:54.421888 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 14:50:54.425127 GENERIC: 0.0 disabled by fw_config
420 14:50:54.431839 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 14:50:54.435590 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 14:50:54.441901 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 14:50:54.445455 microcode: Update skipped, already up-to-date
424 14:50:54.452168 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 14:50:54.478100 Detected 2 core, 2 thread CPU.
426 14:50:54.481335 Setting up SMI for CPU
427 14:50:54.484548 IED base = 0x7b400000
428 14:50:54.484644 IED size = 0x00400000
429 14:50:54.488151 Will perform SMM setup.
430 14:50:54.491317 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 14:50:54.501225 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 14:50:54.504784 Processing 16 relocs. Offset value of 0x00030000
433 14:50:54.508734 Attempting to start 1 APs
434 14:50:54.511445 Waiting for 10ms after sending INIT.
435 14:50:54.528009 Waiting for 1st SIPI to complete...done.
436 14:50:54.531734 Waiting for 2nd SIPI to complete...done.
437 14:50:54.534789 AP: slot 1 apic_id 2.
438 14:50:54.541462 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 14:50:54.547771 Processing 13 relocs. Offset value of 0x00038000
440 14:50:54.547868 Unable to locate Global NVS
441 14:50:54.558371 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 14:50:54.561558 Installing permanent SMM handler to 0x7b000000
443 14:50:54.571682 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 14:50:54.574872 Processing 704 relocs. Offset value of 0x7b010000
445 14:50:54.584333 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 14:50:54.588032 Processing 13 relocs. Offset value of 0x7b008000
447 14:50:54.594340 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 14:50:54.598095 Unable to locate Global NVS
449 14:50:54.604720 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 14:50:54.608421 Clearing SMI status registers
451 14:50:54.608516 SMI_STS: PM1
452 14:50:54.611127 PM1_STS: PWRBTN
453 14:50:54.614573 TCO_STS: INTRD_DET
454 14:50:54.614669 GPE0 STD STS:
455 14:50:54.621132 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 14:50:54.624090 In relocation handler: CPU 0
457 14:50:54.627856 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 14:50:54.634688 Writing SMRR. base = 0x7b000006, mask=0xff800800
459 14:50:54.634785 Relocation complete.
460 14:50:54.644758 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 14:50:54.644854 In relocation handler: CPU 1
462 14:50:54.648862 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 14:50:54.655859 Writing SMRR. base = 0x7b000006, mask=0xff800800
464 14:50:54.655956 Relocation complete.
465 14:50:54.659171 Initializing CPU #0
466 14:50:54.662646 CPU: vendor Intel device 906c0
467 14:50:54.665512 CPU: family 06, model 9c, stepping 00
468 14:50:54.669474 Clearing out pending MCEs
469 14:50:54.672442 Setting up local APIC...
470 14:50:54.672538 apic_id: 0x00 done.
471 14:50:54.675586 Turbo is available but hidden
472 14:50:54.679051 Turbo is available and visible
473 14:50:54.685570 microcode: Update skipped, already up-to-date
474 14:50:54.685666 CPU #0 initialized
475 14:50:54.689339 Initializing CPU #1
476 14:50:54.692468 CPU: vendor Intel device 906c0
477 14:50:54.695832 CPU: family 06, model 9c, stepping 00
478 14:50:54.698963 Clearing out pending MCEs
479 14:50:54.702708 Setting up local APIC...
480 14:50:54.702805 apic_id: 0x02 done.
481 14:50:54.709073 microcode: Update skipped, already up-to-date
482 14:50:54.709170 CPU #1 initialized
483 14:50:54.715722 bsp_do_flight_plan done after 178 msecs.
484 14:50:54.715818 CPU: frequency set to 2800 MHz
485 14:50:54.719233 Enabling SMIs.
486 14:50:54.725825 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 290 ms
487 14:50:54.735410 Probing TPM: done!
488 14:50:54.741558 Connected to device vid:did:rid of 1ae0:0028:00
489 14:50:54.752288 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
490 14:50:54.755333 Initialized TPM device CR50 revision 0
491 14:50:54.758546 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
492 14:50:54.766031 Found a VBT of 7680 bytes after decompression
493 14:50:54.772502 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
494 14:50:54.807134 Detected 2 core, 2 thread CPU.
495 14:50:54.810778 Detected 2 core, 2 thread CPU.
496 14:50:55.173573 Display FSP Version Info HOB
497 14:50:55.176740 Reference Code - CPU = 8.7.22.30
498 14:50:55.180097 uCode Version = 24.0.0.1f
499 14:50:55.183411 TXT ACM version = ff.ff.ff.ffff
500 14:50:55.186532 Reference Code - ME = 8.7.22.30
501 14:50:55.190298 MEBx version = 0.0.0.0
502 14:50:55.192951 ME Firmware Version = Consumer SKU
503 14:50:55.196542 Reference Code - PCH = 8.7.22.30
504 14:50:55.199656 PCH-CRID Status = Disabled
505 14:50:55.203066 PCH-CRID Original Value = ff.ff.ff.ffff
506 14:50:55.206522 PCH-CRID New Value = ff.ff.ff.ffff
507 14:50:55.209587 OPROM - RST - RAID = ff.ff.ff.ffff
508 14:50:55.213320 PCH Hsio Version = 4.0.0.0
509 14:50:55.216670 Reference Code - SA - System Agent = 8.7.22.30
510 14:50:55.219984 Reference Code - MRC = 0.0.4.68
511 14:50:55.222913 SA - PCIe Version = 8.7.22.30
512 14:50:55.226800 SA-CRID Status = Disabled
513 14:50:55.230299 SA-CRID Original Value = 0.0.0.0
514 14:50:55.234225 SA-CRID New Value = 0.0.0.0
515 14:50:55.234320 OPROM - VBIOS = ff.ff.ff.ffff
516 14:50:55.240911 IO Manageability Engine FW Version = ff.ff.ff.ffff
517 14:50:55.244556 PHY Build Version = ff.ff.ff.ffff
518 14:50:55.248364 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
519 14:50:55.255503 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
520 14:50:55.258835 ITSS IRQ Polarities Before:
521 14:50:55.258930 IPC0: 0xffffffff
522 14:50:55.261606 IPC1: 0xffffffff
523 14:50:55.261701 IPC2: 0xffffffff
524 14:50:55.265438 IPC3: 0xffffffff
525 14:50:55.268613 ITSS IRQ Polarities After:
526 14:50:55.268709 IPC0: 0xffffffff
527 14:50:55.271960 IPC1: 0xffffffff
528 14:50:55.272054 IPC2: 0xffffffff
529 14:50:55.275591 IPC3: 0xffffffff
530 14:50:55.285080 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
531 14:50:55.291899 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 157 ms
532 14:50:55.294921 Enumerating buses...
533 14:50:55.298446 Show all devs... Before device enumeration.
534 14:50:55.301623 Root Device: enabled 1
535 14:50:55.304902 CPU_CLUSTER: 0: enabled 1
536 14:50:55.304998 DOMAIN: 0000: enabled 1
537 14:50:55.308516 PCI: 00:00.0: enabled 1
538 14:50:55.311656 PCI: 00:02.0: enabled 1
539 14:50:55.315377 PCI: 00:04.0: enabled 1
540 14:50:55.315472 PCI: 00:05.0: enabled 1
541 14:50:55.318528 PCI: 00:09.0: enabled 0
542 14:50:55.321902 PCI: 00:12.6: enabled 0
543 14:50:55.325121 PCI: 00:14.0: enabled 1
544 14:50:55.325217 PCI: 00:14.1: enabled 0
545 14:50:55.328265 PCI: 00:14.2: enabled 0
546 14:50:55.331543 PCI: 00:14.3: enabled 1
547 14:50:55.334787 PCI: 00:14.5: enabled 1
548 14:50:55.334882 PCI: 00:15.0: enabled 1
549 14:50:55.338835 PCI: 00:15.1: enabled 1
550 14:50:55.341976 PCI: 00:15.2: enabled 1
551 14:50:55.342072 PCI: 00:15.3: enabled 1
552 14:50:55.345003 PCI: 00:16.0: enabled 1
553 14:50:55.349059 PCI: 00:16.1: enabled 0
554 14:50:55.351839 PCI: 00:16.4: enabled 0
555 14:50:55.351935 PCI: 00:16.5: enabled 0
556 14:50:55.355128 PCI: 00:17.0: enabled 0
557 14:50:55.358488 PCI: 00:19.0: enabled 1
558 14:50:55.361624 PCI: 00:19.1: enabled 0
559 14:50:55.361720 PCI: 00:19.2: enabled 1
560 14:50:55.365142 PCI: 00:1a.0: enabled 1
561 14:50:55.368434 PCI: 00:1c.0: enabled 0
562 14:50:55.371835 PCI: 00:1c.1: enabled 0
563 14:50:55.371940 PCI: 00:1c.2: enabled 0
564 14:50:55.375431 PCI: 00:1c.3: enabled 0
565 14:50:55.378626 PCI: 00:1c.4: enabled 0
566 14:50:55.378721 PCI: 00:1c.5: enabled 0
567 14:50:55.381773 PCI: 00:1c.6: enabled 0
568 14:50:55.385131 PCI: 00:1c.7: enabled 1
569 14:50:55.388470 PCI: 00:1e.0: enabled 0
570 14:50:55.388566 PCI: 00:1e.1: enabled 0
571 14:50:55.391558 PCI: 00:1e.2: enabled 1
572 14:50:55.395162 PCI: 00:1e.3: enabled 0
573 14:50:55.398391 PCI: 00:1f.0: enabled 1
574 14:50:55.398486 PCI: 00:1f.1: enabled 1
575 14:50:55.401948 PCI: 00:1f.2: enabled 1
576 14:50:55.405097 PCI: 00:1f.3: enabled 1
577 14:50:55.408272 PCI: 00:1f.4: enabled 0
578 14:50:55.408404 PCI: 00:1f.5: enabled 1
579 14:50:55.411527 PCI: 00:1f.7: enabled 0
580 14:50:55.415375 GENERIC: 0.0: enabled 1
581 14:50:55.418430 GENERIC: 0.0: enabled 1
582 14:50:55.418525 USB0 port 0: enabled 1
583 14:50:55.421621 GENERIC: 0.0: enabled 1
584 14:50:55.425273 I2C: 00:2c: enabled 1
585 14:50:55.425369 I2C: 00:15: enabled 1
586 14:50:55.428330 GENERIC: 0.0: enabled 0
587 14:50:55.431875 I2C: 00:15: enabled 1
588 14:50:55.431971 I2C: 00:10: enabled 0
589 14:50:55.434893 I2C: 00:10: enabled 0
590 14:50:55.438414 I2C: 00:2c: enabled 1
591 14:50:55.438509 I2C: 00:40: enabled 1
592 14:50:55.441825 I2C: 00:10: enabled 1
593 14:50:55.445112 I2C: 00:39: enabled 1
594 14:50:55.445207 I2C: 00:36: enabled 1
595 14:50:55.448500 I2C: 00:10: enabled 0
596 14:50:55.451812 I2C: 00:0c: enabled 1
597 14:50:55.451908 I2C: 00:50: enabled 1
598 14:50:55.455086 I2C: 00:1a: enabled 1
599 14:50:55.458273 I2C: 00:1a: enabled 0
600 14:50:55.461697 I2C: 00:1a: enabled 0
601 14:50:55.461792 I2C: 00:28: enabled 1
602 14:50:55.464895 I2C: 00:29: enabled 1
603 14:50:55.468252 PCI: 00:00.0: enabled 1
604 14:50:55.468348 SPI: 00: enabled 1
605 14:50:55.471827 PNP: 0c09.0: enabled 1
606 14:50:55.474890 GENERIC: 0.0: enabled 0
607 14:50:55.474985 USB2 port 0: enabled 1
608 14:50:55.478330 USB2 port 1: enabled 1
609 14:50:55.481550 USB2 port 2: enabled 1
610 14:50:55.481645 USB2 port 3: enabled 1
611 14:50:55.485078 USB2 port 4: enabled 0
612 14:50:55.488284 USB2 port 5: enabled 1
613 14:50:55.491969 USB2 port 6: enabled 0
614 14:50:55.492064 USB2 port 7: enabled 1
615 14:50:55.495618 USB3 port 0: enabled 1
616 14:50:55.498493 USB3 port 1: enabled 1
617 14:50:55.498589 USB3 port 2: enabled 1
618 14:50:55.502142 USB3 port 3: enabled 1
619 14:50:55.505434 APIC: 00: enabled 1
620 14:50:55.505540 APIC: 02: enabled 1
621 14:50:55.508148 Compare with tree...
622 14:50:55.511603 Root Device: enabled 1
623 14:50:55.515339 CPU_CLUSTER: 0: enabled 1
624 14:50:55.515435 APIC: 00: enabled 1
625 14:50:55.518550 APIC: 02: enabled 1
626 14:50:55.521548 DOMAIN: 0000: enabled 1
627 14:50:55.521644 PCI: 00:00.0: enabled 1
628 14:50:55.525506 PCI: 00:02.0: enabled 1
629 14:50:55.528467 PCI: 00:04.0: enabled 1
630 14:50:55.531490 GENERIC: 0.0: enabled 1
631 14:50:55.535304 PCI: 00:05.0: enabled 1
632 14:50:55.535405 GENERIC: 0.0: enabled 1
633 14:50:55.538069 PCI: 00:09.0: enabled 0
634 14:50:55.541650 PCI: 00:12.6: enabled 0
635 14:50:55.545178 PCI: 00:14.0: enabled 1
636 14:50:55.548401 USB0 port 0: enabled 1
637 14:50:55.548498 USB2 port 0: enabled 1
638 14:50:55.551790 USB2 port 1: enabled 1
639 14:50:55.555298 USB2 port 2: enabled 1
640 14:50:55.558131 USB2 port 3: enabled 1
641 14:50:55.561463 USB2 port 4: enabled 0
642 14:50:55.564758 USB2 port 5: enabled 1
643 14:50:55.564858 USB2 port 6: enabled 0
644 14:50:55.568009 USB2 port 7: enabled 1
645 14:50:55.571773 USB3 port 0: enabled 1
646 14:50:55.574671 USB3 port 1: enabled 1
647 14:50:55.578067 USB3 port 2: enabled 1
648 14:50:55.581344 USB3 port 3: enabled 1
649 14:50:55.581440 PCI: 00:14.1: enabled 0
650 14:50:55.584810 PCI: 00:14.2: enabled 0
651 14:50:55.588029 PCI: 00:14.3: enabled 1
652 14:50:55.591777 GENERIC: 0.0: enabled 1
653 14:50:55.591872 PCI: 00:14.5: enabled 1
654 14:50:55.595139 PCI: 00:15.0: enabled 1
655 14:50:55.598106 I2C: 00:2c: enabled 1
656 14:50:55.602221 I2C: 00:15: enabled 1
657 14:50:55.604883 PCI: 00:15.1: enabled 1
658 14:50:55.604979 PCI: 00:15.2: enabled 1
659 14:50:55.608264 GENERIC: 0.0: enabled 0
660 14:50:55.611613 I2C: 00:15: enabled 1
661 14:50:55.614932 I2C: 00:10: enabled 0
662 14:50:55.618000 I2C: 00:10: enabled 0
663 14:50:55.618096 I2C: 00:2c: enabled 1
664 14:50:55.621585 I2C: 00:40: enabled 1
665 14:50:55.624971 I2C: 00:10: enabled 1
666 14:50:55.628278 I2C: 00:39: enabled 1
667 14:50:55.628376 PCI: 00:15.3: enabled 1
668 14:50:55.631676 I2C: 00:36: enabled 1
669 14:50:55.635105 I2C: 00:10: enabled 0
670 14:50:55.638211 I2C: 00:0c: enabled 1
671 14:50:55.638307 I2C: 00:50: enabled 1
672 14:50:55.641582 PCI: 00:16.0: enabled 1
673 14:50:55.645045 PCI: 00:16.1: enabled 0
674 14:50:55.648460 PCI: 00:16.4: enabled 0
675 14:50:55.651702 PCI: 00:16.5: enabled 0
676 14:50:55.651796 PCI: 00:17.0: enabled 0
677 14:50:55.655116 PCI: 00:19.0: enabled 1
678 14:50:55.658236 I2C: 00:1a: enabled 1
679 14:50:55.661707 I2C: 00:1a: enabled 0
680 14:50:55.665125 I2C: 00:1a: enabled 0
681 14:50:55.665220 I2C: 00:28: enabled 1
682 14:50:55.668059 I2C: 00:29: enabled 1
683 14:50:55.671528 PCI: 00:19.1: enabled 0
684 14:50:55.674576 PCI: 00:19.2: enabled 1
685 14:50:55.674670 PCI: 00:1a.0: enabled 1
686 14:50:55.677920 PCI: 00:1e.0: enabled 0
687 14:50:55.681648 PCI: 00:1e.1: enabled 0
688 14:50:55.684957 PCI: 00:1e.2: enabled 1
689 14:50:55.685051 SPI: 00: enabled 1
690 14:50:55.688408 PCI: 00:1e.3: enabled 0
691 14:50:55.691629 PCI: 00:1f.0: enabled 1
692 14:50:55.694729 PNP: 0c09.0: enabled 1
693 14:50:55.698174 PCI: 00:1f.1: enabled 1
694 14:50:55.698269 PCI: 00:1f.2: enabled 1
695 14:50:55.701539 PCI: 00:1f.3: enabled 1
696 14:50:55.705040 GENERIC: 0.0: enabled 0
697 14:50:55.707763 PCI: 00:1f.4: enabled 0
698 14:50:55.711350 PCI: 00:1f.5: enabled 1
699 14:50:55.711444 PCI: 00:1f.7: enabled 0
700 14:50:55.714793 Root Device scanning...
701 14:50:55.718518 scan_static_bus for Root Device
702 14:50:55.721456 CPU_CLUSTER: 0 enabled
703 14:50:55.724362 DOMAIN: 0000 enabled
704 14:50:55.724469 DOMAIN: 0000 scanning...
705 14:50:55.728295 PCI: pci_scan_bus for bus 00
706 14:50:55.731283 PCI: 00:00.0 [8086/0000] ops
707 14:50:55.734857 PCI: 00:00.0 [8086/4e22] enabled
708 14:50:55.738159 PCI: 00:02.0 [8086/0000] bus ops
709 14:50:55.741489 PCI: 00:02.0 [8086/4e55] enabled
710 14:50:55.744530 PCI: 00:04.0 [8086/0000] bus ops
711 14:50:55.748071 PCI: 00:04.0 [8086/4e03] enabled
712 14:50:55.751412 PCI: 00:05.0 [8086/0000] bus ops
713 14:50:55.754538 PCI: 00:05.0 [8086/4e19] enabled
714 14:50:55.758249 PCI: 00:08.0 [8086/4e11] enabled
715 14:50:55.761114 PCI: 00:14.0 [8086/0000] bus ops
716 14:50:55.764552 PCI: 00:14.0 [8086/4ded] enabled
717 14:50:55.768247 PCI: 00:14.2 [8086/4def] disabled
718 14:50:55.771407 PCI: 00:14.3 [8086/0000] bus ops
719 14:50:55.774745 PCI: 00:14.3 [8086/4df0] enabled
720 14:50:55.777973 PCI: 00:14.5 [8086/0000] ops
721 14:50:55.781388 PCI: 00:14.5 [8086/4df8] enabled
722 14:50:55.784479 PCI: 00:15.0 [8086/0000] bus ops
723 14:50:55.787769 PCI: 00:15.0 [8086/4de8] enabled
724 14:50:55.791063 PCI: 00:15.1 [8086/0000] bus ops
725 14:50:55.794377 PCI: 00:15.1 [8086/4de9] enabled
726 14:50:55.798093 PCI: 00:15.2 [8086/0000] bus ops
727 14:50:55.801464 PCI: 00:15.2 [8086/4dea] enabled
728 14:50:55.804830 PCI: 00:15.3 [8086/0000] bus ops
729 14:50:55.808105 PCI: 00:15.3 [8086/4deb] enabled
730 14:50:55.811611 PCI: 00:16.0 [8086/0000] ops
731 14:50:55.814421 PCI: 00:16.0 [8086/4de0] enabled
732 14:50:55.817919 PCI: 00:19.0 [8086/0000] bus ops
733 14:50:55.821282 PCI: 00:19.0 [8086/4dc5] enabled
734 14:50:55.824366 PCI: 00:19.2 [8086/0000] ops
735 14:50:55.828338 PCI: 00:19.2 [8086/4dc7] enabled
736 14:50:55.831263 PCI: 00:1a.0 [8086/0000] ops
737 14:50:55.834586 PCI: 00:1a.0 [8086/4dc4] enabled
738 14:50:55.838037 PCI: 00:1e.0 [8086/0000] ops
739 14:50:55.841415 PCI: 00:1e.0 [8086/4da8] disabled
740 14:50:55.844389 PCI: 00:1e.2 [8086/0000] bus ops
741 14:50:55.848150 PCI: 00:1e.2 [8086/4daa] enabled
742 14:50:55.851370 PCI: 00:1f.0 [8086/0000] bus ops
743 14:50:55.854727 PCI: 00:1f.0 [8086/4d87] enabled
744 14:50:55.857739 PCI: Static device PCI: 00:1f.1 not found, disabling it.
745 14:50:55.861098 RTC Init
746 14:50:55.864589 Set power on after power failure.
747 14:50:55.864684 Disabling Deep S3
748 14:50:55.867946 Disabling Deep S3
749 14:50:55.868040 Disabling Deep S4
750 14:50:55.871342 Disabling Deep S4
751 14:50:55.874436 Disabling Deep S5
752 14:50:55.874531 Disabling Deep S5
753 14:50:55.877973 PCI: 00:1f.2 [0000/0000] hidden
754 14:50:55.881100 PCI: 00:1f.3 [8086/0000] bus ops
755 14:50:55.884347 PCI: 00:1f.3 [8086/4dc8] enabled
756 14:50:55.887876 PCI: 00:1f.5 [8086/0000] bus ops
757 14:50:55.891181 PCI: 00:1f.5 [8086/4da4] enabled
758 14:50:55.894946 PCI: Leftover static devices:
759 14:50:55.895040 PCI: 00:12.6
760 14:50:55.897756 PCI: 00:09.0
761 14:50:55.897851 PCI: 00:14.1
762 14:50:55.901552 PCI: 00:16.1
763 14:50:55.901646 PCI: 00:16.4
764 14:50:55.904879 PCI: 00:16.5
765 14:50:55.904978 PCI: 00:17.0
766 14:50:55.905054 PCI: 00:19.1
767 14:50:55.908296 PCI: 00:1e.1
768 14:50:55.908398 PCI: 00:1e.3
769 14:50:55.912267 PCI: 00:1f.1
770 14:50:55.912363 PCI: 00:1f.4
771 14:50:55.912449 PCI: 00:1f.7
772 14:50:55.915852 PCI: Check your devicetree.cb.
773 14:50:55.919170 PCI: 00:02.0 scanning...
774 14:50:55.922853 scan_generic_bus for PCI: 00:02.0
775 14:50:55.925787 scan_generic_bus for PCI: 00:02.0 done
776 14:50:55.929055 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
777 14:50:55.932280 PCI: 00:04.0 scanning...
778 14:50:55.935586 scan_generic_bus for PCI: 00:04.0
779 14:50:55.939179 GENERIC: 0.0 enabled
780 14:50:55.945476 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
781 14:50:55.949011 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
782 14:50:55.952551 PCI: 00:05.0 scanning...
783 14:50:55.956290 scan_generic_bus for PCI: 00:05.0
784 14:50:55.958641 GENERIC: 0.0 enabled
785 14:50:55.965186 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
786 14:50:55.968892 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
787 14:50:55.972015 PCI: 00:14.0 scanning...
788 14:50:55.975716 scan_static_bus for PCI: 00:14.0
789 14:50:55.978938 USB0 port 0 enabled
790 14:50:55.979035 USB0 port 0 scanning...
791 14:50:55.982159 scan_static_bus for USB0 port 0
792 14:50:55.985436 USB2 port 0 enabled
793 14:50:55.988587 USB2 port 1 enabled
794 14:50:55.988683 USB2 port 2 enabled
795 14:50:55.992088 USB2 port 3 enabled
796 14:50:55.992184 USB2 port 4 disabled
797 14:50:55.995413 USB2 port 5 enabled
798 14:50:55.998626 USB2 port 6 disabled
799 14:50:55.998723 USB2 port 7 enabled
800 14:50:56.002051 USB3 port 0 enabled
801 14:50:56.005266 USB3 port 1 enabled
802 14:50:56.005362 USB3 port 2 enabled
803 14:50:56.008934 USB3 port 3 enabled
804 14:50:56.012112 USB2 port 0 scanning...
805 14:50:56.015363 scan_static_bus for USB2 port 0
806 14:50:56.018877 scan_static_bus for USB2 port 0 done
807 14:50:56.021941 scan_bus: bus USB2 port 0 finished in 6 msecs
808 14:50:56.025395 USB2 port 1 scanning...
809 14:50:56.028822 scan_static_bus for USB2 port 1
810 14:50:56.032235 scan_static_bus for USB2 port 1 done
811 14:50:56.035057 scan_bus: bus USB2 port 1 finished in 6 msecs
812 14:50:56.038669 USB2 port 2 scanning...
813 14:50:56.042301 scan_static_bus for USB2 port 2
814 14:50:56.045163 scan_static_bus for USB2 port 2 done
815 14:50:56.052071 scan_bus: bus USB2 port 2 finished in 6 msecs
816 14:50:56.052196 USB2 port 3 scanning...
817 14:50:56.055007 scan_static_bus for USB2 port 3
818 14:50:56.058909 scan_static_bus for USB2 port 3 done
819 14:50:56.065382 scan_bus: bus USB2 port 3 finished in 6 msecs
820 14:50:56.068226 USB2 port 5 scanning...
821 14:50:56.072090 scan_static_bus for USB2 port 5
822 14:50:56.075005 scan_static_bus for USB2 port 5 done
823 14:50:56.078587 scan_bus: bus USB2 port 5 finished in 6 msecs
824 14:50:56.081973 USB2 port 7 scanning...
825 14:50:56.085095 scan_static_bus for USB2 port 7
826 14:50:56.088615 scan_static_bus for USB2 port 7 done
827 14:50:56.091535 scan_bus: bus USB2 port 7 finished in 6 msecs
828 14:50:56.095457 USB3 port 0 scanning...
829 14:50:56.098302 scan_static_bus for USB3 port 0
830 14:50:56.101804 scan_static_bus for USB3 port 0 done
831 14:50:56.108658 scan_bus: bus USB3 port 0 finished in 6 msecs
832 14:50:56.108754 USB3 port 1 scanning...
833 14:50:56.111749 scan_static_bus for USB3 port 1
834 14:50:56.115031 scan_static_bus for USB3 port 1 done
835 14:50:56.121556 scan_bus: bus USB3 port 1 finished in 6 msecs
836 14:50:56.125114 USB3 port 2 scanning...
837 14:50:56.128343 scan_static_bus for USB3 port 2
838 14:50:56.131983 scan_static_bus for USB3 port 2 done
839 14:50:56.135050 scan_bus: bus USB3 port 2 finished in 6 msecs
840 14:50:56.138460 USB3 port 3 scanning...
841 14:50:56.141594 scan_static_bus for USB3 port 3
842 14:50:56.145096 scan_static_bus for USB3 port 3 done
843 14:50:56.148194 scan_bus: bus USB3 port 3 finished in 6 msecs
844 14:50:56.154604 scan_static_bus for USB0 port 0 done
845 14:50:56.158209 scan_bus: bus USB0 port 0 finished in 173 msecs
846 14:50:56.161548 scan_static_bus for PCI: 00:14.0 done
847 14:50:56.168291 scan_bus: bus PCI: 00:14.0 finished in 190 msecs
848 14:50:56.168422 PCI: 00:14.3 scanning...
849 14:50:56.171441 scan_static_bus for PCI: 00:14.3
850 14:50:56.175129 GENERIC: 0.0 enabled
851 14:50:56.178105 scan_static_bus for PCI: 00:14.3 done
852 14:50:56.184600 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
853 14:50:56.184700 PCI: 00:15.0 scanning...
854 14:50:56.188354 scan_static_bus for PCI: 00:15.0
855 14:50:56.191635 I2C: 00:2c enabled
856 14:50:56.194607 I2C: 00:15 enabled
857 14:50:56.198150 scan_static_bus for PCI: 00:15.0 done
858 14:50:56.201441 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
859 14:50:56.204765 PCI: 00:15.1 scanning...
860 14:50:56.208106 scan_static_bus for PCI: 00:15.1
861 14:50:56.211510 scan_static_bus for PCI: 00:15.1 done
862 14:50:56.218352 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
863 14:50:56.218449 PCI: 00:15.2 scanning...
864 14:50:56.221283 scan_static_bus for PCI: 00:15.2
865 14:50:56.225197 GENERIC: 0.0 disabled
866 14:50:56.228346 I2C: 00:15 enabled
867 14:50:56.228452 I2C: 00:10 disabled
868 14:50:56.231567 I2C: 00:10 disabled
869 14:50:56.231663 I2C: 00:2c enabled
870 14:50:56.235016 I2C: 00:40 enabled
871 14:50:56.238202 I2C: 00:10 enabled
872 14:50:56.238298 I2C: 00:39 enabled
873 14:50:56.241634 scan_static_bus for PCI: 00:15.2 done
874 14:50:56.248100 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
875 14:50:56.251284 PCI: 00:15.3 scanning...
876 14:50:56.255032 scan_static_bus for PCI: 00:15.3
877 14:50:56.255128 I2C: 00:36 enabled
878 14:50:56.257948 I2C: 00:10 disabled
879 14:50:56.258044 I2C: 00:0c enabled
880 14:50:56.261482 I2C: 00:50 enabled
881 14:50:56.264675 scan_static_bus for PCI: 00:15.3 done
882 14:50:56.271196 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
883 14:50:56.271293 PCI: 00:19.0 scanning...
884 14:50:56.274814 scan_static_bus for PCI: 00:19.0
885 14:50:56.277857 I2C: 00:1a enabled
886 14:50:56.281254 I2C: 00:1a disabled
887 14:50:56.281350 I2C: 00:1a disabled
888 14:50:56.284782 I2C: 00:28 enabled
889 14:50:56.284878 I2C: 00:29 enabled
890 14:50:56.291303 scan_static_bus for PCI: 00:19.0 done
891 14:50:56.294607 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
892 14:50:56.297973 PCI: 00:1e.2 scanning...
893 14:50:56.301124 scan_generic_bus for PCI: 00:1e.2
894 14:50:56.301220 SPI: 00 enabled
895 14:50:56.307813 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
896 14:50:56.314460 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
897 14:50:56.314556 PCI: 00:1f.0 scanning...
898 14:50:56.318092 scan_static_bus for PCI: 00:1f.0
899 14:50:56.321497 PNP: 0c09.0 enabled
900 14:50:56.324811 PNP: 0c09.0 scanning...
901 14:50:56.328151 scan_static_bus for PNP: 0c09.0
902 14:50:56.331406 scan_static_bus for PNP: 0c09.0 done
903 14:50:56.334796 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
904 14:50:56.338049 scan_static_bus for PCI: 00:1f.0 done
905 14:50:56.344825 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
906 14:50:56.348182 PCI: 00:1f.3 scanning...
907 14:50:56.351530 scan_static_bus for PCI: 00:1f.3
908 14:50:56.351625 GENERIC: 0.0 disabled
909 14:50:56.358190 scan_static_bus for PCI: 00:1f.3 done
910 14:50:56.361694 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
911 14:50:56.364288 PCI: 00:1f.5 scanning...
912 14:50:56.367776 scan_generic_bus for PCI: 00:1f.5
913 14:50:56.371666 scan_generic_bus for PCI: 00:1f.5 done
914 14:50:56.374684 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
915 14:50:56.381115 scan_bus: bus DOMAIN: 0000 finished in 650 msecs
916 14:50:56.384383 scan_static_bus for Root Device done
917 14:50:56.391189 scan_bus: bus Root Device finished in 669 msecs
918 14:50:56.391285 done
919 14:50:56.397700 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1092 ms
920 14:50:56.401347 Chrome EC: UHEPI supported
921 14:50:56.404335 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
922 14:50:56.410934 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
923 14:50:56.414121 SPI flash protection: WPSW=0 SRP0=1
924 14:50:56.420996 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
925 14:50:56.427942 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
926 14:50:56.428038 found VGA at PCI: 00:02.0
927 14:50:56.430848 Setting up VGA for PCI: 00:02.0
928 14:50:56.437612 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
929 14:50:56.441001 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
930 14:50:56.444224 Allocating resources...
931 14:50:56.447595 Reading resources...
932 14:50:56.451042 Root Device read_resources bus 0 link: 0
933 14:50:56.454110 CPU_CLUSTER: 0 read_resources bus 0 link: 0
934 14:50:56.460956 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
935 14:50:56.463791 DOMAIN: 0000 read_resources bus 0 link: 0
936 14:50:56.470853 PCI: 00:04.0 read_resources bus 1 link: 0
937 14:50:56.474507 PCI: 00:04.0 read_resources bus 1 link: 0 done
938 14:50:56.481274 PCI: 00:05.0 read_resources bus 2 link: 0
939 14:50:56.484361 PCI: 00:05.0 read_resources bus 2 link: 0 done
940 14:50:56.491824 PCI: 00:14.0 read_resources bus 0 link: 0
941 14:50:56.495337 USB0 port 0 read_resources bus 0 link: 0
942 14:50:56.501665 USB0 port 0 read_resources bus 0 link: 0 done
943 14:50:56.505107 PCI: 00:14.0 read_resources bus 0 link: 0 done
944 14:50:56.561281 PCI: 00:14.3 read_resources bus 0 link: 0
945 14:50:56.561811 PCI: 00:14.3 read_resources bus 0 link: 0 done
946 14:50:56.561908 PCI: 00:15.0 read_resources bus 0 link: 0
947 14:50:56.562167 PCI: 00:15.0 read_resources bus 0 link: 0 done
948 14:50:56.562245 PCI: 00:15.2 read_resources bus 0 link: 0
949 14:50:56.562500 PCI: 00:15.2 read_resources bus 0 link: 0 done
950 14:50:56.562576 PCI: 00:15.3 read_resources bus 0 link: 0
951 14:50:56.562834 PCI: 00:15.3 read_resources bus 0 link: 0 done
952 14:50:56.563129 PCI: 00:19.0 read_resources bus 0 link: 0
953 14:50:56.563207 PCI: 00:19.0 read_resources bus 0 link: 0 done
954 14:50:56.563288 PCI: 00:1e.2 read_resources bus 3 link: 0
955 14:50:56.613222 PCI: 00:1e.2 read_resources bus 3 link: 0 done
956 14:50:56.613324 PCI: 00:1f.0 read_resources bus 0 link: 0
957 14:50:56.613585 PCI: 00:1f.0 read_resources bus 0 link: 0 done
958 14:50:56.613847 PCI: 00:1f.3 read_resources bus 0 link: 0
959 14:50:56.613935 PCI: 00:1f.3 read_resources bus 0 link: 0 done
960 14:50:56.614008 DOMAIN: 0000 read_resources bus 0 link: 0 done
961 14:50:56.614258 Root Device read_resources bus 0 link: 0 done
962 14:50:56.614514 Done reading resources.
963 14:50:56.614591 Show resources in subtree (Root Device)...After reading.
964 14:50:56.614843 Root Device child on link 0 CPU_CLUSTER: 0
965 14:50:56.615100 CPU_CLUSTER: 0 child on link 0 APIC: 00
966 14:50:56.615175 APIC: 00
967 14:50:56.615246 APIC: 02
968 14:50:56.663576 DOMAIN: 0000 child on link 0 PCI: 00:00.0
969 14:50:56.663896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
970 14:50:56.663996 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
971 14:50:56.664076 PCI: 00:00.0
972 14:50:56.664338 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
973 14:50:56.664983 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
974 14:50:56.695346 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
975 14:50:56.695953 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
976 14:50:56.696425 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
977 14:50:56.696513 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
978 14:50:56.703129 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
979 14:50:56.712757 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
980 14:50:56.722983 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
981 14:50:56.732982 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
982 14:50:56.742775 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
983 14:50:56.752951 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
984 14:50:56.759538 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
985 14:50:56.769505 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
986 14:50:56.779497 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
987 14:50:56.789371 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
988 14:50:56.799887 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
989 14:50:56.809557 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
990 14:50:56.816257 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
991 14:50:56.819306 PCI: 00:02.0
992 14:50:56.829319 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
993 14:50:56.839296 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
994 14:50:56.849698 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
995 14:50:56.852444 PCI: 00:04.0 child on link 0 GENERIC: 0.0
996 14:50:56.862565 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
997 14:50:56.865947 GENERIC: 0.0
998 14:50:56.869439 PCI: 00:05.0 child on link 0 GENERIC: 0.0
999 14:50:56.879489 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1000 14:50:56.879586 GENERIC: 0.0
1001 14:50:56.882796 PCI: 00:08.0
1002 14:50:56.892856 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 14:50:56.895931 PCI: 00:14.0 child on link 0 USB0 port 0
1004 14:50:56.906402 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1005 14:50:56.912788 USB0 port 0 child on link 0 USB2 port 0
1006 14:50:56.912885 USB2 port 0
1007 14:50:56.915765 USB2 port 1
1008 14:50:56.915861 USB2 port 2
1009 14:50:56.919890 USB2 port 3
1010 14:50:56.919986 USB2 port 4
1011 14:50:56.922782 USB2 port 5
1012 14:50:56.922878 USB2 port 6
1013 14:50:56.925981 USB2 port 7
1014 14:50:56.926077 USB3 port 0
1015 14:50:56.929441 USB3 port 1
1016 14:50:56.929536 USB3 port 2
1017 14:50:56.932600 USB3 port 3
1018 14:50:56.935914 PCI: 00:14.2
1019 14:50:56.939589 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1020 14:50:56.949150 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1021 14:50:56.949246 GENERIC: 0.0
1022 14:50:56.952524 PCI: 00:14.5
1023 14:50:56.962938 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1024 14:50:56.965996 PCI: 00:15.0 child on link 0 I2C: 00:2c
1025 14:50:56.976001 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 14:50:56.979318 I2C: 00:2c
1027 14:50:56.979410 I2C: 00:15
1028 14:50:56.982873 PCI: 00:15.1
1029 14:50:56.992744 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 14:50:56.996087 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1031 14:50:57.006235 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 14:50:57.006329 GENERIC: 0.0
1033 14:50:57.009575 I2C: 00:15
1034 14:50:57.009667 I2C: 00:10
1035 14:50:57.012790 I2C: 00:10
1036 14:50:57.012884 I2C: 00:2c
1037 14:50:57.015923 I2C: 00:40
1038 14:50:57.016026 I2C: 00:10
1039 14:50:57.019326 I2C: 00:39
1040 14:50:57.023480 PCI: 00:15.3 child on link 0 I2C: 00:36
1041 14:50:57.032908 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 14:50:57.033002 I2C: 00:36
1043 14:50:57.036088 I2C: 00:10
1044 14:50:57.036180 I2C: 00:0c
1045 14:50:57.039545 I2C: 00:50
1046 14:50:57.039636 PCI: 00:16.0
1047 14:50:57.049953 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1048 14:50:57.055943 PCI: 00:19.0 child on link 0 I2C: 00:1a
1049 14:50:57.066456 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1050 14:50:57.066550 I2C: 00:1a
1051 14:50:57.069411 I2C: 00:1a
1052 14:50:57.069503 I2C: 00:1a
1053 14:50:57.072478 I2C: 00:28
1054 14:50:57.072570 I2C: 00:29
1055 14:50:57.075812 PCI: 00:19.2
1056 14:50:57.086248 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1057 14:50:57.096328 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1058 14:50:57.096450 PCI: 00:1a.0
1059 14:50:57.106020 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1060 14:50:57.109351 PCI: 00:1e.0
1061 14:50:57.112803 PCI: 00:1e.2 child on link 0 SPI: 00
1062 14:50:57.122818 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1063 14:50:57.122912 SPI: 00
1064 14:50:57.129874 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1065 14:50:57.136210 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1066 14:50:57.139352 PNP: 0c09.0
1067 14:50:57.149229 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1068 14:50:57.149323 PCI: 00:1f.2
1069 14:50:57.158937 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 14:50:57.169149 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1071 14:50:57.173001 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1072 14:50:57.183554 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1073 14:50:57.193391 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1074 14:50:57.193482 GENERIC: 0.0
1075 14:50:57.196735 PCI: 00:1f.5
1076 14:50:57.206787 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1077 14:50:57.213359 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1078 14:50:57.219913 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1079 14:50:57.226636 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1080 14:50:57.233706 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1081 14:50:57.240085 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1082 14:50:57.250046 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1083 14:50:57.253046 DOMAIN: 0000: Resource ranges:
1084 14:50:57.256521 * Base: 1000, Size: 800, Tag: 100
1085 14:50:57.259891 * Base: 1900, Size: e700, Tag: 100
1086 14:50:57.266618 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1087 14:50:57.273725 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1088 14:50:57.279913 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1089 14:50:57.286441 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1090 14:50:57.293390 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1091 14:50:57.303382 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1092 14:50:57.309566 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1093 14:50:57.316586 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1094 14:50:57.326444 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1095 14:50:57.333157 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1096 14:50:57.341179 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1097 14:50:57.346760 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1098 14:50:57.356407 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1099 14:50:57.363041 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1100 14:50:57.369384 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1101 14:50:57.379531 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1102 14:50:57.385976 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1103 14:50:57.392660 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1104 14:50:57.402901 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1105 14:50:57.409174 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1106 14:50:57.416084 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1107 14:50:57.426016 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1108 14:50:57.432977 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1109 14:50:57.439586 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1110 14:50:57.442696 DOMAIN: 0000: Resource ranges:
1111 14:50:57.449096 * Base: 7fc00000, Size: 40400000, Tag: 200
1112 14:50:57.452803 * Base: d0000000, Size: 2b000000, Tag: 200
1113 14:50:57.455860 * Base: fb001000, Size: 2fff000, Tag: 200
1114 14:50:57.462464 * Base: fe010000, Size: 22000, Tag: 200
1115 14:50:57.465581 * Base: fe033000, Size: a4d000, Tag: 200
1116 14:50:57.469274 * Base: fea88000, Size: 2f8000, Tag: 200
1117 14:50:57.472661 * Base: fed88000, Size: 8000, Tag: 200
1118 14:50:57.479385 * Base: fed93000, Size: d000, Tag: 200
1119 14:50:57.482682 * Base: feda2000, Size: 125e000, Tag: 200
1120 14:50:57.485601 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1121 14:50:57.492146 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1122 14:50:57.498956 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1123 14:50:57.505658 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1124 14:50:57.512149 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1125 14:50:57.518615 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1126 14:50:57.525379 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1127 14:50:57.531761 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1128 14:50:57.538459 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1129 14:50:57.545518 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1130 14:50:57.552003 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1131 14:50:57.558459 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1132 14:50:57.565280 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1133 14:50:57.571885 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1134 14:50:57.578676 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1135 14:50:57.585020 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1136 14:50:57.591889 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1137 14:50:57.598827 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1138 14:50:57.605291 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1139 14:50:57.612014 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1140 14:50:57.618437 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1141 14:50:57.628260 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1142 14:50:57.634907 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1143 14:50:57.638135 Root Device assign_resources, bus 0 link: 0
1144 14:50:57.645070 DOMAIN: 0000 assign_resources, bus 0 link: 0
1145 14:50:57.652074 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1146 14:50:57.661824 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1147 14:50:57.668361 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1148 14:50:57.675160 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1149 14:50:57.681689 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 14:50:57.684832 PCI: 00:04.0 assign_resources, bus 1 link: 0
1151 14:50:57.694897 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1152 14:50:57.698396 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 14:50:57.701596 PCI: 00:05.0 assign_resources, bus 2 link: 0
1154 14:50:57.711903 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1155 14:50:57.717892 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1156 14:50:57.724690 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 14:50:57.728327 PCI: 00:14.0 assign_resources, bus 0 link: 0
1158 14:50:57.737981 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1159 14:50:57.741154 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 14:50:57.744654 PCI: 00:14.3 assign_resources, bus 0 link: 0
1161 14:50:57.755517 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1162 14:50:57.762729 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1163 14:50:57.765395 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 14:50:57.772568 PCI: 00:15.0 assign_resources, bus 0 link: 0
1165 14:50:57.779073 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1166 14:50:57.788593 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1167 14:50:57.791755 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 14:50:57.798917 PCI: 00:15.2 assign_resources, bus 0 link: 0
1169 14:50:57.805109 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1170 14:50:57.808734 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 14:50:57.815714 PCI: 00:15.3 assign_resources, bus 0 link: 0
1172 14:50:57.822373 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1173 14:50:57.832312 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1174 14:50:57.835689 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 14:50:57.838621 PCI: 00:19.0 assign_resources, bus 0 link: 0
1176 14:50:57.848308 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1177 14:50:57.855352 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1178 14:50:57.865011 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1179 14:50:57.868404 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 14:50:57.874934 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1181 14:50:57.878370 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 14:50:57.885093 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1183 14:50:57.888153 LPC: Trying to open IO window from 800 size 1ff
1184 14:50:57.894944 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1185 14:50:57.905084 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1186 14:50:57.908348 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 14:50:57.914933 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1188 14:50:57.921592 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1189 14:50:57.924968 DOMAIN: 0000 assign_resources, bus 0 link: 0
1190 14:50:57.931695 Root Device assign_resources, bus 0 link: 0
1191 14:50:57.934982 Done setting resources.
1192 14:50:57.938714 Show resources in subtree (Root Device)...After assigning values.
1193 14:50:57.945342 Root Device child on link 0 CPU_CLUSTER: 0
1194 14:50:57.949241 CPU_CLUSTER: 0 child on link 0 APIC: 00
1195 14:50:57.949337 APIC: 00
1196 14:50:57.951813 APIC: 02
1197 14:50:57.955146 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1198 14:50:57.965089 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1199 14:50:57.975038 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1200 14:50:57.975134 PCI: 00:00.0
1201 14:50:57.985561 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1202 14:50:57.994998 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1203 14:50:58.004778 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1204 14:50:58.015220 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1205 14:50:58.024720 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1206 14:50:58.031393 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1207 14:50:58.041516 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1208 14:50:58.051381 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1209 14:50:58.061417 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1210 14:50:58.071433 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1211 14:50:58.081367 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1212 14:50:58.088227 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1213 14:50:58.098178 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1214 14:50:58.108509 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1215 14:50:58.117981 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1216 14:50:58.128213 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1217 14:50:58.138177 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1218 14:50:58.144545 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1219 14:50:58.154778 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1220 14:50:58.157989 PCI: 00:02.0
1221 14:50:58.168186 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1222 14:50:58.177813 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1223 14:50:58.187942 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1224 14:50:58.191031 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1225 14:50:58.201201 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1226 14:50:58.204469 GENERIC: 0.0
1227 14:50:58.207639 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1228 14:50:58.218017 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1229 14:50:58.221150 GENERIC: 0.0
1230 14:50:58.224387 PCI: 00:08.0
1231 14:50:58.234457 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1232 14:50:58.237783 PCI: 00:14.0 child on link 0 USB0 port 0
1233 14:50:58.247758 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1234 14:50:58.251102 USB0 port 0 child on link 0 USB2 port 0
1235 14:50:58.254287 USB2 port 0
1236 14:50:58.254380 USB2 port 1
1237 14:50:58.257815 USB2 port 2
1238 14:50:58.257908 USB2 port 3
1239 14:50:58.261013 USB2 port 4
1240 14:50:58.264459 USB2 port 5
1241 14:50:58.264551 USB2 port 6
1242 14:50:58.267803 USB2 port 7
1243 14:50:58.267896 USB3 port 0
1244 14:50:58.271275 USB3 port 1
1245 14:50:58.271367 USB3 port 2
1246 14:50:58.274842 USB3 port 3
1247 14:50:58.274934 PCI: 00:14.2
1248 14:50:58.281000 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1249 14:50:58.290982 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1250 14:50:58.291076 GENERIC: 0.0
1251 14:50:58.294278 PCI: 00:14.5
1252 14:50:58.304530 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1253 14:50:58.307556 PCI: 00:15.0 child on link 0 I2C: 00:2c
1254 14:50:58.317508 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1255 14:50:58.321194 I2C: 00:2c
1256 14:50:58.321286 I2C: 00:15
1257 14:50:58.324360 PCI: 00:15.1
1258 14:50:58.334379 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1259 14:50:58.337581 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1260 14:50:58.347605 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1261 14:50:58.350840 GENERIC: 0.0
1262 14:50:58.350948 I2C: 00:15
1263 14:50:58.354385 I2C: 00:10
1264 14:50:58.354478 I2C: 00:10
1265 14:50:58.357711 I2C: 00:2c
1266 14:50:58.357803 I2C: 00:40
1267 14:50:58.361027 I2C: 00:10
1268 14:50:58.361138 I2C: 00:39
1269 14:50:58.364002 PCI: 00:15.3 child on link 0 I2C: 00:36
1270 14:50:58.378017 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1271 14:50:58.378111 I2C: 00:36
1272 14:50:58.381049 I2C: 00:10
1273 14:50:58.381141 I2C: 00:0c
1274 14:50:58.381213 I2C: 00:50
1275 14:50:58.384010 PCI: 00:16.0
1276 14:50:58.393866 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1277 14:50:58.397298 PCI: 00:19.0 child on link 0 I2C: 00:1a
1278 14:50:58.407761 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1279 14:50:58.410954 I2C: 00:1a
1280 14:50:58.411079 I2C: 00:1a
1281 14:50:58.414339 I2C: 00:1a
1282 14:50:58.414431 I2C: 00:28
1283 14:50:58.417512 I2C: 00:29
1284 14:50:58.417604 PCI: 00:19.2
1285 14:50:58.430961 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1286 14:50:58.440507 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1287 14:50:58.440601 PCI: 00:1a.0
1288 14:50:58.451110 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1289 14:50:58.454262 PCI: 00:1e.0
1290 14:50:58.457552 PCI: 00:1e.2 child on link 0 SPI: 00
1291 14:50:58.467235 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1292 14:50:58.471224 SPI: 00
1293 14:50:58.474094 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1294 14:50:58.484324 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1295 14:50:58.484444 PNP: 0c09.0
1296 14:50:58.493908 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1297 14:50:58.494004 PCI: 00:1f.2
1298 14:50:58.504074 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1299 14:50:58.513952 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1300 14:50:58.517575 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1301 14:50:58.527591 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1302 14:50:58.537617 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1303 14:50:58.540648 GENERIC: 0.0
1304 14:50:58.540743 PCI: 00:1f.5
1305 14:50:58.554282 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1306 14:50:58.554379 Done allocating resources.
1307 14:50:58.560819 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2109 ms
1308 14:50:58.563977 Enabling resources...
1309 14:50:58.567645 PCI: 00:00.0 subsystem <- 8086/4e22
1310 14:50:58.571025 PCI: 00:00.0 cmd <- 06
1311 14:50:58.574750 PCI: 00:02.0 subsystem <- 8086/4e55
1312 14:50:58.577882 PCI: 00:02.0 cmd <- 03
1313 14:50:58.581155 PCI: 00:04.0 subsystem <- 8086/4e03
1314 14:50:58.584494 PCI: 00:04.0 cmd <- 02
1315 14:50:58.587881 PCI: 00:05.0 bridge ctrl <- 0003
1316 14:50:58.590798 PCI: 00:05.0 subsystem <- 8086/4e19
1317 14:50:58.590890 PCI: 00:05.0 cmd <- 02
1318 14:50:58.594193 PCI: 00:08.0 cmd <- 06
1319 14:50:58.597634 PCI: 00:14.0 subsystem <- 8086/4ded
1320 14:50:58.601059 PCI: 00:14.0 cmd <- 02
1321 14:50:58.604353 PCI: 00:14.3 subsystem <- 8086/4df0
1322 14:50:58.607886 PCI: 00:14.3 cmd <- 02
1323 14:50:58.610944 PCI: 00:14.5 subsystem <- 8086/4df8
1324 14:50:58.614033 PCI: 00:14.5 cmd <- 06
1325 14:50:58.617766 PCI: 00:15.0 subsystem <- 8086/4de8
1326 14:50:58.621007 PCI: 00:15.0 cmd <- 02
1327 14:50:58.624141 PCI: 00:15.1 subsystem <- 8086/4de9
1328 14:50:58.624234 PCI: 00:15.1 cmd <- 02
1329 14:50:58.630968 PCI: 00:15.2 subsystem <- 8086/4dea
1330 14:50:58.631060 PCI: 00:15.2 cmd <- 02
1331 14:50:58.634510 PCI: 00:15.3 subsystem <- 8086/4deb
1332 14:50:58.637683 PCI: 00:15.3 cmd <- 02
1333 14:50:58.641030 PCI: 00:16.0 subsystem <- 8086/4de0
1334 14:50:58.644635 PCI: 00:16.0 cmd <- 02
1335 14:50:58.647720 PCI: 00:19.0 subsystem <- 8086/4dc5
1336 14:50:58.650877 PCI: 00:19.0 cmd <- 02
1337 14:50:58.654101 PCI: 00:19.2 subsystem <- 8086/4dc7
1338 14:50:58.657917 PCI: 00:19.2 cmd <- 06
1339 14:50:58.660784 PCI: 00:1a.0 subsystem <- 8086/4dc4
1340 14:50:58.664341 PCI: 00:1a.0 cmd <- 06
1341 14:50:58.667579 PCI: 00:1e.2 subsystem <- 8086/4daa
1342 14:50:58.667671 PCI: 00:1e.2 cmd <- 06
1343 14:50:58.674745 PCI: 00:1f.0 subsystem <- 8086/4d87
1344 14:50:58.674839 PCI: 00:1f.0 cmd <- 407
1345 14:50:58.677507 PCI: 00:1f.3 subsystem <- 8086/4dc8
1346 14:50:58.680541 PCI: 00:1f.3 cmd <- 02
1347 14:50:58.684516 PCI: 00:1f.5 subsystem <- 8086/4da4
1348 14:50:58.687239 PCI: 00:1f.5 cmd <- 406
1349 14:50:58.691635 done.
1350 14:50:58.695099 BS: BS_DEV_ENABLE run times (exec / console): 7 / 122 ms
1351 14:50:58.698465 Initializing devices...
1352 14:50:58.701787 Root Device init
1353 14:50:58.701878 mainboard: EC init
1354 14:50:58.708322 Chrome EC: Set SMI mask to 0x0000000000000000
1355 14:50:58.711716 Chrome EC: clear events_b mask to 0x0000000000000000
1356 14:50:58.718430 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1357 14:50:58.725271 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1358 14:50:58.731674 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1359 14:50:58.735583 Chrome EC: Set WAKE mask to 0x0000000000000000
1360 14:50:58.742342 Root Device init finished in 36 msecs
1361 14:50:58.745359 PCI: 00:00.0 init
1362 14:50:58.745455 CPU TDP = 6 Watts
1363 14:50:58.749167 CPU PL1 = 7 Watts
1364 14:50:58.752196 CPU PL2 = 12 Watts
1365 14:50:58.755318 PCI: 00:00.0 init finished in 6 msecs
1366 14:50:58.755410 PCI: 00:02.0 init
1367 14:50:58.758895 GMA: Found VBT in CBFS
1368 14:50:58.762179 GMA: Found valid VBT in CBFS
1369 14:50:58.769003 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1370 14:50:58.775395 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1371 14:50:58.778777 PCI: 00:02.0 init finished in 18 msecs
1372 14:50:58.782211 PCI: 00:08.0 init
1373 14:50:58.785978 PCI: 00:08.0 init finished in 0 msecs
1374 14:50:58.788831 PCI: 00:14.0 init
1375 14:50:58.792068 XHCI: Updated LFPS sampling OFF time to 9 ms
1376 14:50:58.795371 PCI: 00:14.0 init finished in 4 msecs
1377 14:50:58.798870 PCI: 00:15.0 init
1378 14:50:58.802200 I2C bus 0 version 0x3230302a
1379 14:50:58.805539 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1380 14:50:58.808860 PCI: 00:15.0 init finished in 6 msecs
1381 14:50:58.812282 PCI: 00:15.1 init
1382 14:50:58.815530 I2C bus 1 version 0x3230302a
1383 14:50:58.819051 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1384 14:50:58.821860 PCI: 00:15.1 init finished in 6 msecs
1385 14:50:58.825521 PCI: 00:15.2 init
1386 14:50:58.828882 I2C bus 2 version 0x3230302a
1387 14:50:58.831768 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1388 14:50:58.835874 PCI: 00:15.2 init finished in 6 msecs
1389 14:50:58.835967 PCI: 00:15.3 init
1390 14:50:58.838958 I2C bus 3 version 0x3230302a
1391 14:50:58.841824 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1392 14:50:58.848776 PCI: 00:15.3 init finished in 6 msecs
1393 14:50:58.848870 PCI: 00:16.0 init
1394 14:50:58.852066 PCI: 00:16.0 init finished in 0 msecs
1395 14:50:58.855218 PCI: 00:19.0 init
1396 14:50:58.858409 I2C bus 4 version 0x3230302a
1397 14:50:58.861977 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1398 14:50:58.865065 PCI: 00:19.0 init finished in 6 msecs
1399 14:50:58.868544 PCI: 00:1a.0 init
1400 14:50:58.871744 PCI: 00:1a.0 init finished in 0 msecs
1401 14:50:58.875158 PCI: 00:1f.0 init
1402 14:50:58.878401 IOAPIC: Initializing IOAPIC at 0xfec00000
1403 14:50:58.881763 IOAPIC: Bootstrap Processor Local APIC = 0x00
1404 14:50:58.885033 IOAPIC: ID = 0x02
1405 14:50:58.888744 IOAPIC: Dumping registers
1406 14:50:58.892304 reg 0x0000: 0x02000000
1407 14:50:58.892430 reg 0x0001: 0x00770020
1408 14:50:58.895183 reg 0x0002: 0x00000000
1409 14:50:58.899074 PCI: 00:1f.0 init finished in 21 msecs
1410 14:50:58.902038 PCI: 00:1f.2 init
1411 14:50:58.905335 Disabling ACPI via APMC.
1412 14:50:58.908692 APMC done.
1413 14:50:58.912055 PCI: 00:1f.2 init finished in 5 msecs
1414 14:50:58.922288 PNP: 0c09.0 init
1415 14:50:58.925572 Google Chrome EC uptime: 6.547 seconds
1416 14:50:58.932274 Google Chrome AP resets since EC boot: 0
1417 14:50:58.935830 Google Chrome most recent AP reset causes:
1418 14:50:58.942107 Google Chrome EC reset flags at last EC boot: reset-pin
1419 14:50:58.945561 PNP: 0c09.0 init finished in 18 msecs
1420 14:50:58.945654 Devices initialized
1421 14:50:58.949508 Show all devs... After init.
1422 14:50:58.952355 Root Device: enabled 1
1423 14:50:58.955406 CPU_CLUSTER: 0: enabled 1
1424 14:50:58.958905 DOMAIN: 0000: enabled 1
1425 14:50:58.958997 PCI: 00:00.0: enabled 1
1426 14:50:58.962541 PCI: 00:02.0: enabled 1
1427 14:50:58.965815 PCI: 00:04.0: enabled 1
1428 14:50:58.965908 PCI: 00:05.0: enabled 1
1429 14:50:58.968867 PCI: 00:09.0: enabled 0
1430 14:50:58.972041 PCI: 00:12.6: enabled 0
1431 14:50:58.975721 PCI: 00:14.0: enabled 1
1432 14:50:58.975817 PCI: 00:14.1: enabled 0
1433 14:50:58.979093 PCI: 00:14.2: enabled 0
1434 14:50:58.982549 PCI: 00:14.3: enabled 1
1435 14:50:58.985697 PCI: 00:14.5: enabled 1
1436 14:50:58.985793 PCI: 00:15.0: enabled 1
1437 14:50:58.989095 PCI: 00:15.1: enabled 1
1438 14:50:58.992312 PCI: 00:15.2: enabled 1
1439 14:50:58.995654 PCI: 00:15.3: enabled 1
1440 14:50:58.995750 PCI: 00:16.0: enabled 1
1441 14:50:58.998683 PCI: 00:16.1: enabled 0
1442 14:50:59.002647 PCI: 00:16.4: enabled 0
1443 14:50:59.005598 PCI: 00:16.5: enabled 0
1444 14:50:59.005693 PCI: 00:17.0: enabled 0
1445 14:50:59.009186 PCI: 00:19.0: enabled 1
1446 14:50:59.012269 PCI: 00:19.1: enabled 0
1447 14:50:59.012398 PCI: 00:19.2: enabled 1
1448 14:50:59.015702 PCI: 00:1a.0: enabled 1
1449 14:50:59.019160 PCI: 00:1c.0: enabled 0
1450 14:50:59.022500 PCI: 00:1c.1: enabled 0
1451 14:50:59.022595 PCI: 00:1c.2: enabled 0
1452 14:50:59.025386 PCI: 00:1c.3: enabled 0
1453 14:50:59.028715 PCI: 00:1c.4: enabled 0
1454 14:50:59.032122 PCI: 00:1c.5: enabled 0
1455 14:50:59.032218 PCI: 00:1c.6: enabled 0
1456 14:50:59.035590 PCI: 00:1c.7: enabled 1
1457 14:50:59.038813 PCI: 00:1e.0: enabled 0
1458 14:50:59.042378 PCI: 00:1e.1: enabled 0
1459 14:50:59.042473 PCI: 00:1e.2: enabled 1
1460 14:50:59.045187 PCI: 00:1e.3: enabled 0
1461 14:50:59.048991 PCI: 00:1f.0: enabled 1
1462 14:50:59.049086 PCI: 00:1f.1: enabled 0
1463 14:50:59.052231 PCI: 00:1f.2: enabled 1
1464 14:50:59.055335 PCI: 00:1f.3: enabled 1
1465 14:50:59.058574 PCI: 00:1f.4: enabled 0
1466 14:50:59.058669 PCI: 00:1f.5: enabled 1
1467 14:50:59.062207 PCI: 00:1f.7: enabled 0
1468 14:50:59.065331 GENERIC: 0.0: enabled 1
1469 14:50:59.068657 GENERIC: 0.0: enabled 1
1470 14:50:59.068753 USB0 port 0: enabled 1
1471 14:50:59.072325 GENERIC: 0.0: enabled 1
1472 14:50:59.075443 I2C: 00:2c: enabled 1
1473 14:50:59.075538 I2C: 00:15: enabled 1
1474 14:50:59.078960 GENERIC: 0.0: enabled 0
1475 14:50:59.081921 I2C: 00:15: enabled 1
1476 14:50:59.085635 I2C: 00:10: enabled 0
1477 14:50:59.085730 I2C: 00:10: enabled 0
1478 14:50:59.088893 I2C: 00:2c: enabled 1
1479 14:50:59.092305 I2C: 00:40: enabled 1
1480 14:50:59.092407 I2C: 00:10: enabled 1
1481 14:50:59.095708 I2C: 00:39: enabled 1
1482 14:50:59.098542 I2C: 00:36: enabled 1
1483 14:50:59.098637 I2C: 00:10: enabled 0
1484 14:50:59.101923 I2C: 00:0c: enabled 1
1485 14:50:59.105713 I2C: 00:50: enabled 1
1486 14:50:59.105809 I2C: 00:1a: enabled 1
1487 14:50:59.108766 I2C: 00:1a: enabled 0
1488 14:50:59.111803 I2C: 00:1a: enabled 0
1489 14:50:59.111898 I2C: 00:28: enabled 1
1490 14:50:59.115350 I2C: 00:29: enabled 1
1491 14:50:59.118645 PCI: 00:00.0: enabled 1
1492 14:50:59.118741 SPI: 00: enabled 1
1493 14:50:59.122002 PNP: 0c09.0: enabled 1
1494 14:50:59.125236 GENERIC: 0.0: enabled 0
1495 14:50:59.125332 USB2 port 0: enabled 1
1496 14:50:59.128717 USB2 port 1: enabled 1
1497 14:50:59.131890 USB2 port 2: enabled 1
1498 14:50:59.135724 USB2 port 3: enabled 1
1499 14:50:59.135820 USB2 port 4: enabled 0
1500 14:50:59.138546 USB2 port 5: enabled 1
1501 14:50:59.141945 USB2 port 6: enabled 0
1502 14:50:59.142041 USB2 port 7: enabled 1
1503 14:50:59.145321 USB3 port 0: enabled 1
1504 14:50:59.148497 USB3 port 1: enabled 1
1505 14:50:59.148593 USB3 port 2: enabled 1
1506 14:50:59.152547 USB3 port 3: enabled 1
1507 14:50:59.155171 APIC: 00: enabled 1
1508 14:50:59.155267 APIC: 02: enabled 1
1509 14:50:59.158869 PCI: 00:08.0: enabled 1
1510 14:50:59.165322 BS: BS_DEV_INIT run times (exec / console): 23 / 440 ms
1511 14:50:59.168604 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1512 14:50:59.172053 ELOG: NV offset 0xbfa000 size 0x1000
1513 14:50:59.179870 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1514 14:50:59.186863 ELOG: Event(17) added with size 13 at 2023-05-03 14:50:58 UTC
1515 14:50:59.193144 ELOG: Event(92) added with size 9 at 2023-05-03 14:50:58 UTC
1516 14:50:59.200294 ELOG: Event(93) added with size 9 at 2023-05-03 14:50:58 UTC
1517 14:50:59.206641 ELOG: Event(9E) added with size 10 at 2023-05-03 14:50:58 UTC
1518 14:50:59.213228 ELOG: Event(9F) added with size 14 at 2023-05-03 14:50:58 UTC
1519 14:50:59.219727 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1520 14:50:59.223156 ELOG: Event(A1) added with size 10 at 2023-05-03 14:50:58 UTC
1521 14:50:59.233210 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1522 14:50:59.239986 ELOG: Event(A0) added with size 9 at 2023-05-03 14:50:58 UTC
1523 14:50:59.243414 elog_add_boot_reason: Logged dev mode boot
1524 14:50:59.250167 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1525 14:50:59.250260 Finalize devices...
1526 14:50:59.253744 Devices finalized
1527 14:50:59.260281 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1528 14:50:59.262910 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1529 14:50:59.269993 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1530 14:50:59.273288 ME: HFSTS1 : 0x80030045
1531 14:50:59.276362 ME: HFSTS2 : 0x30280136
1532 14:50:59.283125 ME: HFSTS3 : 0x00000050
1533 14:50:59.286508 ME: HFSTS4 : 0x00004000
1534 14:50:59.289992 ME: HFSTS5 : 0x00000000
1535 14:50:59.293149 ME: HFSTS6 : 0x40400006
1536 14:50:59.296306 ME: Manufacturing Mode : NO
1537 14:50:59.299586 ME: FW Partition Table : OK
1538 14:50:59.303073 ME: Bringup Loader Failure : NO
1539 14:50:59.306243 ME: Firmware Init Complete : NO
1540 14:50:59.310021 ME: Boot Options Present : NO
1541 14:50:59.313320 ME: Update In Progress : NO
1542 14:50:59.316364 ME: D0i3 Support : YES
1543 14:50:59.319792 ME: Low Power State Enabled : NO
1544 14:50:59.322804 ME: CPU Replaced : YES
1545 14:50:59.326116 ME: CPU Replacement Valid : YES
1546 14:50:59.329912 ME: Current Working State : 5
1547 14:50:59.333224 ME: Current Operation State : 1
1548 14:50:59.336689 ME: Current Operation Mode : 3
1549 14:50:59.339919 ME: Error Code : 0
1550 14:50:59.343357 ME: CPU Debug Disabled : YES
1551 14:50:59.346186 ME: TXT Support : NO
1552 14:50:59.352757 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1553 14:50:59.359740 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1554 14:50:59.363296 ACPI: Writing ACPI tables at 76b27000.
1555 14:50:59.366420 ACPI: * FACS
1556 14:50:59.366513 ACPI: * DSDT
1557 14:50:59.369377 Ramoops buffer: 0x100000@0x76a26000.
1558 14:50:59.376137 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1559 14:50:59.379666 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1560 14:50:59.382844 Google Chrome EC: version:
1561 14:50:59.386180 ro: magolor_1.1.9999-103b6f9
1562 14:50:59.389563 rw: magolor_1.1.9999-103b6f9
1563 14:50:59.389655 running image: 1
1564 14:50:59.396086 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1565 14:50:59.400621 ACPI: * FADT
1566 14:50:59.400713 SCI is IRQ9
1567 14:50:59.407294 ACPI: added table 1/32, length now 40
1568 14:50:59.407387 ACPI: * SSDT
1569 14:50:59.410873 Found 1 CPU(s) with 2 core(s) each.
1570 14:50:59.413877 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1571 14:50:59.420276 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1572 14:50:59.423666 Could not locate 'wifi_sar' in VPD.
1573 14:50:59.427043 Checking CBFS for default SAR values
1574 14:50:59.433747 wifi_sar_defaults.hex has bad len in CBFS
1575 14:50:59.437082 failed from getting SAR limits!
1576 14:50:59.440573 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1577 14:50:59.447091 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1578 14:50:59.450438 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1579 14:50:59.457054 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1580 14:50:59.460520 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1581 14:50:59.467256 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1582 14:50:59.470503 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1583 14:50:59.477516 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1584 14:50:59.483567 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1585 14:50:59.491008 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1586 14:50:59.493841 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1587 14:50:59.500344 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1588 14:50:59.506935 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1589 14:50:59.510175 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1590 14:50:59.513754 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1591 14:50:59.521689 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1592 14:50:59.525098 PS2K: Passing 101 keymaps to kernel
1593 14:50:59.531238 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1594 14:50:59.538218 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1595 14:50:59.541308 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1596 14:50:59.548317 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1597 14:50:59.554501 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1598 14:50:59.557891 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1599 14:50:59.564578 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1600 14:50:59.571756 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1601 14:50:59.574918 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1602 14:50:59.581467 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1603 14:50:59.584543 ACPI: added table 2/32, length now 44
1604 14:50:59.588199 ACPI: * MCFG
1605 14:50:59.591414 ACPI: added table 3/32, length now 48
1606 14:50:59.591507 ACPI: * TPM2
1607 14:50:59.594488 TPM2 log created at 0x76a16000
1608 14:50:59.598391 ACPI: added table 4/32, length now 52
1609 14:50:59.601490 ACPI: * MADT
1610 14:50:59.601582 SCI is IRQ9
1611 14:50:59.604588 ACPI: added table 5/32, length now 56
1612 14:50:59.607752 current = 76b2d580
1613 14:50:59.611336 ACPI: * DMAR
1614 14:50:59.615139 ACPI: added table 6/32, length now 60
1615 14:50:59.617796 ACPI: added table 7/32, length now 64
1616 14:50:59.617889 ACPI: * HPET
1617 14:50:59.624417 ACPI: added table 8/32, length now 68
1618 14:50:59.624510 ACPI: done.
1619 14:50:59.628630 ACPI tables: 26304 bytes.
1620 14:50:59.631488 smbios_write_tables: 76a15000
1621 14:50:59.635134 EC returned error result code 3
1622 14:50:59.638103 Couldn't obtain OEM name from CBI
1623 14:50:59.641330 Create SMBIOS type 16
1624 14:50:59.644863 Create SMBIOS type 17
1625 14:50:59.644983 GENERIC: 0.0 (WIFI Device)
1626 14:50:59.648072 SMBIOS tables: 913 bytes.
1627 14:50:59.651427 Writing table forward entry at 0x00000500
1628 14:50:59.658030 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1629 14:50:59.661218 Writing coreboot table at 0x76b4b000
1630 14:50:59.668275 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1631 14:50:59.674569 1. 0000000000001000-000000000009ffff: RAM
1632 14:50:59.678316 2. 00000000000a0000-00000000000fffff: RESERVED
1633 14:50:59.681728 3. 0000000000100000-0000000076a14fff: RAM
1634 14:50:59.688079 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1635 14:50:59.694646 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1636 14:50:59.698404 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1637 14:50:59.704388 7. 0000000077000000-000000007fbfffff: RESERVED
1638 14:50:59.707963 8. 00000000c0000000-00000000cfffffff: RESERVED
1639 14:50:59.714689 9. 00000000fb000000-00000000fb000fff: RESERVED
1640 14:50:59.717644 10. 00000000fe000000-00000000fe00ffff: RESERVED
1641 14:50:59.724668 11. 00000000fea80000-00000000fea87fff: RESERVED
1642 14:50:59.727951 12. 00000000fed80000-00000000fed87fff: RESERVED
1643 14:50:59.731292 13. 00000000fed90000-00000000fed92fff: RESERVED
1644 14:50:59.737886 14. 00000000feda0000-00000000feda1fff: RESERVED
1645 14:50:59.741289 15. 0000000100000000-00000001803fffff: RAM
1646 14:50:59.744627 Passing 4 GPIOs to payload:
1647 14:50:59.751063 NAME | PORT | POLARITY | VALUE
1648 14:50:59.754299 lid | undefined | high | high
1649 14:50:59.761143 power | undefined | high | low
1650 14:50:59.764284 oprom | undefined | high | low
1651 14:50:59.771454 EC in RW | 0x000000b9 | high | low
1652 14:50:59.777919 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum e8ad
1653 14:50:59.781393 coreboot table: 1504 bytes.
1654 14:50:59.784574 IMD ROOT 0. 0x76fff000 0x00001000
1655 14:50:59.787729 IMD SMALL 1. 0x76ffe000 0x00001000
1656 14:50:59.791114 FSP MEMORY 2. 0x76c4e000 0x003b0000
1657 14:50:59.794617 CONSOLE 3. 0x76c2e000 0x00020000
1658 14:50:59.797821 FMAP 4. 0x76c2d000 0x00000578
1659 14:50:59.801296 TIME STAMP 5. 0x76c2c000 0x00000910
1660 14:50:59.804578 VBOOT WORK 6. 0x76c18000 0x00014000
1661 14:50:59.811402 ROMSTG STCK 7. 0x76c17000 0x00001000
1662 14:50:59.814500 AFTER CAR 8. 0x76c0d000 0x0000a000
1663 14:50:59.817723 RAMSTAGE 9. 0x76ba7000 0x00066000
1664 14:50:59.821739 REFCODE 10. 0x76b67000 0x00040000
1665 14:50:59.824850 SMM BACKUP 11. 0x76b57000 0x00010000
1666 14:50:59.828086 4f444749 12. 0x76b55000 0x00002000
1667 14:50:59.831112 EXT VBT13. 0x76b53000 0x00001c43
1668 14:50:59.834616 COREBOOT 14. 0x76b4b000 0x00008000
1669 14:50:59.838369 ACPI 15. 0x76b27000 0x00024000
1670 14:50:59.844846 ACPI GNVS 16. 0x76b26000 0x00001000
1671 14:50:59.847729 RAMOOPS 17. 0x76a26000 0x00100000
1672 14:50:59.851132 TPM2 TCGLOG18. 0x76a16000 0x00010000
1673 14:50:59.854495 SMBIOS 19. 0x76a15000 0x00000800
1674 14:50:59.854588 IMD small region:
1675 14:50:59.861536 IMD ROOT 0. 0x76ffec00 0x00000400
1676 14:50:59.864812 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1677 14:50:59.868137 VPD 2. 0x76ffeb80 0x0000004c
1678 14:50:59.871493 POWER STATE 3. 0x76ffeb40 0x00000040
1679 14:50:59.874595 ROMSTAGE 4. 0x76ffeb20 0x00000004
1680 14:50:59.881318 MEM INFO 5. 0x76ffe940 0x000001e0
1681 14:50:59.884697 BS: BS_WRITE_TABLES run times (exec / console): 7 / 520 ms
1682 14:50:59.888005 MTRR: Physical address space:
1683 14:50:59.894442 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1684 14:50:59.901119 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1685 14:50:59.907967 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1686 14:50:59.914464 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1687 14:50:59.920984 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1688 14:50:59.927940 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1689 14:50:59.931042 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1690 14:50:59.937735 MTRR: Fixed MSR 0x250 0x0606060606060606
1691 14:50:59.941011 MTRR: Fixed MSR 0x258 0x0606060606060606
1692 14:50:59.944622 MTRR: Fixed MSR 0x259 0x0000000000000000
1693 14:50:59.948092 MTRR: Fixed MSR 0x268 0x0606060606060606
1694 14:50:59.954716 MTRR: Fixed MSR 0x269 0x0606060606060606
1695 14:50:59.958104 MTRR: Fixed MSR 0x26a 0x0606060606060606
1696 14:50:59.961241 MTRR: Fixed MSR 0x26b 0x0606060606060606
1697 14:50:59.964267 MTRR: Fixed MSR 0x26c 0x0606060606060606
1698 14:50:59.970984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1699 14:50:59.974126 MTRR: Fixed MSR 0x26e 0x0606060606060606
1700 14:50:59.977388 MTRR: Fixed MSR 0x26f 0x0606060606060606
1701 14:50:59.980816 call enable_fixed_mtrr()
1702 14:50:59.984422 CPU physical address size: 39 bits
1703 14:50:59.987488 MTRR: default type WB/UC MTRR counts: 6/5.
1704 14:50:59.991288 MTRR: UC selected as default type.
1705 14:50:59.997594 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1706 14:51:00.003980 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1707 14:51:00.011541 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1708 14:51:00.017308 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1709 14:51:00.024096 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1710 14:51:00.024197
1711 14:51:00.024271 MTRR check
1712 14:51:00.027164 Fixed MTRRs : Enabled
1713 14:51:00.030778 Variable MTRRs: Enabled
1714 14:51:00.030877
1715 14:51:00.034044 MTRR: Fixed MSR 0x250 0x0606060606060606
1716 14:51:00.037306 MTRR: Fixed MSR 0x258 0x0606060606060606
1717 14:51:00.043739 MTRR: Fixed MSR 0x259 0x0000000000000000
1718 14:51:00.047203 MTRR: Fixed MSR 0x268 0x0606060606060606
1719 14:51:00.050567 MTRR: Fixed MSR 0x269 0x0606060606060606
1720 14:51:00.054034 MTRR: Fixed MSR 0x26a 0x0606060606060606
1721 14:51:00.060276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1722 14:51:00.063647 MTRR: Fixed MSR 0x26c 0x0606060606060606
1723 14:51:00.067388 MTRR: Fixed MSR 0x26d 0x0606060606060606
1724 14:51:00.070424 MTRR: Fixed MSR 0x26e 0x0606060606060606
1725 14:51:00.074193 MTRR: Fixed MSR 0x26f 0x0606060606060606
1726 14:51:00.080313 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 144 ms
1727 14:51:00.083662 call enable_fixed_mtrr()
1728 14:51:00.087521 Checking cr50 for pending updates
1729 14:51:00.091382 CPU physical address size: 39 bits
1730 14:51:00.095193 Reading cr50 TPM mode
1731 14:51:00.104442 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1732 14:51:00.112529 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1733 14:51:00.115464 Checking segment from ROM address 0xfff9d5b8
1734 14:51:00.122665 Checking segment from ROM address 0xfff9d5d4
1735 14:51:00.125668 Loading segment from ROM address 0xfff9d5b8
1736 14:51:00.129037 code (compression=0)
1737 14:51:00.135435 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1738 14:51:00.145499 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1739 14:51:00.148946 it's not compressed!
1740 14:51:00.274092 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1741 14:51:00.280652 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1742 14:51:00.288236 Loading segment from ROM address 0xfff9d5d4
1743 14:51:00.291433 Entry Point 0x30000000
1744 14:51:00.291526 Loaded segments
1745 14:51:00.298091 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 61 ms
1746 14:51:00.314316 Finalizing chipset.
1747 14:51:00.317534 Finalizing SMM.
1748 14:51:00.317628 APMC done.
1749 14:51:00.324828 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1750 14:51:00.328199 mp_park_aps done after 0 msecs.
1751 14:51:00.331045 Jumping to boot code at 0x30000000(0x76b4b000)
1752 14:51:00.341079 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1753 14:51:00.341242
1754 14:51:00.341382
1755 14:51:00.341519
1756 14:51:00.344004 Starting depthcharge on Magolor...
1757 14:51:00.344152
1758 14:51:00.344585 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1759 14:51:00.344773 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1760 14:51:00.344939 Setting prompt string to ['dedede:']
1761 14:51:00.345099 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1762 14:51:00.353977 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1763 14:51:00.354134
1764 14:51:00.360652 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1765 14:51:00.360803
1766 14:51:00.363941 fw_config match found: AUDIO_AMP=UNPROVISIONED
1767 14:51:00.364086
1768 14:51:00.367236 Wipe memory regions:
1769 14:51:00.367378
1770 14:51:00.370700 [0x00000000001000, 0x000000000a0000)
1771 14:51:00.370843
1772 14:51:00.374197 [0x00000000100000, 0x00000030000000)
1773 14:51:00.502698
1774 14:51:00.506051 [0x00000031062170, 0x00000076a15000)
1775 14:51:00.674923
1776 14:51:00.678062 [0x00000100000000, 0x00000180400000)
1777 14:51:01.741686
1778 14:51:01.741933 R8152: Initializing
1779 14:51:01.742073
1780 14:51:01.745298 Version 6 (ocp_data = 5c30)
1781 14:51:01.748323
1782 14:51:01.748472 R8152: Done initializing
1783 14:51:01.748603
1784 14:51:01.751912 Adding net device
1785 14:51:01.752056
1786 14:51:01.755004 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1787 14:51:01.758618
1788 14:51:01.758758
1789 14:51:01.758887
1790 14:51:01.759261 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1792 14:51:01.859725 dedede: tftpboot 192.168.201.1 10185518/tftp-deploy-3djbd5bw/kernel/bzImage 10185518/tftp-deploy-3djbd5bw/kernel/cmdline 10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
1793 14:51:01.859945 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1794 14:51:01.860105 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1795 14:51:01.864073 tftpboot 192.168.201.1 10185518/tftp-deploy-3djbd5bw/kernel/bzIploy-3djbd5bw/kernel/cmdline 10185518/tftp-deploy-3djbd5bw/ramdisk/ramdisk.cpio.gz
1796 14:51:01.864232
1797 14:51:01.864366 Waiting for link
1798 14:51:02.066034
1799 14:51:02.066255 done.
1800 14:51:02.066394
1801 14:51:02.066525 MAC: 00:24:32:30:7b:81
1802 14:51:02.066654
1803 14:51:02.069508 Sending DHCP discover... done.
1804 14:51:02.069655
1805 14:51:02.072939 Waiting for reply... done.
1806 14:51:02.073082
1807 14:51:02.076377 Sending DHCP request... done.
1808 14:51:02.076527
1809 14:51:02.082518 Waiting for reply... done.
1810 14:51:02.082663
1811 14:51:02.082794 My ip is 192.168.201.12
1812 14:51:02.082922
1813 14:51:02.085882 The DHCP server ip is 192.168.201.1
1814 14:51:02.086026
1815 14:51:02.092791 TFTP server IP predefined by user: 192.168.201.1
1816 14:51:02.092936
1817 14:51:02.099197 Bootfile predefined by user: 10185518/tftp-deploy-3djbd5bw/kernel/bzImage
1818 14:51:02.099342
1819 14:51:02.102810 Sending tftp read request... done.
1820 14:51:02.102953
1821 14:51:02.106241 Waiting for the transfer...
1822 14:51:02.106385
1823 14:51:02.663914 00000000 ################################################################
1824 14:51:02.664158
1825 14:51:03.213241 00080000 ################################################################
1826 14:51:03.213487
1827 14:51:03.778003 00100000 ################################################################
1828 14:51:03.778248
1829 14:51:04.351390 00180000 ################################################################
1830 14:51:04.351636
1831 14:51:04.943278 00200000 ################################################################
1832 14:51:04.943524
1833 14:51:05.558670 00280000 ################################################################
1834 14:51:05.558912
1835 14:51:06.152323 00300000 ################################################################
1836 14:51:06.152552
1837 14:51:06.751135 00380000 ################################################################
1838 14:51:06.751355
1839 14:51:07.334179 00400000 ################################################################
1840 14:51:07.334400
1841 14:51:07.896527 00480000 ################################################################
1842 14:51:07.896753
1843 14:51:08.481440 00500000 ################################################################
1844 14:51:08.481662
1845 14:51:09.054587 00580000 ################################################################
1846 14:51:09.054736
1847 14:51:09.638860 00600000 ################################################################
1848 14:51:09.639083
1849 14:51:10.211547 00680000 ################################################################
1850 14:51:10.211709
1851 14:51:10.783228 00700000 ################################################################
1852 14:51:10.783410
1853 14:51:10.796677 00780000 ## done.
1854 14:51:10.796772
1855 14:51:10.799853 The bootfile was 7876496 bytes long.
1856 14:51:10.799948
1857 14:51:10.803168 Sending tftp read request... done.
1858 14:51:10.803261
1859 14:51:10.807391 Waiting for the transfer...
1860 14:51:10.807485
1861 14:51:11.346172 00000000 ################################################################
1862 14:51:11.346330
1863 14:51:11.883660 00080000 ################################################################
1864 14:51:11.883840
1865 14:51:12.425030 00100000 ################################################################
1866 14:51:12.425192
1867 14:51:12.964732 00180000 ################################################################
1868 14:51:12.964895
1869 14:51:13.494954 00200000 ################################################################
1870 14:51:13.495117
1871 14:51:14.024445 00280000 ################################################################
1872 14:51:14.024586
1873 14:51:14.556138 00300000 ################################################################
1874 14:51:14.556317
1875 14:51:15.096367 00380000 ################################################################
1876 14:51:15.096601
1877 14:51:15.630890 00400000 ################################################################
1878 14:51:15.631038
1879 14:51:16.171658 00480000 ################################################################
1880 14:51:16.171840
1881 14:51:16.715840 00500000 ############################################################### done.
1882 14:51:16.715995
1883 14:51:16.719115 Sending tftp read request... done.
1884 14:51:16.719201
1885 14:51:16.722806 Waiting for the transfer...
1886 14:51:16.722896
1887 14:51:16.722967 00000000 # done.
1888 14:51:16.723038
1889 14:51:16.732776 Command line loaded dynamically from TFTP file: 10185518/tftp-deploy-3djbd5bw/kernel/cmdline
1890 14:51:16.732867
1891 14:51:16.752631 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185518/extract-nfsrootfs-5xj_eavk,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1892 14:51:16.752742
1893 14:51:16.756146 ec_init: CrosEC protocol v3 supported (256, 256)
1894 14:51:16.763788
1895 14:51:16.767478 Shutting down all USB controllers.
1896 14:51:16.767570
1897 14:51:16.767643 Removing current net device
1898 14:51:16.767711
1899 14:51:16.770612 Finalizing coreboot
1900 14:51:16.770705
1901 14:51:16.777276 Exiting depthcharge with code 4 at timestamp: 23270289
1902 14:51:16.777396
1903 14:51:16.777500
1904 14:51:16.777599 Starting kernel ...
1905 14:51:16.777695
1906 14:51:16.777789
1907 14:51:16.778395 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
1908 14:51:16.778529 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
1909 14:51:16.778642 Setting prompt string to ['Linux version [0-9]']
1910 14:51:16.778748 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1911 14:51:16.778855 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1913 14:55:46.778822 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
1915 14:55:46.779057 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
1917 14:55:46.779236 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1920 14:55:46.779580 end: 2 depthcharge-action (duration 00:05:00) [common]
1922 14:55:46.779834 Cleaning after the job
1923 14:55:46.779935 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/ramdisk
1924 14:55:46.780800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/kernel
1925 14:55:46.781831 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/nfsrootfs
1926 14:55:46.843129 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185518/tftp-deploy-3djbd5bw/modules
1927 14:55:46.843593 start: 5.1 power-off (timeout 00:00:30) [common]
1928 14:55:46.843795 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=off'
1929 14:55:46.921613 >> Command sent successfully.
1930 14:55:46.924251 Returned 0 in 0 seconds
1931 14:55:47.024565 end: 5.1 power-off (duration 00:00:00) [common]
1933 14:55:47.024923 start: 5.2 read-feedback (timeout 00:10:00) [common]
1934 14:55:47.025206 Listened to connection for namespace 'common' for up to 1s
1936 14:55:47.025610 Listened to connection for namespace 'common' for up to 1s
1937 14:55:48.026169 Finalising connection for namespace 'common'
1938 14:55:48.026397 Disconnecting from shell: Finalise
1939 14:55:48.026488
1940 14:55:48.126837 end: 5.2 read-feedback (duration 00:00:01) [common]
1941 14:55:48.126987 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185518
1942 14:55:48.399995 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185518
1943 14:55:48.400215 JobError: Your job cannot terminate cleanly.