Boot log: asus-C436FA-Flip-hatch

    1 14:50:37.854500  lava-dispatcher, installed at version: 2023.03
    2 14:50:37.854721  start: 0 validate
    3 14:50:37.854848  Start time: 2023-05-03 14:50:37.854840+00:00 (UTC)
    4 14:50:37.854978  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:50:37.855106  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:50:38.150047  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:50:38.150862  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:50:41.660911  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:50:41.661275  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:50:41.663340  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:50:41.663660  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:50:42.669461  validate duration: 4.81
   14 14:50:42.669847  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:50:42.669989  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:50:42.670119  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:50:42.670290  Not decompressing ramdisk as can be used compressed.
   18 14:50:42.670418  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/initrd.cpio.gz
   19 14:50:42.670518  saving as /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/ramdisk/initrd.cpio.gz
   20 14:50:42.670616  total size: 5432141 (5MB)
   21 14:50:42.672084  progress   0% (0MB)
   22 14:50:42.674485  progress   5% (0MB)
   23 14:50:42.676741  progress  10% (0MB)
   24 14:50:42.679022  progress  15% (0MB)
   25 14:50:42.681535  progress  20% (1MB)
   26 14:50:42.683778  progress  25% (1MB)
   27 14:50:42.686021  progress  30% (1MB)
   28 14:50:42.688531  progress  35% (1MB)
   29 14:50:42.690860  progress  40% (2MB)
   30 14:50:42.693097  progress  45% (2MB)
   31 14:50:42.695356  progress  50% (2MB)
   32 14:50:42.697880  progress  55% (2MB)
   33 14:50:42.700134  progress  60% (3MB)
   34 14:50:42.702424  progress  65% (3MB)
   35 14:50:42.704915  progress  70% (3MB)
   36 14:50:42.707181  progress  75% (3MB)
   37 14:50:42.709399  progress  80% (4MB)
   38 14:50:42.710889  progress  85% (4MB)
   39 14:50:42.712437  progress  90% (4MB)
   40 14:50:42.713859  progress  95% (4MB)
   41 14:50:42.715257  progress 100% (5MB)
   42 14:50:42.715480  5MB downloaded in 0.04s (115.48MB/s)
   43 14:50:42.715648  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 14:50:42.715909  end: 1.1 download-retry (duration 00:00:00) [common]
   46 14:50:42.716013  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 14:50:42.716116  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 14:50:42.716265  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 14:50:42.716342  saving as /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/kernel/bzImage
   50 14:50:42.716440  total size: 7876496 (7MB)
   51 14:50:42.716537  No compression specified
   52 14:50:42.718226  progress   0% (0MB)
   53 14:50:42.720578  progress   5% (0MB)
   54 14:50:42.722773  progress  10% (0MB)
   55 14:50:42.724846  progress  15% (1MB)
   56 14:50:42.727025  progress  20% (1MB)
   57 14:50:42.729069  progress  25% (1MB)
   58 14:50:42.731154  progress  30% (2MB)
   59 14:50:42.733195  progress  35% (2MB)
   60 14:50:42.735273  progress  40% (3MB)
   61 14:50:42.737356  progress  45% (3MB)
   62 14:50:42.739469  progress  50% (3MB)
   63 14:50:42.741662  progress  55% (4MB)
   64 14:50:42.743773  progress  60% (4MB)
   65 14:50:42.745879  progress  65% (4MB)
   66 14:50:42.747894  progress  70% (5MB)
   67 14:50:42.749918  progress  75% (5MB)
   68 14:50:42.751929  progress  80% (6MB)
   69 14:50:42.753978  progress  85% (6MB)
   70 14:50:42.755984  progress  90% (6MB)
   71 14:50:42.757996  progress  95% (7MB)
   72 14:50:42.760049  progress 100% (7MB)
   73 14:50:42.760202  7MB downloaded in 0.04s (171.66MB/s)
   74 14:50:42.760346  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 14:50:42.760571  end: 1.2 download-retry (duration 00:00:00) [common]
   77 14:50:42.760684  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 14:50:42.760767  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 14:50:42.760902  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/full.rootfs.tar.xz
   80 14:50:42.760986  saving as /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/nfsrootfs/full.rootfs.tar
   81 14:50:42.761049  total size: 133369160 (127MB)
   82 14:50:42.761110  Using unxz to decompress xz
   83 14:50:42.764975  progress   0% (0MB)
   84 14:50:43.109944  progress   5% (6MB)
   85 14:50:43.465339  progress  10% (12MB)
   86 14:50:43.756172  progress  15% (19MB)
   87 14:50:43.946760  progress  20% (25MB)
   88 14:50:44.194883  progress  25% (31MB)
   89 14:50:44.541422  progress  30% (38MB)
   90 14:50:44.898922  progress  35% (44MB)
   91 14:50:45.315912  progress  40% (50MB)
   92 14:50:45.710892  progress  45% (57MB)
   93 14:50:46.069759  progress  50% (63MB)
   94 14:50:46.443456  progress  55% (69MB)
   95 14:50:46.808808  progress  60% (76MB)
   96 14:50:47.174758  progress  65% (82MB)
   97 14:50:47.546957  progress  70% (89MB)
   98 14:50:47.926714  progress  75% (95MB)
   99 14:50:48.371230  progress  80% (101MB)
  100 14:50:48.822924  progress  85% (108MB)
  101 14:50:49.108331  progress  90% (114MB)
  102 14:50:49.474091  progress  95% (120MB)
  103 14:50:49.869925  progress 100% (127MB)
  104 14:50:49.874793  127MB downloaded in 7.11s (17.88MB/s)
  105 14:50:49.875166  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 14:50:49.875438  end: 1.3 download-retry (duration 00:00:07) [common]
  108 14:50:49.875531  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 14:50:49.875619  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 14:50:49.875776  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 14:50:49.875850  saving as /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/modules/modules.tar
  112 14:50:49.875912  total size: 251268 (0MB)
  113 14:50:49.875974  Using unxz to decompress xz
  114 14:50:49.879735  progress  13% (0MB)
  115 14:50:49.880139  progress  26% (0MB)
  116 14:50:49.880390  progress  39% (0MB)
  117 14:50:49.881796  progress  52% (0MB)
  118 14:50:49.883757  progress  65% (0MB)
  119 14:50:49.885635  progress  78% (0MB)
  120 14:50:49.887443  progress  91% (0MB)
  121 14:50:49.889226  progress 100% (0MB)
  122 14:50:49.894668  0MB downloaded in 0.02s (12.78MB/s)
  123 14:50:49.894922  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 14:50:49.895190  end: 1.4 download-retry (duration 00:00:00) [common]
  126 14:50:49.895288  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  127 14:50:49.895392  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  128 14:50:51.881949  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185540/extract-nfsrootfs-s2vp033r
  129 14:50:51.882138  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  130 14:50:51.882240  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  131 14:50:51.882398  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97
  132 14:50:51.882523  makedir: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin
  133 14:50:51.882623  makedir: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/tests
  134 14:50:51.882718  makedir: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/results
  135 14:50:51.882819  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-add-keys
  136 14:50:51.882957  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-add-sources
  137 14:50:51.883084  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-background-process-start
  138 14:50:51.883232  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-background-process-stop
  139 14:50:51.883372  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-common-functions
  140 14:50:51.883496  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-echo-ipv4
  141 14:50:51.883620  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-install-packages
  142 14:50:51.883740  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-installed-packages
  143 14:50:51.883861  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-os-build
  144 14:50:51.883984  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-probe-channel
  145 14:50:51.884105  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-probe-ip
  146 14:50:51.884228  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-target-ip
  147 14:50:51.884349  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-target-mac
  148 14:50:51.884469  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-target-storage
  149 14:50:51.884592  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-case
  150 14:50:51.884716  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-event
  151 14:50:51.884837  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-feedback
  152 14:50:51.884958  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-raise
  153 14:50:51.885079  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-reference
  154 14:50:51.885221  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-runner
  155 14:50:51.885356  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-set
  156 14:50:51.885498  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-test-shell
  157 14:50:51.885635  Updating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-install-packages (oe)
  158 14:50:51.885783  Updating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/bin/lava-installed-packages (oe)
  159 14:50:51.885904  Creating /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/environment
  160 14:50:51.885998  LAVA metadata
  161 14:50:51.886078  - LAVA_JOB_ID=10185540
  162 14:50:51.886143  - LAVA_DISPATCHER_IP=192.168.201.1
  163 14:50:51.886250  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  164 14:50:51.886318  skipped lava-vland-overlay
  165 14:50:51.886394  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 14:50:51.886474  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  167 14:50:51.886535  skipped lava-multinode-overlay
  168 14:50:51.886608  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 14:50:51.886686  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  170 14:50:51.886760  Loading test definitions
  171 14:50:51.886850  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  172 14:50:51.886924  Using /lava-10185540 at stage 0
  173 14:50:51.887272  uuid=10185540_1.5.2.3.1 testdef=None
  174 14:50:51.887407  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 14:50:51.887524  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  176 14:50:51.888027  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 14:50:51.888247  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  179 14:50:51.888875  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 14:50:51.889105  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  182 14:50:51.889965  runner path: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/0/tests/0_dmesg test_uuid 10185540_1.5.2.3.1
  183 14:50:51.890124  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 14:50:51.890351  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  186 14:50:51.890425  Using /lava-10185540 at stage 1
  187 14:50:51.890714  uuid=10185540_1.5.2.3.5 testdef=None
  188 14:50:51.890805  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 14:50:51.890890  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  190 14:50:51.891345  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 14:50:51.891562  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  193 14:50:51.892186  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 14:50:51.892414  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  196 14:50:51.893030  runner path: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/1/tests/1_bootrr test_uuid 10185540_1.5.2.3.5
  197 14:50:51.893182  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 14:50:51.893388  Creating lava-test-runner.conf files
  200 14:50:51.893452  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/0 for stage 0
  201 14:50:51.893584  - 0_dmesg
  202 14:50:51.893663  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185540/lava-overlay-cuyfhc97/lava-10185540/1 for stage 1
  203 14:50:51.893754  - 1_bootrr
  204 14:50:51.893848  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 14:50:51.893933  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  206 14:50:51.901232  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 14:50:51.901388  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  208 14:50:51.901487  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 14:50:51.901592  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 14:50:51.901677  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  211 14:50:52.034404  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 14:50:52.034771  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  213 14:50:52.034887  extracting modules file /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185540/extract-nfsrootfs-s2vp033r
  214 14:50:52.047469  extracting modules file /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185540/extract-overlay-ramdisk-7z247fqm/ramdisk
  215 14:50:52.060160  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 14:50:52.060329  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  217 14:50:52.060426  [common] Applying overlay to NFS
  218 14:50:52.060495  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185540/compress-overlay-8f56lsry/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185540/extract-nfsrootfs-s2vp033r
  219 14:50:52.068222  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 14:50:52.068345  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  221 14:50:52.068438  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 14:50:52.068529  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  223 14:50:52.068610  Building ramdisk /var/lib/lava/dispatcher/tmp/10185540/extract-overlay-ramdisk-7z247fqm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185540/extract-overlay-ramdisk-7z247fqm/ramdisk
  224 14:50:52.133641  >> 26161 blocks

  225 14:50:52.682650  rename /var/lib/lava/dispatcher/tmp/10185540/extract-overlay-ramdisk-7z247fqm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz
  226 14:50:52.683073  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 14:50:52.683189  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  228 14:50:52.683294  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  229 14:50:52.683390  No mkimage arch provided, not using FIT.
  230 14:50:52.683476  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 14:50:52.683559  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 14:50:52.683660  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 14:50:52.683746  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  234 14:50:52.683823  No LXC device requested
  235 14:50:52.683903  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 14:50:52.683986  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  237 14:50:52.684066  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 14:50:52.684136  Checking files for TFTP limit of 4294967296 bytes.
  239 14:50:52.684526  end: 1 tftp-deploy (duration 00:00:10) [common]
  240 14:50:52.684625  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 14:50:52.684718  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 14:50:52.684837  substitutions:
  243 14:50:52.684902  - {DTB}: None
  244 14:50:52.684965  - {INITRD}: 10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz
  245 14:50:52.685023  - {KERNEL}: 10185540/tftp-deploy-z0spqzil/kernel/bzImage
  246 14:50:52.685081  - {LAVA_MAC}: None
  247 14:50:52.685137  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185540/extract-nfsrootfs-s2vp033r
  248 14:50:52.685195  - {NFS_SERVER_IP}: 192.168.201.1
  249 14:50:52.685249  - {PRESEED_CONFIG}: None
  250 14:50:52.685304  - {PRESEED_LOCAL}: None
  251 14:50:52.685358  - {RAMDISK}: 10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz
  252 14:50:52.685411  - {ROOT_PART}: None
  253 14:50:52.685464  - {ROOT}: None
  254 14:50:52.685529  - {SERVER_IP}: 192.168.201.1
  255 14:50:52.685583  - {TEE}: None
  256 14:50:52.685636  Parsed boot commands:
  257 14:50:52.685690  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 14:50:52.685868  Parsed boot commands: tftpboot 192.168.201.1 10185540/tftp-deploy-z0spqzil/kernel/bzImage 10185540/tftp-deploy-z0spqzil/kernel/cmdline 10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz
  259 14:50:52.685956  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 14:50:52.686040  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 14:50:52.686128  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 14:50:52.686211  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 14:50:52.686283  Not connected, no need to disconnect.
  264 14:50:52.686357  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 14:50:52.686437  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 14:50:52.686504  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  267 14:50:52.689869  Setting prompt string to ['lava-test: # ']
  268 14:50:52.690191  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 14:50:52.690295  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 14:50:52.690389  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 14:50:52.690481  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 14:50:52.690663  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  273 14:50:57.823634  >> Command sent successfully.

  274 14:50:57.826067  Returned 0 in 5 seconds
  275 14:50:57.926493  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 14:50:57.927061  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 14:50:57.927280  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 14:50:57.927451  Setting prompt string to 'Starting depthcharge on Helios...'
  280 14:50:57.927564  Changing prompt to 'Starting depthcharge on Helios...'
  281 14:50:57.927685  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  282 14:50:57.928116  [Enter `^Ec?' for help]

  283 14:50:58.548271  

  284 14:50:58.548822  

  285 14:50:58.558383  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  286 14:50:58.561737  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  287 14:50:58.567844  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  288 14:50:58.571815  CPU: AES supported, TXT NOT supported, VT supported

  289 14:50:58.578325  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  290 14:50:58.581682  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  291 14:50:58.587970  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  292 14:50:58.591592  VBOOT: Loading verstage.

  293 14:50:58.594810  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  294 14:50:58.601544  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  295 14:50:58.604697  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  296 14:50:58.608296  CBFS @ c08000 size 3f8000

  297 14:50:58.614481  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  298 14:50:58.617974  CBFS: Locating 'fallback/verstage'

  299 14:50:58.621089  CBFS: Found @ offset 10fb80 size 1072c

  300 14:50:58.625260  

  301 14:50:58.625883  

  302 14:50:58.634766  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  303 14:50:58.649352  Probing TPM: . done!

  304 14:50:58.652722  TPM ready after 0 ms

  305 14:50:58.656138  Connected to device vid:did:rid of 1ae0:0028:00

  306 14:50:58.666181  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  307 14:50:58.669979  Initialized TPM device CR50 revision 0

  308 14:50:58.713626  tlcl_send_startup: Startup return code is 0

  309 14:50:58.714277  TPM: setup succeeded

  310 14:50:58.725955  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  311 14:50:58.729596  Chrome EC: UHEPI supported

  312 14:50:58.733188  Phase 1

  313 14:50:58.736509  FMAP: area GBB found @ c05000 (12288 bytes)

  314 14:50:58.742919  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  315 14:50:58.743342  Phase 2

  316 14:50:58.746468  Phase 3

  317 14:50:58.749534  FMAP: area GBB found @ c05000 (12288 bytes)

  318 14:50:58.756112  VB2:vb2_report_dev_firmware() This is developer signed firmware

  319 14:50:58.762762  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  320 14:50:58.766618  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  321 14:50:58.772990  VB2:vb2_verify_keyblock() Checking keyblock signature...

  322 14:50:58.788493  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  323 14:50:58.791942  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  324 14:50:58.798701  VB2:vb2_verify_fw_preamble() Verifying preamble.

  325 14:50:58.802440  Phase 4

  326 14:50:58.806422  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  327 14:50:58.812310  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  328 14:50:58.992296  VB2:vb2_rsa_verify_digest() Digest check failed!

  329 14:50:58.998622  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  330 14:50:58.998719  Saving nvdata

  331 14:50:59.001788  Reboot requested (10020007)

  332 14:50:59.005168  board_reset() called!

  333 14:50:59.005252  full_reset() called!

  334 14:51:03.515126  

  335 14:51:03.515268  

  336 14:51:03.524928  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  337 14:51:03.527911  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  338 14:51:03.534580  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  339 14:51:03.538267  CPU: AES supported, TXT NOT supported, VT supported

  340 14:51:03.544932  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  341 14:51:03.548054  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  342 14:51:03.555019  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  343 14:51:03.557975  VBOOT: Loading verstage.

  344 14:51:03.561663  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  345 14:51:03.568091  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  346 14:51:03.571726  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  347 14:51:03.574743  CBFS @ c08000 size 3f8000

  348 14:51:03.581556  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  349 14:51:03.584516  CBFS: Locating 'fallback/verstage'

  350 14:51:03.587907  CBFS: Found @ offset 10fb80 size 1072c

  351 14:51:03.592084  

  352 14:51:03.592165  

  353 14:51:03.601705  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  354 14:51:03.615647  Probing TPM: . done!

  355 14:51:03.618970  TPM ready after 0 ms

  356 14:51:03.622314  Connected to device vid:did:rid of 1ae0:0028:00

  357 14:51:03.632550  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  358 14:51:03.635864  Initialized TPM device CR50 revision 0

  359 14:51:03.679781  tlcl_send_startup: Startup return code is 0

  360 14:51:03.679912  TPM: setup succeeded

  361 14:51:03.692408  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  362 14:51:03.696366  Chrome EC: UHEPI supported

  363 14:51:03.699537  Phase 1

  364 14:51:03.703273  FMAP: area GBB found @ c05000 (12288 bytes)

  365 14:51:03.709479  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  366 14:51:03.716172  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  367 14:51:03.719366  Recovery requested (1009000e)

  368 14:51:03.725114  Saving nvdata

  369 14:51:03.731441  tlcl_extend: response is 0

  370 14:51:03.740625  tlcl_extend: response is 0

  371 14:51:03.746882  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 14:51:03.750511  CBFS @ c08000 size 3f8000

  373 14:51:03.757422  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 14:51:03.760345  CBFS: Locating 'fallback/romstage'

  375 14:51:03.763506  CBFS: Found @ offset 80 size 145fc

  376 14:51:03.767031  Accumulated console time in verstage 98 ms

  377 14:51:03.767118  

  378 14:51:03.767184  

  379 14:51:03.780314  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  380 14:51:03.787283  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  381 14:51:03.790049  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  382 14:51:03.793245  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  383 14:51:03.800299  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  384 14:51:03.803155  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  385 14:51:03.806424  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  386 14:51:03.809904  TCO_STS:   0000 0000

  387 14:51:03.813209  GEN_PMCON: e0015238 00000200

  388 14:51:03.816477  GBLRST_CAUSE: 00000000 00000000

  389 14:51:03.816564  prev_sleep_state 5

  390 14:51:03.819741  Boot Count incremented to 60827

  391 14:51:03.826809  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  392 14:51:03.829939  CBFS @ c08000 size 3f8000

  393 14:51:03.836498  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  394 14:51:03.836587  CBFS: Locating 'fspm.bin'

  395 14:51:03.842929  CBFS: Found @ offset 5ffc0 size 71000

  396 14:51:03.846500  Chrome EC: UHEPI supported

  397 14:51:03.853009  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  398 14:51:03.857092  Probing TPM:  done!

  399 14:51:03.863844  Connected to device vid:did:rid of 1ae0:0028:00

  400 14:51:03.873332  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  401 14:51:03.879436  Initialized TPM device CR50 revision 0

  402 14:51:03.888481  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  403 14:51:03.895232  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  404 14:51:03.898259  MRC cache found, size 1948

  405 14:51:03.901749  bootmode is set to: 2

  406 14:51:03.905364  PRMRR disabled by config.

  407 14:51:03.905451  SPD INDEX = 1

  408 14:51:03.911637  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  409 14:51:03.914748  CBFS @ c08000 size 3f8000

  410 14:51:03.921586  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  411 14:51:03.921672  CBFS: Locating 'spd.bin'

  412 14:51:03.925195  CBFS: Found @ offset 5fb80 size 400

  413 14:51:03.929488  SPD: module type is LPDDR3

  414 14:51:03.931400  SPD: module part is 

  415 14:51:03.938382  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  416 14:51:03.941602  SPD: device width 4 bits, bus width 8 bits

  417 14:51:03.944809  SPD: module size is 4096 MB (per channel)

  418 14:51:03.948073  memory slot: 0 configuration done.

  419 14:51:03.951149  memory slot: 2 configuration done.

  420 14:51:04.003453  CBMEM:

  421 14:51:04.006556  IMD: root @ 99fff000 254 entries.

  422 14:51:04.009781  IMD: root @ 99ffec00 62 entries.

  423 14:51:04.013275  External stage cache:

  424 14:51:04.016669  IMD: root @ 9abff000 254 entries.

  425 14:51:04.019980  IMD: root @ 9abfec00 62 entries.

  426 14:51:04.023153  Chrome EC: clear events_b mask to 0x0000000020004000

  427 14:51:04.043599  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  428 14:51:04.052702  tlcl_write: response is 0

  429 14:51:04.061267  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  430 14:51:04.068294  MRC: TPM MRC hash updated successfully.

  431 14:51:04.068382  2 DIMMs found

  432 14:51:04.071680  SMM Memory Map

  433 14:51:04.074511  SMRAM       : 0x9a000000 0x1000000

  434 14:51:04.078186   Subregion 0: 0x9a000000 0xa00000

  435 14:51:04.081239   Subregion 1: 0x9aa00000 0x200000

  436 14:51:04.084582   Subregion 2: 0x9ac00000 0x400000

  437 14:51:04.088187  top_of_ram = 0x9a000000

  438 14:51:04.091130  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  439 14:51:04.097589  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  440 14:51:04.101244  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  441 14:51:04.107792  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 14:51:04.111068  CBFS @ c08000 size 3f8000

  443 14:51:04.114133  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 14:51:04.117560  CBFS: Locating 'fallback/postcar'

  445 14:51:04.124618  CBFS: Found @ offset 107000 size 4b44

  446 14:51:04.127595  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  447 14:51:04.140125  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  448 14:51:04.143598  Processing 180 relocs. Offset value of 0x97c0c000

  449 14:51:04.152250  Accumulated console time in romstage 286 ms

  450 14:51:04.152339  

  451 14:51:04.152407  

  452 14:51:04.162222  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  453 14:51:04.168610  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  454 14:51:04.171791  CBFS @ c08000 size 3f8000

  455 14:51:04.175231  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  456 14:51:04.182162  CBFS: Locating 'fallback/ramstage'

  457 14:51:04.185369  CBFS: Found @ offset 43380 size 1b9e8

  458 14:51:04.192207  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  459 14:51:04.223730  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  460 14:51:04.227060  Processing 3976 relocs. Offset value of 0x98db0000

  461 14:51:04.234070  Accumulated console time in postcar 52 ms

  462 14:51:04.234155  

  463 14:51:04.234222  

  464 14:51:04.243770  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  465 14:51:04.250242  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  466 14:51:04.253747  WARNING: RO_VPD is uninitialized or empty.

  467 14:51:04.257011  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 14:51:04.263528  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  469 14:51:04.263615  Normal boot.

  470 14:51:04.270105  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  471 14:51:04.273867  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  472 14:51:04.276842  CBFS @ c08000 size 3f8000

  473 14:51:04.283562  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  474 14:51:04.286986  CBFS: Locating 'cpu_microcode_blob.bin'

  475 14:51:04.289935  CBFS: Found @ offset 14700 size 2ec00

  476 14:51:04.293367  microcode: sig=0x806ec pf=0x4 revision=0xc9

  477 14:51:04.296543  Skip microcode update

  478 14:51:04.303149  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  479 14:51:04.303235  CBFS @ c08000 size 3f8000

  480 14:51:04.309945  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  481 14:51:04.313154  CBFS: Locating 'fsps.bin'

  482 14:51:04.316367  CBFS: Found @ offset d1fc0 size 35000

  483 14:51:04.341769  Detected 4 core, 8 thread CPU.

  484 14:51:04.345221  Setting up SMI for CPU

  485 14:51:04.348488  IED base = 0x9ac00000

  486 14:51:04.348572  IED size = 0x00400000

  487 14:51:04.351975  Will perform SMM setup.

  488 14:51:04.358641  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  489 14:51:04.365321  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  490 14:51:04.368415  Processing 16 relocs. Offset value of 0x00030000

  491 14:51:04.371867  Attempting to start 7 APs

  492 14:51:04.375229  Waiting for 10ms after sending INIT.

  493 14:51:04.391831  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  494 14:51:04.391923  done.

  495 14:51:04.395665  AP: slot 1 apic_id 2.

  496 14:51:04.398298  AP: slot 3 apic_id 3.

  497 14:51:04.398381  AP: slot 7 apic_id 5.

  498 14:51:04.401566  AP: slot 6 apic_id 4.

  499 14:51:04.404726  Waiting for 2nd SIPI to complete...done.

  500 14:51:04.408188  AP: slot 5 apic_id 6.

  501 14:51:04.411504  AP: slot 4 apic_id 7.

  502 14:51:04.418364  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  503 14:51:04.421385  Processing 13 relocs. Offset value of 0x00038000

  504 14:51:04.428542  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  505 14:51:04.435582  Installing SMM handler to 0x9a000000

  506 14:51:04.441398  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  507 14:51:04.445017  Processing 658 relocs. Offset value of 0x9a010000

  508 14:51:04.454622  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  509 14:51:04.458246  Processing 13 relocs. Offset value of 0x9a008000

  510 14:51:04.464605  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  511 14:51:04.471470  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  512 14:51:04.474591  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  513 14:51:04.481299  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  514 14:51:04.488120  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  515 14:51:04.494703  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  516 14:51:04.497844  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  517 14:51:04.504711  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  518 14:51:04.508097  Clearing SMI status registers

  519 14:51:04.511690  SMI_STS: PM1 

  520 14:51:04.511791  PM1_STS: PWRBTN 

  521 14:51:04.514850  TCO_STS: SECOND_TO 

  522 14:51:04.518604  New SMBASE 0x9a000000

  523 14:51:04.518688  In relocation handler: CPU 0

  524 14:51:04.524518  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  525 14:51:04.527824  Writing SMRR. base = 0x9a000006, mask=0xff000800

  526 14:51:04.531135  Relocation complete.

  527 14:51:04.531218  New SMBASE 0x99fff800

  528 14:51:04.534647  In relocation handler: CPU 2

  529 14:51:04.541460  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  530 14:51:04.545724  Writing SMRR. base = 0x9a000006, mask=0xff000800

  531 14:51:04.548215  Relocation complete.

  532 14:51:04.548301  New SMBASE 0x99fffc00

  533 14:51:04.551459  In relocation handler: CPU 1

  534 14:51:04.554581  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  535 14:51:04.561378  Writing SMRR. base = 0x9a000006, mask=0xff000800

  536 14:51:04.564910  Relocation complete.

  537 14:51:04.564994  New SMBASE 0x99fff400

  538 14:51:04.568068  In relocation handler: CPU 3

  539 14:51:04.571347  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  540 14:51:04.577719  Writing SMRR. base = 0x9a000006, mask=0xff000800

  541 14:51:04.581522  Relocation complete.

  542 14:51:04.581607  New SMBASE 0x99ffe800

  543 14:51:04.584555  In relocation handler: CPU 6

  544 14:51:04.588501  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  545 14:51:04.594405  Writing SMRR. base = 0x9a000006, mask=0xff000800

  546 14:51:04.594490  Relocation complete.

  547 14:51:04.598169  New SMBASE 0x99ffe400

  548 14:51:04.601225  In relocation handler: CPU 7

  549 14:51:04.604689  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  550 14:51:04.611176  Writing SMRR. base = 0x9a000006, mask=0xff000800

  551 14:51:04.611261  Relocation complete.

  552 14:51:04.614332  New SMBASE 0x99fff000

  553 14:51:04.618127  In relocation handler: CPU 4

  554 14:51:04.621461  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  555 14:51:04.627511  Writing SMRR. base = 0x9a000006, mask=0xff000800

  556 14:51:04.627596  Relocation complete.

  557 14:51:04.630770  New SMBASE 0x99ffec00

  558 14:51:04.634252  In relocation handler: CPU 5

  559 14:51:04.637613  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  560 14:51:04.644161  Writing SMRR. base = 0x9a000006, mask=0xff000800

  561 14:51:04.644246  Relocation complete.

  562 14:51:04.647735  Initializing CPU #0

  563 14:51:04.651013  CPU: vendor Intel device 806ec

  564 14:51:04.654293  CPU: family 06, model 8e, stepping 0c

  565 14:51:04.657719  Clearing out pending MCEs

  566 14:51:04.661005  Setting up local APIC...

  567 14:51:04.661090   apic_id: 0x00 done.

  568 14:51:04.664413  Turbo is available but hidden

  569 14:51:04.667567  Turbo is available and visible

  570 14:51:04.670662  VMX status: enabled

  571 14:51:04.674904  IA32_FEATURE_CONTROL status: locked

  572 14:51:04.674988  Skip microcode update

  573 14:51:04.677778  CPU #0 initialized

  574 14:51:04.680880  Initializing CPU #2

  575 14:51:04.680964  Initializing CPU #7

  576 14:51:04.684233  Initializing CPU #6

  577 14:51:04.687732  CPU: vendor Intel device 806ec

  578 14:51:04.691125  CPU: family 06, model 8e, stepping 0c

  579 14:51:04.694452  Initializing CPU #3

  580 14:51:04.694536  Initializing CPU #1

  581 14:51:04.697391  CPU: vendor Intel device 806ec

  582 14:51:04.700780  CPU: family 06, model 8e, stepping 0c

  583 14:51:04.704133  CPU: vendor Intel device 806ec

  584 14:51:04.707454  CPU: family 06, model 8e, stepping 0c

  585 14:51:04.710999  Clearing out pending MCEs

  586 14:51:04.714311  Clearing out pending MCEs

  587 14:51:04.717487  Setting up local APIC...

  588 14:51:04.717571  Initializing CPU #5

  589 14:51:04.720905  Initializing CPU #4

  590 14:51:04.724367  CPU: vendor Intel device 806ec

  591 14:51:04.727419  CPU: family 06, model 8e, stepping 0c

  592 14:51:04.730830  CPU: vendor Intel device 806ec

  593 14:51:04.734001  CPU: family 06, model 8e, stepping 0c

  594 14:51:04.737786  Clearing out pending MCEs

  595 14:51:04.740572  Clearing out pending MCEs

  596 14:51:04.740655  Setting up local APIC...

  597 14:51:04.743875  CPU: vendor Intel device 806ec

  598 14:51:04.750861  CPU: family 06, model 8e, stepping 0c

  599 14:51:04.750948  Clearing out pending MCEs

  600 14:51:04.754372  Setting up local APIC...

  601 14:51:04.757377  Setting up local APIC...

  602 14:51:04.761034  CPU: vendor Intel device 806ec

  603 14:51:04.764291  CPU: family 06, model 8e, stepping 0c

  604 14:51:04.767278  Clearing out pending MCEs

  605 14:51:04.770478  Clearing out pending MCEs

  606 14:51:04.770562  Setting up local APIC...

  607 14:51:04.773935   apic_id: 0x02 done.

  608 14:51:04.776962   apic_id: 0x03 done.

  609 14:51:04.777047  VMX status: enabled

  610 14:51:04.780526  VMX status: enabled

  611 14:51:04.783860  IA32_FEATURE_CONTROL status: locked

  612 14:51:04.787708  IA32_FEATURE_CONTROL status: locked

  613 14:51:04.790635  Skip microcode update

  614 14:51:04.790719  Skip microcode update

  615 14:51:04.793704  CPU #1 initialized

  616 14:51:04.796902  CPU #3 initialized

  617 14:51:04.796985   apic_id: 0x07 done.

  618 14:51:04.800450   apic_id: 0x06 done.

  619 14:51:04.800534  VMX status: enabled

  620 14:51:04.803937  VMX status: enabled

  621 14:51:04.807191  IA32_FEATURE_CONTROL status: locked

  622 14:51:04.810341  IA32_FEATURE_CONTROL status: locked

  623 14:51:04.813594  Skip microcode update

  624 14:51:04.816940  Skip microcode update

  625 14:51:04.817024  CPU #4 initialized

  626 14:51:04.820415  CPU #5 initialized

  627 14:51:04.820499   apic_id: 0x04 done.

  628 14:51:04.823878  Setting up local APIC...

  629 14:51:04.827188  Setting up local APIC...

  630 14:51:04.830458   apic_id: 0x05 done.

  631 14:51:04.830541  VMX status: enabled

  632 14:51:04.833724  VMX status: enabled

  633 14:51:04.836797  IA32_FEATURE_CONTROL status: locked

  634 14:51:04.840272  IA32_FEATURE_CONTROL status: locked

  635 14:51:04.843710  Skip microcode update

  636 14:51:04.843793  Skip microcode update

  637 14:51:04.846747  CPU #6 initialized

  638 14:51:04.846831  CPU #7 initialized

  639 14:51:04.850161   apic_id: 0x01 done.

  640 14:51:04.853480  VMX status: enabled

  641 14:51:04.856963  IA32_FEATURE_CONTROL status: locked

  642 14:51:04.857047  Skip microcode update

  643 14:51:04.860217  CPU #2 initialized

  644 14:51:04.863889  bsp_do_flight_plan done after 457 msecs.

  645 14:51:04.866709  CPU: frequency set to 4200 MHz

  646 14:51:04.870567  Enabling SMIs.

  647 14:51:04.870651  Locking SMM.

  648 14:51:04.885441  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  649 14:51:04.888928  CBFS @ c08000 size 3f8000

  650 14:51:04.895746  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  651 14:51:04.895832  CBFS: Locating 'vbt.bin'

  652 14:51:04.899079  CBFS: Found @ offset 5f5c0 size 499

  653 14:51:04.905717  Found a VBT of 4608 bytes after decompression

  654 14:51:05.083958  Display FSP Version Info HOB

  655 14:51:05.087170  Reference Code - CPU = 9.0.1e.30

  656 14:51:05.090636  uCode Version = 0.0.0.ca

  657 14:51:05.094186  TXT ACM version = ff.ff.ff.ffff

  658 14:51:05.097369  Display FSP Version Info HOB

  659 14:51:05.100352  Reference Code - ME = 9.0.1e.30

  660 14:51:05.103842  MEBx version = 0.0.0.0

  661 14:51:05.107141  ME Firmware Version = Consumer SKU

  662 14:51:05.110422  Display FSP Version Info HOB

  663 14:51:05.114031  Reference Code - CML PCH = 9.0.1e.30

  664 14:51:05.117312  PCH-CRID Status = Disabled

  665 14:51:05.120148  PCH-CRID Original Value = ff.ff.ff.ffff

  666 14:51:05.123717  PCH-CRID New Value = ff.ff.ff.ffff

  667 14:51:05.127344  OPROM - RST - RAID = ff.ff.ff.ffff

  668 14:51:05.130359  ChipsetInit Base Version = ff.ff.ff.ffff

  669 14:51:05.133393  ChipsetInit Oem Version = ff.ff.ff.ffff

  670 14:51:05.137129  Display FSP Version Info HOB

  671 14:51:05.143521  Reference Code - SA - System Agent = 9.0.1e.30

  672 14:51:05.146755  Reference Code - MRC = 0.7.1.6c

  673 14:51:05.146866  SA - PCIe Version = 9.0.1e.30

  674 14:51:05.150257  SA-CRID Status = Disabled

  675 14:51:05.153564  SA-CRID Original Value = 0.0.0.c

  676 14:51:05.157104  SA-CRID New Value = 0.0.0.c

  677 14:51:05.161163  OPROM - VBIOS = ff.ff.ff.ffff

  678 14:51:05.163547  RTC Init

  679 14:51:05.166735  Set power on after power failure.

  680 14:51:05.166819  Disabling Deep S3

  681 14:51:05.170328  Disabling Deep S3

  682 14:51:05.170412  Disabling Deep S4

  683 14:51:05.173756  Disabling Deep S4

  684 14:51:05.173839  Disabling Deep S5

  685 14:51:05.176912  Disabling Deep S5

  686 14:51:05.183402  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 189 exit 1

  687 14:51:05.183487  Enumerating buses...

  688 14:51:05.190204  Show all devs... Before device enumeration.

  689 14:51:05.190289  Root Device: enabled 1

  690 14:51:05.193480  CPU_CLUSTER: 0: enabled 1

  691 14:51:05.196745  DOMAIN: 0000: enabled 1

  692 14:51:05.199997  APIC: 00: enabled 1

  693 14:51:05.200083  PCI: 00:00.0: enabled 1

  694 14:51:05.203514  PCI: 00:02.0: enabled 1

  695 14:51:05.206841  PCI: 00:04.0: enabled 0

  696 14:51:05.206925  PCI: 00:05.0: enabled 0

  697 14:51:05.210620  PCI: 00:12.0: enabled 1

  698 14:51:05.213606  PCI: 00:12.5: enabled 0

  699 14:51:05.217074  PCI: 00:12.6: enabled 0

  700 14:51:05.217158  PCI: 00:14.0: enabled 1

  701 14:51:05.220064  PCI: 00:14.1: enabled 0

  702 14:51:05.223615  PCI: 00:14.3: enabled 1

  703 14:51:05.226752  PCI: 00:14.5: enabled 0

  704 14:51:05.226852  PCI: 00:15.0: enabled 1

  705 14:51:05.230291  PCI: 00:15.1: enabled 1

  706 14:51:05.233308  PCI: 00:15.2: enabled 0

  707 14:51:05.236764  PCI: 00:15.3: enabled 0

  708 14:51:05.236847  PCI: 00:16.0: enabled 1

  709 14:51:05.240288  PCI: 00:16.1: enabled 0

  710 14:51:05.243141  PCI: 00:16.2: enabled 0

  711 14:51:05.243226  PCI: 00:16.3: enabled 0

  712 14:51:05.246718  PCI: 00:16.4: enabled 0

  713 14:51:05.250028  PCI: 00:16.5: enabled 0

  714 14:51:05.253409  PCI: 00:17.0: enabled 1

  715 14:51:05.253546  PCI: 00:19.0: enabled 1

  716 14:51:05.256711  PCI: 00:19.1: enabled 0

  717 14:51:05.259988  PCI: 00:19.2: enabled 0

  718 14:51:05.263343  PCI: 00:1a.0: enabled 0

  719 14:51:05.263427  PCI: 00:1c.0: enabled 0

  720 14:51:05.266614  PCI: 00:1c.1: enabled 0

  721 14:51:05.269745  PCI: 00:1c.2: enabled 0

  722 14:51:05.272958  PCI: 00:1c.3: enabled 0

  723 14:51:05.273042  PCI: 00:1c.4: enabled 0

  724 14:51:05.276732  PCI: 00:1c.5: enabled 0

  725 14:51:05.279613  PCI: 00:1c.6: enabled 0

  726 14:51:05.279690  PCI: 00:1c.7: enabled 0

  727 14:51:05.282865  PCI: 00:1d.0: enabled 1

  728 14:51:05.286196  PCI: 00:1d.1: enabled 0

  729 14:51:05.289642  PCI: 00:1d.2: enabled 0

  730 14:51:05.289726  PCI: 00:1d.3: enabled 0

  731 14:51:05.292961  PCI: 00:1d.4: enabled 0

  732 14:51:05.296535  PCI: 00:1d.5: enabled 1

  733 14:51:05.300004  PCI: 00:1e.0: enabled 1

  734 14:51:05.300088  PCI: 00:1e.1: enabled 0

  735 14:51:05.303804  PCI: 00:1e.2: enabled 1

  736 14:51:05.306578  PCI: 00:1e.3: enabled 1

  737 14:51:05.309776  PCI: 00:1f.0: enabled 1

  738 14:51:05.309860  PCI: 00:1f.1: enabled 1

  739 14:51:05.312950  PCI: 00:1f.2: enabled 1

  740 14:51:05.316136  PCI: 00:1f.3: enabled 1

  741 14:51:05.316220  PCI: 00:1f.4: enabled 1

  742 14:51:05.319775  PCI: 00:1f.5: enabled 1

  743 14:51:05.322662  PCI: 00:1f.6: enabled 0

  744 14:51:05.326351  USB0 port 0: enabled 1

  745 14:51:05.326435  I2C: 00:15: enabled 1

  746 14:51:05.329761  I2C: 00:5d: enabled 1

  747 14:51:05.333084  GENERIC: 0.0: enabled 1

  748 14:51:05.333167  I2C: 00:1a: enabled 1

  749 14:51:05.335965  I2C: 00:38: enabled 1

  750 14:51:05.339466  I2C: 00:39: enabled 1

  751 14:51:05.339573  I2C: 00:3a: enabled 1

  752 14:51:05.342912  I2C: 00:3b: enabled 1

  753 14:51:05.346204  PCI: 00:00.0: enabled 1

  754 14:51:05.346296  SPI: 00: enabled 1

  755 14:51:05.349825  SPI: 01: enabled 1

  756 14:51:05.352482  PNP: 0c09.0: enabled 1

  757 14:51:05.352570  USB2 port 0: enabled 1

  758 14:51:05.356056  USB2 port 1: enabled 1

  759 14:51:05.359335  USB2 port 2: enabled 0

  760 14:51:05.362686  USB2 port 3: enabled 0

  761 14:51:05.362772  USB2 port 5: enabled 0

  762 14:51:05.366124  USB2 port 6: enabled 1

  763 14:51:05.369378  USB2 port 9: enabled 1

  764 14:51:05.369462  USB3 port 0: enabled 1

  765 14:51:05.372668  USB3 port 1: enabled 1

  766 14:51:05.375990  USB3 port 2: enabled 1

  767 14:51:05.376064  USB3 port 3: enabled 1

  768 14:51:05.379516  USB3 port 4: enabled 0

  769 14:51:05.382702  APIC: 02: enabled 1

  770 14:51:05.382789  APIC: 01: enabled 1

  771 14:51:05.385902  APIC: 03: enabled 1

  772 14:51:05.389627  APIC: 07: enabled 1

  773 14:51:05.389710  APIC: 06: enabled 1

  774 14:51:05.392487  APIC: 04: enabled 1

  775 14:51:05.392573  APIC: 05: enabled 1

  776 14:51:05.396404  Compare with tree...

  777 14:51:05.399171  Root Device: enabled 1

  778 14:51:05.402567   CPU_CLUSTER: 0: enabled 1

  779 14:51:05.402650    APIC: 00: enabled 1

  780 14:51:05.405774    APIC: 02: enabled 1

  781 14:51:05.409075    APIC: 01: enabled 1

  782 14:51:05.409157    APIC: 03: enabled 1

  783 14:51:05.412538    APIC: 07: enabled 1

  784 14:51:05.415852    APIC: 06: enabled 1

  785 14:51:05.415936    APIC: 04: enabled 1

  786 14:51:05.419138    APIC: 05: enabled 1

  787 14:51:05.422824   DOMAIN: 0000: enabled 1

  788 14:51:05.425798    PCI: 00:00.0: enabled 1

  789 14:51:05.425883    PCI: 00:02.0: enabled 1

  790 14:51:05.429568    PCI: 00:04.0: enabled 0

  791 14:51:05.432341    PCI: 00:05.0: enabled 0

  792 14:51:05.435576    PCI: 00:12.0: enabled 1

  793 14:51:05.439365    PCI: 00:12.5: enabled 0

  794 14:51:05.439448    PCI: 00:12.6: enabled 0

  795 14:51:05.442750    PCI: 00:14.0: enabled 1

  796 14:51:05.445646     USB0 port 0: enabled 1

  797 14:51:05.448923      USB2 port 0: enabled 1

  798 14:51:05.452143      USB2 port 1: enabled 1

  799 14:51:05.452228      USB2 port 2: enabled 0

  800 14:51:05.455528      USB2 port 3: enabled 0

  801 14:51:05.459318      USB2 port 5: enabled 0

  802 14:51:05.462587      USB2 port 6: enabled 1

  803 14:51:05.465476      USB2 port 9: enabled 1

  804 14:51:05.468684      USB3 port 0: enabled 1

  805 14:51:05.468767      USB3 port 1: enabled 1

  806 14:51:05.472400      USB3 port 2: enabled 1

  807 14:51:05.475521      USB3 port 3: enabled 1

  808 14:51:05.479002      USB3 port 4: enabled 0

  809 14:51:05.482194    PCI: 00:14.1: enabled 0

  810 14:51:05.482278    PCI: 00:14.3: enabled 1

  811 14:51:05.485652    PCI: 00:14.5: enabled 0

  812 14:51:05.488738    PCI: 00:15.0: enabled 1

  813 14:51:05.492325     I2C: 00:15: enabled 1

  814 14:51:05.492408    PCI: 00:15.1: enabled 1

  815 14:51:05.495802     I2C: 00:5d: enabled 1

  816 14:51:05.498859     GENERIC: 0.0: enabled 1

  817 14:51:05.502392    PCI: 00:15.2: enabled 0

  818 14:51:05.505650    PCI: 00:15.3: enabled 0

  819 14:51:05.505733    PCI: 00:16.0: enabled 1

  820 14:51:05.508893    PCI: 00:16.1: enabled 0

  821 14:51:05.512584    PCI: 00:16.2: enabled 0

  822 14:51:05.515311    PCI: 00:16.3: enabled 0

  823 14:51:05.518891    PCI: 00:16.4: enabled 0

  824 14:51:05.518975    PCI: 00:16.5: enabled 0

  825 14:51:05.522145    PCI: 00:17.0: enabled 1

  826 14:51:05.525284    PCI: 00:19.0: enabled 1

  827 14:51:05.528941     I2C: 00:1a: enabled 1

  828 14:51:05.529024     I2C: 00:38: enabled 1

  829 14:51:05.532298     I2C: 00:39: enabled 1

  830 14:51:05.535369     I2C: 00:3a: enabled 1

  831 14:51:05.539014     I2C: 00:3b: enabled 1

  832 14:51:05.541895    PCI: 00:19.1: enabled 0

  833 14:51:05.541980    PCI: 00:19.2: enabled 0

  834 14:51:05.545637    PCI: 00:1a.0: enabled 0

  835 14:51:05.548734    PCI: 00:1c.0: enabled 0

  836 14:51:05.551904    PCI: 00:1c.1: enabled 0

  837 14:51:05.555280    PCI: 00:1c.2: enabled 0

  838 14:51:05.555364    PCI: 00:1c.3: enabled 0

  839 14:51:05.558808    PCI: 00:1c.4: enabled 0

  840 14:51:05.562296    PCI: 00:1c.5: enabled 0

  841 14:51:05.565337    PCI: 00:1c.6: enabled 0

  842 14:51:05.568543    PCI: 00:1c.7: enabled 0

  843 14:51:05.568628    PCI: 00:1d.0: enabled 1

  844 14:51:05.571627    PCI: 00:1d.1: enabled 0

  845 14:51:05.575026    PCI: 00:1d.2: enabled 0

  846 14:51:05.578459    PCI: 00:1d.3: enabled 0

  847 14:51:05.578544    PCI: 00:1d.4: enabled 0

  848 14:51:05.581760    PCI: 00:1d.5: enabled 1

  849 14:51:05.584914     PCI: 00:00.0: enabled 1

  850 14:51:05.588401    PCI: 00:1e.0: enabled 1

  851 14:51:05.591662    PCI: 00:1e.1: enabled 0

  852 14:51:05.591747    PCI: 00:1e.2: enabled 1

  853 14:51:05.594902     SPI: 00: enabled 1

  854 14:51:05.598314    PCI: 00:1e.3: enabled 1

  855 14:51:05.601983     SPI: 01: enabled 1

  856 14:51:05.602067    PCI: 00:1f.0: enabled 1

  857 14:51:05.605386     PNP: 0c09.0: enabled 1

  858 14:51:05.608142    PCI: 00:1f.1: enabled 1

  859 14:51:05.611525    PCI: 00:1f.2: enabled 1

  860 14:51:05.614923    PCI: 00:1f.3: enabled 1

  861 14:51:05.615007    PCI: 00:1f.4: enabled 1

  862 14:51:05.618498    PCI: 00:1f.5: enabled 1

  863 14:51:05.621537    PCI: 00:1f.6: enabled 0

  864 14:51:05.625129  Root Device scanning...

  865 14:51:05.628449  scan_static_bus for Root Device

  866 14:51:05.628533  CPU_CLUSTER: 0 enabled

  867 14:51:05.631769  DOMAIN: 0000 enabled

  868 14:51:05.634932  DOMAIN: 0000 scanning...

  869 14:51:05.638117  PCI: pci_scan_bus for bus 00

  870 14:51:05.641792  PCI: 00:00.0 [8086/0000] ops

  871 14:51:05.644807  PCI: 00:00.0 [8086/9b61] enabled

  872 14:51:05.648475  PCI: 00:02.0 [8086/0000] bus ops

  873 14:51:05.651832  PCI: 00:02.0 [8086/9b41] enabled

  874 14:51:05.654977  PCI: 00:04.0 [8086/1903] disabled

  875 14:51:05.658171  PCI: 00:08.0 [8086/1911] enabled

  876 14:51:05.661677  PCI: 00:12.0 [8086/02f9] enabled

  877 14:51:05.665031  PCI: 00:14.0 [8086/0000] bus ops

  878 14:51:05.668295  PCI: 00:14.0 [8086/02ed] enabled

  879 14:51:05.671598  PCI: 00:14.2 [8086/02ef] enabled

  880 14:51:05.674970  PCI: 00:14.3 [8086/02f0] enabled

  881 14:51:05.678427  PCI: 00:15.0 [8086/0000] bus ops

  882 14:51:05.681424  PCI: 00:15.0 [8086/02e8] enabled

  883 14:51:05.684584  PCI: 00:15.1 [8086/0000] bus ops

  884 14:51:05.688143  PCI: 00:15.1 [8086/02e9] enabled

  885 14:51:05.691806  PCI: 00:16.0 [8086/0000] ops

  886 14:51:05.694758  PCI: 00:16.0 [8086/02e0] enabled

  887 14:51:05.698342  PCI: 00:17.0 [8086/0000] ops

  888 14:51:05.698425  PCI: 00:17.0 [8086/02d3] enabled

  889 14:51:05.701801  PCI: 00:19.0 [8086/0000] bus ops

  890 14:51:05.705288  PCI: 00:19.0 [8086/02c5] enabled

  891 14:51:05.708781  PCI: 00:1d.0 [8086/0000] bus ops

  892 14:51:05.711596  PCI: 00:1d.0 [8086/02b0] enabled

  893 14:51:05.718447  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  894 14:51:05.721618  PCI: 00:1e.0 [8086/0000] ops

  895 14:51:05.724678  PCI: 00:1e.0 [8086/02a8] enabled

  896 14:51:05.728282  PCI: 00:1e.2 [8086/0000] bus ops

  897 14:51:05.731466  PCI: 00:1e.2 [8086/02aa] enabled

  898 14:51:05.735082  PCI: 00:1e.3 [8086/0000] bus ops

  899 14:51:05.737895  PCI: 00:1e.3 [8086/02ab] enabled

  900 14:51:05.741228  PCI: 00:1f.0 [8086/0000] bus ops

  901 14:51:05.745029  PCI: 00:1f.0 [8086/0284] enabled

  902 14:51:05.751268  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  903 14:51:05.757976  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  904 14:51:05.760918  PCI: 00:1f.3 [8086/0000] bus ops

  905 14:51:05.764426  PCI: 00:1f.3 [8086/02c8] enabled

  906 14:51:05.767902  PCI: 00:1f.4 [8086/0000] bus ops

  907 14:51:05.771425  PCI: 00:1f.4 [8086/02a3] enabled

  908 14:51:05.774492  PCI: 00:1f.5 [8086/0000] bus ops

  909 14:51:05.778161  PCI: 00:1f.5 [8086/02a4] enabled

  910 14:51:05.778273  PCI: Leftover static devices:

  911 14:51:05.780852  PCI: 00:05.0

  912 14:51:05.780936  PCI: 00:12.5

  913 14:51:05.784192  PCI: 00:12.6

  914 14:51:05.784274  PCI: 00:14.1

  915 14:51:05.787498  PCI: 00:14.5

  916 14:51:05.787581  PCI: 00:15.2

  917 14:51:05.787645  PCI: 00:15.3

  918 14:51:05.791373  PCI: 00:16.1

  919 14:51:05.791455  PCI: 00:16.2

  920 14:51:05.794464  PCI: 00:16.3

  921 14:51:05.794545  PCI: 00:16.4

  922 14:51:05.794609  PCI: 00:16.5

  923 14:51:05.797480  PCI: 00:19.1

  924 14:51:05.797575  PCI: 00:19.2

  925 14:51:05.800852  PCI: 00:1a.0

  926 14:51:05.800933  PCI: 00:1c.0

  927 14:51:05.800997  PCI: 00:1c.1

  928 14:51:05.804705  PCI: 00:1c.2

  929 14:51:05.804786  PCI: 00:1c.3

  930 14:51:05.807417  PCI: 00:1c.4

  931 14:51:05.807499  PCI: 00:1c.5

  932 14:51:05.811434  PCI: 00:1c.6

  933 14:51:05.811516  PCI: 00:1c.7

  934 14:51:05.811580  PCI: 00:1d.1

  935 14:51:05.813970  PCI: 00:1d.2

  936 14:51:05.814055  PCI: 00:1d.3

  937 14:51:05.817477  PCI: 00:1d.4

  938 14:51:05.817572  PCI: 00:1d.5

  939 14:51:05.817637  PCI: 00:1e.1

  940 14:51:05.820726  PCI: 00:1f.1

  941 14:51:05.820807  PCI: 00:1f.2

  942 14:51:05.824155  PCI: 00:1f.6

  943 14:51:05.827732  PCI: Check your devicetree.cb.

  944 14:51:05.827813  PCI: 00:02.0 scanning...

  945 14:51:05.830751  scan_generic_bus for PCI: 00:02.0

  946 14:51:05.837234  scan_generic_bus for PCI: 00:02.0 done

  947 14:51:05.840817  scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs

  948 14:51:05.844031  PCI: 00:14.0 scanning...

  949 14:51:05.847449  scan_static_bus for PCI: 00:14.0

  950 14:51:05.850918  USB0 port 0 enabled

  951 14:51:05.853890  USB0 port 0 scanning...

  952 14:51:05.857203  scan_static_bus for USB0 port 0

  953 14:51:05.857288  USB2 port 0 enabled

  954 14:51:05.860753  USB2 port 1 enabled

  955 14:51:05.860838  USB2 port 2 disabled

  956 14:51:05.863810  USB2 port 3 disabled

  957 14:51:05.867118  USB2 port 5 disabled

  958 14:51:05.867203  USB2 port 6 enabled

  959 14:51:05.870525  USB2 port 9 enabled

  960 14:51:05.873912  USB3 port 0 enabled

  961 14:51:05.873997  USB3 port 1 enabled

  962 14:51:05.876873  USB3 port 2 enabled

  963 14:51:05.876994  USB3 port 3 enabled

  964 14:51:05.880441  USB3 port 4 disabled

  965 14:51:05.883892  USB2 port 0 scanning...

  966 14:51:05.887159  scan_static_bus for USB2 port 0

  967 14:51:05.890942  scan_static_bus for USB2 port 0 done

  968 14:51:05.897380  scan_bus: scanning of bus USB2 port 0 took 9703 usecs

  969 14:51:05.897474  USB2 port 1 scanning...

  970 14:51:05.900527  scan_static_bus for USB2 port 1

  971 14:51:05.907062  scan_static_bus for USB2 port 1 done

  972 14:51:05.910014  scan_bus: scanning of bus USB2 port 1 took 9700 usecs

  973 14:51:05.913893  USB2 port 6 scanning...

  974 14:51:05.916688  scan_static_bus for USB2 port 6

  975 14:51:05.920352  scan_static_bus for USB2 port 6 done

  976 14:51:05.926956  scan_bus: scanning of bus USB2 port 6 took 9709 usecs

  977 14:51:05.927042  USB2 port 9 scanning...

  978 14:51:05.930178  scan_static_bus for USB2 port 9

  979 14:51:05.936857  scan_static_bus for USB2 port 9 done

  980 14:51:05.940225  scan_bus: scanning of bus USB2 port 9 took 9709 usecs

  981 14:51:05.943614  USB3 port 0 scanning...

  982 14:51:05.946749  scan_static_bus for USB3 port 0

  983 14:51:05.950454  scan_static_bus for USB3 port 0 done

  984 14:51:05.956638  scan_bus: scanning of bus USB3 port 0 took 9711 usecs

  985 14:51:05.956719  USB3 port 1 scanning...

  986 14:51:05.960812  scan_static_bus for USB3 port 1

  987 14:51:05.967107  scan_static_bus for USB3 port 1 done

  988 14:51:05.970618  scan_bus: scanning of bus USB3 port 1 took 9696 usecs

  989 14:51:05.973573  USB3 port 2 scanning...

  990 14:51:05.976904  scan_static_bus for USB3 port 2

  991 14:51:05.980205  scan_static_bus for USB3 port 2 done

  992 14:51:05.986835  scan_bus: scanning of bus USB3 port 2 took 9701 usecs

  993 14:51:05.986918  USB3 port 3 scanning...

  994 14:51:05.990334  scan_static_bus for USB3 port 3

  995 14:51:05.996735  scan_static_bus for USB3 port 3 done

  996 14:51:06.000249  scan_bus: scanning of bus USB3 port 3 took 9708 usecs

  997 14:51:06.003462  scan_static_bus for USB0 port 0 done

  998 14:51:06.010475  scan_bus: scanning of bus USB0 port 0 took 155507 usecs

  999 14:51:06.013321  scan_static_bus for PCI: 00:14.0 done

 1000 14:51:06.020235  scan_bus: scanning of bus PCI: 00:14.0 took 173132 usecs

 1001 14:51:06.023309  PCI: 00:15.0 scanning...

 1002 14:51:06.026886  scan_generic_bus for PCI: 00:15.0

 1003 14:51:06.030034  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1004 14:51:06.033391  scan_generic_bus for PCI: 00:15.0 done

 1005 14:51:06.040048  scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs

 1006 14:51:06.043164  PCI: 00:15.1 scanning...

 1007 14:51:06.046797  scan_generic_bus for PCI: 00:15.1

 1008 14:51:06.050270  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1009 14:51:06.053360  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1010 14:51:06.056258  scan_generic_bus for PCI: 00:15.1 done

 1011 14:51:06.063019  scan_bus: scanning of bus PCI: 00:15.1 took 18606 usecs

 1012 14:51:06.066100  PCI: 00:19.0 scanning...

 1013 14:51:06.069449  scan_generic_bus for PCI: 00:19.0

 1014 14:51:06.073039  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1015 14:51:06.076481  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1016 14:51:06.082666  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1017 14:51:06.086096  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1018 14:51:06.089226  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1019 14:51:06.092554  scan_generic_bus for PCI: 00:19.0 done

 1020 14:51:06.099589  scan_bus: scanning of bus PCI: 00:19.0 took 30762 usecs

 1021 14:51:06.102839  PCI: 00:1d.0 scanning...

 1022 14:51:06.105737  do_pci_scan_bridge for PCI: 00:1d.0

 1023 14:51:06.109396  PCI: pci_scan_bus for bus 01

 1024 14:51:06.112367  PCI: 01:00.0 [1c5c/1327] enabled

 1025 14:51:06.115802  Enabling Common Clock Configuration

 1026 14:51:06.119206  L1 Sub-State supported from root port 29

 1027 14:51:06.122336  L1 Sub-State Support = 0xf

 1028 14:51:06.125937  CommonModeRestoreTime = 0x28

 1029 14:51:06.129585  Power On Value = 0x16, Power On Scale = 0x0

 1030 14:51:06.132577  ASPM: Enabled L1

 1031 14:51:06.139007  scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs

 1032 14:51:06.139078  PCI: 00:1e.2 scanning...

 1033 14:51:06.142625  scan_generic_bus for PCI: 00:1e.2

 1034 14:51:06.149179  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1035 14:51:06.152387  scan_generic_bus for PCI: 00:1e.2 done

 1036 14:51:06.155933  scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs

 1037 14:51:06.159089  PCI: 00:1e.3 scanning...

 1038 14:51:06.162508  scan_generic_bus for PCI: 00:1e.3

 1039 14:51:06.165922  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1040 14:51:06.172370  scan_generic_bus for PCI: 00:1e.3 done

 1041 14:51:06.175660  scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs

 1042 14:51:06.178962  PCI: 00:1f.0 scanning...

 1043 14:51:06.182485  scan_static_bus for PCI: 00:1f.0

 1044 14:51:06.185750  PNP: 0c09.0 enabled

 1045 14:51:06.189125  scan_static_bus for PCI: 00:1f.0 done

 1046 14:51:06.195874  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs

 1047 14:51:06.195957  PCI: 00:1f.3 scanning...

 1048 14:51:06.202385  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1049 14:51:06.205689  PCI: 00:1f.4 scanning...

 1050 14:51:06.208980  scan_generic_bus for PCI: 00:1f.4

 1051 14:51:06.212018  scan_generic_bus for PCI: 00:1f.4 done

 1052 14:51:06.218716  scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs

 1053 14:51:06.222313  PCI: 00:1f.5 scanning...

 1054 14:51:06.225064  scan_generic_bus for PCI: 00:1f.5

 1055 14:51:06.229120  scan_generic_bus for PCI: 00:1f.5 done

 1056 14:51:06.235439  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs

 1057 14:51:06.238759  scan_bus: scanning of bus DOMAIN: 0000 took 605288 usecs

 1058 14:51:06.241845  scan_static_bus for Root Device done

 1059 14:51:06.248486  scan_bus: scanning of bus Root Device took 625167 usecs

 1060 14:51:06.248604  done

 1061 14:51:06.252007  Chrome EC: UHEPI supported

 1062 14:51:06.258192  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1063 14:51:06.264984  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1064 14:51:06.271400  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1065 14:51:06.278078  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1066 14:51:06.281574  SPI flash protection: WPSW=0 SRP0=0

 1067 14:51:06.287938  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1068 14:51:06.291199  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1069 14:51:06.294470  found VGA at PCI: 00:02.0

 1070 14:51:06.297817  Setting up VGA for PCI: 00:02.0

 1071 14:51:06.304339  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1072 14:51:06.307614  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1073 14:51:06.311191  Allocating resources...

 1074 14:51:06.311272  Reading resources...

 1075 14:51:06.317961  Root Device read_resources bus 0 link: 0

 1076 14:51:06.322200  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1077 14:51:06.327633  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1078 14:51:06.330832  DOMAIN: 0000 read_resources bus 0 link: 0

 1079 14:51:06.337665  PCI: 00:14.0 read_resources bus 0 link: 0

 1080 14:51:06.340960  USB0 port 0 read_resources bus 0 link: 0

 1081 14:51:06.349013  USB0 port 0 read_resources bus 0 link: 0 done

 1082 14:51:06.352590  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1083 14:51:06.359810  PCI: 00:15.0 read_resources bus 1 link: 0

 1084 14:51:06.363238  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1085 14:51:06.369967  PCI: 00:15.1 read_resources bus 2 link: 0

 1086 14:51:06.373090  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1087 14:51:06.380468  PCI: 00:19.0 read_resources bus 3 link: 0

 1088 14:51:06.386995  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1089 14:51:06.390484  PCI: 00:1d.0 read_resources bus 1 link: 0

 1090 14:51:06.397132  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1091 14:51:06.400475  PCI: 00:1e.2 read_resources bus 4 link: 0

 1092 14:51:06.407289  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1093 14:51:06.410566  PCI: 00:1e.3 read_resources bus 5 link: 0

 1094 14:51:06.416916  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1095 14:51:06.420330  PCI: 00:1f.0 read_resources bus 0 link: 0

 1096 14:51:06.427069  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1097 14:51:06.433913  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1098 14:51:06.437077  Root Device read_resources bus 0 link: 0 done

 1099 14:51:06.440497  Done reading resources.

 1100 14:51:06.443511  Show resources in subtree (Root Device)...After reading.

 1101 14:51:06.450111   Root Device child on link 0 CPU_CLUSTER: 0

 1102 14:51:06.453312    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1103 14:51:06.453412     APIC: 00

 1104 14:51:06.456633     APIC: 02

 1105 14:51:06.456718     APIC: 01

 1106 14:51:06.460297     APIC: 03

 1107 14:51:06.460393     APIC: 07

 1108 14:51:06.460492     APIC: 06

 1109 14:51:06.463256     APIC: 04

 1110 14:51:06.463353     APIC: 05

 1111 14:51:06.467155    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 14:51:06.476605    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 14:51:06.486965    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1114 14:51:06.536678     PCI: 00:00.0

 1115 14:51:06.537031     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 14:51:06.537498     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 14:51:06.537849     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 14:51:06.538123     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 14:51:06.538236     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 14:51:06.544578     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 14:51:06.554793     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 14:51:06.565277     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 14:51:06.574657     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 14:51:06.581169     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1125 14:51:06.591335     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1126 14:51:06.601350     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1127 14:51:06.611484     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 14:51:06.620740     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 14:51:06.630959     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1130 14:51:06.637936     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1131 14:51:06.641101     PCI: 00:02.0

 1132 14:51:06.650954     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1133 14:51:06.660971     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1134 14:51:06.670817     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1135 14:51:06.670902     PCI: 00:04.0

 1136 14:51:06.674175     PCI: 00:08.0

 1137 14:51:06.683820     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1138 14:51:06.683907     PCI: 00:12.0

 1139 14:51:06.693913     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1140 14:51:06.697480     PCI: 00:14.0 child on link 0 USB0 port 0

 1141 14:51:06.707093     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1142 14:51:06.714287      USB0 port 0 child on link 0 USB2 port 0

 1143 14:51:06.714367       USB2 port 0

 1144 14:51:06.717359       USB2 port 1

 1145 14:51:06.717472       USB2 port 2

 1146 14:51:06.720303       USB2 port 3

 1147 14:51:06.720374       USB2 port 5

 1148 14:51:06.723523       USB2 port 6

 1149 14:51:06.723600       USB2 port 9

 1150 14:51:06.727170       USB3 port 0

 1151 14:51:06.730296       USB3 port 1

 1152 14:51:06.730366       USB3 port 2

 1153 14:51:06.733981       USB3 port 3

 1154 14:51:06.734049       USB3 port 4

 1155 14:51:06.737154     PCI: 00:14.2

 1156 14:51:06.746833     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1157 14:51:06.757257     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1158 14:51:06.757376     PCI: 00:14.3

 1159 14:51:06.766767     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1160 14:51:06.770186     PCI: 00:15.0 child on link 0 I2C: 01:15

 1161 14:51:06.780185     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1162 14:51:06.783456      I2C: 01:15

 1163 14:51:06.786810     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1164 14:51:06.797214     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 14:51:06.800287      I2C: 02:5d

 1166 14:51:06.800361      GENERIC: 0.0

 1167 14:51:06.803414     PCI: 00:16.0

 1168 14:51:06.813364     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1169 14:51:06.813510     PCI: 00:17.0

 1170 14:51:06.823406     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1171 14:51:06.833452     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1172 14:51:06.839956     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1173 14:51:06.849704     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1174 14:51:06.856418     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1175 14:51:06.866381     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1176 14:51:06.869720     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1177 14:51:06.879551     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1178 14:51:06.883158      I2C: 03:1a

 1179 14:51:06.883246      I2C: 03:38

 1180 14:51:06.883310      I2C: 03:39

 1181 14:51:06.886671      I2C: 03:3a

 1182 14:51:06.886753      I2C: 03:3b

 1183 14:51:06.893081     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1184 14:51:06.899575     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1185 14:51:06.909337     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1186 14:51:06.919237     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1187 14:51:06.922630      PCI: 01:00.0

 1188 14:51:06.932855      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1189 14:51:06.932940     PCI: 00:1e.0

 1190 14:51:06.942726     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1191 14:51:06.952762     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1192 14:51:06.959421     PCI: 00:1e.2 child on link 0 SPI: 00

 1193 14:51:06.969478     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 14:51:06.969604      SPI: 00

 1195 14:51:06.973000     PCI: 00:1e.3 child on link 0 SPI: 01

 1196 14:51:06.982649     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 14:51:06.985829      SPI: 01

 1198 14:51:06.989404     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1199 14:51:06.996202     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1200 14:51:07.005888     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1201 14:51:07.009337      PNP: 0c09.0

 1202 14:51:07.015841      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1203 14:51:07.019364     PCI: 00:1f.3

 1204 14:51:07.029598     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 14:51:07.038829     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1206 14:51:07.038922     PCI: 00:1f.4

 1207 14:51:07.049011     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1208 14:51:07.058733     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1209 14:51:07.062079     PCI: 00:1f.5

 1210 14:51:07.068858     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1211 14:51:07.075272  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1212 14:51:07.082155  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1213 14:51:07.089219  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1214 14:51:07.091891  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1215 14:51:07.095408  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1216 14:51:07.098720  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1217 14:51:07.105124  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1218 14:51:07.111738  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1219 14:51:07.118617  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1220 14:51:07.125177  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1221 14:51:07.135720  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1222 14:51:07.141826  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1223 14:51:07.145267  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1224 14:51:07.151529  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1225 14:51:07.155194  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1226 14:51:07.161810  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1227 14:51:07.164782  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1228 14:51:07.171479  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1229 14:51:07.174992  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1230 14:51:07.181544  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1231 14:51:07.185153  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1232 14:51:07.191584  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1233 14:51:07.194779  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1234 14:51:07.201603  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1235 14:51:07.204548  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1236 14:51:07.211151  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1237 14:51:07.214755  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1238 14:51:07.221059  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1239 14:51:07.224372  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1240 14:51:07.231240  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1241 14:51:07.236348  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1242 14:51:07.237709  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1243 14:51:07.244243  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1244 14:51:07.247794  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1245 14:51:07.254258  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1246 14:51:07.257365  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1247 14:51:07.264126  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1248 14:51:07.271258  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1249 14:51:07.277255  avoid_fixed_resources: DOMAIN: 0000

 1250 14:51:07.280539  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1251 14:51:07.287193  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1252 14:51:07.294240  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1253 14:51:07.304203  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1254 14:51:07.311024  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1255 14:51:07.317014  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1256 14:51:07.327206  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1257 14:51:07.333786  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1258 14:51:07.340242  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1259 14:51:07.350063  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1260 14:51:07.356760  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1261 14:51:07.363612  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1262 14:51:07.366639  Setting resources...

 1263 14:51:07.373147  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1264 14:51:07.376432  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1265 14:51:07.380101  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1266 14:51:07.383080  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1267 14:51:07.386391  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1268 14:51:07.393372  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1269 14:51:07.399806  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1270 14:51:07.406397  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1271 14:51:07.413051  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1272 14:51:07.419703  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1273 14:51:07.423537  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1274 14:51:07.429733  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1275 14:51:07.433079  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1276 14:51:07.439627  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1277 14:51:07.443289  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1278 14:51:07.449399  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1279 14:51:07.452752  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1280 14:51:07.459394  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1281 14:51:07.463245  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1282 14:51:07.469334  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1283 14:51:07.473148  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1284 14:51:07.479232  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1285 14:51:07.482904  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1286 14:51:07.486015  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1287 14:51:07.492610  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1288 14:51:07.496140  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1289 14:51:07.502780  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1290 14:51:07.505866  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1291 14:51:07.512734  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1292 14:51:07.516156  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1293 14:51:07.522793  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1294 14:51:07.526280  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1295 14:51:07.533363  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1296 14:51:07.542179  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1297 14:51:07.549197  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1298 14:51:07.555749  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1299 14:51:07.562279  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1300 14:51:07.569400  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1301 14:51:07.572040  Root Device assign_resources, bus 0 link: 0

 1302 14:51:07.578888  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1303 14:51:07.585388  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1304 14:51:07.595312  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1305 14:51:07.601758  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1306 14:51:07.611823  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1307 14:51:07.618450  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1308 14:51:07.628573  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1309 14:51:07.631756  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 14:51:07.635209  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1311 14:51:07.645351  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1312 14:51:07.651746  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1313 14:51:07.662340  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1314 14:51:07.668625  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1315 14:51:07.675165  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 14:51:07.678222  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1317 14:51:07.688107  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1318 14:51:07.691239  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 14:51:07.694901  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1320 14:51:07.704925  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1321 14:51:07.711260  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1322 14:51:07.721275  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1323 14:51:07.727850  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1324 14:51:07.734623  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1325 14:51:07.744509  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1326 14:51:07.751230  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1327 14:51:07.757862  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1328 14:51:07.764476  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 14:51:07.767681  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1330 14:51:07.777340  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1331 14:51:07.787484  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1332 14:51:07.793792  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1333 14:51:07.798199  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1334 14:51:07.807451  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1335 14:51:07.810724  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1336 14:51:07.820916  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1337 14:51:07.827185  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1338 14:51:07.834179  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 14:51:07.837290  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1340 14:51:07.847432  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1341 14:51:07.850567  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 14:51:07.853862  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1343 14:51:07.860574  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 14:51:07.863832  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1345 14:51:07.870750  LPC: Trying to open IO window from 800 size 1ff

 1346 14:51:07.877391  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1347 14:51:07.887388  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1348 14:51:07.893620  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1349 14:51:07.903708  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1350 14:51:07.906995  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1351 14:51:07.913401  Root Device assign_resources, bus 0 link: 0

 1352 14:51:07.913550  Done setting resources.

 1353 14:51:07.920865  Show resources in subtree (Root Device)...After assigning values.

 1354 14:51:07.926963   Root Device child on link 0 CPU_CLUSTER: 0

 1355 14:51:07.929818    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1356 14:51:07.929899     APIC: 00

 1357 14:51:07.933178     APIC: 02

 1358 14:51:07.933257     APIC: 01

 1359 14:51:07.933319     APIC: 03

 1360 14:51:07.936669     APIC: 07

 1361 14:51:07.936748     APIC: 06

 1362 14:51:07.940004     APIC: 04

 1363 14:51:07.940084     APIC: 05

 1364 14:51:07.943307    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1365 14:51:07.953191    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1366 14:51:07.966616    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1367 14:51:07.966761     PCI: 00:00.0

 1368 14:51:07.976510     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1369 14:51:07.986093     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1370 14:51:07.996131     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1371 14:51:08.002835     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1372 14:51:08.012390     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1373 14:51:08.022681     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1374 14:51:08.032347     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1375 14:51:08.042769     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1376 14:51:08.052073     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1377 14:51:08.058959     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1378 14:51:08.068962     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1379 14:51:08.079017     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1380 14:51:08.088420     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1381 14:51:08.098743     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1382 14:51:08.108372     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1383 14:51:08.114833     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1384 14:51:08.118244     PCI: 00:02.0

 1385 14:51:08.128104     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1386 14:51:08.138096     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1387 14:51:08.148346     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1388 14:51:08.151585     PCI: 00:04.0

 1389 14:51:08.151706     PCI: 00:08.0

 1390 14:51:08.161309     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1391 14:51:08.164732     PCI: 00:12.0

 1392 14:51:08.174302     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1393 14:51:08.177786     PCI: 00:14.0 child on link 0 USB0 port 0

 1394 14:51:08.187760     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1395 14:51:08.194722      USB0 port 0 child on link 0 USB2 port 0

 1396 14:51:08.194817       USB2 port 0

 1397 14:51:08.197752       USB2 port 1

 1398 14:51:08.197834       USB2 port 2

 1399 14:51:08.200839       USB2 port 3

 1400 14:51:08.200920       USB2 port 5

 1401 14:51:08.204419       USB2 port 6

 1402 14:51:08.204502       USB2 port 9

 1403 14:51:08.207448       USB3 port 0

 1404 14:51:08.207529       USB3 port 1

 1405 14:51:08.210835       USB3 port 2

 1406 14:51:08.214425       USB3 port 3

 1407 14:51:08.214507       USB3 port 4

 1408 14:51:08.217431     PCI: 00:14.2

 1409 14:51:08.227369     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1410 14:51:08.237491     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1411 14:51:08.237603     PCI: 00:14.3

 1412 14:51:08.247118     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1413 14:51:08.253857     PCI: 00:15.0 child on link 0 I2C: 01:15

 1414 14:51:08.263972     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1415 14:51:08.264061      I2C: 01:15

 1416 14:51:08.270393     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1417 14:51:08.280135     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1418 14:51:08.280277      I2C: 02:5d

 1419 14:51:08.283964      GENERIC: 0.0

 1420 14:51:08.284054     PCI: 00:16.0

 1421 14:51:08.293695     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1422 14:51:08.297308     PCI: 00:17.0

 1423 14:51:08.306823     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1424 14:51:08.316760     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1425 14:51:08.326782     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1426 14:51:08.336765     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1427 14:51:08.342999     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1428 14:51:08.353009     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1429 14:51:08.359735     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1430 14:51:08.369450     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1431 14:51:08.369557      I2C: 03:1a

 1432 14:51:08.373051      I2C: 03:38

 1433 14:51:08.373132      I2C: 03:39

 1434 14:51:08.376588      I2C: 03:3a

 1435 14:51:08.376703      I2C: 03:3b

 1436 14:51:08.379982     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1437 14:51:08.389393     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1438 14:51:08.399886     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1439 14:51:08.409405     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1440 14:51:08.412820      PCI: 01:00.0

 1441 14:51:08.422712      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1442 14:51:08.425875     PCI: 00:1e.0

 1443 14:51:08.436115     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1444 14:51:08.446112     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1445 14:51:08.449031     PCI: 00:1e.2 child on link 0 SPI: 00

 1446 14:51:08.459231     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1447 14:51:08.462165      SPI: 00

 1448 14:51:08.465630     PCI: 00:1e.3 child on link 0 SPI: 01

 1449 14:51:08.475538     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1450 14:51:08.478840      SPI: 01

 1451 14:51:08.482028     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1452 14:51:08.488870     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1453 14:51:08.498485     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1454 14:51:08.501765      PNP: 0c09.0

 1455 14:51:08.508432      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1456 14:51:08.512114     PCI: 00:1f.3

 1457 14:51:08.521929     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1458 14:51:08.531492     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1459 14:51:08.535042     PCI: 00:1f.4

 1460 14:51:08.541897     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1461 14:51:08.551626     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1462 14:51:08.554911     PCI: 00:1f.5

 1463 14:51:08.564728     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1464 14:51:08.567938  Done allocating resources.

 1465 14:51:08.575215  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1466 14:51:08.575313  Enabling resources...

 1467 14:51:08.582022  PCI: 00:00.0 subsystem <- 8086/9b61

 1468 14:51:08.582105  PCI: 00:00.0 cmd <- 06

 1469 14:51:08.585609  PCI: 00:02.0 subsystem <- 8086/9b41

 1470 14:51:08.588499  PCI: 00:02.0 cmd <- 03

 1471 14:51:08.591898  PCI: 00:08.0 cmd <- 06

 1472 14:51:08.595258  PCI: 00:12.0 subsystem <- 8086/02f9

 1473 14:51:08.598473  PCI: 00:12.0 cmd <- 02

 1474 14:51:08.601679  PCI: 00:14.0 subsystem <- 8086/02ed

 1475 14:51:08.605437  PCI: 00:14.0 cmd <- 02

 1476 14:51:08.608170  PCI: 00:14.2 cmd <- 02

 1477 14:51:08.611720  PCI: 00:14.3 subsystem <- 8086/02f0

 1478 14:51:08.611802  PCI: 00:14.3 cmd <- 02

 1479 14:51:08.618461  PCI: 00:15.0 subsystem <- 8086/02e8

 1480 14:51:08.618542  PCI: 00:15.0 cmd <- 02

 1481 14:51:08.621880  PCI: 00:15.1 subsystem <- 8086/02e9

 1482 14:51:08.624893  PCI: 00:15.1 cmd <- 02

 1483 14:51:08.628515  PCI: 00:16.0 subsystem <- 8086/02e0

 1484 14:51:08.631744  PCI: 00:16.0 cmd <- 02

 1485 14:51:08.635053  PCI: 00:17.0 subsystem <- 8086/02d3

 1486 14:51:08.638739  PCI: 00:17.0 cmd <- 03

 1487 14:51:08.641822  PCI: 00:19.0 subsystem <- 8086/02c5

 1488 14:51:08.644960  PCI: 00:19.0 cmd <- 02

 1489 14:51:08.648462  PCI: 00:1d.0 bridge ctrl <- 0013

 1490 14:51:08.651799  PCI: 00:1d.0 subsystem <- 8086/02b0

 1491 14:51:08.654792  PCI: 00:1d.0 cmd <- 06

 1492 14:51:08.658228  PCI: 00:1e.0 subsystem <- 8086/02a8

 1493 14:51:08.661321  PCI: 00:1e.0 cmd <- 06

 1494 14:51:08.664715  PCI: 00:1e.2 subsystem <- 8086/02aa

 1495 14:51:08.668215  PCI: 00:1e.2 cmd <- 06

 1496 14:51:08.671121  PCI: 00:1e.3 subsystem <- 8086/02ab

 1497 14:51:08.671196  PCI: 00:1e.3 cmd <- 02

 1498 14:51:08.678239  PCI: 00:1f.0 subsystem <- 8086/0284

 1499 14:51:08.678319  PCI: 00:1f.0 cmd <- 407

 1500 14:51:08.684977  PCI: 00:1f.3 subsystem <- 8086/02c8

 1501 14:51:08.685053  PCI: 00:1f.3 cmd <- 02

 1502 14:51:08.687944  PCI: 00:1f.4 subsystem <- 8086/02a3

 1503 14:51:08.691581  PCI: 00:1f.4 cmd <- 03

 1504 14:51:08.694616  PCI: 00:1f.5 subsystem <- 8086/02a4

 1505 14:51:08.697747  PCI: 00:1f.5 cmd <- 406

 1506 14:51:08.707160  PCI: 01:00.0 cmd <- 02

 1507 14:51:08.712343  done.

 1508 14:51:08.720330  ME: Version: 14.0.39.1367

 1509 14:51:08.727329  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8

 1510 14:51:08.730186  Initializing devices...

 1511 14:51:08.730266  Root Device init ...

 1512 14:51:08.736851  Chrome EC: Set SMI mask to 0x0000000000000000

 1513 14:51:08.740874  Chrome EC: clear events_b mask to 0x0000000000000000

 1514 14:51:08.747012  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1515 14:51:08.753330  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1516 14:51:08.760218  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1517 14:51:08.763228  Chrome EC: Set WAKE mask to 0x0000000000000000

 1518 14:51:08.766610  Root Device init finished in 35155 usecs

 1519 14:51:08.770293  CPU_CLUSTER: 0 init ...

 1520 14:51:08.776827  CPU_CLUSTER: 0 init finished in 2445 usecs

 1521 14:51:08.781244  PCI: 00:00.0 init ...

 1522 14:51:08.784229  CPU TDP: 15 Watts

 1523 14:51:08.787558  CPU PL2 = 64 Watts

 1524 14:51:08.791138  PCI: 00:00.0 init finished in 7068 usecs

 1525 14:51:08.794519  PCI: 00:02.0 init ...

 1526 14:51:08.797711  PCI: 00:02.0 init finished in 2252 usecs

 1527 14:51:08.800666  PCI: 00:08.0 init ...

 1528 14:51:08.804250  PCI: 00:08.0 init finished in 2251 usecs

 1529 14:51:08.807733  PCI: 00:12.0 init ...

 1530 14:51:08.810727  PCI: 00:12.0 init finished in 2252 usecs

 1531 14:51:08.814062  PCI: 00:14.0 init ...

 1532 14:51:08.817448  PCI: 00:14.0 init finished in 2252 usecs

 1533 14:51:08.820960  PCI: 00:14.2 init ...

 1534 14:51:08.824391  PCI: 00:14.2 init finished in 2252 usecs

 1535 14:51:08.827733  PCI: 00:14.3 init ...

 1536 14:51:08.830329  PCI: 00:14.3 init finished in 2268 usecs

 1537 14:51:08.833862  PCI: 00:15.0 init ...

 1538 14:51:08.837285  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1539 14:51:08.840292  PCI: 00:15.0 init finished in 5973 usecs

 1540 14:51:08.843830  PCI: 00:15.1 init ...

 1541 14:51:08.846891  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1542 14:51:08.853500  PCI: 00:15.1 init finished in 5965 usecs

 1543 14:51:08.853624  PCI: 00:16.0 init ...

 1544 14:51:08.860243  PCI: 00:16.0 init finished in 2253 usecs

 1545 14:51:08.863394  PCI: 00:19.0 init ...

 1546 14:51:08.866673  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1547 14:51:08.870154  PCI: 00:19.0 init finished in 5974 usecs

 1548 14:51:08.873788  PCI: 00:1d.0 init ...

 1549 14:51:08.876807  Initializing PCH PCIe bridge.

 1550 14:51:08.880028  PCI: 00:1d.0 init finished in 5282 usecs

 1551 14:51:08.883530  PCI: 00:1f.0 init ...

 1552 14:51:08.886633  IOAPIC: Initializing IOAPIC at 0xfec00000

 1553 14:51:08.893433  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1554 14:51:08.893521  IOAPIC: ID = 0x02

 1555 14:51:08.896822  IOAPIC: Dumping registers

 1556 14:51:08.900193    reg 0x0000: 0x02000000

 1557 14:51:08.903058    reg 0x0001: 0x00770020

 1558 14:51:08.903140    reg 0x0002: 0x00000000

 1559 14:51:08.909793  PCI: 00:1f.0 init finished in 23526 usecs

 1560 14:51:08.913058  PCI: 00:1f.4 init ...

 1561 14:51:08.916571  PCI: 00:1f.4 init finished in 2261 usecs

 1562 14:51:08.926975  PCI: 01:00.0 init ...

 1563 14:51:08.930525  PCI: 01:00.0 init finished in 2243 usecs

 1564 14:51:08.935013  PNP: 0c09.0 init ...

 1565 14:51:08.938357  Google Chrome EC uptime: 11.086 seconds

 1566 14:51:08.944439  Google Chrome AP resets since EC boot: 0

 1567 14:51:08.947863  Google Chrome most recent AP reset causes:

 1568 14:51:08.954648  Google Chrome EC reset flags at last EC boot: reset-pin

 1569 14:51:08.957936  PNP: 0c09.0 init finished in 20610 usecs

 1570 14:51:08.961299  Devices initialized

 1571 14:51:08.964534  Show all devs... After init.

 1572 14:51:08.964709  Root Device: enabled 1

 1573 14:51:08.967935  CPU_CLUSTER: 0: enabled 1

 1574 14:51:08.971075  DOMAIN: 0000: enabled 1

 1575 14:51:08.971318  APIC: 00: enabled 1

 1576 14:51:08.974424  PCI: 00:00.0: enabled 1

 1577 14:51:08.978039  PCI: 00:02.0: enabled 1

 1578 14:51:08.981496  PCI: 00:04.0: enabled 0

 1579 14:51:08.981919  PCI: 00:05.0: enabled 0

 1580 14:51:08.984356  PCI: 00:12.0: enabled 1

 1581 14:51:08.987992  PCI: 00:12.5: enabled 0

 1582 14:51:08.991131  PCI: 00:12.6: enabled 0

 1583 14:51:08.991485  PCI: 00:14.0: enabled 1

 1584 14:51:08.994630  PCI: 00:14.1: enabled 0

 1585 14:51:08.997843  PCI: 00:14.3: enabled 1

 1586 14:51:08.998197  PCI: 00:14.5: enabled 0

 1587 14:51:09.001016  PCI: 00:15.0: enabled 1

 1588 14:51:09.004153  PCI: 00:15.1: enabled 1

 1589 14:51:09.007577  PCI: 00:15.2: enabled 0

 1590 14:51:09.007932  PCI: 00:15.3: enabled 0

 1591 14:51:09.010895  PCI: 00:16.0: enabled 1

 1592 14:51:09.014523  PCI: 00:16.1: enabled 0

 1593 14:51:09.017931  PCI: 00:16.2: enabled 0

 1594 14:51:09.018281  PCI: 00:16.3: enabled 0

 1595 14:51:09.021273  PCI: 00:16.4: enabled 0

 1596 14:51:09.024022  PCI: 00:16.5: enabled 0

 1597 14:51:09.027399  PCI: 00:17.0: enabled 1

 1598 14:51:09.027770  PCI: 00:19.0: enabled 1

 1599 14:51:09.030921  PCI: 00:19.1: enabled 0

 1600 14:51:09.034369  PCI: 00:19.2: enabled 0

 1601 14:51:09.034693  PCI: 00:1a.0: enabled 0

 1602 14:51:09.037435  PCI: 00:1c.0: enabled 0

 1603 14:51:09.040809  PCI: 00:1c.1: enabled 0

 1604 14:51:09.043819  PCI: 00:1c.2: enabled 0

 1605 14:51:09.044141  PCI: 00:1c.3: enabled 0

 1606 14:51:09.047219  PCI: 00:1c.4: enabled 0

 1607 14:51:09.050773  PCI: 00:1c.5: enabled 0

 1608 14:51:09.054168  PCI: 00:1c.6: enabled 0

 1609 14:51:09.054490  PCI: 00:1c.7: enabled 0

 1610 14:51:09.057572  PCI: 00:1d.0: enabled 1

 1611 14:51:09.060525  PCI: 00:1d.1: enabled 0

 1612 14:51:09.063959  PCI: 00:1d.2: enabled 0

 1613 14:51:09.064280  PCI: 00:1d.3: enabled 0

 1614 14:51:09.067296  PCI: 00:1d.4: enabled 0

 1615 14:51:09.070852  PCI: 00:1d.5: enabled 0

 1616 14:51:09.073718  PCI: 00:1e.0: enabled 1

 1617 14:51:09.074041  PCI: 00:1e.1: enabled 0

 1618 14:51:09.076993  PCI: 00:1e.2: enabled 1

 1619 14:51:09.080545  PCI: 00:1e.3: enabled 1

 1620 14:51:09.080983  PCI: 00:1f.0: enabled 1

 1621 14:51:09.083524  PCI: 00:1f.1: enabled 0

 1622 14:51:09.087020  PCI: 00:1f.2: enabled 0

 1623 14:51:09.090352  PCI: 00:1f.3: enabled 1

 1624 14:51:09.090820  PCI: 00:1f.4: enabled 1

 1625 14:51:09.093803  PCI: 00:1f.5: enabled 1

 1626 14:51:09.096973  PCI: 00:1f.6: enabled 0

 1627 14:51:09.100324  USB0 port 0: enabled 1

 1628 14:51:09.100788  I2C: 01:15: enabled 1

 1629 14:51:09.103641  I2C: 02:5d: enabled 1

 1630 14:51:09.106988  GENERIC: 0.0: enabled 1

 1631 14:51:09.107452  I2C: 03:1a: enabled 1

 1632 14:51:09.110427  I2C: 03:38: enabled 1

 1633 14:51:09.113984  I2C: 03:39: enabled 1

 1634 14:51:09.114336  I2C: 03:3a: enabled 1

 1635 14:51:09.116482  I2C: 03:3b: enabled 1

 1636 14:51:09.119809  PCI: 00:00.0: enabled 1

 1637 14:51:09.120162  SPI: 00: enabled 1

 1638 14:51:09.123398  SPI: 01: enabled 1

 1639 14:51:09.126690  PNP: 0c09.0: enabled 1

 1640 14:51:09.127053  USB2 port 0: enabled 1

 1641 14:51:09.129885  USB2 port 1: enabled 1

 1642 14:51:09.133392  USB2 port 2: enabled 0

 1643 14:51:09.136628  USB2 port 3: enabled 0

 1644 14:51:09.136979  USB2 port 5: enabled 0

 1645 14:51:09.139941  USB2 port 6: enabled 1

 1646 14:51:09.143455  USB2 port 9: enabled 1

 1647 14:51:09.143810  USB3 port 0: enabled 1

 1648 14:51:09.146318  USB3 port 1: enabled 1

 1649 14:51:09.149995  USB3 port 2: enabled 1

 1650 14:51:09.150348  USB3 port 3: enabled 1

 1651 14:51:09.153102  USB3 port 4: enabled 0

 1652 14:51:09.156187  APIC: 02: enabled 1

 1653 14:51:09.156543  APIC: 01: enabled 1

 1654 14:51:09.159633  APIC: 03: enabled 1

 1655 14:51:09.163065  APIC: 07: enabled 1

 1656 14:51:09.163417  APIC: 06: enabled 1

 1657 14:51:09.166389  APIC: 04: enabled 1

 1658 14:51:09.169997  APIC: 05: enabled 1

 1659 14:51:09.170349  PCI: 00:08.0: enabled 1

 1660 14:51:09.172905  PCI: 00:14.2: enabled 1

 1661 14:51:09.176127  PCI: 01:00.0: enabled 1

 1662 14:51:09.179557  Disabling ACPI via APMC:

 1663 14:51:09.182760  done.

 1664 14:51:09.186514  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1665 14:51:09.189680  ELOG: NV offset 0xaf0000 size 0x4000

 1666 14:51:09.196460  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1667 14:51:09.202969  ELOG: Event(17) added with size 13 at 2023-05-03 14:51:07 UTC

 1668 14:51:09.209894  ELOG: Event(92) added with size 9 at 2023-05-03 14:51:07 UTC

 1669 14:51:09.216250  ELOG: Event(93) added with size 9 at 2023-05-03 14:51:07 UTC

 1670 14:51:09.222901  ELOG: Event(9A) added with size 9 at 2023-05-03 14:51:07 UTC

 1671 14:51:09.229855  ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:07 UTC

 1672 14:51:09.236250  ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:07 UTC

 1673 14:51:09.239550  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1674 14:51:09.247050  ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:07 UTC

 1675 14:51:09.257024  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1676 14:51:09.263505  ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:07 UTC

 1677 14:51:09.266399  elog_add_boot_reason: Logged dev mode boot

 1678 14:51:09.269834  Finalize devices...

 1679 14:51:09.270189  PCI: 00:17.0 final

 1680 14:51:09.272912  Devices finalized

 1681 14:51:09.276722  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1682 14:51:09.283318  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1683 14:51:09.286597  ME: HFSTS1                  : 0x90000245

 1684 14:51:09.289461  ME: HFSTS2                  : 0x3B850126

 1685 14:51:09.296221  ME: HFSTS3                  : 0x00000020

 1686 14:51:09.299416  ME: HFSTS4                  : 0x00004800

 1687 14:51:09.303142  ME: HFSTS5                  : 0x00000000

 1688 14:51:09.306483  ME: HFSTS6                  : 0x40400006

 1689 14:51:09.309625  ME: Manufacturing Mode      : NO

 1690 14:51:09.312966  ME: FW Partition Table      : OK

 1691 14:51:09.316064  ME: Bringup Loader Failure  : NO

 1692 14:51:09.319639  ME: Firmware Init Complete  : YES

 1693 14:51:09.322601  ME: Boot Options Present    : NO

 1694 14:51:09.325888  ME: Update In Progress      : NO

 1695 14:51:09.329782  ME: D0i3 Support            : YES

 1696 14:51:09.332774  ME: Low Power State Enabled : NO

 1697 14:51:09.336098  ME: CPU Replaced            : NO

 1698 14:51:09.339686  ME: CPU Replacement Valid   : YES

 1699 14:51:09.342430  ME: Current Working State   : 5

 1700 14:51:09.345944  ME: Current Operation State : 1

 1701 14:51:09.349328  ME: Current Operation Mode  : 0

 1702 14:51:09.352692  ME: Error Code              : 0

 1703 14:51:09.355970  ME: CPU Debug Disabled      : YES

 1704 14:51:09.359008  ME: TXT Support             : NO

 1705 14:51:09.365624  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1706 14:51:09.372223  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1707 14:51:09.372580  CBFS @ c08000 size 3f8000

 1708 14:51:09.378780  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1709 14:51:09.382377  CBFS: Locating 'fallback/dsdt.aml'

 1710 14:51:09.385338  CBFS: Found @ offset 10bb80 size 3fa5

 1711 14:51:09.391856  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1712 14:51:09.395213  CBFS @ c08000 size 3f8000

 1713 14:51:09.398469  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1714 14:51:09.402190  CBFS: Locating 'fallback/slic'

 1715 14:51:09.407402  CBFS: 'fallback/slic' not found.

 1716 14:51:09.413882  ACPI: Writing ACPI tables at 99b3e000.

 1717 14:51:09.414356  ACPI:    * FACS

 1718 14:51:09.417005  ACPI:    * DSDT

 1719 14:51:09.420554  Ramoops buffer: 0x100000@0x99a3d000.

 1720 14:51:09.424117  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1721 14:51:09.430142  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1722 14:51:09.433869  Google Chrome EC: version:

 1723 14:51:09.437123  	ro: helios_v2.0.2659-56403530b

 1724 14:51:09.440405  	rw: helios_v2.0.2849-c41de27e7d

 1725 14:51:09.440762    running image: 1

 1726 14:51:09.445100  ACPI:    * FADT

 1727 14:51:09.445461  SCI is IRQ9

 1728 14:51:09.451307  ACPI: added table 1/32, length now 40

 1729 14:51:09.451683  ACPI:     * SSDT

 1730 14:51:09.454508  Found 1 CPU(s) with 8 core(s) each.

 1731 14:51:09.457536  Error: Could not locate 'wifi_sar' in VPD.

 1732 14:51:09.464728  Checking CBFS for default SAR values

 1733 14:51:09.467365  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1734 14:51:09.470769  CBFS @ c08000 size 3f8000

 1735 14:51:09.477392  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1736 14:51:09.480790  CBFS: Locating 'wifi_sar_defaults.hex'

 1737 14:51:09.484169  CBFS: Found @ offset 5fac0 size 77

 1738 14:51:09.487131  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1739 14:51:09.493932  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1740 14:51:09.497089  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1741 14:51:09.503716  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1742 14:51:09.507332  failed to find key in VPD: dsm_calib_r0_0

 1743 14:51:09.517226  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1744 14:51:09.520300  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1745 14:51:09.526864  failed to find key in VPD: dsm_calib_r0_1

 1746 14:51:09.533758  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1747 14:51:09.540271  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1748 14:51:09.543713  failed to find key in VPD: dsm_calib_r0_2

 1749 14:51:09.553451  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1750 14:51:09.556845  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1751 14:51:09.563386  failed to find key in VPD: dsm_calib_r0_3

 1752 14:51:09.569875  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1753 14:51:09.576715  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1754 14:51:09.579996  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1755 14:51:09.586314  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1756 14:51:09.590147  EC returned error result code 1

 1757 14:51:09.593147  EC returned error result code 1

 1758 14:51:09.596791  EC returned error result code 1

 1759 14:51:09.599863  PS2K: Bad resp from EC. Vivaldi disabled!

 1760 14:51:09.607045  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1761 14:51:09.613146  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1762 14:51:09.616758  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1763 14:51:09.623420  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1764 14:51:09.626537  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1765 14:51:09.633382  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1766 14:51:09.639569  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1767 14:51:09.646518  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1768 14:51:09.649604  ACPI: added table 2/32, length now 44

 1769 14:51:09.652895  ACPI:    * MCFG

 1770 14:51:09.655965  ACPI: added table 3/32, length now 48

 1771 14:51:09.656376  ACPI:    * TPM2

 1772 14:51:09.659598  TPM2 log created at 99a2d000

 1773 14:51:09.663093  ACPI: added table 4/32, length now 52

 1774 14:51:09.665954  ACPI:    * MADT

 1775 14:51:09.666394  SCI is IRQ9

 1776 14:51:09.669310  ACPI: added table 5/32, length now 56

 1777 14:51:09.672811  current = 99b43ac0

 1778 14:51:09.673235  ACPI:    * DMAR

 1779 14:51:09.676035  ACPI: added table 6/32, length now 60

 1780 14:51:09.679227  ACPI:    * IGD OpRegion

 1781 14:51:09.682730  GMA: Found VBT in CBFS

 1782 14:51:09.685799  GMA: Found valid VBT in CBFS

 1783 14:51:09.689317  ACPI: added table 7/32, length now 64

 1784 14:51:09.689868  ACPI:    * HPET

 1785 14:51:09.695630  ACPI: added table 8/32, length now 68

 1786 14:51:09.696022  ACPI: done.

 1787 14:51:09.699524  ACPI tables: 31744 bytes.

 1788 14:51:09.702954  smbios_write_tables: 99a2c000

 1789 14:51:09.705746  EC returned error result code 3

 1790 14:51:09.709509  Couldn't obtain OEM name from CBI

 1791 14:51:09.712951  Create SMBIOS type 17

 1792 14:51:09.716132  PCI: 00:00.0 (Intel Cannonlake)

 1793 14:51:09.716642  PCI: 00:14.3 (Intel WiFi)

 1794 14:51:09.719223  SMBIOS tables: 939 bytes.

 1795 14:51:09.722199  Writing table forward entry at 0x00000500

 1796 14:51:09.728935  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1797 14:51:09.732322  Writing coreboot table at 0x99b62000

 1798 14:51:09.739247   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1799 14:51:09.745792   1. 0000000000001000-000000000009ffff: RAM

 1800 14:51:09.748932   2. 00000000000a0000-00000000000fffff: RESERVED

 1801 14:51:09.752583   3. 0000000000100000-0000000099a2bfff: RAM

 1802 14:51:09.758888   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1803 14:51:09.762321   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1804 14:51:09.768732   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1805 14:51:09.775400   7. 000000009a000000-000000009f7fffff: RESERVED

 1806 14:51:09.778447   8. 00000000e0000000-00000000efffffff: RESERVED

 1807 14:51:09.785038   9. 00000000fc000000-00000000fc000fff: RESERVED

 1808 14:51:09.788502  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1809 14:51:09.792121  11. 00000000fed10000-00000000fed17fff: RESERVED

 1810 14:51:09.799052  12. 00000000fed80000-00000000fed83fff: RESERVED

 1811 14:51:09.801882  13. 00000000fed90000-00000000fed91fff: RESERVED

 1812 14:51:09.809109  14. 00000000feda0000-00000000feda1fff: RESERVED

 1813 14:51:09.811775  15. 0000000100000000-000000045e7fffff: RAM

 1814 14:51:09.815038  Graphics framebuffer located at 0xc0000000

 1815 14:51:09.818261  Passing 5 GPIOs to payload:

 1816 14:51:09.824778              NAME |       PORT | POLARITY |     VALUE

 1817 14:51:09.828278     write protect |  undefined |     high |       low

 1818 14:51:09.835079               lid |  undefined |     high |      high

 1819 14:51:09.841321             power |  undefined |     high |       low

 1820 14:51:09.844918             oprom |  undefined |     high |       low

 1821 14:51:09.851392          EC in RW | 0x000000cb |     high |       low

 1822 14:51:09.851901  Board ID: 4

 1823 14:51:09.857716  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1824 14:51:09.861016  CBFS @ c08000 size 3f8000

 1825 14:51:09.864300  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1826 14:51:09.870993  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1827 14:51:09.874437  coreboot table: 1492 bytes.

 1828 14:51:09.877998  IMD ROOT    0. 99fff000 00001000

 1829 14:51:09.881101  IMD SMALL   1. 99ffe000 00001000

 1830 14:51:09.884449  FSP MEMORY  2. 99c4e000 003b0000

 1831 14:51:09.887723  CONSOLE     3. 99c2e000 00020000

 1832 14:51:09.891533  FMAP        4. 99c2d000 0000054e

 1833 14:51:09.894336  TIME STAMP  5. 99c2c000 00000910

 1834 14:51:09.897714  VBOOT WORK  6. 99c18000 00014000

 1835 14:51:09.901054  MRC DATA    7. 99c16000 00001958

 1836 14:51:09.904205  ROMSTG STCK 8. 99c15000 00001000

 1837 14:51:09.907555  AFTER CAR   9. 99c0b000 0000a000

 1838 14:51:09.910872  RAMSTAGE   10. 99baf000 0005c000

 1839 14:51:09.914142  REFCODE    11. 99b7a000 00035000

 1840 14:51:09.917593  SMM BACKUP 12. 99b6a000 00010000

 1841 14:51:09.920659  COREBOOT   13. 99b62000 00008000

 1842 14:51:09.924046  ACPI       14. 99b3e000 00024000

 1843 14:51:09.927525  ACPI GNVS  15. 99b3d000 00001000

 1844 14:51:09.930989  RAMOOPS    16. 99a3d000 00100000

 1845 14:51:09.933939  TPM2 TCGLOG17. 99a2d000 00010000

 1846 14:51:09.937670  SMBIOS     18. 99a2c000 00000800

 1847 14:51:09.940724  IMD small region:

 1848 14:51:09.943962    IMD ROOT    0. 99ffec00 00000400

 1849 14:51:09.947789    FSP RUNTIME 1. 99ffebe0 00000004

 1850 14:51:09.950730    EC HOSTEVENT 2. 99ffebc0 00000008

 1851 14:51:09.953897    POWER STATE 3. 99ffeb80 00000040

 1852 14:51:09.957515    ROMSTAGE    4. 99ffeb60 00000004

 1853 14:51:09.960492    MEM INFO    5. 99ffe9a0 000001b9

 1854 14:51:09.963953    VPD         6. 99ffe920 0000006c

 1855 14:51:09.967298  MTRR: Physical address space:

 1856 14:51:09.973815  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1857 14:51:09.980472  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1858 14:51:09.987624  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1859 14:51:09.990381  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1860 14:51:09.997434  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1861 14:51:10.003807  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1862 14:51:10.010614  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1863 14:51:10.014309  MTRR: Fixed MSR 0x250 0x0606060606060606

 1864 14:51:10.020339  MTRR: Fixed MSR 0x258 0x0606060606060606

 1865 14:51:10.023944  MTRR: Fixed MSR 0x259 0x0000000000000000

 1866 14:51:10.026725  MTRR: Fixed MSR 0x268 0x0606060606060606

 1867 14:51:10.030042  MTRR: Fixed MSR 0x269 0x0606060606060606

 1868 14:51:10.036778  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1869 14:51:10.040187  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1870 14:51:10.043643  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1871 14:51:10.046569  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1872 14:51:10.053130  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1873 14:51:10.056637  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1874 14:51:10.059655  call enable_fixed_mtrr()

 1875 14:51:10.063276  CPU physical address size: 39 bits

 1876 14:51:10.066649  MTRR: default type WB/UC MTRR counts: 6/8.

 1877 14:51:10.069802  MTRR: WB selected as default type.

 1878 14:51:10.076663  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1879 14:51:10.083114  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1880 14:51:10.089775  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1881 14:51:10.096379  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1882 14:51:10.103294  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1883 14:51:10.106166  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1884 14:51:10.113757  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 14:51:10.116904  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 14:51:10.120616  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 14:51:10.123650  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 14:51:10.130170  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 14:51:10.133502  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 14:51:10.136881  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 14:51:10.140175  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 14:51:10.147325  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 14:51:10.150411  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 14:51:10.153558  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 14:51:10.154003  

 1896 14:51:10.156966  MTRR check

 1897 14:51:10.157402  Fixed MTRRs   : Enabled

 1898 14:51:10.160308  Variable MTRRs: Enabled

 1899 14:51:10.160726  

 1900 14:51:10.163894  call enable_fixed_mtrr()

 1901 14:51:10.166797  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1902 14:51:10.173675  CPU physical address size: 39 bits

 1903 14:51:10.176522  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1904 14:51:10.179805  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 14:51:10.186690  MTRR: Fixed MSR 0x258 0x0606060606060606

 1906 14:51:10.190094  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 14:51:10.193453  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 14:51:10.196526  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 14:51:10.203368  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 14:51:10.206661  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 14:51:10.209573  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 14:51:10.213345  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 14:51:10.219960  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 14:51:10.222965  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 14:51:10.226484  MTRR: Fixed MSR 0x250 0x0606060606060606

 1916 14:51:10.229761  call enable_fixed_mtrr()

 1917 14:51:10.232882  MTRR: Fixed MSR 0x258 0x0606060606060606

 1918 14:51:10.236191  MTRR: Fixed MSR 0x259 0x0000000000000000

 1919 14:51:10.242771  MTRR: Fixed MSR 0x268 0x0606060606060606

 1920 14:51:10.245955  MTRR: Fixed MSR 0x269 0x0606060606060606

 1921 14:51:10.249338  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1922 14:51:10.252579  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1923 14:51:10.259443  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1924 14:51:10.262608  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1925 14:51:10.266026  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1926 14:51:10.268837  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1927 14:51:10.272754  CPU physical address size: 39 bits

 1928 14:51:10.275766  call enable_fixed_mtrr()

 1929 14:51:10.279785  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 14:51:10.285534  MTRR: Fixed MSR 0x250 0x0606060606060606

 1931 14:51:10.288967  MTRR: Fixed MSR 0x258 0x0606060606060606

 1932 14:51:10.292467  MTRR: Fixed MSR 0x259 0x0000000000000000

 1933 14:51:10.295789  MTRR: Fixed MSR 0x268 0x0606060606060606

 1934 14:51:10.302420  MTRR: Fixed MSR 0x269 0x0606060606060606

 1935 14:51:10.305631  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1936 14:51:10.309216  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1937 14:51:10.312640  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1938 14:51:10.318845  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1939 14:51:10.321957  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1940 14:51:10.325203  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1941 14:51:10.328652  MTRR: Fixed MSR 0x258 0x0606060606060606

 1942 14:51:10.331799  call enable_fixed_mtrr()

 1943 14:51:10.335489  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 14:51:10.342086  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 14:51:10.345589  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 14:51:10.348577  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 14:51:10.351663  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 14:51:10.358532  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 14:51:10.361730  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 14:51:10.364971  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 14:51:10.368266  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 14:51:10.374913  CPU physical address size: 39 bits

 1953 14:51:10.375362  call enable_fixed_mtrr()

 1954 14:51:10.378535  CPU physical address size: 39 bits

 1955 14:51:10.381615  CPU physical address size: 39 bits

 1956 14:51:10.385199  CBFS @ c08000 size 3f8000

 1957 14:51:10.391438  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1958 14:51:10.394949  CBFS: Locating 'fallback/payload'

 1959 14:51:10.398130  MTRR: Fixed MSR 0x250 0x0606060606060606

 1960 14:51:10.404865  MTRR: Fixed MSR 0x258 0x0606060606060606

 1961 14:51:10.408327  MTRR: Fixed MSR 0x259 0x0000000000000000

 1962 14:51:10.411451  MTRR: Fixed MSR 0x268 0x0606060606060606

 1963 14:51:10.414863  MTRR: Fixed MSR 0x269 0x0606060606060606

 1964 14:51:10.418038  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1965 14:51:10.424836  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1966 14:51:10.427817  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1967 14:51:10.431181  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1968 14:51:10.434227  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1969 14:51:10.441100  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1970 14:51:10.444460  MTRR: Fixed MSR 0x250 0x0606060606060606

 1971 14:51:10.447400  call enable_fixed_mtrr()

 1972 14:51:10.450964  MTRR: Fixed MSR 0x258 0x0606060606060606

 1973 14:51:10.454107  MTRR: Fixed MSR 0x259 0x0000000000000000

 1974 14:51:10.457561  MTRR: Fixed MSR 0x268 0x0606060606060606

 1975 14:51:10.464211  MTRR: Fixed MSR 0x269 0x0606060606060606

 1976 14:51:10.467486  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1977 14:51:10.470794  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1978 14:51:10.474094  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1979 14:51:10.481148  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1980 14:51:10.483994  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1981 14:51:10.487765  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1982 14:51:10.490500  CPU physical address size: 39 bits

 1983 14:51:10.494350  call enable_fixed_mtrr()

 1984 14:51:10.497408  CBFS: Found @ offset 1c96c0 size 3f798

 1985 14:51:10.500752  CPU physical address size: 39 bits

 1986 14:51:10.507502  Checking segment from ROM address 0xffdd16f8

 1987 14:51:10.511008  Checking segment from ROM address 0xffdd1714

 1988 14:51:10.513743  Loading segment from ROM address 0xffdd16f8

 1989 14:51:10.517561    code (compression=0)

 1990 14:51:10.527095    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1991 14:51:10.533801  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1992 14:51:10.537082  it's not compressed!

 1993 14:51:10.629072  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1994 14:51:10.635218  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1995 14:51:10.638437  Loading segment from ROM address 0xffdd1714

 1996 14:51:10.641573    Entry Point 0x30000000

 1997 14:51:10.645289  Loaded segments

 1998 14:51:10.650734  Finalizing chipset.

 1999 14:51:10.654083  Finalizing SMM.

 2000 14:51:10.657319  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2001 14:51:10.660549  mp_park_aps done after 0 msecs.

 2002 14:51:10.667085  Jumping to boot code at 30000000(99b62000)

 2003 14:51:10.673892  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2004 14:51:10.674324  

 2005 14:51:10.674661  

 2006 14:51:10.674973  

 2007 14:51:10.677407  Starting depthcharge on Helios...

 2008 14:51:10.677874  

 2009 14:51:10.678884  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2010 14:51:10.679380  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2011 14:51:10.679790  Setting prompt string to ['hatch:']
 2012 14:51:10.680312  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2013 14:51:10.687413  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2014 14:51:10.687847  

 2015 14:51:10.693502  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2016 14:51:10.693936  

 2017 14:51:10.700405  board_setup: Info: eMMC controller not present; skipping

 2018 14:51:10.700937  

 2019 14:51:10.704014  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2020 14:51:10.704541  

 2021 14:51:10.710116  board_setup: Info: SDHCI controller not present; skipping

 2022 14:51:10.710541  

 2023 14:51:10.716709  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2024 14:51:10.717247  

 2025 14:51:10.717681  Wipe memory regions:

 2026 14:51:10.718005  

 2027 14:51:10.720826  	[0x00000000001000, 0x000000000a0000)

 2028 14:51:10.721249  

 2029 14:51:10.723799  	[0x00000000100000, 0x00000030000000)

 2030 14:51:10.789662  

 2031 14:51:10.793002  	[0x00000030657430, 0x00000099a2c000)

 2032 14:51:10.930104  

 2033 14:51:10.933443  	[0x00000100000000, 0x0000045e800000)

 2034 14:51:12.315821  

 2035 14:51:12.316351  R8152: Initializing

 2036 14:51:12.316692  

 2037 14:51:12.318789  Version 9 (ocp_data = 6010)

 2038 14:51:12.323134  

 2039 14:51:12.323664  R8152: Done initializing

 2040 14:51:12.323999  

 2041 14:51:12.326511  Adding net device

 2042 14:51:12.935811  

 2043 14:51:12.936363  R8152: Initializing

 2044 14:51:12.936721  

 2045 14:51:12.939121  Version 6 (ocp_data = 5c30)

 2046 14:51:12.939577  

 2047 14:51:12.942310  R8152: Done initializing

 2048 14:51:12.942757  

 2049 14:51:12.945783  net_add_device: Attemp to include the same device

 2050 14:51:12.949453  

 2051 14:51:12.956364  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2052 14:51:12.956790  

 2053 14:51:12.957163  

 2054 14:51:12.957635  

 2055 14:51:12.958411  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2057 14:51:13.059709  hatch: tftpboot 192.168.201.1 10185540/tftp-deploy-z0spqzil/kernel/bzImage 10185540/tftp-deploy-z0spqzil/kernel/cmdline 10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz

 2058 14:51:13.060486  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2059 14:51:13.061082  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2060 14:51:13.065160  tftpboot 192.168.201.1 10185540/tftp-deploy-z0spqzil/kernel/bzIploy-z0spqzil/kernel/cmdline 10185540/tftp-deploy-z0spqzil/ramdisk/ramdisk.cpio.gz

 2061 14:51:13.065717  

 2062 14:51:13.066083  Waiting for link

 2063 14:51:13.265981  

 2064 14:51:13.266603  done.

 2065 14:51:13.267020  

 2066 14:51:13.267409  MAC: 00:24:32:50:1a:5f

 2067 14:51:13.267764  

 2068 14:51:13.269504  Sending DHCP discover... done.

 2069 14:51:13.269976  

 2070 14:51:13.273218  Waiting for reply... done.

 2071 14:51:13.273795  

 2072 14:51:13.275938  Sending DHCP request... done.

 2073 14:51:13.276453  

 2074 14:51:13.279373  Waiting for reply... done.

 2075 14:51:13.279884  

 2076 14:51:13.282311  My ip is 192.168.201.21

 2077 14:51:13.282776  

 2078 14:51:13.285880  The DHCP server ip is 192.168.201.1

 2079 14:51:13.286403  

 2080 14:51:13.289095  TFTP server IP predefined by user: 192.168.201.1

 2081 14:51:13.289661  

 2082 14:51:13.295971  Bootfile predefined by user: 10185540/tftp-deploy-z0spqzil/kernel/bzImage

 2083 14:51:13.296397  

 2084 14:51:13.299279  Sending tftp read request... done.

 2085 14:51:13.302102  

 2086 14:51:13.308134  Waiting for the transfer... 

 2087 14:51:13.308614  

 2088 14:51:13.969024  00000000 ################################################################

 2089 14:51:13.969615  

 2090 14:51:14.576319  00080000 ################################################################

 2091 14:51:14.576470  

 2092 14:51:15.171939  00100000 ################################################################

 2093 14:51:15.172074  

 2094 14:51:15.755355  00180000 ################################################################

 2095 14:51:15.755490  

 2096 14:51:16.357103  00200000 ################################################################

 2097 14:51:16.357234  

 2098 14:51:16.932559  00280000 ################################################################

 2099 14:51:16.932695  

 2100 14:51:17.509847  00300000 ################################################################

 2101 14:51:17.509981  

 2102 14:51:18.105752  00380000 ################################################################

 2103 14:51:18.105892  

 2104 14:51:18.671576  00400000 ################################################################

 2105 14:51:18.671717  

 2106 14:51:19.240725  00480000 ################################################################

 2107 14:51:19.240863  

 2108 14:51:19.818472  00500000 ################################################################

 2109 14:51:19.818606  

 2110 14:51:20.397481  00580000 ################################################################

 2111 14:51:20.397623  

 2112 14:51:20.983279  00600000 ################################################################

 2113 14:51:20.983414  

 2114 14:51:21.636092  00680000 ################################################################

 2115 14:51:21.636635  

 2116 14:51:22.206473  00700000 ################################################################

 2117 14:51:22.206610  

 2118 14:51:22.219596  00780000 ## done.

 2119 14:51:22.219682  

 2120 14:51:22.222475  The bootfile was 7876496 bytes long.

 2121 14:51:22.222556  

 2122 14:51:22.225873  Sending tftp read request... done.

 2123 14:51:22.225952  

 2124 14:51:22.228931  Waiting for the transfer... 

 2125 14:51:22.229041  

 2126 14:51:22.783228  00000000 ################################################################

 2127 14:51:22.783363  

 2128 14:51:23.365217  00080000 ################################################################

 2129 14:51:23.365358  

 2130 14:51:23.911423  00100000 ################################################################

 2131 14:51:23.911582  

 2132 14:51:24.465574  00180000 ################################################################

 2133 14:51:24.465716  

 2134 14:51:24.997024  00200000 ################################################################

 2135 14:51:24.997178  

 2136 14:51:25.515536  00280000 ################################################################

 2137 14:51:25.515690  

 2138 14:51:26.063721  00300000 ################################################################

 2139 14:51:26.063881  

 2140 14:51:26.601863  00380000 ################################################################

 2141 14:51:26.602019  

 2142 14:51:27.130916  00400000 ################################################################

 2143 14:51:27.131083  

 2144 14:51:27.652256  00480000 ################################################################

 2145 14:51:27.652416  

 2146 14:51:28.169302  00500000 ################################################################ done.

 2147 14:51:28.169475  

 2148 14:51:28.173017  Sending tftp read request... done.

 2149 14:51:28.173123  

 2150 14:51:28.175988  Waiting for the transfer... 

 2151 14:51:28.176088  

 2152 14:51:28.179336  00000000 # done.

 2153 14:51:28.179442  

 2154 14:51:28.185837  Command line loaded dynamically from TFTP file: 10185540/tftp-deploy-z0spqzil/kernel/cmdline

 2155 14:51:28.185942  

 2156 14:51:28.212232  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185540/extract-nfsrootfs-s2vp033r,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2157 14:51:28.215830  

 2158 14:51:28.219221  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2159 14:51:28.224156  

 2160 14:51:28.227096  Shutting down all USB controllers.

 2161 14:51:28.227198  

 2162 14:51:28.227293  Removing current net device

 2163 14:51:28.234626  

 2164 14:51:28.234728  Finalizing coreboot

 2165 14:51:28.234821  

 2166 14:51:28.241627  Exiting depthcharge with code 4 at timestamp: 24881653

 2167 14:51:28.241729  

 2168 14:51:28.241820  

 2169 14:51:28.241919  Starting kernel ...

 2170 14:51:28.242008  

 2171 14:51:28.242577  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 2172 14:51:28.242701  start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
 2173 14:51:28.242804  Setting prompt string to ['Linux version [0-9]']
 2174 14:51:28.242916  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2175 14:51:28.243022  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2176 14:51:28.244845  

 2178 14:55:52.243627  end: 2.2.5 auto-login-action (duration 00:04:24) [common]
 2180 14:55:52.244727  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
 2182 14:55:52.245647  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2185 14:55:52.247041  end: 2 depthcharge-action (duration 00:05:00) [common]
 2187 14:55:52.248221  Cleaning after the job
 2188 14:55:52.248326  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/ramdisk
 2189 14:55:52.249125  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/kernel
 2190 14:55:52.250098  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/nfsrootfs
 2191 14:55:52.306681  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185540/tftp-deploy-z0spqzil/modules
 2192 14:55:52.307118  start: 5.1 power-off (timeout 00:00:30) [common]
 2193 14:55:52.307288  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2194 14:55:52.384798  >> Command sent successfully.

 2195 14:55:52.390849  Returned 0 in 0 seconds
 2196 14:55:52.491786  end: 5.1 power-off (duration 00:00:00) [common]
 2198 14:55:52.493300  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2199 14:55:52.494672  Listened to connection for namespace 'common' for up to 1s
 2201 14:55:52.496254  Listened to connection for namespace 'common' for up to 1s
 2202 14:55:53.495265  Finalising connection for namespace 'common'
 2203 14:55:53.495929  Disconnecting from shell: Finalise
 2204 14:55:53.496371  
 2205 14:55:53.597418  end: 5.2 read-feedback (duration 00:00:01) [common]
 2206 14:55:53.598067  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185540
 2207 14:55:53.846781  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185540
 2208 14:55:53.846974  JobError: Your job cannot terminate cleanly.