Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:48.402944 lava-dispatcher, installed at version: 2023.03
2 14:50:48.403163 start: 0 validate
3 14:50:48.403295 Start time: 2023-05-03 14:50:48.403286+00:00 (UTC)
4 14:50:48.403420 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:48.403551 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
6 14:50:48.692203 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:48.692405 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:48.693532 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:48.693669 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:50:48.977389 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:50:48.977564 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:50:48.979764 validate duration: 0.58
14 14:50:48.979988 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:50:48.980130 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:50:48.980246 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:50:48.980425 Not decompressing ramdisk as can be used compressed.
18 14:50:48.980508 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/initrd.cpio.gz
19 14:50:48.980570 saving as /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/ramdisk/initrd.cpio.gz
20 14:50:48.980629 total size: 5432141 (5MB)
21 14:50:48.981607 progress 0% (0MB)
22 14:50:48.983175 progress 5% (0MB)
23 14:50:48.984668 progress 10% (0MB)
24 14:50:48.986060 progress 15% (0MB)
25 14:50:48.987604 progress 20% (1MB)
26 14:50:48.989029 progress 25% (1MB)
27 14:50:48.990390 progress 30% (1MB)
28 14:50:48.991920 progress 35% (1MB)
29 14:50:48.993312 progress 40% (2MB)
30 14:50:48.994697 progress 45% (2MB)
31 14:50:48.996069 progress 50% (2MB)
32 14:50:48.997622 progress 55% (2MB)
33 14:50:48.999017 progress 60% (3MB)
34 14:50:49.000483 progress 65% (3MB)
35 14:50:49.002007 progress 70% (3MB)
36 14:50:49.003359 progress 75% (3MB)
37 14:50:49.004772 progress 80% (4MB)
38 14:50:49.006148 progress 85% (4MB)
39 14:50:49.007660 progress 90% (4MB)
40 14:50:49.009058 progress 95% (4MB)
41 14:50:49.010565 progress 100% (5MB)
42 14:50:49.010775 5MB downloaded in 0.03s (171.87MB/s)
43 14:50:49.010925 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:50:49.011155 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:50:49.011237 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:50:49.011318 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:50:49.011451 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:50:49.011518 saving as /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/kernel/bzImage
50 14:50:49.011577 total size: 7876496 (7MB)
51 14:50:49.011635 No compression specified
52 14:50:49.012749 progress 0% (0MB)
53 14:50:49.014964 progress 5% (0MB)
54 14:50:49.017114 progress 10% (0MB)
55 14:50:49.019361 progress 15% (1MB)
56 14:50:49.021491 progress 20% (1MB)
57 14:50:49.023571 progress 25% (1MB)
58 14:50:49.025674 progress 30% (2MB)
59 14:50:49.027763 progress 35% (2MB)
60 14:50:49.029905 progress 40% (3MB)
61 14:50:49.032137 progress 45% (3MB)
62 14:50:49.034357 progress 50% (3MB)
63 14:50:49.036847 progress 55% (4MB)
64 14:50:49.038875 progress 60% (4MB)
65 14:50:49.040995 progress 65% (4MB)
66 14:50:49.043009 progress 70% (5MB)
67 14:50:49.045282 progress 75% (5MB)
68 14:50:49.047306 progress 80% (6MB)
69 14:50:49.049415 progress 85% (6MB)
70 14:50:49.051472 progress 90% (6MB)
71 14:50:49.053554 progress 95% (7MB)
72 14:50:49.055674 progress 100% (7MB)
73 14:50:49.055825 7MB downloaded in 0.04s (169.78MB/s)
74 14:50:49.055964 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:50:49.056187 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:50:49.056270 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:50:49.056378 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:50:49.056525 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230421.0/amd64/full.rootfs.tar.xz
80 14:50:49.056591 saving as /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/nfsrootfs/full.rootfs.tar
81 14:50:49.056650 total size: 133369160 (127MB)
82 14:50:49.056708 Using unxz to decompress xz
83 14:50:49.060682 progress 0% (0MB)
84 14:50:49.419646 progress 5% (6MB)
85 14:50:49.789724 progress 10% (12MB)
86 14:50:50.087030 progress 15% (19MB)
87 14:50:50.279558 progress 20% (25MB)
88 14:50:50.538659 progress 25% (31MB)
89 14:50:50.902045 progress 30% (38MB)
90 14:50:51.264139 progress 35% (44MB)
91 14:50:51.689319 progress 40% (50MB)
92 14:50:52.102545 progress 45% (57MB)
93 14:50:52.476055 progress 50% (63MB)
94 14:50:52.864808 progress 55% (69MB)
95 14:50:53.245299 progress 60% (76MB)
96 14:50:53.630941 progress 65% (82MB)
97 14:50:54.013094 progress 70% (89MB)
98 14:50:54.404027 progress 75% (95MB)
99 14:50:54.862820 progress 80% (101MB)
100 14:50:55.323748 progress 85% (108MB)
101 14:50:55.616304 progress 90% (114MB)
102 14:50:55.985450 progress 95% (120MB)
103 14:50:56.400065 progress 100% (127MB)
104 14:50:56.404993 127MB downloaded in 7.35s (17.31MB/s)
105 14:50:56.405389 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:50:56.405790 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:50:56.405921 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:50:56.406043 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:50:56.406247 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:50:56.406358 saving as /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/modules/modules.tar
112 14:50:56.406448 total size: 251268 (0MB)
113 14:50:56.406539 Using unxz to decompress xz
114 14:50:56.411142 progress 13% (0MB)
115 14:50:56.411698 progress 26% (0MB)
116 14:50:56.412058 progress 39% (0MB)
117 14:50:56.413433 progress 52% (0MB)
118 14:50:56.415374 progress 65% (0MB)
119 14:50:56.417450 progress 78% (0MB)
120 14:50:56.419485 progress 91% (0MB)
121 14:50:56.421511 progress 100% (0MB)
122 14:50:56.427354 0MB downloaded in 0.02s (11.47MB/s)
123 14:50:56.427725 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:50:56.428123 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:50:56.428266 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 14:50:56.428417 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 14:50:58.649257 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185566/extract-nfsrootfs-4yl6hgii
129 14:50:58.649459 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 14:50:58.649561 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 14:50:58.649725 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x
132 14:50:58.649899 makedir: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin
133 14:50:58.650003 makedir: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/tests
134 14:50:58.650098 makedir: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/results
135 14:50:58.650200 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-add-keys
136 14:50:58.650346 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-add-sources
137 14:50:58.650474 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-background-process-start
138 14:50:58.650598 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-background-process-stop
139 14:50:58.650718 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-common-functions
140 14:50:58.650845 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-echo-ipv4
141 14:50:58.650966 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-install-packages
142 14:50:58.651094 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-installed-packages
143 14:50:58.651229 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-os-build
144 14:50:58.651348 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-probe-channel
145 14:50:58.651468 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-probe-ip
146 14:50:58.651603 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-target-ip
147 14:50:58.651721 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-target-mac
148 14:50:58.651839 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-target-storage
149 14:50:58.651959 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-case
150 14:50:58.652085 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-event
151 14:50:58.652211 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-feedback
152 14:50:58.652327 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-raise
153 14:50:58.652668 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-reference
154 14:50:58.652790 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-runner
155 14:50:58.652910 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-set
156 14:50:58.653057 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-test-shell
157 14:50:58.653232 Updating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-install-packages (oe)
158 14:50:58.653457 Updating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/bin/lava-installed-packages (oe)
159 14:50:58.653612 Creating /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/environment
160 14:50:58.653708 LAVA metadata
161 14:50:58.653779 - LAVA_JOB_ID=10185566
162 14:50:58.653842 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:50:58.653954 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 14:50:58.654020 skipped lava-vland-overlay
165 14:50:58.654094 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:50:58.654182 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 14:50:58.654244 skipped lava-multinode-overlay
168 14:50:58.654327 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:50:58.654454 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 14:50:58.654542 Loading test definitions
171 14:50:58.654637 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 14:50:58.654707 Using /lava-10185566 at stage 0
173 14:50:58.655039 uuid=10185566_1.5.2.3.1 testdef=None
174 14:50:58.655133 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 14:50:58.655233 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 14:50:58.655767 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 14:50:58.655985 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 14:50:58.660249 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 14:50:58.660642 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 14:50:58.667214 runner path: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/0/tests/0_dmesg test_uuid 10185566_1.5.2.3.1
183 14:50:58.667458 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 14:50:58.667858 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 14:50:58.667966 Using /lava-10185566 at stage 1
187 14:50:58.668417 uuid=10185566_1.5.2.3.5 testdef=None
188 14:50:58.668562 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 14:50:58.668649 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 14:50:58.669305 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 14:50:58.669648 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 14:50:58.675294 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 14:50:58.675715 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 14:50:58.682762 runner path: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/1/tests/1_bootrr test_uuid 10185566_1.5.2.3.5
197 14:50:58.682958 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 14:50:58.683204 Creating lava-test-runner.conf files
200 14:50:58.683285 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/0 for stage 0
201 14:50:58.683380 - 0_dmesg
202 14:50:58.683460 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185566/lava-overlay-9ylz1j_x/lava-10185566/1 for stage 1
203 14:50:58.683567 - 1_bootrr
204 14:50:58.683664 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 14:50:58.683765 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 14:50:58.692980 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 14:50:58.693166 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 14:50:58.693293 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 14:50:58.693413 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 14:50:58.693544 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 14:50:58.838214 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 14:50:58.838616 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 14:50:58.838793 extracting modules file /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185566/extract-nfsrootfs-4yl6hgii
214 14:50:58.855367 extracting modules file /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185566/extract-overlay-ramdisk-60kglxrp/ramdisk
215 14:50:58.872641 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 14:50:58.872807 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 14:50:58.872924 [common] Applying overlay to NFS
218 14:50:58.873000 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185566/compress-overlay-13hxzo9p/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185566/extract-nfsrootfs-4yl6hgii
219 14:50:58.884662 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 14:50:58.884847 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 14:50:58.884972 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 14:50:58.885099 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 14:50:58.885215 Building ramdisk /var/lib/lava/dispatcher/tmp/10185566/extract-overlay-ramdisk-60kglxrp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185566/extract-overlay-ramdisk-60kglxrp/ramdisk
224 14:50:58.956017 >> 26161 blocks
225 14:50:59.507463 rename /var/lib/lava/dispatcher/tmp/10185566/extract-overlay-ramdisk-60kglxrp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
226 14:50:59.507972 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 14:50:59.508138 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 14:50:59.508284 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 14:50:59.508431 No mkimage arch provided, not using FIT.
230 14:50:59.508576 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 14:50:59.508792 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 14:50:59.508951 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 14:50:59.509092 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 14:50:59.509215 No LXC device requested
235 14:50:59.509337 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 14:50:59.509474 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 14:50:59.509588 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 14:50:59.509694 Checking files for TFTP limit of 4294967296 bytes.
239 14:50:59.510187 end: 1 tftp-deploy (duration 00:00:11) [common]
240 14:50:59.510323 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 14:50:59.510451 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 14:50:59.510623 substitutions:
243 14:50:59.510724 - {DTB}: None
244 14:50:59.510818 - {INITRD}: 10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
245 14:50:59.510911 - {KERNEL}: 10185566/tftp-deploy-8zdiuwjq/kernel/bzImage
246 14:50:59.511005 - {LAVA_MAC}: None
247 14:50:59.511102 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185566/extract-nfsrootfs-4yl6hgii
248 14:50:59.511203 - {NFS_SERVER_IP}: 192.168.201.1
249 14:50:59.511298 - {PRESEED_CONFIG}: None
250 14:50:59.511385 - {PRESEED_LOCAL}: None
251 14:50:59.511505 - {RAMDISK}: 10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
252 14:50:59.511594 - {ROOT_PART}: None
253 14:50:59.511686 - {ROOT}: None
254 14:50:59.511777 - {SERVER_IP}: 192.168.201.1
255 14:50:59.511869 - {TEE}: None
256 14:50:59.511961 Parsed boot commands:
257 14:50:59.512054 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 14:50:59.512286 Parsed boot commands: tftpboot 192.168.201.1 10185566/tftp-deploy-8zdiuwjq/kernel/bzImage 10185566/tftp-deploy-8zdiuwjq/kernel/cmdline 10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
259 14:50:59.512425 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 14:50:59.512554 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 14:50:59.512693 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 14:50:59.512833 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 14:50:59.512937 Not connected, no need to disconnect.
264 14:50:59.513056 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 14:50:59.513179 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 14:50:59.513282 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
267 14:50:59.517240 Setting prompt string to ['lava-test: # ']
268 14:50:59.517640 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 14:50:59.517791 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 14:50:59.517926 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 14:50:59.518056 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 14:50:59.518391 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
273 14:51:04.660204 >> Command sent successfully.
274 14:51:04.662996 Returned 0 in 5 seconds
275 14:51:04.763409 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 14:51:04.763765 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 14:51:04.763902 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 14:51:04.764023 Setting prompt string to 'Starting depthcharge on Voema...'
280 14:51:04.764120 Changing prompt to 'Starting depthcharge on Voema...'
281 14:51:04.764229 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 14:51:04.764619 [Enter `^Ec?' for help]
283 14:51:06.366801
284 14:51:06.366989
285 14:51:06.376108 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 14:51:06.383270 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 14:51:06.386305 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 14:51:06.389823 CPU: AES supported, TXT NOT supported, VT supported
289 14:51:06.396099 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 14:51:06.402900 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 14:51:06.405960 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 14:51:06.409720 VBOOT: Loading verstage.
293 14:51:06.415954 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 14:51:06.419172 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 14:51:06.422862 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 14:51:06.433246 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 14:51:06.440079 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 14:51:06.440181
299 14:51:06.440252
300 14:51:06.453145 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 14:51:06.467527 Probing TPM: . done!
302 14:51:06.470635 TPM ready after 0 ms
303 14:51:06.473696 Connected to device vid:did:rid of 1ae0:0028:00
304 14:51:06.485308 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 14:51:06.491516 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 14:51:06.494586 Initialized TPM device CR50 revision 0
307 14:51:06.546339 tlcl_send_startup: Startup return code is 0
308 14:51:06.546471 TPM: setup succeeded
309 14:51:06.561943 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 14:51:06.576486 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 14:51:06.589104 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 14:51:06.598856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 14:51:06.602466 Chrome EC: UHEPI supported
314 14:51:06.606011 Phase 1
315 14:51:06.609205 FMAP: area GBB found @ 1805000 (458752 bytes)
316 14:51:06.619189 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 14:51:06.625415 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 14:51:06.632254 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 14:51:06.639021 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 14:51:06.642038 Recovery requested (1009000e)
321 14:51:06.645636 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 14:51:06.657461 tlcl_extend: response is 0
323 14:51:06.663757 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 14:51:06.673809 tlcl_extend: response is 0
325 14:51:06.680744 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 14:51:06.686938 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 14:51:06.693519 BS: verstage times (exec / console): total (unknown) / 142 ms
328 14:51:06.693640
329 14:51:06.693741
330 14:51:06.707203 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 14:51:06.713818 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 14:51:06.716945 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 14:51:06.720053 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 14:51:06.726784 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 14:51:06.729801 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 14:51:06.733470 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 14:51:06.736365 TCO_STS: 0000 0000
338 14:51:06.740162 GEN_PMCON: d0015038 00002200
339 14:51:06.743312 GBLRST_CAUSE: 00000000 00000000
340 14:51:06.746328 HPR_CAUSE0: 00000000
341 14:51:06.746437 prev_sleep_state 5
342 14:51:06.749784 Boot Count incremented to 19767
343 14:51:06.756508 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 14:51:06.763521 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 14:51:06.773287 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 14:51:06.779570 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 14:51:06.782717 Chrome EC: UHEPI supported
348 14:51:06.789269 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 14:51:06.800653 Probing TPM: done!
350 14:51:06.807812 Connected to device vid:did:rid of 1ae0:0028:00
351 14:51:06.817724 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
352 14:51:06.827617 Initialized TPM device CR50 revision 0
353 14:51:06.837365 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 14:51:06.843688 MRC: Hash idx 0x100b comparison successful.
355 14:51:06.846733 MRC cache found, size faa8
356 14:51:06.846851 bootmode is set to: 2
357 14:51:06.850441 SPD index = 0
358 14:51:06.856982 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 14:51:06.860369 SPD: module type is LPDDR4X
360 14:51:06.863387 SPD: module part number is MT53E512M64D4NW-046
361 14:51:06.870274 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 14:51:06.873313 SPD: device width 16 bits, bus width 16 bits
363 14:51:06.879748 SPD: module size is 1024 MB (per channel)
364 14:51:07.310762 CBMEM:
365 14:51:07.313864 IMD: root @ 0x76fff000 254 entries.
366 14:51:07.316853 IMD: root @ 0x76ffec00 62 entries.
367 14:51:07.320427 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 14:51:07.326755 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 14:51:07.330522 External stage cache:
370 14:51:07.333910 IMD: root @ 0x7b3ff000 254 entries.
371 14:51:07.336855 IMD: root @ 0x7b3fec00 62 entries.
372 14:51:07.352206 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 14:51:07.359119 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 14:51:07.365279 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 14:51:07.379184 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 14:51:07.385999 cse_lite: Skip switching to RW in the recovery path
377 14:51:07.386096 8 DIMMs found
378 14:51:07.386190 SMM Memory Map
379 14:51:07.393031 SMRAM : 0x7b000000 0x800000
380 14:51:07.396200 Subregion 0: 0x7b000000 0x200000
381 14:51:07.400110 Subregion 1: 0x7b200000 0x200000
382 14:51:07.400223 Subregion 2: 0x7b400000 0x400000
383 14:51:07.403728 top_of_ram = 0x77000000
384 14:51:07.410126 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 14:51:07.413299 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 14:51:07.420168 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 14:51:07.423174 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 14:51:07.433142 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 14:51:07.439817 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 14:51:07.449713 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 14:51:07.453235 Processing 211 relocs. Offset value of 0x74c0b000
392 14:51:07.462287 BS: romstage times (exec / console): total (unknown) / 277 ms
393 14:51:07.468666
394 14:51:07.468758
395 14:51:07.478237 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 14:51:07.481864 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 14:51:07.491547 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 14:51:07.497781 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 14:51:07.504460 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 14:51:07.511509 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 14:51:07.558389 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 14:51:07.565148 Processing 5008 relocs. Offset value of 0x75d98000
403 14:51:07.568710 BS: postcar times (exec / console): total (unknown) / 59 ms
404 14:51:07.571948
405 14:51:07.572055
406 14:51:07.581623 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 14:51:07.581749 Normal boot
408 14:51:07.585422 FW_CONFIG value is 0x804c02
409 14:51:07.588571 PCI: 00:07.0 disabled by fw_config
410 14:51:07.592237 PCI: 00:07.1 disabled by fw_config
411 14:51:07.595969 PCI: 00:0d.2 disabled by fw_config
412 14:51:07.599120 PCI: 00:1c.7 disabled by fw_config
413 14:51:07.605917 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 14:51:07.612248 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 14:51:07.616018 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 14:51:07.619191 GENERIC: 0.0 disabled by fw_config
417 14:51:07.622292 GENERIC: 1.0 disabled by fw_config
418 14:51:07.629230 fw_config match found: DB_USB=USB3_ACTIVE
419 14:51:07.632314 fw_config match found: DB_USB=USB3_ACTIVE
420 14:51:07.635532 fw_config match found: DB_USB=USB3_ACTIVE
421 14:51:07.642608 fw_config match found: DB_USB=USB3_ACTIVE
422 14:51:07.645489 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 14:51:07.652207 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 14:51:07.661987 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 14:51:07.668770 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 14:51:07.672456 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 14:51:07.678914 microcode: Update skipped, already up-to-date
428 14:51:07.685280 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 14:51:07.713033 Detected 4 core, 8 thread CPU.
430 14:51:07.716047 Setting up SMI for CPU
431 14:51:07.719152 IED base = 0x7b400000
432 14:51:07.722822 IED size = 0x00400000
433 14:51:07.722906 Will perform SMM setup.
434 14:51:07.728960 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 14:51:07.735825 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 14:51:07.742523 Processing 16 relocs. Offset value of 0x00030000
437 14:51:07.745699 Attempting to start 7 APs
438 14:51:07.748906 Waiting for 10ms after sending INIT.
439 14:51:07.764532 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 14:51:07.764625 done.
441 14:51:07.768141 AP: slot 2 apic_id 3.
442 14:51:07.771653 AP: slot 5 apic_id 2.
443 14:51:07.771737 AP: slot 7 apic_id 7.
444 14:51:07.774777 AP: slot 4 apic_id 6.
445 14:51:07.778045 AP: slot 3 apic_id 5.
446 14:51:07.778126 AP: slot 6 apic_id 4.
447 14:51:07.784722 Waiting for 2nd SIPI to complete...done.
448 14:51:07.790977 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 14:51:07.797742 Processing 13 relocs. Offset value of 0x00038000
450 14:51:07.800888 Unable to locate Global NVS
451 14:51:07.807871 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 14:51:07.810951 Installing permanent SMM handler to 0x7b000000
453 14:51:07.820949 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 14:51:07.823907 Processing 794 relocs. Offset value of 0x7b010000
455 14:51:07.834086 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 14:51:07.837310 Processing 13 relocs. Offset value of 0x7b008000
457 14:51:07.843937 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 14:51:07.850530 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 14:51:07.857550 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 14:51:07.860698 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 14:51:07.867520 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 14:51:07.874170 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 14:51:07.880279 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 14:51:07.884016 Unable to locate Global NVS
465 14:51:07.890057 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 14:51:07.893879 Clearing SMI status registers
467 14:51:07.896940 SMI_STS: PM1
468 14:51:07.897065 PM1_STS: PWRBTN
469 14:51:07.903786 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 14:51:07.906769 In relocation handler: CPU 0
471 14:51:07.909961 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 14:51:07.916864 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 14:51:07.920155 Relocation complete.
474 14:51:07.927052 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 14:51:07.930059 In relocation handler: CPU 1
476 14:51:07.933168 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 14:51:07.936790 Relocation complete.
478 14:51:07.943105 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
479 14:51:07.946268 In relocation handler: CPU 4
480 14:51:07.949848 New SMBASE=0x7afff000 IEDBASE=0x7b400000
481 14:51:07.953323 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 14:51:07.956358 Relocation complete.
483 14:51:07.963248 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
484 14:51:07.966177 In relocation handler: CPU 7
485 14:51:07.969725 New SMBASE=0x7affe400 IEDBASE=0x7b400000
486 14:51:07.972971 Relocation complete.
487 14:51:07.979754 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
488 14:51:07.982752 In relocation handler: CPU 6
489 14:51:07.985951 New SMBASE=0x7affe800 IEDBASE=0x7b400000
490 14:51:07.992706 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 14:51:07.996172 Relocation complete.
492 14:51:08.002334 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
493 14:51:08.006066 In relocation handler: CPU 5
494 14:51:08.009352 New SMBASE=0x7affec00 IEDBASE=0x7b400000
495 14:51:08.012252 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 14:51:08.015975 Relocation complete.
497 14:51:08.022298 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
498 14:51:08.025910 In relocation handler: CPU 2
499 14:51:08.028925 New SMBASE=0x7afff800 IEDBASE=0x7b400000
500 14:51:08.032118 Relocation complete.
501 14:51:08.038926 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
502 14:51:08.042060 In relocation handler: CPU 3
503 14:51:08.045911 New SMBASE=0x7afff400 IEDBASE=0x7b400000
504 14:51:08.048778 Relocation complete.
505 14:51:08.052391 Initializing CPU #0
506 14:51:08.055663 CPU: vendor Intel device 806c1
507 14:51:08.058735 CPU: family 06, model 8c, stepping 01
508 14:51:08.062343 Clearing out pending MCEs
509 14:51:08.062433 Setting up local APIC...
510 14:51:08.065230 apic_id: 0x00 done.
511 14:51:08.069576 Turbo is available but hidden
512 14:51:08.072814 Turbo is available and visible
513 14:51:08.075954 microcode: Update skipped, already up-to-date
514 14:51:08.079615 CPU #0 initialized
515 14:51:08.079730 Initializing CPU #3
516 14:51:08.082882 Initializing CPU #6
517 14:51:08.086218 Initializing CPU #4
518 14:51:08.086316 Initializing CPU #7
519 14:51:08.089277 CPU: vendor Intel device 806c1
520 14:51:08.092511 CPU: family 06, model 8c, stepping 01
521 14:51:08.096220 CPU: vendor Intel device 806c1
522 14:51:08.099229 CPU: family 06, model 8c, stepping 01
523 14:51:08.102815 Clearing out pending MCEs
524 14:51:08.105838 Clearing out pending MCEs
525 14:51:08.109014 Setting up local APIC...
526 14:51:08.112931 CPU: vendor Intel device 806c1
527 14:51:08.115975 CPU: family 06, model 8c, stepping 01
528 14:51:08.119030 CPU: vendor Intel device 806c1
529 14:51:08.122233 CPU: family 06, model 8c, stepping 01
530 14:51:08.125551 Clearing out pending MCEs
531 14:51:08.125633 Clearing out pending MCEs
532 14:51:08.129295 Setting up local APIC...
533 14:51:08.132498 Initializing CPU #2
534 14:51:08.135505 Initializing CPU #5
535 14:51:08.135617 CPU: vendor Intel device 806c1
536 14:51:08.142413 CPU: family 06, model 8c, stepping 01
537 14:51:08.142527 Setting up local APIC...
538 14:51:08.145355 CPU: vendor Intel device 806c1
539 14:51:08.149194 CPU: family 06, model 8c, stepping 01
540 14:51:08.152262 Clearing out pending MCEs
541 14:51:08.155503 Clearing out pending MCEs
542 14:51:08.158837 Setting up local APIC...
543 14:51:08.158955 apic_id: 0x06 done.
544 14:51:08.162485 apic_id: 0x07 done.
545 14:51:08.165517 microcode: Update skipped, already up-to-date
546 14:51:08.172407 microcode: Update skipped, already up-to-date
547 14:51:08.172523 CPU #4 initialized
548 14:51:08.175481 CPU #7 initialized
549 14:51:08.178629 Initializing CPU #1
550 14:51:08.178715 apic_id: 0x04 done.
551 14:51:08.182321 Setting up local APIC...
552 14:51:08.185805 CPU: vendor Intel device 806c1
553 14:51:08.188842 CPU: family 06, model 8c, stepping 01
554 14:51:08.191954 Setting up local APIC...
555 14:51:08.195724 microcode: Update skipped, already up-to-date
556 14:51:08.198876 apic_id: 0x05 done.
557 14:51:08.201934 CPU #6 initialized
558 14:51:08.205536 microcode: Update skipped, already up-to-date
559 14:51:08.208608 apic_id: 0x03 done.
560 14:51:08.208701 apic_id: 0x02 done.
561 14:51:08.215318 microcode: Update skipped, already up-to-date
562 14:51:08.218486 microcode: Update skipped, already up-to-date
563 14:51:08.222079 CPU #2 initialized
564 14:51:08.222156 CPU #5 initialized
565 14:51:08.225255 Clearing out pending MCEs
566 14:51:08.228418 CPU #3 initialized
567 14:51:08.228528 Setting up local APIC...
568 14:51:08.232306 apic_id: 0x01 done.
569 14:51:08.235255 microcode: Update skipped, already up-to-date
570 14:51:08.238557 CPU #1 initialized
571 14:51:08.242217 bsp_do_flight_plan done after 455 msecs.
572 14:51:08.245378 CPU: frequency set to 4000 MHz
573 14:51:08.248501 Enabling SMIs.
574 14:51:08.255344 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
575 14:51:08.270051 SATAXPCIE1 indicates PCIe NVMe is present
576 14:51:08.273016 Probing TPM: done!
577 14:51:08.276345 Connected to device vid:did:rid of 1ae0:0028:00
578 14:51:08.287329 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
579 14:51:08.290806 Initialized TPM device CR50 revision 0
580 14:51:08.293895 Enabling S0i3.4
581 14:51:08.300371 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 14:51:08.303539 Found a VBT of 8704 bytes after decompression
583 14:51:08.310212 cse_lite: CSE RO boot. HybridStorageMode disabled
584 14:51:08.316809 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 14:51:08.393329 FSPS returned 0
586 14:51:08.396776 Executing Phase 1 of FspMultiPhaseSiInit
587 14:51:08.406363 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 14:51:08.409724 port C0 DISC req: usage 1 usb3 1 usb2 5
589 14:51:08.413236 Raw Buffer output 0 00000511
590 14:51:08.416489 Raw Buffer output 1 00000000
591 14:51:08.420110 pmc_send_ipc_cmd succeeded
592 14:51:08.426809 port C1 DISC req: usage 1 usb3 2 usb2 3
593 14:51:08.426931 Raw Buffer output 0 00000321
594 14:51:08.429913 Raw Buffer output 1 00000000
595 14:51:08.434291 pmc_send_ipc_cmd succeeded
596 14:51:08.439216 Detected 4 core, 8 thread CPU.
597 14:51:08.442863 Detected 4 core, 8 thread CPU.
598 14:51:08.676262 Display FSP Version Info HOB
599 14:51:08.679949 Reference Code - CPU = a.0.4c.31
600 14:51:08.683030 uCode Version = 0.0.0.86
601 14:51:08.686652 TXT ACM version = ff.ff.ff.ffff
602 14:51:08.689567 Reference Code - ME = a.0.4c.31
603 14:51:08.693199 MEBx version = 0.0.0.0
604 14:51:08.696235 ME Firmware Version = Consumer SKU
605 14:51:08.699367 Reference Code - PCH = a.0.4c.31
606 14:51:08.702823 PCH-CRID Status = Disabled
607 14:51:08.705970 PCH-CRID Original Value = ff.ff.ff.ffff
608 14:51:08.709592 PCH-CRID New Value = ff.ff.ff.ffff
609 14:51:08.713170 OPROM - RST - RAID = ff.ff.ff.ffff
610 14:51:08.716398 PCH Hsio Version = 4.0.0.0
611 14:51:08.719480 Reference Code - SA - System Agent = a.0.4c.31
612 14:51:08.723042 Reference Code - MRC = 2.0.0.1
613 14:51:08.725902 SA - PCIe Version = a.0.4c.31
614 14:51:08.729602 SA-CRID Status = Disabled
615 14:51:08.732795 SA-CRID Original Value = 0.0.0.1
616 14:51:08.735974 SA-CRID New Value = 0.0.0.1
617 14:51:08.739491 OPROM - VBIOS = ff.ff.ff.ffff
618 14:51:08.742993 IO Manageability Engine FW Version = 11.1.4.0
619 14:51:08.746095 PHY Build Version = 0.0.0.e0
620 14:51:08.749210 Thunderbolt(TM) FW Version = 0.0.0.0
621 14:51:08.756044 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 14:51:08.759148 ITSS IRQ Polarities Before:
623 14:51:08.759229 IPC0: 0xffffffff
624 14:51:08.762821 IPC1: 0xffffffff
625 14:51:08.762914 IPC2: 0xffffffff
626 14:51:08.765978 IPC3: 0xffffffff
627 14:51:08.768987 ITSS IRQ Polarities After:
628 14:51:08.769063 IPC0: 0xffffffff
629 14:51:08.772796 IPC1: 0xffffffff
630 14:51:08.772874 IPC2: 0xffffffff
631 14:51:08.775827 IPC3: 0xffffffff
632 14:51:08.778971 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 14:51:08.792230 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 14:51:08.802689 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 14:51:08.815465 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 14:51:08.821930 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 14:51:08.825637 Enumerating buses...
638 14:51:08.828618 Show all devs... Before device enumeration.
639 14:51:08.832277 Root Device: enabled 1
640 14:51:08.832415 DOMAIN: 0000: enabled 1
641 14:51:08.835870 CPU_CLUSTER: 0: enabled 1
642 14:51:08.839069 PCI: 00:00.0: enabled 1
643 14:51:08.842129 PCI: 00:02.0: enabled 1
644 14:51:08.842242 PCI: 00:04.0: enabled 1
645 14:51:08.845213 PCI: 00:05.0: enabled 1
646 14:51:08.848655 PCI: 00:06.0: enabled 0
647 14:51:08.851820 PCI: 00:07.0: enabled 0
648 14:51:08.851906 PCI: 00:07.1: enabled 0
649 14:51:08.855528 PCI: 00:07.2: enabled 0
650 14:51:08.858781 PCI: 00:07.3: enabled 0
651 14:51:08.861998 PCI: 00:08.0: enabled 1
652 14:51:08.862111 PCI: 00:09.0: enabled 0
653 14:51:08.865146 PCI: 00:0a.0: enabled 0
654 14:51:08.868236 PCI: 00:0d.0: enabled 1
655 14:51:08.871899 PCI: 00:0d.1: enabled 0
656 14:51:08.872015 PCI: 00:0d.2: enabled 0
657 14:51:08.875047 PCI: 00:0d.3: enabled 0
658 14:51:08.878235 PCI: 00:0e.0: enabled 0
659 14:51:08.878340 PCI: 00:10.2: enabled 1
660 14:51:08.881872 PCI: 00:10.6: enabled 0
661 14:51:08.885005 PCI: 00:10.7: enabled 0
662 14:51:08.888125 PCI: 00:12.0: enabled 0
663 14:51:08.888251 PCI: 00:12.6: enabled 0
664 14:51:08.891804 PCI: 00:13.0: enabled 0
665 14:51:08.894995 PCI: 00:14.0: enabled 1
666 14:51:08.898081 PCI: 00:14.1: enabled 0
667 14:51:08.898188 PCI: 00:14.2: enabled 1
668 14:51:08.901652 PCI: 00:14.3: enabled 1
669 14:51:08.905156 PCI: 00:15.0: enabled 1
670 14:51:08.908184 PCI: 00:15.1: enabled 1
671 14:51:08.908294 PCI: 00:15.2: enabled 1
672 14:51:08.911831 PCI: 00:15.3: enabled 1
673 14:51:08.914940 PCI: 00:16.0: enabled 1
674 14:51:08.918371 PCI: 00:16.1: enabled 0
675 14:51:08.918456 PCI: 00:16.2: enabled 0
676 14:51:08.921501 PCI: 00:16.3: enabled 0
677 14:51:08.924663 PCI: 00:16.4: enabled 0
678 14:51:08.924741 PCI: 00:16.5: enabled 0
679 14:51:08.928135 PCI: 00:17.0: enabled 1
680 14:51:08.931803 PCI: 00:19.0: enabled 0
681 14:51:08.934799 PCI: 00:19.1: enabled 1
682 14:51:08.934887 PCI: 00:19.2: enabled 0
683 14:51:08.937835 PCI: 00:1c.0: enabled 1
684 14:51:08.940960 PCI: 00:1c.1: enabled 0
685 14:51:08.944657 PCI: 00:1c.2: enabled 0
686 14:51:08.944774 PCI: 00:1c.3: enabled 0
687 14:51:08.947755 PCI: 00:1c.4: enabled 0
688 14:51:08.951274 PCI: 00:1c.5: enabled 0
689 14:51:08.954317 PCI: 00:1c.6: enabled 1
690 14:51:08.954430 PCI: 00:1c.7: enabled 0
691 14:51:08.958120 PCI: 00:1d.0: enabled 1
692 14:51:08.961252 PCI: 00:1d.1: enabled 0
693 14:51:08.964353 PCI: 00:1d.2: enabled 1
694 14:51:08.964469 PCI: 00:1d.3: enabled 0
695 14:51:08.968033 PCI: 00:1e.0: enabled 1
696 14:51:08.971041 PCI: 00:1e.1: enabled 0
697 14:51:08.974233 PCI: 00:1e.2: enabled 1
698 14:51:08.974348 PCI: 00:1e.3: enabled 1
699 14:51:08.977472 PCI: 00:1f.0: enabled 1
700 14:51:08.981177 PCI: 00:1f.1: enabled 0
701 14:51:08.981257 PCI: 00:1f.2: enabled 1
702 14:51:08.984241 PCI: 00:1f.3: enabled 1
703 14:51:08.987993 PCI: 00:1f.4: enabled 0
704 14:51:08.991095 PCI: 00:1f.5: enabled 1
705 14:51:08.991181 PCI: 00:1f.6: enabled 0
706 14:51:08.994174 PCI: 00:1f.7: enabled 0
707 14:51:08.997897 APIC: 00: enabled 1
708 14:51:09.001036 GENERIC: 0.0: enabled 1
709 14:51:09.001119 GENERIC: 0.0: enabled 1
710 14:51:09.004190 GENERIC: 1.0: enabled 1
711 14:51:09.007176 GENERIC: 0.0: enabled 1
712 14:51:09.010822 GENERIC: 1.0: enabled 1
713 14:51:09.010907 USB0 port 0: enabled 1
714 14:51:09.014104 GENERIC: 0.0: enabled 1
715 14:51:09.017232 USB0 port 0: enabled 1
716 14:51:09.017332 GENERIC: 0.0: enabled 1
717 14:51:09.020742 I2C: 00:1a: enabled 1
718 14:51:09.024387 I2C: 00:31: enabled 1
719 14:51:09.024498 I2C: 00:32: enabled 1
720 14:51:09.027441 I2C: 00:10: enabled 1
721 14:51:09.030464 I2C: 00:15: enabled 1
722 14:51:09.034206 GENERIC: 0.0: enabled 0
723 14:51:09.034321 GENERIC: 1.0: enabled 0
724 14:51:09.037132 GENERIC: 0.0: enabled 1
725 14:51:09.040157 SPI: 00: enabled 1
726 14:51:09.040272 SPI: 00: enabled 1
727 14:51:09.044126 PNP: 0c09.0: enabled 1
728 14:51:09.047088 GENERIC: 0.0: enabled 1
729 14:51:09.047202 USB3 port 0: enabled 1
730 14:51:09.050171 USB3 port 1: enabled 1
731 14:51:09.053871 USB3 port 2: enabled 0
732 14:51:09.053990 USB3 port 3: enabled 0
733 14:51:09.056946 USB2 port 0: enabled 0
734 14:51:09.060633 USB2 port 1: enabled 1
735 14:51:09.063713 USB2 port 2: enabled 1
736 14:51:09.063798 USB2 port 3: enabled 0
737 14:51:09.066796 USB2 port 4: enabled 1
738 14:51:09.070033 USB2 port 5: enabled 0
739 14:51:09.070125 USB2 port 6: enabled 0
740 14:51:09.073876 USB2 port 7: enabled 0
741 14:51:09.077037 USB2 port 8: enabled 0
742 14:51:09.080190 USB2 port 9: enabled 0
743 14:51:09.080272 USB3 port 0: enabled 0
744 14:51:09.083286 USB3 port 1: enabled 1
745 14:51:09.087055 USB3 port 2: enabled 0
746 14:51:09.087140 USB3 port 3: enabled 0
747 14:51:09.090081 GENERIC: 0.0: enabled 1
748 14:51:09.093877 GENERIC: 1.0: enabled 1
749 14:51:09.093957 APIC: 01: enabled 1
750 14:51:09.097058 APIC: 03: enabled 1
751 14:51:09.100119 APIC: 05: enabled 1
752 14:51:09.100225 APIC: 06: enabled 1
753 14:51:09.103313 APIC: 02: enabled 1
754 14:51:09.106380 APIC: 04: enabled 1
755 14:51:09.106487 APIC: 07: enabled 1
756 14:51:09.110203 Compare with tree...
757 14:51:09.113284 Root Device: enabled 1
758 14:51:09.113367 DOMAIN: 0000: enabled 1
759 14:51:09.116877 PCI: 00:00.0: enabled 1
760 14:51:09.119917 PCI: 00:02.0: enabled 1
761 14:51:09.123216 PCI: 00:04.0: enabled 1
762 14:51:09.126805 GENERIC: 0.0: enabled 1
763 14:51:09.126894 PCI: 00:05.0: enabled 1
764 14:51:09.129757 PCI: 00:06.0: enabled 0
765 14:51:09.133373 PCI: 00:07.0: enabled 0
766 14:51:09.136712 GENERIC: 0.0: enabled 1
767 14:51:09.139703 PCI: 00:07.1: enabled 0
768 14:51:09.139824 GENERIC: 1.0: enabled 1
769 14:51:09.143092 PCI: 00:07.2: enabled 0
770 14:51:09.146471 GENERIC: 0.0: enabled 1
771 14:51:09.149912 PCI: 00:07.3: enabled 0
772 14:51:09.152860 GENERIC: 1.0: enabled 1
773 14:51:09.152948 PCI: 00:08.0: enabled 1
774 14:51:09.156389 PCI: 00:09.0: enabled 0
775 14:51:09.160001 PCI: 00:0a.0: enabled 0
776 14:51:09.162768 PCI: 00:0d.0: enabled 1
777 14:51:09.166028 USB0 port 0: enabled 1
778 14:51:09.166139 USB3 port 0: enabled 1
779 14:51:09.169970 USB3 port 1: enabled 1
780 14:51:09.173090 USB3 port 2: enabled 0
781 14:51:09.176013 USB3 port 3: enabled 0
782 14:51:09.179798 PCI: 00:0d.1: enabled 0
783 14:51:09.182914 PCI: 00:0d.2: enabled 0
784 14:51:09.183029 GENERIC: 0.0: enabled 1
785 14:51:09.186127 PCI: 00:0d.3: enabled 0
786 14:51:09.189371 PCI: 00:0e.0: enabled 0
787 14:51:09.192568 PCI: 00:10.2: enabled 1
788 14:51:09.196528 PCI: 00:10.6: enabled 0
789 14:51:09.196616 PCI: 00:10.7: enabled 0
790 14:51:09.199482 PCI: 00:12.0: enabled 0
791 14:51:09.202553 PCI: 00:12.6: enabled 0
792 14:51:09.205745 PCI: 00:13.0: enabled 0
793 14:51:09.209527 PCI: 00:14.0: enabled 1
794 14:51:09.209648 USB0 port 0: enabled 1
795 14:51:09.212568 USB2 port 0: enabled 0
796 14:51:09.215791 USB2 port 1: enabled 1
797 14:51:09.219522 USB2 port 2: enabled 1
798 14:51:09.222783 USB2 port 3: enabled 0
799 14:51:09.222871 USB2 port 4: enabled 1
800 14:51:09.225730 USB2 port 5: enabled 0
801 14:51:09.229216 USB2 port 6: enabled 0
802 14:51:09.232554 USB2 port 7: enabled 0
803 14:51:09.236528 USB2 port 8: enabled 0
804 14:51:09.239062 USB2 port 9: enabled 0
805 14:51:09.239179 USB3 port 0: enabled 0
806 14:51:09.242356 USB3 port 1: enabled 1
807 14:51:09.245996 USB3 port 2: enabled 0
808 14:51:09.249273 USB3 port 3: enabled 0
809 14:51:09.252185 PCI: 00:14.1: enabled 0
810 14:51:09.252300 PCI: 00:14.2: enabled 1
811 14:51:09.255672 PCI: 00:14.3: enabled 1
812 14:51:09.259133 GENERIC: 0.0: enabled 1
813 14:51:09.262556 PCI: 00:15.0: enabled 1
814 14:51:09.265279 I2C: 00:1a: enabled 1
815 14:51:09.265368 I2C: 00:31: enabled 1
816 14:51:09.268878 I2C: 00:32: enabled 1
817 14:51:09.272405 PCI: 00:15.1: enabled 1
818 14:51:09.275571 I2C: 00:10: enabled 1
819 14:51:09.278791 PCI: 00:15.2: enabled 1
820 14:51:09.278879 PCI: 00:15.3: enabled 1
821 14:51:09.282019 PCI: 00:16.0: enabled 1
822 14:51:09.285144 PCI: 00:16.1: enabled 0
823 14:51:09.288450 PCI: 00:16.2: enabled 0
824 14:51:09.292166 PCI: 00:16.3: enabled 0
825 14:51:09.292292 PCI: 00:16.4: enabled 0
826 14:51:09.295364 PCI: 00:16.5: enabled 0
827 14:51:09.298330 PCI: 00:17.0: enabled 1
828 14:51:09.301610 PCI: 00:19.0: enabled 0
829 14:51:09.305375 PCI: 00:19.1: enabled 1
830 14:51:09.305490 I2C: 00:15: enabled 1
831 14:51:09.308606 PCI: 00:19.2: enabled 0
832 14:51:09.311903 PCI: 00:1d.0: enabled 1
833 14:51:09.315005 GENERIC: 0.0: enabled 1
834 14:51:09.365194 PCI: 00:1e.0: enabled 1
835 14:51:09.365330 PCI: 00:1e.1: enabled 0
836 14:51:09.365401 PCI: 00:1e.2: enabled 1
837 14:51:09.365661 SPI: 00: enabled 1
838 14:51:09.365731 PCI: 00:1e.3: enabled 1
839 14:51:09.365793 SPI: 00: enabled 1
840 14:51:09.365852 PCI: 00:1f.0: enabled 1
841 14:51:09.365909 PNP: 0c09.0: enabled 1
842 14:51:09.365966 PCI: 00:1f.1: enabled 0
843 14:51:09.366029 PCI: 00:1f.2: enabled 1
844 14:51:09.366129 GENERIC: 0.0: enabled 1
845 14:51:09.366218 GENERIC: 0.0: enabled 1
846 14:51:09.366280 GENERIC: 1.0: enabled 1
847 14:51:09.366338 PCI: 00:1f.3: enabled 1
848 14:51:09.366394 PCI: 00:1f.4: enabled 0
849 14:51:09.366450 PCI: 00:1f.5: enabled 1
850 14:51:09.366505 PCI: 00:1f.6: enabled 0
851 14:51:09.366560 PCI: 00:1f.7: enabled 0
852 14:51:09.366616 CPU_CLUSTER: 0: enabled 1
853 14:51:09.366670 APIC: 00: enabled 1
854 14:51:09.417158 APIC: 01: enabled 1
855 14:51:09.417304 APIC: 03: enabled 1
856 14:51:09.417577 APIC: 05: enabled 1
857 14:51:09.417646 APIC: 06: enabled 1
858 14:51:09.417709 APIC: 02: enabled 1
859 14:51:09.417769 APIC: 04: enabled 1
860 14:51:09.417828 APIC: 07: enabled 1
861 14:51:09.417885 Root Device scanning...
862 14:51:09.417942 scan_static_bus for Root Device
863 14:51:09.417998 DOMAIN: 0000 enabled
864 14:51:09.418054 CPU_CLUSTER: 0 enabled
865 14:51:09.418109 DOMAIN: 0000 scanning...
866 14:51:09.418163 PCI: pci_scan_bus for bus 00
867 14:51:09.418230 PCI: 00:00.0 [8086/0000] ops
868 14:51:09.418287 PCI: 00:00.0 [8086/9a12] enabled
869 14:51:09.418342 PCI: 00:02.0 [8086/0000] bus ops
870 14:51:09.418397 PCI: 00:02.0 [8086/9a40] enabled
871 14:51:09.418451 PCI: 00:04.0 [8086/0000] bus ops
872 14:51:09.455314 PCI: 00:04.0 [8086/9a03] enabled
873 14:51:09.455468 PCI: 00:05.0 [8086/9a19] enabled
874 14:51:09.455754 PCI: 00:07.0 [0000/0000] hidden
875 14:51:09.455859 PCI: 00:08.0 [8086/9a11] enabled
876 14:51:09.455957 PCI: 00:0a.0 [8086/9a0d] disabled
877 14:51:09.456054 PCI: 00:0d.0 [8086/0000] bus ops
878 14:51:09.456144 PCI: 00:0d.0 [8086/9a13] enabled
879 14:51:09.456233 PCI: 00:14.0 [8086/0000] bus ops
880 14:51:09.456334 PCI: 00:14.0 [8086/a0ed] enabled
881 14:51:09.456408 PCI: 00:14.2 [8086/a0ef] enabled
882 14:51:09.456467 PCI: 00:14.3 [8086/0000] bus ops
883 14:51:09.456524 PCI: 00:14.3 [8086/a0f0] enabled
884 14:51:09.459075 PCI: 00:15.0 [8086/0000] bus ops
885 14:51:09.462636 PCI: 00:15.0 [8086/a0e8] enabled
886 14:51:09.466126 PCI: 00:15.1 [8086/0000] bus ops
887 14:51:09.469228 PCI: 00:15.1 [8086/a0e9] enabled
888 14:51:09.472944 PCI: 00:15.2 [8086/0000] bus ops
889 14:51:09.475636 PCI: 00:15.2 [8086/a0ea] enabled
890 14:51:09.479169 PCI: 00:15.3 [8086/0000] bus ops
891 14:51:09.482694 PCI: 00:15.3 [8086/a0eb] enabled
892 14:51:09.485779 PCI: 00:16.0 [8086/0000] ops
893 14:51:09.489372 PCI: 00:16.0 [8086/a0e0] enabled
894 14:51:09.495612 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 14:51:09.498765 PCI: 00:19.0 [8086/0000] bus ops
896 14:51:09.501920 PCI: 00:19.0 [8086/a0c5] disabled
897 14:51:09.505673 PCI: 00:19.1 [8086/0000] bus ops
898 14:51:09.508692 PCI: 00:19.1 [8086/a0c6] enabled
899 14:51:09.511851 PCI: 00:1d.0 [8086/0000] bus ops
900 14:51:09.515107 PCI: 00:1d.0 [8086/a0b0] enabled
901 14:51:09.518888 PCI: 00:1e.0 [8086/0000] ops
902 14:51:09.522017 PCI: 00:1e.0 [8086/a0a8] enabled
903 14:51:09.525232 PCI: 00:1e.2 [8086/0000] bus ops
904 14:51:09.528502 PCI: 00:1e.2 [8086/a0aa] enabled
905 14:51:09.532226 PCI: 00:1e.3 [8086/0000] bus ops
906 14:51:09.535363 PCI: 00:1e.3 [8086/a0ab] enabled
907 14:51:09.538495 PCI: 00:1f.0 [8086/0000] bus ops
908 14:51:09.541903 PCI: 00:1f.0 [8086/a087] enabled
909 14:51:09.542025 RTC Init
910 14:51:09.544870 Set power on after power failure.
911 14:51:09.548670 Disabling Deep S3
912 14:51:09.548781 Disabling Deep S3
913 14:51:09.551865 Disabling Deep S4
914 14:51:09.554944 Disabling Deep S4
915 14:51:09.555064 Disabling Deep S5
916 14:51:09.558024 Disabling Deep S5
917 14:51:09.561533 PCI: 00:1f.2 [0000/0000] hidden
918 14:51:09.564995 PCI: 00:1f.3 [8086/0000] bus ops
919 14:51:09.568027 PCI: 00:1f.3 [8086/a0c8] enabled
920 14:51:09.571418 PCI: 00:1f.5 [8086/0000] bus ops
921 14:51:09.574801 PCI: 00:1f.5 [8086/a0a4] enabled
922 14:51:09.578305 PCI: Leftover static devices:
923 14:51:09.578419 PCI: 00:10.2
924 14:51:09.578528 PCI: 00:10.6
925 14:51:09.581249 PCI: 00:10.7
926 14:51:09.581363 PCI: 00:06.0
927 14:51:09.584795 PCI: 00:07.1
928 14:51:09.584905 PCI: 00:07.2
929 14:51:09.588159 PCI: 00:07.3
930 14:51:09.588237 PCI: 00:09.0
931 14:51:09.588305 PCI: 00:0d.1
932 14:51:09.591492 PCI: 00:0d.2
933 14:51:09.591604 PCI: 00:0d.3
934 14:51:09.594739 PCI: 00:0e.0
935 14:51:09.594820 PCI: 00:12.0
936 14:51:09.594884 PCI: 00:12.6
937 14:51:09.597651 PCI: 00:13.0
938 14:51:09.597729 PCI: 00:14.1
939 14:51:09.601012 PCI: 00:16.1
940 14:51:09.601090 PCI: 00:16.2
941 14:51:09.604806 PCI: 00:16.3
942 14:51:09.604897 PCI: 00:16.4
943 14:51:09.604965 PCI: 00:16.5
944 14:51:09.608024 PCI: 00:17.0
945 14:51:09.608137 PCI: 00:19.2
946 14:51:09.611015 PCI: 00:1e.1
947 14:51:09.611137 PCI: 00:1f.1
948 14:51:09.611232 PCI: 00:1f.4
949 14:51:09.614276 PCI: 00:1f.6
950 14:51:09.614384 PCI: 00:1f.7
951 14:51:09.617864 PCI: Check your devicetree.cb.
952 14:51:09.620979 PCI: 00:02.0 scanning...
953 14:51:09.624023 scan_generic_bus for PCI: 00:02.0
954 14:51:09.627724 scan_generic_bus for PCI: 00:02.0 done
955 14:51:09.634109 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 14:51:09.634227 PCI: 00:04.0 scanning...
957 14:51:09.641083 scan_generic_bus for PCI: 00:04.0
958 14:51:09.641198 GENERIC: 0.0 enabled
959 14:51:09.647923 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 14:51:09.650901 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 14:51:09.653982 PCI: 00:0d.0 scanning...
962 14:51:09.657123 scan_static_bus for PCI: 00:0d.0
963 14:51:09.660768 USB0 port 0 enabled
964 14:51:09.663816 USB0 port 0 scanning...
965 14:51:09.667527 scan_static_bus for USB0 port 0
966 14:51:09.667632 USB3 port 0 enabled
967 14:51:09.670534 USB3 port 1 enabled
968 14:51:09.674056 USB3 port 2 disabled
969 14:51:09.674166 USB3 port 3 disabled
970 14:51:09.676988 USB3 port 0 scanning...
971 14:51:09.680504 scan_static_bus for USB3 port 0
972 14:51:09.683885 scan_static_bus for USB3 port 0 done
973 14:51:09.690810 scan_bus: bus USB3 port 0 finished in 6 msecs
974 14:51:09.690986 USB3 port 1 scanning...
975 14:51:09.693634 scan_static_bus for USB3 port 1
976 14:51:09.697086 scan_static_bus for USB3 port 1 done
977 14:51:09.703884 scan_bus: bus USB3 port 1 finished in 6 msecs
978 14:51:09.706755 scan_static_bus for USB0 port 0 done
979 14:51:09.710343 scan_bus: bus USB0 port 0 finished in 43 msecs
980 14:51:09.717247 scan_static_bus for PCI: 00:0d.0 done
981 14:51:09.720338 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 14:51:09.723559 PCI: 00:14.0 scanning...
983 14:51:09.726647 scan_static_bus for PCI: 00:14.0
984 14:51:09.726776 USB0 port 0 enabled
985 14:51:09.729974 USB0 port 0 scanning...
986 14:51:09.733116 scan_static_bus for USB0 port 0
987 14:51:09.736861 USB2 port 0 disabled
988 14:51:09.740081 USB2 port 1 enabled
989 14:51:09.740236 USB2 port 2 enabled
990 14:51:09.743130 USB2 port 3 disabled
991 14:51:09.743270 USB2 port 4 enabled
992 14:51:09.746406 USB2 port 5 disabled
993 14:51:09.750380 USB2 port 6 disabled
994 14:51:09.750489 USB2 port 7 disabled
995 14:51:09.753478 USB2 port 8 disabled
996 14:51:09.756623 USB2 port 9 disabled
997 14:51:09.756715 USB3 port 0 disabled
998 14:51:09.759837 USB3 port 1 enabled
999 14:51:09.763485 USB3 port 2 disabled
1000 14:51:09.763575 USB3 port 3 disabled
1001 14:51:09.766849 USB2 port 1 scanning...
1002 14:51:09.769949 scan_static_bus for USB2 port 1
1003 14:51:09.772973 scan_static_bus for USB2 port 1 done
1004 14:51:09.779621 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 14:51:09.779746 USB2 port 2 scanning...
1006 14:51:09.783249 scan_static_bus for USB2 port 2
1007 14:51:09.786241 scan_static_bus for USB2 port 2 done
1008 14:51:09.792855 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 14:51:09.796311 USB2 port 4 scanning...
1010 14:51:09.799868 scan_static_bus for USB2 port 4
1011 14:51:09.802824 scan_static_bus for USB2 port 4 done
1012 14:51:09.806322 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 14:51:09.809295 USB3 port 1 scanning...
1014 14:51:09.813168 scan_static_bus for USB3 port 1
1015 14:51:09.815981 scan_static_bus for USB3 port 1 done
1016 14:51:09.819201 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 14:51:09.826227 scan_static_bus for USB0 port 0 done
1018 14:51:09.829340 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 14:51:09.832549 scan_static_bus for PCI: 00:14.0 done
1020 14:51:09.839544 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 14:51:09.839676 PCI: 00:14.3 scanning...
1022 14:51:09.842606 scan_static_bus for PCI: 00:14.3
1023 14:51:09.845747 GENERIC: 0.0 enabled
1024 14:51:09.849506 scan_static_bus for PCI: 00:14.3 done
1025 14:51:09.855950 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 14:51:09.856081 PCI: 00:15.0 scanning...
1027 14:51:09.858873 scan_static_bus for PCI: 00:15.0
1028 14:51:09.862521 I2C: 00:1a enabled
1029 14:51:09.865660 I2C: 00:31 enabled
1030 14:51:09.865780 I2C: 00:32 enabled
1031 14:51:09.869360 scan_static_bus for PCI: 00:15.0 done
1032 14:51:09.875748 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 14:51:09.878863 PCI: 00:15.1 scanning...
1034 14:51:09.882631 scan_static_bus for PCI: 00:15.1
1035 14:51:09.882746 I2C: 00:10 enabled
1036 14:51:09.885505 scan_static_bus for PCI: 00:15.1 done
1037 14:51:09.892448 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 14:51:09.895231 PCI: 00:15.2 scanning...
1039 14:51:09.898929 scan_static_bus for PCI: 00:15.2
1040 14:51:09.902305 scan_static_bus for PCI: 00:15.2 done
1041 14:51:09.906006 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 14:51:09.908990 PCI: 00:15.3 scanning...
1043 14:51:09.912611 scan_static_bus for PCI: 00:15.3
1044 14:51:09.916221 scan_static_bus for PCI: 00:15.3 done
1045 14:51:09.922291 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 14:51:09.922418 PCI: 00:19.1 scanning...
1047 14:51:09.925518 scan_static_bus for PCI: 00:19.1
1048 14:51:09.929271 I2C: 00:15 enabled
1049 14:51:09.932343 scan_static_bus for PCI: 00:19.1 done
1050 14:51:09.938848 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 14:51:09.938956 PCI: 00:1d.0 scanning...
1052 14:51:09.945521 do_pci_scan_bridge for PCI: 00:1d.0
1053 14:51:09.945623 PCI: pci_scan_bus for bus 01
1054 14:51:09.948816 PCI: 01:00.0 [1c5c/174a] enabled
1055 14:51:09.951928 GENERIC: 0.0 enabled
1056 14:51:09.955076 Enabling Common Clock Configuration
1057 14:51:09.961788 L1 Sub-State supported from root port 29
1058 14:51:09.961925 L1 Sub-State Support = 0xf
1059 14:51:09.965549 CommonModeRestoreTime = 0x28
1060 14:51:09.971777 Power On Value = 0x16, Power On Scale = 0x0
1061 14:51:09.971888 ASPM: Enabled L1
1062 14:51:09.974975 PCIe: Max_Payload_Size adjusted to 128
1063 14:51:09.981343 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 14:51:09.984474 PCI: 00:1e.2 scanning...
1065 14:51:09.988212 scan_generic_bus for PCI: 00:1e.2
1066 14:51:09.988331 SPI: 00 enabled
1067 14:51:09.994865 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 14:51:10.001576 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 14:51:10.001684 PCI: 00:1e.3 scanning...
1070 14:51:10.004549 scan_generic_bus for PCI: 00:1e.3
1071 14:51:10.008073 SPI: 00 enabled
1072 14:51:10.014600 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 14:51:10.017647 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 14:51:10.021036 PCI: 00:1f.0 scanning...
1075 14:51:10.024504 scan_static_bus for PCI: 00:1f.0
1076 14:51:10.027537 PNP: 0c09.0 enabled
1077 14:51:10.027684 PNP: 0c09.0 scanning...
1078 14:51:10.031140 scan_static_bus for PNP: 0c09.0
1079 14:51:10.037671 scan_static_bus for PNP: 0c09.0 done
1080 14:51:10.040759 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 14:51:10.043994 scan_static_bus for PCI: 00:1f.0 done
1082 14:51:10.050956 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 14:51:10.051078 PCI: 00:1f.2 scanning...
1084 14:51:10.054054 scan_static_bus for PCI: 00:1f.2
1085 14:51:10.057279 GENERIC: 0.0 enabled
1086 14:51:10.060943 GENERIC: 0.0 scanning...
1087 14:51:10.064129 scan_static_bus for GENERIC: 0.0
1088 14:51:10.067193 GENERIC: 0.0 enabled
1089 14:51:10.067300 GENERIC: 1.0 enabled
1090 14:51:10.070818 scan_static_bus for GENERIC: 0.0 done
1091 14:51:10.077695 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 14:51:10.080937 scan_static_bus for PCI: 00:1f.2 done
1093 14:51:10.084053 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 14:51:10.087084 PCI: 00:1f.3 scanning...
1095 14:51:10.090195 scan_static_bus for PCI: 00:1f.3
1096 14:51:10.093991 scan_static_bus for PCI: 00:1f.3 done
1097 14:51:10.100596 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 14:51:10.103699 PCI: 00:1f.5 scanning...
1099 14:51:10.107214 scan_generic_bus for PCI: 00:1f.5
1100 14:51:10.110209 scan_generic_bus for PCI: 00:1f.5 done
1101 14:51:10.113745 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 14:51:10.120070 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 14:51:10.123696 scan_static_bus for Root Device done
1104 14:51:10.126820 scan_bus: bus Root Device finished in 737 msecs
1105 14:51:10.130180 done
1106 14:51:10.136739 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 14:51:10.139836 Chrome EC: UHEPI supported
1108 14:51:10.146180 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 14:51:10.153135 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 14:51:10.156220 SPI flash protection: WPSW=0 SRP0=0
1111 14:51:10.159369 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 14:51:10.166246 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1113 14:51:10.169536 found VGA at PCI: 00:02.0
1114 14:51:10.173044 Setting up VGA for PCI: 00:02.0
1115 14:51:10.176097 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 14:51:10.182521 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 14:51:10.182635 Allocating resources...
1118 14:51:10.186214 Reading resources...
1119 14:51:10.189372 Root Device read_resources bus 0 link: 0
1120 14:51:10.195657 DOMAIN: 0000 read_resources bus 0 link: 0
1121 14:51:10.199057 PCI: 00:04.0 read_resources bus 1 link: 0
1122 14:51:10.205926 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 14:51:10.209011 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 14:51:10.215868 USB0 port 0 read_resources bus 0 link: 0
1125 14:51:10.218620 USB0 port 0 read_resources bus 0 link: 0 done
1126 14:51:10.225603 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 14:51:10.228529 PCI: 00:14.0 read_resources bus 0 link: 0
1128 14:51:10.232196 USB0 port 0 read_resources bus 0 link: 0
1129 14:51:10.239901 USB0 port 0 read_resources bus 0 link: 0 done
1130 14:51:10.242929 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 14:51:10.249885 PCI: 00:14.3 read_resources bus 0 link: 0
1132 14:51:10.253020 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 14:51:10.259847 PCI: 00:15.0 read_resources bus 0 link: 0
1134 14:51:10.262968 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 14:51:10.269287 PCI: 00:15.1 read_resources bus 0 link: 0
1136 14:51:10.272963 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 14:51:10.280298 PCI: 00:19.1 read_resources bus 0 link: 0
1138 14:51:10.283539 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 14:51:10.290059 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 14:51:10.293101 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 14:51:10.300508 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 14:51:10.303427 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 14:51:10.309935 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 14:51:10.313622 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 14:51:10.319835 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 14:51:10.323365 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 14:51:10.329865 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 14:51:10.332886 GENERIC: 0.0 read_resources bus 0 link: 0
1149 14:51:10.339589 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 14:51:10.343108 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 14:51:10.349978 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 14:51:10.353166 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 14:51:10.359321 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 14:51:10.362984 Root Device read_resources bus 0 link: 0 done
1155 14:51:10.366092 Done reading resources.
1156 14:51:10.372558 Show resources in subtree (Root Device)...After reading.
1157 14:51:10.376198 Root Device child on link 0 DOMAIN: 0000
1158 14:51:10.379343 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 14:51:10.389365 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 14:51:10.399060 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 14:51:10.399195 PCI: 00:00.0
1162 14:51:10.409195 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 14:51:10.419180 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 14:51:10.429258 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 14:51:10.438999 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 14:51:10.448909 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 14:51:10.458698 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 14:51:10.465448 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 14:51:10.475146 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 14:51:10.485048 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 14:51:10.495037 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 14:51:10.505156 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 14:51:10.514732 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 14:51:10.521538 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 14:51:10.531798 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 14:51:10.541563 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 14:51:10.551532 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 14:51:10.561036 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 14:51:10.571468 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 14:51:10.577651 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 14:51:10.587771 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 14:51:10.590829 PCI: 00:02.0
1183 14:51:10.600910 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 14:51:10.611063 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 14:51:10.620541 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 14:51:10.623810 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 14:51:10.633838 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 14:51:10.637087 GENERIC: 0.0
1189 14:51:10.637170 PCI: 00:05.0
1190 14:51:10.647196 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 14:51:10.653540 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 14:51:10.653639 GENERIC: 0.0
1193 14:51:10.657100 PCI: 00:08.0
1194 14:51:10.666840 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:51:10.666977 PCI: 00:0a.0
1196 14:51:10.670318 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 14:51:10.683507 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 14:51:10.686684 USB0 port 0 child on link 0 USB3 port 0
1199 14:51:10.686774 USB3 port 0
1200 14:51:10.689854 USB3 port 1
1201 14:51:10.689939 USB3 port 2
1202 14:51:10.693616 USB3 port 3
1203 14:51:10.696564 PCI: 00:14.0 child on link 0 USB0 port 0
1204 14:51:10.706538 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 14:51:10.713301 USB0 port 0 child on link 0 USB2 port 0
1206 14:51:10.713395 USB2 port 0
1207 14:51:10.716540 USB2 port 1
1208 14:51:10.716616 USB2 port 2
1209 14:51:10.720160 USB2 port 3
1210 14:51:10.720234 USB2 port 4
1211 14:51:10.723237 USB2 port 5
1212 14:51:10.723312 USB2 port 6
1213 14:51:10.726418 USB2 port 7
1214 14:51:10.729491 USB2 port 8
1215 14:51:10.729565 USB2 port 9
1216 14:51:10.733333 USB3 port 0
1217 14:51:10.733408 USB3 port 1
1218 14:51:10.736240 USB3 port 2
1219 14:51:10.736359 USB3 port 3
1220 14:51:10.739587 PCI: 00:14.2
1221 14:51:10.749370 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 14:51:10.759261 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 14:51:10.762948 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 14:51:10.772949 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 14:51:10.775839 GENERIC: 0.0
1226 14:51:10.779469 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 14:51:10.789270 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 14:51:10.789368 I2C: 00:1a
1229 14:51:10.792314 I2C: 00:31
1230 14:51:10.792418 I2C: 00:32
1231 14:51:10.799110 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 14:51:10.809078 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 14:51:10.809195 I2C: 00:10
1234 14:51:10.812079 PCI: 00:15.2
1235 14:51:10.822119 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 14:51:10.822237 PCI: 00:15.3
1237 14:51:10.832299 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 14:51:10.835417 PCI: 00:16.0
1239 14:51:10.845642 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 14:51:10.845767 PCI: 00:19.0
1241 14:51:10.851801 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 14:51:10.861816 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 14:51:10.861941 I2C: 00:15
1244 14:51:10.865345 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 14:51:10.875025 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 14:51:10.884733 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 14:51:10.895185 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 14:51:10.895301 GENERIC: 0.0
1249 14:51:10.898232 PCI: 01:00.0
1250 14:51:10.908365 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 14:51:10.917783 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 14:51:10.924538 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 14:51:10.927709 PCI: 00:1e.0
1254 14:51:10.938187 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 14:51:10.944339 PCI: 00:1e.2 child on link 0 SPI: 00
1256 14:51:10.954703 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 14:51:10.954806 SPI: 00
1258 14:51:10.957767 PCI: 00:1e.3 child on link 0 SPI: 00
1259 14:51:10.967903 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 14:51:10.970978 SPI: 00
1261 14:51:10.974134 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 14:51:10.980725 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 14:51:10.984215 PNP: 0c09.0
1264 14:51:10.994114 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 14:51:10.997539 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 14:51:11.007303 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 14:51:11.017445 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 14:51:11.020495 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 14:51:11.024030 GENERIC: 0.0
1270 14:51:11.024135 GENERIC: 1.0
1271 14:51:11.027295 PCI: 00:1f.3
1272 14:51:11.037028 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 14:51:11.046888 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 14:51:11.047007 PCI: 00:1f.5
1275 14:51:11.056932 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 14:51:11.060544 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 14:51:11.063690 APIC: 00
1278 14:51:11.063795 APIC: 01
1279 14:51:11.063889 APIC: 03
1280 14:51:11.066630 APIC: 05
1281 14:51:11.066735 APIC: 06
1282 14:51:11.070317 APIC: 02
1283 14:51:11.070428 APIC: 04
1284 14:51:11.070520 APIC: 07
1285 14:51:11.080218 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 14:51:11.083269 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 14:51:11.090129 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 14:51:11.096465 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 14:51:11.099771 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 14:51:11.106608 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 14:51:11.109743 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 14:51:11.116284 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 14:51:11.123037 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 14:51:11.132960 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 14:51:11.139675 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 14:51:11.145928 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 14:51:11.152849 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 14:51:11.159591 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 14:51:11.169302 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 14:51:11.172328 DOMAIN: 0000: Resource ranges:
1301 14:51:11.176073 * Base: 1000, Size: 800, Tag: 100
1302 14:51:11.179113 * Base: 1900, Size: e700, Tag: 100
1303 14:51:11.182624 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 14:51:11.189112 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 14:51:11.195599 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 14:51:11.205638 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 14:51:11.212604 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 14:51:11.218822 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 14:51:11.228728 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 14:51:11.235603 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 14:51:11.241813 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 14:51:11.251670 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 14:51:11.258518 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 14:51:11.265212 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 14:51:11.275146 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 14:51:11.281767 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 14:51:11.288325 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 14:51:11.298514 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 14:51:11.304763 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 14:51:11.311159 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 14:51:11.321099 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 14:51:11.328130 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 14:51:11.334956 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 14:51:11.344486 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 14:51:11.351286 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 14:51:11.357542 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 14:51:11.367557 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 14:51:11.370636 DOMAIN: 0000: Resource ranges:
1329 14:51:11.374347 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 14:51:11.377446 * Base: d0000000, Size: 28000000, Tag: 200
1331 14:51:11.384140 * Base: fa000000, Size: 1000000, Tag: 200
1332 14:51:11.387655 * Base: fb001000, Size: 2fff000, Tag: 200
1333 14:51:11.390900 * Base: fe010000, Size: 2e000, Tag: 200
1334 14:51:11.397426 * Base: fe03f000, Size: d41000, Tag: 200
1335 14:51:11.400866 * Base: fed88000, Size: 8000, Tag: 200
1336 14:51:11.403865 * Base: fed93000, Size: d000, Tag: 200
1337 14:51:11.406936 * Base: feda2000, Size: 1e000, Tag: 200
1338 14:51:11.410353 * Base: fede0000, Size: 1220000, Tag: 200
1339 14:51:11.416822 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 14:51:11.424030 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 14:51:11.430636 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 14:51:11.437138 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 14:51:11.443415 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 14:51:11.450204 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 14:51:11.456968 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 14:51:11.463730 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 14:51:11.469945 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 14:51:11.476857 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 14:51:11.483004 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 14:51:11.489887 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 14:51:11.496632 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 14:51:11.503508 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 14:51:11.509850 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 14:51:11.516278 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 14:51:11.523167 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 14:51:11.529533 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 14:51:11.536214 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 14:51:11.542785 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 14:51:11.549188 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 14:51:11.556030 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 14:51:11.562754 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 14:51:11.569004 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 14:51:11.578943 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 14:51:11.582649 PCI: 00:1d.0: Resource ranges:
1365 14:51:11.585733 * Base: 7fc00000, Size: 100000, Tag: 200
1366 14:51:11.592553 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 14:51:11.599320 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 14:51:11.605552 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 14:51:11.615175 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 14:51:11.622279 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 14:51:11.625646 Root Device assign_resources, bus 0 link: 0
1372 14:51:11.632001 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 14:51:11.638272 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 14:51:11.648564 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 14:51:11.655198 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 14:51:11.665173 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 14:51:11.668322 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 14:51:11.671461 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 14:51:11.681530 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 14:51:11.687729 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 14:51:11.697631 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 14:51:11.701256 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 14:51:11.707495 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 14:51:11.714254 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 14:51:11.721233 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 14:51:11.724088 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 14:51:11.731034 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 14:51:11.740698 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 14:51:11.747589 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 14:51:11.754109 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 14:51:11.757095 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 14:51:11.767042 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 14:51:11.770688 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 14:51:11.776760 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 14:51:11.783528 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 14:51:11.787233 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 14:51:11.793267 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 14:51:11.799931 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 14:51:11.810266 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 14:51:11.816383 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 14:51:11.826854 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 14:51:11.829642 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 14:51:11.836505 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 14:51:11.843204 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 14:51:11.852739 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 14:51:11.862964 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 14:51:11.866567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 14:51:11.876525 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 14:51:11.882539 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 14:51:11.889257 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 14:51:11.896069 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 14:51:11.902667 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 14:51:11.909184 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 14:51:11.912314 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 14:51:11.922060 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 14:51:11.925264 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 14:51:11.928943 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 14:51:11.935426 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 14:51:11.938892 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 14:51:11.945144 LPC: Trying to open IO window from 800 size 1ff
1421 14:51:11.952049 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 14:51:11.962202 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 14:51:11.968703 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 14:51:11.975003 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 14:51:11.978208 Root Device assign_resources, bus 0 link: 0
1426 14:51:11.982009 Done setting resources.
1427 14:51:11.988697 Show resources in subtree (Root Device)...After assigning values.
1428 14:51:11.991801 Root Device child on link 0 DOMAIN: 0000
1429 14:51:11.994894 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 14:51:12.004886 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 14:51:12.015172 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 14:51:12.018259 PCI: 00:00.0
1433 14:51:12.028212 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 14:51:12.038166 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 14:51:12.044613 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 14:51:12.054745 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 14:51:12.064194 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 14:51:12.074648 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 14:51:12.084346 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 14:51:12.094246 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 14:51:12.100924 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 14:51:12.110951 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 14:51:12.120507 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 14:51:12.130373 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 14:51:12.140859 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 14:51:12.147473 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 14:51:12.156932 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 14:51:12.166814 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 14:51:12.176752 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 14:51:12.186607 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 14:51:12.197233 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 14:51:12.206869 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 14:51:12.206956 PCI: 00:02.0
1454 14:51:12.216573 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 14:51:12.229556 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 14:51:12.236220 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 14:51:12.243058 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 14:51:12.253228 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 14:51:12.253317 GENERIC: 0.0
1460 14:51:12.256235 PCI: 00:05.0
1461 14:51:12.266325 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 14:51:12.272667 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 14:51:12.272757 GENERIC: 0.0
1464 14:51:12.276177 PCI: 00:08.0
1465 14:51:12.286057 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 14:51:12.286144 PCI: 00:0a.0
1467 14:51:12.293094 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 14:51:12.302371 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 14:51:12.306057 USB0 port 0 child on link 0 USB3 port 0
1470 14:51:12.309187 USB3 port 0
1471 14:51:12.309271 USB3 port 1
1472 14:51:12.312854 USB3 port 2
1473 14:51:12.312938 USB3 port 3
1474 14:51:12.316095 PCI: 00:14.0 child on link 0 USB0 port 0
1475 14:51:12.328775 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 14:51:12.332344 USB0 port 0 child on link 0 USB2 port 0
1477 14:51:12.335541 USB2 port 0
1478 14:51:12.335624 USB2 port 1
1479 14:51:12.339145 USB2 port 2
1480 14:51:12.339228 USB2 port 3
1481 14:51:12.342206 USB2 port 4
1482 14:51:12.342290 USB2 port 5
1483 14:51:12.345892 USB2 port 6
1484 14:51:12.346003 USB2 port 7
1485 14:51:12.348985 USB2 port 8
1486 14:51:12.349068 USB2 port 9
1487 14:51:12.351986 USB3 port 0
1488 14:51:12.352101 USB3 port 1
1489 14:51:12.355507 USB3 port 2
1490 14:51:12.355596 USB3 port 3
1491 14:51:12.358673 PCI: 00:14.2
1492 14:51:12.368832 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 14:51:12.378900 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 14:51:12.385370 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 14:51:12.395390 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 14:51:12.395479 GENERIC: 0.0
1497 14:51:12.401788 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 14:51:12.411684 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 14:51:12.411771 I2C: 00:1a
1500 14:51:12.414751 I2C: 00:31
1501 14:51:12.414860 I2C: 00:32
1502 14:51:12.418338 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 14:51:12.431757 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 14:51:12.431844 I2C: 00:10
1505 14:51:12.434730 PCI: 00:15.2
1506 14:51:12.444587 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 14:51:12.444677 PCI: 00:15.3
1508 14:51:12.454986 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 14:51:12.458025 PCI: 00:16.0
1510 14:51:12.467726 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 14:51:12.467823 PCI: 00:19.0
1512 14:51:12.474313 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 14:51:12.484263 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 14:51:12.484402 I2C: 00:15
1515 14:51:12.490994 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 14:51:12.500572 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 14:51:12.510582 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 14:51:12.520827 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 14:51:12.523930 GENERIC: 0.0
1520 14:51:12.524012 PCI: 01:00.0
1521 14:51:12.533708 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 14:51:12.547158 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 14:51:12.556990 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 14:51:12.557084 PCI: 00:1e.0
1525 14:51:12.570192 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 14:51:12.573293 PCI: 00:1e.2 child on link 0 SPI: 00
1527 14:51:12.583518 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 14:51:12.583603 SPI: 00
1529 14:51:12.590002 PCI: 00:1e.3 child on link 0 SPI: 00
1530 14:51:12.599988 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 14:51:12.600103 SPI: 00
1532 14:51:12.603178 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 14:51:12.613229 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 14:51:12.616244 PNP: 0c09.0
1535 14:51:12.622858 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 14:51:12.629704 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 14:51:12.636255 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 14:51:12.646486 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 14:51:12.653338 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 14:51:12.653424 GENERIC: 0.0
1541 14:51:12.656261 GENERIC: 1.0
1542 14:51:12.656370 PCI: 00:1f.3
1543 14:51:12.666231 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 14:51:12.675785 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 14:51:12.679404 PCI: 00:1f.5
1546 14:51:12.689177 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 14:51:12.692359 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 14:51:12.695716 APIC: 00
1549 14:51:12.695825 APIC: 01
1550 14:51:12.699310 APIC: 03
1551 14:51:12.699410 APIC: 05
1552 14:51:12.699500 APIC: 06
1553 14:51:12.702744 APIC: 02
1554 14:51:12.702814 APIC: 04
1555 14:51:12.702874 APIC: 07
1556 14:51:12.706155 Done allocating resources.
1557 14:51:12.712273 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 14:51:12.719151 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 14:51:12.722113 Configure GPIOs for I2S audio on UP4.
1560 14:51:12.729372 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 14:51:12.732399 Enabling resources...
1562 14:51:12.736041 PCI: 00:00.0 subsystem <- 8086/9a12
1563 14:51:12.739088 PCI: 00:00.0 cmd <- 06
1564 14:51:12.742084 PCI: 00:02.0 subsystem <- 8086/9a40
1565 14:51:12.745821 PCI: 00:02.0 cmd <- 03
1566 14:51:12.748779 PCI: 00:04.0 subsystem <- 8086/9a03
1567 14:51:12.752366 PCI: 00:04.0 cmd <- 02
1568 14:51:12.755485 PCI: 00:05.0 subsystem <- 8086/9a19
1569 14:51:12.755595 PCI: 00:05.0 cmd <- 02
1570 14:51:12.762287 PCI: 00:08.0 subsystem <- 8086/9a11
1571 14:51:12.762397 PCI: 00:08.0 cmd <- 06
1572 14:51:12.768444 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 14:51:12.768541 PCI: 00:0d.0 cmd <- 02
1574 14:51:12.772108 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 14:51:12.775028 PCI: 00:14.0 cmd <- 02
1576 14:51:12.778739 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 14:51:12.781884 PCI: 00:14.2 cmd <- 02
1578 14:51:12.785075 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 14:51:12.788139 PCI: 00:14.3 cmd <- 02
1580 14:51:12.791841 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 14:51:12.794867 PCI: 00:15.0 cmd <- 02
1582 14:51:12.798383 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 14:51:12.802114 PCI: 00:15.1 cmd <- 02
1584 14:51:12.804960 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 14:51:12.808394 PCI: 00:15.2 cmd <- 02
1586 14:51:12.811187 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 14:51:12.811295 PCI: 00:15.3 cmd <- 02
1588 14:51:12.818164 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 14:51:12.818258 PCI: 00:16.0 cmd <- 02
1590 14:51:12.821637 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 14:51:12.825083 PCI: 00:19.1 cmd <- 02
1592 14:51:12.827869 PCI: 00:1d.0 bridge ctrl <- 0013
1593 14:51:12.831352 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 14:51:12.834391 PCI: 00:1d.0 cmd <- 06
1595 14:51:12.838048 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 14:51:12.841101 PCI: 00:1e.0 cmd <- 06
1597 14:51:12.844783 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 14:51:12.847724 PCI: 00:1e.2 cmd <- 06
1599 14:51:12.850935 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 14:51:12.854734 PCI: 00:1e.3 cmd <- 02
1601 14:51:12.857966 PCI: 00:1f.0 subsystem <- 8086/a087
1602 14:51:12.860979 PCI: 00:1f.0 cmd <- 407
1603 14:51:12.864738 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 14:51:12.867791 PCI: 00:1f.3 cmd <- 02
1605 14:51:12.870960 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 14:51:12.871038 PCI: 00:1f.5 cmd <- 406
1607 14:51:12.876871 PCI: 01:00.0 cmd <- 02
1608 14:51:12.880931 done.
1609 14:51:12.884682 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 14:51:12.887679 Initializing devices...
1611 14:51:12.890893 Root Device init
1612 14:51:12.894577 Chrome EC: Set SMI mask to 0x0000000000000000
1613 14:51:12.901971 Chrome EC: clear events_b mask to 0x0000000000000000
1614 14:51:12.908555 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 14:51:12.915280 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 14:51:12.921681 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 14:51:12.925178 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 14:51:12.932949 fw_config match found: DB_USB=USB3_ACTIVE
1619 14:51:12.936359 Configure Right Type-C port orientation for retimer
1620 14:51:12.939758 Root Device init finished in 47 msecs
1621 14:51:12.943793 PCI: 00:00.0 init
1622 14:51:12.947347 CPU TDP = 9 Watts
1623 14:51:12.947453 CPU PL1 = 9 Watts
1624 14:51:12.950281 CPU PL2 = 40 Watts
1625 14:51:12.954061 CPU PL4 = 83 Watts
1626 14:51:12.957027 PCI: 00:00.0 init finished in 8 msecs
1627 14:51:12.957114 PCI: 00:02.0 init
1628 14:51:12.960159 GMA: Found VBT in CBFS
1629 14:51:12.963770 GMA: Found valid VBT in CBFS
1630 14:51:12.970693 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 14:51:12.976812 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 14:51:12.980498 PCI: 00:02.0 init finished in 18 msecs
1633 14:51:12.983370 PCI: 00:05.0 init
1634 14:51:12.987075 PCI: 00:05.0 init finished in 0 msecs
1635 14:51:12.990206 PCI: 00:08.0 init
1636 14:51:12.993380 PCI: 00:08.0 init finished in 0 msecs
1637 14:51:12.997151 PCI: 00:14.0 init
1638 14:51:13.000156 PCI: 00:14.0 init finished in 0 msecs
1639 14:51:13.003245 PCI: 00:14.2 init
1640 14:51:13.006857 PCI: 00:14.2 init finished in 0 msecs
1641 14:51:13.009863 PCI: 00:15.0 init
1642 14:51:13.013529 I2C bus 0 version 0x3230302a
1643 14:51:13.016565 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 14:51:13.019899 PCI: 00:15.0 init finished in 6 msecs
1645 14:51:13.019980 PCI: 00:15.1 init
1646 14:51:13.023442 I2C bus 1 version 0x3230302a
1647 14:51:13.026307 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 14:51:13.033195 PCI: 00:15.1 init finished in 6 msecs
1649 14:51:13.033283 PCI: 00:15.2 init
1650 14:51:13.036578 I2C bus 2 version 0x3230302a
1651 14:51:13.039513 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 14:51:13.042974 PCI: 00:15.2 init finished in 6 msecs
1653 14:51:13.046708 PCI: 00:15.3 init
1654 14:51:13.049528 I2C bus 3 version 0x3230302a
1655 14:51:13.052966 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 14:51:13.056525 PCI: 00:15.3 init finished in 6 msecs
1657 14:51:13.059439 PCI: 00:16.0 init
1658 14:51:13.063199 PCI: 00:16.0 init finished in 0 msecs
1659 14:51:13.066227 PCI: 00:19.1 init
1660 14:51:13.069345 I2C bus 5 version 0x3230302a
1661 14:51:13.072951 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 14:51:13.076040 PCI: 00:19.1 init finished in 6 msecs
1663 14:51:13.079184 PCI: 00:1d.0 init
1664 14:51:13.082922 Initializing PCH PCIe bridge.
1665 14:51:13.085980 PCI: 00:1d.0 init finished in 3 msecs
1666 14:51:13.089542 PCI: 00:1f.0 init
1667 14:51:13.092613 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 14:51:13.096210 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 14:51:13.099222 IOAPIC: ID = 0x02
1670 14:51:13.102260 IOAPIC: Dumping registers
1671 14:51:13.102368 reg 0x0000: 0x02000000
1672 14:51:13.105963 reg 0x0001: 0x00770020
1673 14:51:13.109048 reg 0x0002: 0x00000000
1674 14:51:13.112573 PCI: 00:1f.0 init finished in 21 msecs
1675 14:51:13.115433 PCI: 00:1f.2 init
1676 14:51:13.119021 Disabling ACPI via APMC.
1677 14:51:13.119130 APMC done.
1678 14:51:13.125759 PCI: 00:1f.2 init finished in 5 msecs
1679 14:51:13.136253 PCI: 01:00.0 init
1680 14:51:13.139896 PCI: 01:00.0 init finished in 0 msecs
1681 14:51:13.143319 PNP: 0c09.0 init
1682 14:51:13.146135 Google Chrome EC uptime: 8.357 seconds
1683 14:51:13.153205 Google Chrome AP resets since EC boot: 1
1684 14:51:13.156556 Google Chrome most recent AP reset causes:
1685 14:51:13.159898 0.346: 32775 shutdown: entering G3
1686 14:51:13.166477 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 14:51:13.169494 PNP: 0c09.0 init finished in 22 msecs
1688 14:51:13.175187 Devices initialized
1689 14:51:13.178240 Show all devs... After init.
1690 14:51:13.182068 Root Device: enabled 1
1691 14:51:13.182158 DOMAIN: 0000: enabled 1
1692 14:51:13.185002 CPU_CLUSTER: 0: enabled 1
1693 14:51:13.188103 PCI: 00:00.0: enabled 1
1694 14:51:13.191658 PCI: 00:02.0: enabled 1
1695 14:51:13.191744 PCI: 00:04.0: enabled 1
1696 14:51:13.195275 PCI: 00:05.0: enabled 1
1697 14:51:13.198352 PCI: 00:06.0: enabled 0
1698 14:51:13.201540 PCI: 00:07.0: enabled 0
1699 14:51:13.201638 PCI: 00:07.1: enabled 0
1700 14:51:13.205129 PCI: 00:07.2: enabled 0
1701 14:51:13.208021 PCI: 00:07.3: enabled 0
1702 14:51:13.211854 PCI: 00:08.0: enabled 1
1703 14:51:13.211932 PCI: 00:09.0: enabled 0
1704 14:51:13.214865 PCI: 00:0a.0: enabled 0
1705 14:51:13.218486 PCI: 00:0d.0: enabled 1
1706 14:51:13.221630 PCI: 00:0d.1: enabled 0
1707 14:51:13.221732 PCI: 00:0d.2: enabled 0
1708 14:51:13.225140 PCI: 00:0d.3: enabled 0
1709 14:51:13.228134 PCI: 00:0e.0: enabled 0
1710 14:51:13.228246 PCI: 00:10.2: enabled 1
1711 14:51:13.231263 PCI: 00:10.6: enabled 0
1712 14:51:13.234986 PCI: 00:10.7: enabled 0
1713 14:51:13.238474 PCI: 00:12.0: enabled 0
1714 14:51:13.238590 PCI: 00:12.6: enabled 0
1715 14:51:13.241290 PCI: 00:13.0: enabled 0
1716 14:51:13.244802 PCI: 00:14.0: enabled 1
1717 14:51:13.248235 PCI: 00:14.1: enabled 0
1718 14:51:13.248345 PCI: 00:14.2: enabled 1
1719 14:51:13.251246 PCI: 00:14.3: enabled 1
1720 14:51:13.254490 PCI: 00:15.0: enabled 1
1721 14:51:13.258099 PCI: 00:15.1: enabled 1
1722 14:51:13.258183 PCI: 00:15.2: enabled 1
1723 14:51:13.261617 PCI: 00:15.3: enabled 1
1724 14:51:13.264586 PCI: 00:16.0: enabled 1
1725 14:51:13.267858 PCI: 00:16.1: enabled 0
1726 14:51:13.267970 PCI: 00:16.2: enabled 0
1727 14:51:13.271256 PCI: 00:16.3: enabled 0
1728 14:51:13.274847 PCI: 00:16.4: enabled 0
1729 14:51:13.274948 PCI: 00:16.5: enabled 0
1730 14:51:13.278005 PCI: 00:17.0: enabled 0
1731 14:51:13.281114 PCI: 00:19.0: enabled 0
1732 14:51:13.284830 PCI: 00:19.1: enabled 1
1733 14:51:13.284920 PCI: 00:19.2: enabled 0
1734 14:51:13.288019 PCI: 00:1c.0: enabled 1
1735 14:51:13.291205 PCI: 00:1c.1: enabled 0
1736 14:51:13.294703 PCI: 00:1c.2: enabled 0
1737 14:51:13.294808 PCI: 00:1c.3: enabled 0
1738 14:51:13.297894 PCI: 00:1c.4: enabled 0
1739 14:51:13.301023 PCI: 00:1c.5: enabled 0
1740 14:51:13.304646 PCI: 00:1c.6: enabled 1
1741 14:51:13.304724 PCI: 00:1c.7: enabled 0
1742 14:51:13.307672 PCI: 00:1d.0: enabled 1
1743 14:51:13.311427 PCI: 00:1d.1: enabled 0
1744 14:51:13.314425 PCI: 00:1d.2: enabled 1
1745 14:51:13.314524 PCI: 00:1d.3: enabled 0
1746 14:51:13.317542 PCI: 00:1e.0: enabled 1
1747 14:51:13.321045 PCI: 00:1e.1: enabled 0
1748 14:51:13.321147 PCI: 00:1e.2: enabled 1
1749 14:51:13.324631 PCI: 00:1e.3: enabled 1
1750 14:51:13.327719 PCI: 00:1f.0: enabled 1
1751 14:51:13.330850 PCI: 00:1f.1: enabled 0
1752 14:51:13.330959 PCI: 00:1f.2: enabled 1
1753 14:51:13.334492 PCI: 00:1f.3: enabled 1
1754 14:51:13.337585 PCI: 00:1f.4: enabled 0
1755 14:51:13.340901 PCI: 00:1f.5: enabled 1
1756 14:51:13.340980 PCI: 00:1f.6: enabled 0
1757 14:51:13.344498 PCI: 00:1f.7: enabled 0
1758 14:51:13.347571 APIC: 00: enabled 1
1759 14:51:13.347683 GENERIC: 0.0: enabled 1
1760 14:51:13.351204 GENERIC: 0.0: enabled 1
1761 14:51:13.354516 GENERIC: 1.0: enabled 1
1762 14:51:13.357430 GENERIC: 0.0: enabled 1
1763 14:51:13.357542 GENERIC: 1.0: enabled 1
1764 14:51:13.361281 USB0 port 0: enabled 1
1765 14:51:13.364091 GENERIC: 0.0: enabled 1
1766 14:51:13.367603 USB0 port 0: enabled 1
1767 14:51:13.367701 GENERIC: 0.0: enabled 1
1768 14:51:13.370903 I2C: 00:1a: enabled 1
1769 14:51:13.373893 I2C: 00:31: enabled 1
1770 14:51:13.374000 I2C: 00:32: enabled 1
1771 14:51:13.377302 I2C: 00:10: enabled 1
1772 14:51:13.380651 I2C: 00:15: enabled 1
1773 14:51:13.380732 GENERIC: 0.0: enabled 0
1774 14:51:13.384191 GENERIC: 1.0: enabled 0
1775 14:51:13.387861 GENERIC: 0.0: enabled 1
1776 14:51:13.387967 SPI: 00: enabled 1
1777 14:51:13.390931 SPI: 00: enabled 1
1778 14:51:13.393973 PNP: 0c09.0: enabled 1
1779 14:51:13.394076 GENERIC: 0.0: enabled 1
1780 14:51:13.397701 USB3 port 0: enabled 1
1781 14:51:13.400727 USB3 port 1: enabled 1
1782 14:51:13.404136 USB3 port 2: enabled 0
1783 14:51:13.404238 USB3 port 3: enabled 0
1784 14:51:13.407205 USB2 port 0: enabled 0
1785 14:51:13.410375 USB2 port 1: enabled 1
1786 14:51:13.410488 USB2 port 2: enabled 1
1787 14:51:13.414040 USB2 port 3: enabled 0
1788 14:51:13.417197 USB2 port 4: enabled 1
1789 14:51:13.420328 USB2 port 5: enabled 0
1790 14:51:13.420417 USB2 port 6: enabled 0
1791 14:51:13.424000 USB2 port 7: enabled 0
1792 14:51:13.426983 USB2 port 8: enabled 0
1793 14:51:13.427089 USB2 port 9: enabled 0
1794 14:51:13.430631 USB3 port 0: enabled 0
1795 14:51:13.434208 USB3 port 1: enabled 1
1796 14:51:13.434314 USB3 port 2: enabled 0
1797 14:51:13.437240 USB3 port 3: enabled 0
1798 14:51:13.440546 GENERIC: 0.0: enabled 1
1799 14:51:13.443922 GENERIC: 1.0: enabled 1
1800 14:51:13.444036 APIC: 01: enabled 1
1801 14:51:13.447399 APIC: 03: enabled 1
1802 14:51:13.450566 APIC: 05: enabled 1
1803 14:51:13.450654 APIC: 06: enabled 1
1804 14:51:13.453559 APIC: 02: enabled 1
1805 14:51:13.453633 APIC: 04: enabled 1
1806 14:51:13.457297 APIC: 07: enabled 1
1807 14:51:13.460187 PCI: 01:00.0: enabled 1
1808 14:51:13.463655 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1809 14:51:13.470657 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 14:51:13.474010 ELOG: NV offset 0xf30000 size 0x1000
1811 14:51:13.480251 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 14:51:13.486694 ELOG: Event(17) added with size 13 at 2023-05-03 14:51:12 UTC
1813 14:51:13.493107 ELOG: Event(92) added with size 9 at 2023-05-03 14:51:12 UTC
1814 14:51:13.499929 ELOG: Event(93) added with size 9 at 2023-05-03 14:51:12 UTC
1815 14:51:13.506383 ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:12 UTC
1816 14:51:13.513176 ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:12 UTC
1817 14:51:13.519904 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 14:51:13.526664 ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:12 UTC
1819 14:51:13.533281 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1820 14:51:13.539300 ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:12 UTC
1821 14:51:13.542502 elog_add_boot_reason: Logged dev mode boot
1822 14:51:13.549157 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1823 14:51:13.552651 Finalize devices...
1824 14:51:13.552738 Devices finalized
1825 14:51:13.559444 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 14:51:13.562588 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 14:51:13.569601 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 14:51:13.572659 ME: HFSTS1 : 0x80030055
1829 14:51:13.579325 ME: HFSTS2 : 0x30280116
1830 14:51:13.582789 ME: HFSTS3 : 0x00000050
1831 14:51:13.589169 ME: HFSTS4 : 0x00004000
1832 14:51:13.592556 ME: HFSTS5 : 0x00000000
1833 14:51:13.595667 ME: HFSTS6 : 0x00400006
1834 14:51:13.598853 ME: Manufacturing Mode : YES
1835 14:51:13.605585 ME: SPI Protection Mode Enabled : NO
1836 14:51:13.609048 ME: FW Partition Table : OK
1837 14:51:13.612092 ME: Bringup Loader Failure : NO
1838 14:51:13.615760 ME: Firmware Init Complete : NO
1839 14:51:13.618830 ME: Boot Options Present : NO
1840 14:51:13.622544 ME: Update In Progress : NO
1841 14:51:13.625531 ME: D0i3 Support : YES
1842 14:51:13.628647 ME: Low Power State Enabled : NO
1843 14:51:13.635346 ME: CPU Replaced : YES
1844 14:51:13.638811 ME: CPU Replacement Valid : YES
1845 14:51:13.642014 ME: Current Working State : 5
1846 14:51:13.645641 ME: Current Operation State : 1
1847 14:51:13.648798 ME: Current Operation Mode : 3
1848 14:51:13.651854 ME: Error Code : 0
1849 14:51:13.655486 ME: Enhanced Debug Mode : NO
1850 14:51:13.658285 ME: CPU Debug Disabled : YES
1851 14:51:13.661925 ME: TXT Support : NO
1852 14:51:13.668498 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 14:51:13.678549 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1854 14:51:13.681697 CBFS: 'fallback/slic' not found.
1855 14:51:13.684719 ACPI: Writing ACPI tables at 76b01000.
1856 14:51:13.684828 ACPI: * FACS
1857 14:51:13.688090 ACPI: * DSDT
1858 14:51:13.691505 Ramoops buffer: 0x100000@0x76a00000.
1859 14:51:13.694982 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1860 14:51:13.701311 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1861 14:51:13.704794 Google Chrome EC: version:
1862 14:51:13.708072 ro: voema_v2.0.7540-147f8d37d1
1863 14:51:13.711414 rw: voema_v2.0.7540-147f8d37d1
1864 14:51:13.711492 running image: 2
1865 14:51:13.717942 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1866 14:51:13.722918 ACPI: * FADT
1867 14:51:13.723023 SCI is IRQ9
1868 14:51:13.729703 ACPI: added table 1/32, length now 40
1869 14:51:13.729786 ACPI: * SSDT
1870 14:51:13.732781 Found 1 CPU(s) with 8 core(s) each.
1871 14:51:13.739779 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 14:51:13.742705 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 14:51:13.746428 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 14:51:13.749475 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 14:51:13.756300 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 14:51:13.762683 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 14:51:13.766523 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 14:51:13.772618 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 14:51:13.779790 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 14:51:13.782882 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 14:51:13.789192 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 14:51:13.792704 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 14:51:13.800042 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 14:51:13.802631 PS2K: Passing 80 keymaps to kernel
1885 14:51:13.809204 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 14:51:13.815914 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 14:51:13.822633 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 14:51:13.829236 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 14:51:13.836174 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 14:51:13.842812 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 14:51:13.848936 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 14:51:13.855600 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 14:51:13.859385 ACPI: added table 2/32, length now 44
1894 14:51:13.862240 ACPI: * MCFG
1895 14:51:13.865739 ACPI: added table 3/32, length now 48
1896 14:51:13.865847 ACPI: * TPM2
1897 14:51:13.868922 TPM2 log created at 0x769f0000
1898 14:51:13.872630 ACPI: added table 4/32, length now 52
1899 14:51:13.875751 ACPI: * MADT
1900 14:51:13.875858 SCI is IRQ9
1901 14:51:13.878738 ACPI: added table 5/32, length now 56
1902 14:51:13.882381 current = 76b09850
1903 14:51:13.882465 ACPI: * DMAR
1904 14:51:13.888705 ACPI: added table 6/32, length now 60
1905 14:51:13.892610 ACPI: added table 7/32, length now 64
1906 14:51:13.892694 ACPI: * HPET
1907 14:51:13.895422 ACPI: added table 8/32, length now 68
1908 14:51:13.898920 ACPI: done.
1909 14:51:13.901927 ACPI tables: 35216 bytes.
1910 14:51:13.902007 smbios_write_tables: 769ef000
1911 14:51:13.905649 EC returned error result code 3
1912 14:51:13.909148 Couldn't obtain OEM name from CBI
1913 14:51:13.912760 Create SMBIOS type 16
1914 14:51:13.916292 Create SMBIOS type 17
1915 14:51:13.919102 GENERIC: 0.0 (WIFI Device)
1916 14:51:13.922719 SMBIOS tables: 1750 bytes.
1917 14:51:13.926253 Writing table forward entry at 0x00000500
1918 14:51:13.932538 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1919 14:51:13.935574 Writing coreboot table at 0x76b25000
1920 14:51:13.942342 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1921 14:51:13.946023 1. 0000000000001000-000000000009ffff: RAM
1922 14:51:13.948823 2. 00000000000a0000-00000000000fffff: RESERVED
1923 14:51:13.955535 3. 0000000000100000-00000000769eefff: RAM
1924 14:51:13.959154 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1925 14:51:13.965781 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1926 14:51:13.972428 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1927 14:51:13.975528 7. 0000000077000000-000000007fbfffff: RESERVED
1928 14:51:13.982398 8. 00000000c0000000-00000000cfffffff: RESERVED
1929 14:51:13.985195 9. 00000000f8000000-00000000f9ffffff: RESERVED
1930 14:51:13.991906 10. 00000000fb000000-00000000fb000fff: RESERVED
1931 14:51:13.995054 11. 00000000fe000000-00000000fe00ffff: RESERVED
1932 14:51:13.998670 12. 00000000fed80000-00000000fed87fff: RESERVED
1933 14:51:14.005113 13. 00000000fed90000-00000000fed92fff: RESERVED
1934 14:51:14.008680 14. 00000000feda0000-00000000feda1fff: RESERVED
1935 14:51:14.015324 15. 00000000fedc0000-00000000feddffff: RESERVED
1936 14:51:14.018199 16. 0000000100000000-00000002803fffff: RAM
1937 14:51:14.021674 Passing 4 GPIOs to payload:
1938 14:51:14.028663 NAME | PORT | POLARITY | VALUE
1939 14:51:14.031653 lid | undefined | high | high
1940 14:51:14.038086 power | undefined | high | low
1941 14:51:14.041738 oprom | undefined | high | low
1942 14:51:14.047930 EC in RW | 0x000000e5 | high | high
1943 14:51:14.054958 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d503
1944 14:51:14.057895 coreboot table: 1576 bytes.
1945 14:51:14.061613 IMD ROOT 0. 0x76fff000 0x00001000
1946 14:51:14.064893 IMD SMALL 1. 0x76ffe000 0x00001000
1947 14:51:14.067899 FSP MEMORY 2. 0x76c4e000 0x003b0000
1948 14:51:14.071539 VPD 3. 0x76c4d000 0x00000367
1949 14:51:14.074523 RO MCACHE 4. 0x76c4c000 0x00000fdc
1950 14:51:14.078188 CONSOLE 5. 0x76c2c000 0x00020000
1951 14:51:14.084628 FMAP 6. 0x76c2b000 0x00000578
1952 14:51:14.087741 TIME STAMP 7. 0x76c2a000 0x00000910
1953 14:51:14.091340 VBOOT WORK 8. 0x76c16000 0x00014000
1954 14:51:14.094497 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 14:51:14.097687 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 14:51:14.100745 RAMSTAGE 11. 0x76b97000 0x00073000
1957 14:51:14.104516 REFCODE 12. 0x76b42000 0x00055000
1958 14:51:14.107418 SMM BACKUP 13. 0x76b32000 0x00010000
1959 14:51:14.114440 4f444749 14. 0x76b30000 0x00002000
1960 14:51:14.117667 EXT VBT15. 0x76b2d000 0x0000219f
1961 14:51:14.120541 COREBOOT 16. 0x76b25000 0x00008000
1962 14:51:14.124134 ACPI 17. 0x76b01000 0x00024000
1963 14:51:14.127106 ACPI GNVS 18. 0x76b00000 0x00001000
1964 14:51:14.130832 RAMOOPS 19. 0x76a00000 0x00100000
1965 14:51:14.134222 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 14:51:14.136973 SMBIOS 21. 0x769ef000 0x00000800
1967 14:51:14.140328 IMD small region:
1968 14:51:14.144037 IMD ROOT 0. 0x76ffec00 0x00000400
1969 14:51:14.147157 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 14:51:14.153794 POWER STATE 2. 0x76ffeb80 0x00000044
1971 14:51:14.157266 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 14:51:14.160198 MEM INFO 4. 0x76ffe980 0x000001e0
1973 14:51:14.166967 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1974 14:51:14.170044 MTRR: Physical address space:
1975 14:51:14.173695 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 14:51:14.180317 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1977 14:51:14.186577 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1978 14:51:14.193325 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1979 14:51:14.200125 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1980 14:51:14.206788 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1981 14:51:14.213408 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1982 14:51:14.216228 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 14:51:14.219495 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 14:51:14.226247 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 14:51:14.229933 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 14:51:14.232818 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 14:51:14.236483 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 14:51:14.242846 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 14:51:14.246175 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 14:51:14.249687 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 14:51:14.252719 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 14:51:14.256440 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 14:51:14.261063 call enable_fixed_mtrr()
1994 14:51:14.264134 CPU physical address size: 39 bits
1995 14:51:14.271032 MTRR: default type WB/UC MTRR counts: 6/6.
1996 14:51:14.274179 MTRR: UC selected as default type.
1997 14:51:14.281014 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 14:51:14.283991 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 14:51:14.290785 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 14:51:14.297388 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 14:51:14.304026 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 14:51:14.310320 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 14:51:14.316981 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 14:51:14.320843 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 14:51:14.323901 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 14:51:14.327078 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 14:51:14.333850 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 14:51:14.336801 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 14:51:14.340521 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 14:51:14.343845 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 14:51:14.350145 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 14:51:14.353949 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 14:51:14.357068 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 14:51:14.357152
2015 14:51:14.360146 MTRR check
2016 14:51:14.360229 call enable_fixed_mtrr()
2017 14:51:14.363609 Fixed MTRRs : Enabled
2018 14:51:14.367044 Variable MTRRs: Enabled
2019 14:51:14.367129
2020 14:51:14.370152 CPU physical address size: 39 bits
2021 14:51:14.376817 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2022 14:51:14.379858 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 14:51:14.386545 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 14:51:14.389943 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 14:51:14.393656 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 14:51:14.396621 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 14:51:14.403122 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 14:51:14.406807 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 14:51:14.409930 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 14:51:14.413500 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 14:51:14.419724 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 14:51:14.423343 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 14:51:14.426354 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 14:51:14.433108 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 14:51:14.433193 call enable_fixed_mtrr()
2036 14:51:14.439761 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 14:51:14.442729 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 14:51:14.446482 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 14:51:14.449847 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 14:51:14.456241 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 14:51:14.459554 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 14:51:14.463232 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 14:51:14.466120 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 14:51:14.472636 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 14:51:14.476387 CPU physical address size: 39 bits
2046 14:51:14.479530 call enable_fixed_mtrr()
2047 14:51:14.482572 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 14:51:14.489281 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 14:51:14.492840 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 14:51:14.495983 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 14:51:14.499120 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 14:51:14.502760 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 14:51:14.508885 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 14:51:14.512496 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 14:51:14.515522 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 14:51:14.519278 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 14:51:14.525886 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 14:51:14.528788 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 14:51:14.532420 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 14:51:14.538643 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 14:51:14.541921 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 14:51:14.545025 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 14:51:14.548502 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 14:51:14.555138 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 14:51:14.558794 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 14:51:14.561695 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 14:51:14.565146 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 14:51:14.571495 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 14:51:14.574926 call enable_fixed_mtrr()
2070 14:51:14.578432 call enable_fixed_mtrr()
2071 14:51:14.581579 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 14:51:14.585087 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 14:51:14.588036 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 14:51:14.594730 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 14:51:14.598268 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 14:51:14.601259 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 14:51:14.604852 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 14:51:14.608016 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 14:51:14.614757 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 14:51:14.617756 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 14:51:14.621362 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 14:51:14.624315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 14:51:14.632278 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 14:51:14.635186 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 14:51:14.638961 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 14:51:14.641955 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 14:51:14.648849 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 14:51:14.651815 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 14:51:14.655317 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 14:51:14.658225 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 14:51:14.665242 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 14:51:14.668113 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 14:51:14.671535 call enable_fixed_mtrr()
2094 14:51:14.674853 call enable_fixed_mtrr()
2095 14:51:14.678553 Checking cr50 for pending updates
2096 14:51:14.681252 CPU physical address size: 39 bits
2097 14:51:14.684806 CPU physical address size: 39 bits
2098 14:51:14.687848 CPU physical address size: 39 bits
2099 14:51:14.692222 CPU physical address size: 39 bits
2100 14:51:14.695902 Reading cr50 TPM mode
2101 14:51:14.699683 CPU physical address size: 39 bits
2102 14:51:14.706358 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2103 14:51:14.715888 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2104 14:51:14.719579 Checking segment from ROM address 0xffc02b38
2105 14:51:14.722683 Checking segment from ROM address 0xffc02b54
2106 14:51:14.729448 Loading segment from ROM address 0xffc02b38
2107 14:51:14.729559 code (compression=0)
2108 14:51:14.739249 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 14:51:14.749175 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 14:51:14.749262 it's not compressed!
2111 14:51:14.888535 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 14:51:14.895261 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 14:51:14.902195 Loading segment from ROM address 0xffc02b54
2114 14:51:14.905023 Entry Point 0x30000000
2115 14:51:14.905129 Loaded segments
2116 14:51:14.911641 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 14:51:14.955074 Finalizing chipset.
2118 14:51:14.958142 Finalizing SMM.
2119 14:51:14.958229 APMC done.
2120 14:51:14.964965 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 14:51:14.968098 mp_park_aps done after 0 msecs.
2122 14:51:14.971139 Jumping to boot code at 0x30000000(0x76b25000)
2123 14:51:14.981587 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 14:51:14.981672
2125 14:51:14.981737
2126 14:51:14.984544
2127 14:51:14.984619 Starting depthcharge on Voema...
2128 14:51:14.984964 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2129 14:51:14.985067 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2130 14:51:14.985156 Setting prompt string to ['volteer:']
2131 14:51:14.985235 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2132 14:51:14.987992
2133 14:51:14.994563 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 14:51:14.994647
2135 14:51:15.001146 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 14:51:15.001236
2137 14:51:15.008040 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 14:51:15.008122
2139 14:51:15.010871 Failed to find eMMC card reader
2140 14:51:15.010954
2141 14:51:15.011019 Wipe memory regions:
2142 14:51:15.014191
2143 14:51:15.017818 [0x00000000001000, 0x000000000a0000)
2144 14:51:15.017901
2145 14:51:15.020907 [0x00000000100000, 0x00000030000000)
2146 14:51:15.046261
2147 14:51:15.049215 [0x00000032662db0, 0x000000769ef000)
2148 14:51:15.084925
2149 14:51:15.087692 [0x00000100000000, 0x00000280400000)
2150 14:51:15.286472
2151 14:51:15.290156 ec_init: CrosEC protocol v3 supported (256, 256)
2152 14:51:15.290249
2153 14:51:15.296097 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 14:51:15.296208
2155 14:51:15.303059 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 14:51:15.306222
2157 14:51:15.309865 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2158 14:51:15.309967
2159 14:51:15.315887 send_conn_disc_msg: pmc_send_cmd succeeded
2160 14:51:15.748973
2161 14:51:15.749154 R8152: Initializing
2162 14:51:15.749255
2163 14:51:15.752437 Version 6 (ocp_data = 5c30)
2164 14:51:15.752520
2165 14:51:15.755186 R8152: Done initializing
2166 14:51:15.755295
2167 14:51:15.758722 Adding net device
2168 14:51:16.060666
2169 14:51:16.064122 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 14:51:16.064235
2171 14:51:16.064327
2172 14:51:16.064435
2173 14:51:16.067361 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 14:51:16.167740 volteer: tftpboot 192.168.201.1 10185566/tftp-deploy-8zdiuwjq/kernel/bzImage 10185566/tftp-deploy-8zdiuwjq/kernel/cmdline 10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
2176 14:51:16.167973 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 14:51:16.168111 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2178 14:51:16.171930 tftpboot 192.168.201.1 10185566/tftp-deploy-8zdiuwjq/kernel/bzIploy-8zdiuwjq/kernel/cmdline 10185566/tftp-deploy-8zdiuwjq/ramdisk/ramdisk.cpio.gz
2179 14:51:16.172017
2180 14:51:16.172082 Waiting for link
2181 14:51:16.376573
2182 14:51:16.376705 done.
2183 14:51:16.376771
2184 14:51:16.376831 MAC: 00:24:32:30:79:06
2185 14:51:16.376891
2186 14:51:16.379638 Sending DHCP discover... done.
2187 14:51:16.379718
2188 14:51:16.383353 Waiting for reply... done.
2189 14:51:16.383429
2190 14:51:16.386190 Sending DHCP request... done.
2191 14:51:16.386293
2192 14:51:16.392998 Waiting for reply... done.
2193 14:51:16.393081
2194 14:51:16.393145 My ip is 192.168.201.23
2195 14:51:16.393205
2196 14:51:16.396273 The DHCP server ip is 192.168.201.1
2197 14:51:16.396382
2198 14:51:16.402964 TFTP server IP predefined by user: 192.168.201.1
2199 14:51:16.403047
2200 14:51:16.409314 Bootfile predefined by user: 10185566/tftp-deploy-8zdiuwjq/kernel/bzImage
2201 14:51:16.409422
2202 14:51:16.412804 Sending tftp read request... done.
2203 14:51:16.412886
2204 14:51:16.416198 Waiting for the transfer...
2205 14:51:16.416306
2206 14:51:16.954174 00000000 ################################################################
2207 14:51:16.954344
2208 14:51:17.479328 00080000 ################################################################
2209 14:51:17.479495
2210 14:51:17.998767 00100000 ################################################################
2211 14:51:17.998935
2212 14:51:18.517942 00180000 ################################################################
2213 14:51:18.518080
2214 14:51:19.046659 00200000 ################################################################
2215 14:51:19.046791
2216 14:51:19.577223 00280000 ################################################################
2217 14:51:19.577391
2218 14:51:20.110429 00300000 ################################################################
2219 14:51:20.110569
2220 14:51:20.646005 00380000 ################################################################
2221 14:51:20.646156
2222 14:51:21.175749 00400000 ################################################################
2223 14:51:21.175905
2224 14:51:21.709217 00480000 ################################################################
2225 14:51:21.709366
2226 14:51:22.243170 00500000 ################################################################
2227 14:51:22.243307
2228 14:51:22.774587 00580000 ################################################################
2229 14:51:22.774731
2230 14:51:23.370664 00600000 ################################################################
2231 14:51:23.370868
2232 14:51:23.970614 00680000 ################################################################
2233 14:51:23.970749
2234 14:51:24.564668 00700000 ################################################################
2235 14:51:24.564805
2236 14:51:24.578321 00780000 ## done.
2237 14:51:24.578410
2238 14:51:24.581593 The bootfile was 7876496 bytes long.
2239 14:51:24.581673
2240 14:51:24.585218 Sending tftp read request... done.
2241 14:51:24.585299
2242 14:51:24.588200 Waiting for the transfer...
2243 14:51:24.588304
2244 14:51:25.156313 00000000 ################################################################
2245 14:51:25.156485
2246 14:51:25.738397 00080000 ################################################################
2247 14:51:25.738532
2248 14:51:26.326241 00100000 ################################################################
2249 14:51:26.326377
2250 14:51:26.896160 00180000 ################################################################
2251 14:51:26.896290
2252 14:51:27.545235 00200000 ################################################################
2253 14:51:27.545759
2254 14:51:28.231792 00280000 ################################################################
2255 14:51:28.232296
2256 14:51:28.908158 00300000 ################################################################
2257 14:51:28.908690
2258 14:51:29.583678 00380000 ################################################################
2259 14:51:29.583831
2260 14:51:30.153512 00400000 ################################################################
2261 14:51:30.154170
2262 14:51:30.824447 00480000 ################################################################
2263 14:51:30.824944
2264 14:51:31.485160 00500000 ############################################################### done.
2265 14:51:31.486073
2266 14:51:31.488273 Sending tftp read request... done.
2267 14:51:31.488721
2268 14:51:31.491253 Waiting for the transfer...
2269 14:51:31.491679
2270 14:51:31.492013 00000000 # done.
2271 14:51:31.492334
2272 14:51:31.501170 Command line loaded dynamically from TFTP file: 10185566/tftp-deploy-8zdiuwjq/kernel/cmdline
2273 14:51:31.501637
2274 14:51:31.520974 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185566/extract-nfsrootfs-4yl6hgii,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 14:51:31.524928
2276 14:51:31.528327 Shutting down all USB controllers.
2277 14:51:31.528780
2278 14:51:31.529116 Removing current net device
2279 14:51:31.529431
2280 14:51:31.531328 Finalizing coreboot
2281 14:51:31.531753
2282 14:51:31.538449 Exiting depthcharge with code 4 at timestamp: 25208755
2283 14:51:31.538975
2284 14:51:31.539307
2285 14:51:31.539616 Starting kernel ...
2286 14:51:31.539913
2287 14:51:31.540200
2288 14:51:31.541428 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2289 14:51:31.541924 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2290 14:51:31.542311 Setting prompt string to ['Linux version [0-9]']
2291 14:51:31.542660 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 14:51:31.543009 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 14:55:59.542163 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2296 14:55:59.542367 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2298 14:55:59.542533 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 14:55:59.542854 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 14:55:59.543167 Cleaning after the job
2304 14:55:59.543261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/ramdisk
2305 14:55:59.544048 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/kernel
2306 14:55:59.545033 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/nfsrootfs
2307 14:55:59.602865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185566/tftp-deploy-8zdiuwjq/modules
2308 14:55:59.603289 start: 5.1 power-off (timeout 00:00:30) [common]
2309 14:55:59.603463 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2310 14:55:59.681615 >> Command sent successfully.
2311 14:55:59.683934 Returned 0 in 0 seconds
2312 14:55:59.784320 end: 5.1 power-off (duration 00:00:00) [common]
2314 14:55:59.784693 start: 5.2 read-feedback (timeout 00:10:00) [common]
2315 14:55:59.784954 Listened to connection for namespace 'common' for up to 1s
2316 14:56:00.785914 Finalising connection for namespace 'common'
2317 14:56:00.786091 Disconnecting from shell: Finalise
2318 14:56:00.786192
2319 14:56:00.886554 end: 5.2 read-feedback (duration 00:00:01) [common]
2320 14:56:00.886701 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185566
2321 14:56:01.136095 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185566
2322 14:56:01.136284 JobError: Your job cannot terminate cleanly.