Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:59.569377 lava-dispatcher, installed at version: 2023.03
2 14:50:59.569583 start: 0 validate
3 14:50:59.569710 Start time: 2023-05-03 14:50:59.569703+00:00 (UTC)
4 14:50:59.569834 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:59.569965 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230421.0%2Famd64%2Frootfs.cpio.gz exists
6 14:50:59.861863 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:59.862056 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:51:00.151811 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:51:00.152000 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:51:00.438389 validate duration: 0.87
12 14:51:00.438714 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:51:00.438813 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:51:00.438901 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:51:00.439019 Not decompressing ramdisk as can be used compressed.
16 14:51:00.439143 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230421.0/amd64/rootfs.cpio.gz
17 14:51:00.439207 saving as /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/ramdisk/rootfs.cpio.gz
18 14:51:00.439266 total size: 35761792 (34MB)
19 14:51:00.441310 progress 0% (0MB)
20 14:51:00.450408 progress 5% (1MB)
21 14:51:00.459671 progress 10% (3MB)
22 14:51:00.468994 progress 15% (5MB)
23 14:51:00.478262 progress 20% (6MB)
24 14:51:00.487626 progress 25% (8MB)
25 14:51:00.496957 progress 30% (10MB)
26 14:51:00.506393 progress 35% (11MB)
27 14:51:00.515876 progress 40% (13MB)
28 14:51:00.525219 progress 45% (15MB)
29 14:51:00.534337 progress 50% (17MB)
30 14:51:00.543825 progress 55% (18MB)
31 14:51:00.553301 progress 60% (20MB)
32 14:51:00.562901 progress 65% (22MB)
33 14:51:00.572219 progress 70% (23MB)
34 14:51:00.581954 progress 75% (25MB)
35 14:51:00.591929 progress 80% (27MB)
36 14:51:00.601785 progress 85% (29MB)
37 14:51:00.611583 progress 90% (30MB)
38 14:51:00.620802 progress 95% (32MB)
39 14:51:00.630197 progress 100% (34MB)
40 14:51:00.630388 34MB downloaded in 0.19s (178.45MB/s)
41 14:51:00.630548 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:51:00.630792 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:51:00.630878 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:51:00.630960 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:51:00.631120 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:51:00.631205 saving as /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/kernel/bzImage
48 14:51:00.631266 total size: 7876496 (7MB)
49 14:51:00.631325 No compression specified
50 14:51:00.632439 progress 0% (0MB)
51 14:51:00.634614 progress 5% (0MB)
52 14:51:00.636771 progress 10% (0MB)
53 14:51:00.638820 progress 15% (1MB)
54 14:51:00.640909 progress 20% (1MB)
55 14:51:00.642980 progress 25% (1MB)
56 14:51:00.645065 progress 30% (2MB)
57 14:51:00.647158 progress 35% (2MB)
58 14:51:00.649245 progress 40% (3MB)
59 14:51:00.651325 progress 45% (3MB)
60 14:51:00.653418 progress 50% (3MB)
61 14:51:00.655474 progress 55% (4MB)
62 14:51:00.657469 progress 60% (4MB)
63 14:51:00.659521 progress 65% (4MB)
64 14:51:00.661576 progress 70% (5MB)
65 14:51:00.663615 progress 75% (5MB)
66 14:51:00.665658 progress 80% (6MB)
67 14:51:00.667695 progress 85% (6MB)
68 14:51:00.669693 progress 90% (6MB)
69 14:51:00.671737 progress 95% (7MB)
70 14:51:00.673772 progress 100% (7MB)
71 14:51:00.673963 7MB downloaded in 0.04s (175.95MB/s)
72 14:51:00.674108 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:51:00.674337 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:51:00.674423 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:51:00.674510 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:51:00.674631 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:51:00.674700 saving as /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/modules/modules.tar
79 14:51:00.674760 total size: 251268 (0MB)
80 14:51:00.674818 Using unxz to decompress xz
81 14:51:00.678393 progress 13% (0MB)
82 14:51:00.678802 progress 26% (0MB)
83 14:51:00.679037 progress 39% (0MB)
84 14:51:00.680459 progress 52% (0MB)
85 14:51:00.682343 progress 65% (0MB)
86 14:51:00.684279 progress 78% (0MB)
87 14:51:00.686298 progress 91% (0MB)
88 14:51:00.688078 progress 100% (0MB)
89 14:51:00.693737 0MB downloaded in 0.02s (12.63MB/s)
90 14:51:00.694033 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:51:00.694311 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:51:00.694412 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 14:51:00.694507 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 14:51:00.694586 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:51:00.694677 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 14:51:00.694894 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn
98 14:51:00.695024 makedir: /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin
99 14:51:00.695175 makedir: /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/tests
100 14:51:00.695273 makedir: /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/results
101 14:51:00.695386 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-add-keys
102 14:51:00.695526 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-add-sources
103 14:51:00.695650 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-background-process-start
104 14:51:00.695774 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-background-process-stop
105 14:51:00.695894 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-common-functions
106 14:51:00.696033 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-echo-ipv4
107 14:51:00.696155 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-install-packages
108 14:51:00.696274 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-installed-packages
109 14:51:00.696390 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-os-build
110 14:51:00.696511 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-probe-channel
111 14:51:00.696627 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-probe-ip
112 14:51:00.696748 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-target-ip
113 14:51:00.696864 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-target-mac
114 14:51:00.696979 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-target-storage
115 14:51:00.697099 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-case
116 14:51:00.697217 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-event
117 14:51:00.697333 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-feedback
118 14:51:00.697451 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-raise
119 14:51:00.697573 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-reference
120 14:51:00.697689 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-runner
121 14:51:00.697807 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-set
122 14:51:00.697933 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-test-shell
123 14:51:00.698103 Updating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-install-packages (oe)
124 14:51:00.698308 Updating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/bin/lava-installed-packages (oe)
125 14:51:00.698459 Creating /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/environment
126 14:51:00.698571 LAVA metadata
127 14:51:00.698644 - LAVA_JOB_ID=10185555
128 14:51:00.698709 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:51:00.698812 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 14:51:00.698878 skipped lava-vland-overlay
131 14:51:00.698966 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:51:00.699118 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 14:51:00.699183 skipped lava-multinode-overlay
134 14:51:00.699254 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:51:00.699349 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 14:51:00.699434 Loading test definitions
137 14:51:00.699528 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 14:51:00.699602 Using /lava-10185555 at stage 0
139 14:51:00.699907 uuid=10185555_1.4.2.3.1 testdef=None
140 14:51:00.700014 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:51:00.700106 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 14:51:00.700613 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:51:00.700830 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 14:51:00.701494 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:51:00.701855 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 14:51:00.702580 runner path: /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/0/tests/0_cros-ec test_uuid 10185555_1.4.2.3.1
149 14:51:00.702739 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:51:00.702939 Creating lava-test-runner.conf files
152 14:51:00.703000 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185555/lava-overlay-vf62cbnn/lava-10185555/0 for stage 0
153 14:51:00.703119 - 0_cros-ec
154 14:51:00.703266 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 14:51:00.703381 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 14:51:00.710080 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 14:51:00.710186 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 14:51:00.710272 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 14:51:00.710357 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 14:51:00.710438 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 14:51:01.693900 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 14:51:01.694282 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 14:51:01.694400 extracting modules file /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185555/extract-overlay-ramdisk-2asqykyb/ramdisk
164 14:51:01.709722 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 14:51:01.709882 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 14:51:01.709978 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185555/compress-overlay-41q1rva1/overlay-1.4.2.4.tar.gz to ramdisk
167 14:51:01.710050 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185555/compress-overlay-41q1rva1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185555/extract-overlay-ramdisk-2asqykyb/ramdisk
168 14:51:01.718191 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 14:51:01.718311 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 14:51:01.718460 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 14:51:01.718557 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 14:51:01.718637 Building ramdisk /var/lib/lava/dispatcher/tmp/10185555/extract-overlay-ramdisk-2asqykyb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185555/extract-overlay-ramdisk-2asqykyb/ramdisk
173 14:51:02.218119 >> 184047 blocks
174 14:51:05.902658 rename /var/lib/lava/dispatcher/tmp/10185555/extract-overlay-ramdisk-2asqykyb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
175 14:51:05.903175 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 14:51:05.903301 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 14:51:05.903399 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 14:51:05.903500 No mkimage arch provided, not using FIT.
179 14:51:05.903585 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 14:51:05.903667 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 14:51:05.903776 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 14:51:05.903899 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 14:51:05.904017 No LXC device requested
184 14:51:05.904134 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 14:51:05.904263 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 14:51:05.904378 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 14:51:05.904464 Checking files for TFTP limit of 4294967296 bytes.
188 14:51:05.904974 end: 1 tftp-deploy (duration 00:00:05) [common]
189 14:51:05.905103 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 14:51:05.905223 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 14:51:05.905381 substitutions:
192 14:51:05.905474 - {DTB}: None
193 14:51:05.905562 - {INITRD}: 10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
194 14:51:05.905649 - {KERNEL}: 10185555/tftp-deploy-ohqbm8uk/kernel/bzImage
195 14:51:05.905733 - {LAVA_MAC}: None
196 14:51:05.905817 - {PRESEED_CONFIG}: None
197 14:51:05.905899 - {PRESEED_LOCAL}: None
198 14:51:05.905982 - {RAMDISK}: 10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
199 14:51:05.906064 - {ROOT_PART}: None
200 14:51:05.906146 - {ROOT}: None
201 14:51:05.906228 - {SERVER_IP}: 192.168.201.1
202 14:51:05.906313 - {TEE}: None
203 14:51:05.906395 Parsed boot commands:
204 14:51:05.906475 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 14:51:05.906687 Parsed boot commands: tftpboot 192.168.201.1 10185555/tftp-deploy-ohqbm8uk/kernel/bzImage 10185555/tftp-deploy-ohqbm8uk/kernel/cmdline 10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
206 14:51:05.906800 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 14:51:05.906913 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 14:51:05.907048 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 14:51:05.907204 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 14:51:05.907298 Not connected, no need to disconnect.
211 14:51:05.907401 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 14:51:05.907508 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 14:51:05.907599 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
214 14:51:05.911229 Setting prompt string to ['lava-test: # ']
215 14:51:05.911559 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 14:51:05.911676 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 14:51:05.911768 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 14:51:05.911861 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 14:51:05.912043 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
220 14:51:11.053766 >> Command sent successfully.
221 14:51:11.058068 Returned 0 in 5 seconds
222 14:51:11.158917 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 14:51:11.160561 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 14:51:11.161064 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 14:51:11.161592 Setting prompt string to 'Starting depthcharge on Voema...'
227 14:51:11.162019 Changing prompt to 'Starting depthcharge on Voema...'
228 14:51:11.162375 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 14:51:11.163741 [Enter `^Ec?' for help]
230 14:51:12.719025 arn: 1, Skip: 3843, Flake: 1, Du
231 14:51:12.719234
232 14:51:12.728701 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 14:51:12.735563 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 14:51:12.739000 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 14:51:12.741745 CPU: AES supported, TXT NOT supported, VT supported
236 14:51:12.748905 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 14:51:12.752215 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 14:51:12.759455 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 14:51:12.762396 VBOOT: Loading verstage.
240 14:51:12.765888 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 14:51:12.772548 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 14:51:12.775674 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 14:51:12.785952 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 14:51:12.792328 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 14:51:12.792411
246 14:51:12.792477
247 14:51:12.805727 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 14:51:12.819549 Probing TPM: . done!
249 14:51:12.822835 TPM ready after 0 ms
250 14:51:12.826333 Connected to device vid:did:rid of 1ae0:0028:00
251 14:51:12.837570 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
252 14:51:12.843956 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 14:51:12.847261 Initialized TPM device CR50 revision 0
254 14:51:12.903810 tlcl_send_startup: Startup return code is 0
255 14:51:12.903917 TPM: setup succeeded
256 14:51:12.918326 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 14:51:12.932042 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 14:51:12.945116 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 14:51:12.954803 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 14:51:12.958379 Chrome EC: UHEPI supported
261 14:51:12.961937 Phase 1
262 14:51:12.965185 FMAP: area GBB found @ 1805000 (458752 bytes)
263 14:51:12.974722 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 14:51:12.981517 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 14:51:12.988028 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 14:51:12.995189 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 14:51:12.997930 Recovery requested (1009000e)
268 14:51:13.001271 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 14:51:13.013065 tlcl_extend: response is 0
270 14:51:13.019897 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 14:51:13.029402 tlcl_extend: response is 0
272 14:51:13.035927 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 14:51:13.042898 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 14:51:13.049485 BS: verstage times (exec / console): total (unknown) / 142 ms
275 14:51:13.049570
276 14:51:13.049636
277 14:51:13.062604 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 14:51:13.069412 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 14:51:13.072389 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 14:51:13.078792 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 14:51:13.082298 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 14:51:13.085807 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 14:51:13.088664 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 14:51:13.092312 TCO_STS: 0000 0000
285 14:51:13.095274 GEN_PMCON: d0015038 00002200
286 14:51:13.098590 GBLRST_CAUSE: 00000000 00000000
287 14:51:13.101628 HPR_CAUSE0: 00000000
288 14:51:13.101711 prev_sleep_state 5
289 14:51:13.104929 Boot Count incremented to 17324
290 14:51:13.112085 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 14:51:13.119194 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 14:51:13.128388 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 14:51:13.134899 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 14:51:13.138493 Chrome EC: UHEPI supported
295 14:51:13.145149 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 14:51:13.157201 Probing TPM: done!
297 14:51:13.163615 Connected to device vid:did:rid of 1ae0:0028:00
298 14:51:13.174087 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 14:51:13.177298 Initialized TPM device CR50 revision 0
300 14:51:13.192029 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 14:51:13.198629 MRC: Hash idx 0x100b comparison successful.
302 14:51:13.201465 MRC cache found, size faa8
303 14:51:13.201549 bootmode is set to: 2
304 14:51:13.205396 SPD index = 2
305 14:51:13.211433 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 14:51:13.214798 SPD: module type is LPDDR4X
307 14:51:13.218134 SPD: module part number is MT53D1G64D4NW-046
308 14:51:13.224957 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 14:51:13.228196 SPD: device width 16 bits, bus width 16 bits
310 14:51:13.234480 SPD: module size is 2048 MB (per channel)
311 14:51:13.663363 CBMEM:
312 14:51:13.666554 IMD: root @ 0x76fff000 254 entries.
313 14:51:13.670027 IMD: root @ 0x76ffec00 62 entries.
314 14:51:13.673056 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 14:51:13.679388 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 14:51:13.682674 External stage cache:
317 14:51:13.686140 IMD: root @ 0x7b3ff000 254 entries.
318 14:51:13.689193 IMD: root @ 0x7b3fec00 62 entries.
319 14:51:13.704495 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 14:51:13.711455 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 14:51:13.717582 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 14:51:13.731377 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 14:51:13.737693 cse_lite: Skip switching to RW in the recovery path
324 14:51:13.737780 8 DIMMs found
325 14:51:13.741175 SMM Memory Map
326 14:51:13.744718 SMRAM : 0x7b000000 0x800000
327 14:51:13.748065 Subregion 0: 0x7b000000 0x200000
328 14:51:13.750856 Subregion 1: 0x7b200000 0x200000
329 14:51:13.754302 Subregion 2: 0x7b400000 0x400000
330 14:51:13.754391 top_of_ram = 0x77000000
331 14:51:13.761030 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 14:51:13.767564 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 14:51:13.770968 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 14:51:13.777707 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 14:51:13.784227 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 14:51:13.790951 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 14:51:13.801097 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 14:51:13.807386 Processing 211 relocs. Offset value of 0x74c0b000
339 14:51:13.814277 BS: romstage times (exec / console): total (unknown) / 277 ms
340 14:51:13.820487
341 14:51:13.820596
342 14:51:13.830674 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 14:51:13.833896 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 14:51:13.840683 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 14:51:13.850861 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 14:51:13.857576 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 14:51:13.863664 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 14:51:13.906985 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 14:51:13.913428 Processing 5008 relocs. Offset value of 0x75d98000
350 14:51:13.916504 BS: postcar times (exec / console): total (unknown) / 59 ms
351 14:51:13.920010
352 14:51:13.920115
353 14:51:13.930012 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 14:51:13.930121 Normal boot
355 14:51:13.933395 FW_CONFIG value is 0x804c02
356 14:51:13.936452 PCI: 00:07.0 disabled by fw_config
357 14:51:13.940012 PCI: 00:07.1 disabled by fw_config
358 14:51:13.942899 PCI: 00:0d.2 disabled by fw_config
359 14:51:13.950061 PCI: 00:1c.7 disabled by fw_config
360 14:51:13.953256 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 14:51:13.959778 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 14:51:13.963311 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 14:51:13.969777 GENERIC: 0.0 disabled by fw_config
364 14:51:13.973159 GENERIC: 1.0 disabled by fw_config
365 14:51:13.976357 fw_config match found: DB_USB=USB3_ACTIVE
366 14:51:13.979476 fw_config match found: DB_USB=USB3_ACTIVE
367 14:51:13.982593 fw_config match found: DB_USB=USB3_ACTIVE
368 14:51:13.989573 fw_config match found: DB_USB=USB3_ACTIVE
369 14:51:13.992610 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 14:51:14.002855 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 14:51:14.009523 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 14:51:14.016434 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 14:51:14.019259 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 14:51:14.025950 microcode: Update skipped, already up-to-date
375 14:51:14.032607 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 14:51:14.060737 Detected 4 core, 8 thread CPU.
377 14:51:14.064100 Setting up SMI for CPU
378 14:51:14.067309 IED base = 0x7b400000
379 14:51:14.070328 IED size = 0x00400000
380 14:51:14.070412 Will perform SMM setup.
381 14:51:14.076754 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 14:51:14.083501 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 14:51:14.090181 Processing 16 relocs. Offset value of 0x00030000
384 14:51:14.093217 Attempting to start 7 APs
385 14:51:14.096833 Waiting for 10ms after sending INIT.
386 14:51:14.112499 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 14:51:14.115777 AP: slot 5 apic_id 4.
388 14:51:14.119038 AP: slot 6 apic_id 2.
389 14:51:14.119189 AP: slot 7 apic_id 6.
390 14:51:14.122405 AP: slot 3 apic_id 7.
391 14:51:14.125277 AP: slot 4 apic_id 5.
392 14:51:14.125379 AP: slot 2 apic_id 3.
393 14:51:14.125471 done.
394 14:51:14.132182 Waiting for 2nd SIPI to complete...done.
395 14:51:14.138667 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 14:51:14.145310 Processing 13 relocs. Offset value of 0x00038000
397 14:51:14.148670 Unable to locate Global NVS
398 14:51:14.155476 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 14:51:14.158407 Installing permanent SMM handler to 0x7b000000
400 14:51:14.168292 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 14:51:14.172027 Processing 794 relocs. Offset value of 0x7b010000
402 14:51:14.181960 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 14:51:14.185276 Processing 13 relocs. Offset value of 0x7b008000
404 14:51:14.191349 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 14:51:14.198080 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 14:51:14.204847 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 14:51:14.208316 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 14:51:14.215023 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 14:51:14.221382 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 14:51:14.227916 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 14:51:14.231626 Unable to locate Global NVS
412 14:51:14.237914 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 14:51:14.241314 Clearing SMI status registers
414 14:51:14.244746 SMI_STS: PM1
415 14:51:14.244847 PM1_STS: PWRBTN
416 14:51:14.251379 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 14:51:14.254343 In relocation handler: CPU 0
418 14:51:14.257613 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 14:51:14.264072 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 14:51:14.267560 Relocation complete.
421 14:51:14.274345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 14:51:14.277688 In relocation handler: CPU 1
423 14:51:14.280606 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 14:51:14.284063 Relocation complete.
425 14:51:14.290440 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
426 14:51:14.293862 In relocation handler: CPU 7
427 14:51:14.297311 New SMBASE=0x7affe400 IEDBASE=0x7b400000
428 14:51:14.300517 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 14:51:14.303813 Relocation complete.
430 14:51:14.310431 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
431 14:51:14.313536 In relocation handler: CPU 3
432 14:51:14.316881 New SMBASE=0x7afff400 IEDBASE=0x7b400000
433 14:51:14.320547 Relocation complete.
434 14:51:14.326822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
435 14:51:14.330041 In relocation handler: CPU 2
436 14:51:14.333856 New SMBASE=0x7afff800 IEDBASE=0x7b400000
437 14:51:14.336869 Relocation complete.
438 14:51:14.343747 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
439 14:51:14.346699 In relocation handler: CPU 6
440 14:51:14.350546 New SMBASE=0x7affe800 IEDBASE=0x7b400000
441 14:51:14.356784 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 14:51:14.356888 Relocation complete.
443 14:51:14.366822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
444 14:51:14.369883 In relocation handler: CPU 5
445 14:51:14.372958 New SMBASE=0x7affec00 IEDBASE=0x7b400000
446 14:51:14.376290 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 14:51:14.379647 Relocation complete.
448 14:51:14.386580 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 14:51:14.389488 In relocation handler: CPU 4
450 14:51:14.393145 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 14:51:14.396267 Relocation complete.
452 14:51:14.399819 Initializing CPU #0
453 14:51:14.402996 CPU: vendor Intel device 806c1
454 14:51:14.406463 CPU: family 06, model 8c, stepping 01
455 14:51:14.409213 Clearing out pending MCEs
456 14:51:14.409322 Setting up local APIC...
457 14:51:14.412602 apic_id: 0x00 done.
458 14:51:14.416027 Turbo is available but hidden
459 14:51:14.419246 Turbo is available and visible
460 14:51:14.422318 microcode: Update skipped, already up-to-date
461 14:51:14.425654 CPU #0 initialized
462 14:51:14.429192 Initializing CPU #4
463 14:51:14.429295 Initializing CPU #5
464 14:51:14.432461 CPU: vendor Intel device 806c1
465 14:51:14.435731 CPU: family 06, model 8c, stepping 01
466 14:51:14.439011 CPU: vendor Intel device 806c1
467 14:51:14.442459 CPU: family 06, model 8c, stepping 01
468 14:51:14.445895 Clearing out pending MCEs
469 14:51:14.448936 Clearing out pending MCEs
470 14:51:14.452048 Setting up local APIC...
471 14:51:14.452133 Initializing CPU #2
472 14:51:14.455454 Initializing CPU #6
473 14:51:14.458670 CPU: vendor Intel device 806c1
474 14:51:14.461949 CPU: family 06, model 8c, stepping 01
475 14:51:14.465421 CPU: vendor Intel device 806c1
476 14:51:14.468967 CPU: family 06, model 8c, stepping 01
477 14:51:14.471900 Clearing out pending MCEs
478 14:51:14.475666 Clearing out pending MCEs
479 14:51:14.478945 Setting up local APIC...
480 14:51:14.479052 Initializing CPU #7
481 14:51:14.482249 Initializing CPU #3
482 14:51:14.485144 CPU: vendor Intel device 806c1
483 14:51:14.489374 CPU: family 06, model 8c, stepping 01
484 14:51:14.492947 CPU: vendor Intel device 806c1
485 14:51:14.496303 CPU: family 06, model 8c, stepping 01
486 14:51:14.496405 Clearing out pending MCEs
487 14:51:14.500110 Setting up local APIC...
488 14:51:14.503194 Clearing out pending MCEs
489 14:51:14.506589 Setting up local APIC...
490 14:51:14.506690 apic_id: 0x03 done.
491 14:51:14.509814 Initializing CPU #1
492 14:51:14.513017 apic_id: 0x02 done.
493 14:51:14.515884 microcode: Update skipped, already up-to-date
494 14:51:14.519619 microcode: Update skipped, already up-to-date
495 14:51:14.522915 CPU #2 initialized
496 14:51:14.525960 CPU #6 initialized
497 14:51:14.526065 Setting up local APIC...
498 14:51:14.529276 Setting up local APIC...
499 14:51:14.532527 CPU: vendor Intel device 806c1
500 14:51:14.536002 CPU: family 06, model 8c, stepping 01
501 14:51:14.539442 Clearing out pending MCEs
502 14:51:14.542927 apic_id: 0x07 done.
503 14:51:14.543034 apic_id: 0x06 done.
504 14:51:14.549403 microcode: Update skipped, already up-to-date
505 14:51:14.552748 microcode: Update skipped, already up-to-date
506 14:51:14.556120 CPU #3 initialized
507 14:51:14.556202 CPU #7 initialized
508 14:51:14.558981 apic_id: 0x05 done.
509 14:51:14.562296 apic_id: 0x04 done.
510 14:51:14.565641 microcode: Update skipped, already up-to-date
511 14:51:14.569110 microcode: Update skipped, already up-to-date
512 14:51:14.572142 CPU #4 initialized
513 14:51:14.575575 CPU #5 initialized
514 14:51:14.575660 Setting up local APIC...
515 14:51:14.579080 apic_id: 0x01 done.
516 14:51:14.582169 microcode: Update skipped, already up-to-date
517 14:51:14.585988 CPU #1 initialized
518 14:51:14.588908 bsp_do_flight_plan done after 454 msecs.
519 14:51:14.592371 CPU: frequency set to 4400 MHz
520 14:51:14.595963 Enabling SMIs.
521 14:51:14.602052 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 14:51:14.617182 SATAXPCIE1 indicates PCIe NVMe is present
523 14:51:14.620640 Probing TPM: done!
524 14:51:14.623922 Connected to device vid:did:rid of 1ae0:0028:00
525 14:51:14.634803 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
526 14:51:14.638084 Initialized TPM device CR50 revision 0
527 14:51:14.641226 Enabling S0i3.4
528 14:51:14.648041 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 14:51:14.651230 Found a VBT of 8704 bytes after decompression
530 14:51:14.657739 cse_lite: CSE RO boot. HybridStorageMode disabled
531 14:51:14.664593 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 14:51:14.739903 FSPS returned 0
533 14:51:14.743042 Executing Phase 1 of FspMultiPhaseSiInit
534 14:51:14.753311 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 14:51:14.756723 port C0 DISC req: usage 1 usb3 1 usb2 5
536 14:51:14.759994 Raw Buffer output 0 00000511
537 14:51:14.763265 Raw Buffer output 1 00000000
538 14:51:14.767162 pmc_send_ipc_cmd succeeded
539 14:51:14.773680 port C1 DISC req: usage 1 usb3 2 usb2 3
540 14:51:14.773767 Raw Buffer output 0 00000321
541 14:51:14.777140 Raw Buffer output 1 00000000
542 14:51:14.781463 pmc_send_ipc_cmd succeeded
543 14:51:14.786080 Detected 4 core, 8 thread CPU.
544 14:51:14.789539 Detected 4 core, 8 thread CPU.
545 14:51:14.989179 Display FSP Version Info HOB
546 14:51:14.992894 Reference Code - CPU = a.0.4c.31
547 14:51:14.996256 uCode Version = 0.0.0.86
548 14:51:14.999105 TXT ACM version = ff.ff.ff.ffff
549 14:51:15.002460 Reference Code - ME = a.0.4c.31
550 14:51:15.005840 MEBx version = 0.0.0.0
551 14:51:15.009233 ME Firmware Version = Consumer SKU
552 14:51:15.012658 Reference Code - PCH = a.0.4c.31
553 14:51:15.015572 PCH-CRID Status = Disabled
554 14:51:15.018967 PCH-CRID Original Value = ff.ff.ff.ffff
555 14:51:15.022602 PCH-CRID New Value = ff.ff.ff.ffff
556 14:51:15.026021 OPROM - RST - RAID = ff.ff.ff.ffff
557 14:51:15.028907 PCH Hsio Version = 4.0.0.0
558 14:51:15.032270 Reference Code - SA - System Agent = a.0.4c.31
559 14:51:15.035774 Reference Code - MRC = 2.0.0.1
560 14:51:15.038999 SA - PCIe Version = a.0.4c.31
561 14:51:15.042547 SA-CRID Status = Disabled
562 14:51:15.045404 SA-CRID Original Value = 0.0.0.1
563 14:51:15.048723 SA-CRID New Value = 0.0.0.1
564 14:51:15.052409 OPROM - VBIOS = ff.ff.ff.ffff
565 14:51:15.055156 IO Manageability Engine FW Version = 11.1.4.0
566 14:51:15.058636 PHY Build Version = 0.0.0.e0
567 14:51:15.061940 Thunderbolt(TM) FW Version = 0.0.0.0
568 14:51:15.069306 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 14:51:15.072898 ITSS IRQ Polarities Before:
570 14:51:15.072984 IPC0: 0xffffffff
571 14:51:15.076383 IPC1: 0xffffffff
572 14:51:15.076497 IPC2: 0xffffffff
573 14:51:15.080078 IPC3: 0xffffffff
574 14:51:15.080163 ITSS IRQ Polarities After:
575 14:51:15.083182 IPC0: 0xffffffff
576 14:51:15.083266 IPC1: 0xffffffff
577 14:51:15.086519 IPC2: 0xffffffff
578 14:51:15.089936 IPC3: 0xffffffff
579 14:51:15.093685 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 14:51:15.103075 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 14:51:15.115938 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 14:51:15.129178 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 14:51:15.135634 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
584 14:51:15.135720 Enumerating buses...
585 14:51:15.142784 Show all devs... Before device enumeration.
586 14:51:15.142869 Root Device: enabled 1
587 14:51:15.145611 DOMAIN: 0000: enabled 1
588 14:51:15.149028 CPU_CLUSTER: 0: enabled 1
589 14:51:15.152398 PCI: 00:00.0: enabled 1
590 14:51:15.152482 PCI: 00:02.0: enabled 1
591 14:51:15.155840 PCI: 00:04.0: enabled 1
592 14:51:15.158780 PCI: 00:05.0: enabled 1
593 14:51:15.162704 PCI: 00:06.0: enabled 0
594 14:51:15.162814 PCI: 00:07.0: enabled 0
595 14:51:15.165659 PCI: 00:07.1: enabled 0
596 14:51:15.169092 PCI: 00:07.2: enabled 0
597 14:51:15.172153 PCI: 00:07.3: enabled 0
598 14:51:15.172247 PCI: 00:08.0: enabled 1
599 14:51:15.175408 PCI: 00:09.0: enabled 0
600 14:51:15.178685 PCI: 00:0a.0: enabled 0
601 14:51:15.182285 PCI: 00:0d.0: enabled 1
602 14:51:15.182368 PCI: 00:0d.1: enabled 0
603 14:51:15.186063 PCI: 00:0d.2: enabled 0
604 14:51:15.188586 PCI: 00:0d.3: enabled 0
605 14:51:15.188670 PCI: 00:0e.0: enabled 0
606 14:51:15.192428 PCI: 00:10.2: enabled 1
607 14:51:15.195034 PCI: 00:10.6: enabled 0
608 14:51:15.198938 PCI: 00:10.7: enabled 0
609 14:51:15.199063 PCI: 00:12.0: enabled 0
610 14:51:15.202153 PCI: 00:12.6: enabled 0
611 14:51:15.205119 PCI: 00:13.0: enabled 0
612 14:51:15.208455 PCI: 00:14.0: enabled 1
613 14:51:15.208565 PCI: 00:14.1: enabled 0
614 14:51:15.211774 PCI: 00:14.2: enabled 1
615 14:51:15.215040 PCI: 00:14.3: enabled 1
616 14:51:15.218484 PCI: 00:15.0: enabled 1
617 14:51:15.218586 PCI: 00:15.1: enabled 1
618 14:51:15.222033 PCI: 00:15.2: enabled 1
619 14:51:15.224977 PCI: 00:15.3: enabled 1
620 14:51:15.228399 PCI: 00:16.0: enabled 1
621 14:51:15.228482 PCI: 00:16.1: enabled 0
622 14:51:15.231933 PCI: 00:16.2: enabled 0
623 14:51:15.234721 PCI: 00:16.3: enabled 0
624 14:51:15.238344 PCI: 00:16.4: enabled 0
625 14:51:15.238428 PCI: 00:16.5: enabled 0
626 14:51:15.241716 PCI: 00:17.0: enabled 1
627 14:51:15.244735 PCI: 00:19.0: enabled 0
628 14:51:15.244819 PCI: 00:19.1: enabled 1
629 14:51:15.248091 PCI: 00:19.2: enabled 0
630 14:51:15.251445 PCI: 00:1c.0: enabled 1
631 14:51:15.254905 PCI: 00:1c.1: enabled 0
632 14:51:15.254988 PCI: 00:1c.2: enabled 0
633 14:51:15.258478 PCI: 00:1c.3: enabled 0
634 14:51:15.261612 PCI: 00:1c.4: enabled 0
635 14:51:15.264908 PCI: 00:1c.5: enabled 0
636 14:51:15.264991 PCI: 00:1c.6: enabled 1
637 14:51:15.268154 PCI: 00:1c.7: enabled 0
638 14:51:15.271097 PCI: 00:1d.0: enabled 1
639 14:51:15.274435 PCI: 00:1d.1: enabled 0
640 14:51:15.274519 PCI: 00:1d.2: enabled 1
641 14:51:15.278207 PCI: 00:1d.3: enabled 0
642 14:51:15.281270 PCI: 00:1e.0: enabled 1
643 14:51:15.284567 PCI: 00:1e.1: enabled 0
644 14:51:15.284650 PCI: 00:1e.2: enabled 1
645 14:51:15.287879 PCI: 00:1e.3: enabled 1
646 14:51:15.290881 PCI: 00:1f.0: enabled 1
647 14:51:15.294341 PCI: 00:1f.1: enabled 0
648 14:51:15.294424 PCI: 00:1f.2: enabled 1
649 14:51:15.297856 PCI: 00:1f.3: enabled 1
650 14:51:15.301056 PCI: 00:1f.4: enabled 0
651 14:51:15.304254 PCI: 00:1f.5: enabled 1
652 14:51:15.304338 PCI: 00:1f.6: enabled 0
653 14:51:15.307622 PCI: 00:1f.7: enabled 0
654 14:51:15.310977 APIC: 00: enabled 1
655 14:51:15.311084 GENERIC: 0.0: enabled 1
656 14:51:15.314203 GENERIC: 0.0: enabled 1
657 14:51:15.317558 GENERIC: 1.0: enabled 1
658 14:51:15.320930 GENERIC: 0.0: enabled 1
659 14:51:15.321014 GENERIC: 1.0: enabled 1
660 14:51:15.324308 USB0 port 0: enabled 1
661 14:51:15.327231 GENERIC: 0.0: enabled 1
662 14:51:15.327321 USB0 port 0: enabled 1
663 14:51:15.330729 GENERIC: 0.0: enabled 1
664 14:51:15.334214 I2C: 00:1a: enabled 1
665 14:51:15.337069 I2C: 00:31: enabled 1
666 14:51:15.337168 I2C: 00:32: enabled 1
667 14:51:15.340578 I2C: 00:10: enabled 1
668 14:51:15.344090 I2C: 00:15: enabled 1
669 14:51:15.344173 GENERIC: 0.0: enabled 0
670 14:51:15.346860 GENERIC: 1.0: enabled 0
671 14:51:15.350477 GENERIC: 0.0: enabled 1
672 14:51:15.350561 SPI: 00: enabled 1
673 14:51:15.353415 SPI: 00: enabled 1
674 14:51:15.356900 PNP: 0c09.0: enabled 1
675 14:51:15.360280 GENERIC: 0.0: enabled 1
676 14:51:15.360364 USB3 port 0: enabled 1
677 14:51:15.363801 USB3 port 1: enabled 1
678 14:51:15.366693 USB3 port 2: enabled 0
679 14:51:15.366810 USB3 port 3: enabled 0
680 14:51:15.370278 USB2 port 0: enabled 0
681 14:51:15.373659 USB2 port 1: enabled 1
682 14:51:15.373743 USB2 port 2: enabled 1
683 14:51:15.376858 USB2 port 3: enabled 0
684 14:51:15.380081 USB2 port 4: enabled 1
685 14:51:15.383370 USB2 port 5: enabled 0
686 14:51:15.383454 USB2 port 6: enabled 0
687 14:51:15.386729 USB2 port 7: enabled 0
688 14:51:15.389773 USB2 port 8: enabled 0
689 14:51:15.389857 USB2 port 9: enabled 0
690 14:51:15.393268 USB3 port 0: enabled 0
691 14:51:15.396383 USB3 port 1: enabled 1
692 14:51:15.399574 USB3 port 2: enabled 0
693 14:51:15.399657 USB3 port 3: enabled 0
694 14:51:15.403020 GENERIC: 0.0: enabled 1
695 14:51:15.406263 GENERIC: 1.0: enabled 1
696 14:51:15.406347 APIC: 01: enabled 1
697 14:51:15.410119 APIC: 03: enabled 1
698 14:51:15.413017 APIC: 07: enabled 1
699 14:51:15.413100 APIC: 05: enabled 1
700 14:51:15.416439 APIC: 04: enabled 1
701 14:51:15.419767 APIC: 02: enabled 1
702 14:51:15.419850 APIC: 06: enabled 1
703 14:51:15.423354 Compare with tree...
704 14:51:15.425966 Root Device: enabled 1
705 14:51:15.426049 DOMAIN: 0000: enabled 1
706 14:51:15.429556 PCI: 00:00.0: enabled 1
707 14:51:15.432860 PCI: 00:02.0: enabled 1
708 14:51:15.436457 PCI: 00:04.0: enabled 1
709 14:51:15.439387 GENERIC: 0.0: enabled 1
710 14:51:15.439472 PCI: 00:05.0: enabled 1
711 14:51:15.442834 PCI: 00:06.0: enabled 0
712 14:51:15.446277 PCI: 00:07.0: enabled 0
713 14:51:15.449114 GENERIC: 0.0: enabled 1
714 14:51:15.452578 PCI: 00:07.1: enabled 0
715 14:51:15.452662 GENERIC: 1.0: enabled 1
716 14:51:15.455958 PCI: 00:07.2: enabled 0
717 14:51:15.459308 GENERIC: 0.0: enabled 1
718 14:51:15.462796 PCI: 00:07.3: enabled 0
719 14:51:15.465761 GENERIC: 1.0: enabled 1
720 14:51:15.465845 PCI: 00:08.0: enabled 1
721 14:51:15.468823 PCI: 00:09.0: enabled 0
722 14:51:15.472259 PCI: 00:0a.0: enabled 0
723 14:51:15.475837 PCI: 00:0d.0: enabled 1
724 14:51:15.478699 USB0 port 0: enabled 1
725 14:51:15.478809 USB3 port 0: enabled 1
726 14:51:15.482171 USB3 port 1: enabled 1
727 14:51:15.485453 USB3 port 2: enabled 0
728 14:51:15.488914 USB3 port 3: enabled 0
729 14:51:15.492114 PCI: 00:0d.1: enabled 0
730 14:51:15.495441 PCI: 00:0d.2: enabled 0
731 14:51:15.495524 GENERIC: 0.0: enabled 1
732 14:51:15.499000 PCI: 00:0d.3: enabled 0
733 14:51:15.502006 PCI: 00:0e.0: enabled 0
734 14:51:15.505524 PCI: 00:10.2: enabled 1
735 14:51:15.508996 PCI: 00:10.6: enabled 0
736 14:51:15.509080 PCI: 00:10.7: enabled 0
737 14:51:15.512099 PCI: 00:12.0: enabled 0
738 14:51:15.515178 PCI: 00:12.6: enabled 0
739 14:51:15.518962 PCI: 00:13.0: enabled 0
740 14:51:15.521883 PCI: 00:14.0: enabled 1
741 14:51:15.521967 USB0 port 0: enabled 1
742 14:51:15.525291 USB2 port 0: enabled 0
743 14:51:15.528897 USB2 port 1: enabled 1
744 14:51:15.531724 USB2 port 2: enabled 1
745 14:51:15.534952 USB2 port 3: enabled 0
746 14:51:15.535036 USB2 port 4: enabled 1
747 14:51:15.538433 USB2 port 5: enabled 0
748 14:51:15.542178 USB2 port 6: enabled 0
749 14:51:15.545341 USB2 port 7: enabled 0
750 14:51:15.548188 USB2 port 8: enabled 0
751 14:51:15.551609 USB2 port 9: enabled 0
752 14:51:15.551692 USB3 port 0: enabled 0
753 14:51:15.554836 USB3 port 1: enabled 1
754 14:51:15.558567 USB3 port 2: enabled 0
755 14:51:15.561734 USB3 port 3: enabled 0
756 14:51:15.564928 PCI: 00:14.1: enabled 0
757 14:51:15.568388 PCI: 00:14.2: enabled 1
758 14:51:15.568473 PCI: 00:14.3: enabled 1
759 14:51:15.571383 GENERIC: 0.0: enabled 1
760 14:51:15.574745 PCI: 00:15.0: enabled 1
761 14:51:15.578290 I2C: 00:1a: enabled 1
762 14:51:15.578375 I2C: 00:31: enabled 1
763 14:51:15.581108 I2C: 00:32: enabled 1
764 14:51:15.584701 PCI: 00:15.1: enabled 1
765 14:51:15.588185 I2C: 00:10: enabled 1
766 14:51:15.590956 PCI: 00:15.2: enabled 1
767 14:51:15.591040 PCI: 00:15.3: enabled 1
768 14:51:15.594358 PCI: 00:16.0: enabled 1
769 14:51:15.597841 PCI: 00:16.1: enabled 0
770 14:51:15.601392 PCI: 00:16.2: enabled 0
771 14:51:15.604558 PCI: 00:16.3: enabled 0
772 14:51:15.604642 PCI: 00:16.4: enabled 0
773 14:51:15.607892 PCI: 00:16.5: enabled 0
774 14:51:15.611040 PCI: 00:17.0: enabled 1
775 14:51:15.614390 PCI: 00:19.0: enabled 0
776 14:51:15.617586 PCI: 00:19.1: enabled 1
777 14:51:15.617670 I2C: 00:15: enabled 1
778 14:51:15.621179 PCI: 00:19.2: enabled 0
779 14:51:15.624234 PCI: 00:1d.0: enabled 1
780 14:51:15.627395 GENERIC: 0.0: enabled 1
781 14:51:15.630995 PCI: 00:1e.0: enabled 1
782 14:51:15.631129 PCI: 00:1e.1: enabled 0
783 14:51:15.634182 PCI: 00:1e.2: enabled 1
784 14:51:15.637458 SPI: 00: enabled 1
785 14:51:15.640509 PCI: 00:1e.3: enabled 1
786 14:51:15.640612 SPI: 00: enabled 1
787 14:51:15.644000 PCI: 00:1f.0: enabled 1
788 14:51:15.647297 PNP: 0c09.0: enabled 1
789 14:51:15.650891 PCI: 00:1f.1: enabled 0
790 14:51:15.653818 PCI: 00:1f.2: enabled 1
791 14:51:15.653892 GENERIC: 0.0: enabled 1
792 14:51:15.657191 GENERIC: 0.0: enabled 1
793 14:51:15.660598 GENERIC: 1.0: enabled 1
794 14:51:15.664006 PCI: 00:1f.3: enabled 1
795 14:51:15.667149 PCI: 00:1f.4: enabled 0
796 14:51:15.718991 PCI: 00:1f.5: enabled 1
797 14:51:15.719166 PCI: 00:1f.6: enabled 0
798 14:51:15.719265 PCI: 00:1f.7: enabled 0
799 14:51:15.719359 CPU_CLUSTER: 0: enabled 1
800 14:51:15.719448 APIC: 00: enabled 1
801 14:51:15.719723 APIC: 01: enabled 1
802 14:51:15.719819 APIC: 03: enabled 1
803 14:51:15.719907 APIC: 07: enabled 1
804 14:51:15.719994 APIC: 05: enabled 1
805 14:51:15.720083 APIC: 04: enabled 1
806 14:51:15.720170 APIC: 02: enabled 1
807 14:51:15.720258 APIC: 06: enabled 1
808 14:51:15.720361 Root Device scanning...
809 14:51:15.720474 scan_static_bus for Root Device
810 14:51:15.720564 DOMAIN: 0000 enabled
811 14:51:15.720680 CPU_CLUSTER: 0 enabled
812 14:51:15.720769 DOMAIN: 0000 scanning...
813 14:51:15.720856 PCI: pci_scan_bus for bus 00
814 14:51:15.720955 PCI: 00:00.0 [8086/0000] ops
815 14:51:15.721046 PCI: 00:00.0 [8086/9a12] enabled
816 14:51:15.769244 PCI: 00:02.0 [8086/0000] bus ops
817 14:51:15.769408 PCI: 00:02.0 [8086/9a40] enabled
818 14:51:15.769510 PCI: 00:04.0 [8086/0000] bus ops
819 14:51:15.769602 PCI: 00:04.0 [8086/9a03] enabled
820 14:51:15.769878 PCI: 00:05.0 [8086/9a19] enabled
821 14:51:15.769972 PCI: 00:07.0 [0000/0000] hidden
822 14:51:15.770065 PCI: 00:08.0 [8086/9a11] enabled
823 14:51:15.770137 PCI: 00:0a.0 [8086/9a0d] disabled
824 14:51:15.770208 PCI: 00:0d.0 [8086/0000] bus ops
825 14:51:15.770277 PCI: 00:0d.0 [8086/9a13] enabled
826 14:51:15.770369 PCI: 00:14.0 [8086/0000] bus ops
827 14:51:15.770480 PCI: 00:14.0 [8086/a0ed] enabled
828 14:51:15.770575 PCI: 00:14.2 [8086/a0ef] enabled
829 14:51:15.771150 PCI: 00:14.3 [8086/0000] bus ops
830 14:51:15.771248 PCI: 00:14.3 [8086/a0f0] enabled
831 14:51:15.818724 PCI: 00:15.0 [8086/0000] bus ops
832 14:51:15.818848 PCI: 00:15.0 [8086/a0e8] enabled
833 14:51:15.819119 PCI: 00:15.1 [8086/0000] bus ops
834 14:51:15.819191 PCI: 00:15.1 [8086/a0e9] enabled
835 14:51:15.819700 PCI: 00:15.2 [8086/0000] bus ops
836 14:51:15.819795 PCI: 00:15.2 [8086/a0ea] enabled
837 14:51:15.820066 PCI: 00:15.3 [8086/0000] bus ops
838 14:51:15.820158 PCI: 00:15.3 [8086/a0eb] enabled
839 14:51:15.820261 PCI: 00:16.0 [8086/0000] ops
840 14:51:15.820359 PCI: 00:16.0 [8086/a0e0] enabled
841 14:51:15.820458 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 14:51:15.820741 PCI: 00:19.0 [8086/0000] bus ops
843 14:51:15.820841 PCI: 00:19.0 [8086/a0c5] disabled
844 14:51:15.820932 PCI: 00:19.1 [8086/0000] bus ops
845 14:51:15.821021 PCI: 00:19.1 [8086/a0c6] enabled
846 14:51:15.823737 PCI: 00:1d.0 [8086/0000] bus ops
847 14:51:15.826982 PCI: 00:1d.0 [8086/a0b0] enabled
848 14:51:15.830778 PCI: 00:1e.0 [8086/0000] ops
849 14:51:15.834249 PCI: 00:1e.0 [8086/a0a8] enabled
850 14:51:15.837516 PCI: 00:1e.2 [8086/0000] bus ops
851 14:51:15.840632 PCI: 00:1e.2 [8086/a0aa] enabled
852 14:51:15.844071 PCI: 00:1e.3 [8086/0000] bus ops
853 14:51:15.846876 PCI: 00:1e.3 [8086/a0ab] enabled
854 14:51:15.850253 PCI: 00:1f.0 [8086/0000] bus ops
855 14:51:15.853251 PCI: 00:1f.0 [8086/a087] enabled
856 14:51:15.853342 RTC Init
857 14:51:15.856496 Set power on after power failure.
858 14:51:15.859912 Disabling Deep S3
859 14:51:15.863223 Disabling Deep S3
860 14:51:15.863323 Disabling Deep S4
861 14:51:15.866404 Disabling Deep S4
862 14:51:15.866513 Disabling Deep S5
863 14:51:15.870028 Disabling Deep S5
864 14:51:15.873324 PCI: 00:1f.2 [0000/0000] hidden
865 14:51:15.876772 PCI: 00:1f.3 [8086/0000] bus ops
866 14:51:15.879622 PCI: 00:1f.3 [8086/a0c8] enabled
867 14:51:15.883290 PCI: 00:1f.5 [8086/0000] bus ops
868 14:51:15.886470 PCI: 00:1f.5 [8086/a0a4] enabled
869 14:51:15.889592 PCI: Leftover static devices:
870 14:51:15.889675 PCI: 00:10.2
871 14:51:15.892559 PCI: 00:10.6
872 14:51:15.892641 PCI: 00:10.7
873 14:51:15.896126 PCI: 00:06.0
874 14:51:15.896208 PCI: 00:07.1
875 14:51:15.896274 PCI: 00:07.2
876 14:51:15.899382 PCI: 00:07.3
877 14:51:15.899465 PCI: 00:09.0
878 14:51:15.902924 PCI: 00:0d.1
879 14:51:15.903006 PCI: 00:0d.2
880 14:51:15.903080 PCI: 00:0d.3
881 14:51:15.906370 PCI: 00:0e.0
882 14:51:15.906453 PCI: 00:12.0
883 14:51:15.909291 PCI: 00:12.6
884 14:51:15.909373 PCI: 00:13.0
885 14:51:15.912837 PCI: 00:14.1
886 14:51:15.912919 PCI: 00:16.1
887 14:51:15.912985 PCI: 00:16.2
888 14:51:15.916197 PCI: 00:16.3
889 14:51:15.916279 PCI: 00:16.4
890 14:51:15.919015 PCI: 00:16.5
891 14:51:15.919127 PCI: 00:17.0
892 14:51:15.919194 PCI: 00:19.2
893 14:51:15.922685 PCI: 00:1e.1
894 14:51:15.922774 PCI: 00:1f.1
895 14:51:15.925914 PCI: 00:1f.4
896 14:51:15.925997 PCI: 00:1f.6
897 14:51:15.929063 PCI: 00:1f.7
898 14:51:15.929147 PCI: Check your devicetree.cb.
899 14:51:15.932156 PCI: 00:02.0 scanning...
900 14:51:15.935537 scan_generic_bus for PCI: 00:02.0
901 14:51:15.942026 scan_generic_bus for PCI: 00:02.0 done
902 14:51:15.945530 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 14:51:15.948922 PCI: 00:04.0 scanning...
904 14:51:15.952161 scan_generic_bus for PCI: 00:04.0
905 14:51:15.955016 GENERIC: 0.0 enabled
906 14:51:15.958914 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 14:51:15.965298 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 14:51:15.968528 PCI: 00:0d.0 scanning...
909 14:51:15.971890 scan_static_bus for PCI: 00:0d.0
910 14:51:15.971974 USB0 port 0 enabled
911 14:51:15.975225 USB0 port 0 scanning...
912 14:51:15.978395 scan_static_bus for USB0 port 0
913 14:51:15.981840 USB3 port 0 enabled
914 14:51:15.981924 USB3 port 1 enabled
915 14:51:15.984892 USB3 port 2 disabled
916 14:51:15.988305 USB3 port 3 disabled
917 14:51:15.988388 USB3 port 0 scanning...
918 14:51:15.991171 scan_static_bus for USB3 port 0
919 14:51:15.998095 scan_static_bus for USB3 port 0 done
920 14:51:16.001500 scan_bus: bus USB3 port 0 finished in 6 msecs
921 14:51:16.004925 USB3 port 1 scanning...
922 14:51:16.007762 scan_static_bus for USB3 port 1
923 14:51:16.011096 scan_static_bus for USB3 port 1 done
924 14:51:16.014691 scan_bus: bus USB3 port 1 finished in 6 msecs
925 14:51:16.018135 scan_static_bus for USB0 port 0 done
926 14:51:16.024588 scan_bus: bus USB0 port 0 finished in 43 msecs
927 14:51:16.028028 scan_static_bus for PCI: 00:0d.0 done
928 14:51:16.030818 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 14:51:16.034365 PCI: 00:14.0 scanning...
930 14:51:16.037615 scan_static_bus for PCI: 00:14.0
931 14:51:16.041134 USB0 port 0 enabled
932 14:51:16.043981 USB0 port 0 scanning...
933 14:51:16.047318 scan_static_bus for USB0 port 0
934 14:51:16.047403 USB2 port 0 disabled
935 14:51:16.050577 USB2 port 1 enabled
936 14:51:16.054487 USB2 port 2 enabled
937 14:51:16.054570 USB2 port 3 disabled
938 14:51:16.057554 USB2 port 4 enabled
939 14:51:16.057637 USB2 port 5 disabled
940 14:51:16.060736 USB2 port 6 disabled
941 14:51:16.063811 USB2 port 7 disabled
942 14:51:16.063906 USB2 port 8 disabled
943 14:51:16.067011 USB2 port 9 disabled
944 14:51:16.070274 USB3 port 0 disabled
945 14:51:16.070352 USB3 port 1 enabled
946 14:51:16.073425 USB3 port 2 disabled
947 14:51:16.077141 USB3 port 3 disabled
948 14:51:16.077219 USB2 port 1 scanning...
949 14:51:16.080235 scan_static_bus for USB2 port 1
950 14:51:16.086844 scan_static_bus for USB2 port 1 done
951 14:51:16.090299 scan_bus: bus USB2 port 1 finished in 6 msecs
952 14:51:16.093589 USB2 port 2 scanning...
953 14:51:16.096992 scan_static_bus for USB2 port 2
954 14:51:16.099896 scan_static_bus for USB2 port 2 done
955 14:51:16.103568 scan_bus: bus USB2 port 2 finished in 6 msecs
956 14:51:16.106866 USB2 port 4 scanning...
957 14:51:16.110051 scan_static_bus for USB2 port 4
958 14:51:16.113376 scan_static_bus for USB2 port 4 done
959 14:51:16.119854 scan_bus: bus USB2 port 4 finished in 6 msecs
960 14:51:16.119934 USB3 port 1 scanning...
961 14:51:16.123002 scan_static_bus for USB3 port 1
962 14:51:16.126373 scan_static_bus for USB3 port 1 done
963 14:51:16.133244 scan_bus: bus USB3 port 1 finished in 6 msecs
964 14:51:16.136564 scan_static_bus for USB0 port 0 done
965 14:51:16.140024 scan_bus: bus USB0 port 0 finished in 93 msecs
966 14:51:16.146363 scan_static_bus for PCI: 00:14.0 done
967 14:51:16.149689 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 14:51:16.152629 PCI: 00:14.3 scanning...
969 14:51:16.156045 scan_static_bus for PCI: 00:14.3
970 14:51:16.159237 GENERIC: 0.0 enabled
971 14:51:16.162851 scan_static_bus for PCI: 00:14.3 done
972 14:51:16.166063 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 14:51:16.169052 PCI: 00:15.0 scanning...
974 14:51:16.172628 scan_static_bus for PCI: 00:15.0
975 14:51:16.176035 I2C: 00:1a enabled
976 14:51:16.176113 I2C: 00:31 enabled
977 14:51:16.179246 I2C: 00:32 enabled
978 14:51:16.182369 scan_static_bus for PCI: 00:15.0 done
979 14:51:16.185900 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 14:51:16.189198 PCI: 00:15.1 scanning...
981 14:51:16.192234 scan_static_bus for PCI: 00:15.1
982 14:51:16.195417 I2C: 00:10 enabled
983 14:51:16.198771 scan_static_bus for PCI: 00:15.1 done
984 14:51:16.202225 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 14:51:16.205644 PCI: 00:15.2 scanning...
986 14:51:16.208672 scan_static_bus for PCI: 00:15.2
987 14:51:16.212181 scan_static_bus for PCI: 00:15.2 done
988 14:51:16.218158 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 14:51:16.221851 PCI: 00:15.3 scanning...
990 14:51:16.225081 scan_static_bus for PCI: 00:15.3
991 14:51:16.228569 scan_static_bus for PCI: 00:15.3 done
992 14:51:16.231297 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 14:51:16.234762 PCI: 00:19.1 scanning...
994 14:51:16.238230 scan_static_bus for PCI: 00:19.1
995 14:51:16.241657 I2C: 00:15 enabled
996 14:51:16.245027 scan_static_bus for PCI: 00:19.1 done
997 14:51:16.247933 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 14:51:16.251260 PCI: 00:1d.0 scanning...
999 14:51:16.254809 do_pci_scan_bridge for PCI: 00:1d.0
1000 14:51:16.257797 PCI: pci_scan_bus for bus 01
1001 14:51:16.261278 PCI: 01:00.0 [15b7/5009] enabled
1002 14:51:16.264625 GENERIC: 0.0 enabled
1003 14:51:16.267801 Enabling Common Clock Configuration
1004 14:51:16.270955 L1 Sub-State supported from root port 29
1005 14:51:16.274318 L1 Sub-State Support = 0x5
1006 14:51:16.277552 CommonModeRestoreTime = 0x28
1007 14:51:16.280896 Power On Value = 0x16, Power On Scale = 0x0
1008 14:51:16.284377 ASPM: Enabled L1
1009 14:51:16.287557 PCIe: Max_Payload_Size adjusted to 128
1010 14:51:16.293798 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 14:51:16.293874 PCI: 00:1e.2 scanning...
1012 14:51:16.297465 scan_generic_bus for PCI: 00:1e.2
1013 14:51:16.300828 SPI: 00 enabled
1014 14:51:16.307124 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 14:51:16.310898 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 14:51:16.314066 PCI: 00:1e.3 scanning...
1017 14:51:16.317631 scan_generic_bus for PCI: 00:1e.3
1018 14:51:16.317715 SPI: 00 enabled
1019 14:51:16.324238 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 14:51:16.330670 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 14:51:16.334170 PCI: 00:1f.0 scanning...
1022 14:51:16.337762 scan_static_bus for PCI: 00:1f.0
1023 14:51:16.337845 PNP: 0c09.0 enabled
1024 14:51:16.340763 PNP: 0c09.0 scanning...
1025 14:51:16.344054 scan_static_bus for PNP: 0c09.0
1026 14:51:16.347009 scan_static_bus for PNP: 0c09.0 done
1027 14:51:16.354047 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 14:51:16.357432 scan_static_bus for PCI: 00:1f.0 done
1029 14:51:16.360289 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 14:51:16.363982 PCI: 00:1f.2 scanning...
1031 14:51:16.367250 scan_static_bus for PCI: 00:1f.2
1032 14:51:16.370593 GENERIC: 0.0 enabled
1033 14:51:16.370676 GENERIC: 0.0 scanning...
1034 14:51:16.373890 scan_static_bus for GENERIC: 0.0
1035 14:51:16.377092 GENERIC: 0.0 enabled
1036 14:51:16.380693 GENERIC: 1.0 enabled
1037 14:51:16.383633 scan_static_bus for GENERIC: 0.0 done
1038 14:51:16.386859 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 14:51:16.393586 scan_static_bus for PCI: 00:1f.2 done
1040 14:51:16.396763 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 14:51:16.400235 PCI: 00:1f.3 scanning...
1042 14:51:16.403433 scan_static_bus for PCI: 00:1f.3
1043 14:51:16.406612 scan_static_bus for PCI: 00:1f.3 done
1044 14:51:16.410071 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 14:51:16.412996 PCI: 00:1f.5 scanning...
1046 14:51:16.416547 scan_generic_bus for PCI: 00:1f.5
1047 14:51:16.423020 scan_generic_bus for PCI: 00:1f.5 done
1048 14:51:16.426334 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 14:51:16.429579 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 14:51:16.435993 scan_static_bus for Root Device done
1051 14:51:16.439404 scan_bus: bus Root Device finished in 735 msecs
1052 14:51:16.439506 done
1053 14:51:16.445734 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 14:51:16.449300 Chrome EC: UHEPI supported
1055 14:51:16.456287 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 14:51:16.462651 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 14:51:16.465926 SPI flash protection: WPSW=0 SRP0=1
1058 14:51:16.468856 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 14:51:16.475603 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 14:51:16.478969 found VGA at PCI: 00:02.0
1061 14:51:16.482298 Setting up VGA for PCI: 00:02.0
1062 14:51:16.489264 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 14:51:16.492402 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 14:51:16.495380 Allocating resources...
1065 14:51:16.495464 Reading resources...
1066 14:51:16.501794 Root Device read_resources bus 0 link: 0
1067 14:51:16.505325 DOMAIN: 0000 read_resources bus 0 link: 0
1068 14:51:16.511584 PCI: 00:04.0 read_resources bus 1 link: 0
1069 14:51:16.514885 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 14:51:16.521565 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 14:51:16.525146 USB0 port 0 read_resources bus 0 link: 0
1072 14:51:16.531513 USB0 port 0 read_resources bus 0 link: 0 done
1073 14:51:16.534816 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 14:51:16.538390 PCI: 00:14.0 read_resources bus 0 link: 0
1075 14:51:16.545075 USB0 port 0 read_resources bus 0 link: 0
1076 14:51:16.547969 USB0 port 0 read_resources bus 0 link: 0 done
1077 14:51:16.554843 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 14:51:16.558033 PCI: 00:14.3 read_resources bus 0 link: 0
1079 14:51:16.564958 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 14:51:16.568334 PCI: 00:15.0 read_resources bus 0 link: 0
1081 14:51:16.574783 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 14:51:16.578161 PCI: 00:15.1 read_resources bus 0 link: 0
1083 14:51:16.585143 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 14:51:16.588413 PCI: 00:19.1 read_resources bus 0 link: 0
1085 14:51:16.595565 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 14:51:16.598366 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 14:51:16.605129 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 14:51:16.608381 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 14:51:16.615177 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 14:51:16.618411 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 14:51:16.625330 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 14:51:16.628056 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 14:51:16.635287 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 14:51:16.638521 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 14:51:16.641658 GENERIC: 0.0 read_resources bus 0 link: 0
1096 14:51:16.648673 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 14:51:16.651646 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 14:51:16.658956 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 14:51:16.662243 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 14:51:16.669197 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 14:51:16.672223 Root Device read_resources bus 0 link: 0 done
1102 14:51:16.675555 Done reading resources.
1103 14:51:16.682431 Show resources in subtree (Root Device)...After reading.
1104 14:51:16.685500 Root Device child on link 0 DOMAIN: 0000
1105 14:51:16.688704 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 14:51:16.698573 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 14:51:16.708964 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 14:51:16.712101 PCI: 00:00.0
1109 14:51:16.721881 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 14:51:16.728256 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 14:51:16.738702 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 14:51:16.748331 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 14:51:16.758134 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 14:51:16.768228 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 14:51:16.778093 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 14:51:16.784511 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 14:51:16.794315 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 14:51:16.805020 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 14:51:16.814541 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 14:51:16.824513 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 14:51:16.834546 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 14:51:16.840814 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 14:51:16.851037 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 14:51:16.860531 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 14:51:16.870778 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 14:51:16.880250 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 14:51:16.890385 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 14:51:16.900665 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 14:51:16.900747 PCI: 00:02.0
1130 14:51:16.910043 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 14:51:16.920265 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 14:51:16.930100 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 14:51:16.933654 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 14:51:16.943302 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 14:51:16.946474 GENERIC: 0.0
1136 14:51:16.946557 PCI: 00:05.0
1137 14:51:16.959660 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 14:51:16.962926 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 14:51:16.963009 GENERIC: 0.0
1140 14:51:16.966520 PCI: 00:08.0
1141 14:51:16.976133 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 14:51:16.976217 PCI: 00:0a.0
1143 14:51:16.983042 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 14:51:16.992888 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 14:51:16.995936 USB0 port 0 child on link 0 USB3 port 0
1146 14:51:16.999135 USB3 port 0
1147 14:51:16.999216 USB3 port 1
1148 14:51:17.003379 USB3 port 2
1149 14:51:17.003460 USB3 port 3
1150 14:51:17.009424 PCI: 00:14.0 child on link 0 USB0 port 0
1151 14:51:17.019033 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 14:51:17.022421 USB0 port 0 child on link 0 USB2 port 0
1153 14:51:17.026066 USB2 port 0
1154 14:51:17.026151 USB2 port 1
1155 14:51:17.029054 USB2 port 2
1156 14:51:17.029139 USB2 port 3
1157 14:51:17.032101 USB2 port 4
1158 14:51:17.032185 USB2 port 5
1159 14:51:17.035563 USB2 port 6
1160 14:51:17.035647 USB2 port 7
1161 14:51:17.038968 USB2 port 8
1162 14:51:17.039052 USB2 port 9
1163 14:51:17.042261 USB3 port 0
1164 14:51:17.042345 USB3 port 1
1165 14:51:17.045359 USB3 port 2
1166 14:51:17.045444 USB3 port 3
1167 14:51:17.049383 PCI: 00:14.2
1168 14:51:17.058840 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 14:51:17.068458 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 14:51:17.071870 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 14:51:17.081573 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 14:51:17.085031 GENERIC: 0.0
1173 14:51:17.088183 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 14:51:17.098561 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 14:51:17.101409 I2C: 00:1a
1176 14:51:17.101491 I2C: 00:31
1177 14:51:17.104970 I2C: 00:32
1178 14:51:17.108413 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 14:51:17.118098 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 14:51:17.118182 I2C: 00:10
1181 14:51:17.121494 PCI: 00:15.2
1182 14:51:17.131602 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:51:17.131691 PCI: 00:15.3
1184 14:51:17.141139 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 14:51:17.144522 PCI: 00:16.0
1186 14:51:17.154269 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 14:51:17.154382 PCI: 00:19.0
1188 14:51:17.161328 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 14:51:17.170699 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:51:17.170807 I2C: 00:15
1191 14:51:17.177617 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 14:51:17.184394 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 14:51:17.194264 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 14:51:17.204029 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 14:51:17.207338 GENERIC: 0.0
1196 14:51:17.207432 PCI: 01:00.0
1197 14:51:17.217212 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 14:51:17.227510 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 14:51:17.230175 PCI: 00:1e.0
1200 14:51:17.240372 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 14:51:17.243716 PCI: 00:1e.2 child on link 0 SPI: 00
1202 14:51:17.253474 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:51:17.256938 SPI: 00
1204 14:51:17.259709 PCI: 00:1e.3 child on link 0 SPI: 00
1205 14:51:17.270126 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:51:17.270232 SPI: 00
1207 14:51:17.276799 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 14:51:17.283509 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 14:51:17.286414 PNP: 0c09.0
1210 14:51:17.293053 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 14:51:17.299601 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 14:51:17.309435 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 14:51:17.315806 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 14:51:17.322699 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 14:51:17.322807 GENERIC: 0.0
1216 14:51:17.325687 GENERIC: 1.0
1217 14:51:17.325787 PCI: 00:1f.3
1218 14:51:17.336004 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:51:17.345543 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:51:17.348922 PCI: 00:1f.5
1221 14:51:17.359316 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 14:51:17.362474 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 14:51:17.362576 APIC: 00
1224 14:51:17.365518 APIC: 01
1225 14:51:17.365617 APIC: 03
1226 14:51:17.368753 APIC: 07
1227 14:51:17.368850 APIC: 05
1228 14:51:17.368939 APIC: 04
1229 14:51:17.372198 APIC: 02
1230 14:51:17.372294 APIC: 06
1231 14:51:17.378741 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 14:51:17.385359 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 14:51:17.392140 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 14:51:17.398442 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 14:51:17.402063 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 14:51:17.405012 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 14:51:17.415172 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 14:51:17.421422 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 14:51:17.428311 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 14:51:17.435200 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 14:51:17.441400 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 14:51:17.451431 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 14:51:17.457959 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 14:51:17.464189 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 14:51:17.467742 DOMAIN: 0000: Resource ranges:
1246 14:51:17.471169 * Base: 1000, Size: 800, Tag: 100
1247 14:51:17.474474 * Base: 1900, Size: e700, Tag: 100
1248 14:51:17.480795 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 14:51:17.487684 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 14:51:17.494499 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 14:51:17.501000 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 14:51:17.510820 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 14:51:17.517658 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 14:51:17.524030 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 14:51:17.533726 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 14:51:17.540452 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 14:51:17.546942 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 14:51:17.556736 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 14:51:17.563587 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 14:51:17.570063 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 14:51:17.579975 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 14:51:17.586414 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 14:51:17.593151 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 14:51:17.602952 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 14:51:17.609723 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 14:51:17.616291 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 14:51:17.626724 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 14:51:17.632938 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 14:51:17.639508 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 14:51:17.649134 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 14:51:17.656237 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 14:51:17.662302 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 14:51:17.665764 DOMAIN: 0000: Resource ranges:
1274 14:51:17.672473 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 14:51:17.675994 * Base: d0000000, Size: 28000000, Tag: 200
1276 14:51:17.678885 * Base: fa000000, Size: 1000000, Tag: 200
1277 14:51:17.685724 * Base: fb001000, Size: 2fff000, Tag: 200
1278 14:51:17.689268 * Base: fe010000, Size: 2e000, Tag: 200
1279 14:51:17.692913 * Base: fe03f000, Size: d41000, Tag: 200
1280 14:51:17.695495 * Base: fed88000, Size: 8000, Tag: 200
1281 14:51:17.702418 * Base: fed93000, Size: d000, Tag: 200
1282 14:51:17.705254 * Base: feda2000, Size: 1e000, Tag: 200
1283 14:51:17.708810 * Base: fede0000, Size: 1220000, Tag: 200
1284 14:51:17.715605 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 14:51:17.722313 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 14:51:17.728514 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 14:51:17.735348 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 14:51:17.741727 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 14:51:17.748308 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 14:51:17.754931 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 14:51:17.761390 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 14:51:17.768009 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 14:51:17.774842 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 14:51:17.781201 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 14:51:17.788055 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 14:51:17.794848 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 14:51:17.801184 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 14:51:17.807950 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 14:51:17.814391 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 14:51:17.820837 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 14:51:17.827632 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 14:51:17.834048 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 14:51:17.841125 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 14:51:17.847601 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 14:51:17.854229 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 14:51:17.860612 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 14:51:17.867508 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 14:51:17.874094 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 14:51:17.877438 PCI: 00:1d.0: Resource ranges:
1310 14:51:17.884266 * Base: 7fc00000, Size: 100000, Tag: 200
1311 14:51:17.890540 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 14:51:17.896756 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 14:51:17.903485 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 14:51:17.909895 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 14:51:17.916513 Root Device assign_resources, bus 0 link: 0
1316 14:51:17.919854 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:51:17.929936 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 14:51:17.936725 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:51:17.946283 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 14:51:17.953279 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 14:51:17.959494 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 14:51:17.963003 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 14:51:17.969601 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 14:51:17.979639 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 14:51:17.986445 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 14:51:17.992735 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 14:51:17.996072 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 14:51:18.005965 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 14:51:18.009384 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 14:51:18.016026 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 14:51:18.022262 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 14:51:18.028774 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 14:51:18.038802 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 14:51:18.042196 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 14:51:18.048632 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 14:51:18.055089 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 14:51:18.061896 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 14:51:18.065674 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 14:51:18.071598 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 14:51:18.078432 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 14:51:18.081790 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 14:51:18.091515 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 14:51:18.098142 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 14:51:18.107693 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 14:51:18.114709 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 14:51:18.121346 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 14:51:18.124402 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 14:51:18.134194 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 14:51:18.144338 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 14:51:18.150393 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 14:51:18.157092 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 14:51:18.164312 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 14:51:18.174015 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 14:51:18.177432 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 14:51:18.187173 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 14:51:18.190035 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 14:51:18.193492 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 14:51:18.203291 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 14:51:18.206979 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 14:51:18.213552 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 14:51:18.216387 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 14:51:18.223293 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 14:51:18.226363 LPC: Trying to open IO window from 800 size 1ff
1364 14:51:18.236456 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 14:51:18.242942 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 14:51:18.252790 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 14:51:18.255999 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 14:51:18.259477 Root Device assign_resources, bus 0 link: 0
1369 14:51:18.262868 Done setting resources.
1370 14:51:18.269159 Show resources in subtree (Root Device)...After assigning values.
1371 14:51:18.272445 Root Device child on link 0 DOMAIN: 0000
1372 14:51:18.278967 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 14:51:18.289241 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 14:51:18.299462 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 14:51:18.299541 PCI: 00:00.0
1376 14:51:18.309686 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 14:51:18.319481 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 14:51:18.328952 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 14:51:18.335249 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 14:51:18.345760 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 14:51:18.355308 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 14:51:18.365167 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 14:51:18.375240 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 14:51:18.385162 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 14:51:18.392252 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 14:51:18.401847 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 14:51:18.411563 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 14:51:18.421829 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 14:51:18.431620 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 14:51:18.441418 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 14:51:18.448182 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 14:51:18.457938 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 14:51:18.467702 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 14:51:18.477981 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 14:51:18.488061 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 14:51:18.490957 PCI: 00:02.0
1397 14:51:18.500916 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 14:51:18.511089 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 14:51:18.520822 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 14:51:18.523671 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 14:51:18.534016 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 14:51:18.537120 GENERIC: 0.0
1403 14:51:18.537534 PCI: 00:05.0
1404 14:51:18.550518 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 14:51:18.553621 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 14:51:18.554038 GENERIC: 0.0
1407 14:51:18.556730 PCI: 00:08.0
1408 14:51:18.567044 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 14:51:18.570220 PCI: 00:0a.0
1410 14:51:18.573309 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 14:51:18.583153 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 14:51:18.586823 USB0 port 0 child on link 0 USB3 port 0
1413 14:51:18.589594 USB3 port 0
1414 14:51:18.593091 USB3 port 1
1415 14:51:18.593540 USB3 port 2
1416 14:51:18.596600 USB3 port 3
1417 14:51:18.599342 PCI: 00:14.0 child on link 0 USB0 port 0
1418 14:51:18.609256 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 14:51:18.612898 USB0 port 0 child on link 0 USB2 port 0
1420 14:51:18.615917 USB2 port 0
1421 14:51:18.619458 USB2 port 1
1422 14:51:18.619878 USB2 port 2
1423 14:51:18.622479 USB2 port 3
1424 14:51:18.622893 USB2 port 4
1425 14:51:18.625900 USB2 port 5
1426 14:51:18.626343 USB2 port 6
1427 14:51:18.629337 USB2 port 7
1428 14:51:18.629753 USB2 port 8
1429 14:51:18.632926 USB2 port 9
1430 14:51:18.633341 USB3 port 0
1431 14:51:18.636260 USB3 port 1
1432 14:51:18.636673 USB3 port 2
1433 14:51:18.639155 USB3 port 3
1434 14:51:18.639568 PCI: 00:14.2
1435 14:51:18.652436 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 14:51:18.662427 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 14:51:18.665471 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 14:51:18.675358 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 14:51:18.678899 GENERIC: 0.0
1440 14:51:18.682668 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 14:51:18.691827 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 14:51:18.695541 I2C: 00:1a
1443 14:51:18.695960 I2C: 00:31
1444 14:51:18.698462 I2C: 00:32
1445 14:51:18.701894 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 14:51:18.711862 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 14:51:18.715173 I2C: 00:10
1448 14:51:18.715598 PCI: 00:15.2
1449 14:51:18.724710 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 14:51:18.728401 PCI: 00:15.3
1451 14:51:18.738543 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 14:51:18.738964 PCI: 00:16.0
1453 14:51:18.747893 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 14:51:18.751410 PCI: 00:19.0
1455 14:51:18.754961 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 14:51:18.764638 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 14:51:18.768056 I2C: 00:15
1458 14:51:18.771012 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 14:51:18.781314 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 14:51:18.794045 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 14:51:18.804183 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 14:51:18.804827 GENERIC: 0.0
1463 14:51:18.807408 PCI: 01:00.0
1464 14:51:18.817286 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 14:51:18.827139 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 14:51:18.830576 PCI: 00:1e.0
1467 14:51:18.840583 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 14:51:18.844102 PCI: 00:1e.2 child on link 0 SPI: 00
1469 14:51:18.853907 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 14:51:18.856801 SPI: 00
1471 14:51:18.860374 PCI: 00:1e.3 child on link 0 SPI: 00
1472 14:51:18.870477 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 14:51:18.870939 SPI: 00
1474 14:51:18.876541 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 14:51:18.883542 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 14:51:18.886565 PNP: 0c09.0
1477 14:51:18.896632 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 14:51:18.899584 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 14:51:18.909874 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 14:51:18.919442 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 14:51:18.922851 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 14:51:18.923450 GENERIC: 0.0
1483 14:51:18.926331 GENERIC: 1.0
1484 14:51:18.930082 PCI: 00:1f.3
1485 14:51:18.939803 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 14:51:18.949522 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 14:51:18.950056 PCI: 00:1f.5
1488 14:51:18.959302 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 14:51:18.966270 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 14:51:18.966854 APIC: 00
1491 14:51:18.967385 APIC: 01
1492 14:51:18.969398 APIC: 03
1493 14:51:18.969818 APIC: 07
1494 14:51:18.973044 APIC: 05
1495 14:51:18.973464 APIC: 04
1496 14:51:18.973801 APIC: 02
1497 14:51:18.975916 APIC: 06
1498 14:51:18.979569 Done allocating resources.
1499 14:51:18.982777 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 14:51:18.989865 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 14:51:18.992925 Configure GPIOs for I2S audio on UP4.
1502 14:51:19.000234 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 14:51:19.003496 Enabling resources...
1504 14:51:19.007217 PCI: 00:00.0 subsystem <- 8086/9a12
1505 14:51:19.010332 PCI: 00:00.0 cmd <- 06
1506 14:51:19.013563 PCI: 00:02.0 subsystem <- 8086/9a40
1507 14:51:19.017147 PCI: 00:02.0 cmd <- 03
1508 14:51:19.020147 PCI: 00:04.0 subsystem <- 8086/9a03
1509 14:51:19.023422 PCI: 00:04.0 cmd <- 02
1510 14:51:19.026896 PCI: 00:05.0 subsystem <- 8086/9a19
1511 14:51:19.027524 PCI: 00:05.0 cmd <- 02
1512 14:51:19.033032 PCI: 00:08.0 subsystem <- 8086/9a11
1513 14:51:19.033469 PCI: 00:08.0 cmd <- 06
1514 14:51:19.036501 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 14:51:19.039918 PCI: 00:0d.0 cmd <- 02
1516 14:51:19.043831 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 14:51:19.046374 PCI: 00:14.0 cmd <- 02
1518 14:51:19.049863 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 14:51:19.053226 PCI: 00:14.2 cmd <- 02
1520 14:51:19.056157 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 14:51:19.059668 PCI: 00:14.3 cmd <- 02
1522 14:51:19.063294 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 14:51:19.066119 PCI: 00:15.0 cmd <- 02
1524 14:51:19.069526 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 14:51:19.073040 PCI: 00:15.1 cmd <- 02
1526 14:51:19.076008 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 14:51:19.076422 PCI: 00:15.2 cmd <- 02
1528 14:51:19.082896 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 14:51:19.083354 PCI: 00:15.3 cmd <- 02
1530 14:51:19.086382 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 14:51:19.089951 PCI: 00:16.0 cmd <- 02
1532 14:51:19.092767 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 14:51:19.096551 PCI: 00:19.1 cmd <- 02
1534 14:51:19.099395 PCI: 00:1d.0 bridge ctrl <- 0013
1535 14:51:19.102630 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 14:51:19.105968 PCI: 00:1d.0 cmd <- 06
1537 14:51:19.109310 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 14:51:19.112448 PCI: 00:1e.0 cmd <- 06
1539 14:51:19.116347 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 14:51:19.119190 PCI: 00:1e.2 cmd <- 06
1541 14:51:19.122488 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 14:51:19.125805 PCI: 00:1e.3 cmd <- 02
1543 14:51:19.129312 PCI: 00:1f.0 subsystem <- 8086/a087
1544 14:51:19.129770 PCI: 00:1f.0 cmd <- 407
1545 14:51:19.135963 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 14:51:19.136378 PCI: 00:1f.3 cmd <- 02
1547 14:51:19.139390 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 14:51:19.142339 PCI: 00:1f.5 cmd <- 406
1549 14:51:19.147635 PCI: 01:00.0 cmd <- 02
1550 14:51:19.151717 done.
1551 14:51:19.154890 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 14:51:19.158618 Initializing devices...
1553 14:51:19.161812 Root Device init
1554 14:51:19.165217 Chrome EC: Set SMI mask to 0x0000000000000000
1555 14:51:19.171560 Chrome EC: clear events_b mask to 0x0000000000000000
1556 14:51:19.178313 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 14:51:19.181909 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 14:51:19.188821 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 14:51:19.195314 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 14:51:19.202892 fw_config match found: DB_USB=USB3_ACTIVE
1561 14:51:19.205507 Configure Right Type-C port orientation for retimer
1562 14:51:19.209004 Root Device init finished in 44 msecs
1563 14:51:19.212102 PCI: 00:00.0 init
1564 14:51:19.214934 CPU TDP = 9 Watts
1565 14:51:19.215407 CPU PL1 = 9 Watts
1566 14:51:19.218620 CPU PL2 = 40 Watts
1567 14:51:19.221828 CPU PL4 = 83 Watts
1568 14:51:19.224891 PCI: 00:00.0 init finished in 8 msecs
1569 14:51:19.225522 PCI: 00:02.0 init
1570 14:51:19.228085 GMA: Found VBT in CBFS
1571 14:51:19.231576 GMA: Found valid VBT in CBFS
1572 14:51:19.238609 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 14:51:19.245358 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 14:51:19.248742 PCI: 00:02.0 init finished in 18 msecs
1575 14:51:19.251907 PCI: 00:05.0 init
1576 14:51:19.254836 PCI: 00:05.0 init finished in 0 msecs
1577 14:51:19.258065 PCI: 00:08.0 init
1578 14:51:19.261617 PCI: 00:08.0 init finished in 0 msecs
1579 14:51:19.264578 PCI: 00:14.0 init
1580 14:51:19.268047 PCI: 00:14.0 init finished in 0 msecs
1581 14:51:19.270961 PCI: 00:14.2 init
1582 14:51:19.275208 PCI: 00:14.2 init finished in 0 msecs
1583 14:51:19.277905 PCI: 00:15.0 init
1584 14:51:19.281410 I2C bus 0 version 0x3230302a
1585 14:51:19.284447 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 14:51:19.287950 PCI: 00:15.0 init finished in 6 msecs
1587 14:51:19.288356 PCI: 00:15.1 init
1588 14:51:19.290602 I2C bus 1 version 0x3230302a
1589 14:51:19.293958 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 14:51:19.300537 PCI: 00:15.1 init finished in 6 msecs
1591 14:51:19.300620 PCI: 00:15.2 init
1592 14:51:19.304291 I2C bus 2 version 0x3230302a
1593 14:51:19.307239 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 14:51:19.310564 PCI: 00:15.2 init finished in 6 msecs
1595 14:51:19.314311 PCI: 00:15.3 init
1596 14:51:19.317598 I2C bus 3 version 0x3230302a
1597 14:51:19.320475 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 14:51:19.323705 PCI: 00:15.3 init finished in 6 msecs
1599 14:51:19.327616 PCI: 00:16.0 init
1600 14:51:19.330507 PCI: 00:16.0 init finished in 0 msecs
1601 14:51:19.333936 PCI: 00:19.1 init
1602 14:51:19.337201 I2C bus 5 version 0x3230302a
1603 14:51:19.340568 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 14:51:19.343478 PCI: 00:19.1 init finished in 6 msecs
1605 14:51:19.347483 PCI: 00:1d.0 init
1606 14:51:19.350309 Initializing PCH PCIe bridge.
1607 14:51:19.353560 PCI: 00:1d.0 init finished in 3 msecs
1608 14:51:19.357018 PCI: 00:1f.0 init
1609 14:51:19.360533 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 14:51:19.363355 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 14:51:19.366803 IOAPIC: ID = 0x02
1612 14:51:19.370350 IOAPIC: Dumping registers
1613 14:51:19.370421 reg 0x0000: 0x02000000
1614 14:51:19.373310 reg 0x0001: 0x00770020
1615 14:51:19.376738 reg 0x0002: 0x00000000
1616 14:51:19.379673 PCI: 00:1f.0 init finished in 21 msecs
1617 14:51:19.383007 PCI: 00:1f.2 init
1618 14:51:19.386450 Disabling ACPI via APMC.
1619 14:51:19.390066 APMC done.
1620 14:51:19.393070 PCI: 00:1f.2 init finished in 6 msecs
1621 14:51:19.404943 PCI: 01:00.0 init
1622 14:51:19.408176 PCI: 01:00.0 init finished in 0 msecs
1623 14:51:19.411243 PNP: 0c09.0 init
1624 14:51:19.415466 Google Chrome EC uptime: 8.255 seconds
1625 14:51:19.421573 Google Chrome AP resets since EC boot: 1
1626 14:51:19.424868 Google Chrome most recent AP reset causes:
1627 14:51:19.428189 0.451: 32775 shutdown: entering G3
1628 14:51:19.434551 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 14:51:19.437780 PNP: 0c09.0 init finished in 22 msecs
1630 14:51:19.443995 Devices initialized
1631 14:51:19.447157 Show all devs... After init.
1632 14:51:19.450128 Root Device: enabled 1
1633 14:51:19.450208 DOMAIN: 0000: enabled 1
1634 14:51:19.453588 CPU_CLUSTER: 0: enabled 1
1635 14:51:19.457008 PCI: 00:00.0: enabled 1
1636 14:51:19.460295 PCI: 00:02.0: enabled 1
1637 14:51:19.460375 PCI: 00:04.0: enabled 1
1638 14:51:19.463262 PCI: 00:05.0: enabled 1
1639 14:51:19.466753 PCI: 00:06.0: enabled 0
1640 14:51:19.469942 PCI: 00:07.0: enabled 0
1641 14:51:19.470023 PCI: 00:07.1: enabled 0
1642 14:51:19.473389 PCI: 00:07.2: enabled 0
1643 14:51:19.476842 PCI: 00:07.3: enabled 0
1644 14:51:19.480229 PCI: 00:08.0: enabled 1
1645 14:51:19.480322 PCI: 00:09.0: enabled 0
1646 14:51:19.483244 PCI: 00:0a.0: enabled 0
1647 14:51:19.486749 PCI: 00:0d.0: enabled 1
1648 14:51:19.490243 PCI: 00:0d.1: enabled 0
1649 14:51:19.490349 PCI: 00:0d.2: enabled 0
1650 14:51:19.493562 PCI: 00:0d.3: enabled 0
1651 14:51:19.496522 PCI: 00:0e.0: enabled 0
1652 14:51:19.500105 PCI: 00:10.2: enabled 1
1653 14:51:19.500186 PCI: 00:10.6: enabled 0
1654 14:51:19.503457 PCI: 00:10.7: enabled 0
1655 14:51:19.506303 PCI: 00:12.0: enabled 0
1656 14:51:19.506409 PCI: 00:12.6: enabled 0
1657 14:51:19.509797 PCI: 00:13.0: enabled 0
1658 14:51:19.513120 PCI: 00:14.0: enabled 1
1659 14:51:19.516320 PCI: 00:14.1: enabled 0
1660 14:51:19.516401 PCI: 00:14.2: enabled 1
1661 14:51:19.519443 PCI: 00:14.3: enabled 1
1662 14:51:19.522936 PCI: 00:15.0: enabled 1
1663 14:51:19.526261 PCI: 00:15.1: enabled 1
1664 14:51:19.526342 PCI: 00:15.2: enabled 1
1665 14:51:19.529496 PCI: 00:15.3: enabled 1
1666 14:51:19.532809 PCI: 00:16.0: enabled 1
1667 14:51:19.536420 PCI: 00:16.1: enabled 0
1668 14:51:19.536500 PCI: 00:16.2: enabled 0
1669 14:51:19.539389 PCI: 00:16.3: enabled 0
1670 14:51:19.542929 PCI: 00:16.4: enabled 0
1671 14:51:19.546088 PCI: 00:16.5: enabled 0
1672 14:51:19.546169 PCI: 00:17.0: enabled 0
1673 14:51:19.549288 PCI: 00:19.0: enabled 0
1674 14:51:19.552472 PCI: 00:19.1: enabled 1
1675 14:51:19.556595 PCI: 00:19.2: enabled 0
1676 14:51:19.556677 PCI: 00:1c.0: enabled 1
1677 14:51:19.559210 PCI: 00:1c.1: enabled 0
1678 14:51:19.562600 PCI: 00:1c.2: enabled 0
1679 14:51:19.562682 PCI: 00:1c.3: enabled 0
1680 14:51:19.566216 PCI: 00:1c.4: enabled 0
1681 14:51:19.569360 PCI: 00:1c.5: enabled 0
1682 14:51:19.572521 PCI: 00:1c.6: enabled 1
1683 14:51:19.572611 PCI: 00:1c.7: enabled 0
1684 14:51:19.575715 PCI: 00:1d.0: enabled 1
1685 14:51:19.579286 PCI: 00:1d.1: enabled 0
1686 14:51:19.582179 PCI: 00:1d.2: enabled 1
1687 14:51:19.582261 PCI: 00:1d.3: enabled 0
1688 14:51:19.585605 PCI: 00:1e.0: enabled 1
1689 14:51:19.588946 PCI: 00:1e.1: enabled 0
1690 14:51:19.592559 PCI: 00:1e.2: enabled 1
1691 14:51:19.592687 PCI: 00:1e.3: enabled 1
1692 14:51:19.595744 PCI: 00:1f.0: enabled 1
1693 14:51:19.599329 PCI: 00:1f.1: enabled 0
1694 14:51:19.602100 PCI: 00:1f.2: enabled 1
1695 14:51:19.602181 PCI: 00:1f.3: enabled 1
1696 14:51:19.605708 PCI: 00:1f.4: enabled 0
1697 14:51:19.608907 PCI: 00:1f.5: enabled 1
1698 14:51:19.612122 PCI: 00:1f.6: enabled 0
1699 14:51:19.612204 PCI: 00:1f.7: enabled 0
1700 14:51:19.615511 APIC: 00: enabled 1
1701 14:51:19.618454 GENERIC: 0.0: enabled 1
1702 14:51:19.618536 GENERIC: 0.0: enabled 1
1703 14:51:19.621900 GENERIC: 1.0: enabled 1
1704 14:51:19.625155 GENERIC: 0.0: enabled 1
1705 14:51:19.628467 GENERIC: 1.0: enabled 1
1706 14:51:19.628549 USB0 port 0: enabled 1
1707 14:51:19.632512 GENERIC: 0.0: enabled 1
1708 14:51:19.635355 USB0 port 0: enabled 1
1709 14:51:19.635430 GENERIC: 0.0: enabled 1
1710 14:51:19.638404 I2C: 00:1a: enabled 1
1711 14:51:19.641934 I2C: 00:31: enabled 1
1712 14:51:19.645010 I2C: 00:32: enabled 1
1713 14:51:19.645109 I2C: 00:10: enabled 1
1714 14:51:19.648629 I2C: 00:15: enabled 1
1715 14:51:19.651424 GENERIC: 0.0: enabled 0
1716 14:51:19.651539 GENERIC: 1.0: enabled 0
1717 14:51:19.655000 GENERIC: 0.0: enabled 1
1718 14:51:19.658380 SPI: 00: enabled 1
1719 14:51:19.658458 SPI: 00: enabled 1
1720 14:51:19.661768 PNP: 0c09.0: enabled 1
1721 14:51:19.664787 GENERIC: 0.0: enabled 1
1722 14:51:19.664868 USB3 port 0: enabled 1
1723 14:51:19.668247 USB3 port 1: enabled 1
1724 14:51:19.671693 USB3 port 2: enabled 0
1725 14:51:19.674981 USB3 port 3: enabled 0
1726 14:51:19.675081 USB2 port 0: enabled 0
1727 14:51:19.677937 USB2 port 1: enabled 1
1728 14:51:19.681792 USB2 port 2: enabled 1
1729 14:51:19.681872 USB2 port 3: enabled 0
1730 14:51:19.684872 USB2 port 4: enabled 1
1731 14:51:19.688360 USB2 port 5: enabled 0
1732 14:51:19.691292 USB2 port 6: enabled 0
1733 14:51:19.691372 USB2 port 7: enabled 0
1734 14:51:19.694700 USB2 port 8: enabled 0
1735 14:51:19.698409 USB2 port 9: enabled 0
1736 14:51:19.698489 USB3 port 0: enabled 0
1737 14:51:19.701703 USB3 port 1: enabled 1
1738 14:51:19.704938 USB3 port 2: enabled 0
1739 14:51:19.705017 USB3 port 3: enabled 0
1740 14:51:19.707836 GENERIC: 0.0: enabled 1
1741 14:51:19.711358 GENERIC: 1.0: enabled 1
1742 14:51:19.714405 APIC: 01: enabled 1
1743 14:51:19.714485 APIC: 03: enabled 1
1744 14:51:19.717939 APIC: 07: enabled 1
1745 14:51:19.718019 APIC: 05: enabled 1
1746 14:51:19.721235 APIC: 04: enabled 1
1747 14:51:19.724531 APIC: 02: enabled 1
1748 14:51:19.724612 APIC: 06: enabled 1
1749 14:51:19.727931 PCI: 01:00.0: enabled 1
1750 14:51:19.734249 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1751 14:51:19.737956 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 14:51:19.741362 ELOG: NV offset 0xf30000 size 0x1000
1753 14:51:19.749066 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 14:51:19.755553 ELOG: Event(17) added with size 13 at 2023-05-03 14:51:19 UTC
1755 14:51:19.762086 ELOG: Event(92) added with size 9 at 2023-05-03 14:51:19 UTC
1756 14:51:19.768732 ELOG: Event(93) added with size 9 at 2023-05-03 14:51:19 UTC
1757 14:51:19.774916 ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:19 UTC
1758 14:51:19.781623 ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:19 UTC
1759 14:51:19.788426 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 14:51:19.795121 ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:19 UTC
1761 14:51:19.801790 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 14:51:19.808163 ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:19 UTC
1763 14:51:19.811062 elog_add_boot_reason: Logged dev mode boot
1764 14:51:19.818148 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1765 14:51:19.821080 Finalize devices...
1766 14:51:19.821157 Devices finalized
1767 14:51:19.828039 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 14:51:19.831342 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 14:51:19.837966 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 14:51:19.844202 ME: HFSTS1 : 0x80030055
1771 14:51:19.847398 ME: HFSTS2 : 0x30280116
1772 14:51:19.851287 ME: HFSTS3 : 0x00000050
1773 14:51:19.857341 ME: HFSTS4 : 0x00004000
1774 14:51:19.860683 ME: HFSTS5 : 0x00000000
1775 14:51:19.864017 ME: HFSTS6 : 0x40400006
1776 14:51:19.867168 ME: Manufacturing Mode : YES
1777 14:51:19.873745 ME: SPI Protection Mode Enabled : NO
1778 14:51:19.877074 ME: FW Partition Table : OK
1779 14:51:19.880363 ME: Bringup Loader Failure : NO
1780 14:51:19.883816 ME: Firmware Init Complete : NO
1781 14:51:19.887102 ME: Boot Options Present : NO
1782 14:51:19.890672 ME: Update In Progress : NO
1783 14:51:19.893722 ME: D0i3 Support : YES
1784 14:51:19.897137 ME: Low Power State Enabled : NO
1785 14:51:19.903628 ME: CPU Replaced : YES
1786 14:51:19.906612 ME: CPU Replacement Valid : YES
1787 14:51:19.910060 ME: Current Working State : 5
1788 14:51:19.913010 ME: Current Operation State : 1
1789 14:51:19.916497 ME: Current Operation Mode : 3
1790 14:51:19.919997 ME: Error Code : 0
1791 14:51:19.923975 ME: Enhanced Debug Mode : NO
1792 14:51:19.926292 ME: CPU Debug Disabled : YES
1793 14:51:19.933206 ME: TXT Support : NO
1794 14:51:19.936710 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 14:51:19.946561 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 14:51:19.949510 CBFS: 'fallback/slic' not found.
1797 14:51:19.952849 ACPI: Writing ACPI tables at 76b01000.
1798 14:51:19.952923 ACPI: * FACS
1799 14:51:19.956491 ACPI: * DSDT
1800 14:51:19.959354 Ramoops buffer: 0x100000@0x76a00000.
1801 14:51:19.966452 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 14:51:19.969402 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 14:51:19.972806 Google Chrome EC: version:
1804 14:51:19.976077 ro: voema_v2.0.10114-a447f03e46
1805 14:51:19.979267 rw: voema_v2.0.10114-a447f03e46
1806 14:51:19.982876 running image: 2
1807 14:51:19.989148 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 14:51:19.992602 ACPI: * FADT
1809 14:51:19.992683 SCI is IRQ9
1810 14:51:19.995580 ACPI: added table 1/32, length now 40
1811 14:51:19.999301 ACPI: * SSDT
1812 14:51:20.002308 Found 1 CPU(s) with 8 core(s) each.
1813 14:51:20.005277 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 14:51:20.011753 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 14:51:20.015286 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 14:51:20.018657 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 14:51:20.025599 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 14:51:20.032027 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 14:51:20.035039 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 14:51:20.041410 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 14:51:20.048410 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 14:51:20.051467 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 14:51:20.054877 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 14:51:20.061310 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 14:51:20.067913 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 14:51:20.071224 PS2K: Passing 80 keymaps to kernel
1827 14:51:20.077732 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 14:51:20.084082 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 14:51:20.091039 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 14:51:20.097737 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 14:51:20.103814 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 14:51:20.110782 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 14:51:20.117317 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 14:51:20.124020 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 14:51:20.126987 ACPI: added table 2/32, length now 44
1836 14:51:20.127104 ACPI: * MCFG
1837 14:51:20.130531 ACPI: added table 3/32, length now 48
1838 14:51:20.134102 ACPI: * TPM2
1839 14:51:20.137065 TPM2 log created at 0x769f0000
1840 14:51:20.140561 ACPI: added table 4/32, length now 52
1841 14:51:20.143674 ACPI: * MADT
1842 14:51:20.143755 SCI is IRQ9
1843 14:51:20.146731 ACPI: added table 5/32, length now 56
1844 14:51:20.150229 current = 76b09850
1845 14:51:20.150311 ACPI: * DMAR
1846 14:51:20.153660 ACPI: added table 6/32, length now 60
1847 14:51:20.160326 ACPI: added table 7/32, length now 64
1848 14:51:20.160408 ACPI: * HPET
1849 14:51:20.163609 ACPI: added table 8/32, length now 68
1850 14:51:20.166901 ACPI: done.
1851 14:51:20.166983 ACPI tables: 35216 bytes.
1852 14:51:20.170254 smbios_write_tables: 769ef000
1853 14:51:20.173463 EC returned error result code 3
1854 14:51:20.176762 Couldn't obtain OEM name from CBI
1855 14:51:20.179933 Create SMBIOS type 16
1856 14:51:20.183794 Create SMBIOS type 17
1857 14:51:20.186602 GENERIC: 0.0 (WIFI Device)
1858 14:51:20.190367 SMBIOS tables: 1734 bytes.
1859 14:51:20.193503 Writing table forward entry at 0x00000500
1860 14:51:20.200051 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 14:51:20.202983 Writing coreboot table at 0x76b25000
1862 14:51:20.209439 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 14:51:20.212866 1. 0000000000001000-000000000009ffff: RAM
1864 14:51:20.216376 2. 00000000000a0000-00000000000fffff: RESERVED
1865 14:51:20.222917 3. 0000000000100000-00000000769eefff: RAM
1866 14:51:20.229269 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 14:51:20.232755 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 14:51:20.239644 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 14:51:20.242973 7. 0000000077000000-000000007fbfffff: RESERVED
1870 14:51:20.249472 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 14:51:20.252757 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 14:51:20.259373 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 14:51:20.262492 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 14:51:20.265787 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 14:51:20.272504 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 14:51:20.275649 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 14:51:20.282638 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 14:51:20.285961 16. 0000000100000000-00000004803fffff: RAM
1879 14:51:20.289167 Passing 4 GPIOs to payload:
1880 14:51:20.295759 NAME | PORT | POLARITY | VALUE
1881 14:51:20.298997 lid | undefined | high | high
1882 14:51:20.306000 power | undefined | high | low
1883 14:51:20.308611 oprom | undefined | high | low
1884 14:51:20.315603 EC in RW | 0x000000e5 | high | high
1885 14:51:20.322048 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1886 14:51:20.325530 coreboot table: 1576 bytes.
1887 14:51:20.328646 IMD ROOT 0. 0x76fff000 0x00001000
1888 14:51:20.331662 IMD SMALL 1. 0x76ffe000 0x00001000
1889 14:51:20.335102 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 14:51:20.338380 VPD 3. 0x76c4d000 0x00000367
1891 14:51:20.341833 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 14:51:20.348410 CONSOLE 5. 0x76c2c000 0x00020000
1893 14:51:20.351621 FMAP 6. 0x76c2b000 0x00000578
1894 14:51:20.355186 TIME STAMP 7. 0x76c2a000 0x00000910
1895 14:51:20.358538 VBOOT WORK 8. 0x76c16000 0x00014000
1896 14:51:20.361417 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 14:51:20.365049 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 14:51:20.368172 RAMSTAGE 11. 0x76b97000 0x00073000
1899 14:51:20.371888 REFCODE 12. 0x76b42000 0x00055000
1900 14:51:20.378260 SMM BACKUP 13. 0x76b32000 0x00010000
1901 14:51:20.381352 4f444749 14. 0x76b30000 0x00002000
1902 14:51:20.384428 EXT VBT15. 0x76b2d000 0x0000219f
1903 14:51:20.388339 COREBOOT 16. 0x76b25000 0x00008000
1904 14:51:20.391232 ACPI 17. 0x76b01000 0x00024000
1905 14:51:20.394639 ACPI GNVS 18. 0x76b00000 0x00001000
1906 14:51:20.397964 RAMOOPS 19. 0x76a00000 0x00100000
1907 14:51:20.400932 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 14:51:20.404352 SMBIOS 21. 0x769ef000 0x00000800
1909 14:51:20.407845 IMD small region:
1910 14:51:20.411243 IMD ROOT 0. 0x76ffec00 0x00000400
1911 14:51:20.414416 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 14:51:20.420832 POWER STATE 2. 0x76ffeb80 0x00000044
1913 14:51:20.424434 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 14:51:20.427364 MEM INFO 4. 0x76ffe980 0x000001e0
1915 14:51:20.434606 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1916 14:51:20.437248 MTRR: Physical address space:
1917 14:51:20.443966 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 14:51:20.447244 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 14:51:20.453645 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 14:51:20.460244 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 14:51:20.467166 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 14:51:20.473642 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 14:51:20.480462 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 14:51:20.483828 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 14:51:20.486862 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 14:51:20.493691 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 14:51:20.496857 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 14:51:20.500232 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 14:51:20.503729 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 14:51:20.510076 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 14:51:20.513337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 14:51:20.516470 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 14:51:20.519785 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 14:51:20.526639 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 14:51:20.530089 call enable_fixed_mtrr()
1936 14:51:20.533437 CPU physical address size: 39 bits
1937 14:51:20.536283 MTRR: default type WB/UC MTRR counts: 6/7.
1938 14:51:20.539901 MTRR: WB selected as default type.
1939 14:51:20.546280 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 14:51:20.553039 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 14:51:20.559751 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 14:51:20.566017 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 14:51:20.572787 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 14:51:20.579630 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 14:51:20.585983 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 14:51:20.589584 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 14:51:20.592624 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 14:51:20.595629 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 14:51:20.602539 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 14:51:20.605684 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 14:51:20.609174 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 14:51:20.612298 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 14:51:20.619205 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 14:51:20.622627 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 14:51:20.625334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 14:51:20.625418
1957 14:51:20.629293 MTRR check
1958 14:51:20.632407 call enable_fixed_mtrr()
1959 14:51:20.632486 Fixed MTRRs : Enabled
1960 14:51:20.636011 Variable MTRRs: Enabled
1961 14:51:20.636107
1962 14:51:20.638968 CPU physical address size: 39 bits
1963 14:51:20.642731 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 14:51:20.648929 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 14:51:20.652389 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 14:51:20.655901 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 14:51:20.659232 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 14:51:20.665758 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 14:51:20.669070 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 14:51:20.672601 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 14:51:20.675636 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 14:51:20.682105 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 14:51:20.685901 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 14:51:20.689020 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 14:51:20.695946 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 14:51:20.696027 call enable_fixed_mtrr()
1977 14:51:20.702359 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 14:51:20.705722 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 14:51:20.708944 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 14:51:20.712633 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 14:51:20.718910 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 14:51:20.722409 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 14:51:20.725943 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 14:51:20.729152 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 14:51:20.735569 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 14:51:20.738834 CPU physical address size: 39 bits
1987 14:51:20.743001 call enable_fixed_mtrr()
1988 14:51:20.746603 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 14:51:20.753037 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 14:51:20.756060 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 14:51:20.759419 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 14:51:20.763124 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 14:51:20.769613 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 14:51:20.773084 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 14:51:20.775852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 14:51:20.779597 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 14:51:20.785945 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 14:51:20.789568 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 14:51:20.792716 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 14:51:20.799710 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 14:51:20.803226 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 14:51:20.806600 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 14:51:20.810036 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 14:51:20.816202 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 14:51:20.819487 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 14:51:20.823106 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 14:51:20.826324 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 14:51:20.832994 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 14:51:20.836507 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 14:51:20.839873 call enable_fixed_mtrr()
2011 14:51:20.842934 call enable_fixed_mtrr()
2012 14:51:20.846136 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 14:51:20.849821 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 14:51:20.856169 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 14:51:20.859304 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 14:51:20.862710 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 14:51:20.866053 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 14:51:20.872675 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 14:51:20.876198 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 14:51:20.879050 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 14:51:20.882386 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 14:51:20.885927 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 14:51:20.892477 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 14:51:20.898826 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 14:51:20.898915 call enable_fixed_mtrr()
2026 14:51:20.905688 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 14:51:20.909153 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 14:51:20.912551 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 14:51:20.915681 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 14:51:20.918995 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 14:51:20.925529 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 14:51:20.928951 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 14:51:20.931726 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 14:51:20.935159 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 14:51:20.941507 CPU physical address size: 39 bits
2036 14:51:20.945927 call enable_fixed_mtrr()
2037 14:51:20.949170 CPU physical address size: 39 bits
2038 14:51:20.957159 CPU physical address size: 39 bits
2039 14:51:20.960460 CPU physical address size: 39 bits
2040 14:51:20.963413 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2041 14:51:20.966910 CPU physical address size: 39 bits
2042 14:51:20.974002 Checking cr50 for pending updates
2043 14:51:20.978781 Reading cr50 TPM mode
2044 14:51:20.989570 BS: BS_PAYLOAD_LOAD entry times (exec / console): 13 / 6 ms
2045 14:51:20.998992 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2046 14:51:21.002400 Checking segment from ROM address 0xffc02b38
2047 14:51:21.005935 Checking segment from ROM address 0xffc02b54
2048 14:51:21.012454 Loading segment from ROM address 0xffc02b38
2049 14:51:21.012533 code (compression=0)
2050 14:51:21.022337 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 14:51:21.031712 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 14:51:21.031798 it's not compressed!
2053 14:51:21.172596 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 14:51:21.179555 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 14:51:21.186565 Loading segment from ROM address 0xffc02b54
2056 14:51:21.189314 Entry Point 0x30000000
2057 14:51:21.189406 Loaded segments
2058 14:51:21.196441 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2059 14:51:21.241068 Finalizing chipset.
2060 14:51:21.244271 Finalizing SMM.
2061 14:51:21.244358 APMC done.
2062 14:51:21.250958 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 14:51:21.254589 mp_park_aps done after 0 msecs.
2064 14:51:21.257460 Jumping to boot code at 0x30000000(0x76b25000)
2065 14:51:21.267603 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 14:51:21.267708
2067 14:51:21.270621
2068 14:51:21.270705
2069 14:51:21.271112 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2070 14:51:21.271226 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2071 14:51:21.271319 Setting prompt string to ['volteer:']
2072 14:51:21.271417 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2073 14:51:21.273880 Starting depthcharge on Voema...
2074 14:51:21.273965
2075 14:51:21.281203 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 14:51:21.281303
2077 14:51:21.287376 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 14:51:21.287463
2079 14:51:21.293824 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 14:51:21.293909
2081 14:51:21.297333 Failed to find eMMC card reader
2082 14:51:21.297418
2083 14:51:21.300316 Wipe memory regions:
2084 14:51:21.300397
2085 14:51:21.303823 [0x00000000001000, 0x000000000a0000)
2086 14:51:21.303905
2087 14:51:21.307610 [0x00000000100000, 0x00000030000000)
2088 14:51:21.341734
2089 14:51:21.344614 [0x00000032662db0, 0x000000769ef000)
2090 14:51:21.392487
2091 14:51:21.396186 [0x00000100000000, 0x00000480400000)
2092 14:51:22.040651
2093 14:51:22.043578 ec_init: CrosEC protocol v3 supported (256, 256)
2094 14:51:22.474770
2095 14:51:22.475312 R8152: Initializing
2096 14:51:22.475661
2097 14:51:22.478014 Version 6 (ocp_data = 5c30)
2098 14:51:22.478506
2099 14:51:22.481462 R8152: Done initializing
2100 14:51:22.481962
2101 14:51:22.484458 Adding net device
2102 14:51:22.786287
2103 14:51:22.789401 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 14:51:22.789838
2105 14:51:22.790174
2106 14:51:22.790491
2107 14:51:22.792826 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 14:51:22.894047 volteer: tftpboot 192.168.201.1 10185555/tftp-deploy-ohqbm8uk/kernel/bzImage 10185555/tftp-deploy-ohqbm8uk/kernel/cmdline 10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
2110 14:51:22.894607 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 14:51:22.895027 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 14:51:22.899545 tftpboot 192.168.201.1 10185555/tftp-deploy-ohqbm8uk/kernel/bzIploy-ohqbm8uk/kernel/cmdline 10185555/tftp-deploy-ohqbm8uk/ramdisk/ramdisk.cpio.gz
2113 14:51:22.900150
2114 14:51:22.900730 Waiting for link
2115 14:51:23.103124
2116 14:51:23.103620 done.
2117 14:51:23.103964
2118 14:51:23.104278 MAC: 00:24:32:30:7d:ab
2119 14:51:23.104580
2120 14:51:23.105884 Sending DHCP discover... done.
2121 14:51:23.106306
2122 14:51:23.109545 Waiting for reply... done.
2123 14:51:23.109963
2124 14:51:23.112923 Sending DHCP request... done.
2125 14:51:23.113346
2126 14:51:23.115872 Waiting for reply... done.
2127 14:51:23.116293
2128 14:51:23.119547 My ip is 192.168.201.20
2129 14:51:23.120015
2130 14:51:23.122252 The DHCP server ip is 192.168.201.1
2131 14:51:23.122630
2132 14:51:23.125563 TFTP server IP predefined by user: 192.168.201.1
2133 14:51:23.125978
2134 14:51:23.132520 Bootfile predefined by user: 10185555/tftp-deploy-ohqbm8uk/kernel/bzImage
2135 14:51:23.135419
2136 14:51:23.139178 Sending tftp read request... done.
2137 14:51:23.139633
2138 14:51:23.145348 Waiting for the transfer...
2139 14:51:23.145766
2140 14:51:23.757382 00000000 ################################################################
2141 14:51:23.757547
2142 14:51:24.335805 00080000 ################################################################
2143 14:51:24.335940
2144 14:51:24.898648 00100000 ################################################################
2145 14:51:24.898786
2146 14:51:25.497553 00180000 ################################################################
2147 14:51:25.497680
2148 14:51:26.067756 00200000 ################################################################
2149 14:51:26.067886
2150 14:51:26.651772 00280000 ################################################################
2151 14:51:26.652356
2152 14:51:27.255301 00300000 ################################################################
2153 14:51:27.255477
2154 14:51:27.809927 00380000 ################################################################
2155 14:51:27.810080
2156 14:51:28.395399 00400000 ################################################################
2157 14:51:28.395549
2158 14:51:28.991006 00480000 ################################################################
2159 14:51:28.991199
2160 14:51:29.580553 00500000 ################################################################
2161 14:51:29.580699
2162 14:51:30.159962 00580000 ################################################################
2163 14:51:30.160123
2164 14:51:30.719951 00600000 ################################################################
2165 14:51:30.720095
2166 14:51:31.278267 00680000 ################################################################
2167 14:51:31.278439
2168 14:51:31.840450 00700000 ################################################################
2169 14:51:31.840597
2170 14:51:31.854745 00780000 ## done.
2171 14:51:31.854832
2172 14:51:31.858357 The bootfile was 7876496 bytes long.
2173 14:51:31.858442
2174 14:51:31.861251 Sending tftp read request... done.
2175 14:51:31.861334
2176 14:51:31.864688 Waiting for the transfer...
2177 14:51:31.864770
2178 14:51:32.431365 00000000 ################################################################
2179 14:51:32.431517
2180 14:51:33.034959 00080000 ################################################################
2181 14:51:33.035534
2182 14:51:33.692459 00100000 ################################################################
2183 14:51:33.693243
2184 14:51:34.317126 00180000 ################################################################
2185 14:51:34.317264
2186 14:51:34.909476 00200000 ################################################################
2187 14:51:34.909619
2188 14:51:35.494340 00280000 ################################################################
2189 14:51:35.494486
2190 14:51:36.072097 00300000 ################################################################
2191 14:51:36.072250
2192 14:51:36.670634 00380000 ################################################################
2193 14:51:36.671159
2194 14:51:37.359484 00400000 ################################################################
2195 14:51:37.359691
2196 14:51:38.022820 00480000 ################################################################
2197 14:51:38.023424
2198 14:51:38.723834 00500000 ################################################################
2199 14:51:38.724341
2200 14:51:39.408704 00580000 ################################################################
2201 14:51:39.408889
2202 14:51:40.100048 00600000 ################################################################
2203 14:51:40.100559
2204 14:51:40.795053 00680000 ################################################################
2205 14:51:40.795623
2206 14:51:41.486282 00700000 ################################################################
2207 14:51:41.486837
2208 14:51:42.189882 00780000 ################################################################
2209 14:51:42.190456
2210 14:51:42.907357 00800000 ################################################################
2211 14:51:42.907906
2212 14:51:43.602881 00880000 ################################################################
2213 14:51:43.603461
2214 14:51:44.310544 00900000 ################################################################
2215 14:51:44.311188
2216 14:51:45.017802 00980000 ################################################################
2217 14:51:45.018377
2218 14:51:45.736740 00a00000 ################################################################
2219 14:51:45.737327
2220 14:51:46.447851 00a80000 ################################################################
2221 14:51:46.448371
2222 14:51:47.152565 00b00000 ################################################################
2223 14:51:47.153081
2224 14:51:47.845170 00b80000 ################################################################
2225 14:51:47.845722
2226 14:51:48.542512 00c00000 ################################################################
2227 14:51:48.543097
2228 14:51:49.239945 00c80000 ################################################################
2229 14:51:49.240451
2230 14:51:49.937365 00d00000 ################################################################
2231 14:51:49.938003
2232 14:51:50.624287 00d80000 ################################################################
2233 14:51:50.624799
2234 14:51:51.320718 00e00000 ################################################################
2235 14:51:51.321285
2236 14:51:51.993123 00e80000 ################################################################
2237 14:51:51.993655
2238 14:51:52.663637 00f00000 ################################################################
2239 14:51:52.664165
2240 14:51:53.358239 00f80000 ################################################################
2241 14:51:53.358751
2242 14:51:54.040837 01000000 ################################################################
2243 14:51:54.041505
2244 14:51:54.736204 01080000 ################################################################
2245 14:51:54.736711
2246 14:51:55.433670 01100000 ################################################################
2247 14:51:55.434211
2248 14:51:56.121432 01180000 ################################################################
2249 14:51:56.121987
2250 14:51:56.824505 01200000 ################################################################
2251 14:51:56.825014
2252 14:51:57.510207 01280000 ################################################################
2253 14:51:57.510746
2254 14:51:58.181007 01300000 ################################################################
2255 14:51:58.181418
2256 14:51:58.849231 01380000 ################################################################
2257 14:51:58.849840
2258 14:51:59.532328 01400000 ################################################################
2259 14:51:59.532909
2260 14:52:00.200418 01480000 ################################################################
2261 14:52:00.200988
2262 14:52:00.876981 01500000 ################################################################
2263 14:52:00.877577
2264 14:52:01.589295 01580000 ################################################################
2265 14:52:01.589790
2266 14:52:02.264028 01600000 ################################################################
2267 14:52:02.264553
2268 14:52:02.930075 01680000 ################################################################
2269 14:52:02.930644
2270 14:52:03.604844 01700000 ################################################################
2271 14:52:03.605354
2272 14:52:04.280640 01780000 ################################################################
2273 14:52:04.281149
2274 14:52:04.983197 01800000 ################################################################
2275 14:52:04.983706
2276 14:52:05.685193 01880000 ################################################################
2277 14:52:05.685719
2278 14:52:06.388867 01900000 ################################################################
2279 14:52:06.389399
2280 14:52:07.068182 01980000 ################################################################
2281 14:52:07.068755
2282 14:52:07.770643 01a00000 ################################################################
2283 14:52:07.771265
2284 14:52:08.444911 01a80000 ################################################################
2285 14:52:08.445561
2286 14:52:09.140874 01b00000 ################################################################
2287 14:52:09.141432
2288 14:52:09.808658 01b80000 ################################################################
2289 14:52:09.808814
2290 14:52:10.449529 01c00000 ################################################################
2291 14:52:10.450302
2292 14:52:11.178875 01c80000 ################################################################
2293 14:52:11.179509
2294 14:52:11.874207 01d00000 ################################################################
2295 14:52:11.874740
2296 14:52:12.567370 01d80000 ################################################################
2297 14:52:12.568044
2298 14:52:13.246338 01e00000 ################################################################
2299 14:52:13.246866
2300 14:52:13.940891 01e80000 ################################################################
2301 14:52:13.941468
2302 14:52:14.664057 01f00000 ################################################################
2303 14:52:14.664695
2304 14:52:15.389525 01f80000 ################################################################
2305 14:52:15.390120
2306 14:52:16.107154 02000000 ################################################################
2307 14:52:16.107742
2308 14:52:16.819478 02080000 ################################################################
2309 14:52:16.820105
2310 14:52:17.540121 02100000 ################################################################
2311 14:52:17.540725
2312 14:52:18.258783 02180000 ################################################################
2313 14:52:18.259485
2314 14:52:18.822492 02200000 #################################################### done.
2315 14:52:18.823011
2316 14:52:18.825970 Sending tftp read request... done.
2317 14:52:18.826385
2318 14:52:18.829218 Waiting for the transfer...
2319 14:52:18.829730
2320 14:52:18.832855 00000000 # done.
2321 14:52:18.833279
2322 14:52:18.839301 Command line loaded dynamically from TFTP file: 10185555/tftp-deploy-ohqbm8uk/kernel/cmdline
2323 14:52:18.839820
2324 14:52:18.851954 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2325 14:52:18.860183
2326 14:52:18.863369 Shutting down all USB controllers.
2327 14:52:18.863829
2328 14:52:18.864198 Removing current net device
2329 14:52:18.864542
2330 14:52:18.866137 Finalizing coreboot
2331 14:52:18.866596
2332 14:52:18.872675 Exiting depthcharge with code 4 at timestamp: 66180361
2333 14:52:18.873094
2334 14:52:18.873428
2335 14:52:18.873741 Starting kernel ...
2336 14:52:18.874042
2337 14:52:18.874329
2338 14:52:18.875694 end: 2.2.4 bootloader-commands (duration 00:00:58) [common]
2339 14:52:18.876163 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
2340 14:52:18.876523 Setting prompt string to ['Linux version [0-9]']
2341 14:52:18.876857 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2342 14:52:18.877202 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2344 14:56:05.876480 end: 2.2.5 auto-login-action (duration 00:03:47) [common]
2346 14:56:05.876679 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 227 seconds'
2348 14:56:05.876829 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2351 14:56:05.877112 end: 2 depthcharge-action (duration 00:05:00) [common]
2353 14:56:05.877322 Cleaning after the job
2354 14:56:05.877410 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/ramdisk
2355 14:56:05.881349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/kernel
2356 14:56:05.882305 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185555/tftp-deploy-ohqbm8uk/modules
2357 14:56:05.882623 start: 4.1 power-off (timeout 00:00:30) [common]
2358 14:56:05.882780 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2359 14:56:05.960327 >> Command sent successfully.
2360 14:56:05.964378 Returned 0 in 0 seconds
2361 14:56:06.065216 end: 4.1 power-off (duration 00:00:00) [common]
2363 14:56:06.066713 start: 4.2 read-feedback (timeout 00:10:00) [common]
2364 14:56:06.067928 Listened to connection for namespace 'common' for up to 1s
2365 14:56:07.068544 Finalising connection for namespace 'common'
2366 14:56:07.068730 Disconnecting from shell: Finalise
2367 14:56:07.068805
2368 14:56:07.169542 end: 4.2 read-feedback (duration 00:00:01) [common]
2369 14:56:07.170173 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185555
2370 14:56:07.245334 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185555
2371 14:56:07.245533 JobError: Your job cannot terminate cleanly.