Boot log: asus-cx9400-volteer

    1 14:50:58.531037  lava-dispatcher, installed at version: 2023.03
    2 14:50:58.531253  start: 0 validate
    3 14:50:58.531376  Start time: 2023-05-03 14:50:58.531368+00:00 (UTC)
    4 14:50:58.531496  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:50:58.531625  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:50:58.823857  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:50:58.824075  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:50:59.117095  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:50:59.117885  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:50:59.412549  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:50:59.413592  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:50:59.425783  validate duration: 0.89
   14 14:50:59.426108  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:50:59.426258  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:50:59.426401  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:50:59.426557  Not decompressing ramdisk as can be used compressed.
   18 14:50:59.426677  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230421.0/amd64/initrd.cpio.gz
   19 14:50:59.426773  saving as /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/ramdisk/initrd.cpio.gz
   20 14:50:59.426862  total size: 6136225 (5MB)
   21 14:50:59.429581  progress   0% (0MB)
   22 14:50:59.431378  progress   5% (0MB)
   23 14:50:59.433103  progress  10% (0MB)
   24 14:50:59.434795  progress  15% (0MB)
   25 14:50:59.436391  progress  20% (1MB)
   26 14:50:59.438122  progress  25% (1MB)
   27 14:50:59.440125  progress  30% (1MB)
   28 14:50:59.441808  progress  35% (2MB)
   29 14:50:59.443516  progress  40% (2MB)
   30 14:50:59.445436  progress  45% (2MB)
   31 14:50:59.447159  progress  50% (2MB)
   32 14:50:59.448875  progress  55% (3MB)
   33 14:50:59.450771  progress  60% (3MB)
   34 14:50:59.452572  progress  65% (3MB)
   35 14:50:59.454440  progress  70% (4MB)
   36 14:50:59.456163  progress  75% (4MB)
   37 14:50:59.457858  progress  80% (4MB)
   38 14:50:59.459705  progress  85% (5MB)
   39 14:50:59.461447  progress  90% (5MB)
   40 14:50:59.463125  progress  95% (5MB)
   41 14:50:59.465042  progress 100% (5MB)
   42 14:50:59.465210  5MB downloaded in 0.04s (152.62MB/s)
   43 14:50:59.465416  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 14:50:59.465804  end: 1.1 download-retry (duration 00:00:00) [common]
   46 14:50:59.465934  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 14:50:59.466051  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 14:50:59.466210  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 14:50:59.466324  saving as /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/kernel/bzImage
   50 14:50:59.466444  total size: 7876496 (7MB)
   51 14:50:59.466535  No compression specified
   52 14:50:59.468195  progress   0% (0MB)
   53 14:50:59.470554  progress   5% (0MB)
   54 14:50:59.472791  progress  10% (0MB)
   55 14:50:59.475053  progress  15% (1MB)
   56 14:50:59.477250  progress  20% (1MB)
   57 14:50:59.479417  progress  25% (1MB)
   58 14:50:59.481555  progress  30% (2MB)
   59 14:50:59.483733  progress  35% (2MB)
   60 14:50:59.485828  progress  40% (3MB)
   61 14:50:59.487925  progress  45% (3MB)
   62 14:50:59.490092  progress  50% (3MB)
   63 14:50:59.492174  progress  55% (4MB)
   64 14:50:59.494212  progress  60% (4MB)
   65 14:50:59.496309  progress  65% (4MB)
   66 14:50:59.498375  progress  70% (5MB)
   67 14:50:59.500491  progress  75% (5MB)
   68 14:50:59.502536  progress  80% (6MB)
   69 14:50:59.504660  progress  85% (6MB)
   70 14:50:59.506713  progress  90% (6MB)
   71 14:50:59.508756  progress  95% (7MB)
   72 14:50:59.510803  progress 100% (7MB)
   73 14:50:59.510950  7MB downloaded in 0.04s (168.79MB/s)
   74 14:50:59.511085  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 14:50:59.511307  end: 1.2 download-retry (duration 00:00:00) [common]
   77 14:50:59.511391  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 14:50:59.511473  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 14:50:59.511607  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230421.0/amd64/full.rootfs.tar.xz
   80 14:50:59.511674  saving as /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/nfsrootfs/full.rootfs.tar
   81 14:50:59.511734  total size: 202700224 (193MB)
   82 14:50:59.511793  Using unxz to decompress xz
   83 14:50:59.516287  progress   0% (0MB)
   84 14:51:00.098004  progress   5% (9MB)
   85 14:51:00.634891  progress  10% (19MB)
   86 14:51:01.226001  progress  15% (29MB)
   87 14:51:01.505312  progress  20% (38MB)
   88 14:51:02.040024  progress  25% (48MB)
   89 14:51:02.605151  progress  30% (58MB)
   90 14:51:03.168184  progress  35% (67MB)
   91 14:51:03.714808  progress  40% (77MB)
   92 14:51:04.292191  progress  45% (87MB)
   93 14:51:04.906035  progress  50% (96MB)
   94 14:51:05.528064  progress  55% (106MB)
   95 14:51:06.236511  progress  60% (116MB)
   96 14:51:06.654655  progress  65% (125MB)
   97 14:51:06.748619  progress  70% (135MB)
   98 14:51:06.893975  progress  75% (145MB)
   99 14:51:06.984445  progress  80% (154MB)
  100 14:51:07.040272  progress  85% (164MB)
  101 14:51:07.134104  progress  90% (174MB)
  102 14:51:07.498539  progress  95% (183MB)
  103 14:51:08.098129  progress 100% (193MB)
  104 14:51:08.104719  193MB downloaded in 8.59s (22.50MB/s)
  105 14:51:08.105007  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 14:51:08.105279  end: 1.3 download-retry (duration 00:00:09) [common]
  108 14:51:08.105372  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 14:51:08.105473  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 14:51:08.105628  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 14:51:08.105703  saving as /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/modules/modules.tar
  112 14:51:08.105765  total size: 251268 (0MB)
  113 14:51:08.105829  Using unxz to decompress xz
  114 14:51:08.109406  progress  13% (0MB)
  115 14:51:08.109810  progress  26% (0MB)
  116 14:51:08.110046  progress  39% (0MB)
  117 14:51:08.111508  progress  52% (0MB)
  118 14:51:08.113549  progress  65% (0MB)
  119 14:51:08.115474  progress  78% (0MB)
  120 14:51:08.117416  progress  91% (0MB)
  121 14:51:08.119440  progress 100% (0MB)
  122 14:51:08.125637  0MB downloaded in 0.02s (12.06MB/s)
  123 14:51:08.125898  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 14:51:08.126173  end: 1.4 download-retry (duration 00:00:00) [common]
  126 14:51:08.126270  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  127 14:51:08.126376  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  128 14:51:11.674566  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185582/extract-nfsrootfs-j9lcdjon
  129 14:51:11.674770  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  130 14:51:11.674870  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  131 14:51:11.675040  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13
  132 14:51:11.675164  makedir: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin
  133 14:51:11.675263  makedir: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/tests
  134 14:51:11.675357  makedir: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/results
  135 14:51:11.675458  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-add-keys
  136 14:51:11.675601  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-add-sources
  137 14:51:11.675725  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-background-process-start
  138 14:51:11.675849  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-background-process-stop
  139 14:51:11.676167  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-common-functions
  140 14:51:11.676295  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-echo-ipv4
  141 14:51:11.676418  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-install-packages
  142 14:51:11.676538  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-installed-packages
  143 14:51:11.676657  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-os-build
  144 14:51:11.676777  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-probe-channel
  145 14:51:11.676897  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-probe-ip
  146 14:51:11.677016  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-target-ip
  147 14:51:11.677135  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-target-mac
  148 14:51:11.677253  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-target-storage
  149 14:51:11.677373  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-case
  150 14:51:11.677495  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-event
  151 14:51:11.677613  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-feedback
  152 14:51:11.677731  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-raise
  153 14:51:11.677849  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-reference
  154 14:51:11.677968  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-runner
  155 14:51:11.678086  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-set
  156 14:51:11.678207  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-test-shell
  157 14:51:11.678328  Updating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-add-keys (debian)
  158 14:51:11.678475  Updating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-add-sources (debian)
  159 14:51:11.678611  Updating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-install-packages (debian)
  160 14:51:11.678745  Updating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-installed-packages (debian)
  161 14:51:11.678878  Updating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/bin/lava-os-build (debian)
  162 14:51:11.678993  Creating /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/environment
  163 14:51:11.679087  LAVA metadata
  164 14:51:11.679156  - LAVA_JOB_ID=10185582
  165 14:51:11.679219  - LAVA_DISPATCHER_IP=192.168.201.1
  166 14:51:11.679321  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  167 14:51:11.679388  skipped lava-vland-overlay
  168 14:51:11.679462  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  169 14:51:11.679542  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  170 14:51:11.679603  skipped lava-multinode-overlay
  171 14:51:11.679675  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  172 14:51:11.679768  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  173 14:51:11.679841  Loading test definitions
  174 14:51:11.679931  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  175 14:51:11.680007  Using /lava-10185582 at stage 0
  176 14:51:11.680275  uuid=10185582_1.5.2.3.1 testdef=None
  177 14:51:11.680362  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  178 14:51:11.680446  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  179 14:51:11.680884  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  181 14:51:11.681104  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  182 14:51:11.681649  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  184 14:51:11.681883  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  185 14:51:11.682412  runner path: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/0/tests/0_timesync-off test_uuid 10185582_1.5.2.3.1
  186 14:51:11.682562  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  188 14:51:11.682785  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  189 14:51:11.682857  Using /lava-10185582 at stage 0
  190 14:51:11.682953  Fetching tests from https://github.com/kernelci/test-definitions.git
  191 14:51:11.683028  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/0/tests/1_kselftest-alsa'
  192 14:51:19.883419  Running '/usr/bin/git checkout kernelci.org
  193 14:51:20.032233  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  194 14:51:20.033020  uuid=10185582_1.5.2.3.5 testdef=None
  195 14:51:20.033209  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  197 14:51:20.033510  start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
  198 14:51:20.034473  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  200 14:51:20.034762  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
  201 14:51:20.035742  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  203 14:51:20.036006  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
  204 14:51:20.037217  runner path: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/0/tests/1_kselftest-alsa test_uuid 10185582_1.5.2.3.5
  205 14:51:20.037327  BOARD='asus-cx9400-volteer'
  206 14:51:20.037423  BRANCH='cip'
  207 14:51:20.037498  SKIPFILE='/dev/null'
  208 14:51:20.037587  SKIP_INSTALL='True'
  209 14:51:20.037659  TESTPROG_URL='None'
  210 14:51:20.037744  TST_CASENAME=''
  211 14:51:20.037799  TST_CMDFILES='alsa'
  212 14:51:20.037937  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  214 14:51:20.038147  Creating lava-test-runner.conf files
  215 14:51:20.038212  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185582/lava-overlay-us8i3m13/lava-10185582/0 for stage 0
  216 14:51:20.038306  - 0_timesync-off
  217 14:51:20.038376  - 1_kselftest-alsa
  218 14:51:20.038498  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  219 14:51:20.038586  start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
  220 14:51:27.697213  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  221 14:51:27.697369  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
  222 14:51:27.697458  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  223 14:51:27.697556  end: 1.5.2 lava-overlay (duration 00:00:16) [common]
  224 14:51:27.697644  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
  225 14:51:27.851995  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  226 14:51:27.852379  start: 1.5.4 extract-modules (timeout 00:09:32) [common]
  227 14:51:27.852494  extracting modules file /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185582/extract-nfsrootfs-j9lcdjon
  228 14:51:27.864903  extracting modules file /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185582/extract-overlay-ramdisk-osws8xhh/ramdisk
  229 14:51:27.877215  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  230 14:51:27.877347  start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
  231 14:51:27.877435  [common] Applying overlay to NFS
  232 14:51:27.877505  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185582/compress-overlay-2lvx98ih/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185582/extract-nfsrootfs-j9lcdjon
  233 14:51:28.766758  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  234 14:51:28.766920  start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
  235 14:51:28.767013  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  236 14:51:28.767103  start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
  237 14:51:28.767185  Building ramdisk /var/lib/lava/dispatcher/tmp/10185582/extract-overlay-ramdisk-osws8xhh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185582/extract-overlay-ramdisk-osws8xhh/ramdisk
  238 14:51:28.844544  >> 30664 blocks

  239 14:51:29.471305  rename /var/lib/lava/dispatcher/tmp/10185582/extract-overlay-ramdisk-osws8xhh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz
  240 14:51:29.471730  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  241 14:51:29.471854  start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
  242 14:51:29.471962  start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
  243 14:51:29.472061  No mkimage arch provided, not using FIT.
  244 14:51:29.472152  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  245 14:51:29.472231  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  246 14:51:29.472335  end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
  247 14:51:29.472424  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
  248 14:51:29.472504  No LXC device requested
  249 14:51:29.472585  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  250 14:51:29.472679  start: 1.7 deploy-device-env (timeout 00:09:30) [common]
  251 14:51:29.472756  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  252 14:51:29.472823  Checking files for TFTP limit of 4294967296 bytes.
  253 14:51:29.473216  end: 1 tftp-deploy (duration 00:00:30) [common]
  254 14:51:29.473323  start: 2 depthcharge-action (timeout 00:05:00) [common]
  255 14:51:29.473412  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  256 14:51:29.473533  substitutions:
  257 14:51:29.473600  - {DTB}: None
  258 14:51:29.473662  - {INITRD}: 10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz
  259 14:51:29.473721  - {KERNEL}: 10185582/tftp-deploy-secwsgk8/kernel/bzImage
  260 14:51:29.473779  - {LAVA_MAC}: None
  261 14:51:29.473836  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185582/extract-nfsrootfs-j9lcdjon
  262 14:51:29.473894  - {NFS_SERVER_IP}: 192.168.201.1
  263 14:51:29.473948  - {PRESEED_CONFIG}: None
  264 14:51:29.474002  - {PRESEED_LOCAL}: None
  265 14:51:29.474055  - {RAMDISK}: 10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz
  266 14:51:29.474108  - {ROOT_PART}: None
  267 14:51:29.474161  - {ROOT}: None
  268 14:51:29.474214  - {SERVER_IP}: 192.168.201.1
  269 14:51:29.474267  - {TEE}: None
  270 14:51:29.474319  Parsed boot commands:
  271 14:51:29.474371  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  272 14:51:29.474543  Parsed boot commands: tftpboot 192.168.201.1 10185582/tftp-deploy-secwsgk8/kernel/bzImage 10185582/tftp-deploy-secwsgk8/kernel/cmdline 10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz
  273 14:51:29.474633  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  274 14:51:29.474718  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  275 14:51:29.474806  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  276 14:51:29.474892  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  277 14:51:29.474959  Not connected, no need to disconnect.
  278 14:51:29.475032  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  279 14:51:29.475111  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  280 14:51:29.475179  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
  281 14:51:29.478711  Setting prompt string to ['lava-test: # ']
  282 14:51:29.479049  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  283 14:51:29.479154  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  284 14:51:29.479288  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  285 14:51:29.479377  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  286 14:51:29.479562  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
  287 14:51:34.631059  >> Command sent successfully.

  288 14:51:34.641205  Returned 0 in 5 seconds
  289 14:51:34.742461  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  291 14:51:34.744130  end: 2.2.2 reset-device (duration 00:00:05) [common]
  292 14:51:34.744781  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  293 14:51:34.745439  Setting prompt string to 'Starting depthcharge on Voema...'
  294 14:51:34.746021  Changing prompt to 'Starting depthcharge on Voema...'
  295 14:51:34.746541  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  296 14:51:34.747715  [Enter `^Ec?' for help]

  297 14:51:36.332123  

  298 14:51:36.332278  

  299 14:51:36.342115  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  300 14:51:36.345423  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  301 14:51:36.352055  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  302 14:51:36.355414  CPU: AES supported, TXT NOT supported, VT supported

  303 14:51:36.361977  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  304 14:51:36.368508  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  305 14:51:36.371658  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  306 14:51:36.375749  VBOOT: Loading verstage.

  307 14:51:36.378879  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  308 14:51:36.385157  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  309 14:51:36.388393  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  310 14:51:36.399285  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  311 14:51:36.405624  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  312 14:51:36.405717  

  313 14:51:36.405796  

  314 14:51:36.419188  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  315 14:51:36.433713  Probing TPM: . done!

  316 14:51:36.435825  TPM ready after 0 ms

  317 14:51:36.440182  Connected to device vid:did:rid of 1ae0:0028:00

  318 14:51:36.450975  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  319 14:51:36.457271  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  320 14:51:36.460495  Initialized TPM device CR50 revision 0

  321 14:51:36.512069  tlcl_send_startup: Startup return code is 0

  322 14:51:36.512172  TPM: setup succeeded

  323 14:51:36.527741  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  324 14:51:36.541672  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  325 14:51:36.554449  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  326 14:51:36.564463  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  327 14:51:36.567689  Chrome EC: UHEPI supported

  328 14:51:36.571390  Phase 1

  329 14:51:36.574541  FMAP: area GBB found @ 1805000 (458752 bytes)

  330 14:51:36.584192  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  331 14:51:36.591221  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  332 14:51:36.597667  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  333 14:51:36.604833  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  334 14:51:36.607484  Recovery requested (1009000e)

  335 14:51:36.611185  TPM: Extending digest for VBOOT: boot mode into PCR 0

  336 14:51:36.622525  tlcl_extend: response is 0

  337 14:51:36.628950  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  338 14:51:36.639233  tlcl_extend: response is 0

  339 14:51:36.645494  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  340 14:51:36.652885  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  341 14:51:36.659134  BS: verstage times (exec / console): total (unknown) / 142 ms

  342 14:51:36.659218  

  343 14:51:36.659283  

  344 14:51:36.672098  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  345 14:51:36.679194  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  346 14:51:36.682727  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  347 14:51:36.685613  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  348 14:51:36.692297  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  349 14:51:36.695795  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  350 14:51:36.699011  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  351 14:51:36.701991  TCO_STS:   0000 0000

  352 14:51:36.705610  GEN_PMCON: d0015038 00002200

  353 14:51:36.708748  GBLRST_CAUSE: 00000000 00000000

  354 14:51:36.708853  HPR_CAUSE0: 00000000

  355 14:51:36.711820  prev_sleep_state 5

  356 14:51:36.715455  Boot Count incremented to 18825

  357 14:51:36.722865  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  358 14:51:36.728853  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  359 14:51:36.736592  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  360 14:51:36.742276  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  361 14:51:36.746983  Chrome EC: UHEPI supported

  362 14:51:36.753537  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  363 14:51:36.766930  Probing TPM:  done!

  364 14:51:36.773743  Connected to device vid:did:rid of 1ae0:0028:00

  365 14:51:36.784612  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  366 14:51:36.791519  Initialized TPM device CR50 revision 0

  367 14:51:36.804819  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  368 14:51:36.808007  MRC: Hash idx 0x100b comparison successful.

  369 14:51:36.811320  MRC cache found, size faa8

  370 14:51:36.811745  bootmode is set to: 2

  371 14:51:36.815277  SPD index = 0

  372 14:51:36.821406  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  373 14:51:36.824662  SPD: module type is LPDDR4X

  374 14:51:36.828334  SPD: module part number is MT53E512M64D4NW-046

  375 14:51:36.834516  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  376 14:51:36.837559  SPD: device width 16 bits, bus width 16 bits

  377 14:51:36.844237  SPD: module size is 1024 MB (per channel)

  378 14:51:37.275376  CBMEM:

  379 14:51:37.278965  IMD: root @ 0x76fff000 254 entries.

  380 14:51:37.281983  IMD: root @ 0x76ffec00 62 entries.

  381 14:51:37.285061  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  382 14:51:37.292034  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  383 14:51:37.295267  External stage cache:

  384 14:51:37.298620  IMD: root @ 0x7b3ff000 254 entries.

  385 14:51:37.301540  IMD: root @ 0x7b3fec00 62 entries.

  386 14:51:37.316930  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  387 14:51:37.323751  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  388 14:51:37.330533  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  389 14:51:37.344302  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  390 14:51:37.351489  cse_lite: Skip switching to RW in the recovery path

  391 14:51:37.351934  8 DIMMs found

  392 14:51:37.352417  SMM Memory Map

  393 14:51:37.355206  SMRAM       : 0x7b000000 0x800000

  394 14:51:37.359558   Subregion 0: 0x7b000000 0x200000

  395 14:51:37.362272   Subregion 1: 0x7b200000 0x200000

  396 14:51:37.365616   Subregion 2: 0x7b400000 0x400000

  397 14:51:37.369043  top_of_ram = 0x77000000

  398 14:51:37.375733  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  399 14:51:37.378936  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  400 14:51:37.385470  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  401 14:51:37.388709  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  402 14:51:37.398477  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  403 14:51:37.402349  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  404 14:51:37.414229  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  405 14:51:37.420757  Processing 211 relocs. Offset value of 0x74c0b000

  406 14:51:37.427254  BS: romstage times (exec / console): total (unknown) / 277 ms

  407 14:51:37.433365  

  408 14:51:37.433793  

  409 14:51:37.443059  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  410 14:51:37.446533  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  411 14:51:37.455945  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  412 14:51:37.463154  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  413 14:51:37.469155  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  414 14:51:37.476057  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  415 14:51:37.523342  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  416 14:51:37.530009  Processing 5008 relocs. Offset value of 0x75d98000

  417 14:51:37.533223  BS: postcar times (exec / console): total (unknown) / 59 ms

  418 14:51:37.536752  

  419 14:51:37.537206  

  420 14:51:37.546375  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  421 14:51:37.546463  Normal boot

  422 14:51:37.550500  FW_CONFIG value is 0x804c02

  423 14:51:37.552997  PCI: 00:07.0 disabled by fw_config

  424 14:51:37.556220  PCI: 00:07.1 disabled by fw_config

  425 14:51:37.559859  PCI: 00:0d.2 disabled by fw_config

  426 14:51:37.563007  PCI: 00:1c.7 disabled by fw_config

  427 14:51:37.570125  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  428 14:51:37.576640  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  429 14:51:37.579616  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  430 14:51:37.582905  GENERIC: 0.0 disabled by fw_config

  431 14:51:37.589797  GENERIC: 1.0 disabled by fw_config

  432 14:51:37.592661  fw_config match found: DB_USB=USB3_ACTIVE

  433 14:51:37.595923  fw_config match found: DB_USB=USB3_ACTIVE

  434 14:51:37.599539  fw_config match found: DB_USB=USB3_ACTIVE

  435 14:51:37.606139  fw_config match found: DB_USB=USB3_ACTIVE

  436 14:51:37.609744  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  437 14:51:37.616575  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  438 14:51:37.626365  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  439 14:51:37.633230  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  440 14:51:37.636435  microcode: sig=0x806c1 pf=0x80 revision=0x86

  441 14:51:37.642918  microcode: Update skipped, already up-to-date

  442 14:51:37.649205  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  443 14:51:37.677059  Detected 4 core, 8 thread CPU.

  444 14:51:37.679602  Setting up SMI for CPU

  445 14:51:37.683130  IED base = 0x7b400000

  446 14:51:37.683582  IED size = 0x00400000

  447 14:51:37.686908  Will perform SMM setup.

  448 14:51:37.693562  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  449 14:51:37.700242  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  450 14:51:37.706561  Processing 16 relocs. Offset value of 0x00030000

  451 14:51:37.709970  Attempting to start 7 APs

  452 14:51:37.713370  Waiting for 10ms after sending INIT.

  453 14:51:37.728681  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  454 14:51:37.729346  done.

  455 14:51:37.731917  AP: slot 6 apic_id 2.

  456 14:51:37.735663  AP: slot 2 apic_id 3.

  457 14:51:37.736355  AP: slot 7 apic_id 6.

  458 14:51:37.739166  AP: slot 3 apic_id 7.

  459 14:51:37.742371  Waiting for 2nd SIPI to complete...done.

  460 14:51:37.745361  AP: slot 4 apic_id 5.

  461 14:51:37.748581  AP: slot 5 apic_id 4.

  462 14:51:37.755533  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  463 14:51:37.762195  Processing 13 relocs. Offset value of 0x00038000

  464 14:51:37.762650  Unable to locate Global NVS

  465 14:51:37.772058  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  466 14:51:37.775177  Installing permanent SMM handler to 0x7b000000

  467 14:51:37.785221  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  468 14:51:37.789040  Processing 794 relocs. Offset value of 0x7b010000

  469 14:51:37.798395  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  470 14:51:37.802181  Processing 13 relocs. Offset value of 0x7b008000

  471 14:51:37.808918  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  472 14:51:37.815100  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  473 14:51:37.818612  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  474 14:51:37.825194  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  475 14:51:37.831667  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  476 14:51:37.838279  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  477 14:51:37.845245  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  478 14:51:37.845780  Unable to locate Global NVS

  479 14:51:37.855121  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  480 14:51:37.858113  Clearing SMI status registers

  481 14:51:37.858578  SMI_STS: PM1 

  482 14:51:37.861153  PM1_STS: PWRBTN 

  483 14:51:37.868260  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  484 14:51:37.871580  In relocation handler: CPU 0

  485 14:51:37.874931  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  486 14:51:37.881212  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  487 14:51:37.881297  Relocation complete.

  488 14:51:37.891300  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  489 14:51:37.891384  In relocation handler: CPU 1

  490 14:51:37.897754  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  491 14:51:37.897844  Relocation complete.

  492 14:51:37.904853  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  493 14:51:37.907934  In relocation handler: CPU 2

  494 14:51:37.914596  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  495 14:51:37.914684  Relocation complete.

  496 14:51:37.921301  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  497 14:51:37.924450  In relocation handler: CPU 6

  498 14:51:37.931345  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  499 14:51:37.934654  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  500 14:51:37.937936  Relocation complete.

  501 14:51:37.944738  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  502 14:51:37.948082  In relocation handler: CPU 7

  503 14:51:37.950925  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  504 14:51:37.954358  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  505 14:51:37.957654  Relocation complete.

  506 14:51:37.964860  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  507 14:51:37.967916  In relocation handler: CPU 3

  508 14:51:37.971334  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  509 14:51:37.974694  Relocation complete.

  510 14:51:37.981168  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  511 14:51:37.984380  In relocation handler: CPU 5

  512 14:51:37.987951  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  513 14:51:37.994989  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  514 14:51:37.995156  Relocation complete.

  515 14:51:38.004372  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  516 14:51:38.004460  In relocation handler: CPU 4

  517 14:51:38.011263  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  518 14:51:38.011350  Relocation complete.

  519 14:51:38.014623  Initializing CPU #0

  520 14:51:38.018152  CPU: vendor Intel device 806c1

  521 14:51:38.021963  CPU: family 06, model 8c, stepping 01

  522 14:51:38.025339  Clearing out pending MCEs

  523 14:51:38.025426  Setting up local APIC...

  524 14:51:38.028596   apic_id: 0x00 done.

  525 14:51:38.032091  Turbo is available but hidden

  526 14:51:38.035602  Turbo is available and visible

  527 14:51:38.038825  microcode: Update skipped, already up-to-date

  528 14:51:38.042379  CPU #0 initialized

  529 14:51:38.045404  Initializing CPU #3

  530 14:51:38.045477  Initializing CPU #7

  531 14:51:38.048738  CPU: vendor Intel device 806c1

  532 14:51:38.051803  CPU: family 06, model 8c, stepping 01

  533 14:51:38.055046  CPU: vendor Intel device 806c1

  534 14:51:38.058419  CPU: family 06, model 8c, stepping 01

  535 14:51:38.062119  Clearing out pending MCEs

  536 14:51:38.065023  Clearing out pending MCEs

  537 14:51:38.068625  Setting up local APIC...

  538 14:51:38.068709  Initializing CPU #2

  539 14:51:38.072263  Initializing CPU #6

  540 14:51:38.075425  CPU: vendor Intel device 806c1

  541 14:51:38.078483  CPU: family 06, model 8c, stepping 01

  542 14:51:38.081712  CPU: vendor Intel device 806c1

  543 14:51:38.085033  CPU: family 06, model 8c, stepping 01

  544 14:51:38.088434  Clearing out pending MCEs

  545 14:51:38.091469  Clearing out pending MCEs

  546 14:51:38.095222  Setting up local APIC...

  547 14:51:38.095297   apic_id: 0x07 done.

  548 14:51:38.098551  Setting up local APIC...

  549 14:51:38.101646  Setting up local APIC...

  550 14:51:38.105184  microcode: Update skipped, already up-to-date

  551 14:51:38.108286   apic_id: 0x06 done.

  552 14:51:38.108369  CPU #3 initialized

  553 14:51:38.114671  microcode: Update skipped, already up-to-date

  554 14:51:38.114769   apic_id: 0x02 done.

  555 14:51:38.118731   apic_id: 0x03 done.

  556 14:51:38.121301  microcode: Update skipped, already up-to-date

  557 14:51:38.128123  microcode: Update skipped, already up-to-date

  558 14:51:38.128206  CPU #6 initialized

  559 14:51:38.131620  CPU #2 initialized

  560 14:51:38.134803  Initializing CPU #5

  561 14:51:38.134885  Initializing CPU #4

  562 14:51:38.138067  CPU: vendor Intel device 806c1

  563 14:51:38.141529  CPU: family 06, model 8c, stepping 01

  564 14:51:38.144914  CPU: vendor Intel device 806c1

  565 14:51:38.148290  CPU: family 06, model 8c, stepping 01

  566 14:51:38.151283  Clearing out pending MCEs

  567 14:51:38.154552  Clearing out pending MCEs

  568 14:51:38.157806  Setting up local APIC...

  569 14:51:38.157904  Initializing CPU #1

  570 14:51:38.161275   apic_id: 0x04 done.

  571 14:51:38.164802  Setting up local APIC...

  572 14:51:38.167972  CPU: vendor Intel device 806c1

  573 14:51:38.170865  CPU: family 06, model 8c, stepping 01

  574 14:51:38.174844   apic_id: 0x05 done.

  575 14:51:38.177917  microcode: Update skipped, already up-to-date

  576 14:51:38.181252  microcode: Update skipped, already up-to-date

  577 14:51:38.184671  CPU #5 initialized

  578 14:51:38.187750  CPU #4 initialized

  579 14:51:38.187833  CPU #7 initialized

  580 14:51:38.191335  Clearing out pending MCEs

  581 14:51:38.194895  Setting up local APIC...

  582 14:51:38.194980   apic_id: 0x01 done.

  583 14:51:38.200869  microcode: Update skipped, already up-to-date

  584 14:51:38.200954  CPU #1 initialized

  585 14:51:38.208053  bsp_do_flight_plan done after 459 msecs.

  586 14:51:38.211141  CPU: frequency set to 4000 MHz

  587 14:51:38.211226  Enabling SMIs.

  588 14:51:38.217800  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  589 14:51:38.234195  SATAXPCIE1 indicates PCIe NVMe is present

  590 14:51:38.237149  Probing TPM:  done!

  591 14:51:38.240344  Connected to device vid:did:rid of 1ae0:0028:00

  592 14:51:38.251254  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  593 14:51:38.254136  Initialized TPM device CR50 revision 0

  594 14:51:38.257649  Enabling S0i3.4

  595 14:51:38.264300  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  596 14:51:38.267913  Found a VBT of 8704 bytes after decompression

  597 14:51:38.274527  cse_lite: CSE RO boot. HybridStorageMode disabled

  598 14:51:38.281107  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  599 14:51:38.356574  FSPS returned 0

  600 14:51:38.359548  Executing Phase 1 of FspMultiPhaseSiInit

  601 14:51:38.369185  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  602 14:51:38.372352  port C0 DISC req: usage 1 usb3 1 usb2 5

  603 14:51:38.375670  Raw Buffer output 0 00000511

  604 14:51:38.379101  Raw Buffer output 1 00000000

  605 14:51:38.383149  pmc_send_ipc_cmd succeeded

  606 14:51:38.389899  port C1 DISC req: usage 1 usb3 2 usb2 3

  607 14:51:38.390471  Raw Buffer output 0 00000321

  608 14:51:38.392900  Raw Buffer output 1 00000000

  609 14:51:38.396820  pmc_send_ipc_cmd succeeded

  610 14:51:38.402265  Detected 4 core, 8 thread CPU.

  611 14:51:38.405504  Detected 4 core, 8 thread CPU.

  612 14:51:38.639494  Display FSP Version Info HOB

  613 14:51:38.642456  Reference Code - CPU = a.0.4c.31

  614 14:51:38.645755  uCode Version = 0.0.0.86

  615 14:51:38.649449  TXT ACM version = ff.ff.ff.ffff

  616 14:51:38.652674  Reference Code - ME = a.0.4c.31

  617 14:51:38.656145  MEBx version = 0.0.0.0

  618 14:51:38.659389  ME Firmware Version = Consumer SKU

  619 14:51:38.662463  Reference Code - PCH = a.0.4c.31

  620 14:51:38.665770  PCH-CRID Status = Disabled

  621 14:51:38.669066  PCH-CRID Original Value = ff.ff.ff.ffff

  622 14:51:38.672538  PCH-CRID New Value = ff.ff.ff.ffff

  623 14:51:38.676247  OPROM - RST - RAID = ff.ff.ff.ffff

  624 14:51:38.679436  PCH Hsio Version = 4.0.0.0

  625 14:51:38.682520  Reference Code - SA - System Agent = a.0.4c.31

  626 14:51:38.686238  Reference Code - MRC = 2.0.0.1

  627 14:51:38.689234  SA - PCIe Version = a.0.4c.31

  628 14:51:38.692634  SA-CRID Status = Disabled

  629 14:51:38.695952  SA-CRID Original Value = 0.0.0.1

  630 14:51:38.699070  SA-CRID New Value = 0.0.0.1

  631 14:51:38.702706  OPROM - VBIOS = ff.ff.ff.ffff

  632 14:51:38.706087  IO Manageability Engine FW Version = 11.1.4.0

  633 14:51:38.709082  PHY Build Version = 0.0.0.e0

  634 14:51:38.712535  Thunderbolt(TM) FW Version = 0.0.0.0

  635 14:51:38.719099  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  636 14:51:38.722571  ITSS IRQ Polarities Before:

  637 14:51:38.722997  IPC0: 0xffffffff

  638 14:51:38.725625  IPC1: 0xffffffff

  639 14:51:38.726049  IPC2: 0xffffffff

  640 14:51:38.729043  IPC3: 0xffffffff

  641 14:51:38.732338  ITSS IRQ Polarities After:

  642 14:51:38.732421  IPC0: 0xffffffff

  643 14:51:38.735542  IPC1: 0xffffffff

  644 14:51:38.735624  IPC2: 0xffffffff

  645 14:51:38.739370  IPC3: 0xffffffff

  646 14:51:38.742060  Found PCIe Root Port #9 at PCI: 00:1d.0.

  647 14:51:38.755578  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  648 14:51:38.765770  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  649 14:51:38.778731  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  650 14:51:38.785634  BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 236 ms

  651 14:51:38.785718  Enumerating buses...

  652 14:51:38.792004  Show all devs... Before device enumeration.

  653 14:51:38.792089  Root Device: enabled 1

  654 14:51:38.795601  DOMAIN: 0000: enabled 1

  655 14:51:38.799138  CPU_CLUSTER: 0: enabled 1

  656 14:51:38.802237  PCI: 00:00.0: enabled 1

  657 14:51:38.802321  PCI: 00:02.0: enabled 1

  658 14:51:38.805778  PCI: 00:04.0: enabled 1

  659 14:51:38.809367  PCI: 00:05.0: enabled 1

  660 14:51:38.811907  PCI: 00:06.0: enabled 0

  661 14:51:38.812027  PCI: 00:07.0: enabled 0

  662 14:51:38.815567  PCI: 00:07.1: enabled 0

  663 14:51:38.818863  PCI: 00:07.2: enabled 0

  664 14:51:38.821694  PCI: 00:07.3: enabled 0

  665 14:51:38.821779  PCI: 00:08.0: enabled 1

  666 14:51:38.825812  PCI: 00:09.0: enabled 0

  667 14:51:38.828619  PCI: 00:0a.0: enabled 0

  668 14:51:38.831884  PCI: 00:0d.0: enabled 1

  669 14:51:38.831979  PCI: 00:0d.1: enabled 0

  670 14:51:38.835339  PCI: 00:0d.2: enabled 0

  671 14:51:38.838204  PCI: 00:0d.3: enabled 0

  672 14:51:38.838314  PCI: 00:0e.0: enabled 0

  673 14:51:38.841828  PCI: 00:10.2: enabled 1

  674 14:51:38.845138  PCI: 00:10.6: enabled 0

  675 14:51:38.848501  PCI: 00:10.7: enabled 0

  676 14:51:38.848585  PCI: 00:12.0: enabled 0

  677 14:51:38.851807  PCI: 00:12.6: enabled 0

  678 14:51:38.855157  PCI: 00:13.0: enabled 0

  679 14:51:38.858637  PCI: 00:14.0: enabled 1

  680 14:51:38.858790  PCI: 00:14.1: enabled 0

  681 14:51:38.862110  PCI: 00:14.2: enabled 1

  682 14:51:38.865541  PCI: 00:14.3: enabled 1

  683 14:51:38.868308  PCI: 00:15.0: enabled 1

  684 14:51:38.868393  PCI: 00:15.1: enabled 1

  685 14:51:38.871550  PCI: 00:15.2: enabled 1

  686 14:51:38.875084  PCI: 00:15.3: enabled 1

  687 14:51:38.875171  PCI: 00:16.0: enabled 1

  688 14:51:38.878345  PCI: 00:16.1: enabled 0

  689 14:51:38.882148  PCI: 00:16.2: enabled 0

  690 14:51:38.885543  PCI: 00:16.3: enabled 0

  691 14:51:38.885664  PCI: 00:16.4: enabled 0

  692 14:51:38.888380  PCI: 00:16.5: enabled 0

  693 14:51:38.892107  PCI: 00:17.0: enabled 1

  694 14:51:38.894837  PCI: 00:19.0: enabled 0

  695 14:51:38.894927  PCI: 00:19.1: enabled 1

  696 14:51:38.898482  PCI: 00:19.2: enabled 0

  697 14:51:38.901433  PCI: 00:1c.0: enabled 1

  698 14:51:38.905029  PCI: 00:1c.1: enabled 0

  699 14:51:38.905142  PCI: 00:1c.2: enabled 0

  700 14:51:38.908684  PCI: 00:1c.3: enabled 0

  701 14:51:38.911543  PCI: 00:1c.4: enabled 0

  702 14:51:38.915248  PCI: 00:1c.5: enabled 0

  703 14:51:38.915353  PCI: 00:1c.6: enabled 1

  704 14:51:38.918060  PCI: 00:1c.7: enabled 0

  705 14:51:38.921509  PCI: 00:1d.0: enabled 1

  706 14:51:38.921611  PCI: 00:1d.1: enabled 0

  707 14:51:38.924686  PCI: 00:1d.2: enabled 1

  708 14:51:38.929244  PCI: 00:1d.3: enabled 0

  709 14:51:38.931982  PCI: 00:1e.0: enabled 1

  710 14:51:38.932524  PCI: 00:1e.1: enabled 0

  711 14:51:38.935035  PCI: 00:1e.2: enabled 1

  712 14:51:38.938612  PCI: 00:1e.3: enabled 1

  713 14:51:38.941978  PCI: 00:1f.0: enabled 1

  714 14:51:38.942559  PCI: 00:1f.1: enabled 0

  715 14:51:38.945773  PCI: 00:1f.2: enabled 1

  716 14:51:38.948465  PCI: 00:1f.3: enabled 1

  717 14:51:38.951927  PCI: 00:1f.4: enabled 0

  718 14:51:38.952421  PCI: 00:1f.5: enabled 1

  719 14:51:38.954904  PCI: 00:1f.6: enabled 0

  720 14:51:38.958696  PCI: 00:1f.7: enabled 0

  721 14:51:38.959246  APIC: 00: enabled 1

  722 14:51:38.961835  GENERIC: 0.0: enabled 1

  723 14:51:38.965184  GENERIC: 0.0: enabled 1

  724 14:51:38.968405  GENERIC: 1.0: enabled 1

  725 14:51:38.968828  GENERIC: 0.0: enabled 1

  726 14:51:38.971799  GENERIC: 1.0: enabled 1

  727 14:51:38.975202  USB0 port 0: enabled 1

  728 14:51:38.975624  GENERIC: 0.0: enabled 1

  729 14:51:38.978416  USB0 port 0: enabled 1

  730 14:51:38.981763  GENERIC: 0.0: enabled 1

  731 14:51:38.985005  I2C: 00:1a: enabled 1

  732 14:51:38.985486  I2C: 00:31: enabled 1

  733 14:51:38.988747  I2C: 00:32: enabled 1

  734 14:51:38.991468  I2C: 00:10: enabled 1

  735 14:51:38.991951  I2C: 00:15: enabled 1

  736 14:51:38.995253  GENERIC: 0.0: enabled 0

  737 14:51:38.998280  GENERIC: 1.0: enabled 0

  738 14:51:39.001924  GENERIC: 0.0: enabled 1

  739 14:51:39.002519  SPI: 00: enabled 1

  740 14:51:39.005102  SPI: 00: enabled 1

  741 14:51:39.005814  PNP: 0c09.0: enabled 1

  742 14:51:39.008714  GENERIC: 0.0: enabled 1

  743 14:51:39.011556  USB3 port 0: enabled 1

  744 14:51:39.014650  USB3 port 1: enabled 1

  745 14:51:39.015279  USB3 port 2: enabled 0

  746 14:51:39.018482  USB3 port 3: enabled 0

  747 14:51:39.021819  USB2 port 0: enabled 0

  748 14:51:39.022253  USB2 port 1: enabled 1

  749 14:51:39.024992  USB2 port 2: enabled 1

  750 14:51:39.028332  USB2 port 3: enabled 0

  751 14:51:39.028762  USB2 port 4: enabled 1

  752 14:51:39.031844  USB2 port 5: enabled 0

  753 14:51:39.035013  USB2 port 6: enabled 0

  754 14:51:39.038397  USB2 port 7: enabled 0

  755 14:51:39.038897  USB2 port 8: enabled 0

  756 14:51:39.042191  USB2 port 9: enabled 0

  757 14:51:39.044813  USB3 port 0: enabled 0

  758 14:51:39.045338  USB3 port 1: enabled 1

  759 14:51:39.048619  USB3 port 2: enabled 0

  760 14:51:39.052345  USB3 port 3: enabled 0

  761 14:51:39.054892  GENERIC: 0.0: enabled 1

  762 14:51:39.055335  GENERIC: 1.0: enabled 1

  763 14:51:39.057906  APIC: 01: enabled 1

  764 14:51:39.061458  APIC: 03: enabled 1

  765 14:51:39.061889  APIC: 07: enabled 1

  766 14:51:39.065360  APIC: 05: enabled 1

  767 14:51:39.065789  APIC: 04: enabled 1

  768 14:51:39.067995  APIC: 02: enabled 1

  769 14:51:39.071301  APIC: 06: enabled 1

  770 14:51:39.071732  Compare with tree...

  771 14:51:39.074839  Root Device: enabled 1

  772 14:51:39.078056   DOMAIN: 0000: enabled 1

  773 14:51:39.081761    PCI: 00:00.0: enabled 1

  774 14:51:39.082379    PCI: 00:02.0: enabled 1

  775 14:51:39.084533    PCI: 00:04.0: enabled 1

  776 14:51:39.087913     GENERIC: 0.0: enabled 1

  777 14:51:39.091225    PCI: 00:05.0: enabled 1

  778 14:51:39.094521    PCI: 00:06.0: enabled 0

  779 14:51:39.095185    PCI: 00:07.0: enabled 0

  780 14:51:39.097611     GENERIC: 0.0: enabled 1

  781 14:51:39.101517    PCI: 00:07.1: enabled 0

  782 14:51:39.104660     GENERIC: 1.0: enabled 1

  783 14:51:39.108008    PCI: 00:07.2: enabled 0

  784 14:51:39.108639     GENERIC: 0.0: enabled 1

  785 14:51:39.111059    PCI: 00:07.3: enabled 0

  786 14:51:39.114478     GENERIC: 1.0: enabled 1

  787 14:51:39.118128    PCI: 00:08.0: enabled 1

  788 14:51:39.120980    PCI: 00:09.0: enabled 0

  789 14:51:39.121419    PCI: 00:0a.0: enabled 0

  790 14:51:39.124646    PCI: 00:0d.0: enabled 1

  791 14:51:39.127996     USB0 port 0: enabled 1

  792 14:51:39.131758      USB3 port 0: enabled 1

  793 14:51:39.134582      USB3 port 1: enabled 1

  794 14:51:39.135011      USB3 port 2: enabled 0

  795 14:51:39.137474      USB3 port 3: enabled 0

  796 14:51:39.140767    PCI: 00:0d.1: enabled 0

  797 14:51:39.144585    PCI: 00:0d.2: enabled 0

  798 14:51:39.147456     GENERIC: 0.0: enabled 1

  799 14:51:39.147538    PCI: 00:0d.3: enabled 0

  800 14:51:39.151107    PCI: 00:0e.0: enabled 0

  801 14:51:39.154204    PCI: 00:10.2: enabled 1

  802 14:51:39.157317    PCI: 00:10.6: enabled 0

  803 14:51:39.160890    PCI: 00:10.7: enabled 0

  804 14:51:39.160973    PCI: 00:12.0: enabled 0

  805 14:51:39.164089    PCI: 00:12.6: enabled 0

  806 14:51:39.167672    PCI: 00:13.0: enabled 0

  807 14:51:39.170716    PCI: 00:14.0: enabled 1

  808 14:51:39.174054     USB0 port 0: enabled 1

  809 14:51:39.174157      USB2 port 0: enabled 0

  810 14:51:39.177548      USB2 port 1: enabled 1

  811 14:51:39.180656      USB2 port 2: enabled 1

  812 14:51:39.184208      USB2 port 3: enabled 0

  813 14:51:39.187309      USB2 port 4: enabled 1

  814 14:51:39.190426      USB2 port 5: enabled 0

  815 14:51:39.190508      USB2 port 6: enabled 0

  816 14:51:39.194028      USB2 port 7: enabled 0

  817 14:51:39.197497      USB2 port 8: enabled 0

  818 14:51:39.200881      USB2 port 9: enabled 0

  819 14:51:39.203728      USB3 port 0: enabled 0

  820 14:51:39.207190      USB3 port 1: enabled 1

  821 14:51:39.207273      USB3 port 2: enabled 0

  822 14:51:39.210395      USB3 port 3: enabled 0

  823 14:51:39.214373    PCI: 00:14.1: enabled 0

  824 14:51:39.217467    PCI: 00:14.2: enabled 1

  825 14:51:39.220912    PCI: 00:14.3: enabled 1

  826 14:51:39.220995     GENERIC: 0.0: enabled 1

  827 14:51:39.223740    PCI: 00:15.0: enabled 1

  828 14:51:39.227580     I2C: 00:1a: enabled 1

  829 14:51:39.230520     I2C: 00:31: enabled 1

  830 14:51:39.230629     I2C: 00:32: enabled 1

  831 14:51:39.233954    PCI: 00:15.1: enabled 1

  832 14:51:39.237104     I2C: 00:10: enabled 1

  833 14:51:39.240282    PCI: 00:15.2: enabled 1

  834 14:51:39.243726    PCI: 00:15.3: enabled 1

  835 14:51:39.243835    PCI: 00:16.0: enabled 1

  836 14:51:39.247510    PCI: 00:16.1: enabled 0

  837 14:51:39.250371    PCI: 00:16.2: enabled 0

  838 14:51:39.253895    PCI: 00:16.3: enabled 0

  839 14:51:39.257265    PCI: 00:16.4: enabled 0

  840 14:51:39.257348    PCI: 00:16.5: enabled 0

  841 14:51:39.261231    PCI: 00:17.0: enabled 1

  842 14:51:39.264656    PCI: 00:19.0: enabled 0

  843 14:51:39.264739    PCI: 00:19.1: enabled 1

  844 14:51:39.268397     I2C: 00:15: enabled 1

  845 14:51:39.272259    PCI: 00:19.2: enabled 0

  846 14:51:39.275109    PCI: 00:1d.0: enabled 1

  847 14:51:39.275183     GENERIC: 0.0: enabled 1

  848 14:51:39.278483    PCI: 00:1e.0: enabled 1

  849 14:51:39.281881    PCI: 00:1e.1: enabled 0

  850 14:51:39.285219    PCI: 00:1e.2: enabled 1

  851 14:51:39.288598     SPI: 00: enabled 1

  852 14:51:39.288681    PCI: 00:1e.3: enabled 1

  853 14:51:39.291850     SPI: 00: enabled 1

  854 14:51:39.295335    PCI: 00:1f.0: enabled 1

  855 14:51:39.299059     PNP: 0c09.0: enabled 1

  856 14:51:39.299174    PCI: 00:1f.1: enabled 0

  857 14:51:39.350174    PCI: 00:1f.2: enabled 1

  858 14:51:39.350272     GENERIC: 0.0: enabled 1

  859 14:51:39.350851      GENERIC: 0.0: enabled 1

  860 14:51:39.350925      GENERIC: 1.0: enabled 1

  861 14:51:39.351345    PCI: 00:1f.3: enabled 1

  862 14:51:39.351414    PCI: 00:1f.4: enabled 0

  863 14:51:39.351474    PCI: 00:1f.5: enabled 1

  864 14:51:39.351898    PCI: 00:1f.6: enabled 0

  865 14:51:39.352026    PCI: 00:1f.7: enabled 0

  866 14:51:39.352426   CPU_CLUSTER: 0: enabled 1

  867 14:51:39.352510    APIC: 00: enabled 1

  868 14:51:39.352576    APIC: 01: enabled 1

  869 14:51:39.352986    APIC: 03: enabled 1

  870 14:51:39.353070    APIC: 07: enabled 1

  871 14:51:39.354073    APIC: 05: enabled 1

  872 14:51:39.354201    APIC: 04: enabled 1

  873 14:51:39.354267    APIC: 02: enabled 1

  874 14:51:39.354508    APIC: 06: enabled 1

  875 14:51:39.354571  Root Device scanning...

  876 14:51:39.400803  scan_static_bus for Root Device

  877 14:51:39.400905  DOMAIN: 0000 enabled

  878 14:51:39.400981  CPU_CLUSTER: 0 enabled

  879 14:51:39.401550  DOMAIN: 0000 scanning...

  880 14:51:39.401652  PCI: pci_scan_bus for bus 00

  881 14:51:39.401964  PCI: 00:00.0 [8086/0000] ops

  882 14:51:39.402065  PCI: 00:00.0 [8086/9a12] enabled

  883 14:51:39.402145  PCI: 00:02.0 [8086/0000] bus ops

  884 14:51:39.402227  PCI: 00:02.0 [8086/9a40] enabled

  885 14:51:39.402325  PCI: 00:04.0 [8086/0000] bus ops

  886 14:51:39.402409  PCI: 00:04.0 [8086/9a03] enabled

  887 14:51:39.402517  PCI: 00:05.0 [8086/9a19] enabled

  888 14:51:39.402612  PCI: 00:07.0 [0000/0000] hidden

  889 14:51:39.402709  PCI: 00:08.0 [8086/9a11] enabled

  890 14:51:39.402781  PCI: 00:0a.0 [8086/9a0d] disabled

  891 14:51:39.403128  PCI: 00:0d.0 [8086/0000] bus ops

  892 14:51:39.403230  PCI: 00:0d.0 [8086/9a13] enabled

  893 14:51:39.439008  PCI: 00:14.0 [8086/0000] bus ops

  894 14:51:39.439584  PCI: 00:14.0 [8086/a0ed] enabled

  895 14:51:39.439889  PCI: 00:14.2 [8086/a0ef] enabled

  896 14:51:39.440127  PCI: 00:14.3 [8086/0000] bus ops

  897 14:51:39.440318  PCI: 00:14.3 [8086/a0f0] enabled

  898 14:51:39.440536  PCI: 00:15.0 [8086/0000] bus ops

  899 14:51:39.440748  PCI: 00:15.0 [8086/a0e8] enabled

  900 14:51:39.440955  PCI: 00:15.1 [8086/0000] bus ops

  901 14:51:39.441124  PCI: 00:15.1 [8086/a0e9] enabled

  902 14:51:39.441323  PCI: 00:15.2 [8086/0000] bus ops

  903 14:51:39.441505  PCI: 00:15.2 [8086/a0ea] enabled

  904 14:51:39.443150  PCI: 00:15.3 [8086/0000] bus ops

  905 14:51:39.446643  PCI: 00:15.3 [8086/a0eb] enabled

  906 14:51:39.449978  PCI: 00:16.0 [8086/0000] ops

  907 14:51:39.453656  PCI: 00:16.0 [8086/a0e0] enabled

  908 14:51:39.456641  PCI: Static device PCI: 00:17.0 not found, disabling it.

  909 14:51:39.459871  PCI: 00:19.0 [8086/0000] bus ops

  910 14:51:39.463702  PCI: 00:19.0 [8086/a0c5] disabled

  911 14:51:39.466565  PCI: 00:19.1 [8086/0000] bus ops

  912 14:51:39.470290  PCI: 00:19.1 [8086/a0c6] enabled

  913 14:51:39.473157  PCI: 00:1d.0 [8086/0000] bus ops

  914 14:51:39.476434  PCI: 00:1d.0 [8086/a0b0] enabled

  915 14:51:39.480158  PCI: 00:1e.0 [8086/0000] ops

  916 14:51:39.483623  PCI: 00:1e.0 [8086/a0a8] enabled

  917 14:51:39.486775  PCI: 00:1e.2 [8086/0000] bus ops

  918 14:51:39.489966  PCI: 00:1e.2 [8086/a0aa] enabled

  919 14:51:39.493078  PCI: 00:1e.3 [8086/0000] bus ops

  920 14:51:39.496501  PCI: 00:1e.3 [8086/a0ab] enabled

  921 14:51:39.499450  PCI: 00:1f.0 [8086/0000] bus ops

  922 14:51:39.502967  PCI: 00:1f.0 [8086/a087] enabled

  923 14:51:39.506388  RTC Init

  924 14:51:39.509682  Set power on after power failure.

  925 14:51:39.510096  Disabling Deep S3

  926 14:51:39.513047  Disabling Deep S3

  927 14:51:39.513648  Disabling Deep S4

  928 14:51:39.516275  Disabling Deep S4

  929 14:51:39.519680  Disabling Deep S5

  930 14:51:39.520229  Disabling Deep S5

  931 14:51:39.522863  PCI: 00:1f.2 [0000/0000] hidden

  932 14:51:39.526881  PCI: 00:1f.3 [8086/0000] bus ops

  933 14:51:39.529612  PCI: 00:1f.3 [8086/a0c8] enabled

  934 14:51:39.533083  PCI: 00:1f.5 [8086/0000] bus ops

  935 14:51:39.536152  PCI: 00:1f.5 [8086/a0a4] enabled

  936 14:51:39.539413  PCI: Leftover static devices:

  937 14:51:39.539818  PCI: 00:10.2

  938 14:51:39.543075  PCI: 00:10.6

  939 14:51:39.543371  PCI: 00:10.7

  940 14:51:39.546099  PCI: 00:06.0

  941 14:51:39.546393  PCI: 00:07.1

  942 14:51:39.549661  PCI: 00:07.2

  943 14:51:39.549958  PCI: 00:07.3

  944 14:51:39.550193  PCI: 00:09.0

  945 14:51:39.552767  PCI: 00:0d.1

  946 14:51:39.553064  PCI: 00:0d.2

  947 14:51:39.555674  PCI: 00:0d.3

  948 14:51:39.555987  PCI: 00:0e.0

  949 14:51:39.556226  PCI: 00:12.0

  950 14:51:39.559997  PCI: 00:12.6

  951 14:51:39.560292  PCI: 00:13.0

  952 14:51:39.562299  PCI: 00:14.1

  953 14:51:39.562597  PCI: 00:16.1

  954 14:51:39.562832  PCI: 00:16.2

  955 14:51:39.566430  PCI: 00:16.3

  956 14:51:39.566808  PCI: 00:16.4

  957 14:51:39.569212  PCI: 00:16.5

  958 14:51:39.569610  PCI: 00:17.0

  959 14:51:39.572385  PCI: 00:19.2

  960 14:51:39.572787  PCI: 00:1e.1

  961 14:51:39.573089  PCI: 00:1f.1

  962 14:51:39.575560  PCI: 00:1f.4

  963 14:51:39.575988  PCI: 00:1f.6

  964 14:51:39.578824  PCI: 00:1f.7

  965 14:51:39.582608  PCI: Check your devicetree.cb.

  966 14:51:39.582907  PCI: 00:02.0 scanning...

  967 14:51:39.585397  scan_generic_bus for PCI: 00:02.0

  968 14:51:39.592446  scan_generic_bus for PCI: 00:02.0 done

  969 14:51:39.595713  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  970 14:51:39.598699  PCI: 00:04.0 scanning...

  971 14:51:39.602435  scan_generic_bus for PCI: 00:04.0

  972 14:51:39.605600  GENERIC: 0.0 enabled

  973 14:51:39.609396  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  974 14:51:39.615318  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  975 14:51:39.619036  PCI: 00:0d.0 scanning...

  976 14:51:39.622092  scan_static_bus for PCI: 00:0d.0

  977 14:51:39.622391  USB0 port 0 enabled

  978 14:51:39.626143  USB0 port 0 scanning...

  979 14:51:39.628738  scan_static_bus for USB0 port 0

  980 14:51:39.631909  USB3 port 0 enabled

  981 14:51:39.632212  USB3 port 1 enabled

  982 14:51:39.635311  USB3 port 2 disabled

  983 14:51:39.639005  USB3 port 3 disabled

  984 14:51:39.639431  USB3 port 0 scanning...

  985 14:51:39.642334  scan_static_bus for USB3 port 0

  986 14:51:39.648716  scan_static_bus for USB3 port 0 done

  987 14:51:39.651994  scan_bus: bus USB3 port 0 finished in 6 msecs

  988 14:51:39.655074  USB3 port 1 scanning...

  989 14:51:39.658523  scan_static_bus for USB3 port 1

  990 14:51:39.662549  scan_static_bus for USB3 port 1 done

  991 14:51:39.665346  scan_bus: bus USB3 port 1 finished in 6 msecs

  992 14:51:39.668346  scan_static_bus for USB0 port 0 done

  993 14:51:39.674939  scan_bus: bus USB0 port 0 finished in 43 msecs

  994 14:51:39.678109  scan_static_bus for PCI: 00:0d.0 done

  995 14:51:39.681907  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  996 14:51:39.685315  PCI: 00:14.0 scanning...

  997 14:51:39.688663  scan_static_bus for PCI: 00:14.0

  998 14:51:39.691549  USB0 port 0 enabled

  999 14:51:39.695414  USB0 port 0 scanning...

 1000 14:51:39.698529  scan_static_bus for USB0 port 0

 1001 14:51:39.698960  USB2 port 0 disabled

 1002 14:51:39.701403  USB2 port 1 enabled

 1003 14:51:39.704852  USB2 port 2 enabled

 1004 14:51:39.705265  USB2 port 3 disabled

 1005 14:51:39.708682  USB2 port 4 enabled

 1006 14:51:39.709116  USB2 port 5 disabled

 1007 14:51:39.711248  USB2 port 6 disabled

 1008 14:51:39.714511  USB2 port 7 disabled

 1009 14:51:39.714936  USB2 port 8 disabled

 1010 14:51:39.718077  USB2 port 9 disabled

 1011 14:51:39.721531  USB3 port 0 disabled

 1012 14:51:39.721962  USB3 port 1 enabled

 1013 14:51:39.725300  USB3 port 2 disabled

 1014 14:51:39.727907  USB3 port 3 disabled

 1015 14:51:39.728379  USB2 port 1 scanning...

 1016 14:51:39.731543  scan_static_bus for USB2 port 1

 1017 14:51:39.738375  scan_static_bus for USB2 port 1 done

 1018 14:51:39.741505  scan_bus: bus USB2 port 1 finished in 6 msecs

 1019 14:51:39.744290  USB2 port 2 scanning...

 1020 14:51:39.748000  scan_static_bus for USB2 port 2

 1021 14:51:39.751766  scan_static_bus for USB2 port 2 done

 1022 14:51:39.754353  scan_bus: bus USB2 port 2 finished in 6 msecs

 1023 14:51:39.758236  USB2 port 4 scanning...

 1024 14:51:39.761068  scan_static_bus for USB2 port 4

 1025 14:51:39.764318  scan_static_bus for USB2 port 4 done

 1026 14:51:39.768044  scan_bus: bus USB2 port 4 finished in 6 msecs

 1027 14:51:39.771451  USB3 port 1 scanning...

 1028 14:51:39.774930  scan_static_bus for USB3 port 1

 1029 14:51:39.777647  scan_static_bus for USB3 port 1 done

 1030 14:51:39.784965  scan_bus: bus USB3 port 1 finished in 6 msecs

 1031 14:51:39.788353  scan_static_bus for USB0 port 0 done

 1032 14:51:39.790988  scan_bus: bus USB0 port 0 finished in 93 msecs

 1033 14:51:39.794078  scan_static_bus for PCI: 00:14.0 done

 1034 14:51:39.801039  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1035 14:51:39.804061  PCI: 00:14.3 scanning...

 1036 14:51:39.808003  scan_static_bus for PCI: 00:14.3

 1037 14:51:39.808666  GENERIC: 0.0 enabled

 1038 14:51:39.813981  scan_static_bus for PCI: 00:14.3 done

 1039 14:51:39.817266  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1040 14:51:39.820586  PCI: 00:15.0 scanning...

 1041 14:51:39.824058  scan_static_bus for PCI: 00:15.0

 1042 14:51:39.824587  I2C: 00:1a enabled

 1043 14:51:39.827590  I2C: 00:31 enabled

 1044 14:51:39.831291  I2C: 00:32 enabled

 1045 14:51:39.834221  scan_static_bus for PCI: 00:15.0 done

 1046 14:51:39.837896  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1047 14:51:39.841650  PCI: 00:15.1 scanning...

 1048 14:51:39.845204  scan_static_bus for PCI: 00:15.1

 1049 14:51:39.845762  I2C: 00:10 enabled

 1050 14:51:39.848081  scan_static_bus for PCI: 00:15.1 done

 1051 14:51:39.854648  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1052 14:51:39.858276  PCI: 00:15.2 scanning...

 1053 14:51:39.861855  scan_static_bus for PCI: 00:15.2

 1054 14:51:39.864792  scan_static_bus for PCI: 00:15.2 done

 1055 14:51:39.867700  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1056 14:51:39.870903  PCI: 00:15.3 scanning...

 1057 14:51:39.874379  scan_static_bus for PCI: 00:15.3

 1058 14:51:39.878122  scan_static_bus for PCI: 00:15.3 done

 1059 14:51:39.884454  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1060 14:51:39.884537  PCI: 00:19.1 scanning...

 1061 14:51:39.888191  scan_static_bus for PCI: 00:19.1

 1062 14:51:39.891291  I2C: 00:15 enabled

 1063 14:51:39.894685  scan_static_bus for PCI: 00:19.1 done

 1064 14:51:39.900755  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1065 14:51:39.900839  PCI: 00:1d.0 scanning...

 1066 14:51:39.907477  do_pci_scan_bridge for PCI: 00:1d.0

 1067 14:51:39.907566  PCI: pci_scan_bus for bus 01

 1068 14:51:39.911025  PCI: 01:00.0 [1c5c/174a] enabled

 1069 14:51:39.914674  GENERIC: 0.0 enabled

 1070 14:51:39.917835  Enabling Common Clock Configuration

 1071 14:51:39.924344  L1 Sub-State supported from root port 29

 1072 14:51:39.924435  L1 Sub-State Support = 0xf

 1073 14:51:39.927737  CommonModeRestoreTime = 0x28

 1074 14:51:39.934166  Power On Value = 0x16, Power On Scale = 0x0

 1075 14:51:39.934269  ASPM: Enabled L1

 1076 14:51:39.937360  PCIe: Max_Payload_Size adjusted to 128

 1077 14:51:39.944514  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1078 14:51:39.947269  PCI: 00:1e.2 scanning...

 1079 14:51:39.950755  scan_generic_bus for PCI: 00:1e.2

 1080 14:51:39.950897  SPI: 00 enabled

 1081 14:51:39.957685  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1082 14:51:39.960685  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1083 14:51:39.963947  PCI: 00:1e.3 scanning...

 1084 14:51:39.967198  scan_generic_bus for PCI: 00:1e.3

 1085 14:51:39.970506  SPI: 00 enabled

 1086 14:51:39.976983  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1087 14:51:39.980326  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1088 14:51:39.984447  PCI: 00:1f.0 scanning...

 1089 14:51:39.987384  scan_static_bus for PCI: 00:1f.0

 1090 14:51:39.991147  PNP: 0c09.0 enabled

 1091 14:51:39.991569  PNP: 0c09.0 scanning...

 1092 14:51:39.994446  scan_static_bus for PNP: 0c09.0

 1093 14:51:39.997481  scan_static_bus for PNP: 0c09.0 done

 1094 14:51:40.004035  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1095 14:51:40.007502  scan_static_bus for PCI: 00:1f.0 done

 1096 14:51:40.010498  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1097 14:51:40.013850  PCI: 00:1f.2 scanning...

 1098 14:51:40.017768  scan_static_bus for PCI: 00:1f.2

 1099 14:51:40.020394  GENERIC: 0.0 enabled

 1100 14:51:40.023892  GENERIC: 0.0 scanning...

 1101 14:51:40.026930  scan_static_bus for GENERIC: 0.0

 1102 14:51:40.027355  GENERIC: 0.0 enabled

 1103 14:51:40.030617  GENERIC: 1.0 enabled

 1104 14:51:40.033879  scan_static_bus for GENERIC: 0.0 done

 1105 14:51:40.040470  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1106 14:51:40.043923  scan_static_bus for PCI: 00:1f.2 done

 1107 14:51:40.047202  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1108 14:51:40.050258  PCI: 00:1f.3 scanning...

 1109 14:51:40.054078  scan_static_bus for PCI: 00:1f.3

 1110 14:51:40.057420  scan_static_bus for PCI: 00:1f.3 done

 1111 14:51:40.063904  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1112 14:51:40.064384  PCI: 00:1f.5 scanning...

 1113 14:51:40.067286  scan_generic_bus for PCI: 00:1f.5

 1114 14:51:40.073542  scan_generic_bus for PCI: 00:1f.5 done

 1115 14:51:40.076798  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1116 14:51:40.083097  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1117 14:51:40.087232  scan_static_bus for Root Device done

 1118 14:51:40.090035  scan_bus: bus Root Device finished in 736 msecs

 1119 14:51:40.090107  done

 1120 14:51:40.096862  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1121 14:51:40.100307  Chrome EC: UHEPI supported

 1122 14:51:40.107578  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1123 14:51:40.113820  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1124 14:51:40.117155  SPI flash protection: WPSW=0 SRP0=0

 1125 14:51:40.123566  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1126 14:51:40.127247  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1127 14:51:40.130027  found VGA at PCI: 00:02.0

 1128 14:51:40.133788  Setting up VGA for PCI: 00:02.0

 1129 14:51:40.139686  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1130 14:51:40.143257  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1131 14:51:40.146619  Allocating resources...

 1132 14:51:40.149613  Reading resources...

 1133 14:51:40.153685  Root Device read_resources bus 0 link: 0

 1134 14:51:40.156485  DOMAIN: 0000 read_resources bus 0 link: 0

 1135 14:51:40.163514  PCI: 00:04.0 read_resources bus 1 link: 0

 1136 14:51:40.166163  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1137 14:51:40.173248  PCI: 00:0d.0 read_resources bus 0 link: 0

 1138 14:51:40.176994  USB0 port 0 read_resources bus 0 link: 0

 1139 14:51:40.183078  USB0 port 0 read_resources bus 0 link: 0 done

 1140 14:51:40.186358  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1141 14:51:40.189792  PCI: 00:14.0 read_resources bus 0 link: 0

 1142 14:51:40.196269  USB0 port 0 read_resources bus 0 link: 0

 1143 14:51:40.200034  USB0 port 0 read_resources bus 0 link: 0 done

 1144 14:51:40.206570  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1145 14:51:40.210256  PCI: 00:14.3 read_resources bus 0 link: 0

 1146 14:51:40.216953  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1147 14:51:40.219681  PCI: 00:15.0 read_resources bus 0 link: 0

 1148 14:51:40.226923  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1149 14:51:40.230245  PCI: 00:15.1 read_resources bus 0 link: 0

 1150 14:51:40.236913  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1151 14:51:40.240094  PCI: 00:19.1 read_resources bus 0 link: 0

 1152 14:51:40.247303  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1153 14:51:40.250242  PCI: 00:1d.0 read_resources bus 1 link: 0

 1154 14:51:40.256923  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1155 14:51:40.260512  PCI: 00:1e.2 read_resources bus 2 link: 0

 1156 14:51:40.266995  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1157 14:51:40.270232  PCI: 00:1e.3 read_resources bus 3 link: 0

 1158 14:51:40.277090  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1159 14:51:40.280140  PCI: 00:1f.0 read_resources bus 0 link: 0

 1160 14:51:40.287010  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1161 14:51:40.290950  PCI: 00:1f.2 read_resources bus 0 link: 0

 1162 14:51:40.293378  GENERIC: 0.0 read_resources bus 0 link: 0

 1163 14:51:40.300677  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1164 14:51:40.304190  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1165 14:51:40.311707  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1166 14:51:40.314305  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1167 14:51:40.321202  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1168 14:51:40.324429  Root Device read_resources bus 0 link: 0 done

 1169 14:51:40.327717  Done reading resources.

 1170 14:51:40.334505  Show resources in subtree (Root Device)...After reading.

 1171 14:51:40.337760   Root Device child on link 0 DOMAIN: 0000

 1172 14:51:40.341110    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1173 14:51:40.351332    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1174 14:51:40.361177    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1175 14:51:40.364582     PCI: 00:00.0

 1176 14:51:40.374285     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1177 14:51:40.381251     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1178 14:51:40.391083     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1179 14:51:40.400797     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1180 14:51:40.410953     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1181 14:51:40.420827     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1182 14:51:40.427709     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1183 14:51:40.437612     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1184 14:51:40.447634     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1185 14:51:40.457464     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1186 14:51:40.467668     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1187 14:51:40.477402     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1188 14:51:40.484148     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1189 14:51:40.493804     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1190 14:51:40.503934     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1191 14:51:40.513942     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1192 14:51:40.523480     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1193 14:51:40.533584     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1194 14:51:40.540175     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1195 14:51:40.550884     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1196 14:51:40.553695     PCI: 00:02.0

 1197 14:51:40.563824     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1198 14:51:40.573406     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1199 14:51:40.583568     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1200 14:51:40.586814     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1201 14:51:40.596890     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1202 14:51:40.596971      GENERIC: 0.0

 1203 14:51:40.600386     PCI: 00:05.0

 1204 14:51:40.610025     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1205 14:51:40.613340     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1206 14:51:40.616877      GENERIC: 0.0

 1207 14:51:40.616950     PCI: 00:08.0

 1208 14:51:40.626812     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1209 14:51:40.629997     PCI: 00:0a.0

 1210 14:51:40.633733     PCI: 00:0d.0 child on link 0 USB0 port 0

 1211 14:51:40.643452     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1212 14:51:40.650026      USB0 port 0 child on link 0 USB3 port 0

 1213 14:51:40.650109       USB3 port 0

 1214 14:51:40.653293       USB3 port 1

 1215 14:51:40.653376       USB3 port 2

 1216 14:51:40.656389       USB3 port 3

 1217 14:51:40.659867     PCI: 00:14.0 child on link 0 USB0 port 0

 1218 14:51:40.670106     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1219 14:51:40.672821      USB0 port 0 child on link 0 USB2 port 0

 1220 14:51:40.676446       USB2 port 0

 1221 14:51:40.676525       USB2 port 1

 1222 14:51:40.680614       USB2 port 2

 1223 14:51:40.683108       USB2 port 3

 1224 14:51:40.683188       USB2 port 4

 1225 14:51:40.686402       USB2 port 5

 1226 14:51:40.686482       USB2 port 6

 1227 14:51:40.689965       USB2 port 7

 1228 14:51:40.690048       USB2 port 8

 1229 14:51:40.693005       USB2 port 9

 1230 14:51:40.693085       USB3 port 0

 1231 14:51:40.696209       USB3 port 1

 1232 14:51:40.696305       USB3 port 2

 1233 14:51:40.699918       USB3 port 3

 1234 14:51:40.700051     PCI: 00:14.2

 1235 14:51:40.709738     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1236 14:51:40.719841     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1237 14:51:40.726331     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1238 14:51:40.736286     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1239 14:51:40.736371      GENERIC: 0.0

 1240 14:51:40.743385     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1241 14:51:40.752871     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1242 14:51:40.752958      I2C: 00:1a

 1243 14:51:40.753062      I2C: 00:31

 1244 14:51:40.756219      I2C: 00:32

 1245 14:51:40.759534     PCI: 00:15.1 child on link 0 I2C: 00:10

 1246 14:51:40.769470     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1247 14:51:40.773342      I2C: 00:10

 1248 14:51:40.773423     PCI: 00:15.2

 1249 14:51:40.782659     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1250 14:51:40.786495     PCI: 00:15.3

 1251 14:51:40.795768     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1252 14:51:40.795850     PCI: 00:16.0

 1253 14:51:40.806400     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1254 14:51:40.809273     PCI: 00:19.0

 1255 14:51:40.813032     PCI: 00:19.1 child on link 0 I2C: 00:15

 1256 14:51:40.822739     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1257 14:51:40.822851      I2C: 00:15

 1258 14:51:40.829798     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1259 14:51:40.835903     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1260 14:51:40.845750     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1261 14:51:40.856053     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1262 14:51:40.859821      GENERIC: 0.0

 1263 14:51:40.860121      PCI: 01:00.0

 1264 14:51:40.868946      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1265 14:51:40.878977      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1266 14:51:40.889399      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1267 14:51:40.889532     PCI: 00:1e.0

 1268 14:51:40.902457     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1269 14:51:40.905788     PCI: 00:1e.2 child on link 0 SPI: 00

 1270 14:51:40.915818     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1271 14:51:40.915901      SPI: 00

 1272 14:51:40.919131     PCI: 00:1e.3 child on link 0 SPI: 00

 1273 14:51:40.929293     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1274 14:51:40.932393      SPI: 00

 1275 14:51:40.936058     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1276 14:51:40.945592     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1277 14:51:40.946045      PNP: 0c09.0

 1278 14:51:40.956038      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1279 14:51:40.958814     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1280 14:51:40.969141     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1281 14:51:40.979026     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1282 14:51:40.982392      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1283 14:51:40.985888       GENERIC: 0.0

 1284 14:51:40.986424       GENERIC: 1.0

 1285 14:51:40.989428     PCI: 00:1f.3

 1286 14:51:40.998999     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1287 14:51:41.009029     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1288 14:51:41.009499     PCI: 00:1f.5

 1289 14:51:41.018736     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1290 14:51:41.025383    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1291 14:51:41.025805     APIC: 00

 1292 14:51:41.026161     APIC: 01

 1293 14:51:41.028826     APIC: 03

 1294 14:51:41.029244     APIC: 07

 1295 14:51:41.029570     APIC: 05

 1296 14:51:41.032210     APIC: 04

 1297 14:51:41.032626     APIC: 02

 1298 14:51:41.035340     APIC: 06

 1299 14:51:41.042041  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1300 14:51:41.048562   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1301 14:51:41.055376   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1302 14:51:41.058676   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1303 14:51:41.064895    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1304 14:51:41.068402    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1305 14:51:41.071819    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1306 14:51:41.078649   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1307 14:51:41.089588   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1308 14:51:41.095127   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1309 14:51:41.101904  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1310 14:51:41.108503  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1311 14:51:41.114794   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1312 14:51:41.121502   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1313 14:51:41.131529   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1314 14:51:41.135215   DOMAIN: 0000: Resource ranges:

 1315 14:51:41.138565   * Base: 1000, Size: 800, Tag: 100

 1316 14:51:41.141352   * Base: 1900, Size: e700, Tag: 100

 1317 14:51:41.144585    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1318 14:51:41.151464  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1319 14:51:41.161348  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1320 14:51:41.168249   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1321 14:51:41.174709   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1322 14:51:41.184570   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1323 14:51:41.191031   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1324 14:51:41.197570   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1325 14:51:41.204545   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1326 14:51:41.214363   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1327 14:51:41.221300   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1328 14:51:41.227740   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1329 14:51:41.237700   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1330 14:51:41.244464   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1331 14:51:41.250898   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1332 14:51:41.261174   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1333 14:51:41.267998   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1334 14:51:41.274115   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1335 14:51:41.284246   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1336 14:51:41.290632   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1337 14:51:41.297847   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1338 14:51:41.307354   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1339 14:51:41.313950   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1340 14:51:41.321199   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1341 14:51:41.330612   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1342 14:51:41.334138   DOMAIN: 0000: Resource ranges:

 1343 14:51:41.337179   * Base: 7fc00000, Size: 40400000, Tag: 200

 1344 14:51:41.341098   * Base: d0000000, Size: 28000000, Tag: 200

 1345 14:51:41.347356   * Base: fa000000, Size: 1000000, Tag: 200

 1346 14:51:41.350465   * Base: fb001000, Size: 2fff000, Tag: 200

 1347 14:51:41.354123   * Base: fe010000, Size: 2e000, Tag: 200

 1348 14:51:41.357222   * Base: fe03f000, Size: d41000, Tag: 200

 1349 14:51:41.363925   * Base: fed88000, Size: 8000, Tag: 200

 1350 14:51:41.367091   * Base: fed93000, Size: d000, Tag: 200

 1351 14:51:41.370513   * Base: feda2000, Size: 1e000, Tag: 200

 1352 14:51:41.374087   * Base: fede0000, Size: 1220000, Tag: 200

 1353 14:51:41.380568   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1354 14:51:41.387293    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1355 14:51:41.393672    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1356 14:51:41.400230    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1357 14:51:41.406627    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1358 14:51:41.413541    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1359 14:51:41.420423    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1360 14:51:41.426783    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1361 14:51:41.433578    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1362 14:51:41.440225    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1363 14:51:41.447628    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1364 14:51:41.453434    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1365 14:51:41.459908    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1366 14:51:41.466349    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1367 14:51:41.472902    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1368 14:51:41.479610    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1369 14:51:41.486114    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1370 14:51:41.493002    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1371 14:51:41.499213    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1372 14:51:41.505927    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1373 14:51:41.512956    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1374 14:51:41.519869    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1375 14:51:41.526264    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1376 14:51:41.532838  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1377 14:51:41.539780  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1378 14:51:41.542778   PCI: 00:1d.0: Resource ranges:

 1379 14:51:41.549412   * Base: 7fc00000, Size: 100000, Tag: 200

 1380 14:51:41.556246    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1381 14:51:41.562910    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1382 14:51:41.569537    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1383 14:51:41.576501  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1384 14:51:41.583059  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1385 14:51:41.589608  Root Device assign_resources, bus 0 link: 0

 1386 14:51:41.592826  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1387 14:51:41.602579  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1388 14:51:41.609624  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1389 14:51:41.619342  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1390 14:51:41.626076  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1391 14:51:41.629071  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1392 14:51:41.635794  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1393 14:51:41.642594  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1394 14:51:41.652717  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1395 14:51:41.659234  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1396 14:51:41.665882  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1397 14:51:41.669444  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1398 14:51:41.679147  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1399 14:51:41.682200  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1400 14:51:41.685816  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1401 14:51:41.696048  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1402 14:51:41.702441  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1403 14:51:41.712275  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1404 14:51:41.715370  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1405 14:51:41.722046  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1406 14:51:41.728660  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1407 14:51:41.731930  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1408 14:51:41.738938  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1409 14:51:41.745567  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1410 14:51:41.751778  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1411 14:51:41.755606  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1412 14:51:41.765299  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1413 14:51:41.771753  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1414 14:51:41.778478  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1415 14:51:41.789126  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1416 14:51:41.792144  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1417 14:51:41.798279  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1418 14:51:41.804887  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1419 14:51:41.815397  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1420 14:51:41.825375  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1421 14:51:41.829151  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1422 14:51:41.838249  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1423 14:51:41.845110  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1424 14:51:41.854761  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1425 14:51:41.858714  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1426 14:51:41.868074  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1427 14:51:41.871385  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1428 14:51:41.874391  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1429 14:51:41.884701  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1430 14:51:41.887790  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1431 14:51:41.894609  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1432 14:51:41.898044  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1433 14:51:41.901326  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1434 14:51:41.908139  LPC: Trying to open IO window from 800 size 1ff

 1435 14:51:41.914277  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1436 14:51:41.924177  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1437 14:51:41.931632  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1438 14:51:41.937831  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1439 14:51:41.941074  Root Device assign_resources, bus 0 link: 0

 1440 14:51:41.944587  Done setting resources.

 1441 14:51:41.950678  Show resources in subtree (Root Device)...After assigning values.

 1442 14:51:41.954398   Root Device child on link 0 DOMAIN: 0000

 1443 14:51:41.957675    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1444 14:51:41.967606    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1445 14:51:41.977412    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1446 14:51:41.980708     PCI: 00:00.0

 1447 14:51:41.990786     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1448 14:51:41.997664     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1449 14:51:42.007713     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1450 14:51:42.017387     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1451 14:51:42.027581     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1452 14:51:42.037321     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1453 14:51:42.047204     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1454 14:51:42.053745     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1455 14:51:42.063847     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1456 14:51:42.073939     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1457 14:51:42.083783     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1458 14:51:42.093838     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1459 14:51:42.103385     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1460 14:51:42.110478     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1461 14:51:42.120606     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1462 14:51:42.129782     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1463 14:51:42.140020     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1464 14:51:42.150079     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1465 14:51:42.159757     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1466 14:51:42.169703     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1467 14:51:42.170325     PCI: 00:02.0

 1468 14:51:42.179628     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1469 14:51:42.189701     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1470 14:51:42.199635     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1471 14:51:42.206695     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1472 14:51:42.216062     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1473 14:51:42.216519      GENERIC: 0.0

 1474 14:51:42.220070     PCI: 00:05.0

 1475 14:51:42.229372     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1476 14:51:42.232585     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1477 14:51:42.235694      GENERIC: 0.0

 1478 14:51:42.235800     PCI: 00:08.0

 1479 14:51:42.245494     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1480 14:51:42.249253     PCI: 00:0a.0

 1481 14:51:42.252732     PCI: 00:0d.0 child on link 0 USB0 port 0

 1482 14:51:42.262595     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1483 14:51:42.269113      USB0 port 0 child on link 0 USB3 port 0

 1484 14:51:42.269193       USB3 port 0

 1485 14:51:42.272374       USB3 port 1

 1486 14:51:42.272454       USB3 port 2

 1487 14:51:42.275618       USB3 port 3

 1488 14:51:42.278882     PCI: 00:14.0 child on link 0 USB0 port 0

 1489 14:51:42.289487     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1490 14:51:42.296106      USB0 port 0 child on link 0 USB2 port 0

 1491 14:51:42.296186       USB2 port 0

 1492 14:51:42.299018       USB2 port 1

 1493 14:51:42.299097       USB2 port 2

 1494 14:51:42.303035       USB2 port 3

 1495 14:51:42.303122       USB2 port 4

 1496 14:51:42.305926       USB2 port 5

 1497 14:51:42.306005       USB2 port 6

 1498 14:51:42.309096       USB2 port 7

 1499 14:51:42.309176       USB2 port 8

 1500 14:51:42.312583       USB2 port 9

 1501 14:51:42.312662       USB3 port 0

 1502 14:51:42.315514       USB3 port 1

 1503 14:51:42.319481       USB3 port 2

 1504 14:51:42.319562       USB3 port 3

 1505 14:51:42.322020     PCI: 00:14.2

 1506 14:51:42.331839     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1507 14:51:42.342221     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1508 14:51:42.345438     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1509 14:51:42.355184     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1510 14:51:42.358780      GENERIC: 0.0

 1511 14:51:42.362215     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1512 14:51:42.371771     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1513 14:51:42.375137      I2C: 00:1a

 1514 14:51:42.375217      I2C: 00:31

 1515 14:51:42.378711      I2C: 00:32

 1516 14:51:42.381654     PCI: 00:15.1 child on link 0 I2C: 00:10

 1517 14:51:42.392196     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1518 14:51:42.395510      I2C: 00:10

 1519 14:51:42.395590     PCI: 00:15.2

 1520 14:51:42.405239     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1521 14:51:42.408311     PCI: 00:15.3

 1522 14:51:42.418332     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1523 14:51:42.418414     PCI: 00:16.0

 1524 14:51:42.428200     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1525 14:51:42.431848     PCI: 00:19.0

 1526 14:51:42.434908     PCI: 00:19.1 child on link 0 I2C: 00:15

 1527 14:51:42.445210     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1528 14:51:42.448474      I2C: 00:15

 1529 14:51:42.451701     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1530 14:51:42.461926     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1531 14:51:42.471525     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1532 14:51:42.485209     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1533 14:51:42.485293      GENERIC: 0.0

 1534 14:51:42.488752      PCI: 01:00.0

 1535 14:51:42.498145      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1536 14:51:42.508696      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1537 14:51:42.517837      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1538 14:51:42.521045     PCI: 00:1e.0

 1539 14:51:42.531318     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1540 14:51:42.534702     PCI: 00:1e.2 child on link 0 SPI: 00

 1541 14:51:42.544688     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1542 14:51:42.547841      SPI: 00

 1543 14:51:42.551273     PCI: 00:1e.3 child on link 0 SPI: 00

 1544 14:51:42.561001     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1545 14:51:42.561077      SPI: 00

 1546 14:51:42.567990     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1547 14:51:42.574045     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1548 14:51:42.577656      PNP: 0c09.0

 1549 14:51:42.584180      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1550 14:51:42.591253     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1551 14:51:42.601018     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1552 14:51:42.607554     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1553 14:51:42.613889      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1554 14:51:42.613969       GENERIC: 0.0

 1555 14:51:42.617267       GENERIC: 1.0

 1556 14:51:42.617337     PCI: 00:1f.3

 1557 14:51:42.630901     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1558 14:51:42.641128     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1559 14:51:42.641213     PCI: 00:1f.5

 1560 14:51:42.650944     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1561 14:51:42.657332    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1562 14:51:42.657414     APIC: 00

 1563 14:51:42.657477     APIC: 01

 1564 14:51:42.661193     APIC: 03

 1565 14:51:42.661274     APIC: 07

 1566 14:51:42.664286     APIC: 05

 1567 14:51:42.664367     APIC: 04

 1568 14:51:42.664452     APIC: 02

 1569 14:51:42.667338     APIC: 06

 1570 14:51:42.667419  Done allocating resources.

 1571 14:51:42.674256  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1572 14:51:42.680712  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1573 14:51:42.684144  Configure GPIOs for I2S audio on UP4.

 1574 14:51:42.691139  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1575 14:51:42.695095  Enabling resources...

 1576 14:51:42.698354  PCI: 00:00.0 subsystem <- 8086/9a12

 1577 14:51:42.701197  PCI: 00:00.0 cmd <- 06

 1578 14:51:42.704771  PCI: 00:02.0 subsystem <- 8086/9a40

 1579 14:51:42.707766  PCI: 00:02.0 cmd <- 03

 1580 14:51:42.711188  PCI: 00:04.0 subsystem <- 8086/9a03

 1581 14:51:42.714651  PCI: 00:04.0 cmd <- 02

 1582 14:51:42.717841  PCI: 00:05.0 subsystem <- 8086/9a19

 1583 14:51:42.717923  PCI: 00:05.0 cmd <- 02

 1584 14:51:42.724338  PCI: 00:08.0 subsystem <- 8086/9a11

 1585 14:51:42.724419  PCI: 00:08.0 cmd <- 06

 1586 14:51:42.727424  PCI: 00:0d.0 subsystem <- 8086/9a13

 1587 14:51:42.730546  PCI: 00:0d.0 cmd <- 02

 1588 14:51:42.734841  PCI: 00:14.0 subsystem <- 8086/a0ed

 1589 14:51:42.737655  PCI: 00:14.0 cmd <- 02

 1590 14:51:42.741036  PCI: 00:14.2 subsystem <- 8086/a0ef

 1591 14:51:42.743938  PCI: 00:14.2 cmd <- 02

 1592 14:51:42.747517  PCI: 00:14.3 subsystem <- 8086/a0f0

 1593 14:51:42.750929  PCI: 00:14.3 cmd <- 02

 1594 14:51:42.754118  PCI: 00:15.0 subsystem <- 8086/a0e8

 1595 14:51:42.757391  PCI: 00:15.0 cmd <- 02

 1596 14:51:42.760804  PCI: 00:15.1 subsystem <- 8086/a0e9

 1597 14:51:42.763917  PCI: 00:15.1 cmd <- 02

 1598 14:51:42.767327  PCI: 00:15.2 subsystem <- 8086/a0ea

 1599 14:51:42.767410  PCI: 00:15.2 cmd <- 02

 1600 14:51:42.774180  PCI: 00:15.3 subsystem <- 8086/a0eb

 1601 14:51:42.774264  PCI: 00:15.3 cmd <- 02

 1602 14:51:42.777361  PCI: 00:16.0 subsystem <- 8086/a0e0

 1603 14:51:42.780628  PCI: 00:16.0 cmd <- 02

 1604 14:51:42.784076  PCI: 00:19.1 subsystem <- 8086/a0c6

 1605 14:51:42.787322  PCI: 00:19.1 cmd <- 02

 1606 14:51:42.790555  PCI: 00:1d.0 bridge ctrl <- 0013

 1607 14:51:42.794045  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1608 14:51:42.796883  PCI: 00:1d.0 cmd <- 06

 1609 14:51:42.800444  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1610 14:51:42.803871  PCI: 00:1e.0 cmd <- 06

 1611 14:51:42.807245  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1612 14:51:42.809940  PCI: 00:1e.2 cmd <- 06

 1613 14:51:42.814158  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1614 14:51:42.816855  PCI: 00:1e.3 cmd <- 02

 1615 14:51:42.820065  PCI: 00:1f.0 subsystem <- 8086/a087

 1616 14:51:42.823308  PCI: 00:1f.0 cmd <- 407

 1617 14:51:42.826885  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1618 14:51:42.826969  PCI: 00:1f.3 cmd <- 02

 1619 14:51:42.833502  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1620 14:51:42.833634  PCI: 00:1f.5 cmd <- 406

 1621 14:51:42.838935  PCI: 01:00.0 cmd <- 02

 1622 14:51:42.843251  done.

 1623 14:51:42.846758  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1624 14:51:42.850044  Initializing devices...

 1625 14:51:42.853179  Root Device init

 1626 14:51:42.856079  Chrome EC: Set SMI mask to 0x0000000000000000

 1627 14:51:42.863657  Chrome EC: clear events_b mask to 0x0000000000000000

 1628 14:51:42.869978  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1629 14:51:42.876444  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1630 14:51:42.882931  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1631 14:51:42.886609  Chrome EC: Set WAKE mask to 0x0000000000000000

 1632 14:51:42.893840  fw_config match found: DB_USB=USB3_ACTIVE

 1633 14:51:42.897115  Configure Right Type-C port orientation for retimer

 1634 14:51:42.900525  Root Device init finished in 45 msecs

 1635 14:51:42.904826  PCI: 00:00.0 init

 1636 14:51:42.908250  CPU TDP = 9 Watts

 1637 14:51:42.908333  CPU PL1 = 9 Watts

 1638 14:51:42.911494  CPU PL2 = 40 Watts

 1639 14:51:42.914425  CPU PL4 = 83 Watts

 1640 14:51:42.918005  PCI: 00:00.0 init finished in 8 msecs

 1641 14:51:42.918088  PCI: 00:02.0 init

 1642 14:51:42.921616  GMA: Found VBT in CBFS

 1643 14:51:42.924473  GMA: Found valid VBT in CBFS

 1644 14:51:42.931671  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1645 14:51:42.938025                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1646 14:51:42.940992  PCI: 00:02.0 init finished in 18 msecs

 1647 14:51:42.944841  PCI: 00:05.0 init

 1648 14:51:42.947507  PCI: 00:05.0 init finished in 0 msecs

 1649 14:51:42.951194  PCI: 00:08.0 init

 1650 14:51:42.954551  PCI: 00:08.0 init finished in 0 msecs

 1651 14:51:42.957753  PCI: 00:14.0 init

 1652 14:51:42.960628  PCI: 00:14.0 init finished in 0 msecs

 1653 14:51:42.964178  PCI: 00:14.2 init

 1654 14:51:42.967933  PCI: 00:14.2 init finished in 0 msecs

 1655 14:51:42.971523  PCI: 00:15.0 init

 1656 14:51:42.971606  I2C bus 0 version 0x3230302a

 1657 14:51:42.977711  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1658 14:51:42.980821  PCI: 00:15.0 init finished in 6 msecs

 1659 14:51:42.980904  PCI: 00:15.1 init

 1660 14:51:42.983860  I2C bus 1 version 0x3230302a

 1661 14:51:42.987400  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1662 14:51:42.993915  PCI: 00:15.1 init finished in 6 msecs

 1663 14:51:42.994024  PCI: 00:15.2 init

 1664 14:51:42.997584  I2C bus 2 version 0x3230302a

 1665 14:51:43.000850  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1666 14:51:43.004098  PCI: 00:15.2 init finished in 6 msecs

 1667 14:51:43.007280  PCI: 00:15.3 init

 1668 14:51:43.010370  I2C bus 3 version 0x3230302a

 1669 14:51:43.013944  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1670 14:51:43.017366  PCI: 00:15.3 init finished in 6 msecs

 1671 14:51:43.021037  PCI: 00:16.0 init

 1672 14:51:43.024196  PCI: 00:16.0 init finished in 0 msecs

 1673 14:51:43.027386  PCI: 00:19.1 init

 1674 14:51:43.030206  I2C bus 5 version 0x3230302a

 1675 14:51:43.033513  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1676 14:51:43.037148  PCI: 00:19.1 init finished in 6 msecs

 1677 14:51:43.040530  PCI: 00:1d.0 init

 1678 14:51:43.040630  Initializing PCH PCIe bridge.

 1679 14:51:43.047276  PCI: 00:1d.0 init finished in 3 msecs

 1680 14:51:43.050265  PCI: 00:1f.0 init

 1681 14:51:43.053479  IOAPIC: Initializing IOAPIC at 0xfec00000

 1682 14:51:43.057006  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1683 14:51:43.060187  IOAPIC: ID = 0x02

 1684 14:51:43.063274  IOAPIC: Dumping registers

 1685 14:51:43.063374    reg 0x0000: 0x02000000

 1686 14:51:43.066981    reg 0x0001: 0x00770020

 1687 14:51:43.070279    reg 0x0002: 0x00000000

 1688 14:51:43.073371  PCI: 00:1f.0 init finished in 21 msecs

 1689 14:51:43.076588  PCI: 00:1f.2 init

 1690 14:51:43.080494  Disabling ACPI via APMC.

 1691 14:51:43.080601  APMC done.

 1692 14:51:43.083760  PCI: 00:1f.2 init finished in 5 msecs

 1693 14:51:43.096903  PCI: 01:00.0 init

 1694 14:51:43.100596  PCI: 01:00.0 init finished in 0 msecs

 1695 14:51:43.103804  PNP: 0c09.0 init

 1696 14:51:43.107098  Google Chrome EC uptime: 8.408 seconds

 1697 14:51:43.113942  Google Chrome AP resets since EC boot: 1

 1698 14:51:43.117153  Google Chrome most recent AP reset causes:

 1699 14:51:43.120242  	0.348: 32775 shutdown: entering G3

 1700 14:51:43.126990  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1701 14:51:43.129906  PNP: 0c09.0 init finished in 22 msecs

 1702 14:51:43.136409  Devices initialized

 1703 14:51:43.138998  Show all devs... After init.

 1704 14:51:43.142766  Root Device: enabled 1

 1705 14:51:43.142867  DOMAIN: 0000: enabled 1

 1706 14:51:43.146310  CPU_CLUSTER: 0: enabled 1

 1707 14:51:43.148986  PCI: 00:00.0: enabled 1

 1708 14:51:43.152594  PCI: 00:02.0: enabled 1

 1709 14:51:43.152701  PCI: 00:04.0: enabled 1

 1710 14:51:43.155532  PCI: 00:05.0: enabled 1

 1711 14:51:43.158820  PCI: 00:06.0: enabled 0

 1712 14:51:43.162345  PCI: 00:07.0: enabled 0

 1713 14:51:43.162453  PCI: 00:07.1: enabled 0

 1714 14:51:43.165838  PCI: 00:07.2: enabled 0

 1715 14:51:43.169571  PCI: 00:07.3: enabled 0

 1716 14:51:43.172461  PCI: 00:08.0: enabled 1

 1717 14:51:43.172534  PCI: 00:09.0: enabled 0

 1718 14:51:43.175838  PCI: 00:0a.0: enabled 0

 1719 14:51:43.179477  PCI: 00:0d.0: enabled 1

 1720 14:51:43.182513  PCI: 00:0d.1: enabled 0

 1721 14:51:43.182612  PCI: 00:0d.2: enabled 0

 1722 14:51:43.185605  PCI: 00:0d.3: enabled 0

 1723 14:51:43.189595  PCI: 00:0e.0: enabled 0

 1724 14:51:43.189696  PCI: 00:10.2: enabled 1

 1725 14:51:43.192178  PCI: 00:10.6: enabled 0

 1726 14:51:43.195688  PCI: 00:10.7: enabled 0

 1727 14:51:43.199110  PCI: 00:12.0: enabled 0

 1728 14:51:43.199211  PCI: 00:12.6: enabled 0

 1729 14:51:43.202749  PCI: 00:13.0: enabled 0

 1730 14:51:43.206000  PCI: 00:14.0: enabled 1

 1731 14:51:43.208643  PCI: 00:14.1: enabled 0

 1732 14:51:43.208749  PCI: 00:14.2: enabled 1

 1733 14:51:43.212582  PCI: 00:14.3: enabled 1

 1734 14:51:43.215612  PCI: 00:15.0: enabled 1

 1735 14:51:43.218778  PCI: 00:15.1: enabled 1

 1736 14:51:43.218886  PCI: 00:15.2: enabled 1

 1737 14:51:43.222185  PCI: 00:15.3: enabled 1

 1738 14:51:43.225604  PCI: 00:16.0: enabled 1

 1739 14:51:43.225712  PCI: 00:16.1: enabled 0

 1740 14:51:43.228861  PCI: 00:16.2: enabled 0

 1741 14:51:43.232461  PCI: 00:16.3: enabled 0

 1742 14:51:43.235605  PCI: 00:16.4: enabled 0

 1743 14:51:43.235711  PCI: 00:16.5: enabled 0

 1744 14:51:43.239135  PCI: 00:17.0: enabled 0

 1745 14:51:43.242281  PCI: 00:19.0: enabled 0

 1746 14:51:43.245413  PCI: 00:19.1: enabled 1

 1747 14:51:43.245519  PCI: 00:19.2: enabled 0

 1748 14:51:43.248477  PCI: 00:1c.0: enabled 1

 1749 14:51:43.252088  PCI: 00:1c.1: enabled 0

 1750 14:51:43.256041  PCI: 00:1c.2: enabled 0

 1751 14:51:43.256142  PCI: 00:1c.3: enabled 0

 1752 14:51:43.259071  PCI: 00:1c.4: enabled 0

 1753 14:51:43.262183  PCI: 00:1c.5: enabled 0

 1754 14:51:43.266038  PCI: 00:1c.6: enabled 1

 1755 14:51:43.266135  PCI: 00:1c.7: enabled 0

 1756 14:51:43.268533  PCI: 00:1d.0: enabled 1

 1757 14:51:43.272271  PCI: 00:1d.1: enabled 0

 1758 14:51:43.272369  PCI: 00:1d.2: enabled 1

 1759 14:51:43.275792  PCI: 00:1d.3: enabled 0

 1760 14:51:43.278717  PCI: 00:1e.0: enabled 1

 1761 14:51:43.282474  PCI: 00:1e.1: enabled 0

 1762 14:51:43.282572  PCI: 00:1e.2: enabled 1

 1763 14:51:43.285262  PCI: 00:1e.3: enabled 1

 1764 14:51:43.288635  PCI: 00:1f.0: enabled 1

 1765 14:51:43.292017  PCI: 00:1f.1: enabled 0

 1766 14:51:43.292119  PCI: 00:1f.2: enabled 1

 1767 14:51:43.295177  PCI: 00:1f.3: enabled 1

 1768 14:51:43.298690  PCI: 00:1f.4: enabled 0

 1769 14:51:43.301872  PCI: 00:1f.5: enabled 1

 1770 14:51:43.301971  PCI: 00:1f.6: enabled 0

 1771 14:51:43.305538  PCI: 00:1f.7: enabled 0

 1772 14:51:43.308472  APIC: 00: enabled 1

 1773 14:51:43.308576  GENERIC: 0.0: enabled 1

 1774 14:51:43.312342  GENERIC: 0.0: enabled 1

 1775 14:51:43.315079  GENERIC: 1.0: enabled 1

 1776 14:51:43.318883  GENERIC: 0.0: enabled 1

 1777 14:51:43.318983  GENERIC: 1.0: enabled 1

 1778 14:51:43.322199  USB0 port 0: enabled 1

 1779 14:51:43.325218  GENERIC: 0.0: enabled 1

 1780 14:51:43.325335  USB0 port 0: enabled 1

 1781 14:51:43.328423  GENERIC: 0.0: enabled 1

 1782 14:51:43.332164  I2C: 00:1a: enabled 1

 1783 14:51:43.335085  I2C: 00:31: enabled 1

 1784 14:51:43.335159  I2C: 00:32: enabled 1

 1785 14:51:43.338489  I2C: 00:10: enabled 1

 1786 14:51:43.341933  I2C: 00:15: enabled 1

 1787 14:51:43.342036  GENERIC: 0.0: enabled 0

 1788 14:51:43.345065  GENERIC: 1.0: enabled 0

 1789 14:51:43.348486  GENERIC: 0.0: enabled 1

 1790 14:51:43.348604  SPI: 00: enabled 1

 1791 14:51:43.351517  SPI: 00: enabled 1

 1792 14:51:43.354859  PNP: 0c09.0: enabled 1

 1793 14:51:43.354964  GENERIC: 0.0: enabled 1

 1794 14:51:43.358175  USB3 port 0: enabled 1

 1795 14:51:43.361976  USB3 port 1: enabled 1

 1796 14:51:43.364709  USB3 port 2: enabled 0

 1797 14:51:43.364809  USB3 port 3: enabled 0

 1798 14:51:43.368388  USB2 port 0: enabled 0

 1799 14:51:43.371741  USB2 port 1: enabled 1

 1800 14:51:43.371839  USB2 port 2: enabled 1

 1801 14:51:43.375182  USB2 port 3: enabled 0

 1802 14:51:43.378492  USB2 port 4: enabled 1

 1803 14:51:43.378593  USB2 port 5: enabled 0

 1804 14:51:43.382124  USB2 port 6: enabled 0

 1805 14:51:43.384903  USB2 port 7: enabled 0

 1806 14:51:43.388975  USB2 port 8: enabled 0

 1807 14:51:43.389049  USB2 port 9: enabled 0

 1808 14:51:43.391882  USB3 port 0: enabled 0

 1809 14:51:43.394980  USB3 port 1: enabled 1

 1810 14:51:43.395083  USB3 port 2: enabled 0

 1811 14:51:43.397953  USB3 port 3: enabled 0

 1812 14:51:43.401334  GENERIC: 0.0: enabled 1

 1813 14:51:43.405426  GENERIC: 1.0: enabled 1

 1814 14:51:43.405528  APIC: 01: enabled 1

 1815 14:51:43.408583  APIC: 03: enabled 1

 1816 14:51:43.408685  APIC: 07: enabled 1

 1817 14:51:43.411633  APIC: 05: enabled 1

 1818 14:51:43.414890  APIC: 04: enabled 1

 1819 14:51:43.414989  APIC: 02: enabled 1

 1820 14:51:43.418366  APIC: 06: enabled 1

 1821 14:51:43.421780  PCI: 01:00.0: enabled 1

 1822 14:51:43.424631  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms

 1823 14:51:43.431712  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1824 14:51:43.435064  ELOG: NV offset 0xf30000 size 0x1000

 1825 14:51:43.441708  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1826 14:51:43.448144  ELOG: Event(17) added with size 13 at 2023-05-03 14:51:43 UTC

 1827 14:51:43.454659  ELOG: Event(92) added with size 9 at 2023-05-03 14:51:43 UTC

 1828 14:51:43.461554  ELOG: Event(93) added with size 9 at 2023-05-03 14:51:43 UTC

 1829 14:51:43.467936  ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:43 UTC

 1830 14:51:43.474460  ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:43 UTC

 1831 14:51:43.477938  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1832 14:51:43.484796  ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:43 UTC

 1833 14:51:43.491098  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1834 14:51:43.498265  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1835 14:51:43.501396  Finalize devices...

 1836 14:51:43.501483  Devices finalized

 1837 14:51:43.508173  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1838 14:51:43.511005  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1839 14:51:43.517953  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1840 14:51:43.524635  ME: HFSTS1                      : 0x80030055

 1841 14:51:43.528087  ME: HFSTS2                      : 0x30280116

 1842 14:51:43.531347  ME: HFSTS3                      : 0x00000050

 1843 14:51:43.537454  ME: HFSTS4                      : 0x00004000

 1844 14:51:43.541165  ME: HFSTS5                      : 0x00000000

 1845 14:51:43.544623  ME: HFSTS6                      : 0x00400006

 1846 14:51:43.547901  ME: Manufacturing Mode          : YES

 1847 14:51:43.554011  ME: SPI Protection Mode Enabled : NO

 1848 14:51:43.557625  ME: FW Partition Table          : OK

 1849 14:51:43.560800  ME: Bringup Loader Failure      : NO

 1850 14:51:43.564313  ME: Firmware Init Complete      : NO

 1851 14:51:43.567947  ME: Boot Options Present        : NO

 1852 14:51:43.571313  ME: Update In Progress          : NO

 1853 14:51:43.574231  ME: D0i3 Support                : YES

 1854 14:51:43.577320  ME: Low Power State Enabled     : NO

 1855 14:51:43.584266  ME: CPU Replaced                : YES

 1856 14:51:43.587452  ME: CPU Replacement Valid       : YES

 1857 14:51:43.591466  ME: Current Working State       : 5

 1858 14:51:43.594107  ME: Current Operation State     : 1

 1859 14:51:43.597627  ME: Current Operation Mode      : 3

 1860 14:51:43.600858  ME: Error Code                  : 0

 1861 14:51:43.603931  ME: Enhanced Debug Mode         : NO

 1862 14:51:43.607436  ME: CPU Debug Disabled          : YES

 1863 14:51:43.610857  ME: TXT Support                 : NO

 1864 14:51:43.617336  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1865 14:51:43.627275  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1866 14:51:43.630255  CBFS: 'fallback/slic' not found.

 1867 14:51:43.633993  ACPI: Writing ACPI tables at 76b01000.

 1868 14:51:43.634076  ACPI:    * FACS

 1869 14:51:43.637168  ACPI:    * DSDT

 1870 14:51:43.640244  Ramoops buffer: 0x100000@0x76a00000.

 1871 14:51:43.643715  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1872 14:51:43.651251  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1873 14:51:43.653555  Google Chrome EC: version:

 1874 14:51:43.657313  	ro: voema_v2.0.7540-147f8d37d1

 1875 14:51:43.660190  	rw: voema_v2.0.7540-147f8d37d1

 1876 14:51:43.660287    running image: 2

 1877 14:51:43.667371  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1878 14:51:43.671941  ACPI:    * FADT

 1879 14:51:43.672044  SCI is IRQ9

 1880 14:51:43.678999  ACPI: added table 1/32, length now 40

 1881 14:51:43.679079  ACPI:     * SSDT

 1882 14:51:43.681955  Found 1 CPU(s) with 8 core(s) each.

 1883 14:51:43.689007  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1884 14:51:43.692161  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1885 14:51:43.695099  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1886 14:51:43.698648  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1887 14:51:43.704849  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1888 14:51:43.711678  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1889 14:51:43.715080  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1890 14:51:43.721523  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1891 14:51:43.728375  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1892 14:51:43.731262  \_SB.PCI0.RP09: Added StorageD3Enable property

 1893 14:51:43.737762  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1894 14:51:43.741572  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1895 14:51:43.747823  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1896 14:51:43.750933  PS2K: Passing 80 keymaps to kernel

 1897 14:51:43.758181  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1898 14:51:43.764783  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1899 14:51:43.770981  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1900 14:51:43.777735  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1901 14:51:43.784214  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1902 14:51:43.790736  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1903 14:51:43.797201  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1904 14:51:43.803869  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1905 14:51:43.807485  ACPI: added table 2/32, length now 44

 1906 14:51:43.807567  ACPI:    * MCFG

 1907 14:51:43.810498  ACPI: added table 3/32, length now 48

 1908 14:51:43.814135  ACPI:    * TPM2

 1909 14:51:43.817048  TPM2 log created at 0x769f0000

 1910 14:51:43.820746  ACPI: added table 4/32, length now 52

 1911 14:51:43.823625  ACPI:    * MADT

 1912 14:51:43.823706  SCI is IRQ9

 1913 14:51:43.827075  ACPI: added table 5/32, length now 56

 1914 14:51:43.830384  current = 76b09850

 1915 14:51:43.830465  ACPI:    * DMAR

 1916 14:51:43.833618  ACPI: added table 6/32, length now 60

 1917 14:51:43.836999  ACPI: added table 7/32, length now 64

 1918 14:51:43.840181  ACPI:    * HPET

 1919 14:51:43.843805  ACPI: added table 8/32, length now 68

 1920 14:51:43.847069  ACPI: done.

 1921 14:51:43.847148  ACPI tables: 35216 bytes.

 1922 14:51:43.850304  smbios_write_tables: 769ef000

 1923 14:51:43.853694  EC returned error result code 3

 1924 14:51:43.856880  Couldn't obtain OEM name from CBI

 1925 14:51:43.860695  Create SMBIOS type 16

 1926 14:51:43.863529  Create SMBIOS type 17

 1927 14:51:43.866837  GENERIC: 0.0 (WIFI Device)

 1928 14:51:43.866917  SMBIOS tables: 1750 bytes.

 1929 14:51:43.873719  Writing table forward entry at 0x00000500

 1930 14:51:43.880152  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1931 14:51:43.883513  Writing coreboot table at 0x76b25000

 1932 14:51:43.890371   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1933 14:51:43.893307   1. 0000000000001000-000000000009ffff: RAM

 1934 14:51:43.896635   2. 00000000000a0000-00000000000fffff: RESERVED

 1935 14:51:43.903198   3. 0000000000100000-00000000769eefff: RAM

 1936 14:51:43.906966   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1937 14:51:43.913367   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1938 14:51:43.920185   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1939 14:51:43.923531   7. 0000000077000000-000000007fbfffff: RESERVED

 1940 14:51:43.926999   8. 00000000c0000000-00000000cfffffff: RESERVED

 1941 14:51:43.933693   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1942 14:51:43.936825  10. 00000000fb000000-00000000fb000fff: RESERVED

 1943 14:51:43.943736  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1944 14:51:43.946578  12. 00000000fed80000-00000000fed87fff: RESERVED

 1945 14:51:43.953228  13. 00000000fed90000-00000000fed92fff: RESERVED

 1946 14:51:43.956615  14. 00000000feda0000-00000000feda1fff: RESERVED

 1947 14:51:43.963365  15. 00000000fedc0000-00000000feddffff: RESERVED

 1948 14:51:43.966568  16. 0000000100000000-00000002803fffff: RAM

 1949 14:51:43.969410  Passing 4 GPIOs to payload:

 1950 14:51:43.973213              NAME |       PORT | POLARITY |     VALUE

 1951 14:51:43.979535               lid |  undefined |     high |      high

 1952 14:51:43.986338             power |  undefined |     high |       low

 1953 14:51:43.990294             oprom |  undefined |     high |       low

 1954 14:51:43.996377          EC in RW | 0x000000e5 |     high |      high

 1955 14:51:44.002773  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8789

 1956 14:51:44.002955  coreboot table: 1576 bytes.

 1957 14:51:44.009562  IMD ROOT    0. 0x76fff000 0x00001000

 1958 14:51:44.012563  IMD SMALL   1. 0x76ffe000 0x00001000

 1959 14:51:44.016548  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1960 14:51:44.019223  VPD         3. 0x76c4d000 0x00000367

 1961 14:51:44.022859  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1962 14:51:44.025898  CONSOLE     5. 0x76c2c000 0x00020000

 1963 14:51:44.029178  FMAP        6. 0x76c2b000 0x00000578

 1964 14:51:44.032830  TIME STAMP  7. 0x76c2a000 0x00000910

 1965 14:51:44.039875  VBOOT WORK  8. 0x76c16000 0x00014000

 1966 14:51:44.042548  ROMSTG STCK 9. 0x76c15000 0x00001000

 1967 14:51:44.046346  AFTER CAR  10. 0x76c0a000 0x0000b000

 1968 14:51:44.049198  RAMSTAGE   11. 0x76b97000 0x00073000

 1969 14:51:44.053087  REFCODE    12. 0x76b42000 0x00055000

 1970 14:51:44.056209  SMM BACKUP 13. 0x76b32000 0x00010000

 1971 14:51:44.059295  4f444749   14. 0x76b30000 0x00002000

 1972 14:51:44.062810  EXT VBT15. 0x76b2d000 0x0000219f

 1973 14:51:44.065778  COREBOOT   16. 0x76b25000 0x00008000

 1974 14:51:44.072757  ACPI       17. 0x76b01000 0x00024000

 1975 14:51:44.075840  ACPI GNVS  18. 0x76b00000 0x00001000

 1976 14:51:44.079540  RAMOOPS    19. 0x76a00000 0x00100000

 1977 14:51:44.082557  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1978 14:51:44.086226  SMBIOS     21. 0x769ef000 0x00000800

 1979 14:51:44.089008  IMD small region:

 1980 14:51:44.092620    IMD ROOT    0. 0x76ffec00 0x00000400

 1981 14:51:44.095862    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1982 14:51:44.099242    POWER STATE 2. 0x76ffeb80 0x00000044

 1983 14:51:44.102908    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1984 14:51:44.105833    MEM INFO    4. 0x76ffe980 0x000001e0

 1985 14:51:44.113267  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1986 14:51:44.115652  MTRR: Physical address space:

 1987 14:51:44.122494  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1988 14:51:44.128969  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1989 14:51:44.135890  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1990 14:51:44.142360  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1991 14:51:44.149059  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1992 14:51:44.152240  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1993 14:51:44.158945  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1994 14:51:44.165852  MTRR: Fixed MSR 0x250 0x0606060606060606

 1995 14:51:44.168772  MTRR: Fixed MSR 0x258 0x0606060606060606

 1996 14:51:44.172453  MTRR: Fixed MSR 0x259 0x0000000000000000

 1997 14:51:44.175388  MTRR: Fixed MSR 0x268 0x0606060606060606

 1998 14:51:44.182761  MTRR: Fixed MSR 0x269 0x0606060606060606

 1999 14:51:44.185570  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2000 14:51:44.189343  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2001 14:51:44.192555  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2002 14:51:44.195842  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2003 14:51:44.202583  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2004 14:51:44.205407  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2005 14:51:44.208800  call enable_fixed_mtrr()

 2006 14:51:44.211890  CPU physical address size: 39 bits

 2007 14:51:44.215203  MTRR: default type WB/UC MTRR counts: 6/6.

 2008 14:51:44.221843  MTRR: UC selected as default type.

 2009 14:51:44.225495  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2010 14:51:44.231825  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2011 14:51:44.238720  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2012 14:51:44.245053  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2013 14:51:44.251781  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2014 14:51:44.258274  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2015 14:51:44.258365  

 2016 14:51:44.261868  MTRR check

 2017 14:51:44.261986  Fixed MTRRs   : Enabled

 2018 14:51:44.265188  Variable MTRRs: Enabled

 2019 14:51:44.265296  

 2020 14:51:44.268350  MTRR: Fixed MSR 0x250 0x0606060606060606

 2021 14:51:44.275731  MTRR: Fixed MSR 0x258 0x0606060606060606

 2022 14:51:44.278545  MTRR: Fixed MSR 0x259 0x0000000000000000

 2023 14:51:44.281647  MTRR: Fixed MSR 0x268 0x0606060606060606

 2024 14:51:44.285322  MTRR: Fixed MSR 0x269 0x0606060606060606

 2025 14:51:44.292559  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2026 14:51:44.295182  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2027 14:51:44.298543  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2028 14:51:44.301956  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2029 14:51:44.304861  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2030 14:51:44.311508  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2031 14:51:44.318188  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2032 14:51:44.321760  call enable_fixed_mtrr()

 2033 14:51:44.325774  Checking cr50 for pending updates

 2034 14:51:44.325871  CPU physical address size: 39 bits

 2035 14:51:44.332138  MTRR: Fixed MSR 0x250 0x0606060606060606

 2036 14:51:44.335623  MTRR: Fixed MSR 0x250 0x0606060606060606

 2037 14:51:44.339058  MTRR: Fixed MSR 0x258 0x0606060606060606

 2038 14:51:44.342777  MTRR: Fixed MSR 0x259 0x0000000000000000

 2039 14:51:44.348849  MTRR: Fixed MSR 0x268 0x0606060606060606

 2040 14:51:44.352293  MTRR: Fixed MSR 0x269 0x0606060606060606

 2041 14:51:44.355331  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2042 14:51:44.358599  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2043 14:51:44.365282  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2044 14:51:44.369138  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2045 14:51:44.372459  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2046 14:51:44.375069  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2047 14:51:44.382322  MTRR: Fixed MSR 0x258 0x0606060606060606

 2048 14:51:44.382416  call enable_fixed_mtrr()

 2049 14:51:44.389364  MTRR: Fixed MSR 0x259 0x0000000000000000

 2050 14:51:44.393056  MTRR: Fixed MSR 0x268 0x0606060606060606

 2051 14:51:44.396219  MTRR: Fixed MSR 0x269 0x0606060606060606

 2052 14:51:44.399232  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2053 14:51:44.406198  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2054 14:51:44.409155  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2055 14:51:44.412283  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2056 14:51:44.416104  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2057 14:51:44.422347  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2058 14:51:44.425782  CPU physical address size: 39 bits

 2059 14:51:44.429047  call enable_fixed_mtrr()

 2060 14:51:44.432394  MTRR: Fixed MSR 0x250 0x0606060606060606

 2061 14:51:44.435760  MTRR: Fixed MSR 0x250 0x0606060606060606

 2062 14:51:44.442609  MTRR: Fixed MSR 0x258 0x0606060606060606

 2063 14:51:44.445402  MTRR: Fixed MSR 0x259 0x0000000000000000

 2064 14:51:44.448848  MTRR: Fixed MSR 0x268 0x0606060606060606

 2065 14:51:44.452257  MTRR: Fixed MSR 0x269 0x0606060606060606

 2066 14:51:44.459355  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2067 14:51:44.462509  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2068 14:51:44.465838  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2069 14:51:44.469067  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2070 14:51:44.475566  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2071 14:51:44.478940  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2072 14:51:44.481799  MTRR: Fixed MSR 0x258 0x0606060606060606

 2073 14:51:44.485565  call enable_fixed_mtrr()

 2074 14:51:44.489023  MTRR: Fixed MSR 0x259 0x0000000000000000

 2075 14:51:44.495375  MTRR: Fixed MSR 0x268 0x0606060606060606

 2076 14:51:44.498392  MTRR: Fixed MSR 0x269 0x0606060606060606

 2077 14:51:44.501801  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2078 14:51:44.505066  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2079 14:51:44.511619  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2080 14:51:44.514907  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2081 14:51:44.518185  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2082 14:51:44.521886  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2083 14:51:44.525651  CPU physical address size: 39 bits

 2084 14:51:44.532285  call enable_fixed_mtrr()

 2085 14:51:44.535509  MTRR: Fixed MSR 0x250 0x0606060606060606

 2086 14:51:44.539147  MTRR: Fixed MSR 0x250 0x0606060606060606

 2087 14:51:44.542074  MTRR: Fixed MSR 0x258 0x0606060606060606

 2088 14:51:44.548886  MTRR: Fixed MSR 0x259 0x0000000000000000

 2089 14:51:44.552574  MTRR: Fixed MSR 0x268 0x0606060606060606

 2090 14:51:44.555685  MTRR: Fixed MSR 0x269 0x0606060606060606

 2091 14:51:44.559389  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2092 14:51:44.562044  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2093 14:51:44.568901  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2094 14:51:44.571993  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2095 14:51:44.576003  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2096 14:51:44.578746  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2097 14:51:44.586638  MTRR: Fixed MSR 0x258 0x0606060606060606

 2098 14:51:44.589709  MTRR: Fixed MSR 0x259 0x0000000000000000

 2099 14:51:44.592875  MTRR: Fixed MSR 0x268 0x0606060606060606

 2100 14:51:44.596548  MTRR: Fixed MSR 0x269 0x0606060606060606

 2101 14:51:44.602723  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2102 14:51:44.606507  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2103 14:51:44.609351  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2104 14:51:44.612637  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2105 14:51:44.619461  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2106 14:51:44.622669  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2107 14:51:44.626139  call enable_fixed_mtrr()

 2108 14:51:44.629826  call enable_fixed_mtrr()

 2109 14:51:44.632641  CPU physical address size: 39 bits

 2110 14:51:44.636823  CPU physical address size: 39 bits

 2111 14:51:44.636920  Reading cr50 TPM mode

 2112 14:51:44.640533  CPU physical address size: 39 bits

 2113 14:51:44.643942  CPU physical address size: 39 bits

 2114 14:51:44.650775  BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms

 2115 14:51:44.661301  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2116 14:51:44.664394  Checking segment from ROM address 0xffc02b38

 2117 14:51:44.667664  Checking segment from ROM address 0xffc02b54

 2118 14:51:44.674322  Loading segment from ROM address 0xffc02b38

 2119 14:51:44.674402    code (compression=0)

 2120 14:51:44.684067    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2121 14:51:44.693929  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2122 14:51:44.694012  it's not compressed!

 2123 14:51:44.834040  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2124 14:51:44.840270  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2125 14:51:44.847049  Loading segment from ROM address 0xffc02b54

 2126 14:51:44.847132    Entry Point 0x30000000

 2127 14:51:44.850074  Loaded segments

 2128 14:51:44.856721  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2129 14:51:44.899750  Finalizing chipset.

 2130 14:51:44.902806  Finalizing SMM.

 2131 14:51:44.902919  APMC done.

 2132 14:51:44.909426  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2133 14:51:44.913207  mp_park_aps done after 0 msecs.

 2134 14:51:44.916121  Jumping to boot code at 0x30000000(0x76b25000)

 2135 14:51:44.926200  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2136 14:51:44.926281  

 2137 14:51:44.926345  

 2138 14:51:44.926407  

 2139 14:51:44.929644  Starting depthcharge on Voema...

 2140 14:51:44.929725  

 2141 14:51:44.930078  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2142 14:51:44.930183  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2143 14:51:44.930267  Setting prompt string to ['volteer:']
 2144 14:51:44.930345  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2145 14:51:44.939703  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2146 14:51:44.939789  

 2147 14:51:44.946282  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2148 14:51:44.946364  

 2149 14:51:44.949631  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2150 14:51:44.953661  

 2151 14:51:44.953734  Failed to find eMMC card reader

 2152 14:51:44.953795  

 2153 14:51:44.957224  Wipe memory regions:

 2154 14:51:44.957338  

 2155 14:51:44.960014  	[0x00000000001000, 0x000000000a0000)

 2156 14:51:44.960095  

 2157 14:51:44.963826  	[0x00000000100000, 0x00000030000000)

 2158 14:51:44.991298  

 2159 14:51:44.994704  	[0x00000032662db0, 0x000000769ef000)

 2160 14:51:45.029589  

 2161 14:51:45.033182  	[0x00000100000000, 0x00000280400000)

 2162 14:51:45.236932  

 2163 14:51:45.240290  ec_init: CrosEC protocol v3 supported (256, 256)

 2164 14:51:45.240387  

 2165 14:51:45.247097  update_port_state: port C0 state: usb enable 1 mux conn 0

 2166 14:51:45.247178  

 2167 14:51:45.253476  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2168 14:51:45.258115  

 2169 14:51:45.261775  pmc_check_ipc_sts: STS_BUSY done after 1561 us

 2170 14:51:45.261856  

 2171 14:51:45.264693  send_conn_disc_msg: pmc_send_cmd succeeded

 2172 14:51:45.695743  

 2173 14:51:45.695903  R8152: Initializing

 2174 14:51:45.696028  

 2175 14:51:45.699407  Version 6 (ocp_data = 5c30)

 2176 14:51:45.699488  

 2177 14:51:45.702388  R8152: Done initializing

 2178 14:51:45.702468  

 2179 14:51:45.705900  Adding net device

 2180 14:51:46.008264  

 2181 14:51:46.011545  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2182 14:51:46.011639  

 2183 14:51:46.011701  

 2184 14:51:46.011759  

 2185 14:51:46.014258  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2187 14:51:46.114610  volteer: tftpboot 192.168.201.1 10185582/tftp-deploy-secwsgk8/kernel/bzImage 10185582/tftp-deploy-secwsgk8/kernel/cmdline 10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz

 2188 14:51:46.114771  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2189 14:51:46.114853  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2190 14:51:46.118779  tftpboot 192.168.201.1 10185582/tftp-deploy-secwsgk8/kernel/bzImploy-secwsgk8/kernel/cmdline 10185582/tftp-deploy-secwsgk8/ramdisk/ramdisk.cpio.gz

 2191 14:51:46.118866  

 2192 14:51:46.118930  Waiting for link

 2193 14:51:46.322047  

 2194 14:51:46.322196  done.

 2195 14:51:46.322265  

 2196 14:51:46.322323  MAC: 00:24:32:30:7e:47

 2197 14:51:46.322382  

 2198 14:51:46.325366  Sending DHCP discover... done.

 2199 14:51:46.325436  

 2200 14:51:46.328849  Waiting for reply... done.

 2201 14:51:46.328930  

 2202 14:51:46.331598  Sending DHCP request... done.

 2203 14:51:46.331681  

 2204 14:51:46.339801  Waiting for reply... done.

 2205 14:51:46.339888  

 2206 14:51:46.339952  My ip is 192.168.201.19

 2207 14:51:46.340063  

 2208 14:51:46.342715  The DHCP server ip is 192.168.201.1

 2209 14:51:46.346125  

 2210 14:51:46.350073  TFTP server IP predefined by user: 192.168.201.1

 2211 14:51:46.350154  

 2212 14:51:46.356828  Bootfile predefined by user: 10185582/tftp-deploy-secwsgk8/kernel/bzImage

 2213 14:51:46.356909  

 2214 14:51:46.359756  Sending tftp read request... done.

 2215 14:51:46.359837  

 2216 14:51:46.363167  Waiting for the transfer... 

 2217 14:51:46.366463  

 2218 14:51:46.903039  00000000 ################################################################

 2219 14:51:46.903174  

 2220 14:51:47.436108  00080000 ################################################################

 2221 14:51:47.436287  

 2222 14:51:47.988558  00100000 ################################################################

 2223 14:51:47.988723  

 2224 14:51:48.535430  00180000 ################################################################

 2225 14:51:48.535562  

 2226 14:51:49.072390  00200000 ################################################################

 2227 14:51:49.072542  

 2228 14:51:49.602697  00280000 ################################################################

 2229 14:51:49.602877  

 2230 14:51:50.145902  00300000 ################################################################

 2231 14:51:50.146058  

 2232 14:51:50.684099  00380000 ################################################################

 2233 14:51:50.684252  

 2234 14:51:51.209791  00400000 ################################################################

 2235 14:51:51.209949  

 2236 14:51:51.734176  00480000 ################################################################

 2237 14:51:51.734314  

 2238 14:51:52.279718  00500000 ################################################################

 2239 14:51:52.279873  

 2240 14:51:52.825575  00580000 ################################################################

 2241 14:51:52.825725  

 2242 14:51:53.358764  00600000 ################################################################

 2243 14:51:53.358923  

 2244 14:51:53.891056  00680000 ################################################################

 2245 14:51:53.891198  

 2246 14:51:54.435349  00700000 ################################################################

 2247 14:51:54.435500  

 2248 14:51:54.448774  00780000 ## done.

 2249 14:51:54.448868  

 2250 14:51:54.452091  The bootfile was 7876496 bytes long.

 2251 14:51:54.452173  

 2252 14:51:54.455592  Sending tftp read request... done.

 2253 14:51:54.455672  

 2254 14:51:54.458610  Waiting for the transfer... 

 2255 14:51:54.458690  

 2256 14:51:54.978354  00000000 ################################################################

 2257 14:51:54.978507  

 2258 14:51:55.504791  00080000 ################################################################

 2259 14:51:55.504927  

 2260 14:51:56.027499  00100000 ################################################################

 2261 14:51:56.027640  

 2262 14:51:56.549061  00180000 ################################################################

 2263 14:51:56.549209  

 2264 14:51:57.069016  00200000 ################################################################

 2265 14:51:57.069197  

 2266 14:51:57.588651  00280000 ################################################################

 2267 14:51:57.588800  

 2268 14:51:58.104789  00300000 ################################################################

 2269 14:51:58.104949  

 2270 14:51:58.627815  00380000 ################################################################

 2271 14:51:58.627992  

 2272 14:51:59.146808  00400000 ################################################################

 2273 14:51:59.146952  

 2274 14:51:59.670666  00480000 ################################################################

 2275 14:51:59.670817  

 2276 14:52:00.189863  00500000 ################################################################

 2277 14:52:00.190048  

 2278 14:52:00.718352  00580000 ################################################################

 2279 14:52:00.718487  

 2280 14:52:00.886327  00600000 ##################### done.

 2281 14:52:00.886467  

 2282 14:52:00.889960  Sending tftp read request... done.

 2283 14:52:00.890070  

 2284 14:52:00.893613  Waiting for the transfer... 

 2285 14:52:00.893697  

 2286 14:52:00.893760  00000000 # done.

 2287 14:52:00.893823  

 2288 14:52:00.903333  Command line loaded dynamically from TFTP file: 10185582/tftp-deploy-secwsgk8/kernel/cmdline

 2289 14:52:00.903416  

 2290 14:52:00.926448  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185582/extract-nfsrootfs-j9lcdjon,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2291 14:52:00.930011  

 2292 14:52:00.933173  Shutting down all USB controllers.

 2293 14:52:00.933255  

 2294 14:52:00.933319  Removing current net device

 2295 14:52:00.933378  

 2296 14:52:00.936525  Finalizing coreboot

 2297 14:52:00.936607  

 2298 14:52:00.943206  Exiting depthcharge with code 4 at timestamp: 24648369

 2299 14:52:00.943288  

 2300 14:52:00.943351  

 2301 14:52:00.943409  Starting kernel ...

 2302 14:52:00.943466  

 2303 14:52:00.943520  

 2304 14:52:00.943870  end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
 2305 14:52:00.943990  start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
 2306 14:52:00.944080  Setting prompt string to ['Linux version [0-9]']
 2307 14:52:00.944148  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2308 14:52:00.944214  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2310 14:56:29.945062  end: 2.2.5 auto-login-action (duration 00:04:29) [common]
 2312 14:56:29.946151  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
 2314 14:56:29.946972  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2317 14:56:29.948404  end: 2 depthcharge-action (duration 00:05:00) [common]
 2319 14:56:29.949345  Cleaning after the job
 2320 14:56:29.949431  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/ramdisk
 2321 14:56:29.950299  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/kernel
 2322 14:56:29.951230  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/nfsrootfs
 2323 14:56:30.021182  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185582/tftp-deploy-secwsgk8/modules
 2324 14:56:30.021619  start: 4.1 power-off (timeout 00:00:30) [common]
 2325 14:56:30.021784  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
 2326 14:56:30.096085  >> Command sent successfully.

 2327 14:56:30.107231  Returned 0 in 0 seconds
 2328 14:56:30.208670  end: 4.1 power-off (duration 00:00:00) [common]
 2330 14:56:30.210209  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2331 14:56:30.211461  Listened to connection for namespace 'common' for up to 1s
 2332 14:56:31.212216  Finalising connection for namespace 'common'
 2333 14:56:31.212877  Disconnecting from shell: Finalise
 2334 14:56:31.213276  

 2335 14:56:31.314390  end: 4.2 read-feedback (duration 00:00:01) [common]
 2336 14:56:31.315023  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185582
 2337 14:56:31.769109  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185582
 2338 14:56:31.769307  JobError: Your job cannot terminate cleanly.