Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:56:37.647064 lava-dispatcher, installed at version: 2023.03
2 14:56:37.647258 start: 0 validate
3 14:56:37.647379 Start time: 2023-05-03 14:56:37.647372+00:00 (UTC)
4 14:56:37.647495 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:56:37.647621 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
6 14:56:37.942126 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:56:37.942943 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:56:38.238181 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:56:38.238963 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:56:38.535274 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:56:38.536059 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:56:38.835441 validate duration: 1.19
14 14:56:38.835704 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:56:38.835801 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:56:38.835887 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:56:38.836005 Not decompressing ramdisk as can be used compressed.
18 14:56:38.836088 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230421.0/amd64/initrd.cpio.gz
19 14:56:38.836152 saving as /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/ramdisk/initrd.cpio.gz
20 14:56:38.836212 total size: 5432140 (5MB)
21 14:56:38.837186 progress 0% (0MB)
22 14:56:38.838703 progress 5% (0MB)
23 14:56:38.840076 progress 10% (0MB)
24 14:56:38.841510 progress 15% (0MB)
25 14:56:38.843086 progress 20% (1MB)
26 14:56:38.844432 progress 25% (1MB)
27 14:56:38.845813 progress 30% (1MB)
28 14:56:38.847301 progress 35% (1MB)
29 14:56:38.848640 progress 40% (2MB)
30 14:56:38.850009 progress 45% (2MB)
31 14:56:38.851341 progress 50% (2MB)
32 14:56:38.852934 progress 55% (2MB)
33 14:56:38.854343 progress 60% (3MB)
34 14:56:38.855678 progress 65% (3MB)
35 14:56:38.857211 progress 70% (3MB)
36 14:56:38.858632 progress 75% (3MB)
37 14:56:38.859997 progress 80% (4MB)
38 14:56:38.861327 progress 85% (4MB)
39 14:56:38.862862 progress 90% (4MB)
40 14:56:38.864229 progress 95% (4MB)
41 14:56:38.865652 progress 100% (5MB)
42 14:56:38.865856 5MB downloaded in 0.03s (174.78MB/s)
43 14:56:38.866034 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:56:38.866266 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:56:38.866354 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:56:38.866437 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:56:38.866558 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:56:38.866630 saving as /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/kernel/bzImage
50 14:56:38.866691 total size: 7876496 (7MB)
51 14:56:38.866751 No compression specified
52 14:56:38.867749 progress 0% (0MB)
53 14:56:38.869932 progress 5% (0MB)
54 14:56:38.872019 progress 10% (0MB)
55 14:56:38.874115 progress 15% (1MB)
56 14:56:38.876114 progress 20% (1MB)
57 14:56:38.878265 progress 25% (1MB)
58 14:56:38.880331 progress 30% (2MB)
59 14:56:38.882472 progress 35% (2MB)
60 14:56:38.884505 progress 40% (3MB)
61 14:56:38.886545 progress 45% (3MB)
62 14:56:38.888512 progress 50% (3MB)
63 14:56:38.890547 progress 55% (4MB)
64 14:56:38.892520 progress 60% (4MB)
65 14:56:38.894552 progress 65% (4MB)
66 14:56:38.896514 progress 70% (5MB)
67 14:56:38.898522 progress 75% (5MB)
68 14:56:38.900487 progress 80% (6MB)
69 14:56:38.902482 progress 85% (6MB)
70 14:56:38.904443 progress 90% (6MB)
71 14:56:38.906443 progress 95% (7MB)
72 14:56:38.908423 progress 100% (7MB)
73 14:56:38.908570 7MB downloaded in 0.04s (179.38MB/s)
74 14:56:38.908708 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:56:38.908934 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:56:38.909021 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:56:38.909105 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:56:38.909233 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230421.0/amd64/full.rootfs.tar.xz
80 14:56:38.909300 saving as /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/nfsrootfs/full.rootfs.tar
81 14:56:38.909362 total size: 207189224 (197MB)
82 14:56:38.909421 Using unxz to decompress xz
83 14:56:38.913121 progress 0% (0MB)
84 14:56:39.447729 progress 5% (9MB)
85 14:56:39.957516 progress 10% (19MB)
86 14:56:40.545200 progress 15% (29MB)
87 14:56:40.899337 progress 20% (39MB)
88 14:56:41.247552 progress 25% (49MB)
89 14:56:41.834651 progress 30% (59MB)
90 14:56:42.371327 progress 35% (69MB)
91 14:56:42.959876 progress 40% (79MB)
92 14:56:43.500759 progress 45% (88MB)
93 14:56:44.067324 progress 50% (98MB)
94 14:56:44.685212 progress 55% (108MB)
95 14:56:45.361116 progress 60% (118MB)
96 14:56:45.498931 progress 65% (128MB)
97 14:56:45.640003 progress 70% (138MB)
98 14:56:45.727404 progress 75% (148MB)
99 14:56:45.798787 progress 80% (158MB)
100 14:56:45.864389 progress 85% (167MB)
101 14:56:45.964301 progress 90% (177MB)
102 14:56:46.224881 progress 95% (187MB)
103 14:56:46.793340 progress 100% (197MB)
104 14:56:46.799558 197MB downloaded in 7.89s (25.04MB/s)
105 14:56:46.799836 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:56:46.800096 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:56:46.800190 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:56:46.800278 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:56:46.800427 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:56:46.800500 saving as /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/modules/modules.tar
112 14:56:46.800563 total size: 251268 (0MB)
113 14:56:46.800624 Using unxz to decompress xz
114 14:56:46.804315 progress 13% (0MB)
115 14:56:46.804681 progress 26% (0MB)
116 14:56:46.804909 progress 39% (0MB)
117 14:56:46.806345 progress 52% (0MB)
118 14:56:46.808221 progress 65% (0MB)
119 14:56:46.810177 progress 78% (0MB)
120 14:56:46.812003 progress 91% (0MB)
121 14:56:46.813805 progress 100% (0MB)
122 14:56:46.819348 0MB downloaded in 0.02s (12.76MB/s)
123 14:56:46.819587 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:56:46.819847 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:56:46.819943 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 14:56:46.820038 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 14:56:50.016939 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185580/extract-nfsrootfs-51thsqov
129 14:56:50.017148 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 14:56:50.017254 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 14:56:50.017420 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv
132 14:56:50.017582 makedir: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin
133 14:56:50.017715 makedir: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/tests
134 14:56:50.017811 makedir: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/results
135 14:56:50.017910 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-add-keys
136 14:56:50.018047 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-add-sources
137 14:56:50.018172 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-background-process-start
138 14:56:50.018294 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-background-process-stop
139 14:56:50.018415 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-common-functions
140 14:56:50.018535 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-echo-ipv4
141 14:56:50.018655 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-install-packages
142 14:56:50.018776 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-installed-packages
143 14:56:50.018896 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-os-build
144 14:56:50.019015 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-probe-channel
145 14:56:50.019133 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-probe-ip
146 14:56:50.019251 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-target-ip
147 14:56:50.019368 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-target-mac
148 14:56:50.019486 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-target-storage
149 14:56:50.019606 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-case
150 14:56:50.019727 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-event
151 14:56:50.019845 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-feedback
152 14:56:50.019965 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-raise
153 14:56:50.020082 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-reference
154 14:56:50.020201 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-runner
155 14:56:50.020318 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-set
156 14:56:50.020437 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-test-shell
157 14:56:50.020556 Updating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-add-keys (debian)
158 14:56:50.020701 Updating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-add-sources (debian)
159 14:56:50.020834 Updating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-install-packages (debian)
160 14:56:50.020980 Updating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-installed-packages (debian)
161 14:56:50.021125 Updating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/bin/lava-os-build (debian)
162 14:56:50.021254 Creating /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/environment
163 14:56:50.021361 LAVA metadata
164 14:56:50.021431 - LAVA_JOB_ID=10185580
165 14:56:50.021524 - LAVA_DISPATCHER_IP=192.168.201.1
166 14:56:50.021636 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
167 14:56:50.021717 skipped lava-vland-overlay
168 14:56:50.021825 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 14:56:50.021908 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
170 14:56:50.021971 skipped lava-multinode-overlay
171 14:56:50.022044 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 14:56:50.022123 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
173 14:56:50.022195 Loading test definitions
174 14:56:50.022284 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
175 14:56:50.022354 Using /lava-10185580 at stage 0
176 14:56:50.022616 uuid=10185580_1.5.2.3.1 testdef=None
177 14:56:50.022702 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 14:56:50.022786 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
179 14:56:50.023218 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 14:56:50.023434 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
182 14:56:50.023992 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 14:56:50.024229 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
185 14:56:50.024812 runner path: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/0/tests/0_timesync-off test_uuid 10185580_1.5.2.3.1
186 14:56:50.024998 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 14:56:50.025352 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
189 14:56:50.025453 Using /lava-10185580 at stage 0
190 14:56:50.025709 Fetching tests from https://github.com/kernelci/test-definitions.git
191 14:56:50.025788 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/0/tests/1_kselftest-rtc'
192 14:57:04.542957 Running '/usr/bin/git checkout kernelci.org
193 14:57:04.684408 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
194 14:57:04.685115 uuid=10185580_1.5.2.3.5 testdef=None
195 14:57:04.685277 end: 1.5.2.3.5 git-repo-action (duration 00:00:15) [common]
197 14:57:04.685585 start: 1.5.2.3.6 test-overlay (timeout 00:09:34) [common]
198 14:57:04.686301 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 14:57:04.686531 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:34) [common]
201 14:57:04.687455 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 14:57:04.687686 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:34) [common]
204 14:57:04.688618 runner path: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/0/tests/1_kselftest-rtc test_uuid 10185580_1.5.2.3.5
205 14:57:04.688707 BOARD='asus-C436FA-Flip-hatch'
206 14:57:04.688771 BRANCH='cip'
207 14:57:04.688832 SKIPFILE='/dev/null'
208 14:57:04.688890 SKIP_INSTALL='True'
209 14:57:04.688944 TESTPROG_URL='None'
210 14:57:04.688998 TST_CASENAME=''
211 14:57:04.689052 TST_CMDFILES='rtc'
212 14:57:04.689183 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 14:57:04.689386 Creating lava-test-runner.conf files
215 14:57:04.689449 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185580/lava-overlay-eeis4hgv/lava-10185580/0 for stage 0
216 14:57:04.689601 - 0_timesync-off
217 14:57:04.689671 - 1_kselftest-rtc
218 14:57:04.689765 end: 1.5.2.3 test-definition (duration 00:00:15) [common]
219 14:57:04.689851 start: 1.5.2.4 compress-overlay (timeout 00:09:34) [common]
220 14:57:11.944494 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 14:57:11.944652 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:27) [common]
222 14:57:11.944748 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 14:57:11.944846 end: 1.5.2 lava-overlay (duration 00:00:22) [common]
224 14:57:11.944937 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:27) [common]
225 14:57:12.073561 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 14:57:12.073922 start: 1.5.4 extract-modules (timeout 00:09:27) [common]
227 14:57:12.074040 extracting modules file /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185580/extract-nfsrootfs-51thsqov
228 14:57:12.086310 extracting modules file /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185580/extract-overlay-ramdisk-5v46q2gn/ramdisk
229 14:57:12.098239 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 14:57:12.098354 start: 1.5.5 apply-overlay-tftp (timeout 00:09:27) [common]
231 14:57:12.098437 [common] Applying overlay to NFS
232 14:57:12.098507 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185580/compress-overlay-vhkrjct5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185580/extract-nfsrootfs-51thsqov
233 14:57:12.970062 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 14:57:12.970231 start: 1.5.6 configure-preseed-file (timeout 00:09:26) [common]
235 14:57:12.970327 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 14:57:12.970417 start: 1.5.7 compress-ramdisk (timeout 00:09:26) [common]
237 14:57:12.970504 Building ramdisk /var/lib/lava/dispatcher/tmp/10185580/extract-overlay-ramdisk-5v46q2gn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185580/extract-overlay-ramdisk-5v46q2gn/ramdisk
238 14:57:13.044973 >> 26161 blocks
239 14:57:13.590767 rename /var/lib/lava/dispatcher/tmp/10185580/extract-overlay-ramdisk-5v46q2gn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
240 14:57:13.591189 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 14:57:13.591304 start: 1.5.8 prepare-kernel (timeout 00:09:25) [common]
242 14:57:13.591407 start: 1.5.8.1 prepare-fit (timeout 00:09:25) [common]
243 14:57:13.591493 No mkimage arch provided, not using FIT.
244 14:57:13.591580 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 14:57:13.591663 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 14:57:13.591767 end: 1.5 prepare-tftp-overlay (duration 00:00:27) [common]
247 14:57:13.591856 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:25) [common]
248 14:57:13.591934 No LXC device requested
249 14:57:13.592016 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 14:57:13.592101 start: 1.7 deploy-device-env (timeout 00:09:25) [common]
251 14:57:13.592180 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 14:57:13.592252 Checking files for TFTP limit of 4294967296 bytes.
253 14:57:13.592634 end: 1 tftp-deploy (duration 00:00:35) [common]
254 14:57:13.592740 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 14:57:13.592829 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 14:57:13.592958 substitutions:
257 14:57:13.593029 - {DTB}: None
258 14:57:13.593092 - {INITRD}: 10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
259 14:57:13.593151 - {KERNEL}: 10185580/tftp-deploy-gnt83lf7/kernel/bzImage
260 14:57:13.593208 - {LAVA_MAC}: None
261 14:57:13.593263 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185580/extract-nfsrootfs-51thsqov
262 14:57:13.593319 - {NFS_SERVER_IP}: 192.168.201.1
263 14:57:13.593373 - {PRESEED_CONFIG}: None
264 14:57:13.593426 - {PRESEED_LOCAL}: None
265 14:57:13.593486 - {RAMDISK}: 10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
266 14:57:13.593599 - {ROOT_PART}: None
267 14:57:13.593653 - {ROOT}: None
268 14:57:13.593706 - {SERVER_IP}: 192.168.201.1
269 14:57:13.593759 - {TEE}: None
270 14:57:13.593812 Parsed boot commands:
271 14:57:13.593868 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 14:57:13.594043 Parsed boot commands: tftpboot 192.168.201.1 10185580/tftp-deploy-gnt83lf7/kernel/bzImage 10185580/tftp-deploy-gnt83lf7/kernel/cmdline 10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
273 14:57:13.594133 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 14:57:13.594216 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 14:57:13.594306 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 14:57:13.594393 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 14:57:13.594460 Not connected, no need to disconnect.
278 14:57:13.594532 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 14:57:13.594610 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 14:57:13.594673 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
281 14:57:13.598109 Setting prompt string to ['lava-test: # ']
282 14:57:13.598431 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 14:57:13.598536 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 14:57:13.598632 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 14:57:13.598720 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 14:57:13.598907 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
287 14:57:18.752900 >> Command sent successfully.
288 14:57:18.758987 Returned 0 in 5 seconds
289 14:57:18.859745 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 14:57:18.861273 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 14:57:18.861871 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 14:57:18.862396 Setting prompt string to 'Starting depthcharge on Helios...'
294 14:57:18.862786 Changing prompt to 'Starting depthcharge on Helios...'
295 14:57:18.863187 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 14:57:18.864427 [Enter `^Ec?' for help]
297 14:57:19.482021
298 14:57:19.482641
299 14:57:19.492527 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 14:57:19.495227 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 14:57:19.501865 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 14:57:19.505790 CPU: AES supported, TXT NOT supported, VT supported
303 14:57:19.512255 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 14:57:19.515664 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 14:57:19.522144 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 14:57:19.525300 VBOOT: Loading verstage.
307 14:57:19.528889 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 14:57:19.535683 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 14:57:19.539107 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 14:57:19.542007 CBFS @ c08000 size 3f8000
311 14:57:19.548823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 14:57:19.552112 CBFS: Locating 'fallback/verstage'
313 14:57:19.555647 CBFS: Found @ offset 10fb80 size 1072c
314 14:57:19.558770
315 14:57:19.559250
316 14:57:19.568632 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 14:57:19.582927 Probing TPM: . done!
318 14:57:19.586348 TPM ready after 0 ms
319 14:57:19.589810 Connected to device vid:did:rid of 1ae0:0028:00
320 14:57:19.600483 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 14:57:19.603201 Initialized TPM device CR50 revision 0
322 14:57:19.647135 tlcl_send_startup: Startup return code is 0
323 14:57:19.647789 TPM: setup succeeded
324 14:57:19.659848 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 14:57:19.663374 Chrome EC: UHEPI supported
326 14:57:19.666851 Phase 1
327 14:57:19.670124 FMAP: area GBB found @ c05000 (12288 bytes)
328 14:57:19.676998 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 14:57:19.680130 Phase 2
330 14:57:19.680611 Phase 3
331 14:57:19.683834 FMAP: area GBB found @ c05000 (12288 bytes)
332 14:57:19.690335 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 14:57:19.697429 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 14:57:19.700624 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 14:57:19.706738 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 14:57:19.722700 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 14:57:19.725324 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 14:57:19.732501 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 14:57:19.736419 Phase 4
340 14:57:19.740486 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 14:57:19.746309 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 14:57:19.925897 VB2:vb2_rsa_verify_digest() Digest check failed!
343 14:57:19.932693 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 14:57:19.933276 Saving nvdata
345 14:57:19.936184 Reboot requested (10020007)
346 14:57:19.939892 board_reset() called!
347 14:57:19.940476 full_reset() called!
348 14:57:24.448905
349 14:57:24.449519
350 14:57:24.458884 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 14:57:24.462593 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 14:57:24.469528 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 14:57:24.472576 CPU: AES supported, TXT NOT supported, VT supported
354 14:57:24.479293 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 14:57:24.482903 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 14:57:24.489404 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 14:57:24.492841 VBOOT: Loading verstage.
358 14:57:24.496145 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 14:57:24.502301 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 14:57:24.505595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 14:57:24.508600 CBFS @ c08000 size 3f8000
362 14:57:24.515454 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 14:57:24.518775 CBFS: Locating 'fallback/verstage'
364 14:57:24.522288 CBFS: Found @ offset 10fb80 size 1072c
365 14:57:24.526211
366 14:57:24.526792
367 14:57:24.536228 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 14:57:24.550714 Probing TPM: . done!
369 14:57:24.554073 TPM ready after 0 ms
370 14:57:24.556948 Connected to device vid:did:rid of 1ae0:0028:00
371 14:57:24.568077 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
372 14:57:24.570694 Initialized TPM device CR50 revision 0
373 14:57:24.614320 tlcl_send_startup: Startup return code is 0
374 14:57:24.614908 TPM: setup succeeded
375 14:57:24.627355 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 14:57:24.630452 Chrome EC: UHEPI supported
377 14:57:24.633881 Phase 1
378 14:57:24.637197 FMAP: area GBB found @ c05000 (12288 bytes)
379 14:57:24.644357 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 14:57:24.650357 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 14:57:24.654168 Recovery requested (1009000e)
382 14:57:24.659801 Saving nvdata
383 14:57:24.665922 tlcl_extend: response is 0
384 14:57:24.674915 tlcl_extend: response is 0
385 14:57:24.681634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 14:57:24.685088 CBFS @ c08000 size 3f8000
387 14:57:24.691441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 14:57:24.694857 CBFS: Locating 'fallback/romstage'
389 14:57:24.698481 CBFS: Found @ offset 80 size 145fc
390 14:57:24.701631 Accumulated console time in verstage 99 ms
391 14:57:24.702135
392 14:57:24.702560
393 14:57:24.715563 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 14:57:24.721364 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 14:57:24.724590 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 14:57:24.727888 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 14:57:24.734603 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 14:57:24.737915 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 14:57:24.741694 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 14:57:24.744831 TCO_STS: 0000 0000
401 14:57:24.748088 GEN_PMCON: e0015238 00000200
402 14:57:24.751083 GBLRST_CAUSE: 00000000 00000000
403 14:57:24.751645 prev_sleep_state 5
404 14:57:24.754609 Boot Count incremented to 60828
405 14:57:24.761840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 14:57:24.764629 CBFS @ c08000 size 3f8000
407 14:57:24.771214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 14:57:24.771804 CBFS: Locating 'fspm.bin'
409 14:57:24.778118 CBFS: Found @ offset 5ffc0 size 71000
410 14:57:24.780887 Chrome EC: UHEPI supported
411 14:57:24.787440 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 14:57:24.791817 Probing TPM: done!
413 14:57:24.798037 Connected to device vid:did:rid of 1ae0:0028:00
414 14:57:24.808287 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
415 14:57:24.814448 Initialized TPM device CR50 revision 0
416 14:57:24.823216 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 14:57:24.829656 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 14:57:24.832927 MRC cache found, size 1948
419 14:57:24.836446 bootmode is set to: 2
420 14:57:24.839765 PRMRR disabled by config.
421 14:57:24.840375 SPD INDEX = 1
422 14:57:24.846120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 14:57:24.849268 CBFS @ c08000 size 3f8000
424 14:57:24.856499 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 14:57:24.857089 CBFS: Locating 'spd.bin'
426 14:57:24.859530 CBFS: Found @ offset 5fb80 size 400
427 14:57:24.863026 SPD: module type is LPDDR3
428 14:57:24.866156 SPD: module part is
429 14:57:24.872630 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 14:57:24.876379 SPD: device width 4 bits, bus width 8 bits
431 14:57:24.879726 SPD: module size is 4096 MB (per channel)
432 14:57:24.882531 memory slot: 0 configuration done.
433 14:57:24.885900 memory slot: 2 configuration done.
434 14:57:24.937378 CBMEM:
435 14:57:24.940669 IMD: root @ 99fff000 254 entries.
436 14:57:24.944625 IMD: root @ 99ffec00 62 entries.
437 14:57:24.947190 External stage cache:
438 14:57:24.950457 IMD: root @ 9abff000 254 entries.
439 14:57:24.953678 IMD: root @ 9abfec00 62 entries.
440 14:57:24.957912 Chrome EC: clear events_b mask to 0x0000000020004000
441 14:57:24.973651 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 14:57:24.986537 tlcl_write: response is 0
443 14:57:24.995749 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 14:57:25.002318 MRC: TPM MRC hash updated successfully.
445 14:57:25.002917 2 DIMMs found
446 14:57:25.006307 SMM Memory Map
447 14:57:25.009048 SMRAM : 0x9a000000 0x1000000
448 14:57:25.011910 Subregion 0: 0x9a000000 0xa00000
449 14:57:25.015323 Subregion 1: 0x9aa00000 0x200000
450 14:57:25.019823 Subregion 2: 0x9ac00000 0x400000
451 14:57:25.022083 top_of_ram = 0x9a000000
452 14:57:25.025586 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 14:57:25.032308 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 14:57:25.035870 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 14:57:25.041904 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 14:57:25.045245 CBFS @ c08000 size 3f8000
457 14:57:25.048446 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 14:57:25.052059 CBFS: Locating 'fallback/postcar'
459 14:57:25.058165 CBFS: Found @ offset 107000 size 4b44
460 14:57:25.061799 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 14:57:25.074584 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 14:57:25.077914 Processing 180 relocs. Offset value of 0x97c0c000
463 14:57:25.086655 Accumulated console time in romstage 286 ms
464 14:57:25.087237
465 14:57:25.087684
466 14:57:25.096341 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 14:57:25.103008 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 14:57:25.106188 CBFS @ c08000 size 3f8000
469 14:57:25.109579 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 14:57:25.116208 CBFS: Locating 'fallback/ramstage'
471 14:57:25.119701 CBFS: Found @ offset 43380 size 1b9e8
472 14:57:25.126133 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 14:57:25.157921 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 14:57:25.161581 Processing 3976 relocs. Offset value of 0x98db0000
475 14:57:25.167727 Accumulated console time in postcar 52 ms
476 14:57:25.168288
477 14:57:25.168668
478 14:57:25.178034 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 14:57:25.184161 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 14:57:25.187600 WARNING: RO_VPD is uninitialized or empty.
481 14:57:25.191093 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 14:57:25.197820 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 14:57:25.198404 Normal boot.
484 14:57:25.204571 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 14:57:25.207856 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 14:57:25.210631 CBFS @ c08000 size 3f8000
487 14:57:25.217588 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 14:57:25.221055 CBFS: Locating 'cpu_microcode_blob.bin'
489 14:57:25.223996 CBFS: Found @ offset 14700 size 2ec00
490 14:57:25.227329 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 14:57:25.230602 Skip microcode update
492 14:57:25.237837 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 14:57:25.238429 CBFS @ c08000 size 3f8000
494 14:57:25.243729 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 14:57:25.246994 CBFS: Locating 'fsps.bin'
496 14:57:25.250162 CBFS: Found @ offset d1fc0 size 35000
497 14:57:25.276748 Detected 4 core, 8 thread CPU.
498 14:57:25.279691 Setting up SMI for CPU
499 14:57:25.283283 IED base = 0x9ac00000
500 14:57:25.283870 IED size = 0x00400000
501 14:57:25.286458 Will perform SMM setup.
502 14:57:25.292854 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 14:57:25.299846 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 14:57:25.302935 Processing 16 relocs. Offset value of 0x00030000
505 14:57:25.306660 Attempting to start 7 APs
506 14:57:25.309817 Waiting for 10ms after sending INIT.
507 14:57:25.326274 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
508 14:57:25.326861 done.
509 14:57:25.329572 AP: slot 6 apic_id 4.
510 14:57:25.332317 AP: slot 4 apic_id 7.
511 14:57:25.332797 AP: slot 7 apic_id 6.
512 14:57:25.336105 AP: slot 1 apic_id 2.
513 14:57:25.338981 AP: slot 3 apic_id 3.
514 14:57:25.339468 AP: slot 5 apic_id 5.
515 14:57:25.346624 Waiting for 2nd SIPI to complete...done.
516 14:57:25.352387 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 14:57:25.356614 Processing 13 relocs. Offset value of 0x00038000
518 14:57:25.362554 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 14:57:25.369247 Installing SMM handler to 0x9a000000
520 14:57:25.376116 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 14:57:25.379376 Processing 658 relocs. Offset value of 0x9a010000
522 14:57:25.389269 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 14:57:25.392579 Processing 13 relocs. Offset value of 0x9a008000
524 14:57:25.399344 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 14:57:25.405998 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 14:57:25.409229 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 14:57:25.415952 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 14:57:25.422559 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 14:57:25.429034 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 14:57:25.432340 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 14:57:25.439127 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 14:57:25.442238 Clearing SMI status registers
533 14:57:25.446028 SMI_STS: PM1
534 14:57:25.446599 PM1_STS: PWRBTN
535 14:57:25.449009 TCO_STS: SECOND_TO
536 14:57:25.452198 New SMBASE 0x9a000000
537 14:57:25.452814 In relocation handler: CPU 0
538 14:57:25.458981 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 14:57:25.462009 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 14:57:25.465513 Relocation complete.
541 14:57:25.468940 New SMBASE 0x99fff800
542 14:57:25.469432 In relocation handler: CPU 2
543 14:57:25.475343 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 14:57:25.478705 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 14:57:25.482165 Relocation complete.
546 14:57:25.482656 New SMBASE 0x99fff000
547 14:57:25.485665 In relocation handler: CPU 4
548 14:57:25.492534 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 14:57:25.495775 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 14:57:25.498911 Relocation complete.
551 14:57:25.499491 New SMBASE 0x99fffc00
552 14:57:25.502179 In relocation handler: CPU 1
553 14:57:25.509205 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 14:57:25.512078 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 14:57:25.515393 Relocation complete.
556 14:57:25.515979 New SMBASE 0x99fff400
557 14:57:25.518683 In relocation handler: CPU 3
558 14:57:25.522035 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
559 14:57:25.528586 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 14:57:25.532771 Relocation complete.
561 14:57:25.533390 New SMBASE 0x99ffe400
562 14:57:25.535586 In relocation handler: CPU 7
563 14:57:25.538957 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
564 14:57:25.545087 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 14:57:25.548605 Relocation complete.
566 14:57:25.549191 New SMBASE 0x99ffe800
567 14:57:25.551620 In relocation handler: CPU 6
568 14:57:25.554893 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
569 14:57:25.561811 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 14:57:25.562436 Relocation complete.
571 14:57:25.564924 New SMBASE 0x99ffec00
572 14:57:25.568886 In relocation handler: CPU 5
573 14:57:25.571823 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
574 14:57:25.578235 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 14:57:25.578732 Relocation complete.
576 14:57:25.581850 Initializing CPU #0
577 14:57:25.585339 CPU: vendor Intel device 806ec
578 14:57:25.588097 CPU: family 06, model 8e, stepping 0c
579 14:57:25.592019 Clearing out pending MCEs
580 14:57:25.595038 Setting up local APIC...
581 14:57:25.595530 apic_id: 0x00 done.
582 14:57:25.598433 Turbo is available but hidden
583 14:57:25.601729 Turbo is available and visible
584 14:57:25.605078 VMX status: enabled
585 14:57:25.608532 IA32_FEATURE_CONTROL status: locked
586 14:57:25.611547 Skip microcode update
587 14:57:25.612129 CPU #0 initialized
588 14:57:25.614853 Initializing CPU #2
589 14:57:25.615440 Initializing CPU #5
590 14:57:25.618350 Initializing CPU #6
591 14:57:25.621504 CPU: vendor Intel device 806ec
592 14:57:25.625494 CPU: family 06, model 8e, stepping 0c
593 14:57:25.628390 CPU: vendor Intel device 806ec
594 14:57:25.631546 CPU: family 06, model 8e, stepping 0c
595 14:57:25.635150 Clearing out pending MCEs
596 14:57:25.638418 Clearing out pending MCEs
597 14:57:25.641909 Setting up local APIC...
598 14:57:25.645126 CPU: vendor Intel device 806ec
599 14:57:25.648159 CPU: family 06, model 8e, stepping 0c
600 14:57:25.648745 Clearing out pending MCEs
601 14:57:25.651777 Initializing CPU #7
602 14:57:25.654489 Initializing CPU #4
603 14:57:25.658037 CPU: vendor Intel device 806ec
604 14:57:25.661070 CPU: family 06, model 8e, stepping 0c
605 14:57:25.664677 Setting up local APIC...
606 14:57:25.665270 CPU: vendor Intel device 806ec
607 14:57:25.671269 CPU: family 06, model 8e, stepping 0c
608 14:57:25.671864 Clearing out pending MCEs
609 14:57:25.674550 Clearing out pending MCEs
610 14:57:25.677846 Setting up local APIC...
611 14:57:25.681143 apic_id: 0x01 done.
612 14:57:25.681794 Setting up local APIC...
613 14:57:25.685659 Initializing CPU #1
614 14:57:25.687896 Initializing CPU #3
615 14:57:25.690995 CPU: vendor Intel device 806ec
616 14:57:25.694882 CPU: family 06, model 8e, stepping 0c
617 14:57:25.697907 CPU: vendor Intel device 806ec
618 14:57:25.701012 CPU: family 06, model 8e, stepping 0c
619 14:57:25.704990 Clearing out pending MCEs
620 14:57:25.705610 Clearing out pending MCEs
621 14:57:25.708103 Setting up local APIC...
622 14:57:25.711148 apic_id: 0x04 done.
623 14:57:25.711730 apic_id: 0x05 done.
624 14:57:25.714192 VMX status: enabled
625 14:57:25.717894 VMX status: enabled
626 14:57:25.718478 apic_id: 0x03 done.
627 14:57:25.721143 Setting up local APIC...
628 14:57:25.724672 IA32_FEATURE_CONTROL status: locked
629 14:57:25.727697 VMX status: enabled
630 14:57:25.728277 apic_id: 0x02 done.
631 14:57:25.734171 IA32_FEATURE_CONTROL status: locked
632 14:57:25.734755 VMX status: enabled
633 14:57:25.737655 Skip microcode update
634 14:57:25.741141 IA32_FEATURE_CONTROL status: locked
635 14:57:25.744422 CPU #3 initialized
636 14:57:25.745063 Skip microcode update
637 14:57:25.747659 Skip microcode update
638 14:57:25.750814 Setting up local APIC...
639 14:57:25.751404 CPU #1 initialized
640 14:57:25.753977 apic_id: 0x06 done.
641 14:57:25.757687 apic_id: 0x07 done.
642 14:57:25.758264 VMX status: enabled
643 14:57:25.760582 VMX status: enabled
644 14:57:25.764705 IA32_FEATURE_CONTROL status: locked
645 14:57:25.767258 IA32_FEATURE_CONTROL status: locked
646 14:57:25.770899 Skip microcode update
647 14:57:25.771485 Skip microcode update
648 14:57:25.774331 CPU #7 initialized
649 14:57:25.774819 CPU #4 initialized
650 14:57:25.777364 CPU #2 initialized
651 14:57:25.780851 IA32_FEATURE_CONTROL status: locked
652 14:57:25.784427 VMX status: enabled
653 14:57:25.785009 Skip microcode update
654 14:57:25.787090 IA32_FEATURE_CONTROL status: locked
655 14:57:25.790487 CPU #6 initialized
656 14:57:25.793911 Skip microcode update
657 14:57:25.794401 CPU #5 initialized
658 14:57:25.800744 bsp_do_flight_plan done after 452 msecs.
659 14:57:25.803945 CPU: frequency set to 4200 MHz
660 14:57:25.804541 Enabling SMIs.
661 14:57:25.804936 Locking SMM.
662 14:57:25.820495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 14:57:25.823521 CBFS @ c08000 size 3f8000
664 14:57:25.830261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 14:57:25.830852 CBFS: Locating 'vbt.bin'
666 14:57:25.833259 CBFS: Found @ offset 5f5c0 size 499
667 14:57:25.840551 Found a VBT of 4608 bytes after decompression
668 14:57:26.026534 Display FSP Version Info HOB
669 14:57:26.029588 Reference Code - CPU = 9.0.1e.30
670 14:57:26.033046 uCode Version = 0.0.0.ca
671 14:57:26.036130 TXT ACM version = ff.ff.ff.ffff
672 14:57:26.039397 Display FSP Version Info HOB
673 14:57:26.042647 Reference Code - ME = 9.0.1e.30
674 14:57:26.046089 MEBx version = 0.0.0.0
675 14:57:26.049355 ME Firmware Version = Consumer SKU
676 14:57:26.052475 Display FSP Version Info HOB
677 14:57:26.056203 Reference Code - CML PCH = 9.0.1e.30
678 14:57:26.059073 PCH-CRID Status = Disabled
679 14:57:26.062527 PCH-CRID Original Value = ff.ff.ff.ffff
680 14:57:26.066190 PCH-CRID New Value = ff.ff.ff.ffff
681 14:57:26.069131 OPROM - RST - RAID = ff.ff.ff.ffff
682 14:57:26.073029 ChipsetInit Base Version = ff.ff.ff.ffff
683 14:57:26.076602 ChipsetInit Oem Version = ff.ff.ff.ffff
684 14:57:26.079436 Display FSP Version Info HOB
685 14:57:26.085922 Reference Code - SA - System Agent = 9.0.1e.30
686 14:57:26.089253 Reference Code - MRC = 0.7.1.6c
687 14:57:26.089788 SA - PCIe Version = 9.0.1e.30
688 14:57:26.092913 SA-CRID Status = Disabled
689 14:57:26.095598 SA-CRID Original Value = 0.0.0.c
690 14:57:26.099320 SA-CRID New Value = 0.0.0.c
691 14:57:26.102709 OPROM - VBIOS = ff.ff.ff.ffff
692 14:57:26.105737 RTC Init
693 14:57:26.109140 Set power on after power failure.
694 14:57:26.109744 Disabling Deep S3
695 14:57:26.112941 Disabling Deep S3
696 14:57:26.113556 Disabling Deep S4
697 14:57:26.116104 Disabling Deep S4
698 14:57:26.116689 Disabling Deep S5
699 14:57:26.118826 Disabling Deep S5
700 14:57:26.125727 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
701 14:57:26.126333 Enumerating buses...
702 14:57:26.132834 Show all devs... Before device enumeration.
703 14:57:26.133423 Root Device: enabled 1
704 14:57:26.135365 CPU_CLUSTER: 0: enabled 1
705 14:57:26.138898 DOMAIN: 0000: enabled 1
706 14:57:26.142233 APIC: 00: enabled 1
707 14:57:26.142818 PCI: 00:00.0: enabled 1
708 14:57:26.145757 PCI: 00:02.0: enabled 1
709 14:57:26.149087 PCI: 00:04.0: enabled 0
710 14:57:26.149691 PCI: 00:05.0: enabled 0
711 14:57:26.152177 PCI: 00:12.0: enabled 1
712 14:57:26.155963 PCI: 00:12.5: enabled 0
713 14:57:26.158877 PCI: 00:12.6: enabled 0
714 14:57:26.159461 PCI: 00:14.0: enabled 1
715 14:57:26.162389 PCI: 00:14.1: enabled 0
716 14:57:26.165444 PCI: 00:14.3: enabled 1
717 14:57:26.168817 PCI: 00:14.5: enabled 0
718 14:57:26.169402 PCI: 00:15.0: enabled 1
719 14:57:26.172361 PCI: 00:15.1: enabled 1
720 14:57:26.175532 PCI: 00:15.2: enabled 0
721 14:57:26.176120 PCI: 00:15.3: enabled 0
722 14:57:26.178871 PCI: 00:16.0: enabled 1
723 14:57:26.182087 PCI: 00:16.1: enabled 0
724 14:57:26.185846 PCI: 00:16.2: enabled 0
725 14:57:26.186471 PCI: 00:16.3: enabled 0
726 14:57:26.188727 PCI: 00:16.4: enabled 0
727 14:57:26.192123 PCI: 00:16.5: enabled 0
728 14:57:26.195712 PCI: 00:17.0: enabled 1
729 14:57:26.196292 PCI: 00:19.0: enabled 1
730 14:57:26.199413 PCI: 00:19.1: enabled 0
731 14:57:26.201795 PCI: 00:19.2: enabled 0
732 14:57:26.205726 PCI: 00:1a.0: enabled 0
733 14:57:26.206309 PCI: 00:1c.0: enabled 0
734 14:57:26.208944 PCI: 00:1c.1: enabled 0
735 14:57:26.212232 PCI: 00:1c.2: enabled 0
736 14:57:26.212721 PCI: 00:1c.3: enabled 0
737 14:57:26.215031 PCI: 00:1c.4: enabled 0
738 14:57:26.218276 PCI: 00:1c.5: enabled 0
739 14:57:26.221828 PCI: 00:1c.6: enabled 0
740 14:57:26.222409 PCI: 00:1c.7: enabled 0
741 14:57:26.225117 PCI: 00:1d.0: enabled 1
742 14:57:26.229078 PCI: 00:1d.1: enabled 0
743 14:57:26.232507 PCI: 00:1d.2: enabled 0
744 14:57:26.233099 PCI: 00:1d.3: enabled 0
745 14:57:26.235270 PCI: 00:1d.4: enabled 0
746 14:57:26.238344 PCI: 00:1d.5: enabled 1
747 14:57:26.241894 PCI: 00:1e.0: enabled 1
748 14:57:26.242476 PCI: 00:1e.1: enabled 0
749 14:57:26.246044 PCI: 00:1e.2: enabled 1
750 14:57:26.249968 PCI: 00:1e.3: enabled 1
751 14:57:26.251384 PCI: 00:1f.0: enabled 1
752 14:57:26.251875 PCI: 00:1f.1: enabled 1
753 14:57:26.254921 PCI: 00:1f.2: enabled 1
754 14:57:26.258362 PCI: 00:1f.3: enabled 1
755 14:57:26.258872 PCI: 00:1f.4: enabled 1
756 14:57:26.261540 PCI: 00:1f.5: enabled 1
757 14:57:26.266143 PCI: 00:1f.6: enabled 0
758 14:57:26.268402 USB0 port 0: enabled 1
759 14:57:26.268989 I2C: 00:15: enabled 1
760 14:57:26.271839 I2C: 00:5d: enabled 1
761 14:57:26.275111 GENERIC: 0.0: enabled 1
762 14:57:26.275699 I2C: 00:1a: enabled 1
763 14:57:26.278854 I2C: 00:38: enabled 1
764 14:57:26.281935 I2C: 00:39: enabled 1
765 14:57:26.282422 I2C: 00:3a: enabled 1
766 14:57:26.284819 I2C: 00:3b: enabled 1
767 14:57:26.288264 PCI: 00:00.0: enabled 1
768 14:57:26.288848 SPI: 00: enabled 1
769 14:57:26.291355 SPI: 01: enabled 1
770 14:57:26.294723 PNP: 0c09.0: enabled 1
771 14:57:26.295211 USB2 port 0: enabled 1
772 14:57:26.298052 USB2 port 1: enabled 1
773 14:57:26.301616 USB2 port 2: enabled 0
774 14:57:26.302195 USB2 port 3: enabled 0
775 14:57:26.304649 USB2 port 5: enabled 0
776 14:57:26.308467 USB2 port 6: enabled 1
777 14:57:26.311795 USB2 port 9: enabled 1
778 14:57:26.312375 USB3 port 0: enabled 1
779 14:57:26.314848 USB3 port 1: enabled 1
780 14:57:26.318555 USB3 port 2: enabled 1
781 14:57:26.319142 USB3 port 3: enabled 1
782 14:57:26.321901 USB3 port 4: enabled 0
783 14:57:26.324981 APIC: 02: enabled 1
784 14:57:26.325602 APIC: 01: enabled 1
785 14:57:26.328719 APIC: 03: enabled 1
786 14:57:26.331698 APIC: 07: enabled 1
787 14:57:26.332299 APIC: 05: enabled 1
788 14:57:26.335120 APIC: 04: enabled 1
789 14:57:26.335600 APIC: 06: enabled 1
790 14:57:26.337997 Compare with tree...
791 14:57:26.341452 Root Device: enabled 1
792 14:57:26.344779 CPU_CLUSTER: 0: enabled 1
793 14:57:26.345363 APIC: 00: enabled 1
794 14:57:26.348102 APIC: 02: enabled 1
795 14:57:26.351825 APIC: 01: enabled 1
796 14:57:26.352409 APIC: 03: enabled 1
797 14:57:26.354857 APIC: 07: enabled 1
798 14:57:26.357942 APIC: 05: enabled 1
799 14:57:26.358430 APIC: 04: enabled 1
800 14:57:26.361710 APIC: 06: enabled 1
801 14:57:26.364952 DOMAIN: 0000: enabled 1
802 14:57:26.368075 PCI: 00:00.0: enabled 1
803 14:57:26.368654 PCI: 00:02.0: enabled 1
804 14:57:26.371107 PCI: 00:04.0: enabled 0
805 14:57:26.374417 PCI: 00:05.0: enabled 0
806 14:57:26.378405 PCI: 00:12.0: enabled 1
807 14:57:26.381053 PCI: 00:12.5: enabled 0
808 14:57:26.381697 PCI: 00:12.6: enabled 0
809 14:57:26.384196 PCI: 00:14.0: enabled 1
810 14:57:26.387791 USB0 port 0: enabled 1
811 14:57:26.390869 USB2 port 0: enabled 1
812 14:57:26.394806 USB2 port 1: enabled 1
813 14:57:26.395389 USB2 port 2: enabled 0
814 14:57:26.398003 USB2 port 3: enabled 0
815 14:57:26.400943 USB2 port 5: enabled 0
816 14:57:26.404805 USB2 port 6: enabled 1
817 14:57:26.407624 USB2 port 9: enabled 1
818 14:57:26.408212 USB3 port 0: enabled 1
819 14:57:26.411085 USB3 port 1: enabled 1
820 14:57:26.414136 USB3 port 2: enabled 1
821 14:57:26.417681 USB3 port 3: enabled 1
822 14:57:26.421557 USB3 port 4: enabled 0
823 14:57:26.424120 PCI: 00:14.1: enabled 0
824 14:57:26.424605 PCI: 00:14.3: enabled 1
825 14:57:26.427424 PCI: 00:14.5: enabled 0
826 14:57:26.430716 PCI: 00:15.0: enabled 1
827 14:57:26.434441 I2C: 00:15: enabled 1
828 14:57:26.434986 PCI: 00:15.1: enabled 1
829 14:57:26.437516 I2C: 00:5d: enabled 1
830 14:57:26.440751 GENERIC: 0.0: enabled 1
831 14:57:26.444591 PCI: 00:15.2: enabled 0
832 14:57:26.447489 PCI: 00:15.3: enabled 0
833 14:57:26.447974 PCI: 00:16.0: enabled 1
834 14:57:26.451312 PCI: 00:16.1: enabled 0
835 14:57:26.454226 PCI: 00:16.2: enabled 0
836 14:57:26.457305 PCI: 00:16.3: enabled 0
837 14:57:26.460699 PCI: 00:16.4: enabled 0
838 14:57:26.461288 PCI: 00:16.5: enabled 0
839 14:57:26.464460 PCI: 00:17.0: enabled 1
840 14:57:26.467512 PCI: 00:19.0: enabled 1
841 14:57:26.470865 I2C: 00:1a: enabled 1
842 14:57:26.471465 I2C: 00:38: enabled 1
843 14:57:26.474160 I2C: 00:39: enabled 1
844 14:57:26.478220 I2C: 00:3a: enabled 1
845 14:57:26.481120 I2C: 00:3b: enabled 1
846 14:57:26.484201 PCI: 00:19.1: enabled 0
847 14:57:26.484797 PCI: 00:19.2: enabled 0
848 14:57:26.487450 PCI: 00:1a.0: enabled 0
849 14:57:26.490691 PCI: 00:1c.0: enabled 0
850 14:57:26.494392 PCI: 00:1c.1: enabled 0
851 14:57:26.494994 PCI: 00:1c.2: enabled 0
852 14:57:26.497657 PCI: 00:1c.3: enabled 0
853 14:57:26.500919 PCI: 00:1c.4: enabled 0
854 14:57:26.503610 PCI: 00:1c.5: enabled 0
855 14:57:26.507857 PCI: 00:1c.6: enabled 0
856 14:57:26.508459 PCI: 00:1c.7: enabled 0
857 14:57:26.510352 PCI: 00:1d.0: enabled 1
858 14:57:26.513668 PCI: 00:1d.1: enabled 0
859 14:57:26.517320 PCI: 00:1d.2: enabled 0
860 14:57:26.520459 PCI: 00:1d.3: enabled 0
861 14:57:26.521060 PCI: 00:1d.4: enabled 0
862 14:57:26.523801 PCI: 00:1d.5: enabled 1
863 14:57:26.527335 PCI: 00:00.0: enabled 1
864 14:57:26.530598 PCI: 00:1e.0: enabled 1
865 14:57:26.534082 PCI: 00:1e.1: enabled 0
866 14:57:26.534676 PCI: 00:1e.2: enabled 1
867 14:57:26.536907 SPI: 00: enabled 1
868 14:57:26.540923 PCI: 00:1e.3: enabled 1
869 14:57:26.544694 SPI: 01: enabled 1
870 14:57:26.545287 PCI: 00:1f.0: enabled 1
871 14:57:26.546885 PNP: 0c09.0: enabled 1
872 14:57:26.550073 PCI: 00:1f.1: enabled 1
873 14:57:26.553704 PCI: 00:1f.2: enabled 1
874 14:57:26.556913 PCI: 00:1f.3: enabled 1
875 14:57:26.557403 PCI: 00:1f.4: enabled 1
876 14:57:26.560255 PCI: 00:1f.5: enabled 1
877 14:57:26.563581 PCI: 00:1f.6: enabled 0
878 14:57:26.567123 Root Device scanning...
879 14:57:26.570232 scan_static_bus for Root Device
880 14:57:26.570827 CPU_CLUSTER: 0 enabled
881 14:57:26.573549 DOMAIN: 0000 enabled
882 14:57:26.576976 DOMAIN: 0000 scanning...
883 14:57:26.580259 PCI: pci_scan_bus for bus 00
884 14:57:26.583380 PCI: 00:00.0 [8086/0000] ops
885 14:57:26.587275 PCI: 00:00.0 [8086/9b61] enabled
886 14:57:26.590167 PCI: 00:02.0 [8086/0000] bus ops
887 14:57:26.593647 PCI: 00:02.0 [8086/9b41] enabled
888 14:57:26.596964 PCI: 00:04.0 [8086/1903] disabled
889 14:57:26.600380 PCI: 00:08.0 [8086/1911] enabled
890 14:57:26.603256 PCI: 00:12.0 [8086/02f9] enabled
891 14:57:26.606810 PCI: 00:14.0 [8086/0000] bus ops
892 14:57:26.609944 PCI: 00:14.0 [8086/02ed] enabled
893 14:57:26.613507 PCI: 00:14.2 [8086/02ef] enabled
894 14:57:26.617090 PCI: 00:14.3 [8086/02f0] enabled
895 14:57:26.620394 PCI: 00:15.0 [8086/0000] bus ops
896 14:57:26.623584 PCI: 00:15.0 [8086/02e8] enabled
897 14:57:26.626634 PCI: 00:15.1 [8086/0000] bus ops
898 14:57:26.630182 PCI: 00:15.1 [8086/02e9] enabled
899 14:57:26.633051 PCI: 00:16.0 [8086/0000] ops
900 14:57:26.636237 PCI: 00:16.0 [8086/02e0] enabled
901 14:57:26.640274 PCI: 00:17.0 [8086/0000] ops
902 14:57:26.643644 PCI: 00:17.0 [8086/02d3] enabled
903 14:57:26.646524 PCI: 00:19.0 [8086/0000] bus ops
904 14:57:26.650149 PCI: 00:19.0 [8086/02c5] enabled
905 14:57:26.653262 PCI: 00:1d.0 [8086/0000] bus ops
906 14:57:26.656512 PCI: 00:1d.0 [8086/02b0] enabled
907 14:57:26.659695 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 14:57:26.663590 PCI: 00:1e.0 [8086/0000] ops
909 14:57:26.666758 PCI: 00:1e.0 [8086/02a8] enabled
910 14:57:26.669938 PCI: 00:1e.2 [8086/0000] bus ops
911 14:57:26.672981 PCI: 00:1e.2 [8086/02aa] enabled
912 14:57:26.676896 PCI: 00:1e.3 [8086/0000] bus ops
913 14:57:26.679899 PCI: 00:1e.3 [8086/02ab] enabled
914 14:57:26.683491 PCI: 00:1f.0 [8086/0000] bus ops
915 14:57:26.686396 PCI: 00:1f.0 [8086/0284] enabled
916 14:57:26.693296 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 14:57:26.699813 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 14:57:26.702983 PCI: 00:1f.3 [8086/0000] bus ops
919 14:57:26.707094 PCI: 00:1f.3 [8086/02c8] enabled
920 14:57:26.709763 PCI: 00:1f.4 [8086/0000] bus ops
921 14:57:26.712743 PCI: 00:1f.4 [8086/02a3] enabled
922 14:57:26.716151 PCI: 00:1f.5 [8086/0000] bus ops
923 14:57:26.719475 PCI: 00:1f.5 [8086/02a4] enabled
924 14:57:26.722399 PCI: Leftover static devices:
925 14:57:26.722894 PCI: 00:05.0
926 14:57:26.723284 PCI: 00:12.5
927 14:57:26.725757 PCI: 00:12.6
928 14:57:26.726184 PCI: 00:14.1
929 14:57:26.729065 PCI: 00:14.5
930 14:57:26.729587 PCI: 00:15.2
931 14:57:26.729982 PCI: 00:15.3
932 14:57:26.732590 PCI: 00:16.1
933 14:57:26.733180 PCI: 00:16.2
934 14:57:26.735858 PCI: 00:16.3
935 14:57:26.736336 PCI: 00:16.4
936 14:57:26.736717 PCI: 00:16.5
937 14:57:26.739159 PCI: 00:19.1
938 14:57:26.739641 PCI: 00:19.2
939 14:57:26.742620 PCI: 00:1a.0
940 14:57:26.743210 PCI: 00:1c.0
941 14:57:26.743594 PCI: 00:1c.1
942 14:57:26.745942 PCI: 00:1c.2
943 14:57:26.746428 PCI: 00:1c.3
944 14:57:26.749066 PCI: 00:1c.4
945 14:57:26.749621 PCI: 00:1c.5
946 14:57:26.752571 PCI: 00:1c.6
947 14:57:26.753166 PCI: 00:1c.7
948 14:57:26.753591 PCI: 00:1d.1
949 14:57:26.755723 PCI: 00:1d.2
950 14:57:26.756226 PCI: 00:1d.3
951 14:57:26.759106 PCI: 00:1d.4
952 14:57:26.759642 PCI: 00:1d.5
953 14:57:26.760220 PCI: 00:1e.1
954 14:57:26.762483 PCI: 00:1f.1
955 14:57:26.762959 PCI: 00:1f.2
956 14:57:26.765578 PCI: 00:1f.6
957 14:57:26.769112 PCI: Check your devicetree.cb.
958 14:57:26.769634 PCI: 00:02.0 scanning...
959 14:57:26.772385 scan_generic_bus for PCI: 00:02.0
960 14:57:26.779285 scan_generic_bus for PCI: 00:02.0 done
961 14:57:26.782120 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
962 14:57:26.785558 PCI: 00:14.0 scanning...
963 14:57:26.788933 scan_static_bus for PCI: 00:14.0
964 14:57:26.792397 USB0 port 0 enabled
965 14:57:26.795790 USB0 port 0 scanning...
966 14:57:26.798792 scan_static_bus for USB0 port 0
967 14:57:26.799271 USB2 port 0 enabled
968 14:57:26.802131 USB2 port 1 enabled
969 14:57:26.802603 USB2 port 2 disabled
970 14:57:26.805753 USB2 port 3 disabled
971 14:57:26.809278 USB2 port 5 disabled
972 14:57:26.809902 USB2 port 6 enabled
973 14:57:26.812156 USB2 port 9 enabled
974 14:57:26.815429 USB3 port 0 enabled
975 14:57:26.816007 USB3 port 1 enabled
976 14:57:26.819221 USB3 port 2 enabled
977 14:57:26.819806 USB3 port 3 enabled
978 14:57:26.822815 USB3 port 4 disabled
979 14:57:26.825700 USB2 port 0 scanning...
980 14:57:26.828739 scan_static_bus for USB2 port 0
981 14:57:26.831928 scan_static_bus for USB2 port 0 done
982 14:57:26.838563 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
983 14:57:26.839065 USB2 port 1 scanning...
984 14:57:26.842163 scan_static_bus for USB2 port 1
985 14:57:26.848576 scan_static_bus for USB2 port 1 done
986 14:57:26.851764 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
987 14:57:26.855613 USB2 port 6 scanning...
988 14:57:26.858317 scan_static_bus for USB2 port 6
989 14:57:26.861822 scan_static_bus for USB2 port 6 done
990 14:57:26.868719 scan_bus: scanning of bus USB2 port 6 took 9693 usecs
991 14:57:26.869344 USB2 port 9 scanning...
992 14:57:26.871891 scan_static_bus for USB2 port 9
993 14:57:26.879277 scan_static_bus for USB2 port 9 done
994 14:57:26.881792 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
995 14:57:26.885847 USB3 port 0 scanning...
996 14:57:26.888879 scan_static_bus for USB3 port 0
997 14:57:26.891709 scan_static_bus for USB3 port 0 done
998 14:57:26.898364 scan_bus: scanning of bus USB3 port 0 took 9686 usecs
999 14:57:26.898929 USB3 port 1 scanning...
1000 14:57:26.902154 scan_static_bus for USB3 port 1
1001 14:57:26.908780 scan_static_bus for USB3 port 1 done
1002 14:57:26.912071 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
1003 14:57:26.915200 USB3 port 2 scanning...
1004 14:57:26.918659 scan_static_bus for USB3 port 2
1005 14:57:26.922091 scan_static_bus for USB3 port 2 done
1006 14:57:26.928406 scan_bus: scanning of bus USB3 port 2 took 9684 usecs
1007 14:57:26.928989 USB3 port 3 scanning...
1008 14:57:26.932224 scan_static_bus for USB3 port 3
1009 14:57:26.938287 scan_static_bus for USB3 port 3 done
1010 14:57:26.941996 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
1011 14:57:26.944949 scan_static_bus for USB0 port 0 done
1012 14:57:26.951737 scan_bus: scanning of bus USB0 port 0 took 155293 usecs
1013 14:57:26.954905 scan_static_bus for PCI: 00:14.0 done
1014 14:57:26.961340 scan_bus: scanning of bus PCI: 00:14.0 took 172901 usecs
1015 14:57:26.965124 PCI: 00:15.0 scanning...
1016 14:57:26.968347 scan_generic_bus for PCI: 00:15.0
1017 14:57:26.971886 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 14:57:26.975091 scan_generic_bus for PCI: 00:15.0 done
1019 14:57:26.981549 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
1020 14:57:26.984979 PCI: 00:15.1 scanning...
1021 14:57:26.988462 scan_generic_bus for PCI: 00:15.1
1022 14:57:26.991676 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 14:57:26.995073 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 14:57:26.998318 scan_generic_bus for PCI: 00:15.1 done
1025 14:57:27.004981 scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs
1026 14:57:27.008444 PCI: 00:19.0 scanning...
1027 14:57:27.011882 scan_generic_bus for PCI: 00:19.0
1028 14:57:27.015409 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 14:57:27.018430 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 14:57:27.025375 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 14:57:27.028282 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 14:57:27.031102 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 14:57:27.035133 scan_generic_bus for PCI: 00:19.0 done
1034 14:57:27.041313 scan_bus: scanning of bus PCI: 00:19.0 took 30740 usecs
1035 14:57:27.044482 PCI: 00:1d.0 scanning...
1036 14:57:27.048194 do_pci_scan_bridge for PCI: 00:1d.0
1037 14:57:27.051402 PCI: pci_scan_bus for bus 01
1038 14:57:27.054844 PCI: 01:00.0 [1c5c/1327] enabled
1039 14:57:27.057910 Enabling Common Clock Configuration
1040 14:57:27.061128 L1 Sub-State supported from root port 29
1041 14:57:27.064881 L1 Sub-State Support = 0xf
1042 14:57:27.067701 CommonModeRestoreTime = 0x28
1043 14:57:27.071412 Power On Value = 0x16, Power On Scale = 0x0
1044 14:57:27.074404 ASPM: Enabled L1
1045 14:57:27.078307 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
1046 14:57:27.081639 PCI: 00:1e.2 scanning...
1047 14:57:27.084848 scan_generic_bus for PCI: 00:1e.2
1048 14:57:27.087884 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 14:57:27.094878 scan_generic_bus for PCI: 00:1e.2 done
1050 14:57:27.098167 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1051 14:57:27.101393 PCI: 00:1e.3 scanning...
1052 14:57:27.104685 scan_generic_bus for PCI: 00:1e.3
1053 14:57:27.107808 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 14:57:27.111051 scan_generic_bus for PCI: 00:1e.3 done
1055 14:57:27.117680 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1056 14:57:27.121356 PCI: 00:1f.0 scanning...
1057 14:57:27.124866 scan_static_bus for PCI: 00:1f.0
1058 14:57:27.127791 PNP: 0c09.0 enabled
1059 14:57:27.131299 scan_static_bus for PCI: 00:1f.0 done
1060 14:57:27.134308 scan_bus: scanning of bus PCI: 00:1f.0 took 12041 usecs
1061 14:57:27.137616 PCI: 00:1f.3 scanning...
1062 14:57:27.145085 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1063 14:57:27.147775 PCI: 00:1f.4 scanning...
1064 14:57:27.150995 scan_generic_bus for PCI: 00:1f.4
1065 14:57:27.154529 scan_generic_bus for PCI: 00:1f.4 done
1066 14:57:27.161919 scan_bus: scanning of bus PCI: 00:1f.4 took 10181 usecs
1067 14:57:27.162492 PCI: 00:1f.5 scanning...
1068 14:57:27.164724 scan_generic_bus for PCI: 00:1f.5
1069 14:57:27.170948 scan_generic_bus for PCI: 00:1f.5 done
1070 14:57:27.173996 scan_bus: scanning of bus PCI: 00:1f.5 took 10175 usecs
1071 14:57:27.180845 scan_bus: scanning of bus DOMAIN: 0000 took 604846 usecs
1072 14:57:27.183921 scan_static_bus for Root Device done
1073 14:57:27.190446 scan_bus: scanning of bus Root Device took 624710 usecs
1074 14:57:27.191006 done
1075 14:57:27.194197 Chrome EC: UHEPI supported
1076 14:57:27.200618 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 14:57:27.207308 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 14:57:27.210916 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 14:57:27.218933 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 14:57:27.222298 SPI flash protection: WPSW=0 SRP0=0
1081 14:57:27.228584 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 14:57:27.231853 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 14:57:27.235304 found VGA at PCI: 00:02.0
1084 14:57:27.238259 Setting up VGA for PCI: 00:02.0
1085 14:57:27.245119 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 14:57:27.248928 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 14:57:27.251676 Allocating resources...
1088 14:57:27.255352 Reading resources...
1089 14:57:27.258386 Root Device read_resources bus 0 link: 0
1090 14:57:27.261372 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 14:57:27.268556 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 14:57:27.271688 DOMAIN: 0000 read_resources bus 0 link: 0
1093 14:57:27.279215 PCI: 00:14.0 read_resources bus 0 link: 0
1094 14:57:27.282546 USB0 port 0 read_resources bus 0 link: 0
1095 14:57:27.290642 USB0 port 0 read_resources bus 0 link: 0 done
1096 14:57:27.293591 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 14:57:27.300910 PCI: 00:15.0 read_resources bus 1 link: 0
1098 14:57:27.304211 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 14:57:27.310879 PCI: 00:15.1 read_resources bus 2 link: 0
1100 14:57:27.314316 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 14:57:27.321755 PCI: 00:19.0 read_resources bus 3 link: 0
1102 14:57:27.328372 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 14:57:27.331770 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 14:57:27.338358 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 14:57:27.341728 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 14:57:27.348240 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 14:57:27.351734 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 14:57:27.358082 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 14:57:27.361543 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 14:57:27.368049 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 14:57:27.375378 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 14:57:27.377759 Root Device read_resources bus 0 link: 0 done
1113 14:57:27.381197 Done reading resources.
1114 14:57:27.384648 Show resources in subtree (Root Device)...After reading.
1115 14:57:27.391192 Root Device child on link 0 CPU_CLUSTER: 0
1116 14:57:27.394673 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 14:57:27.395234 APIC: 00
1118 14:57:27.397762 APIC: 02
1119 14:57:27.398241 APIC: 01
1120 14:57:27.401018 APIC: 03
1121 14:57:27.401532 APIC: 07
1122 14:57:27.401922 APIC: 05
1123 14:57:27.404507 APIC: 04
1124 14:57:27.405076 APIC: 06
1125 14:57:27.407435 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 14:57:27.417642 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 14:57:27.467556 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 14:57:27.468289 PCI: 00:00.0
1129 14:57:27.469177 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 14:57:27.469833 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 14:57:27.470295 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 14:57:27.470672 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 14:57:27.476425 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 14:57:27.486040 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 14:57:27.496092 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 14:57:27.505939 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 14:57:27.512454 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 14:57:27.522230 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 14:57:27.532661 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 14:57:27.543185 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 14:57:27.552438 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 14:57:27.562328 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 14:57:27.569017 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 14:57:27.578693 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 14:57:27.582303 PCI: 00:02.0
1146 14:57:27.592265 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:57:27.602557 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:57:27.611948 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:57:27.612512 PCI: 00:04.0
1150 14:57:27.615651 PCI: 00:08.0
1151 14:57:27.621662 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:57:27.625568 PCI: 00:12.0
1153 14:57:27.636320 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:57:27.638913 PCI: 00:14.0 child on link 0 USB0 port 0
1155 14:57:27.648539 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:57:27.655060 USB0 port 0 child on link 0 USB2 port 0
1157 14:57:27.655627 USB2 port 0
1158 14:57:27.658679 USB2 port 1
1159 14:57:27.659155 USB2 port 2
1160 14:57:27.661746 USB2 port 3
1161 14:57:27.662319 USB2 port 5
1162 14:57:27.664881 USB2 port 6
1163 14:57:27.665355 USB2 port 9
1164 14:57:27.668488 USB3 port 0
1165 14:57:27.668962 USB3 port 1
1166 14:57:27.671420 USB3 port 2
1167 14:57:27.671892 USB3 port 3
1168 14:57:27.675050 USB3 port 4
1169 14:57:27.678120 PCI: 00:14.2
1170 14:57:27.688758 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 14:57:27.698213 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 14:57:27.698859 PCI: 00:14.3
1173 14:57:27.708045 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 14:57:27.711426 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 14:57:27.721419 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 14:57:27.724677 I2C: 01:15
1177 14:57:27.728164 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 14:57:27.737967 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 14:57:27.738539 I2C: 02:5d
1180 14:57:27.740992 GENERIC: 0.0
1181 14:57:27.744637 PCI: 00:16.0
1182 14:57:27.754722 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:57:27.755301 PCI: 00:17.0
1184 14:57:27.764526 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 14:57:27.771187 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 14:57:27.781314 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 14:57:27.788957 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 14:57:27.798401 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 14:57:27.807825 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 14:57:27.811149 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 14:57:27.820967 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 14:57:27.821567 I2C: 03:1a
1193 14:57:27.823944 I2C: 03:38
1194 14:57:27.824414 I2C: 03:39
1195 14:57:27.827609 I2C: 03:3a
1196 14:57:27.828083 I2C: 03:3b
1197 14:57:27.834095 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 14:57:27.840937 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 14:57:27.850822 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 14:57:27.861276 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 14:57:27.861916 PCI: 01:00.0
1202 14:57:27.870619 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 14:57:27.874481 PCI: 00:1e.0
1204 14:57:27.884059 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 14:57:27.894034 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 14:57:27.901055 PCI: 00:1e.2 child on link 0 SPI: 00
1207 14:57:27.910227 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 14:57:27.910801 SPI: 00
1209 14:57:27.913782 PCI: 00:1e.3 child on link 0 SPI: 01
1210 14:57:27.923666 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 14:57:27.924230 SPI: 01
1212 14:57:27.930488 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 14:57:27.937640 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 14:57:27.946972 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 14:57:27.950208 PNP: 0c09.0
1216 14:57:27.957492 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 14:57:27.960784 PCI: 00:1f.3
1218 14:57:27.969989 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:57:27.980686 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:57:27.981274 PCI: 00:1f.4
1221 14:57:27.990426 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 14:57:28.000019 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 14:57:28.000641 PCI: 00:1f.5
1224 14:57:28.010165 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 14:57:28.016474 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 14:57:28.023033 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 14:57:28.029919 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 14:57:28.032870 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 14:57:28.036337 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 14:57:28.039596 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 14:57:28.043191 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 14:57:28.050087 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 14:57:28.056349 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 14:57:28.065801 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 14:57:28.073051 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 14:57:28.079678 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 14:57:28.085988 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 14:57:28.092674 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 14:57:28.096148 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 14:57:28.102704 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 14:57:28.106112 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 14:57:28.112586 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 14:57:28.116315 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 14:57:28.122474 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 14:57:28.125922 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 14:57:28.132376 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 14:57:28.135844 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 14:57:28.142183 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 14:57:28.145898 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 14:57:28.152571 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 14:57:28.155703 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 14:57:28.158879 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 14:57:28.166144 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 14:57:28.169018 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 14:57:28.175524 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 14:57:28.178923 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 14:57:28.185755 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 14:57:28.189247 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 14:57:28.195497 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 14:57:28.198881 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 14:57:28.205430 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 14:57:28.212481 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 14:57:28.215722 avoid_fixed_resources: DOMAIN: 0000
1264 14:57:28.221974 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 14:57:28.228565 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 14:57:28.235096 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 14:57:28.245059 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 14:57:28.251650 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 14:57:28.258322 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 14:57:28.268225 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 14:57:28.274882 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 14:57:28.281387 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 14:57:28.288224 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 14:57:28.298142 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 14:57:28.304678 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 14:57:28.305252 Setting resources...
1277 14:57:28.311532 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 14:57:28.318147 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 14:57:28.321662 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 14:57:28.325370 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 14:57:28.328218 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 14:57:28.334399 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 14:57:28.341846 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 14:57:28.347719 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 14:57:28.354398 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 14:57:28.360977 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 14:57:28.364452 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 14:57:28.370758 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 14:57:28.373949 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 14:57:28.381227 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 14:57:28.384364 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 14:57:28.390664 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 14:57:28.393845 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 14:57:28.397571 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 14:57:28.404363 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 14:57:28.407510 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 14:57:28.414731 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 14:57:28.418064 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 14:57:28.424243 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 14:57:28.427431 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 14:57:28.434177 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 14:57:28.437296 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 14:57:28.443933 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 14:57:28.446930 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 14:57:28.454366 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 14:57:28.457158 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 14:57:28.460414 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 14:57:28.466769 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 14:57:28.473851 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 14:57:28.480381 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 14:57:28.490558 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 14:57:28.497740 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 14:57:28.500311 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 14:57:28.510584 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 14:57:28.513811 Root Device assign_resources, bus 0 link: 0
1316 14:57:28.517638 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:57:28.527183 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 14:57:28.533839 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:57:28.543292 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 14:57:28.550270 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 14:57:28.560011 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 14:57:28.566509 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 14:57:28.572954 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 14:57:28.576633 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 14:57:28.587560 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 14:57:28.593196 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 14:57:28.599605 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 14:57:28.610319 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 14:57:28.614065 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 14:57:28.619920 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 14:57:28.626566 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 14:57:28.630638 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 14:57:28.637020 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 14:57:28.643723 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 14:57:28.653397 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 14:57:28.660489 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 14:57:28.666828 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 14:57:28.676652 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 14:57:28.683567 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 14:57:28.690141 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 14:57:28.700056 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 14:57:28.703438 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 14:57:28.709866 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 14:57:28.716629 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 14:57:28.726656 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 14:57:28.736088 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 14:57:28.739383 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 14:57:28.746055 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 14:57:28.752842 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 14:57:28.759518 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 14:57:28.769414 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 14:57:28.773177 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 14:57:28.779060 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 14:57:28.785826 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 14:57:28.792213 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 14:57:28.795768 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 14:57:28.799002 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 14:57:28.805850 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 14:57:28.809540 LPC: Trying to open IO window from 800 size 1ff
1360 14:57:28.819137 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 14:57:28.825912 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 14:57:28.836324 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 14:57:28.842621 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 14:57:28.849020 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 14:57:28.852371 Root Device assign_resources, bus 0 link: 0
1366 14:57:28.855753 Done setting resources.
1367 14:57:28.862106 Show resources in subtree (Root Device)...After assigning values.
1368 14:57:28.865846 Root Device child on link 0 CPU_CLUSTER: 0
1369 14:57:28.868935 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 14:57:28.872166 APIC: 00
1371 14:57:28.872628 APIC: 02
1372 14:57:28.872993 APIC: 01
1373 14:57:28.875704 APIC: 03
1374 14:57:28.876276 APIC: 07
1375 14:57:28.878954 APIC: 05
1376 14:57:28.879526 APIC: 04
1377 14:57:28.879896 APIC: 06
1378 14:57:28.885436 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 14:57:28.895292 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 14:57:28.905406 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 14:57:28.906017 PCI: 00:00.0
1382 14:57:28.915337 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 14:57:28.925244 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 14:57:28.935126 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 14:57:28.945102 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 14:57:28.955217 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 14:57:28.965071 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 14:57:28.971398 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 14:57:28.981261 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 14:57:28.991604 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 14:57:29.001036 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 14:57:29.011243 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 14:57:29.018221 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 14:57:29.028278 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 14:57:29.037557 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 14:57:29.047608 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 14:57:29.057795 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 14:57:29.058372 PCI: 00:02.0
1399 14:57:29.070472 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 14:57:29.080970 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 14:57:29.090396 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 14:57:29.090995 PCI: 00:04.0
1403 14:57:29.093812 PCI: 00:08.0
1404 14:57:29.103269 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 14:57:29.103835 PCI: 00:12.0
1406 14:57:29.113942 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 14:57:29.120146 PCI: 00:14.0 child on link 0 USB0 port 0
1408 14:57:29.129727 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 14:57:29.133443 USB0 port 0 child on link 0 USB2 port 0
1410 14:57:29.135989 USB2 port 0
1411 14:57:29.136468 USB2 port 1
1412 14:57:29.139558 USB2 port 2
1413 14:57:29.140075 USB2 port 3
1414 14:57:29.143355 USB2 port 5
1415 14:57:29.143929 USB2 port 6
1416 14:57:29.146596 USB2 port 9
1417 14:57:29.147168 USB3 port 0
1418 14:57:29.150543 USB3 port 1
1419 14:57:29.153085 USB3 port 2
1420 14:57:29.153685 USB3 port 3
1421 14:57:29.156374 USB3 port 4
1422 14:57:29.156942 PCI: 00:14.2
1423 14:57:29.166399 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 14:57:29.175978 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 14:57:29.179089 PCI: 00:14.3
1426 14:57:29.189325 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 14:57:29.192358 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 14:57:29.202446 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 14:57:29.205559 I2C: 01:15
1430 14:57:29.209147 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 14:57:29.218808 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 14:57:29.222350 I2C: 02:5d
1433 14:57:29.222820 GENERIC: 0.0
1434 14:57:29.225852 PCI: 00:16.0
1435 14:57:29.235335 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 14:57:29.235908 PCI: 00:17.0
1437 14:57:29.248847 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 14:57:29.258365 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 14:57:29.265030 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 14:57:29.275047 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 14:57:29.284927 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 14:57:29.294686 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 14:57:29.298322 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 14:57:29.308302 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 14:57:29.311320 I2C: 03:1a
1446 14:57:29.311921 I2C: 03:38
1447 14:57:29.314468 I2C: 03:39
1448 14:57:29.315132 I2C: 03:3a
1449 14:57:29.317998 I2C: 03:3b
1450 14:57:29.321224 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 14:57:29.331578 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 14:57:29.341101 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 14:57:29.351245 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 14:57:29.354459 PCI: 01:00.0
1455 14:57:29.364518 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 14:57:29.365102 PCI: 00:1e.0
1457 14:57:29.378064 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 14:57:29.387658 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 14:57:29.390430 PCI: 00:1e.2 child on link 0 SPI: 00
1460 14:57:29.400605 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 14:57:29.401193 SPI: 00
1462 14:57:29.407678 PCI: 00:1e.3 child on link 0 SPI: 01
1463 14:57:29.417053 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 14:57:29.417753 SPI: 01
1465 14:57:29.420278 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 14:57:29.430214 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 14:57:29.439969 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 14:57:29.440530 PNP: 0c09.0
1469 14:57:29.450309 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 14:57:29.450894 PCI: 00:1f.3
1471 14:57:29.463497 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 14:57:29.473546 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 14:57:29.474128 PCI: 00:1f.4
1474 14:57:29.483251 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 14:57:29.493320 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 14:57:29.493964 PCI: 00:1f.5
1477 14:57:29.506429 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 14:57:29.507027 Done allocating resources.
1479 14:57:29.513043 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 14:57:29.516192 Enabling resources...
1481 14:57:29.519245 PCI: 00:00.0 subsystem <- 8086/9b61
1482 14:57:29.523818 PCI: 00:00.0 cmd <- 06
1483 14:57:29.525887 PCI: 00:02.0 subsystem <- 8086/9b41
1484 14:57:29.529531 PCI: 00:02.0 cmd <- 03
1485 14:57:29.532749 PCI: 00:08.0 cmd <- 06
1486 14:57:29.536408 PCI: 00:12.0 subsystem <- 8086/02f9
1487 14:57:29.539078 PCI: 00:12.0 cmd <- 02
1488 14:57:29.542754 PCI: 00:14.0 subsystem <- 8086/02ed
1489 14:57:29.545832 PCI: 00:14.0 cmd <- 02
1490 14:57:29.546329 PCI: 00:14.2 cmd <- 02
1491 14:57:29.552922 PCI: 00:14.3 subsystem <- 8086/02f0
1492 14:57:29.553535 PCI: 00:14.3 cmd <- 02
1493 14:57:29.556238 PCI: 00:15.0 subsystem <- 8086/02e8
1494 14:57:29.559252 PCI: 00:15.0 cmd <- 02
1495 14:57:29.562543 PCI: 00:15.1 subsystem <- 8086/02e9
1496 14:57:29.566101 PCI: 00:15.1 cmd <- 02
1497 14:57:29.569824 PCI: 00:16.0 subsystem <- 8086/02e0
1498 14:57:29.572853 PCI: 00:16.0 cmd <- 02
1499 14:57:29.575661 PCI: 00:17.0 subsystem <- 8086/02d3
1500 14:57:29.579431 PCI: 00:17.0 cmd <- 03
1501 14:57:29.582452 PCI: 00:19.0 subsystem <- 8086/02c5
1502 14:57:29.586273 PCI: 00:19.0 cmd <- 02
1503 14:57:29.589084 PCI: 00:1d.0 bridge ctrl <- 0013
1504 14:57:29.592489 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 14:57:29.595965 PCI: 00:1d.0 cmd <- 06
1506 14:57:29.599722 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 14:57:29.600300 PCI: 00:1e.0 cmd <- 06
1508 14:57:29.605977 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 14:57:29.606618 PCI: 00:1e.2 cmd <- 06
1510 14:57:29.609387 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 14:57:29.612492 PCI: 00:1e.3 cmd <- 02
1512 14:57:29.616016 PCI: 00:1f.0 subsystem <- 8086/0284
1513 14:57:29.618988 PCI: 00:1f.0 cmd <- 407
1514 14:57:29.622405 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 14:57:29.625571 PCI: 00:1f.3 cmd <- 02
1516 14:57:29.629196 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 14:57:29.632503 PCI: 00:1f.4 cmd <- 03
1518 14:57:29.635655 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 14:57:29.639431 PCI: 00:1f.5 cmd <- 406
1520 14:57:29.648013 PCI: 01:00.0 cmd <- 02
1521 14:57:29.652621 done.
1522 14:57:29.664581 ME: Version: 14.0.39.1367
1523 14:57:29.671382 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 11
1524 14:57:29.675000 Initializing devices...
1525 14:57:29.675603 Root Device init ...
1526 14:57:29.681400 Chrome EC: Set SMI mask to 0x0000000000000000
1527 14:57:29.685462 Chrome EC: clear events_b mask to 0x0000000000000000
1528 14:57:29.691907 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 14:57:29.697848 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 14:57:29.704542 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 14:57:29.708110 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 14:57:29.711169 Root Device init finished in 35194 usecs
1533 14:57:29.714905 CPU_CLUSTER: 0 init ...
1534 14:57:29.721432 CPU_CLUSTER: 0 init finished in 2449 usecs
1535 14:57:29.725270 PCI: 00:00.0 init ...
1536 14:57:29.728751 CPU TDP: 15 Watts
1537 14:57:29.732322 CPU PL2 = 64 Watts
1538 14:57:29.735562 PCI: 00:00.0 init finished in 7078 usecs
1539 14:57:29.738688 PCI: 00:02.0 init ...
1540 14:57:29.741840 PCI: 00:02.0 init finished in 2247 usecs
1541 14:57:29.745591 PCI: 00:08.0 init ...
1542 14:57:29.748703 PCI: 00:08.0 init finished in 2254 usecs
1543 14:57:29.752172 PCI: 00:12.0 init ...
1544 14:57:29.755897 PCI: 00:12.0 init finished in 2254 usecs
1545 14:57:29.758878 PCI: 00:14.0 init ...
1546 14:57:29.761960 PCI: 00:14.0 init finished in 2253 usecs
1547 14:57:29.764970 PCI: 00:14.2 init ...
1548 14:57:29.768594 PCI: 00:14.2 init finished in 2255 usecs
1549 14:57:29.771940 PCI: 00:14.3 init ...
1550 14:57:29.774892 PCI: 00:14.3 init finished in 2271 usecs
1551 14:57:29.778792 PCI: 00:15.0 init ...
1552 14:57:29.781999 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 14:57:29.784895 PCI: 00:15.0 init finished in 5975 usecs
1554 14:57:29.788399 PCI: 00:15.1 init ...
1555 14:57:29.791587 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 14:57:29.798145 PCI: 00:15.1 init finished in 5980 usecs
1557 14:57:29.798728 PCI: 00:16.0 init ...
1558 14:57:29.804865 PCI: 00:16.0 init finished in 2253 usecs
1559 14:57:29.808308 PCI: 00:19.0 init ...
1560 14:57:29.811037 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 14:57:29.815124 PCI: 00:19.0 init finished in 5981 usecs
1562 14:57:29.818058 PCI: 00:1d.0 init ...
1563 14:57:29.821247 Initializing PCH PCIe bridge.
1564 14:57:29.824308 PCI: 00:1d.0 init finished in 5287 usecs
1565 14:57:29.827623 PCI: 00:1f.0 init ...
1566 14:57:29.830971 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 14:57:29.837226 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 14:57:29.837754 IOAPIC: ID = 0x02
1569 14:57:29.841126 IOAPIC: Dumping registers
1570 14:57:29.844034 reg 0x0000: 0x02000000
1571 14:57:29.847361 reg 0x0001: 0x00770020
1572 14:57:29.847836 reg 0x0002: 0x00000000
1573 14:57:29.854280 PCI: 00:1f.0 init finished in 23552 usecs
1574 14:57:29.857018 PCI: 00:1f.4 init ...
1575 14:57:29.860461 PCI: 00:1f.4 init finished in 2264 usecs
1576 14:57:29.871577 PCI: 01:00.0 init ...
1577 14:57:29.874763 PCI: 01:00.0 init finished in 2254 usecs
1578 14:57:29.879302 PNP: 0c09.0 init ...
1579 14:57:29.882462 Google Chrome EC uptime: 11.103 seconds
1580 14:57:29.889265 Google Chrome AP resets since EC boot: 0
1581 14:57:29.892551 Google Chrome most recent AP reset causes:
1582 14:57:29.899479 Google Chrome EC reset flags at last EC boot: reset-pin
1583 14:57:29.902360 PNP: 0c09.0 init finished in 20583 usecs
1584 14:57:29.905534 Devices initialized
1585 14:57:29.909092 Show all devs... After init.
1586 14:57:29.909738 Root Device: enabled 1
1587 14:57:29.912356 CPU_CLUSTER: 0: enabled 1
1588 14:57:29.915727 DOMAIN: 0000: enabled 1
1589 14:57:29.916299 APIC: 00: enabled 1
1590 14:57:29.918924 PCI: 00:00.0: enabled 1
1591 14:57:29.922773 PCI: 00:02.0: enabled 1
1592 14:57:29.925785 PCI: 00:04.0: enabled 0
1593 14:57:29.926360 PCI: 00:05.0: enabled 0
1594 14:57:29.929169 PCI: 00:12.0: enabled 1
1595 14:57:29.932071 PCI: 00:12.5: enabled 0
1596 14:57:29.936223 PCI: 00:12.6: enabled 0
1597 14:57:29.936837 PCI: 00:14.0: enabled 1
1598 14:57:29.938497 PCI: 00:14.1: enabled 0
1599 14:57:29.942115 PCI: 00:14.3: enabled 1
1600 14:57:29.942716 PCI: 00:14.5: enabled 0
1601 14:57:29.945527 PCI: 00:15.0: enabled 1
1602 14:57:29.948610 PCI: 00:15.1: enabled 1
1603 14:57:29.951992 PCI: 00:15.2: enabled 0
1604 14:57:29.952470 PCI: 00:15.3: enabled 0
1605 14:57:29.955909 PCI: 00:16.0: enabled 1
1606 14:57:29.958661 PCI: 00:16.1: enabled 0
1607 14:57:29.961794 PCI: 00:16.2: enabled 0
1608 14:57:29.962273 PCI: 00:16.3: enabled 0
1609 14:57:29.964960 PCI: 00:16.4: enabled 0
1610 14:57:29.968559 PCI: 00:16.5: enabled 0
1611 14:57:29.971722 PCI: 00:17.0: enabled 1
1612 14:57:29.972200 PCI: 00:19.0: enabled 1
1613 14:57:29.975184 PCI: 00:19.1: enabled 0
1614 14:57:29.978300 PCI: 00:19.2: enabled 0
1615 14:57:29.978774 PCI: 00:1a.0: enabled 0
1616 14:57:29.981795 PCI: 00:1c.0: enabled 0
1617 14:57:29.984706 PCI: 00:1c.1: enabled 0
1618 14:57:29.988345 PCI: 00:1c.2: enabled 0
1619 14:57:29.988820 PCI: 00:1c.3: enabled 0
1620 14:57:29.991707 PCI: 00:1c.4: enabled 0
1621 14:57:29.995059 PCI: 00:1c.5: enabled 0
1622 14:57:29.998470 PCI: 00:1c.6: enabled 0
1623 14:57:29.998944 PCI: 00:1c.7: enabled 0
1624 14:57:30.001523 PCI: 00:1d.0: enabled 1
1625 14:57:30.004848 PCI: 00:1d.1: enabled 0
1626 14:57:30.008093 PCI: 00:1d.2: enabled 0
1627 14:57:30.008665 PCI: 00:1d.3: enabled 0
1628 14:57:30.011871 PCI: 00:1d.4: enabled 0
1629 14:57:30.014584 PCI: 00:1d.5: enabled 0
1630 14:57:30.018681 PCI: 00:1e.0: enabled 1
1631 14:57:30.019252 PCI: 00:1e.1: enabled 0
1632 14:57:30.021391 PCI: 00:1e.2: enabled 1
1633 14:57:30.024794 PCI: 00:1e.3: enabled 1
1634 14:57:30.025366 PCI: 00:1f.0: enabled 1
1635 14:57:30.029191 PCI: 00:1f.1: enabled 0
1636 14:57:30.031526 PCI: 00:1f.2: enabled 0
1637 14:57:30.034636 PCI: 00:1f.3: enabled 1
1638 14:57:30.035209 PCI: 00:1f.4: enabled 1
1639 14:57:30.038055 PCI: 00:1f.5: enabled 1
1640 14:57:30.041585 PCI: 00:1f.6: enabled 0
1641 14:57:30.044859 USB0 port 0: enabled 1
1642 14:57:30.045430 I2C: 01:15: enabled 1
1643 14:57:30.047722 I2C: 02:5d: enabled 1
1644 14:57:30.051118 GENERIC: 0.0: enabled 1
1645 14:57:30.051679 I2C: 03:1a: enabled 1
1646 14:57:30.054614 I2C: 03:38: enabled 1
1647 14:57:30.057884 I2C: 03:39: enabled 1
1648 14:57:30.058359 I2C: 03:3a: enabled 1
1649 14:57:30.061035 I2C: 03:3b: enabled 1
1650 14:57:30.064330 PCI: 00:00.0: enabled 1
1651 14:57:30.064897 SPI: 00: enabled 1
1652 14:57:30.067416 SPI: 01: enabled 1
1653 14:57:30.070955 PNP: 0c09.0: enabled 1
1654 14:57:30.071531 USB2 port 0: enabled 1
1655 14:57:30.074274 USB2 port 1: enabled 1
1656 14:57:30.077492 USB2 port 2: enabled 0
1657 14:57:30.081074 USB2 port 3: enabled 0
1658 14:57:30.081708 USB2 port 5: enabled 0
1659 14:57:30.084290 USB2 port 6: enabled 1
1660 14:57:30.087860 USB2 port 9: enabled 1
1661 14:57:30.088442 USB3 port 0: enabled 1
1662 14:57:30.090578 USB3 port 1: enabled 1
1663 14:57:30.093989 USB3 port 2: enabled 1
1664 14:57:30.094465 USB3 port 3: enabled 1
1665 14:57:30.097925 USB3 port 4: enabled 0
1666 14:57:30.101090 APIC: 02: enabled 1
1667 14:57:30.101732 APIC: 01: enabled 1
1668 14:57:30.104088 APIC: 03: enabled 1
1669 14:57:30.107727 APIC: 07: enabled 1
1670 14:57:30.108315 APIC: 05: enabled 1
1671 14:57:30.110692 APIC: 04: enabled 1
1672 14:57:30.111279 APIC: 06: enabled 1
1673 14:57:30.114083 PCI: 00:08.0: enabled 1
1674 14:57:30.117399 PCI: 00:14.2: enabled 1
1675 14:57:30.120743 PCI: 01:00.0: enabled 1
1676 14:57:30.124514 Disabling ACPI via APMC:
1677 14:57:30.128067 done.
1678 14:57:30.131023 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 14:57:30.134334 ELOG: NV offset 0xaf0000 size 0x4000
1680 14:57:30.141107 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 14:57:30.147332 ELOG: Event(17) added with size 13 at 2023-05-03 14:57:28 UTC
1682 14:57:30.154132 ELOG: Event(92) added with size 9 at 2023-05-03 14:57:28 UTC
1683 14:57:30.160822 ELOG: Event(93) added with size 9 at 2023-05-03 14:57:28 UTC
1684 14:57:30.167486 ELOG: Event(9A) added with size 9 at 2023-05-03 14:57:28 UTC
1685 14:57:30.173870 ELOG: Event(9E) added with size 10 at 2023-05-03 14:57:28 UTC
1686 14:57:30.180314 ELOG: Event(9F) added with size 14 at 2023-05-03 14:57:28 UTC
1687 14:57:30.183777 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 14:57:30.191660 ELOG: Event(A1) added with size 10 at 2023-05-03 14:57:28 UTC
1689 14:57:30.201016 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 14:57:30.207919 ELOG: Event(A0) added with size 9 at 2023-05-03 14:57:28 UTC
1691 14:57:30.211188 elog_add_boot_reason: Logged dev mode boot
1692 14:57:30.214481 Finalize devices...
1693 14:57:30.215058 PCI: 00:17.0 final
1694 14:57:30.217577 Devices finalized
1695 14:57:30.221190 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 14:57:30.227840 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 14:57:30.231034 ME: HFSTS1 : 0x90000245
1698 14:57:30.234155 ME: HFSTS2 : 0x3B850126
1699 14:57:30.241105 ME: HFSTS3 : 0x00000020
1700 14:57:30.244301 ME: HFSTS4 : 0x00004800
1701 14:57:30.247377 ME: HFSTS5 : 0x00000000
1702 14:57:30.250430 ME: HFSTS6 : 0x40400006
1703 14:57:30.253930 ME: Manufacturing Mode : NO
1704 14:57:30.257353 ME: FW Partition Table : OK
1705 14:57:30.260304 ME: Bringup Loader Failure : NO
1706 14:57:30.264034 ME: Firmware Init Complete : YES
1707 14:57:30.266725 ME: Boot Options Present : NO
1708 14:57:30.270433 ME: Update In Progress : NO
1709 14:57:30.273534 ME: D0i3 Support : YES
1710 14:57:30.276934 ME: Low Power State Enabled : NO
1711 14:57:30.279835 ME: CPU Replaced : NO
1712 14:57:30.286788 ME: CPU Replacement Valid : YES
1713 14:57:30.287362 ME: Current Working State : 5
1714 14:57:30.289925 ME: Current Operation State : 1
1715 14:57:30.293216 ME: Current Operation Mode : 0
1716 14:57:30.296539 ME: Error Code : 0
1717 14:57:30.299754 ME: CPU Debug Disabled : YES
1718 14:57:30.303610 ME: TXT Support : NO
1719 14:57:30.309946 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 14:57:30.316282 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 14:57:30.316763 CBFS @ c08000 size 3f8000
1722 14:57:30.323643 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 14:57:30.326559 CBFS: Locating 'fallback/dsdt.aml'
1724 14:57:30.332955 CBFS: Found @ offset 10bb80 size 3fa5
1725 14:57:30.336783 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 14:57:30.339884 CBFS @ c08000 size 3f8000
1727 14:57:30.346524 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 14:57:30.350067 CBFS: Locating 'fallback/slic'
1729 14:57:30.353194 CBFS: 'fallback/slic' not found.
1730 14:57:30.356054 ACPI: Writing ACPI tables at 99b3e000.
1731 14:57:30.360411 ACPI: * FACS
1732 14:57:30.360986 ACPI: * DSDT
1733 14:57:30.365923 Ramoops buffer: 0x100000@0x99a3d000.
1734 14:57:30.369656 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 14:57:30.372486 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 14:57:30.376125 Google Chrome EC: version:
1737 14:57:30.379395 ro: helios_v2.0.2659-56403530b
1738 14:57:30.383253 rw: helios_v2.0.2849-c41de27e7d
1739 14:57:30.386021 running image: 1
1740 14:57:30.389355 ACPI: * FADT
1741 14:57:30.389967 SCI is IRQ9
1742 14:57:30.393032 ACPI: added table 1/32, length now 40
1743 14:57:30.395727 ACPI: * SSDT
1744 14:57:30.399346 Found 1 CPU(s) with 8 core(s) each.
1745 14:57:30.402561 Error: Could not locate 'wifi_sar' in VPD.
1746 14:57:30.409318 Checking CBFS for default SAR values
1747 14:57:30.412743 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 14:57:30.416576 CBFS @ c08000 size 3f8000
1749 14:57:30.422682 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 14:57:30.426293 CBFS: Locating 'wifi_sar_defaults.hex'
1751 14:57:30.429089 CBFS: Found @ offset 5fac0 size 77
1752 14:57:30.432736 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 14:57:30.435664 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 14:57:30.442368 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 14:57:30.449241 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 14:57:30.452316 failed to find key in VPD: dsm_calib_r0_0
1757 14:57:30.462452 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 14:57:30.465873 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 14:57:30.469045 failed to find key in VPD: dsm_calib_r0_1
1760 14:57:30.478895 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 14:57:30.485432 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 14:57:30.488617 failed to find key in VPD: dsm_calib_r0_2
1763 14:57:30.498863 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 14:57:30.502064 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 14:57:30.508660 failed to find key in VPD: dsm_calib_r0_3
1766 14:57:30.515208 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 14:57:30.522274 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 14:57:30.525041 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 14:57:30.528227 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 14:57:30.532194 EC returned error result code 1
1771 14:57:30.535881 EC returned error result code 1
1772 14:57:30.539891 EC returned error result code 1
1773 14:57:30.546791 PS2K: Bad resp from EC. Vivaldi disabled!
1774 14:57:30.549733 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 14:57:30.557146 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 14:57:30.563255 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 14:57:30.566572 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 14:57:30.573450 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 14:57:30.579816 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 14:57:30.582935 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 14:57:30.589396 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 14:57:30.592975 ACPI: added table 2/32, length now 44
1783 14:57:30.596463 ACPI: * MCFG
1784 14:57:30.599611 ACPI: added table 3/32, length now 48
1785 14:57:30.602579 ACPI: * TPM2
1786 14:57:30.603056 TPM2 log created at 99a2d000
1787 14:57:30.609430 ACPI: added table 4/32, length now 52
1788 14:57:30.609931 ACPI: * MADT
1789 14:57:30.612936 SCI is IRQ9
1790 14:57:30.615817 ACPI: added table 5/32, length now 56
1791 14:57:30.616291 current = 99b43ac0
1792 14:57:30.619094 ACPI: * DMAR
1793 14:57:30.622550 ACPI: added table 6/32, length now 60
1794 14:57:30.625880 ACPI: * IGD OpRegion
1795 14:57:30.626451 GMA: Found VBT in CBFS
1796 14:57:30.629824 GMA: Found valid VBT in CBFS
1797 14:57:30.632827 ACPI: added table 7/32, length now 64
1798 14:57:30.635951 ACPI: * HPET
1799 14:57:30.639445 ACPI: added table 8/32, length now 68
1800 14:57:30.639919 ACPI: done.
1801 14:57:30.642234 ACPI tables: 31744 bytes.
1802 14:57:30.646469 smbios_write_tables: 99a2c000
1803 14:57:30.649762 EC returned error result code 3
1804 14:57:30.652929 Couldn't obtain OEM name from CBI
1805 14:57:30.656199 Create SMBIOS type 17
1806 14:57:30.659840 PCI: 00:00.0 (Intel Cannonlake)
1807 14:57:30.663100 PCI: 00:14.3 (Intel WiFi)
1808 14:57:30.666638 SMBIOS tables: 939 bytes.
1809 14:57:30.669429 Writing table forward entry at 0x00000500
1810 14:57:30.676408 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 14:57:30.679025 Writing coreboot table at 0x99b62000
1812 14:57:30.686061 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 14:57:30.688926 1. 0000000000001000-000000000009ffff: RAM
1814 14:57:30.692827 2. 00000000000a0000-00000000000fffff: RESERVED
1815 14:57:30.698995 3. 0000000000100000-0000000099a2bfff: RAM
1816 14:57:30.702233 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 14:57:30.709121 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 14:57:30.715678 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 14:57:30.718881 7. 000000009a000000-000000009f7fffff: RESERVED
1820 14:57:30.725325 8. 00000000e0000000-00000000efffffff: RESERVED
1821 14:57:30.728853 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 14:57:30.732226 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 14:57:30.738826 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 14:57:30.742308 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 14:57:30.749292 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 14:57:30.752345 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 14:57:30.758749 15. 0000000100000000-000000045e7fffff: RAM
1828 14:57:30.762374 Graphics framebuffer located at 0xc0000000
1829 14:57:30.765136 Passing 5 GPIOs to payload:
1830 14:57:30.768465 NAME | PORT | POLARITY | VALUE
1831 14:57:30.775313 write protect | undefined | high | low
1832 14:57:30.778695 lid | undefined | high | high
1833 14:57:30.784975 power | undefined | high | low
1834 14:57:30.791556 oprom | undefined | high | low
1835 14:57:30.794867 EC in RW | 0x000000cb | high | low
1836 14:57:30.798030 Board ID: 4
1837 14:57:30.801448 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 14:57:30.805065 CBFS @ c08000 size 3f8000
1839 14:57:30.811645 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 14:57:30.818138 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1841 14:57:30.818699 coreboot table: 1492 bytes.
1842 14:57:30.822377 IMD ROOT 0. 99fff000 00001000
1843 14:57:30.824822 IMD SMALL 1. 99ffe000 00001000
1844 14:57:30.828377 FSP MEMORY 2. 99c4e000 003b0000
1845 14:57:30.831338 CONSOLE 3. 99c2e000 00020000
1846 14:57:30.834554 FMAP 4. 99c2d000 0000054e
1847 14:57:30.837960 TIME STAMP 5. 99c2c000 00000910
1848 14:57:30.841360 VBOOT WORK 6. 99c18000 00014000
1849 14:57:30.845077 MRC DATA 7. 99c16000 00001958
1850 14:57:30.848013 ROMSTG STCK 8. 99c15000 00001000
1851 14:57:30.851299 AFTER CAR 9. 99c0b000 0000a000
1852 14:57:30.854764 RAMSTAGE 10. 99baf000 0005c000
1853 14:57:30.858072 REFCODE 11. 99b7a000 00035000
1854 14:57:30.861330 SMM BACKUP 12. 99b6a000 00010000
1855 14:57:30.864492 COREBOOT 13. 99b62000 00008000
1856 14:57:30.867995 ACPI 14. 99b3e000 00024000
1857 14:57:30.872139 ACPI GNVS 15. 99b3d000 00001000
1858 14:57:30.874665 RAMOOPS 16. 99a3d000 00100000
1859 14:57:30.878322 TPM2 TCGLOG17. 99a2d000 00010000
1860 14:57:30.881134 SMBIOS 18. 99a2c000 00000800
1861 14:57:30.884426 IMD small region:
1862 14:57:30.887669 IMD ROOT 0. 99ffec00 00000400
1863 14:57:30.891209 FSP RUNTIME 1. 99ffebe0 00000004
1864 14:57:30.894385 EC HOSTEVENT 2. 99ffebc0 00000008
1865 14:57:30.897890 POWER STATE 3. 99ffeb80 00000040
1866 14:57:30.901406 ROMSTAGE 4. 99ffeb60 00000004
1867 14:57:30.904088 MEM INFO 5. 99ffe9a0 000001b9
1868 14:57:30.911105 VPD 6. 99ffe920 0000006c
1869 14:57:30.911706 MTRR: Physical address space:
1870 14:57:30.917724 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 14:57:30.924329 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 14:57:30.930703 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 14:57:30.937190 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 14:57:30.943809 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 14:57:30.950721 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 14:57:30.957258 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 14:57:30.960493 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 14:57:30.964375 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 14:57:30.966926 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 14:57:30.973792 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 14:57:30.977107 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 14:57:30.980655 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 14:57:30.983838 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 14:57:30.990451 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 14:57:30.994240 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 14:57:30.997384 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 14:57:31.000246 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 14:57:31.003895 call enable_fixed_mtrr()
1889 14:57:31.006688 CPU physical address size: 39 bits
1890 14:57:31.013789 MTRR: default type WB/UC MTRR counts: 6/8.
1891 14:57:31.016708 MTRR: WB selected as default type.
1892 14:57:31.023215 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 14:57:31.026636 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 14:57:31.033361 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 14:57:31.039983 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 14:57:31.046325 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 14:57:31.053450 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 14:57:31.056281 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 14:57:31.063051 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 14:57:31.066364 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 14:57:31.069914 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 14:57:31.073325 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 14:57:31.079927 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 14:57:31.082824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 14:57:31.086152 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 14:57:31.089599 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 14:57:31.096442 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 14:57:31.099895 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 14:57:31.100473
1910 14:57:31.100851 MTRR check
1911 14:57:31.102805 call enable_fixed_mtrr()
1912 14:57:31.106032 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 14:57:31.112769 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 14:57:31.116239 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 14:57:31.119627 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 14:57:31.122679 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 14:57:31.128868 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 14:57:31.132466 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 14:57:31.136088 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 14:57:31.139056 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 14:57:31.142464 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 14:57:31.149081 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 14:57:31.151900 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 14:57:31.155313 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 14:57:31.159007 call enable_fixed_mtrr()
1926 14:57:31.162445 Fixed MTRRs : Enabled
1927 14:57:31.165512 Variable MTRRs: Enabled
1928 14:57:31.165984
1929 14:57:31.168495 CPU physical address size: 39 bits
1930 14:57:31.172165 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1931 14:57:31.178721 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 14:57:31.181887 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 14:57:31.185063 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 14:57:31.188437 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 14:57:31.195227 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 14:57:31.198418 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 14:57:31.201806 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 14:57:31.205316 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 14:57:31.211897 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 14:57:31.215484 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 14:57:31.218911 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 14:57:31.221640 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 14:57:31.228420 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:57:31.229016 call enable_fixed_mtrr()
1945 14:57:31.235085 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:57:31.238333 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:57:31.241282 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:57:31.244944 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:57:31.251447 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:57:31.254575 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:57:31.257687 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:57:31.260983 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:57:31.264694 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:57:31.271353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:57:31.274363 CPU physical address size: 39 bits
1956 14:57:31.278015 call enable_fixed_mtrr()
1957 14:57:31.281186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1958 14:57:31.287743 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 14:57:31.290761 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 14:57:31.294413 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 14:57:31.297789 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 14:57:31.301009 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 14:57:31.307346 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 14:57:31.310965 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 14:57:31.314366 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 14:57:31.317822 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 14:57:31.324677 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 14:57:31.327475 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 14:57:31.330800 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 14:57:31.334230 call enable_fixed_mtrr()
1971 14:57:31.337450 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 14:57:31.340496 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 14:57:31.347141 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 14:57:31.350500 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 14:57:31.353768 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 14:57:31.357069 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 14:57:31.363795 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 14:57:31.366873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 14:57:31.370406 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 14:57:31.373921 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 14:57:31.377242 CPU physical address size: 39 bits
1982 14:57:31.380159 call enable_fixed_mtrr()
1983 14:57:31.383264 CPU physical address size: 39 bits
1984 14:57:31.390397 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 14:57:31.393704 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 14:57:31.396972 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 14:57:31.400281 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 14:57:31.406910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 14:57:31.410455 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 14:57:31.413840 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 14:57:31.417163 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 14:57:31.420112 CPU physical address size: 39 bits
1993 14:57:31.423784 call enable_fixed_mtrr()
1994 14:57:31.426592 CBFS @ c08000 size 3f8000
1995 14:57:31.433424 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1996 14:57:31.436522 CBFS: Locating 'fallback/payload'
1997 14:57:31.440215 CPU physical address size: 39 bits
1998 14:57:31.443023 CBFS: Found @ offset 1c96c0 size 3f798
1999 14:57:31.446867 CPU physical address size: 39 bits
2000 14:57:31.449613 Checking segment from ROM address 0xffdd16f8
2001 14:57:31.456613 Checking segment from ROM address 0xffdd1714
2002 14:57:31.459612 Loading segment from ROM address 0xffdd16f8
2003 14:57:31.462968 code (compression=0)
2004 14:57:31.470007 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 14:57:31.479530 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 14:57:31.482913 it's not compressed!
2007 14:57:31.574055 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 14:57:31.580479 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 14:57:31.583750 Loading segment from ROM address 0xffdd1714
2010 14:57:31.586740 Entry Point 0x30000000
2011 14:57:31.590319 Loaded segments
2012 14:57:31.596263 Finalizing chipset.
2013 14:57:31.599544 Finalizing SMM.
2014 14:57:31.602665 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 14:57:31.606041 mp_park_aps done after 0 msecs.
2016 14:57:31.612517 Jumping to boot code at 30000000(99b62000)
2017 14:57:31.619301 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 14:57:31.619890
2019 14:57:31.620388
2020 14:57:31.620853
2021 14:57:31.622911 Starting depthcharge on Helios...
2022 14:57:31.623499
2023 14:57:31.624776 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 14:57:31.625391 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 14:57:31.625990 Setting prompt string to ['hatch:']
2026 14:57:31.626525 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 14:57:31.632429 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 14:57:31.633027
2029 14:57:31.639026 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 14:57:31.639615
2031 14:57:31.645945 board_setup: Info: eMMC controller not present; skipping
2032 14:57:31.646534
2033 14:57:31.649017 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 14:57:31.649634
2035 14:57:31.655251 board_setup: Info: SDHCI controller not present; skipping
2036 14:57:31.655783
2037 14:57:31.662249 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 14:57:31.662869
2039 14:57:31.663362 Wipe memory regions:
2040 14:57:31.663826
2041 14:57:31.665000 [0x00000000001000, 0x000000000a0000)
2042 14:57:31.665516
2043 14:57:31.668674 [0x00000000100000, 0x00000030000000)
2044 14:57:31.735344
2045 14:57:31.738701 [0x00000030657430, 0x00000099a2c000)
2046 14:57:31.875423
2047 14:57:31.878686 [0x00000100000000, 0x0000045e800000)
2048 14:57:33.261544
2049 14:57:33.262182 R8152: Initializing
2050 14:57:33.262697
2051 14:57:33.265203 Version 9 (ocp_data = 6010)
2052 14:57:33.268638
2053 14:57:33.269240 R8152: Done initializing
2054 14:57:33.269786
2055 14:57:33.271838 Adding net device
2056 14:57:33.882051
2057 14:57:33.882642 R8152: Initializing
2058 14:57:33.883231
2059 14:57:33.884505 Version 6 (ocp_data = 5c30)
2060 14:57:33.885093
2061 14:57:33.887734 R8152: Done initializing
2062 14:57:33.887831
2063 14:57:33.891438 net_add_device: Attemp to include the same device
2064 14:57:33.894797
2065 14:57:33.901932 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 14:57:33.902104
2067 14:57:33.902186
2068 14:57:33.902256
2069 14:57:33.902565 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 14:57:34.003469 hatch: tftpboot 192.168.201.1 10185580/tftp-deploy-gnt83lf7/kernel/bzImage 10185580/tftp-deploy-gnt83lf7/kernel/cmdline 10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
2072 14:57:34.004133 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 14:57:34.004574 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 14:57:34.009398 tftpboot 192.168.201.1 10185580/tftp-deploy-gnt83lf7/kernel/bzIploy-gnt83lf7/kernel/cmdline 10185580/tftp-deploy-gnt83lf7/ramdisk/ramdisk.cpio.gz
2075 14:57:34.010025
2076 14:57:34.010401 Waiting for link
2077 14:57:34.210218
2078 14:57:34.210807 done.
2079 14:57:34.211373
2080 14:57:34.211978 MAC: 00:24:32:50:1a:5f
2081 14:57:34.212448
2082 14:57:34.213754 Sending DHCP discover... done.
2083 14:57:34.214244
2084 14:57:34.216740 Waiting for reply... done.
2085 14:57:34.217458
2086 14:57:34.220138 Sending DHCP request... done.
2087 14:57:34.220619
2088 14:57:34.226788 Waiting for reply... done.
2089 14:57:34.227361
2090 14:57:34.227744 My ip is 192.168.201.21
2091 14:57:34.228100
2092 14:57:34.229778 The DHCP server ip is 192.168.201.1
2093 14:57:34.233124
2094 14:57:34.236551 TFTP server IP predefined by user: 192.168.201.1
2095 14:57:34.237138
2096 14:57:34.243211 Bootfile predefined by user: 10185580/tftp-deploy-gnt83lf7/kernel/bzImage
2097 14:57:34.243791
2098 14:57:34.246144 Sending tftp read request... done.
2099 14:57:34.246624
2100 14:57:34.255137 Waiting for the transfer...
2101 14:57:34.255785
2102 14:57:34.966249 00000000 ################################################################
2103 14:57:34.966857
2104 14:57:35.685420 00080000 ################################################################
2105 14:57:35.686043
2106 14:57:36.406134 00100000 ################################################################
2107 14:57:36.406718
2108 14:57:37.105407 00180000 ################################################################
2109 14:57:37.106023
2110 14:57:37.826264 00200000 ################################################################
2111 14:57:37.826848
2112 14:57:38.543441 00280000 ################################################################
2113 14:57:38.544019
2114 14:57:39.262102 00300000 ################################################################
2115 14:57:39.262680
2116 14:57:39.982427 00380000 ################################################################
2117 14:57:39.983006
2118 14:57:40.707781 00400000 ################################################################
2119 14:57:40.708380
2120 14:57:41.426648 00480000 ################################################################
2121 14:57:41.427297
2122 14:57:42.142416 00500000 ################################################################
2123 14:57:42.143021
2124 14:57:42.866718 00580000 ################################################################
2125 14:57:42.867298
2126 14:57:43.586423 00600000 ################################################################
2127 14:57:43.587021
2128 14:57:44.308310 00680000 ################################################################
2129 14:57:44.308896
2130 14:57:45.037761 00700000 ################################################################
2131 14:57:45.038358
2132 14:57:45.054764 00780000 ## done.
2133 14:57:45.055337
2134 14:57:45.058141 The bootfile was 7876496 bytes long.
2135 14:57:45.058650
2136 14:57:45.061360 Sending tftp read request... done.
2137 14:57:45.061917
2138 14:57:45.064742 Waiting for the transfer...
2139 14:57:45.065221
2140 14:57:45.792321 00000000 ################################################################
2141 14:57:45.792905
2142 14:57:46.515296 00080000 ################################################################
2143 14:57:46.515877
2144 14:57:47.211165 00100000 ################################################################
2145 14:57:47.211757
2146 14:57:47.935197 00180000 ################################################################
2147 14:57:47.935836
2148 14:57:48.655748 00200000 ################################################################
2149 14:57:48.656347
2150 14:57:49.380505 00280000 ################################################################
2151 14:57:49.381090
2152 14:57:50.106942 00300000 ################################################################
2153 14:57:50.107538
2154 14:57:50.833205 00380000 ################################################################
2155 14:57:50.833872
2156 14:57:51.549312 00400000 ################################################################
2157 14:57:51.549962
2158 14:57:52.262524 00480000 ################################################################
2159 14:57:52.263123
2160 14:57:52.961107 00500000 ################################################################ done.
2161 14:57:52.961728
2162 14:57:52.964203 Sending tftp read request... done.
2163 14:57:52.964684
2164 14:57:52.967265 Waiting for the transfer...
2165 14:57:52.967742
2166 14:57:52.971220 00000000 # done.
2167 14:57:52.971823
2168 14:57:52.977462 Command line loaded dynamically from TFTP file: 10185580/tftp-deploy-gnt83lf7/kernel/cmdline
2169 14:57:52.981076
2170 14:57:53.007056 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185580/extract-nfsrootfs-51thsqov,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 14:57:53.007662
2172 14:57:53.010279 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 14:57:53.015592
2174 14:57:53.018858 Shutting down all USB controllers.
2175 14:57:53.019344
2176 14:57:53.019725 Removing current net device
2177 14:57:53.026720
2178 14:57:53.027322 Finalizing coreboot
2179 14:57:53.027715
2180 14:57:53.033297 Exiting depthcharge with code 4 at timestamp: 28760713
2181 14:57:53.033824
2182 14:57:53.034210
2183 14:57:53.034565 Starting kernel ...
2184 14:57:53.034974
2185 14:57:53.036572 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2186 14:57:53.037135 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2187 14:57:53.037666 Setting prompt string to ['Linux version [0-9]']
2188 14:57:53.038091 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 14:57:53.038487 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2190 14:57:53.039382
2192 15:02:14.038320 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2194 15:02:14.039524 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2196 15:02:14.040609 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 15:02:14.042113 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 15:02:14.042900 Cleaning after the job
2202 15:02:14.042991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/ramdisk
2203 15:02:14.043784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/kernel
2204 15:02:14.044704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/nfsrootfs
2205 15:02:14.111794 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185580/tftp-deploy-gnt83lf7/modules
2206 15:02:14.112227 start: 4.1 power-off (timeout 00:00:30) [common]
2207 15:02:14.112400 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2208 15:02:14.188982 >> Command sent successfully.
2209 15:02:14.193264 Returned 0 in 0 seconds
2210 15:02:14.294269 end: 4.1 power-off (duration 00:00:00) [common]
2212 15:02:14.295848 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 15:02:14.297150 Listened to connection for namespace 'common' for up to 1s
2215 15:02:14.298547 Listened to connection for namespace 'common' for up to 1s
2216 15:02:15.297802 Finalising connection for namespace 'common'
2217 15:02:15.298485 Disconnecting from shell: Finalise
2218 15:02:15.298942
2219 15:02:15.400026 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 15:02:15.400637 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185580
2221 15:02:15.844381 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185580
2222 15:02:15.844578 JobError: Your job cannot terminate cleanly.