Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:50:37.960651 lava-dispatcher, installed at version: 2023.03
2 14:50:37.960852 start: 0 validate
3 14:50:37.960979 Start time: 2023-05-03 14:50:37.960972+00:00 (UTC)
4 14:50:37.961097 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:37.961224 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
6 14:50:38.250355 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:38.251190 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:41.763039 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:41.763795 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:50:42.054198 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:50:42.054966 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-372-ga3bc58e64f55%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:50:42.561459 validate duration: 4.60
14 14:50:42.561762 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:50:42.561856 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:50:42.561938 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:50:42.562053 Not decompressing ramdisk as can be used compressed.
18 14:50:42.562136 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230421.0/amd64/initrd.cpio.gz
19 14:50:42.562201 saving as /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/ramdisk/initrd.cpio.gz
20 14:50:42.562258 total size: 5672815 (5MB)
21 14:50:42.563307 progress 0% (0MB)
22 14:50:42.564917 progress 5% (0MB)
23 14:50:42.566470 progress 10% (0MB)
24 14:50:42.567851 progress 15% (0MB)
25 14:50:42.569372 progress 20% (1MB)
26 14:50:42.570952 progress 25% (1MB)
27 14:50:42.572370 progress 30% (1MB)
28 14:50:42.574007 progress 35% (1MB)
29 14:50:42.575594 progress 40% (2MB)
30 14:50:42.577040 progress 45% (2MB)
31 14:50:42.578621 progress 50% (2MB)
32 14:50:42.580103 progress 55% (3MB)
33 14:50:42.581428 progress 60% (3MB)
34 14:50:42.582955 progress 65% (3MB)
35 14:50:42.584438 progress 70% (3MB)
36 14:50:42.585821 progress 75% (4MB)
37 14:50:42.587374 progress 80% (4MB)
38 14:50:42.588948 progress 85% (4MB)
39 14:50:42.590381 progress 90% (4MB)
40 14:50:42.591946 progress 95% (5MB)
41 14:50:42.593444 progress 100% (5MB)
42 14:50:42.593629 5MB downloaded in 0.03s (172.47MB/s)
43 14:50:42.593815 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:50:42.594072 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:50:42.594154 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:50:42.594234 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:50:42.594358 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:50:42.594425 saving as /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/kernel/bzImage
50 14:50:42.594516 total size: 7876496 (7MB)
51 14:50:42.594573 No compression specified
52 14:50:42.595701 progress 0% (0MB)
53 14:50:42.597868 progress 5% (0MB)
54 14:50:42.599852 progress 10% (0MB)
55 14:50:42.601891 progress 15% (1MB)
56 14:50:42.603877 progress 20% (1MB)
57 14:50:42.605941 progress 25% (1MB)
58 14:50:42.607922 progress 30% (2MB)
59 14:50:42.609989 progress 35% (2MB)
60 14:50:42.612002 progress 40% (3MB)
61 14:50:42.614084 progress 45% (3MB)
62 14:50:42.616101 progress 50% (3MB)
63 14:50:42.618270 progress 55% (4MB)
64 14:50:42.620295 progress 60% (4MB)
65 14:50:42.622476 progress 65% (4MB)
66 14:50:42.624523 progress 70% (5MB)
67 14:50:42.626611 progress 75% (5MB)
68 14:50:42.628683 progress 80% (6MB)
69 14:50:42.630809 progress 85% (6MB)
70 14:50:42.632825 progress 90% (6MB)
71 14:50:42.634942 progress 95% (7MB)
72 14:50:42.636991 progress 100% (7MB)
73 14:50:42.637135 7MB downloaded in 0.04s (176.21MB/s)
74 14:50:42.637305 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:50:42.637564 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:50:42.637649 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:50:42.637778 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:50:42.637943 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230421.0/amd64/full.rootfs.tar.xz
80 14:50:42.638025 saving as /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/nfsrootfs/full.rootfs.tar
81 14:50:42.638085 total size: 125572608 (119MB)
82 14:50:42.638144 Using unxz to decompress xz
83 14:50:42.642334 progress 0% (0MB)
84 14:50:43.116099 progress 5% (6MB)
85 14:50:43.596792 progress 10% (12MB)
86 14:50:44.077190 progress 15% (17MB)
87 14:50:44.572746 progress 20% (23MB)
88 14:50:44.907411 progress 25% (29MB)
89 14:50:45.240606 progress 30% (35MB)
90 14:50:45.493307 progress 35% (41MB)
91 14:50:45.695166 progress 40% (47MB)
92 14:50:46.070186 progress 45% (53MB)
93 14:50:46.453338 progress 50% (59MB)
94 14:50:46.808923 progress 55% (65MB)
95 14:50:47.170861 progress 60% (71MB)
96 14:50:47.508396 progress 65% (77MB)
97 14:50:47.911403 progress 70% (83MB)
98 14:50:48.326853 progress 75% (89MB)
99 14:50:48.740878 progress 80% (95MB)
100 14:50:48.846919 progress 85% (101MB)
101 14:50:49.005927 progress 90% (107MB)
102 14:50:49.341509 progress 95% (113MB)
103 14:50:49.718149 progress 100% (119MB)
104 14:50:49.723037 119MB downloaded in 7.08s (16.90MB/s)
105 14:50:49.723375 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:50:49.723635 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:50:49.723755 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:50:49.723843 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:50:49.723994 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-372-ga3bc58e64f55/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:50:49.724065 saving as /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/modules/modules.tar
112 14:50:49.724126 total size: 251268 (0MB)
113 14:50:49.724203 Using unxz to decompress xz
114 14:50:49.727959 progress 13% (0MB)
115 14:50:49.728369 progress 26% (0MB)
116 14:50:49.728598 progress 39% (0MB)
117 14:50:49.729973 progress 52% (0MB)
118 14:50:49.731899 progress 65% (0MB)
119 14:50:49.733816 progress 78% (0MB)
120 14:50:49.735652 progress 91% (0MB)
121 14:50:49.737425 progress 100% (0MB)
122 14:50:49.743129 0MB downloaded in 0.02s (12.62MB/s)
123 14:50:49.743388 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:50:49.743650 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:50:49.743744 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 14:50:49.743843 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 14:50:52.423545 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185545/extract-nfsrootfs-pr8cljxk
129 14:50:52.423768 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 14:50:52.423885 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 14:50:52.424063 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_
132 14:50:52.424205 makedir: /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin
133 14:50:52.424321 makedir: /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/tests
134 14:50:52.424433 makedir: /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/results
135 14:50:52.424549 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-add-keys
136 14:50:52.424738 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-add-sources
137 14:50:52.424907 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-background-process-start
138 14:50:52.425076 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-background-process-stop
139 14:50:52.425246 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-common-functions
140 14:50:52.425413 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-echo-ipv4
141 14:50:52.425754 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-install-packages
142 14:50:52.425894 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-installed-packages
143 14:50:52.426034 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-os-build
144 14:50:52.426177 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-probe-channel
145 14:50:52.426363 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-probe-ip
146 14:50:52.426522 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-target-ip
147 14:50:52.426677 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-target-mac
148 14:50:52.426831 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-target-storage
149 14:50:52.426988 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-case
150 14:50:52.427142 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-event
151 14:50:52.427294 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-feedback
152 14:50:52.427447 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-raise
153 14:50:52.427600 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-reference
154 14:50:52.427756 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-runner
155 14:50:52.427910 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-set
156 14:50:52.428062 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-test-shell
157 14:50:52.428231 Updating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-install-packages (oe)
158 14:50:52.428425 Updating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/bin/lava-installed-packages (oe)
159 14:50:52.428571 Creating /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/environment
160 14:50:52.428701 LAVA metadata
161 14:50:52.428798 - LAVA_JOB_ID=10185545
162 14:50:52.428891 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:50:52.429022 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 14:50:52.429116 skipped lava-vland-overlay
165 14:50:52.429221 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:50:52.429331 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 14:50:52.429421 skipped lava-multinode-overlay
168 14:50:52.429568 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:50:52.429679 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 14:50:52.429780 Loading test definitions
171 14:50:52.429902 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 14:50:52.430002 Using /lava-10185545 at stage 0
173 14:50:52.430136 Fetching tests from https://github.com/kernelci/test-definitions
174 14:50:52.430241 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/0/tests/0_ltp-ipc'
175 14:50:59.182712 Running '/usr/bin/git checkout kernelci.org
176 14:50:59.303496 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 14:50:59.304257 uuid=10185545_1.5.2.3.1 testdef=None
178 14:50:59.304416 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
180 14:50:59.304672 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
181 14:50:59.305451 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 14:50:59.305729 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
184 14:50:59.306763 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 14:50:59.307008 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
187 14:50:59.308007 runner path: /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/0/tests/0_ltp-ipc test_uuid 10185545_1.5.2.3.1
188 14:50:59.308096 SKIPFILE='skipfile-lkft.yaml'
189 14:50:59.308162 SKIP_INSTALL='true'
190 14:50:59.308222 TST_CMDFILES='ipc'
191 14:50:59.308360 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 14:50:59.308569 Creating lava-test-runner.conf files
194 14:50:59.308634 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185545/lava-overlay-qjlgcgn_/lava-10185545/0 for stage 0
195 14:50:59.308727 - 0_ltp-ipc
196 14:50:59.308829 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
197 14:50:59.308919 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
198 14:51:06.743418 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
199 14:51:06.743564 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
200 14:51:06.743659 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 14:51:06.743760 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
202 14:51:06.743853 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
203 14:51:06.881451 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 14:51:06.881879 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
205 14:51:06.882035 extracting modules file /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185545/extract-nfsrootfs-pr8cljxk
206 14:51:06.895123 extracting modules file /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185545/extract-overlay-ramdisk-fdm2qvmi/ramdisk
207 14:51:06.907741 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 14:51:06.907874 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
209 14:51:06.907963 [common] Applying overlay to NFS
210 14:51:06.908035 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185545/compress-overlay-b2nh_atn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185545/extract-nfsrootfs-pr8cljxk
211 14:51:07.831136 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 14:51:07.831334 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
213 14:51:07.831461 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 14:51:07.831580 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
215 14:51:07.831692 Building ramdisk /var/lib/lava/dispatcher/tmp/10185545/extract-overlay-ramdisk-fdm2qvmi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185545/extract-overlay-ramdisk-fdm2qvmi/ramdisk
216 14:51:07.910428 >> 27180 blocks
217 14:51:08.470784 rename /var/lib/lava/dispatcher/tmp/10185545/extract-overlay-ramdisk-fdm2qvmi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
218 14:51:08.471196 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 14:51:08.471319 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
220 14:51:08.471421 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
221 14:51:08.471521 No mkimage arch provided, not using FIT.
222 14:51:08.471628 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 14:51:08.471714 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 14:51:08.471819 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
225 14:51:08.471910 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
226 14:51:08.471987 No LXC device requested
227 14:51:08.472064 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 14:51:08.472170 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
229 14:51:08.472279 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 14:51:08.472376 Checking files for TFTP limit of 4294967296 bytes.
231 14:51:08.472830 end: 1 tftp-deploy (duration 00:00:26) [common]
232 14:51:08.472935 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 14:51:08.473024 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 14:51:08.473151 substitutions:
235 14:51:08.473226 - {DTB}: None
236 14:51:08.473317 - {INITRD}: 10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
237 14:51:08.473406 - {KERNEL}: 10185545/tftp-deploy-owh2guv5/kernel/bzImage
238 14:51:08.473520 - {LAVA_MAC}: None
239 14:51:08.473597 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185545/extract-nfsrootfs-pr8cljxk
240 14:51:08.473670 - {NFS_SERVER_IP}: 192.168.201.1
241 14:51:08.473752 - {PRESEED_CONFIG}: None
242 14:51:08.473826 - {PRESEED_LOCAL}: None
243 14:51:08.473884 - {RAMDISK}: 10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
244 14:51:08.473941 - {ROOT_PART}: None
245 14:51:08.473995 - {ROOT}: None
246 14:51:08.474050 - {SERVER_IP}: 192.168.201.1
247 14:51:08.474103 - {TEE}: None
248 14:51:08.474157 Parsed boot commands:
249 14:51:08.474210 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 14:51:08.474382 Parsed boot commands: tftpboot 192.168.201.1 10185545/tftp-deploy-owh2guv5/kernel/bzImage 10185545/tftp-deploy-owh2guv5/kernel/cmdline 10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
251 14:51:08.474472 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 14:51:08.474555 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 14:51:08.474648 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 14:51:08.474732 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 14:51:08.474800 Not connected, no need to disconnect.
256 14:51:08.474872 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 14:51:08.474952 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 14:51:08.475021 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
259 14:51:08.478690 Setting prompt string to ['lava-test: # ']
260 14:51:08.479055 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 14:51:08.479195 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 14:51:08.479334 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 14:51:08.479460 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 14:51:08.479649 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
265 14:51:13.624900 >> Command sent successfully.
266 14:51:13.634954 Returned 0 in 5 seconds
267 14:51:13.736282 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 14:51:13.737861 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 14:51:13.738388 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 14:51:13.738858 Setting prompt string to 'Starting depthcharge on Voema...'
272 14:51:13.739216 Changing prompt to 'Starting depthcharge on Voema...'
273 14:51:13.739658 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 14:51:13.741528 [Enter `^Ec?' for help]
275 14:51:15.391362
276 14:51:15.391517
277 14:51:15.401104 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 14:51:15.407479 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
279 14:51:15.410911 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 14:51:15.414531 CPU: AES supported, TXT NOT supported, VT supported
281 14:51:15.420570 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 14:51:15.427306 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 14:51:15.430788 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 14:51:15.434166 VBOOT: Loading verstage.
285 14:51:15.441012 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 14:51:15.444269 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 14:51:15.447748 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 14:51:15.458580 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 14:51:15.465288 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 14:51:15.465373
291 14:51:15.465439
292 14:51:15.474810 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 14:51:15.491862 Probing TPM: . done!
294 14:51:15.495146 TPM ready after 0 ms
295 14:51:15.498448 Connected to device vid:did:rid of 1ae0:0028:00
296 14:51:15.509281 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
297 14:51:15.515790 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 14:51:15.518976 Initialized TPM device CR50 revision 0
299 14:51:15.569765 tlcl_send_startup: Startup return code is 0
300 14:51:15.569857 TPM: setup succeeded
301 14:51:15.585530 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 14:51:15.599562 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 14:51:15.612857 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 14:51:15.622326 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 14:51:15.625564 Chrome EC: UHEPI supported
306 14:51:15.629555 Phase 1
307 14:51:15.632776 FMAP: area GBB found @ 1805000 (458752 bytes)
308 14:51:15.642426 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 14:51:15.649266 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 14:51:15.655972 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 14:51:15.662343 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 14:51:15.665904 Recovery requested (1009000e)
313 14:51:15.674498 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 14:51:15.680656 tlcl_extend: response is 0
315 14:51:15.687271 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 14:51:15.697608 tlcl_extend: response is 0
317 14:51:15.703939 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 14:51:15.710870 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 14:51:15.717205 BS: verstage times (exec / console): total (unknown) / 142 ms
320 14:51:15.717282
321 14:51:15.717352
322 14:51:15.730283 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 14:51:15.737126 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 14:51:15.740556 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 14:51:15.743533 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 14:51:15.750550 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 14:51:15.753912 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 14:51:15.756959 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
329 14:51:15.760272 TCO_STS: 0000 0000
330 14:51:15.763730 GEN_PMCON: d0015038 00002200
331 14:51:15.767061 GBLRST_CAUSE: 00000000 00000000
332 14:51:15.770558 HPR_CAUSE0: 00000000
333 14:51:15.770641 prev_sleep_state 5
334 14:51:15.773404 Boot Count incremented to 16891
335 14:51:15.780017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 14:51:15.786554 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 14:51:15.796717 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 14:51:15.802896 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 14:51:15.806817 Chrome EC: UHEPI supported
340 14:51:15.812716 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 14:51:15.824747 Probing TPM: done!
342 14:51:15.831098 Connected to device vid:did:rid of 1ae0:0028:00
343 14:51:15.841099 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
344 14:51:15.844199 Initialized TPM device CR50 revision 0
345 14:51:15.859208 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 14:51:15.865741 MRC: Hash idx 0x100b comparison successful.
347 14:51:15.869241 MRC cache found, size faa8
348 14:51:15.869315 bootmode is set to: 2
349 14:51:15.872784 SPD index = 2
350 14:51:15.879141 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 14:51:15.882620 SPD: module type is LPDDR4X
352 14:51:15.885866 SPD: module part number is MT53D1G64D4NW-046
353 14:51:15.892456 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
354 14:51:15.895574 SPD: device width 16 bits, bus width 16 bits
355 14:51:15.902098 SPD: module size is 2048 MB (per channel)
356 14:51:16.332849 CBMEM:
357 14:51:16.335779 IMD: root @ 0x76fff000 254 entries.
358 14:51:16.339229 IMD: root @ 0x76ffec00 62 entries.
359 14:51:16.342300 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 14:51:16.348528 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 14:51:16.352083 External stage cache:
362 14:51:16.355378 IMD: root @ 0x7b3ff000 254 entries.
363 14:51:16.358911 IMD: root @ 0x7b3fec00 62 entries.
364 14:51:16.373685 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 14:51:16.380311 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 14:51:16.386854 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 14:51:16.401680 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 14:51:16.404615 cse_lite: Skip switching to RW in the recovery path
369 14:51:16.408154 8 DIMMs found
370 14:51:16.408233 SMM Memory Map
371 14:51:16.411500 SMRAM : 0x7b000000 0x800000
372 14:51:16.414569 Subregion 0: 0x7b000000 0x200000
373 14:51:16.418098 Subregion 1: 0x7b200000 0x200000
374 14:51:16.421497 Subregion 2: 0x7b400000 0x400000
375 14:51:16.424766 top_of_ram = 0x77000000
376 14:51:16.431247 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 14:51:16.434673 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 14:51:16.441102 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 14:51:16.444553 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 14:51:16.454116 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 14:51:16.460628 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 14:51:16.470948 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 14:51:16.474332 Processing 211 relocs. Offset value of 0x74c0b000
384 14:51:16.483596 BS: romstage times (exec / console): total (unknown) / 277 ms
385 14:51:16.489057
386 14:51:16.489161
387 14:51:16.498967 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 14:51:16.502456 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 14:51:16.512173 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 14:51:16.518582 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 14:51:16.525621 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 14:51:16.531862 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 14:51:16.576267 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 14:51:16.582495 Processing 5008 relocs. Offset value of 0x75d98000
395 14:51:16.585705 BS: postcar times (exec / console): total (unknown) / 59 ms
396 14:51:16.588904
397 14:51:16.589007
398 14:51:16.598990 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 14:51:16.599072 Normal boot
400 14:51:16.602453 FW_CONFIG value is 0x804c02
401 14:51:16.605935 PCI: 00:07.0 disabled by fw_config
402 14:51:16.608741 PCI: 00:07.1 disabled by fw_config
403 14:51:16.612264 PCI: 00:0d.2 disabled by fw_config
404 14:51:16.616101 PCI: 00:1c.7 disabled by fw_config
405 14:51:16.622592 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 14:51:16.629353 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 14:51:16.632712 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 14:51:16.635988 GENERIC: 0.0 disabled by fw_config
409 14:51:16.639463 GENERIC: 1.0 disabled by fw_config
410 14:51:16.646255 fw_config match found: DB_USB=USB3_ACTIVE
411 14:51:16.649023 fw_config match found: DB_USB=USB3_ACTIVE
412 14:51:16.652264 fw_config match found: DB_USB=USB3_ACTIVE
413 14:51:16.659402 fw_config match found: DB_USB=USB3_ACTIVE
414 14:51:16.662303 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 14:51:16.669099 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 14:51:16.678920 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 14:51:16.685724 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 14:51:16.688761 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 14:51:16.695657 microcode: Update skipped, already up-to-date
420 14:51:16.702130 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 14:51:16.729315 Detected 4 core, 8 thread CPU.
422 14:51:16.733002 Setting up SMI for CPU
423 14:51:16.736174 IED base = 0x7b400000
424 14:51:16.739285 IED size = 0x00400000
425 14:51:16.739367 Will perform SMM setup.
426 14:51:16.746105 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
427 14:51:16.752416 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 14:51:16.759342 Processing 16 relocs. Offset value of 0x00030000
429 14:51:16.762214 Attempting to start 7 APs
430 14:51:16.765838 Waiting for 10ms after sending INIT.
431 14:51:16.781355 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
432 14:51:16.784639 AP: slot 4 apic_id 4.
433 14:51:16.788152 AP: slot 7 apic_id 5.
434 14:51:16.788234 AP: slot 3 apic_id 3.
435 14:51:16.791727 AP: slot 6 apic_id 2.
436 14:51:16.791809 done.
437 14:51:16.795229 AP: slot 5 apic_id 6.
438 14:51:16.798256 Waiting for 2nd SIPI to complete...done.
439 14:51:16.801306 AP: slot 2 apic_id 7.
440 14:51:16.808212 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 14:51:16.814346 Processing 13 relocs. Offset value of 0x00038000
442 14:51:16.817965 Unable to locate Global NVS
443 14:51:16.824323 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 14:51:16.827420 Installing permanent SMM handler to 0x7b000000
445 14:51:16.837774 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 14:51:16.840940 Processing 794 relocs. Offset value of 0x7b010000
447 14:51:16.850816 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 14:51:16.853999 Processing 13 relocs. Offset value of 0x7b008000
449 14:51:16.861072 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 14:51:16.867454 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 14:51:16.873958 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 14:51:16.877515 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 14:51:16.883616 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 14:51:16.890692 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 14:51:16.897711 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 14:51:16.900243 Unable to locate Global NVS
457 14:51:16.906935 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 14:51:16.909885 Clearing SMI status registers
459 14:51:16.913410 SMI_STS: PM1
460 14:51:16.913529 PM1_STS: PWRBTN
461 14:51:16.920117 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 14:51:16.923154 In relocation handler: CPU 0
463 14:51:16.930063 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 14:51:16.933262 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 14:51:16.936505 Relocation complete.
466 14:51:16.943264 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 14:51:16.946145 In relocation handler: CPU 1
468 14:51:16.949574 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 14:51:16.953133 Relocation complete.
470 14:51:16.959434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
471 14:51:16.963145 In relocation handler: CPU 6
472 14:51:16.966093 New SMBASE=0x7affe800 IEDBASE=0x7b400000
473 14:51:16.969356 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 14:51:16.972721 Relocation complete.
475 14:51:16.979117 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
476 14:51:16.982611 In relocation handler: CPU 3
477 14:51:16.985812 New SMBASE=0x7afff400 IEDBASE=0x7b400000
478 14:51:16.988933 Relocation complete.
479 14:51:16.995601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
480 14:51:16.998751 In relocation handler: CPU 4
481 14:51:17.002241 New SMBASE=0x7afff000 IEDBASE=0x7b400000
482 14:51:17.008867 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 14:51:17.012159 Relocation complete.
484 14:51:17.018503 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
485 14:51:17.021981 In relocation handler: CPU 7
486 14:51:17.025184 New SMBASE=0x7affe400 IEDBASE=0x7b400000
487 14:51:17.028580 Relocation complete.
488 14:51:17.035131 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
489 14:51:17.038380 In relocation handler: CPU 2
490 14:51:17.041916 New SMBASE=0x7afff800 IEDBASE=0x7b400000
491 14:51:17.044897 Relocation complete.
492 14:51:17.051920 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
493 14:51:17.054773 In relocation handler: CPU 5
494 14:51:17.058327 New SMBASE=0x7affec00 IEDBASE=0x7b400000
495 14:51:17.061359 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 14:51:17.064835 Relocation complete.
497 14:51:17.068305 Initializing CPU #0
498 14:51:17.071452 CPU: vendor Intel device 806c1
499 14:51:17.075208 CPU: family 06, model 8c, stepping 01
500 14:51:17.078765 Clearing out pending MCEs
501 14:51:17.078849 Setting up local APIC...
502 14:51:17.082008 apic_id: 0x00 done.
503 14:51:17.085433 Turbo is available but hidden
504 14:51:17.088793 Turbo is available and visible
505 14:51:17.091868 microcode: Update skipped, already up-to-date
506 14:51:17.095521 CPU #0 initialized
507 14:51:17.098470 Initializing CPU #3
508 14:51:17.098554 Initializing CPU #6
509 14:51:17.101828 CPU: vendor Intel device 806c1
510 14:51:17.105289 CPU: family 06, model 8c, stepping 01
511 14:51:17.108612 CPU: vendor Intel device 806c1
512 14:51:17.111709 CPU: family 06, model 8c, stepping 01
513 14:51:17.114892 Clearing out pending MCEs
514 14:51:17.118256 Clearing out pending MCEs
515 14:51:17.121429 Setting up local APIC...
516 14:51:17.121551 Initializing CPU #7
517 14:51:17.124828 Initializing CPU #4
518 14:51:17.128179 Initializing CPU #1
519 14:51:17.128266 Setting up local APIC...
520 14:51:17.131477 CPU: vendor Intel device 806c1
521 14:51:17.134764 CPU: family 06, model 8c, stepping 01
522 14:51:17.137764 CPU: vendor Intel device 806c1
523 14:51:17.144945 CPU: family 06, model 8c, stepping 01
524 14:51:17.145029 Clearing out pending MCEs
525 14:51:17.147899 apic_id: 0x02 done.
526 14:51:17.151062 apic_id: 0x03 done.
527 14:51:17.154717 microcode: Update skipped, already up-to-date
528 14:51:17.157811 Initializing CPU #5
529 14:51:17.161355 microcode: Update skipped, already up-to-date
530 14:51:17.164407 CPU #6 initialized
531 14:51:17.164514 CPU #3 initialized
532 14:51:17.167600 Clearing out pending MCEs
533 14:51:17.171407 Setting up local APIC...
534 14:51:17.174289 CPU: vendor Intel device 806c1
535 14:51:17.177457 CPU: family 06, model 8c, stepping 01
536 14:51:17.180869 CPU: vendor Intel device 806c1
537 14:51:17.184135 CPU: family 06, model 8c, stepping 01
538 14:51:17.188046 Initializing CPU #2
539 14:51:17.188129 Clearing out pending MCEs
540 14:51:17.190893 CPU: vendor Intel device 806c1
541 14:51:17.197449 CPU: family 06, model 8c, stepping 01
542 14:51:17.197557 Setting up local APIC...
543 14:51:17.200818 apic_id: 0x04 done.
544 14:51:17.203908 Setting up local APIC...
545 14:51:17.203992 apic_id: 0x06 done.
546 14:51:17.207887 Clearing out pending MCEs
547 14:51:17.214323 microcode: Update skipped, already up-to-date
548 14:51:17.214407 Setting up local APIC...
549 14:51:17.220445 microcode: Update skipped, already up-to-date
550 14:51:17.220529 apic_id: 0x05 done.
551 14:51:17.223759 CPU #4 initialized
552 14:51:17.227268 microcode: Update skipped, already up-to-date
553 14:51:17.230640 apic_id: 0x07 done.
554 14:51:17.233955 CPU #5 initialized
555 14:51:17.237102 microcode: Update skipped, already up-to-date
556 14:51:17.240735 CPU #7 initialized
557 14:51:17.240833 Clearing out pending MCEs
558 14:51:17.244051 CPU #2 initialized
559 14:51:17.246922 Setting up local APIC...
560 14:51:17.247006 apic_id: 0x01 done.
561 14:51:17.253425 microcode: Update skipped, already up-to-date
562 14:51:17.256692 CPU #1 initialized
563 14:51:17.260148 bsp_do_flight_plan done after 457 msecs.
564 14:51:17.263087 CPU: frequency set to 4400 MHz
565 14:51:17.263161 Enabling SMIs.
566 14:51:17.269865 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 14:51:17.286245 SATAXPCIE1 indicates PCIe NVMe is present
568 14:51:17.289675 Probing TPM: done!
569 14:51:17.292963 Connected to device vid:did:rid of 1ae0:0028:00
570 14:51:17.303480 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
571 14:51:17.307014 Initialized TPM device CR50 revision 0
572 14:51:17.310298 Enabling S0i3.4
573 14:51:17.316990 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 14:51:17.319989 Found a VBT of 8704 bytes after decompression
575 14:51:17.327233 cse_lite: CSE RO boot. HybridStorageMode disabled
576 14:51:17.333120 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 14:51:17.408678 FSPS returned 0
578 14:51:17.411958 Executing Phase 1 of FspMultiPhaseSiInit
579 14:51:17.421900 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 14:51:17.425116 port C0 DISC req: usage 1 usb3 1 usb2 5
581 14:51:17.428332 Raw Buffer output 0 00000511
582 14:51:17.431508 Raw Buffer output 1 00000000
583 14:51:17.435387 pmc_send_ipc_cmd succeeded
584 14:51:17.442367 port C1 DISC req: usage 1 usb3 2 usb2 3
585 14:51:17.442450 Raw Buffer output 0 00000321
586 14:51:17.445370 Raw Buffer output 1 00000000
587 14:51:17.449478 pmc_send_ipc_cmd succeeded
588 14:51:17.455047 Detected 4 core, 8 thread CPU.
589 14:51:17.458236 Detected 4 core, 8 thread CPU.
590 14:51:17.657986 Display FSP Version Info HOB
591 14:51:17.661069 Reference Code - CPU = a.0.4c.31
592 14:51:17.664522 uCode Version = 0.0.0.86
593 14:51:17.667570 TXT ACM version = ff.ff.ff.ffff
594 14:51:17.671272 Reference Code - ME = a.0.4c.31
595 14:51:17.674173 MEBx version = 0.0.0.0
596 14:51:17.677635 ME Firmware Version = Consumer SKU
597 14:51:17.681111 Reference Code - PCH = a.0.4c.31
598 14:51:17.684074 PCH-CRID Status = Disabled
599 14:51:17.687592 PCH-CRID Original Value = ff.ff.ff.ffff
600 14:51:17.690688 PCH-CRID New Value = ff.ff.ff.ffff
601 14:51:17.694141 OPROM - RST - RAID = ff.ff.ff.ffff
602 14:51:17.697147 PCH Hsio Version = 4.0.0.0
603 14:51:17.700591 Reference Code - SA - System Agent = a.0.4c.31
604 14:51:17.704098 Reference Code - MRC = 2.0.0.1
605 14:51:17.707159 SA - PCIe Version = a.0.4c.31
606 14:51:17.710778 SA-CRID Status = Disabled
607 14:51:17.713935 SA-CRID Original Value = 0.0.0.1
608 14:51:17.717056 SA-CRID New Value = 0.0.0.1
609 14:51:17.720274 OPROM - VBIOS = ff.ff.ff.ffff
610 14:51:17.724167 IO Manageability Engine FW Version = 11.1.4.0
611 14:51:17.727000 PHY Build Version = 0.0.0.e0
612 14:51:17.730193 Thunderbolt(TM) FW Version = 0.0.0.0
613 14:51:17.736957 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 14:51:17.740075 ITSS IRQ Polarities Before:
615 14:51:17.740149 IPC0: 0xffffffff
616 14:51:17.743701 IPC1: 0xffffffff
617 14:51:17.746769 IPC2: 0xffffffff
618 14:51:17.746843 IPC3: 0xffffffff
619 14:51:17.750303 ITSS IRQ Polarities After:
620 14:51:17.750375 IPC0: 0xffffffff
621 14:51:17.753674 IPC1: 0xffffffff
622 14:51:17.753748 IPC2: 0xffffffff
623 14:51:17.756802 IPC3: 0xffffffff
624 14:51:17.759998 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 14:51:17.773118 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 14:51:17.786897 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 14:51:17.796379 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 14:51:17.803462 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
629 14:51:17.806090 Enumerating buses...
630 14:51:17.809359 Show all devs... Before device enumeration.
631 14:51:17.813126 Root Device: enabled 1
632 14:51:17.816092 DOMAIN: 0000: enabled 1
633 14:51:17.816167 CPU_CLUSTER: 0: enabled 1
634 14:51:17.819639 PCI: 00:00.0: enabled 1
635 14:51:17.822621 PCI: 00:02.0: enabled 1
636 14:51:17.826192 PCI: 00:04.0: enabled 1
637 14:51:17.826260 PCI: 00:05.0: enabled 1
638 14:51:17.829258 PCI: 00:06.0: enabled 0
639 14:51:17.832410 PCI: 00:07.0: enabled 0
640 14:51:17.836004 PCI: 00:07.1: enabled 0
641 14:51:17.836073 PCI: 00:07.2: enabled 0
642 14:51:17.838881 PCI: 00:07.3: enabled 0
643 14:51:17.842321 PCI: 00:08.0: enabled 1
644 14:51:17.845789 PCI: 00:09.0: enabled 0
645 14:51:17.845864 PCI: 00:0a.0: enabled 0
646 14:51:17.849107 PCI: 00:0d.0: enabled 1
647 14:51:17.852091 PCI: 00:0d.1: enabled 0
648 14:51:17.855563 PCI: 00:0d.2: enabled 0
649 14:51:17.855639 PCI: 00:0d.3: enabled 0
650 14:51:17.859189 PCI: 00:0e.0: enabled 0
651 14:51:17.862100 PCI: 00:10.2: enabled 1
652 14:51:17.862168 PCI: 00:10.6: enabled 0
653 14:51:17.865610 PCI: 00:10.7: enabled 0
654 14:51:17.868942 PCI: 00:12.0: enabled 0
655 14:51:17.872112 PCI: 00:12.6: enabled 0
656 14:51:17.872182 PCI: 00:13.0: enabled 0
657 14:51:17.875564 PCI: 00:14.0: enabled 1
658 14:51:17.879030 PCI: 00:14.1: enabled 0
659 14:51:17.882336 PCI: 00:14.2: enabled 1
660 14:51:17.882402 PCI: 00:14.3: enabled 1
661 14:51:17.885323 PCI: 00:15.0: enabled 1
662 14:51:17.888678 PCI: 00:15.1: enabled 1
663 14:51:17.892141 PCI: 00:15.2: enabled 1
664 14:51:17.892227 PCI: 00:15.3: enabled 1
665 14:51:17.895529 PCI: 00:16.0: enabled 1
666 14:51:17.898836 PCI: 00:16.1: enabled 0
667 14:51:17.898919 PCI: 00:16.2: enabled 0
668 14:51:17.901961 PCI: 00:16.3: enabled 0
669 14:51:17.905401 PCI: 00:16.4: enabled 0
670 14:51:17.908595 PCI: 00:16.5: enabled 0
671 14:51:17.908679 PCI: 00:17.0: enabled 1
672 14:51:17.911866 PCI: 00:19.0: enabled 0
673 14:51:17.916027 PCI: 00:19.1: enabled 1
674 14:51:17.918898 PCI: 00:19.2: enabled 0
675 14:51:17.918983 PCI: 00:1c.0: enabled 1
676 14:51:17.921914 PCI: 00:1c.1: enabled 0
677 14:51:17.925274 PCI: 00:1c.2: enabled 0
678 14:51:17.928580 PCI: 00:1c.3: enabled 0
679 14:51:17.928664 PCI: 00:1c.4: enabled 0
680 14:51:17.932174 PCI: 00:1c.5: enabled 0
681 14:51:17.935344 PCI: 00:1c.6: enabled 1
682 14:51:17.938469 PCI: 00:1c.7: enabled 0
683 14:51:17.938553 PCI: 00:1d.0: enabled 1
684 14:51:17.942097 PCI: 00:1d.1: enabled 0
685 14:51:17.945432 PCI: 00:1d.2: enabled 1
686 14:51:17.945544 PCI: 00:1d.3: enabled 0
687 14:51:17.948537 PCI: 00:1e.0: enabled 1
688 14:51:17.951630 PCI: 00:1e.1: enabled 0
689 14:51:17.954991 PCI: 00:1e.2: enabled 1
690 14:51:17.955074 PCI: 00:1e.3: enabled 1
691 14:51:17.958180 PCI: 00:1f.0: enabled 1
692 14:51:17.961813 PCI: 00:1f.1: enabled 0
693 14:51:17.965233 PCI: 00:1f.2: enabled 1
694 14:51:17.965316 PCI: 00:1f.3: enabled 1
695 14:51:17.968144 PCI: 00:1f.4: enabled 0
696 14:51:17.971408 PCI: 00:1f.5: enabled 1
697 14:51:17.974984 PCI: 00:1f.6: enabled 0
698 14:51:17.975068 PCI: 00:1f.7: enabled 0
699 14:51:17.978372 APIC: 00: enabled 1
700 14:51:17.981524 GENERIC: 0.0: enabled 1
701 14:51:17.981608 GENERIC: 0.0: enabled 1
702 14:51:17.984833 GENERIC: 1.0: enabled 1
703 14:51:17.988559 GENERIC: 0.0: enabled 1
704 14:51:17.991677 GENERIC: 1.0: enabled 1
705 14:51:17.991760 USB0 port 0: enabled 1
706 14:51:17.995085 GENERIC: 0.0: enabled 1
707 14:51:17.998107 USB0 port 0: enabled 1
708 14:51:18.001355 GENERIC: 0.0: enabled 1
709 14:51:18.001462 I2C: 00:1a: enabled 1
710 14:51:18.004612 I2C: 00:31: enabled 1
711 14:51:18.007729 I2C: 00:32: enabled 1
712 14:51:18.007802 I2C: 00:10: enabled 1
713 14:51:18.011221 I2C: 00:15: enabled 1
714 14:51:18.014580 GENERIC: 0.0: enabled 0
715 14:51:18.014657 GENERIC: 1.0: enabled 0
716 14:51:18.018336 GENERIC: 0.0: enabled 1
717 14:51:18.021377 SPI: 00: enabled 1
718 14:51:18.021497 SPI: 00: enabled 1
719 14:51:18.024238 PNP: 0c09.0: enabled 1
720 14:51:18.027844 GENERIC: 0.0: enabled 1
721 14:51:18.030868 USB3 port 0: enabled 1
722 14:51:18.030944 USB3 port 1: enabled 1
723 14:51:18.034129 USB3 port 2: enabled 0
724 14:51:18.037538 USB3 port 3: enabled 0
725 14:51:18.037609 USB2 port 0: enabled 0
726 14:51:18.041005 USB2 port 1: enabled 1
727 14:51:18.044066 USB2 port 2: enabled 1
728 14:51:18.047595 USB2 port 3: enabled 0
729 14:51:18.047668 USB2 port 4: enabled 1
730 14:51:18.051396 USB2 port 5: enabled 0
731 14:51:18.054403 USB2 port 6: enabled 0
732 14:51:18.054474 USB2 port 7: enabled 0
733 14:51:18.057385 USB2 port 8: enabled 0
734 14:51:18.060903 USB2 port 9: enabled 0
735 14:51:18.060977 USB3 port 0: enabled 0
736 14:51:18.064439 USB3 port 1: enabled 1
737 14:51:18.067547 USB3 port 2: enabled 0
738 14:51:18.070705 USB3 port 3: enabled 0
739 14:51:18.070786 GENERIC: 0.0: enabled 1
740 14:51:18.073909 GENERIC: 1.0: enabled 1
741 14:51:18.077574 APIC: 01: enabled 1
742 14:51:18.077648 APIC: 07: enabled 1
743 14:51:18.081004 APIC: 03: enabled 1
744 14:51:18.084014 APIC: 04: enabled 1
745 14:51:18.084113 APIC: 06: enabled 1
746 14:51:18.086989 APIC: 02: enabled 1
747 14:51:18.087065 APIC: 05: enabled 1
748 14:51:18.090858 Compare with tree...
749 14:51:18.093925 Root Device: enabled 1
750 14:51:18.097082 DOMAIN: 0000: enabled 1
751 14:51:18.097166 PCI: 00:00.0: enabled 1
752 14:51:18.100538 PCI: 00:02.0: enabled 1
753 14:51:18.103863 PCI: 00:04.0: enabled 1
754 14:51:18.106817 GENERIC: 0.0: enabled 1
755 14:51:18.110094 PCI: 00:05.0: enabled 1
756 14:51:18.110180 PCI: 00:06.0: enabled 0
757 14:51:18.113396 PCI: 00:07.0: enabled 0
758 14:51:18.116871 GENERIC: 0.0: enabled 1
759 14:51:18.120149 PCI: 00:07.1: enabled 0
760 14:51:18.123688 GENERIC: 1.0: enabled 1
761 14:51:18.123774 PCI: 00:07.2: enabled 0
762 14:51:18.126905 GENERIC: 0.0: enabled 1
763 14:51:18.129980 PCI: 00:07.3: enabled 0
764 14:51:18.133502 GENERIC: 1.0: enabled 1
765 14:51:18.136815 PCI: 00:08.0: enabled 1
766 14:51:18.136901 PCI: 00:09.0: enabled 0
767 14:51:18.140019 PCI: 00:0a.0: enabled 0
768 14:51:18.143671 PCI: 00:0d.0: enabled 1
769 14:51:18.146826 USB0 port 0: enabled 1
770 14:51:18.150232 USB3 port 0: enabled 1
771 14:51:18.153619 USB3 port 1: enabled 1
772 14:51:18.153705 USB3 port 2: enabled 0
773 14:51:18.156913 USB3 port 3: enabled 0
774 14:51:18.160287 PCI: 00:0d.1: enabled 0
775 14:51:18.163444 PCI: 00:0d.2: enabled 0
776 14:51:18.166389 GENERIC: 0.0: enabled 1
777 14:51:18.166475 PCI: 00:0d.3: enabled 0
778 14:51:18.170063 PCI: 00:0e.0: enabled 0
779 14:51:18.173222 PCI: 00:10.2: enabled 1
780 14:51:18.176720 PCI: 00:10.6: enabled 0
781 14:51:18.179562 PCI: 00:10.7: enabled 0
782 14:51:18.179648 PCI: 00:12.0: enabled 0
783 14:51:18.182955 PCI: 00:12.6: enabled 0
784 14:51:18.186377 PCI: 00:13.0: enabled 0
785 14:51:18.189308 PCI: 00:14.0: enabled 1
786 14:51:18.192485 USB0 port 0: enabled 1
787 14:51:18.192569 USB2 port 0: enabled 0
788 14:51:18.196141 USB2 port 1: enabled 1
789 14:51:18.199275 USB2 port 2: enabled 1
790 14:51:18.202517 USB2 port 3: enabled 0
791 14:51:18.206428 USB2 port 4: enabled 1
792 14:51:18.209192 USB2 port 5: enabled 0
793 14:51:18.209293 USB2 port 6: enabled 0
794 14:51:18.212424 USB2 port 7: enabled 0
795 14:51:18.215844 USB2 port 8: enabled 0
796 14:51:18.219102 USB2 port 9: enabled 0
797 14:51:18.222197 USB3 port 0: enabled 0
798 14:51:18.225542 USB3 port 1: enabled 1
799 14:51:18.225625 USB3 port 2: enabled 0
800 14:51:18.228650 USB3 port 3: enabled 0
801 14:51:18.232300 PCI: 00:14.1: enabled 0
802 14:51:18.235211 PCI: 00:14.2: enabled 1
803 14:51:18.239101 PCI: 00:14.3: enabled 1
804 14:51:18.239184 GENERIC: 0.0: enabled 1
805 14:51:18.242120 PCI: 00:15.0: enabled 1
806 14:51:18.245514 I2C: 00:1a: enabled 1
807 14:51:18.249061 I2C: 00:31: enabled 1
808 14:51:18.252121 I2C: 00:32: enabled 1
809 14:51:18.252204 PCI: 00:15.1: enabled 1
810 14:51:18.255372 I2C: 00:10: enabled 1
811 14:51:18.258370 PCI: 00:15.2: enabled 1
812 14:51:18.261919 PCI: 00:15.3: enabled 1
813 14:51:18.265066 PCI: 00:16.0: enabled 1
814 14:51:18.265149 PCI: 00:16.1: enabled 0
815 14:51:18.268200 PCI: 00:16.2: enabled 0
816 14:51:18.271590 PCI: 00:16.3: enabled 0
817 14:51:18.274996 PCI: 00:16.4: enabled 0
818 14:51:18.278387 PCI: 00:16.5: enabled 0
819 14:51:18.278470 PCI: 00:17.0: enabled 1
820 14:51:18.281704 PCI: 00:19.0: enabled 0
821 14:51:18.284616 PCI: 00:19.1: enabled 1
822 14:51:18.288138 I2C: 00:15: enabled 1
823 14:51:18.291071 PCI: 00:19.2: enabled 0
824 14:51:18.291168 PCI: 00:1d.0: enabled 1
825 14:51:18.294484 GENERIC: 0.0: enabled 1
826 14:51:18.297968 PCI: 00:1e.0: enabled 1
827 14:51:18.301192 PCI: 00:1e.1: enabled 0
828 14:51:18.304671 PCI: 00:1e.2: enabled 1
829 14:51:18.304773 SPI: 00: enabled 1
830 14:51:18.307867 PCI: 00:1e.3: enabled 1
831 14:51:18.311333 SPI: 00: enabled 1
832 14:51:18.314371 PCI: 00:1f.0: enabled 1
833 14:51:18.314476 PNP: 0c09.0: enabled 1
834 14:51:18.317990 PCI: 00:1f.1: enabled 0
835 14:51:18.321849 PCI: 00:1f.2: enabled 1
836 14:51:18.321931 GENERIC: 0.0: enabled 1
837 14:51:18.325625 GENERIC: 0.0: enabled 1
838 14:51:18.328771 GENERIC: 1.0: enabled 1
839 14:51:18.332189 PCI: 00:1f.3: enabled 1
840 14:51:18.335383 PCI: 00:1f.4: enabled 0
841 14:51:18.387072 PCI: 00:1f.5: enabled 1
842 14:51:18.387178 PCI: 00:1f.6: enabled 0
843 14:51:18.387247 PCI: 00:1f.7: enabled 0
844 14:51:18.387494 CPU_CLUSTER: 0: enabled 1
845 14:51:18.387558 APIC: 00: enabled 1
846 14:51:18.387629 APIC: 01: enabled 1
847 14:51:18.387689 APIC: 07: enabled 1
848 14:51:18.387745 APIC: 03: enabled 1
849 14:51:18.387852 APIC: 04: enabled 1
850 14:51:18.387947 APIC: 06: enabled 1
851 14:51:18.388002 APIC: 02: enabled 1
852 14:51:18.388056 APIC: 05: enabled 1
853 14:51:18.388111 Root Device scanning...
854 14:51:18.388176 scan_static_bus for Root Device
855 14:51:18.388232 DOMAIN: 0000 enabled
856 14:51:18.388286 CPU_CLUSTER: 0 enabled
857 14:51:18.388341 DOMAIN: 0000 scanning...
858 14:51:18.388432 PCI: pci_scan_bus for bus 00
859 14:51:18.388496 PCI: 00:00.0 [8086/0000] ops
860 14:51:18.388552 PCI: 00:00.0 [8086/9a12] enabled
861 14:51:18.404096 PCI: 00:02.0 [8086/0000] bus ops
862 14:51:18.404182 PCI: 00:02.0 [8086/9a40] enabled
863 14:51:18.404863 PCI: 00:04.0 [8086/0000] bus ops
864 14:51:18.404948 PCI: 00:04.0 [8086/9a03] enabled
865 14:51:18.407531 PCI: 00:05.0 [8086/9a19] enabled
866 14:51:18.407609 PCI: 00:07.0 [0000/0000] hidden
867 14:51:18.410793 PCI: 00:08.0 [8086/9a11] enabled
868 14:51:18.414219 PCI: 00:0a.0 [8086/9a0d] disabled
869 14:51:18.417912 PCI: 00:0d.0 [8086/0000] bus ops
870 14:51:18.420834 PCI: 00:0d.0 [8086/9a13] enabled
871 14:51:18.423994 PCI: 00:14.0 [8086/0000] bus ops
872 14:51:18.427322 PCI: 00:14.0 [8086/a0ed] enabled
873 14:51:18.431021 PCI: 00:14.2 [8086/a0ef] enabled
874 14:51:18.433994 PCI: 00:14.3 [8086/0000] bus ops
875 14:51:18.437105 PCI: 00:14.3 [8086/a0f0] enabled
876 14:51:18.440433 PCI: 00:15.0 [8086/0000] bus ops
877 14:51:18.443675 PCI: 00:15.0 [8086/a0e8] enabled
878 14:51:18.447279 PCI: 00:15.1 [8086/0000] bus ops
879 14:51:18.450622 PCI: 00:15.1 [8086/a0e9] enabled
880 14:51:18.453857 PCI: 00:15.2 [8086/0000] bus ops
881 14:51:18.457068 PCI: 00:15.2 [8086/a0ea] enabled
882 14:51:18.460509 PCI: 00:15.3 [8086/0000] bus ops
883 14:51:18.464065 PCI: 00:15.3 [8086/a0eb] enabled
884 14:51:18.467041 PCI: 00:16.0 [8086/0000] ops
885 14:51:18.470535 PCI: 00:16.0 [8086/a0e0] enabled
886 14:51:18.476829 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 14:51:18.480266 PCI: 00:19.0 [8086/0000] bus ops
888 14:51:18.483958 PCI: 00:19.0 [8086/a0c5] disabled
889 14:51:18.486769 PCI: 00:19.1 [8086/0000] bus ops
890 14:51:18.490209 PCI: 00:19.1 [8086/a0c6] enabled
891 14:51:18.493697 PCI: 00:1d.0 [8086/0000] bus ops
892 14:51:18.496600 PCI: 00:1d.0 [8086/a0b0] enabled
893 14:51:18.499716 PCI: 00:1e.0 [8086/0000] ops
894 14:51:18.503092 PCI: 00:1e.0 [8086/a0a8] enabled
895 14:51:18.506302 PCI: 00:1e.2 [8086/0000] bus ops
896 14:51:18.509878 PCI: 00:1e.2 [8086/a0aa] enabled
897 14:51:18.513242 PCI: 00:1e.3 [8086/0000] bus ops
898 14:51:18.516588 PCI: 00:1e.3 [8086/a0ab] enabled
899 14:51:18.519511 PCI: 00:1f.0 [8086/0000] bus ops
900 14:51:18.523103 PCI: 00:1f.0 [8086/a087] enabled
901 14:51:18.523177 RTC Init
902 14:51:18.526156 Set power on after power failure.
903 14:51:18.529479 Disabling Deep S3
904 14:51:18.529565 Disabling Deep S3
905 14:51:18.532703 Disabling Deep S4
906 14:51:18.532769 Disabling Deep S4
907 14:51:18.536355 Disabling Deep S5
908 14:51:18.539680 Disabling Deep S5
909 14:51:18.539747 PCI: 00:1f.2 [0000/0000] hidden
910 14:51:18.543103 PCI: 00:1f.3 [8086/0000] bus ops
911 14:51:18.546167 PCI: 00:1f.3 [8086/a0c8] enabled
912 14:51:18.549370 PCI: 00:1f.5 [8086/0000] bus ops
913 14:51:18.552748 PCI: 00:1f.5 [8086/a0a4] enabled
914 14:51:18.556195 PCI: Leftover static devices:
915 14:51:18.559558 PCI: 00:10.2
916 14:51:18.559626 PCI: 00:10.6
917 14:51:18.562702 PCI: 00:10.7
918 14:51:18.562768 PCI: 00:06.0
919 14:51:18.562825 PCI: 00:07.1
920 14:51:18.566043 PCI: 00:07.2
921 14:51:18.566109 PCI: 00:07.3
922 14:51:18.569419 PCI: 00:09.0
923 14:51:18.569528 PCI: 00:0d.1
924 14:51:18.572789 PCI: 00:0d.2
925 14:51:18.572857 PCI: 00:0d.3
926 14:51:18.572913 PCI: 00:0e.0
927 14:51:18.576098 PCI: 00:12.0
928 14:51:18.576162 PCI: 00:12.6
929 14:51:18.579625 PCI: 00:13.0
930 14:51:18.579690 PCI: 00:14.1
931 14:51:18.579745 PCI: 00:16.1
932 14:51:18.582539 PCI: 00:16.2
933 14:51:18.582602 PCI: 00:16.3
934 14:51:18.585870 PCI: 00:16.4
935 14:51:18.585936 PCI: 00:16.5
936 14:51:18.589362 PCI: 00:17.0
937 14:51:18.589435 PCI: 00:19.2
938 14:51:18.589520 PCI: 00:1e.1
939 14:51:18.592238 PCI: 00:1f.1
940 14:51:18.592307 PCI: 00:1f.4
941 14:51:18.595783 PCI: 00:1f.6
942 14:51:18.595848 PCI: 00:1f.7
943 14:51:18.599198 PCI: Check your devicetree.cb.
944 14:51:18.602644 PCI: 00:02.0 scanning...
945 14:51:18.605514 scan_generic_bus for PCI: 00:02.0
946 14:51:18.609026 scan_generic_bus for PCI: 00:02.0 done
947 14:51:18.612312 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 14:51:18.616017 PCI: 00:04.0 scanning...
949 14:51:18.618922 scan_generic_bus for PCI: 00:04.0
950 14:51:18.622049 GENERIC: 0.0 enabled
951 14:51:18.629015 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 14:51:18.632198 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 14:51:18.635364 PCI: 00:0d.0 scanning...
954 14:51:18.638876 scan_static_bus for PCI: 00:0d.0
955 14:51:18.642262 USB0 port 0 enabled
956 14:51:18.642331 USB0 port 0 scanning...
957 14:51:18.645258 scan_static_bus for USB0 port 0
958 14:51:18.648744 USB3 port 0 enabled
959 14:51:18.652254 USB3 port 1 enabled
960 14:51:18.652324 USB3 port 2 disabled
961 14:51:18.655356 USB3 port 3 disabled
962 14:51:18.659198 USB3 port 0 scanning...
963 14:51:18.661806 scan_static_bus for USB3 port 0
964 14:51:18.665168 scan_static_bus for USB3 port 0 done
965 14:51:18.668515 scan_bus: bus USB3 port 0 finished in 6 msecs
966 14:51:18.671803 USB3 port 1 scanning...
967 14:51:18.674942 scan_static_bus for USB3 port 1
968 14:51:18.678436 scan_static_bus for USB3 port 1 done
969 14:51:18.684830 scan_bus: bus USB3 port 1 finished in 6 msecs
970 14:51:18.688270 scan_static_bus for USB0 port 0 done
971 14:51:18.691455 scan_bus: bus USB0 port 0 finished in 43 msecs
972 14:51:18.695373 scan_static_bus for PCI: 00:0d.0 done
973 14:51:18.701639 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 14:51:18.704471 PCI: 00:14.0 scanning...
975 14:51:18.707869 scan_static_bus for PCI: 00:14.0
976 14:51:18.707945 USB0 port 0 enabled
977 14:51:18.711485 USB0 port 0 scanning...
978 14:51:18.714572 scan_static_bus for USB0 port 0
979 14:51:18.718053 USB2 port 0 disabled
980 14:51:18.718124 USB2 port 1 enabled
981 14:51:18.721260 USB2 port 2 enabled
982 14:51:18.724717 USB2 port 3 disabled
983 14:51:18.724797 USB2 port 4 enabled
984 14:51:18.727833 USB2 port 5 disabled
985 14:51:18.727916 USB2 port 6 disabled
986 14:51:18.731195 USB2 port 7 disabled
987 14:51:18.734092 USB2 port 8 disabled
988 14:51:18.734174 USB2 port 9 disabled
989 14:51:18.737967 USB3 port 0 disabled
990 14:51:18.740749 USB3 port 1 enabled
991 14:51:18.740831 USB3 port 2 disabled
992 14:51:18.744336 USB3 port 3 disabled
993 14:51:18.747360 USB2 port 1 scanning...
994 14:51:18.750650 scan_static_bus for USB2 port 1
995 14:51:18.753855 scan_static_bus for USB2 port 1 done
996 14:51:18.757392 scan_bus: bus USB2 port 1 finished in 6 msecs
997 14:51:18.760680 USB2 port 2 scanning...
998 14:51:18.764157 scan_static_bus for USB2 port 2
999 14:51:18.767061 scan_static_bus for USB2 port 2 done
1000 14:51:18.773610 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 14:51:18.773695 USB2 port 4 scanning...
1002 14:51:18.777412 scan_static_bus for USB2 port 4
1003 14:51:18.783806 scan_static_bus for USB2 port 4 done
1004 14:51:18.787356 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 14:51:18.790534 USB3 port 1 scanning...
1006 14:51:18.793903 scan_static_bus for USB3 port 1
1007 14:51:18.797126 scan_static_bus for USB3 port 1 done
1008 14:51:18.800262 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 14:51:18.803705 scan_static_bus for USB0 port 0 done
1010 14:51:18.810225 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 14:51:18.813481 scan_static_bus for PCI: 00:14.0 done
1012 14:51:18.817206 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1013 14:51:18.820111 PCI: 00:14.3 scanning...
1014 14:51:18.823418 scan_static_bus for PCI: 00:14.3
1015 14:51:18.826823 GENERIC: 0.0 enabled
1016 14:51:18.830128 scan_static_bus for PCI: 00:14.3 done
1017 14:51:18.833670 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 14:51:18.837056 PCI: 00:15.0 scanning...
1019 14:51:18.840548 scan_static_bus for PCI: 00:15.0
1020 14:51:18.843562 I2C: 00:1a enabled
1021 14:51:18.846675 I2C: 00:31 enabled
1022 14:51:18.846748 I2C: 00:32 enabled
1023 14:51:18.850038 scan_static_bus for PCI: 00:15.0 done
1024 14:51:18.856760 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 14:51:18.856840 PCI: 00:15.1 scanning...
1026 14:51:18.863546 scan_static_bus for PCI: 00:15.1
1027 14:51:18.863620 I2C: 00:10 enabled
1028 14:51:18.866496 scan_static_bus for PCI: 00:15.1 done
1029 14:51:18.872942 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 14:51:18.873027 PCI: 00:15.2 scanning...
1031 14:51:18.876330 scan_static_bus for PCI: 00:15.2
1032 14:51:18.883435 scan_static_bus for PCI: 00:15.2 done
1033 14:51:18.886405 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 14:51:18.889865 PCI: 00:15.3 scanning...
1035 14:51:18.893324 scan_static_bus for PCI: 00:15.3
1036 14:51:18.896756 scan_static_bus for PCI: 00:15.3 done
1037 14:51:18.900234 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 14:51:18.903838 PCI: 00:19.1 scanning...
1039 14:51:18.907170 scan_static_bus for PCI: 00:19.1
1040 14:51:18.910449 I2C: 00:15 enabled
1041 14:51:18.913502 scan_static_bus for PCI: 00:19.1 done
1042 14:51:18.917323 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 14:51:18.920092 PCI: 00:1d.0 scanning...
1044 14:51:18.923349 do_pci_scan_bridge for PCI: 00:1d.0
1045 14:51:18.926665 PCI: pci_scan_bus for bus 01
1046 14:51:18.930285 PCI: 01:00.0 [15b7/5009] enabled
1047 14:51:18.933575 GENERIC: 0.0 enabled
1048 14:51:18.936802 Enabling Common Clock Configuration
1049 14:51:18.940090 L1 Sub-State supported from root port 29
1050 14:51:18.943273 L1 Sub-State Support = 0x5
1051 14:51:18.946905 CommonModeRestoreTime = 0x28
1052 14:51:18.950183 Power On Value = 0x16, Power On Scale = 0x0
1053 14:51:18.953061 ASPM: Enabled L1
1054 14:51:18.956272 PCIe: Max_Payload_Size adjusted to 128
1055 14:51:18.959884 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 14:51:18.963189 PCI: 00:1e.2 scanning...
1057 14:51:18.966307 scan_generic_bus for PCI: 00:1e.2
1058 14:51:18.969599 SPI: 00 enabled
1059 14:51:18.976254 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 14:51:18.979617 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 14:51:18.982802 PCI: 00:1e.3 scanning...
1062 14:51:18.986423 scan_generic_bus for PCI: 00:1e.3
1063 14:51:18.989789 SPI: 00 enabled
1064 14:51:18.992984 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 14:51:18.999195 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 14:51:19.002540 PCI: 00:1f.0 scanning...
1067 14:51:19.006146 scan_static_bus for PCI: 00:1f.0
1068 14:51:19.006227 PNP: 0c09.0 enabled
1069 14:51:19.008948 PNP: 0c09.0 scanning...
1070 14:51:19.012494 scan_static_bus for PNP: 0c09.0
1071 14:51:19.015597 scan_static_bus for PNP: 0c09.0 done
1072 14:51:19.022386 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 14:51:19.025601 scan_static_bus for PCI: 00:1f.0 done
1074 14:51:19.028950 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 14:51:19.031970 PCI: 00:1f.2 scanning...
1076 14:51:19.035417 scan_static_bus for PCI: 00:1f.2
1077 14:51:19.038825 GENERIC: 0.0 enabled
1078 14:51:19.038905 GENERIC: 0.0 scanning...
1079 14:51:19.042563 scan_static_bus for GENERIC: 0.0
1080 14:51:19.045669 GENERIC: 0.0 enabled
1081 14:51:19.049012 GENERIC: 1.0 enabled
1082 14:51:19.052784 scan_static_bus for GENERIC: 0.0 done
1083 14:51:19.055323 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 14:51:19.062031 scan_static_bus for PCI: 00:1f.2 done
1085 14:51:19.065709 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 14:51:19.069740 PCI: 00:1f.3 scanning...
1087 14:51:19.071975 scan_static_bus for PCI: 00:1f.3
1088 14:51:19.075044 scan_static_bus for PCI: 00:1f.3 done
1089 14:51:19.078410 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 14:51:19.081769 PCI: 00:1f.5 scanning...
1091 14:51:19.085157 scan_generic_bus for PCI: 00:1f.5
1092 14:51:19.088758 scan_generic_bus for PCI: 00:1f.5 done
1093 14:51:19.095182 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 14:51:19.098242 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1095 14:51:19.105172 scan_static_bus for Root Device done
1096 14:51:19.108515 scan_bus: bus Root Device finished in 736 msecs
1097 14:51:19.108596 done
1098 14:51:19.114749 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1099 14:51:19.118798 Chrome EC: UHEPI supported
1100 14:51:19.124718 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 14:51:19.131519 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 14:51:19.134964 SPI flash protection: WPSW=0 SRP0=1
1103 14:51:19.141436 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 14:51:19.144862 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1105 14:51:19.148489 found VGA at PCI: 00:02.0
1106 14:51:19.151786 Setting up VGA for PCI: 00:02.0
1107 14:51:19.158116 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 14:51:19.161072 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 14:51:19.164495 Allocating resources...
1110 14:51:19.168049 Reading resources...
1111 14:51:19.171474 Root Device read_resources bus 0 link: 0
1112 14:51:19.174405 DOMAIN: 0000 read_resources bus 0 link: 0
1113 14:51:19.181128 PCI: 00:04.0 read_resources bus 1 link: 0
1114 14:51:19.184078 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 14:51:19.191481 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 14:51:19.194681 USB0 port 0 read_resources bus 0 link: 0
1117 14:51:19.200846 USB0 port 0 read_resources bus 0 link: 0 done
1118 14:51:19.204211 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 14:51:19.210611 PCI: 00:14.0 read_resources bus 0 link: 0
1120 14:51:19.214114 USB0 port 0 read_resources bus 0 link: 0
1121 14:51:19.220527 USB0 port 0 read_resources bus 0 link: 0 done
1122 14:51:19.223834 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 14:51:19.230625 PCI: 00:14.3 read_resources bus 0 link: 0
1124 14:51:19.233647 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 14:51:19.240653 PCI: 00:15.0 read_resources bus 0 link: 0
1126 14:51:19.243465 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 14:51:19.250087 PCI: 00:15.1 read_resources bus 0 link: 0
1128 14:51:19.253238 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 14:51:19.260301 PCI: 00:19.1 read_resources bus 0 link: 0
1130 14:51:19.263288 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 14:51:19.270330 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 14:51:19.273253 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 14:51:19.280303 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 14:51:19.283278 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 14:51:19.290021 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 14:51:19.293329 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 14:51:19.299900 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 14:51:19.303126 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 14:51:19.309514 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 14:51:19.312994 GENERIC: 0.0 read_resources bus 0 link: 0
1141 14:51:19.319497 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 14:51:19.323326 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 14:51:19.329759 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 14:51:19.332453 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 14:51:19.339641 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 14:51:19.342382 Root Device read_resources bus 0 link: 0 done
1147 14:51:19.345885 Done reading resources.
1148 14:51:19.352664 Show resources in subtree (Root Device)...After reading.
1149 14:51:19.355782 Root Device child on link 0 DOMAIN: 0000
1150 14:51:19.359154 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 14:51:19.368831 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 14:51:19.378840 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 14:51:19.382011 PCI: 00:00.0
1154 14:51:19.388932 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 14:51:19.398926 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 14:51:19.408759 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 14:51:19.418552 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 14:51:19.428126 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 14:51:19.438421 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 14:51:19.448345 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 14:51:19.454607 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 14:51:19.464784 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 14:51:19.474306 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 14:51:19.484232 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 14:51:19.494040 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 14:51:19.503953 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 14:51:19.510702 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 14:51:19.520891 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 14:51:19.530633 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 14:51:19.540697 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 14:51:19.550557 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 14:51:19.560139 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 14:51:19.569874 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 14:51:19.569958 PCI: 00:02.0
1175 14:51:19.579820 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 14:51:19.589883 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 14:51:19.599833 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 14:51:19.603095 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 14:51:19.613176 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 14:51:19.616438 GENERIC: 0.0
1181 14:51:19.616519 PCI: 00:05.0
1182 14:51:19.629315 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 14:51:19.632967 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 14:51:19.633049 GENERIC: 0.0
1185 14:51:19.636070 PCI: 00:08.0
1186 14:51:19.645889 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 14:51:19.645975 PCI: 00:0a.0
1188 14:51:19.652591 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 14:51:19.662117 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 14:51:19.665847 USB0 port 0 child on link 0 USB3 port 0
1191 14:51:19.669218 USB3 port 0
1192 14:51:19.669299 USB3 port 1
1193 14:51:19.672130 USB3 port 2
1194 14:51:19.672211 USB3 port 3
1195 14:51:19.678900 PCI: 00:14.0 child on link 0 USB0 port 0
1196 14:51:19.688685 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 14:51:19.692075 USB0 port 0 child on link 0 USB2 port 0
1198 14:51:19.695440 USB2 port 0
1199 14:51:19.695522 USB2 port 1
1200 14:51:19.698270 USB2 port 2
1201 14:51:19.698351 USB2 port 3
1202 14:51:19.701798 USB2 port 4
1203 14:51:19.701879 USB2 port 5
1204 14:51:19.705219 USB2 port 6
1205 14:51:19.705300 USB2 port 7
1206 14:51:19.708227 USB2 port 8
1207 14:51:19.708308 USB2 port 9
1208 14:51:19.712069 USB3 port 0
1209 14:51:19.714739 USB3 port 1
1210 14:51:19.714820 USB3 port 2
1211 14:51:19.718317 USB3 port 3
1212 14:51:19.718398 PCI: 00:14.2
1213 14:51:19.728096 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:51:19.738092 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 14:51:19.741207 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 14:51:19.751394 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 14:51:19.754411 GENERIC: 0.0
1218 14:51:19.757678 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 14:51:19.767938 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 14:51:19.770974 I2C: 00:1a
1221 14:51:19.771056 I2C: 00:31
1222 14:51:19.774378 I2C: 00:32
1223 14:51:19.777628 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 14:51:19.787468 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 14:51:19.790733 I2C: 00:10
1226 14:51:19.790836 PCI: 00:15.2
1227 14:51:19.800623 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 14:51:19.803750 PCI: 00:15.3
1229 14:51:19.813640 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 14:51:19.813719 PCI: 00:16.0
1231 14:51:19.823654 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 14:51:19.827550 PCI: 00:19.0
1233 14:51:19.830112 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 14:51:19.840135 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 14:51:19.840214 I2C: 00:15
1236 14:51:19.846877 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 14:51:19.856483 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 14:51:19.863351 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 14:51:19.872968 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 14:51:19.876273 GENERIC: 0.0
1241 14:51:19.876348 PCI: 01:00.0
1242 14:51:19.886082 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 14:51:19.896321 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1244 14:51:19.899466 PCI: 00:1e.0
1245 14:51:19.909147 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1246 14:51:19.912708 PCI: 00:1e.2 child on link 0 SPI: 00
1247 14:51:19.925604 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 14:51:19.925684 SPI: 00
1249 14:51:19.928881 PCI: 00:1e.3 child on link 0 SPI: 00
1250 14:51:19.938866 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 14:51:19.942878 SPI: 00
1252 14:51:19.945443 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1253 14:51:19.955167 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1254 14:51:19.955266 PNP: 0c09.0
1255 14:51:19.965036 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1256 14:51:19.968104 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1257 14:51:19.978111 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1258 14:51:19.987867 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1259 14:51:19.991762 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1260 14:51:19.994364 GENERIC: 0.0
1261 14:51:19.994439 GENERIC: 1.0
1262 14:51:19.997921 PCI: 00:1f.3
1263 14:51:20.007712 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1264 14:51:20.017573 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1265 14:51:20.017675 PCI: 00:1f.5
1266 14:51:20.027235 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1267 14:51:20.030493 CPU_CLUSTER: 0 child on link 0 APIC: 00
1268 14:51:20.033764 APIC: 00
1269 14:51:20.033835 APIC: 01
1270 14:51:20.037347 APIC: 07
1271 14:51:20.037457 APIC: 03
1272 14:51:20.037547 APIC: 04
1273 14:51:20.040352 APIC: 06
1274 14:51:20.040450 APIC: 02
1275 14:51:20.043911 APIC: 05
1276 14:51:20.050223 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1277 14:51:20.056888 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1278 14:51:20.063362 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1279 14:51:20.066779 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1280 14:51:20.073504 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1281 14:51:20.076823 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1282 14:51:20.083054 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1283 14:51:20.089577 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1284 14:51:20.100144 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1285 14:51:20.106407 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1286 14:51:20.112811 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1287 14:51:20.119587 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1288 14:51:20.126115 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1289 14:51:20.135759 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1290 14:51:20.139045 DOMAIN: 0000: Resource ranges:
1291 14:51:20.142182 * Base: 1000, Size: 800, Tag: 100
1292 14:51:20.145617 * Base: 1900, Size: e700, Tag: 100
1293 14:51:20.148749 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1294 14:51:20.155348 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1295 14:51:20.165695 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1296 14:51:20.171918 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1297 14:51:20.178391 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 14:51:20.188239 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 14:51:20.194842 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 14:51:20.201517 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 14:51:20.211645 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 14:51:20.217876 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 14:51:20.224700 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 14:51:20.234632 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 14:51:20.241109 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 14:51:20.247617 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 14:51:20.257410 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 14:51:20.264362 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 14:51:20.271010 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 14:51:20.280732 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 14:51:20.287333 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 14:51:20.293506 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1313 14:51:20.303804 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 14:51:20.310057 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 14:51:20.316528 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 14:51:20.326772 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 14:51:20.333425 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 14:51:20.336798 DOMAIN: 0000: Resource ranges:
1319 14:51:20.339705 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 14:51:20.346148 * Base: d0000000, Size: 28000000, Tag: 200
1321 14:51:20.349603 * Base: fa000000, Size: 1000000, Tag: 200
1322 14:51:20.352949 * Base: fb001000, Size: 2fff000, Tag: 200
1323 14:51:20.359720 * Base: fe010000, Size: 2e000, Tag: 200
1324 14:51:20.362946 * Base: fe03f000, Size: d41000, Tag: 200
1325 14:51:20.365799 * Base: fed88000, Size: 8000, Tag: 200
1326 14:51:20.369384 * Base: fed93000, Size: d000, Tag: 200
1327 14:51:20.375987 * Base: feda2000, Size: 1e000, Tag: 200
1328 14:51:20.379276 * Base: fede0000, Size: 1220000, Tag: 200
1329 14:51:20.382331 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1330 14:51:20.392233 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 14:51:20.399206 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 14:51:20.405481 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 14:51:20.412369 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 14:51:20.418541 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 14:51:20.425091 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1336 14:51:20.432050 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1337 14:51:20.438423 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1338 14:51:20.444888 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1339 14:51:20.451821 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1340 14:51:20.458498 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1341 14:51:20.464674 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1342 14:51:20.471463 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 14:51:20.477841 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1344 14:51:20.484492 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1345 14:51:20.491444 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1346 14:51:20.497915 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1347 14:51:20.504370 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1348 14:51:20.510992 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1349 14:51:20.517444 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1350 14:51:20.524139 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1351 14:51:20.530939 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1352 14:51:20.537340 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1353 14:51:20.544304 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1354 14:51:20.547222 PCI: 00:1d.0: Resource ranges:
1355 14:51:20.553802 * Base: 7fc00000, Size: 100000, Tag: 200
1356 14:51:20.560221 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1357 14:51:20.567219 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1358 14:51:20.573673 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1359 14:51:20.580205 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1360 14:51:20.586925 Root Device assign_resources, bus 0 link: 0
1361 14:51:20.589890 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 14:51:20.599757 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1363 14:51:20.606984 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1364 14:51:20.616302 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1365 14:51:20.622968 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1366 14:51:20.626366 PCI: 00:04.0 assign_resources, bus 1 link: 0
1367 14:51:20.633024 PCI: 00:04.0 assign_resources, bus 1 link: 0
1368 14:51:20.639611 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1369 14:51:20.649371 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1370 14:51:20.656342 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1371 14:51:20.662883 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1372 14:51:20.666157 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1373 14:51:20.676249 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1374 14:51:20.679413 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 14:51:20.682511 PCI: 00:14.0 assign_resources, bus 0 link: 0
1376 14:51:20.692645 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1377 14:51:20.699226 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1378 14:51:20.709190 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1379 14:51:20.712505 PCI: 00:14.3 assign_resources, bus 0 link: 0
1380 14:51:20.719517 PCI: 00:14.3 assign_resources, bus 0 link: 0
1381 14:51:20.725592 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1382 14:51:20.728754 PCI: 00:15.0 assign_resources, bus 0 link: 0
1383 14:51:20.735875 PCI: 00:15.0 assign_resources, bus 0 link: 0
1384 14:51:20.742233 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1385 14:51:20.748718 PCI: 00:15.1 assign_resources, bus 0 link: 0
1386 14:51:20.751768 PCI: 00:15.1 assign_resources, bus 0 link: 0
1387 14:51:20.761779 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1388 14:51:20.768356 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1389 14:51:20.778323 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1390 14:51:20.785240 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1391 14:51:20.788376 PCI: 00:19.1 assign_resources, bus 0 link: 0
1392 14:51:20.795168 PCI: 00:19.1 assign_resources, bus 0 link: 0
1393 14:51:20.801854 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1394 14:51:20.814786 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1395 14:51:20.822172 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1396 14:51:20.824889 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 14:51:20.834670 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1398 14:51:20.841522 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1399 14:51:20.847721 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 14:51:20.854470 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1401 14:51:20.860973 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 14:51:20.864511 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1403 14:51:20.874417 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1404 14:51:20.877782 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 14:51:20.880792 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 14:51:20.887310 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 14:51:20.890884 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 14:51:20.897368 LPC: Trying to open IO window from 800 size 1ff
1409 14:51:20.904100 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 14:51:20.913899 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 14:51:20.920458 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 14:51:20.926937 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 14:51:20.930346 Root Device assign_resources, bus 0 link: 0
1414 14:51:20.933700 Done setting resources.
1415 14:51:20.940284 Show resources in subtree (Root Device)...After assigning values.
1416 14:51:20.943532 Root Device child on link 0 DOMAIN: 0000
1417 14:51:20.946973 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 14:51:20.956854 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 14:51:20.966976 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 14:51:20.970435 PCI: 00:00.0
1421 14:51:20.980289 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 14:51:20.986453 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 14:51:20.996425 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 14:51:21.006111 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 14:51:21.016234 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 14:51:21.025976 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 14:51:21.035919 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 14:51:21.045791 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 14:51:21.052272 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 14:51:21.062472 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 14:51:21.072286 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 14:51:21.082157 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 14:51:21.091738 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 14:51:21.098591 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 14:51:21.108486 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 14:51:21.118323 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 14:51:21.128199 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 14:51:21.138092 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 14:51:21.148030 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 14:51:21.158063 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 14:51:21.158147 PCI: 00:02.0
1442 14:51:21.170950 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 14:51:21.181416 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 14:51:21.190834 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 14:51:21.194312 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 14:51:21.204044 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 14:51:21.207142 GENERIC: 0.0
1448 14:51:21.207217 PCI: 00:05.0
1449 14:51:21.217410 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 14:51:21.224014 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 14:51:21.224097 GENERIC: 0.0
1452 14:51:21.227314 PCI: 00:08.0
1453 14:51:21.237062 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 14:51:21.237183 PCI: 00:0a.0
1455 14:51:21.243348 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 14:51:21.253340 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 14:51:21.256667 USB0 port 0 child on link 0 USB3 port 0
1458 14:51:21.260262 USB3 port 0
1459 14:51:21.260415 USB3 port 1
1460 14:51:21.263315 USB3 port 2
1461 14:51:21.263468 USB3 port 3
1462 14:51:21.270446 PCI: 00:14.0 child on link 0 USB0 port 0
1463 14:51:21.281463 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 14:51:21.283670 USB0 port 0 child on link 0 USB2 port 0
1465 14:51:21.286663 USB2 port 0
1466 14:51:21.287208 USB2 port 1
1467 14:51:21.290051 USB2 port 2
1468 14:51:21.290480 USB2 port 3
1469 14:51:21.293512 USB2 port 4
1470 14:51:21.293920 USB2 port 5
1471 14:51:21.296527 USB2 port 6
1472 14:51:21.296930 USB2 port 7
1473 14:51:21.299903 USB2 port 8
1474 14:51:21.303623 USB2 port 9
1475 14:51:21.304066 USB3 port 0
1476 14:51:21.306539 USB3 port 1
1477 14:51:21.306943 USB3 port 2
1478 14:51:21.310009 USB3 port 3
1479 14:51:21.310398 PCI: 00:14.2
1480 14:51:21.319549 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 14:51:21.330011 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 14:51:21.336202 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 14:51:21.346006 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 14:51:21.346502 GENERIC: 0.0
1485 14:51:21.353094 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 14:51:21.362684 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 14:51:21.363258 I2C: 00:1a
1488 14:51:21.365999 I2C: 00:31
1489 14:51:21.366482 I2C: 00:32
1490 14:51:21.372328 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 14:51:21.382868 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 14:51:21.383359 I2C: 00:10
1493 14:51:21.386004 PCI: 00:15.2
1494 14:51:21.395709 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 14:51:21.396186 PCI: 00:15.3
1496 14:51:21.408803 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 14:51:21.409296 PCI: 00:16.0
1498 14:51:21.418661 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 14:51:21.421996 PCI: 00:19.0
1500 14:51:21.425042 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 14:51:21.435845 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 14:51:21.438556 I2C: 00:15
1503 14:51:21.441599 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 14:51:21.451901 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 14:51:21.461559 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 14:51:21.474707 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 14:51:21.475200 GENERIC: 0.0
1508 14:51:21.477874 PCI: 01:00.0
1509 14:51:21.487939 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 14:51:21.497673 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1511 14:51:21.498143 PCI: 00:1e.0
1512 14:51:21.510989 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 14:51:21.514444 PCI: 00:1e.2 child on link 0 SPI: 00
1514 14:51:21.524237 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 14:51:21.524700 SPI: 00
1516 14:51:21.530877 PCI: 00:1e.3 child on link 0 SPI: 00
1517 14:51:21.540627 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 14:51:21.541195 SPI: 00
1519 14:51:21.547054 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 14:51:21.553956 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 14:51:21.557355 PNP: 0c09.0
1522 14:51:21.564172 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1523 14:51:21.570285 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1524 14:51:21.580175 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1525 14:51:21.586937 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1526 14:51:21.593077 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1527 14:51:21.593599 GENERIC: 0.0
1528 14:51:21.597368 GENERIC: 1.0
1529 14:51:21.597879 PCI: 00:1f.3
1530 14:51:21.610045 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1531 14:51:21.619726 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1532 14:51:21.620292 PCI: 00:1f.5
1533 14:51:21.629595 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1534 14:51:21.636415 CPU_CLUSTER: 0 child on link 0 APIC: 00
1535 14:51:21.636963 APIC: 00
1536 14:51:21.637465 APIC: 01
1537 14:51:21.639586 APIC: 07
1538 14:51:21.640157 APIC: 03
1539 14:51:21.643171 APIC: 04
1540 14:51:21.643745 APIC: 06
1541 14:51:21.644214 APIC: 02
1542 14:51:21.646030 APIC: 05
1543 14:51:21.649504 Done allocating resources.
1544 14:51:21.652803 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1545 14:51:21.659641 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1546 14:51:21.662723 Configure GPIOs for I2S audio on UP4.
1547 14:51:21.669966 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1548 14:51:21.673312 Enabling resources...
1549 14:51:21.676560 PCI: 00:00.0 subsystem <- 8086/9a12
1550 14:51:21.680124 PCI: 00:00.0 cmd <- 06
1551 14:51:21.683280 PCI: 00:02.0 subsystem <- 8086/9a40
1552 14:51:21.686905 PCI: 00:02.0 cmd <- 03
1553 14:51:21.689671 PCI: 00:04.0 subsystem <- 8086/9a03
1554 14:51:21.692840 PCI: 00:04.0 cmd <- 02
1555 14:51:21.696491 PCI: 00:05.0 subsystem <- 8086/9a19
1556 14:51:21.696949 PCI: 00:05.0 cmd <- 02
1557 14:51:21.703173 PCI: 00:08.0 subsystem <- 8086/9a11
1558 14:51:21.703692 PCI: 00:08.0 cmd <- 06
1559 14:51:21.706509 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 14:51:21.709893 PCI: 00:0d.0 cmd <- 02
1561 14:51:21.713054 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 14:51:21.716250 PCI: 00:14.0 cmd <- 02
1563 14:51:21.719494 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 14:51:21.722911 PCI: 00:14.2 cmd <- 02
1565 14:51:21.726026 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 14:51:21.729303 PCI: 00:14.3 cmd <- 02
1567 14:51:21.732699 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 14:51:21.736125 PCI: 00:15.0 cmd <- 02
1569 14:51:21.739178 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 14:51:21.742556 PCI: 00:15.1 cmd <- 02
1571 14:51:21.745742 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 14:51:21.746156 PCI: 00:15.2 cmd <- 02
1573 14:51:21.752668 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 14:51:21.753084 PCI: 00:15.3 cmd <- 02
1575 14:51:21.756204 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 14:51:21.759089 PCI: 00:16.0 cmd <- 02
1577 14:51:21.762113 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 14:51:21.765485 PCI: 00:19.1 cmd <- 02
1579 14:51:21.768937 PCI: 00:1d.0 bridge ctrl <- 0013
1580 14:51:21.772371 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 14:51:21.775722 PCI: 00:1d.0 cmd <- 06
1582 14:51:21.778527 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 14:51:21.782296 PCI: 00:1e.0 cmd <- 06
1584 14:51:21.785516 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 14:51:21.788914 PCI: 00:1e.2 cmd <- 06
1586 14:51:21.791813 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 14:51:21.795141 PCI: 00:1e.3 cmd <- 02
1588 14:51:21.798387 PCI: 00:1f.0 subsystem <- 8086/a087
1589 14:51:21.798468 PCI: 00:1f.0 cmd <- 407
1590 14:51:21.805221 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 14:51:21.805302 PCI: 00:1f.3 cmd <- 02
1592 14:51:21.808441 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 14:51:21.812087 PCI: 00:1f.5 cmd <- 406
1594 14:51:21.817075 PCI: 01:00.0 cmd <- 02
1595 14:51:21.821624 done.
1596 14:51:21.824357 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 14:51:21.827889 Initializing devices...
1598 14:51:21.831400 Root Device init
1599 14:51:21.834181 Chrome EC: Set SMI mask to 0x0000000000000000
1600 14:51:21.841070 Chrome EC: clear events_b mask to 0x0000000000000000
1601 14:51:21.847683 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 14:51:21.850740 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 14:51:21.857826 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 14:51:21.864709 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 14:51:21.871071 fw_config match found: DB_USB=USB3_ACTIVE
1606 14:51:21.874625 Configure Right Type-C port orientation for retimer
1607 14:51:21.877600 Root Device init finished in 44 msecs
1608 14:51:21.881735 PCI: 00:00.0 init
1609 14:51:21.884610 CPU TDP = 9 Watts
1610 14:51:21.884690 CPU PL1 = 9 Watts
1611 14:51:21.887997 CPU PL2 = 40 Watts
1612 14:51:21.891293 CPU PL4 = 83 Watts
1613 14:51:21.894991 PCI: 00:00.0 init finished in 8 msecs
1614 14:51:21.895073 PCI: 00:02.0 init
1615 14:51:21.897993 GMA: Found VBT in CBFS
1616 14:51:21.901084 GMA: Found valid VBT in CBFS
1617 14:51:21.907674 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 14:51:21.914412 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 14:51:21.917649 PCI: 00:02.0 init finished in 18 msecs
1620 14:51:21.921338 PCI: 00:05.0 init
1621 14:51:21.924431 PCI: 00:05.0 init finished in 0 msecs
1622 14:51:21.927749 PCI: 00:08.0 init
1623 14:51:21.930813 PCI: 00:08.0 init finished in 0 msecs
1624 14:51:21.934363 PCI: 00:14.0 init
1625 14:51:21.937443 PCI: 00:14.0 init finished in 0 msecs
1626 14:51:21.940635 PCI: 00:14.2 init
1627 14:51:21.944078 PCI: 00:14.2 init finished in 0 msecs
1628 14:51:21.947241 PCI: 00:15.0 init
1629 14:51:21.950669 I2C bus 0 version 0x3230302a
1630 14:51:21.954049 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 14:51:21.956993 PCI: 00:15.0 init finished in 6 msecs
1632 14:51:21.957085 PCI: 00:15.1 init
1633 14:51:21.960600 I2C bus 1 version 0x3230302a
1634 14:51:21.963684 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 14:51:21.970282 PCI: 00:15.1 init finished in 6 msecs
1636 14:51:21.970381 PCI: 00:15.2 init
1637 14:51:21.973928 I2C bus 2 version 0x3230302a
1638 14:51:21.977384 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 14:51:21.980625 PCI: 00:15.2 init finished in 6 msecs
1640 14:51:21.983684 PCI: 00:15.3 init
1641 14:51:21.987702 I2C bus 3 version 0x3230302a
1642 14:51:21.990653 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 14:51:21.993778 PCI: 00:15.3 init finished in 6 msecs
1644 14:51:21.997075 PCI: 00:16.0 init
1645 14:51:22.000359 PCI: 00:16.0 init finished in 0 msecs
1646 14:51:22.003884 PCI: 00:19.1 init
1647 14:51:22.007099 I2C bus 5 version 0x3230302a
1648 14:51:22.010473 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 14:51:22.013397 PCI: 00:19.1 init finished in 6 msecs
1650 14:51:22.016871 PCI: 00:1d.0 init
1651 14:51:22.020062 Initializing PCH PCIe bridge.
1652 14:51:22.023717 PCI: 00:1d.0 init finished in 3 msecs
1653 14:51:22.026819 PCI: 00:1f.0 init
1654 14:51:22.030135 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 14:51:22.033435 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 14:51:22.036515 IOAPIC: ID = 0x02
1657 14:51:22.040218 IOAPIC: Dumping registers
1658 14:51:22.040291 reg 0x0000: 0x02000000
1659 14:51:22.043666 reg 0x0001: 0x00770020
1660 14:51:22.046645 reg 0x0002: 0x00000000
1661 14:51:22.049858 PCI: 00:1f.0 init finished in 21 msecs
1662 14:51:22.052985 PCI: 00:1f.2 init
1663 14:51:22.056788 Disabling ACPI via APMC.
1664 14:51:22.056868 APMC done.
1665 14:51:22.063171 PCI: 00:1f.2 init finished in 5 msecs
1666 14:51:22.073613 PCI: 01:00.0 init
1667 14:51:22.077075 PCI: 01:00.0 init finished in 0 msecs
1668 14:51:22.080750 PNP: 0c09.0 init
1669 14:51:22.083911 Google Chrome EC uptime: 8.331 seconds
1670 14:51:22.090205 Google Chrome AP resets since EC boot: 1
1671 14:51:22.093524 Google Chrome most recent AP reset causes:
1672 14:51:22.096474 0.451: 32775 shutdown: entering G3
1673 14:51:22.103137 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 14:51:22.106330 PNP: 0c09.0 init finished in 22 msecs
1675 14:51:22.112806 Devices initialized
1676 14:51:22.116092 Show all devs... After init.
1677 14:51:22.119045 Root Device: enabled 1
1678 14:51:22.119146 DOMAIN: 0000: enabled 1
1679 14:51:22.122503 CPU_CLUSTER: 0: enabled 1
1680 14:51:22.125939 PCI: 00:00.0: enabled 1
1681 14:51:22.129409 PCI: 00:02.0: enabled 1
1682 14:51:22.129544 PCI: 00:04.0: enabled 1
1683 14:51:22.133083 PCI: 00:05.0: enabled 1
1684 14:51:22.135727 PCI: 00:06.0: enabled 0
1685 14:51:22.139150 PCI: 00:07.0: enabled 0
1686 14:51:22.139223 PCI: 00:07.1: enabled 0
1687 14:51:22.142659 PCI: 00:07.2: enabled 0
1688 14:51:22.145671 PCI: 00:07.3: enabled 0
1689 14:51:22.149167 PCI: 00:08.0: enabled 1
1690 14:51:22.149238 PCI: 00:09.0: enabled 0
1691 14:51:22.152553 PCI: 00:0a.0: enabled 0
1692 14:51:22.155627 PCI: 00:0d.0: enabled 1
1693 14:51:22.158842 PCI: 00:0d.1: enabled 0
1694 14:51:22.158952 PCI: 00:0d.2: enabled 0
1695 14:51:22.162277 PCI: 00:0d.3: enabled 0
1696 14:51:22.165893 PCI: 00:0e.0: enabled 0
1697 14:51:22.165988 PCI: 00:10.2: enabled 1
1698 14:51:22.168733 PCI: 00:10.6: enabled 0
1699 14:51:22.171916 PCI: 00:10.7: enabled 0
1700 14:51:22.175472 PCI: 00:12.0: enabled 0
1701 14:51:22.175551 PCI: 00:12.6: enabled 0
1702 14:51:22.178626 PCI: 00:13.0: enabled 0
1703 14:51:22.182128 PCI: 00:14.0: enabled 1
1704 14:51:22.185289 PCI: 00:14.1: enabled 0
1705 14:51:22.185369 PCI: 00:14.2: enabled 1
1706 14:51:22.188657 PCI: 00:14.3: enabled 1
1707 14:51:22.192131 PCI: 00:15.0: enabled 1
1708 14:51:22.195540 PCI: 00:15.1: enabled 1
1709 14:51:22.195621 PCI: 00:15.2: enabled 1
1710 14:51:22.198814 PCI: 00:15.3: enabled 1
1711 14:51:22.201860 PCI: 00:16.0: enabled 1
1712 14:51:22.205301 PCI: 00:16.1: enabled 0
1713 14:51:22.205415 PCI: 00:16.2: enabled 0
1714 14:51:22.208848 PCI: 00:16.3: enabled 0
1715 14:51:22.211737 PCI: 00:16.4: enabled 0
1716 14:51:22.215088 PCI: 00:16.5: enabled 0
1717 14:51:22.215168 PCI: 00:17.0: enabled 0
1718 14:51:22.218139 PCI: 00:19.0: enabled 0
1719 14:51:22.222058 PCI: 00:19.1: enabled 1
1720 14:51:22.224858 PCI: 00:19.2: enabled 0
1721 14:51:22.224939 PCI: 00:1c.0: enabled 1
1722 14:51:22.228368 PCI: 00:1c.1: enabled 0
1723 14:51:22.231556 PCI: 00:1c.2: enabled 0
1724 14:51:22.231636 PCI: 00:1c.3: enabled 0
1725 14:51:22.234991 PCI: 00:1c.4: enabled 0
1726 14:51:22.238095 PCI: 00:1c.5: enabled 0
1727 14:51:22.241907 PCI: 00:1c.6: enabled 1
1728 14:51:22.241987 PCI: 00:1c.7: enabled 0
1729 14:51:22.244947 PCI: 00:1d.0: enabled 1
1730 14:51:22.248029 PCI: 00:1d.1: enabled 0
1731 14:51:22.251407 PCI: 00:1d.2: enabled 1
1732 14:51:22.251489 PCI: 00:1d.3: enabled 0
1733 14:51:22.254942 PCI: 00:1e.0: enabled 1
1734 14:51:22.258102 PCI: 00:1e.1: enabled 0
1735 14:51:22.261248 PCI: 00:1e.2: enabled 1
1736 14:51:22.261335 PCI: 00:1e.3: enabled 1
1737 14:51:22.264735 PCI: 00:1f.0: enabled 1
1738 14:51:22.267720 PCI: 00:1f.1: enabled 0
1739 14:51:22.271091 PCI: 00:1f.2: enabled 1
1740 14:51:22.271173 PCI: 00:1f.3: enabled 1
1741 14:51:22.274447 PCI: 00:1f.4: enabled 0
1742 14:51:22.277789 PCI: 00:1f.5: enabled 1
1743 14:51:22.280866 PCI: 00:1f.6: enabled 0
1744 14:51:22.280948 PCI: 00:1f.7: enabled 0
1745 14:51:22.284877 APIC: 00: enabled 1
1746 14:51:22.287743 GENERIC: 0.0: enabled 1
1747 14:51:22.287824 GENERIC: 0.0: enabled 1
1748 14:51:22.291117 GENERIC: 1.0: enabled 1
1749 14:51:22.294201 GENERIC: 0.0: enabled 1
1750 14:51:22.297830 GENERIC: 1.0: enabled 1
1751 14:51:22.297911 USB0 port 0: enabled 1
1752 14:51:22.301081 GENERIC: 0.0: enabled 1
1753 14:51:22.304473 USB0 port 0: enabled 1
1754 14:51:22.307125 GENERIC: 0.0: enabled 1
1755 14:51:22.307207 I2C: 00:1a: enabled 1
1756 14:51:22.310622 I2C: 00:31: enabled 1
1757 14:51:22.314096 I2C: 00:32: enabled 1
1758 14:51:22.314178 I2C: 00:10: enabled 1
1759 14:51:22.317456 I2C: 00:15: enabled 1
1760 14:51:22.320932 GENERIC: 0.0: enabled 0
1761 14:51:22.321014 GENERIC: 1.0: enabled 0
1762 14:51:22.323893 GENERIC: 0.0: enabled 1
1763 14:51:22.327208 SPI: 00: enabled 1
1764 14:51:22.327289 SPI: 00: enabled 1
1765 14:51:22.330883 PNP: 0c09.0: enabled 1
1766 14:51:22.333706 GENERIC: 0.0: enabled 1
1767 14:51:22.333788 USB3 port 0: enabled 1
1768 14:51:22.337050 USB3 port 1: enabled 1
1769 14:51:22.340222 USB3 port 2: enabled 0
1770 14:51:22.343694 USB3 port 3: enabled 0
1771 14:51:22.343776 USB2 port 0: enabled 0
1772 14:51:22.347014 USB2 port 1: enabled 1
1773 14:51:22.350312 USB2 port 2: enabled 1
1774 14:51:22.350394 USB2 port 3: enabled 0
1775 14:51:22.353454 USB2 port 4: enabled 1
1776 14:51:22.357105 USB2 port 5: enabled 0
1777 14:51:22.360085 USB2 port 6: enabled 0
1778 14:51:22.360166 USB2 port 7: enabled 0
1779 14:51:22.363960 USB2 port 8: enabled 0
1780 14:51:22.366701 USB2 port 9: enabled 0
1781 14:51:22.366783 USB3 port 0: enabled 0
1782 14:51:22.370201 USB3 port 1: enabled 1
1783 14:51:22.373819 USB3 port 2: enabled 0
1784 14:51:22.376868 USB3 port 3: enabled 0
1785 14:51:22.376949 GENERIC: 0.0: enabled 1
1786 14:51:22.379779 GENERIC: 1.0: enabled 1
1787 14:51:22.383558 APIC: 01: enabled 1
1788 14:51:22.383639 APIC: 07: enabled 1
1789 14:51:22.386379 APIC: 03: enabled 1
1790 14:51:22.389704 APIC: 04: enabled 1
1791 14:51:22.389786 APIC: 06: enabled 1
1792 14:51:22.393051 APIC: 02: enabled 1
1793 14:51:22.393133 APIC: 05: enabled 1
1794 14:51:22.396512 PCI: 01:00.0: enabled 1
1795 14:51:22.402944 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1796 14:51:22.406249 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1797 14:51:22.409578 ELOG: NV offset 0xf30000 size 0x1000
1798 14:51:22.417920 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1799 14:51:22.424195 ELOG: Event(17) added with size 13 at 2023-05-03 14:51:22 UTC
1800 14:51:22.431127 ELOG: Event(92) added with size 9 at 2023-05-03 14:51:22 UTC
1801 14:51:22.437418 ELOG: Event(93) added with size 9 at 2023-05-03 14:51:22 UTC
1802 14:51:22.444524 ELOG: Event(9E) added with size 10 at 2023-05-03 14:51:22 UTC
1803 14:51:22.451017 ELOG: Event(9F) added with size 14 at 2023-05-03 14:51:22 UTC
1804 14:51:22.457913 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1805 14:51:22.463827 ELOG: Event(A1) added with size 10 at 2023-05-03 14:51:22 UTC
1806 14:51:22.470593 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1807 14:51:22.477253 ELOG: Event(A0) added with size 9 at 2023-05-03 14:51:22 UTC
1808 14:51:22.480696 elog_add_boot_reason: Logged dev mode boot
1809 14:51:22.486877 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1810 14:51:22.486960 Finalize devices...
1811 14:51:22.490475 Devices finalized
1812 14:51:22.497172 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1813 14:51:22.500198 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1814 14:51:22.506875 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1815 14:51:22.510145 ME: HFSTS1 : 0x80030055
1816 14:51:22.516895 ME: HFSTS2 : 0x30280116
1817 14:51:22.520034 ME: HFSTS3 : 0x00000050
1818 14:51:22.523495 ME: HFSTS4 : 0x00004000
1819 14:51:22.530044 ME: HFSTS5 : 0x00000000
1820 14:51:22.533239 ME: HFSTS6 : 0x40400006
1821 14:51:22.536922 ME: Manufacturing Mode : YES
1822 14:51:22.539972 ME: SPI Protection Mode Enabled : NO
1823 14:51:22.546772 ME: FW Partition Table : OK
1824 14:51:22.550245 ME: Bringup Loader Failure : NO
1825 14:51:22.553127 ME: Firmware Init Complete : NO
1826 14:51:22.556626 ME: Boot Options Present : NO
1827 14:51:22.559895 ME: Update In Progress : NO
1828 14:51:22.563206 ME: D0i3 Support : YES
1829 14:51:22.566694 ME: Low Power State Enabled : NO
1830 14:51:22.569926 ME: CPU Replaced : YES
1831 14:51:22.576601 ME: CPU Replacement Valid : YES
1832 14:51:22.579695 ME: Current Working State : 5
1833 14:51:22.583010 ME: Current Operation State : 1
1834 14:51:22.586283 ME: Current Operation Mode : 3
1835 14:51:22.589434 ME: Error Code : 0
1836 14:51:22.593052 ME: Enhanced Debug Mode : NO
1837 14:51:22.596234 ME: CPU Debug Disabled : YES
1838 14:51:22.599943 ME: TXT Support : NO
1839 14:51:22.606173 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1840 14:51:22.616155 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1841 14:51:22.619343 CBFS: 'fallback/slic' not found.
1842 14:51:22.622962 ACPI: Writing ACPI tables at 76b01000.
1843 14:51:22.623045 ACPI: * FACS
1844 14:51:22.626147 ACPI: * DSDT
1845 14:51:22.629708 Ramoops buffer: 0x100000@0x76a00000.
1846 14:51:22.632343 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1847 14:51:22.639145 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1848 14:51:22.642540 Google Chrome EC: version:
1849 14:51:22.645534 ro: voema_v2.0.10114-a447f03e46
1850 14:51:22.649101 rw: voema_v2.0.10114-a447f03e46
1851 14:51:22.649183 running image: 2
1852 14:51:22.655323 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1853 14:51:22.660552 ACPI: * FADT
1854 14:51:22.660633 SCI is IRQ9
1855 14:51:22.667417 ACPI: added table 1/32, length now 40
1856 14:51:22.667502 ACPI: * SSDT
1857 14:51:22.670454 Found 1 CPU(s) with 8 core(s) each.
1858 14:51:22.677097 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1859 14:51:22.680475 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1860 14:51:22.683636 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1861 14:51:22.690117 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1862 14:51:22.693434 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1863 14:51:22.700108 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1864 14:51:22.703413 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1865 14:51:22.709881 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1866 14:51:22.716980 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1867 14:51:22.719714 \_SB.PCI0.RP09: Added StorageD3Enable property
1868 14:51:22.726381 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1869 14:51:22.729749 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1870 14:51:22.736528 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1871 14:51:22.739715 PS2K: Passing 80 keymaps to kernel
1872 14:51:22.746317 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1873 14:51:22.753181 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1874 14:51:22.759586 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1875 14:51:22.766585 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1876 14:51:22.772617 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1877 14:51:22.779669 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1878 14:51:22.786053 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1879 14:51:22.792796 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1880 14:51:22.796253 ACPI: added table 2/32, length now 44
1881 14:51:22.799662 ACPI: * MCFG
1882 14:51:22.802388 ACPI: added table 3/32, length now 48
1883 14:51:22.802472 ACPI: * TPM2
1884 14:51:22.806050 TPM2 log created at 0x769f0000
1885 14:51:22.809388 ACPI: added table 4/32, length now 52
1886 14:51:22.812741 ACPI: * MADT
1887 14:51:22.812823 SCI is IRQ9
1888 14:51:22.816134 ACPI: added table 5/32, length now 56
1889 14:51:22.818844 current = 76b09850
1890 14:51:22.822417 ACPI: * DMAR
1891 14:51:22.825333 ACPI: added table 6/32, length now 60
1892 14:51:22.829213 ACPI: added table 7/32, length now 64
1893 14:51:22.829293 ACPI: * HPET
1894 14:51:22.832500 ACPI: added table 8/32, length now 68
1895 14:51:22.835450 ACPI: done.
1896 14:51:22.838766 ACPI tables: 35216 bytes.
1897 14:51:22.842335 smbios_write_tables: 769ef000
1898 14:51:22.845372 EC returned error result code 3
1899 14:51:22.848653 Couldn't obtain OEM name from CBI
1900 14:51:22.852002 Create SMBIOS type 16
1901 14:51:22.855433 Create SMBIOS type 17
1902 14:51:22.855512 GENERIC: 0.0 (WIFI Device)
1903 14:51:22.858589 SMBIOS tables: 1734 bytes.
1904 14:51:22.865046 Writing table forward entry at 0x00000500
1905 14:51:22.868680 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1906 14:51:22.875167 Writing coreboot table at 0x76b25000
1907 14:51:22.878189 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1908 14:51:22.885397 1. 0000000000001000-000000000009ffff: RAM
1909 14:51:22.888075 2. 00000000000a0000-00000000000fffff: RESERVED
1910 14:51:22.891475 3. 0000000000100000-00000000769eefff: RAM
1911 14:51:22.898442 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1912 14:51:22.904632 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1913 14:51:22.911522 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1914 14:51:22.915020 7. 0000000077000000-000000007fbfffff: RESERVED
1915 14:51:22.917931 8. 00000000c0000000-00000000cfffffff: RESERVED
1916 14:51:22.924440 9. 00000000f8000000-00000000f9ffffff: RESERVED
1917 14:51:22.927658 10. 00000000fb000000-00000000fb000fff: RESERVED
1918 14:51:22.934318 11. 00000000fe000000-00000000fe00ffff: RESERVED
1919 14:51:22.937813 12. 00000000fed80000-00000000fed87fff: RESERVED
1920 14:51:22.944185 13. 00000000fed90000-00000000fed92fff: RESERVED
1921 14:51:22.947801 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 14:51:22.954300 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 14:51:22.957610 16. 0000000100000000-00000004803fffff: RAM
1924 14:51:22.961143 Passing 4 GPIOs to payload:
1925 14:51:22.964436 NAME | PORT | POLARITY | VALUE
1926 14:51:22.971143 lid | undefined | high | high
1927 14:51:22.977549 power | undefined | high | low
1928 14:51:22.980650 oprom | undefined | high | low
1929 14:51:22.987485 EC in RW | 0x000000e5 | high | high
1930 14:51:22.994408 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1931 14:51:22.997332 coreboot table: 1576 bytes.
1932 14:51:23.001132 IMD ROOT 0. 0x76fff000 0x00001000
1933 14:51:23.003942 IMD SMALL 1. 0x76ffe000 0x00001000
1934 14:51:23.007824 FSP MEMORY 2. 0x76c4e000 0x003b0000
1935 14:51:23.010400 VPD 3. 0x76c4d000 0x00000367
1936 14:51:23.014130 RO MCACHE 4. 0x76c4c000 0x00000fdc
1937 14:51:23.017166 CONSOLE 5. 0x76c2c000 0x00020000
1938 14:51:23.020745 FMAP 6. 0x76c2b000 0x00000578
1939 14:51:23.027247 TIME STAMP 7. 0x76c2a000 0x00000910
1940 14:51:23.030346 VBOOT WORK 8. 0x76c16000 0x00014000
1941 14:51:23.033930 ROMSTG STCK 9. 0x76c15000 0x00001000
1942 14:51:23.037062 AFTER CAR 10. 0x76c0a000 0x0000b000
1943 14:51:23.040149 RAMSTAGE 11. 0x76b97000 0x00073000
1944 14:51:23.043599 REFCODE 12. 0x76b42000 0x00055000
1945 14:51:23.047083 SMM BACKUP 13. 0x76b32000 0x00010000
1946 14:51:23.053518 4f444749 14. 0x76b30000 0x00002000
1947 14:51:23.056565 EXT VBT15. 0x76b2d000 0x0000219f
1948 14:51:23.059811 COREBOOT 16. 0x76b25000 0x00008000
1949 14:51:23.063026 ACPI 17. 0x76b01000 0x00024000
1950 14:51:23.066935 ACPI GNVS 18. 0x76b00000 0x00001000
1951 14:51:23.069663 RAMOOPS 19. 0x76a00000 0x00100000
1952 14:51:23.073099 TPM2 TCGLOG20. 0x769f0000 0x00010000
1953 14:51:23.076451 SMBIOS 21. 0x769ef000 0x00000800
1954 14:51:23.080045 IMD small region:
1955 14:51:23.083085 IMD ROOT 0. 0x76ffec00 0x00000400
1956 14:51:23.086598 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1957 14:51:23.089751 POWER STATE 2. 0x76ffeb80 0x00000044
1958 14:51:23.096194 ROMSTAGE 3. 0x76ffeb60 0x00000004
1959 14:51:23.099433 MEM INFO 4. 0x76ffe980 0x000001e0
1960 14:51:23.105987 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1961 14:51:23.109657 MTRR: Physical address space:
1962 14:51:23.112530 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1963 14:51:23.119167 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1964 14:51:23.126031 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1965 14:51:23.132672 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1966 14:51:23.139578 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1967 14:51:23.146106 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1968 14:51:23.152229 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1969 14:51:23.155534 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 14:51:23.158901 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 14:51:23.162205 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 14:51:23.168899 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 14:51:23.171887 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 14:51:23.175414 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 14:51:23.178620 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 14:51:23.185123 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 14:51:23.188694 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 14:51:23.191868 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 14:51:23.195118 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 14:51:23.200399 call enable_fixed_mtrr()
1981 14:51:23.203684 CPU physical address size: 39 bits
1982 14:51:23.210164 MTRR: default type WB/UC MTRR counts: 6/7.
1983 14:51:23.213561 MTRR: WB selected as default type.
1984 14:51:23.220467 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 14:51:23.223969 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 14:51:23.229817 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 14:51:23.236322 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1988 14:51:23.243240 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1989 14:51:23.249392 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1990 14:51:23.256613 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 14:51:23.259735 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 14:51:23.263257 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 14:51:23.266628 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 14:51:23.273361 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 14:51:23.276197 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 14:51:23.279842 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 14:51:23.283187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 14:51:23.289692 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 14:51:23.293326 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 14:51:23.296121 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 14:51:23.296193
2002 14:51:23.300439 MTRR check
2003 14:51:23.304023 Fixed MTRRs : Enabled
2004 14:51:23.304097 Variable MTRRs: Enabled
2005 14:51:23.304158
2006 14:51:23.307283 call enable_fixed_mtrr()
2007 14:51:23.310559 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 14:51:23.317141 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 14:51:23.320516 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 14:51:23.323561 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 14:51:23.326999 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 14:51:23.333369 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 14:51:23.336495 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 14:51:23.339709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 14:51:23.342931 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 14:51:23.350304 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 14:51:23.353285 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 14:51:23.356120 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 14:51:23.363636 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 14:51:23.363718 call enable_fixed_mtrr()
2021 14:51:23.370278 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 14:51:23.373441 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 14:51:23.377287 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 14:51:23.380123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 14:51:23.386913 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 14:51:23.390300 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 14:51:23.393354 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 14:51:23.396837 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 14:51:23.403663 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 14:51:23.406992 CPU physical address size: 39 bits
2031 14:51:23.411459 call enable_fixed_mtrr()
2032 14:51:23.414767 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 14:51:23.421221 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 14:51:23.424655 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 14:51:23.427701 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 14:51:23.431128 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 14:51:23.437710 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 14:51:23.440992 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 14:51:23.444404 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 14:51:23.447815 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 14:51:23.454196 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 14:51:23.457390 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 14:51:23.461024 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 14:51:23.468257 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 14:51:23.471360 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 14:51:23.474466 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 14:51:23.477699 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 14:51:23.484607 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 14:51:23.487955 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 14:51:23.490889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 14:51:23.494259 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 14:51:23.500673 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 14:51:23.504102 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 14:51:23.507899 call enable_fixed_mtrr()
2055 14:51:23.510762 call enable_fixed_mtrr()
2056 14:51:23.517647 BS: BS_WRITE_TABLES exit times (exec / console): 49 / 152 ms
2057 14:51:23.520847 CPU physical address size: 39 bits
2058 14:51:23.524187 CPU physical address size: 39 bits
2059 14:51:23.530734 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 14:51:23.534025 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 14:51:23.537260 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 14:51:23.543945 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 14:51:23.546874 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 14:51:23.550997 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 14:51:23.553672 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 14:51:23.560315 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 14:51:23.563343 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 14:51:23.566644 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 14:51:23.570165 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 14:51:23.576516 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 14:51:23.579687 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 14:51:23.586395 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 14:51:23.589283 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 14:51:23.592604 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 14:51:23.596097 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 14:51:23.602522 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 14:51:23.605885 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 14:51:23.609323 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 14:51:23.612565 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 14:51:23.619040 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 14:51:23.622420 call enable_fixed_mtrr()
2082 14:51:23.625446 call enable_fixed_mtrr()
2083 14:51:23.628810 CPU physical address size: 39 bits
2084 14:51:23.632049 CPU physical address size: 39 bits
2085 14:51:23.636447 Checking cr50 for pending updates
2086 14:51:23.639692 CPU physical address size: 39 bits
2087 14:51:23.644480 CPU physical address size: 39 bits
2088 14:51:23.647612 Reading cr50 TPM mode
2089 14:51:23.658416 BS: BS_PAYLOAD_LOAD entry times (exec / console): 128 / 8 ms
2090 14:51:23.668042 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2091 14:51:23.671068 Checking segment from ROM address 0xffc02b38
2092 14:51:23.674463 Checking segment from ROM address 0xffc02b54
2093 14:51:23.681719 Loading segment from ROM address 0xffc02b38
2094 14:51:23.681801 code (compression=0)
2095 14:51:23.690998 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 14:51:23.700828 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 14:51:23.700914 it's not compressed!
2098 14:51:23.842046 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 14:51:23.848433 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 14:51:23.855204 Loading segment from ROM address 0xffc02b54
2101 14:51:23.858625 Entry Point 0x30000000
2102 14:51:23.858725 Loaded segments
2103 14:51:23.865103 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2104 14:51:23.910105 Finalizing chipset.
2105 14:51:23.913384 Finalizing SMM.
2106 14:51:23.913493 APMC done.
2107 14:51:23.919945 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2108 14:51:23.923608 mp_park_aps done after 0 msecs.
2109 14:51:23.926617 Jumping to boot code at 0x30000000(0x76b25000)
2110 14:51:23.936342 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 14:51:23.936425
2112 14:51:23.940072
2113 14:51:23.940153
2114 14:51:23.940505 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2115 14:51:23.940599 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2116 14:51:23.940689 Setting prompt string to ['volteer:']
2117 14:51:23.940770 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2118 14:51:23.943262 Starting depthcharge on Voema...
2119 14:51:23.943344
2120 14:51:23.949643 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 14:51:23.949729
2122 14:51:23.956306 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 14:51:23.956388
2124 14:51:23.963181 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 14:51:23.963263
2126 14:51:23.966296 Failed to find eMMC card reader
2127 14:51:23.966377
2128 14:51:23.969358 Wipe memory regions:
2129 14:51:23.969439
2130 14:51:23.972651 [0x00000000001000, 0x000000000a0000)
2131 14:51:23.972733
2132 14:51:23.976120 [0x00000000100000, 0x00000030000000)
2133 14:51:24.012147
2134 14:51:24.015104 [0x00000032662db0, 0x000000769ef000)
2135 14:51:24.065097
2136 14:51:24.068047 [0x00000100000000, 0x00000480400000)
2137 14:51:24.694676
2138 14:51:24.697805 ec_init: CrosEC protocol v3 supported (256, 256)
2139 14:51:25.128844
2140 14:51:25.128990 R8152: Initializing
2141 14:51:25.129058
2142 14:51:25.132326 Version 6 (ocp_data = 5c30)
2143 14:51:25.132408
2144 14:51:25.135568 R8152: Done initializing
2145 14:51:25.135650
2146 14:51:25.138668 Adding net device
2147 14:51:25.440373
2148 14:51:25.443595 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 14:51:25.443684
2150 14:51:25.443748
2151 14:51:25.443809
2152 14:51:25.446950 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 14:51:25.547322 volteer: tftpboot 192.168.201.1 10185545/tftp-deploy-owh2guv5/kernel/bzImage 10185545/tftp-deploy-owh2guv5/kernel/cmdline 10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
2155 14:51:25.547491 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 14:51:25.547572 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2157 14:51:25.551770 tftpboot 192.168.201.1 10185545/tftp-deploy-owh2guv5/kernel/bzIploy-owh2guv5/kernel/cmdline 10185545/tftp-deploy-owh2guv5/ramdisk/ramdisk.cpio.gz
2158 14:51:25.551856
2159 14:51:25.551922 Waiting for link
2160 14:51:25.754319
2161 14:51:25.754501 done.
2162 14:51:25.754601
2163 14:51:25.754667 MAC: 00:24:32:30:7a:04
2164 14:51:25.754726
2165 14:51:25.757948 Sending DHCP discover... done.
2166 14:51:25.758066
2167 14:51:25.760808 Waiting for reply... done.
2168 14:51:25.760893
2169 14:51:25.764095 Sending DHCP request... done.
2170 14:51:25.764186
2171 14:51:25.869862 Waiting for reply... done.
2172 14:51:25.870016
2173 14:51:25.870085 My ip is 192.168.201.22
2174 14:51:25.870147
2175 14:51:25.876448 The DHCP server ip is 192.168.201.1
2176 14:51:25.876523
2177 14:51:25.879782 TFTP server IP predefined by user: 192.168.201.1
2178 14:51:25.879865
2179 14:51:25.886317 Bootfile predefined by user: 10185545/tftp-deploy-owh2guv5/kernel/bzImage
2180 14:51:25.886399
2181 14:51:25.889380 Sending tftp read request... done.
2182 14:51:25.889505
2183 14:51:25.896081 Waiting for the transfer...
2184 14:51:25.896164
2185 14:51:26.413920 00000000 ################################################################
2186 14:51:26.414058
2187 14:51:26.931210 00080000 ################################################################
2188 14:51:26.931348
2189 14:51:27.459520 00100000 ################################################################
2190 14:51:27.459656
2191 14:51:27.981438 00180000 ################################################################
2192 14:51:27.981600
2193 14:51:28.504098 00200000 ################################################################
2194 14:51:28.504245
2195 14:51:29.142022 00280000 ################################################################
2196 14:51:29.142537
2197 14:51:29.810749 00300000 ################################################################
2198 14:51:29.811294
2199 14:51:30.484479 00380000 ################################################################
2200 14:51:30.485023
2201 14:51:31.146265 00400000 ################################################################
2202 14:51:31.146401
2203 14:51:31.772962 00480000 ################################################################
2204 14:51:31.773490
2205 14:51:32.453388 00500000 ################################################################
2206 14:51:32.454042
2207 14:51:33.070158 00580000 ################################################################
2208 14:51:33.070336
2209 14:51:33.616378 00600000 ################################################################
2210 14:51:33.616540
2211 14:51:34.135251 00680000 ################################################################
2212 14:51:34.135390
2213 14:51:34.677958 00700000 ################################################################
2214 14:51:34.678115
2215 14:51:34.692137 00780000 ## done.
2216 14:51:34.692220
2217 14:51:34.695588 The bootfile was 7876496 bytes long.
2218 14:51:34.695675
2219 14:51:34.698906 Sending tftp read request... done.
2220 14:51:34.698993
2221 14:51:34.701981 Waiting for the transfer...
2222 14:51:34.702073
2223 14:51:35.351966 00000000 ################################################################
2224 14:51:35.352104
2225 14:51:35.947168 00080000 ################################################################
2226 14:51:35.947326
2227 14:51:36.463836 00100000 ################################################################
2228 14:51:36.463982
2229 14:51:36.969826 00180000 ################################################################
2230 14:51:36.969968
2231 14:51:37.490732 00200000 ################################################################
2232 14:51:37.490881
2233 14:51:38.010756 00280000 ################################################################
2234 14:51:38.010906
2235 14:51:38.544640 00300000 ################################################################
2236 14:51:38.544775
2237 14:51:39.072514 00380000 ################################################################
2238 14:51:39.072658
2239 14:51:39.607780 00400000 ################################################################
2240 14:51:39.607927
2241 14:51:40.183047 00480000 ################################################################
2242 14:51:40.183200
2243 14:51:40.805441 00500000 ################################################################
2244 14:51:40.806115
2245 14:51:41.082275 00580000 ############################# done.
2246 14:51:41.082449
2247 14:51:41.085251 Sending tftp read request... done.
2248 14:51:41.085403
2249 14:51:41.088720 Waiting for the transfer...
2250 14:51:41.088845
2251 14:51:41.092273 00000000 # done.
2252 14:51:41.092447
2253 14:51:41.102055 Command line loaded dynamically from TFTP file: 10185545/tftp-deploy-owh2guv5/kernel/cmdline
2254 14:51:41.102610
2255 14:51:41.121719 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185545/extract-nfsrootfs-pr8cljxk,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2256 14:51:41.127724
2257 14:51:41.130460 Shutting down all USB controllers.
2258 14:51:41.130927
2259 14:51:41.131297 Removing current net device
2260 14:51:41.131640
2261 14:51:41.133946 Finalizing coreboot
2262 14:51:41.134453
2263 14:51:41.140609 Exiting depthcharge with code 4 at timestamp: 25775786
2264 14:51:41.141165
2265 14:51:41.141586
2266 14:51:41.141942 Starting kernel ...
2267 14:51:41.142280
2268 14:51:41.143509 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2269 14:51:41.144067 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2270 14:51:41.144542 Setting prompt string to ['Linux version [0-9]']
2271 14:51:41.144927 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2272 14:51:41.145305 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2273 14:51:41.146237
2275 14:56:08.145111 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2277 14:56:08.146240 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2279 14:56:08.147170 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 14:56:08.148769 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 14:56:08.149683 Cleaning after the job
2285 14:56:08.149772 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/ramdisk
2286 14:56:08.150629 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/kernel
2287 14:56:08.151566 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/nfsrootfs
2288 14:56:08.236854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185545/tftp-deploy-owh2guv5/modules
2289 14:56:08.237305 start: 4.1 power-off (timeout 00:00:30) [common]
2290 14:56:08.237506 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2291 14:56:08.315905 >> Command sent successfully.
2292 14:56:08.320532 Returned 0 in 0 seconds
2293 14:56:08.421668 end: 4.1 power-off (duration 00:00:00) [common]
2295 14:56:08.423202 start: 4.2 read-feedback (timeout 00:10:00) [common]
2296 14:56:08.424465 Listened to connection for namespace 'common' for up to 1s
2297 14:56:09.425276 Finalising connection for namespace 'common'
2298 14:56:09.425995 Disconnecting from shell: Finalise
2299 14:56:09.426412
2300 14:56:09.527525 end: 4.2 read-feedback (duration 00:00:01) [common]
2301 14:56:09.528146 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185545
2302 14:56:09.923522 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185545
2303 14:56:09.923719 JobError: Your job cannot terminate cleanly.