Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:53:01.396879 lava-dispatcher, installed at version: 2023.05.1
2 13:53:01.397145 start: 0 validate
3 13:53:01.397290 Start time: 2023-06-06 13:53:01.397283+00:00 (UTC)
4 13:53:01.397439 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:53:01.397578 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 13:53:01.680295 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:53:01.680494 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:53:01.954566 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:53:01.954762 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:53:02.246905 validate duration: 0.85
12 13:53:02.247188 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:53:02.247285 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:53:02.247371 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:53:02.804263 Not decompressing ramdisk as can be used compressed.
16 13:53:02.805133 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 13:53:02.805504 saving as /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/ramdisk/rootfs.cpio.gz
18 13:53:02.805838 total size: 8430069 (8MB)
19 13:53:02.812688 progress 0% (0MB)
20 13:53:02.815187 progress 5% (0MB)
21 13:53:02.817566 progress 10% (0MB)
22 13:53:02.819999 progress 15% (1MB)
23 13:53:02.822344 progress 20% (1MB)
24 13:53:02.824830 progress 25% (2MB)
25 13:53:02.827213 progress 30% (2MB)
26 13:53:02.829583 progress 35% (2MB)
27 13:53:02.831681 progress 40% (3MB)
28 13:53:02.834054 progress 45% (3MB)
29 13:53:02.836440 progress 50% (4MB)
30 13:53:02.839006 progress 55% (4MB)
31 13:53:02.841354 progress 60% (4MB)
32 13:53:02.843796 progress 65% (5MB)
33 13:53:02.846172 progress 70% (5MB)
34 13:53:02.848368 progress 75% (6MB)
35 13:53:02.850663 progress 80% (6MB)
36 13:53:02.853001 progress 85% (6MB)
37 13:53:02.855344 progress 90% (7MB)
38 13:53:02.857728 progress 95% (7MB)
39 13:53:02.860066 progress 100% (8MB)
40 13:53:02.860261 8MB downloaded in 0.05s (147.75MB/s)
41 13:53:02.860448 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:53:02.860739 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:53:02.860858 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:53:02.861003 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:53:02.861174 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:53:02.861248 saving as /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/kernel/bzImage
48 13:53:02.861311 total size: 7880592 (7MB)
49 13:53:02.861373 No compression specified
50 13:53:02.862521 progress 0% (0MB)
51 13:53:02.864761 progress 5% (0MB)
52 13:53:02.866914 progress 10% (0MB)
53 13:53:02.869101 progress 15% (1MB)
54 13:53:02.871194 progress 20% (1MB)
55 13:53:02.873293 progress 25% (1MB)
56 13:53:02.875405 progress 30% (2MB)
57 13:53:02.877494 progress 35% (2MB)
58 13:53:02.879607 progress 40% (3MB)
59 13:53:02.881722 progress 45% (3MB)
60 13:53:02.883833 progress 50% (3MB)
61 13:53:02.885966 progress 55% (4MB)
62 13:53:02.888055 progress 60% (4MB)
63 13:53:02.890079 progress 65% (4MB)
64 13:53:02.892124 progress 70% (5MB)
65 13:53:02.894210 progress 75% (5MB)
66 13:53:02.896287 progress 80% (6MB)
67 13:53:02.898306 progress 85% (6MB)
68 13:53:02.900321 progress 90% (6MB)
69 13:53:02.902415 progress 95% (7MB)
70 13:53:02.904539 progress 100% (7MB)
71 13:53:02.904721 7MB downloaded in 0.04s (173.14MB/s)
72 13:53:02.904867 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:53:02.905097 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:53:02.905188 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:53:02.905276 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:53:02.905412 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:53:02.905481 saving as /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/modules/modules.tar
79 13:53:02.905544 total size: 251288 (0MB)
80 13:53:02.905604 Using unxz to decompress xz
81 13:53:02.909682 progress 13% (0MB)
82 13:53:02.910163 progress 26% (0MB)
83 13:53:02.910450 progress 39% (0MB)
84 13:53:02.911762 progress 52% (0MB)
85 13:53:02.913691 progress 65% (0MB)
86 13:53:02.915791 progress 78% (0MB)
87 13:53:02.917847 progress 91% (0MB)
88 13:53:02.919826 progress 100% (0MB)
89 13:53:02.925650 0MB downloaded in 0.02s (11.93MB/s)
90 13:53:02.925998 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:53:02.926295 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:53:02.926428 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:53:02.926560 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:53:02.926674 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:53:02.926794 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:53:02.927059 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k
98 13:53:02.927201 makedir: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin
99 13:53:02.927316 makedir: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/tests
100 13:53:02.927416 makedir: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/results
101 13:53:02.927530 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-add-keys
102 13:53:02.927712 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-add-sources
103 13:53:02.927854 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-background-process-start
104 13:53:02.928008 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-background-process-stop
105 13:53:02.928132 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-common-functions
106 13:53:02.928270 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-echo-ipv4
107 13:53:02.928399 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-install-packages
108 13:53:02.928523 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-installed-packages
109 13:53:02.928645 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-os-build
110 13:53:02.928768 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-probe-channel
111 13:53:02.928892 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-probe-ip
112 13:53:02.929015 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-target-ip
113 13:53:02.929137 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-target-mac
114 13:53:02.929259 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-target-storage
115 13:53:02.929386 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-case
116 13:53:02.929509 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-event
117 13:53:02.929629 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-feedback
118 13:53:02.929751 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-raise
119 13:53:02.929876 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-reference
120 13:53:02.930003 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-runner
121 13:53:02.930124 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-set
122 13:53:02.930247 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-test-shell
123 13:53:02.930392 Updating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-install-packages (oe)
124 13:53:03.048003 Updating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/bin/lava-installed-packages (oe)
125 13:53:03.095778 Creating /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/environment
126 13:53:03.096056 LAVA metadata
127 13:53:03.096146 - LAVA_JOB_ID=10607088
128 13:53:03.096219 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:53:03.096346 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:53:03.096418 skipped lava-vland-overlay
131 13:53:03.096495 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:53:03.096583 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:53:03.096671 skipped lava-multinode-overlay
134 13:53:03.096763 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:53:03.096847 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:53:03.096928 Loading test definitions
137 13:53:03.097022 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:53:03.097132 Using /lava-10607088 at stage 0
139 13:53:03.097459 uuid=10607088_1.4.2.3.1 testdef=None
140 13:53:03.097549 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:53:03.097638 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:53:03.098216 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:53:03.098449 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:53:03.132738 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:53:03.133017 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:53:03.133627 runner path: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/0/tests/0_dmesg test_uuid 10607088_1.4.2.3.1
149 13:53:03.133788 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:53:03.134021 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:53:03.134095 Using /lava-10607088 at stage 1
153 13:53:03.134411 uuid=10607088_1.4.2.3.5 testdef=None
154 13:53:03.134501 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:53:03.134584 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:53:03.135078 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:53:03.135300 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:53:03.152345 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:53:03.152668 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:53:03.181846 runner path: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/1/tests/1_bootrr test_uuid 10607088_1.4.2.3.5
163 13:53:03.182095 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:53:03.182364 Creating lava-test-runner.conf files
166 13:53:03.182461 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/0 for stage 0
167 13:53:03.182582 - 0_dmesg
168 13:53:03.182692 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607088/lava-overlay-aorkse1k/lava-10607088/1 for stage 1
169 13:53:03.182796 - 1_bootrr
170 13:53:03.182891 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:53:03.182981 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:53:03.191748 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:53:03.191943 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:53:03.192043 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:53:03.192130 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:53:03.192216 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:53:03.441283 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:53:03.441660 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:53:03.441777 extracting modules file /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607088/extract-overlay-ramdisk-bz_bt7ja/ramdisk
180 13:53:03.454968 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:53:03.455148 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:53:03.455249 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607088/compress-overlay-81pybcro/overlay-1.4.2.4.tar.gz to ramdisk
183 13:53:03.455323 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607088/compress-overlay-81pybcro/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607088/extract-overlay-ramdisk-bz_bt7ja/ramdisk
184 13:53:03.464602 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:53:03.464781 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:53:03.464886 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:53:03.464971 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:53:03.465056 Building ramdisk /var/lib/lava/dispatcher/tmp/10607088/extract-overlay-ramdisk-bz_bt7ja/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607088/extract-overlay-ramdisk-bz_bt7ja/ramdisk
189 13:53:03.660700 >> 49790 blocks
190 13:53:04.522918 rename /var/lib/lava/dispatcher/tmp/10607088/extract-overlay-ramdisk-bz_bt7ja/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
191 13:53:04.523356 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:53:04.523490 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:53:04.523595 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:53:04.523696 No mkimage arch provided, not using FIT.
195 13:53:04.523789 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:53:04.523883 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:53:04.523993 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
198 13:53:04.524083 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:53:04.524165 No LXC device requested
200 13:53:04.524247 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:53:04.524338 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:53:04.524419 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:53:04.524494 Checking files for TFTP limit of 4294967296 bytes.
204 13:53:04.524918 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:53:04.525028 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:53:04.525126 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:53:04.525252 substitutions:
208 13:53:04.525321 - {DTB}: None
209 13:53:04.525386 - {INITRD}: 10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
210 13:53:04.525448 - {KERNEL}: 10607088/tftp-deploy-_n6vva71/kernel/bzImage
211 13:53:04.525507 - {LAVA_MAC}: None
212 13:53:04.525565 - {PRESEED_CONFIG}: None
213 13:53:04.525622 - {PRESEED_LOCAL}: None
214 13:53:04.525679 - {RAMDISK}: 10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
215 13:53:04.525736 - {ROOT_PART}: None
216 13:53:04.525792 - {ROOT}: None
217 13:53:04.525847 - {SERVER_IP}: 192.168.201.1
218 13:53:04.525903 - {TEE}: None
219 13:53:04.525958 Parsed boot commands:
220 13:53:04.526014 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:53:04.526199 Parsed boot commands: tftpboot 192.168.201.1 10607088/tftp-deploy-_n6vva71/kernel/bzImage 10607088/tftp-deploy-_n6vva71/kernel/cmdline 10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
222 13:53:04.526289 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:53:04.526375 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:53:04.526473 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:53:04.526561 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:53:04.526633 Not connected, no need to disconnect.
227 13:53:04.526709 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:53:04.526789 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:53:04.526858 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
230 13:53:04.530745 Setting prompt string to ['lava-test: # ']
231 13:53:04.531153 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:53:04.531268 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:53:04.531373 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:53:04.531471 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:53:04.531671 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
236 13:53:09.668614 >> Command sent successfully.
237 13:53:09.671889 Returned 0 in 5 seconds
238 13:53:09.772314 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:53:09.772640 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:53:09.772743 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:53:09.772838 Setting prompt string to 'Starting depthcharge on Voema...'
243 13:53:09.772911 Changing prompt to 'Starting depthcharge on Voema...'
244 13:53:09.772981 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 13:53:09.773262 [Enter `^Ec?' for help]
246 13:53:11.337759
247 13:53:11.338207
248 13:53:11.348161 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 13:53:11.354683 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 13:53:11.358062 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 13:53:11.361434 CPU: AES supported, TXT NOT supported, VT supported
252 13:53:11.368257 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 13:53:11.374549 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 13:53:11.377817 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 13:53:11.381028 VBOOT: Loading verstage.
256 13:53:11.387465 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 13:53:11.390733 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 13:53:11.397630 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 13:53:11.403860 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 13:53:11.410507 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 13:53:11.427502
262 13:53:11.427921
263 13:53:11.428497 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 13:53:11.438998 Probing TPM: . done!
265 13:53:11.442264 TPM ready after 0 ms
266 13:53:11.445808 Connected to device vid:did:rid of 1ae0:0028:00
267 13:53:11.456735 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
268 13:53:11.463277 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 13:53:11.466571 Initialized TPM device CR50 revision 0
270 13:53:11.529099 tlcl_send_startup: Startup return code is 0
271 13:53:11.529597 TPM: setup succeeded
272 13:53:11.544657 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 13:53:11.558694 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 13:53:11.572652 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 13:53:11.582743 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 13:53:11.586883 Chrome EC: UHEPI supported
277 13:53:11.589469 Phase 1
278 13:53:11.593017 FMAP: area GBB found @ 1805000 (458752 bytes)
279 13:53:11.602481 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 13:53:11.609280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 13:53:11.615920 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 13:53:11.622317 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 13:53:11.625727 Recovery requested (1009000e)
284 13:53:11.629324 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 13:53:11.640995 tlcl_extend: response is 0
286 13:53:11.647304 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 13:53:11.657423 tlcl_extend: response is 0
288 13:53:11.663784 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 13:53:11.671010 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 13:53:11.677558 BS: verstage times (exec / console): total (unknown) / 142 ms
291 13:53:11.678055
292 13:53:11.678436
293 13:53:11.690870 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 13:53:11.697591 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 13:53:11.700966 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 13:53:11.704022 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 13:53:11.710322 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 13:53:11.713779 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 13:53:11.717074 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 13:53:11.720942 TCO_STS: 0000 0000
301 13:53:11.723953 GEN_PMCON: d0015038 00002200
302 13:53:11.726933 GBLRST_CAUSE: 00000000 00000000
303 13:53:11.730834 HPR_CAUSE0: 00000000
304 13:53:11.731290 prev_sleep_state 5
305 13:53:11.733901 Boot Count incremented to 19890
306 13:53:11.740198 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 13:53:11.746882 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 13:53:11.757048 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 13:53:11.763661 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 13:53:11.767034 Chrome EC: UHEPI supported
311 13:53:11.773236 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 13:53:11.784685 Probing TPM: done!
313 13:53:11.791057 Connected to device vid:did:rid of 1ae0:0028:00
314 13:53:11.801164 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
315 13:53:11.804513 Initialized TPM device CR50 revision 0
316 13:53:11.819716 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 13:53:11.826091 MRC: Hash idx 0x100b comparison successful.
318 13:53:11.829076 MRC cache found, size faa8
319 13:53:11.829249 bootmode is set to: 2
320 13:53:11.832790 SPD index = 0
321 13:53:11.839470 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 13:53:11.842419 SPD: module type is LPDDR4X
323 13:53:11.845865 SPD: module part number is MT53E512M64D4NW-046
324 13:53:11.852378 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 13:53:11.855604 SPD: device width 16 bits, bus width 16 bits
326 13:53:11.862686 SPD: module size is 1024 MB (per channel)
327 13:53:12.294510 CBMEM:
328 13:53:12.297702 IMD: root @ 0x76fff000 254 entries.
329 13:53:12.301100 IMD: root @ 0x76ffec00 62 entries.
330 13:53:12.304536 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 13:53:12.310994 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 13:53:12.314546 External stage cache:
333 13:53:12.317857 IMD: root @ 0x7b3ff000 254 entries.
334 13:53:12.320626 IMD: root @ 0x7b3fec00 62 entries.
335 13:53:12.336550 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 13:53:12.343099 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 13:53:12.349554 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 13:53:12.364591 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 13:53:12.367404 cse_lite: Skip switching to RW in the recovery path
340 13:53:12.371240 8 DIMMs found
341 13:53:12.371326 SMM Memory Map
342 13:53:12.374197 SMRAM : 0x7b000000 0x800000
343 13:53:12.377526 Subregion 0: 0x7b000000 0x200000
344 13:53:12.380775 Subregion 1: 0x7b200000 0x200000
345 13:53:12.384172 Subregion 2: 0x7b400000 0x400000
346 13:53:12.387488 top_of_ram = 0x77000000
347 13:53:12.394284 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 13:53:12.397521 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 13:53:12.404276 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 13:53:12.410826 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 13:53:12.417296 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 13:53:12.424082 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 13:53:12.433905 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 13:53:12.436751 Processing 211 relocs. Offset value of 0x74c0b000
355 13:53:12.446294 BS: romstage times (exec / console): total (unknown) / 277 ms
356 13:53:12.452600
357 13:53:12.452739
358 13:53:12.462649 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 13:53:12.465812 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 13:53:12.475601 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 13:53:12.482546 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 13:53:12.489219 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 13:53:12.495340 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 13:53:12.542564 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 13:53:12.549214 Processing 5008 relocs. Offset value of 0x75d98000
366 13:53:12.553091 BS: postcar times (exec / console): total (unknown) / 59 ms
367 13:53:12.553179
368 13:53:12.553247
369 13:53:12.565908 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 13:53:12.566074 Normal boot
371 13:53:12.569740 FW_CONFIG value is 0x804c02
372 13:53:12.572945 PCI: 00:07.0 disabled by fw_config
373 13:53:12.576413 PCI: 00:07.1 disabled by fw_config
374 13:53:12.579494 PCI: 00:0d.2 disabled by fw_config
375 13:53:12.582710 PCI: 00:1c.7 disabled by fw_config
376 13:53:12.589298 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 13:53:12.595727 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 13:53:12.599025 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 13:53:12.603097 GENERIC: 0.0 disabled by fw_config
380 13:53:12.606215 GENERIC: 1.0 disabled by fw_config
381 13:53:12.612546 fw_config match found: DB_USB=USB3_ACTIVE
382 13:53:12.615826 fw_config match found: DB_USB=USB3_ACTIVE
383 13:53:12.619138 fw_config match found: DB_USB=USB3_ACTIVE
384 13:53:12.622571 fw_config match found: DB_USB=USB3_ACTIVE
385 13:53:12.628956 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 13:53:12.635997 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 13:53:12.645493 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 13:53:12.652217 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 13:53:12.655550 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 13:53:12.661901 microcode: Update skipped, already up-to-date
391 13:53:12.668984 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 13:53:12.696386 Detected 4 core, 8 thread CPU.
393 13:53:12.699280 Setting up SMI for CPU
394 13:53:12.703074 IED base = 0x7b400000
395 13:53:12.703234 IED size = 0x00400000
396 13:53:12.706319 Will perform SMM setup.
397 13:53:12.712969 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 13:53:12.719200 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 13:53:12.726179 Processing 16 relocs. Offset value of 0x00030000
400 13:53:12.729570 Attempting to start 7 APs
401 13:53:12.732832 Waiting for 10ms after sending INIT.
402 13:53:12.748163 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 13:53:12.748294 done.
404 13:53:12.751321 AP: slot 5 apic_id 4.
405 13:53:12.754813 AP: slot 4 apic_id 5.
406 13:53:12.754899 AP: slot 7 apic_id 6.
407 13:53:12.758121 AP: slot 3 apic_id 7.
408 13:53:12.761463 Waiting for 2nd SIPI to complete...done.
409 13:53:12.765414 AP: slot 2 apic_id 3.
410 13:53:12.768528 AP: slot 6 apic_id 2.
411 13:53:12.774850 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 13:53:12.781419 Processing 13 relocs. Offset value of 0x00038000
413 13:53:12.781550 Unable to locate Global NVS
414 13:53:12.791442 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 13:53:12.794749 Installing permanent SMM handler to 0x7b000000
416 13:53:12.804718 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 13:53:12.807974 Processing 794 relocs. Offset value of 0x7b010000
418 13:53:12.818098 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 13:53:12.821285 Processing 13 relocs. Offset value of 0x7b008000
420 13:53:12.827855 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 13:53:12.834617 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 13:53:12.837886 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 13:53:12.844413 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 13:53:12.850923 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 13:53:12.857676 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 13:53:12.864319 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 13:53:12.864495 Unable to locate Global NVS
428 13:53:12.874153 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 13:53:12.877418 Clearing SMI status registers
430 13:53:12.877648 SMI_STS: PM1
431 13:53:12.880652 PM1_STS: PWRBTN
432 13:53:12.887199 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 13:53:12.890598 In relocation handler: CPU 0
434 13:53:12.893719 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 13:53:12.900597 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 13:53:12.900688 Relocation complete.
437 13:53:12.910281 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 13:53:12.914322 In relocation handler: CPU 1
439 13:53:12.917015 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 13:53:12.917111 Relocation complete.
441 13:53:12.926963 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 13:53:12.927119 In relocation handler: CPU 6
443 13:53:12.933723 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 13:53:12.937372 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 13:53:12.940627 Relocation complete.
446 13:53:12.947292 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 13:53:12.950628 In relocation handler: CPU 2
448 13:53:12.954018 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 13:53:12.957256 Relocation complete.
450 13:53:12.963546 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
451 13:53:12.966834 In relocation handler: CPU 7
452 13:53:12.970273 New SMBASE=0x7affe400 IEDBASE=0x7b400000
453 13:53:12.976853 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 13:53:12.977162 Relocation complete.
455 13:53:12.983619 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 13:53:12.986420 In relocation handler: CPU 3
457 13:53:12.993399 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 13:53:12.993570 Relocation complete.
459 13:53:12.999771 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 13:53:13.003145 In relocation handler: CPU 4
461 13:53:13.009878 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 13:53:13.010058 Relocation complete.
463 13:53:13.016498 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
464 13:53:13.020501 In relocation handler: CPU 5
465 13:53:13.024401 New SMBASE=0x7affec00 IEDBASE=0x7b400000
466 13:53:13.031075 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 13:53:13.031208 Relocation complete.
468 13:53:13.034505 Initializing CPU #0
469 13:53:13.037755 CPU: vendor Intel device 806c1
470 13:53:13.040750 CPU: family 06, model 8c, stepping 01
471 13:53:13.044520 Clearing out pending MCEs
472 13:53:13.047849 Setting up local APIC...
473 13:53:13.047967 apic_id: 0x00 done.
474 13:53:13.051008 Turbo is available but hidden
475 13:53:13.054337 Turbo is available and visible
476 13:53:13.061145 microcode: Update skipped, already up-to-date
477 13:53:13.061277 CPU #0 initialized
478 13:53:13.064355 Initializing CPU #2
479 13:53:13.067721 Initializing CPU #6
480 13:53:13.067945 CPU: vendor Intel device 806c1
481 13:53:13.073836 CPU: family 06, model 8c, stepping 01
482 13:53:13.077784 CPU: vendor Intel device 806c1
483 13:53:13.080855 CPU: family 06, model 8c, stepping 01
484 13:53:13.081018 Initializing CPU #1
485 13:53:13.083995 Clearing out pending MCEs
486 13:53:13.087304 Clearing out pending MCEs
487 13:53:13.090623 Setting up local APIC...
488 13:53:13.090809 Initializing CPU #3
489 13:53:13.093741 Initializing CPU #7
490 13:53:13.097506 CPU: vendor Intel device 806c1
491 13:53:13.100665 CPU: family 06, model 8c, stepping 01
492 13:53:13.103853 CPU: vendor Intel device 806c1
493 13:53:13.107031 CPU: family 06, model 8c, stepping 01
494 13:53:13.110412 Clearing out pending MCEs
495 13:53:13.113915 Clearing out pending MCEs
496 13:53:13.114145 Setting up local APIC...
497 13:53:13.117301 Initializing CPU #5
498 13:53:13.120713 Initializing CPU #4
499 13:53:13.124022 CPU: vendor Intel device 806c1
500 13:53:13.127400 CPU: family 06, model 8c, stepping 01
501 13:53:13.130603 CPU: vendor Intel device 806c1
502 13:53:13.134009 CPU: family 06, model 8c, stepping 01
503 13:53:13.137366 Clearing out pending MCEs
504 13:53:13.137452 Clearing out pending MCEs
505 13:53:13.140858 apic_id: 0x03 done.
506 13:53:13.143888 Setting up local APIC...
507 13:53:13.147271 Setting up local APIC...
508 13:53:13.147356 Setting up local APIC...
509 13:53:13.150310 apic_id: 0x06 done.
510 13:53:13.153598 apic_id: 0x07 done.
511 13:53:13.156937 microcode: Update skipped, already up-to-date
512 13:53:13.160231 microcode: Update skipped, already up-to-date
513 13:53:13.163576 CPU #7 initialized
514 13:53:13.167003 CPU #3 initialized
515 13:53:13.167083 Setting up local APIC...
516 13:53:13.170374 apic_id: 0x02 done.
517 13:53:13.173613 microcode: Update skipped, already up-to-date
518 13:53:13.180339 microcode: Update skipped, already up-to-date
519 13:53:13.180427 CPU #2 initialized
520 13:53:13.183538 CPU #6 initialized
521 13:53:13.186863 CPU: vendor Intel device 806c1
522 13:53:13.190013 CPU: family 06, model 8c, stepping 01
523 13:53:13.193356 Clearing out pending MCEs
524 13:53:13.193442 apic_id: 0x04 done.
525 13:53:13.196815 apic_id: 0x05 done.
526 13:53:13.203714 microcode: Update skipped, already up-to-date
527 13:53:13.207091 microcode: Update skipped, already up-to-date
528 13:53:13.207201 CPU #5 initialized
529 13:53:13.210094 CPU #4 initialized
530 13:53:13.213394 Setting up local APIC...
531 13:53:13.217118 apic_id: 0x01 done.
532 13:53:13.220200 microcode: Update skipped, already up-to-date
533 13:53:13.223605 CPU #1 initialized
534 13:53:13.226940 bsp_do_flight_plan done after 459 msecs.
535 13:53:13.229771 CPU: frequency set to 4000 MHz
536 13:53:13.229867 Enabling SMIs.
537 13:53:13.236311 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 13:53:13.253321 SATAXPCIE1 indicates PCIe NVMe is present
539 13:53:13.256787 Probing TPM: done!
540 13:53:13.260316 Connected to device vid:did:rid of 1ae0:0028:00
541 13:53:13.270343 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
542 13:53:13.274148 Initialized TPM device CR50 revision 0
543 13:53:13.277362 Enabling S0i3.4
544 13:53:13.284082 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 13:53:13.287422 Found a VBT of 8704 bytes after decompression
546 13:53:13.293609 cse_lite: CSE RO boot. HybridStorageMode disabled
547 13:53:13.300148 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 13:53:13.376807 FSPS returned 0
549 13:53:13.380096 Executing Phase 1 of FspMultiPhaseSiInit
550 13:53:13.390058 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 13:53:13.393377 port C0 DISC req: usage 1 usb3 1 usb2 5
552 13:53:13.396395 Raw Buffer output 0 00000511
553 13:53:13.399539 Raw Buffer output 1 00000000
554 13:53:13.403482 pmc_send_ipc_cmd succeeded
555 13:53:13.410271 port C1 DISC req: usage 1 usb3 2 usb2 3
556 13:53:13.410403 Raw Buffer output 0 00000321
557 13:53:13.413594 Raw Buffer output 1 00000000
558 13:53:13.417334 pmc_send_ipc_cmd succeeded
559 13:53:13.422660 Detected 4 core, 8 thread CPU.
560 13:53:13.425605 Detected 4 core, 8 thread CPU.
561 13:53:13.659776 Display FSP Version Info HOB
562 13:53:13.663320 Reference Code - CPU = a.0.4c.31
563 13:53:13.666435 uCode Version = 0.0.0.86
564 13:53:13.669866 TXT ACM version = ff.ff.ff.ffff
565 13:53:13.673067 Reference Code - ME = a.0.4c.31
566 13:53:13.676363 MEBx version = 0.0.0.0
567 13:53:13.679552 ME Firmware Version = Consumer SKU
568 13:53:13.683403 Reference Code - PCH = a.0.4c.31
569 13:53:13.686199 PCH-CRID Status = Disabled
570 13:53:13.689634 PCH-CRID Original Value = ff.ff.ff.ffff
571 13:53:13.693110 PCH-CRID New Value = ff.ff.ff.ffff
572 13:53:13.696268 OPROM - RST - RAID = ff.ff.ff.ffff
573 13:53:13.699627 PCH Hsio Version = 4.0.0.0
574 13:53:13.702927 Reference Code - SA - System Agent = a.0.4c.31
575 13:53:13.706635 Reference Code - MRC = 2.0.0.1
576 13:53:13.709854 SA - PCIe Version = a.0.4c.31
577 13:53:13.712966 SA-CRID Status = Disabled
578 13:53:13.716565 SA-CRID Original Value = 0.0.0.1
579 13:53:13.719701 SA-CRID New Value = 0.0.0.1
580 13:53:13.722908 OPROM - VBIOS = ff.ff.ff.ffff
581 13:53:13.726687 IO Manageability Engine FW Version = 11.1.4.0
582 13:53:13.729943 PHY Build Version = 0.0.0.e0
583 13:53:13.733436 Thunderbolt(TM) FW Version = 0.0.0.0
584 13:53:13.739588 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 13:53:13.742810 ITSS IRQ Polarities Before:
586 13:53:13.742954 IPC0: 0xffffffff
587 13:53:13.746104 IPC1: 0xffffffff
588 13:53:13.746212 IPC2: 0xffffffff
589 13:53:13.749543 IPC3: 0xffffffff
590 13:53:13.752924 ITSS IRQ Polarities After:
591 13:53:13.753059 IPC0: 0xffffffff
592 13:53:13.756120 IPC1: 0xffffffff
593 13:53:13.756247 IPC2: 0xffffffff
594 13:53:13.759552 IPC3: 0xffffffff
595 13:53:13.762736 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 13:53:13.776162 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 13:53:13.786036 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 13:53:13.799197 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 13:53:13.805931 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
600 13:53:13.809411 Enumerating buses...
601 13:53:13.812452 Show all devs... Before device enumeration.
602 13:53:13.816199 Root Device: enabled 1
603 13:53:13.816290 DOMAIN: 0000: enabled 1
604 13:53:13.819382 CPU_CLUSTER: 0: enabled 1
605 13:53:13.822648 PCI: 00:00.0: enabled 1
606 13:53:13.825917 PCI: 00:02.0: enabled 1
607 13:53:13.826007 PCI: 00:04.0: enabled 1
608 13:53:13.829224 PCI: 00:05.0: enabled 1
609 13:53:13.832547 PCI: 00:06.0: enabled 0
610 13:53:13.832632 PCI: 00:07.0: enabled 0
611 13:53:13.835896 PCI: 00:07.1: enabled 0
612 13:53:13.839043 PCI: 00:07.2: enabled 0
613 13:53:13.842363 PCI: 00:07.3: enabled 0
614 13:53:13.842448 PCI: 00:08.0: enabled 1
615 13:53:13.845953 PCI: 00:09.0: enabled 0
616 13:53:13.849354 PCI: 00:0a.0: enabled 0
617 13:53:13.852555 PCI: 00:0d.0: enabled 1
618 13:53:13.852639 PCI: 00:0d.1: enabled 0
619 13:53:13.856130 PCI: 00:0d.2: enabled 0
620 13:53:13.859570 PCI: 00:0d.3: enabled 0
621 13:53:13.862700 PCI: 00:0e.0: enabled 0
622 13:53:13.862785 PCI: 00:10.2: enabled 1
623 13:53:13.865966 PCI: 00:10.6: enabled 0
624 13:53:13.869330 PCI: 00:10.7: enabled 0
625 13:53:13.872601 PCI: 00:12.0: enabled 0
626 13:53:13.872685 PCI: 00:12.6: enabled 0
627 13:53:13.876043 PCI: 00:13.0: enabled 0
628 13:53:13.879404 PCI: 00:14.0: enabled 1
629 13:53:13.879490 PCI: 00:14.1: enabled 0
630 13:53:13.882829 PCI: 00:14.2: enabled 1
631 13:53:13.885569 PCI: 00:14.3: enabled 1
632 13:53:13.889191 PCI: 00:15.0: enabled 1
633 13:53:13.889285 PCI: 00:15.1: enabled 1
634 13:53:13.892447 PCI: 00:15.2: enabled 1
635 13:53:13.895800 PCI: 00:15.3: enabled 1
636 13:53:13.899275 PCI: 00:16.0: enabled 1
637 13:53:13.899359 PCI: 00:16.1: enabled 0
638 13:53:13.902561 PCI: 00:16.2: enabled 0
639 13:53:13.905440 PCI: 00:16.3: enabled 0
640 13:53:13.908795 PCI: 00:16.4: enabled 0
641 13:53:13.908879 PCI: 00:16.5: enabled 0
642 13:53:13.912726 PCI: 00:17.0: enabled 1
643 13:53:13.915691 PCI: 00:19.0: enabled 0
644 13:53:13.915803 PCI: 00:19.1: enabled 1
645 13:53:13.918772 PCI: 00:19.2: enabled 0
646 13:53:13.922021 PCI: 00:1c.0: enabled 1
647 13:53:13.925823 PCI: 00:1c.1: enabled 0
648 13:53:13.925908 PCI: 00:1c.2: enabled 0
649 13:53:13.929121 PCI: 00:1c.3: enabled 0
650 13:53:13.932041 PCI: 00:1c.4: enabled 0
651 13:53:13.935776 PCI: 00:1c.5: enabled 0
652 13:53:13.935905 PCI: 00:1c.6: enabled 1
653 13:53:13.939272 PCI: 00:1c.7: enabled 0
654 13:53:13.942407 PCI: 00:1d.0: enabled 1
655 13:53:13.945461 PCI: 00:1d.1: enabled 0
656 13:53:13.945557 PCI: 00:1d.2: enabled 1
657 13:53:13.949093 PCI: 00:1d.3: enabled 0
658 13:53:13.952264 PCI: 00:1e.0: enabled 1
659 13:53:13.952362 PCI: 00:1e.1: enabled 0
660 13:53:13.955554 PCI: 00:1e.2: enabled 1
661 13:53:13.958901 PCI: 00:1e.3: enabled 1
662 13:53:13.962249 PCI: 00:1f.0: enabled 1
663 13:53:13.962342 PCI: 00:1f.1: enabled 0
664 13:53:13.965674 PCI: 00:1f.2: enabled 1
665 13:53:13.969026 PCI: 00:1f.3: enabled 1
666 13:53:13.972377 PCI: 00:1f.4: enabled 0
667 13:53:13.972461 PCI: 00:1f.5: enabled 1
668 13:53:13.975869 PCI: 00:1f.6: enabled 0
669 13:53:13.978958 PCI: 00:1f.7: enabled 0
670 13:53:13.979056 APIC: 00: enabled 1
671 13:53:13.982329 GENERIC: 0.0: enabled 1
672 13:53:13.985618 GENERIC: 0.0: enabled 1
673 13:53:13.988863 GENERIC: 1.0: enabled 1
674 13:53:13.988964 GENERIC: 0.0: enabled 1
675 13:53:13.992080 GENERIC: 1.0: enabled 1
676 13:53:13.995334 USB0 port 0: enabled 1
677 13:53:13.998690 GENERIC: 0.0: enabled 1
678 13:53:13.998773 USB0 port 0: enabled 1
679 13:53:14.002031 GENERIC: 0.0: enabled 1
680 13:53:14.005408 I2C: 00:1a: enabled 1
681 13:53:14.005491 I2C: 00:31: enabled 1
682 13:53:14.008765 I2C: 00:32: enabled 1
683 13:53:14.012031 I2C: 00:10: enabled 1
684 13:53:14.012114 I2C: 00:15: enabled 1
685 13:53:14.015394 GENERIC: 0.0: enabled 0
686 13:53:14.018519 GENERIC: 1.0: enabled 0
687 13:53:14.022156 GENERIC: 0.0: enabled 1
688 13:53:14.022239 SPI: 00: enabled 1
689 13:53:14.025265 SPI: 00: enabled 1
690 13:53:14.028409 PNP: 0c09.0: enabled 1
691 13:53:14.028517 GENERIC: 0.0: enabled 1
692 13:53:14.031708 USB3 port 0: enabled 1
693 13:53:14.034873 USB3 port 1: enabled 1
694 13:53:14.034961 USB3 port 2: enabled 0
695 13:53:14.038334 USB3 port 3: enabled 0
696 13:53:14.041561 USB2 port 0: enabled 0
697 13:53:14.044941 USB2 port 1: enabled 1
698 13:53:14.045024 USB2 port 2: enabled 1
699 13:53:14.048554 USB2 port 3: enabled 0
700 13:53:14.051839 USB2 port 4: enabled 1
701 13:53:14.051959 USB2 port 5: enabled 0
702 13:53:14.054873 USB2 port 6: enabled 0
703 13:53:14.058398 USB2 port 7: enabled 0
704 13:53:14.061526 USB2 port 8: enabled 0
705 13:53:14.061610 USB2 port 9: enabled 0
706 13:53:14.064709 USB3 port 0: enabled 0
707 13:53:14.068053 USB3 port 1: enabled 1
708 13:53:14.068137 USB3 port 2: enabled 0
709 13:53:14.071287 USB3 port 3: enabled 0
710 13:53:14.074573 GENERIC: 0.0: enabled 1
711 13:53:14.077954 GENERIC: 1.0: enabled 1
712 13:53:14.078038 APIC: 01: enabled 1
713 13:53:14.081349 APIC: 03: enabled 1
714 13:53:14.081433 APIC: 07: enabled 1
715 13:53:14.084882 APIC: 05: enabled 1
716 13:53:14.088150 APIC: 04: enabled 1
717 13:53:14.088234 APIC: 02: enabled 1
718 13:53:14.091445 APIC: 06: enabled 1
719 13:53:14.094716 Compare with tree...
720 13:53:14.094800 Root Device: enabled 1
721 13:53:14.097919 DOMAIN: 0000: enabled 1
722 13:53:14.101244 PCI: 00:00.0: enabled 1
723 13:53:14.104608 PCI: 00:02.0: enabled 1
724 13:53:14.104714 PCI: 00:04.0: enabled 1
725 13:53:14.107875 GENERIC: 0.0: enabled 1
726 13:53:14.111220 PCI: 00:05.0: enabled 1
727 13:53:14.114491 PCI: 00:06.0: enabled 0
728 13:53:14.117807 PCI: 00:07.0: enabled 0
729 13:53:14.117891 GENERIC: 0.0: enabled 1
730 13:53:14.121159 PCI: 00:07.1: enabled 0
731 13:53:14.124677 GENERIC: 1.0: enabled 1
732 13:53:14.127824 PCI: 00:07.2: enabled 0
733 13:53:14.130954 GENERIC: 0.0: enabled 1
734 13:53:14.131038 PCI: 00:07.3: enabled 0
735 13:53:14.134463 GENERIC: 1.0: enabled 1
736 13:53:14.137908 PCI: 00:08.0: enabled 1
737 13:53:14.141084 PCI: 00:09.0: enabled 0
738 13:53:14.144330 PCI: 00:0a.0: enabled 0
739 13:53:14.144414 PCI: 00:0d.0: enabled 1
740 13:53:14.147536 USB0 port 0: enabled 1
741 13:53:14.151263 USB3 port 0: enabled 1
742 13:53:14.154482 USB3 port 1: enabled 1
743 13:53:14.157544 USB3 port 2: enabled 0
744 13:53:14.160694 USB3 port 3: enabled 0
745 13:53:14.160778 PCI: 00:0d.1: enabled 0
746 13:53:14.163995 PCI: 00:0d.2: enabled 0
747 13:53:14.167359 GENERIC: 0.0: enabled 1
748 13:53:14.170580 PCI: 00:0d.3: enabled 0
749 13:53:14.173950 PCI: 00:0e.0: enabled 0
750 13:53:14.174034 PCI: 00:10.2: enabled 1
751 13:53:14.177371 PCI: 00:10.6: enabled 0
752 13:53:14.180743 PCI: 00:10.7: enabled 0
753 13:53:14.183988 PCI: 00:12.0: enabled 0
754 13:53:14.187333 PCI: 00:12.6: enabled 0
755 13:53:14.187416 PCI: 00:13.0: enabled 0
756 13:53:14.190597 PCI: 00:14.0: enabled 1
757 13:53:14.193878 USB0 port 0: enabled 1
758 13:53:14.197252 USB2 port 0: enabled 0
759 13:53:14.200447 USB2 port 1: enabled 1
760 13:53:14.200532 USB2 port 2: enabled 1
761 13:53:14.204212 USB2 port 3: enabled 0
762 13:53:14.206941 USB2 port 4: enabled 1
763 13:53:14.210296 USB2 port 5: enabled 0
764 13:53:14.213713 USB2 port 6: enabled 0
765 13:53:14.216994 USB2 port 7: enabled 0
766 13:53:14.217077 USB2 port 8: enabled 0
767 13:53:14.220453 USB2 port 9: enabled 0
768 13:53:14.223613 USB3 port 0: enabled 0
769 13:53:14.227013 USB3 port 1: enabled 1
770 13:53:14.230491 USB3 port 2: enabled 0
771 13:53:14.233786 USB3 port 3: enabled 0
772 13:53:14.233870 PCI: 00:14.1: enabled 0
773 13:53:14.236878 PCI: 00:14.2: enabled 1
774 13:53:14.240679 PCI: 00:14.3: enabled 1
775 13:53:14.243762 GENERIC: 0.0: enabled 1
776 13:53:14.246948 PCI: 00:15.0: enabled 1
777 13:53:14.247033 I2C: 00:1a: enabled 1
778 13:53:14.250424 I2C: 00:31: enabled 1
779 13:53:14.253717 I2C: 00:32: enabled 1
780 13:53:14.256902 PCI: 00:15.1: enabled 1
781 13:53:14.256986 I2C: 00:10: enabled 1
782 13:53:14.260115 PCI: 00:15.2: enabled 1
783 13:53:14.264269 PCI: 00:15.3: enabled 1
784 13:53:14.267605 PCI: 00:16.0: enabled 1
785 13:53:14.267689 PCI: 00:16.1: enabled 0
786 13:53:14.271476 PCI: 00:16.2: enabled 0
787 13:53:14.274821 PCI: 00:16.3: enabled 0
788 13:53:14.278092 PCI: 00:16.4: enabled 0
789 13:53:14.278176 PCI: 00:16.5: enabled 0
790 13:53:14.281445 PCI: 00:17.0: enabled 1
791 13:53:14.284801 PCI: 00:19.0: enabled 0
792 13:53:14.287964 PCI: 00:19.1: enabled 1
793 13:53:14.338129 I2C: 00:15: enabled 1
794 13:53:14.338240 PCI: 00:19.2: enabled 0
795 13:53:14.338314 PCI: 00:1d.0: enabled 1
796 13:53:14.338562 GENERIC: 0.0: enabled 1
797 13:53:14.338631 PCI: 00:1e.0: enabled 1
798 13:53:14.338693 PCI: 00:1e.1: enabled 0
799 13:53:14.338752 PCI: 00:1e.2: enabled 1
800 13:53:14.338811 SPI: 00: enabled 1
801 13:53:14.339168 PCI: 00:1e.3: enabled 1
802 13:53:14.339282 SPI: 00: enabled 1
803 13:53:14.339565 PCI: 00:1f.0: enabled 1
804 13:53:14.339639 PNP: 0c09.0: enabled 1
805 13:53:14.339737 PCI: 00:1f.1: enabled 0
806 13:53:14.339835 PCI: 00:1f.2: enabled 1
807 13:53:14.339947 GENERIC: 0.0: enabled 1
808 13:53:14.340023 GENERIC: 0.0: enabled 1
809 13:53:14.340119 GENERIC: 1.0: enabled 1
810 13:53:14.340230 PCI: 00:1f.3: enabled 1
811 13:53:14.340326 PCI: 00:1f.4: enabled 0
812 13:53:14.375969 PCI: 00:1f.5: enabled 1
813 13:53:14.376070 PCI: 00:1f.6: enabled 0
814 13:53:14.376159 PCI: 00:1f.7: enabled 0
815 13:53:14.376422 CPU_CLUSTER: 0: enabled 1
816 13:53:14.376496 APIC: 00: enabled 1
817 13:53:14.376592 APIC: 01: enabled 1
818 13:53:14.376701 APIC: 03: enabled 1
819 13:53:14.376778 APIC: 07: enabled 1
820 13:53:14.376890 APIC: 05: enabled 1
821 13:53:14.376985 APIC: 04: enabled 1
822 13:53:14.377081 APIC: 02: enabled 1
823 13:53:14.377176 APIC: 06: enabled 1
824 13:53:14.377270 Root Device scanning...
825 13:53:14.380189 scan_static_bus for Root Device
826 13:53:14.380274 DOMAIN: 0000 enabled
827 13:53:14.380359 CPU_CLUSTER: 0 enabled
828 13:53:14.382988 DOMAIN: 0000 scanning...
829 13:53:14.383073 PCI: pci_scan_bus for bus 00
830 13:53:14.386363 PCI: 00:00.0 [8086/0000] ops
831 13:53:14.389651 PCI: 00:00.0 [8086/9a12] enabled
832 13:53:14.392955 PCI: 00:02.0 [8086/0000] bus ops
833 13:53:14.396286 PCI: 00:02.0 [8086/9a40] enabled
834 13:53:14.399656 PCI: 00:04.0 [8086/0000] bus ops
835 13:53:14.403109 PCI: 00:04.0 [8086/9a03] enabled
836 13:53:14.406415 PCI: 00:05.0 [8086/9a19] enabled
837 13:53:14.409808 PCI: 00:07.0 [0000/0000] hidden
838 13:53:14.412918 PCI: 00:08.0 [8086/9a11] enabled
839 13:53:14.416310 PCI: 00:0a.0 [8086/9a0d] disabled
840 13:53:14.419501 PCI: 00:0d.0 [8086/0000] bus ops
841 13:53:14.422869 PCI: 00:0d.0 [8086/9a13] enabled
842 13:53:14.426229 PCI: 00:14.0 [8086/0000] bus ops
843 13:53:14.429682 PCI: 00:14.0 [8086/a0ed] enabled
844 13:53:14.432941 PCI: 00:14.2 [8086/a0ef] enabled
845 13:53:14.435883 PCI: 00:14.3 [8086/0000] bus ops
846 13:53:14.439239 PCI: 00:14.3 [8086/a0f0] enabled
847 13:53:14.442846 PCI: 00:15.0 [8086/0000] bus ops
848 13:53:14.446279 PCI: 00:15.0 [8086/a0e8] enabled
849 13:53:14.449402 PCI: 00:15.1 [8086/0000] bus ops
850 13:53:14.452599 PCI: 00:15.1 [8086/a0e9] enabled
851 13:53:14.455756 PCI: 00:15.2 [8086/0000] bus ops
852 13:53:14.459147 PCI: 00:15.2 [8086/a0ea] enabled
853 13:53:14.462431 PCI: 00:15.3 [8086/0000] bus ops
854 13:53:14.466053 PCI: 00:15.3 [8086/a0eb] enabled
855 13:53:14.469155 PCI: 00:16.0 [8086/0000] ops
856 13:53:14.472471 PCI: 00:16.0 [8086/a0e0] enabled
857 13:53:14.479031 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 13:53:14.482360 PCI: 00:19.0 [8086/0000] bus ops
859 13:53:14.485617 PCI: 00:19.0 [8086/a0c5] disabled
860 13:53:14.488941 PCI: 00:19.1 [8086/0000] bus ops
861 13:53:14.492251 PCI: 00:19.1 [8086/a0c6] enabled
862 13:53:14.495566 PCI: 00:1d.0 [8086/0000] bus ops
863 13:53:14.498887 PCI: 00:1d.0 [8086/a0b0] enabled
864 13:53:14.502205 PCI: 00:1e.0 [8086/0000] ops
865 13:53:14.505524 PCI: 00:1e.0 [8086/a0a8] enabled
866 13:53:14.508991 PCI: 00:1e.2 [8086/0000] bus ops
867 13:53:14.512118 PCI: 00:1e.2 [8086/a0aa] enabled
868 13:53:14.515256 PCI: 00:1e.3 [8086/0000] bus ops
869 13:53:14.518563 PCI: 00:1e.3 [8086/a0ab] enabled
870 13:53:14.521877 PCI: 00:1f.0 [8086/0000] bus ops
871 13:53:14.525299 PCI: 00:1f.0 [8086/a087] enabled
872 13:53:14.525383 RTC Init
873 13:53:14.528583 Set power on after power failure.
874 13:53:14.531981 Disabling Deep S3
875 13:53:14.532063 Disabling Deep S3
876 13:53:14.535329 Disabling Deep S4
877 13:53:14.538465 Disabling Deep S4
878 13:53:14.538547 Disabling Deep S5
879 13:53:14.541706 Disabling Deep S5
880 13:53:14.545017 PCI: 00:1f.2 [0000/0000] hidden
881 13:53:14.548640 PCI: 00:1f.3 [8086/0000] bus ops
882 13:53:14.551752 PCI: 00:1f.3 [8086/a0c8] enabled
883 13:53:14.555115 PCI: 00:1f.5 [8086/0000] bus ops
884 13:53:14.558353 PCI: 00:1f.5 [8086/a0a4] enabled
885 13:53:14.561611 PCI: Leftover static devices:
886 13:53:14.561701 PCI: 00:10.2
887 13:53:14.561768 PCI: 00:10.6
888 13:53:14.564844 PCI: 00:10.7
889 13:53:14.564924 PCI: 00:06.0
890 13:53:14.568535 PCI: 00:07.1
891 13:53:14.568616 PCI: 00:07.2
892 13:53:14.568679 PCI: 00:07.3
893 13:53:14.571563 PCI: 00:09.0
894 13:53:14.571643 PCI: 00:0d.1
895 13:53:14.574755 PCI: 00:0d.2
896 13:53:14.574835 PCI: 00:0d.3
897 13:53:14.578423 PCI: 00:0e.0
898 13:53:14.578502 PCI: 00:12.0
899 13:53:14.578566 PCI: 00:12.6
900 13:53:14.581639 PCI: 00:13.0
901 13:53:14.581733 PCI: 00:14.1
902 13:53:14.584906 PCI: 00:16.1
903 13:53:14.584985 PCI: 00:16.2
904 13:53:14.585049 PCI: 00:16.3
905 13:53:14.588103 PCI: 00:16.4
906 13:53:14.588183 PCI: 00:16.5
907 13:53:14.591437 PCI: 00:17.0
908 13:53:14.591517 PCI: 00:19.2
909 13:53:14.594913 PCI: 00:1e.1
910 13:53:14.595007 PCI: 00:1f.1
911 13:53:14.595071 PCI: 00:1f.4
912 13:53:14.598015 PCI: 00:1f.6
913 13:53:14.598094 PCI: 00:1f.7
914 13:53:14.601297 PCI: Check your devicetree.cb.
915 13:53:14.604554 PCI: 00:02.0 scanning...
916 13:53:14.607809 scan_generic_bus for PCI: 00:02.0
917 13:53:14.611138 scan_generic_bus for PCI: 00:02.0 done
918 13:53:14.617864 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 13:53:14.617944 PCI: 00:04.0 scanning...
920 13:53:14.624368 scan_generic_bus for PCI: 00:04.0
921 13:53:14.624448 GENERIC: 0.0 enabled
922 13:53:14.631112 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 13:53:14.634389 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 13:53:14.637809 PCI: 00:0d.0 scanning...
925 13:53:14.641063 scan_static_bus for PCI: 00:0d.0
926 13:53:14.644441 USB0 port 0 enabled
927 13:53:14.647374 USB0 port 0 scanning...
928 13:53:14.650632 scan_static_bus for USB0 port 0
929 13:53:14.650712 USB3 port 0 enabled
930 13:53:14.654523 USB3 port 1 enabled
931 13:53:14.657547 USB3 port 2 disabled
932 13:53:14.657626 USB3 port 3 disabled
933 13:53:14.660733 USB3 port 0 scanning...
934 13:53:14.663987 scan_static_bus for USB3 port 0
935 13:53:14.667225 scan_static_bus for USB3 port 0 done
936 13:53:14.673634 scan_bus: bus USB3 port 0 finished in 6 msecs
937 13:53:14.673714 USB3 port 1 scanning...
938 13:53:14.677492 scan_static_bus for USB3 port 1
939 13:53:14.680576 scan_static_bus for USB3 port 1 done
940 13:53:14.687444 scan_bus: bus USB3 port 1 finished in 6 msecs
941 13:53:14.690523 scan_static_bus for USB0 port 0 done
942 13:53:14.693968 scan_bus: bus USB0 port 0 finished in 43 msecs
943 13:53:14.700604 scan_static_bus for PCI: 00:0d.0 done
944 13:53:14.703816 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 13:53:14.707206 PCI: 00:14.0 scanning...
946 13:53:14.710589 scan_static_bus for PCI: 00:14.0
947 13:53:14.710670 USB0 port 0 enabled
948 13:53:14.713854 USB0 port 0 scanning...
949 13:53:14.717299 scan_static_bus for USB0 port 0
950 13:53:14.720491 USB2 port 0 disabled
951 13:53:14.720570 USB2 port 1 enabled
952 13:53:14.723616 USB2 port 2 enabled
953 13:53:14.726861 USB2 port 3 disabled
954 13:53:14.726941 USB2 port 4 enabled
955 13:53:14.730214 USB2 port 5 disabled
956 13:53:14.733552 USB2 port 6 disabled
957 13:53:14.733631 USB2 port 7 disabled
958 13:53:14.736892 USB2 port 8 disabled
959 13:53:14.740095 USB2 port 9 disabled
960 13:53:14.740180 USB3 port 0 disabled
961 13:53:14.743501 USB3 port 1 enabled
962 13:53:14.746807 USB3 port 2 disabled
963 13:53:14.746886 USB3 port 3 disabled
964 13:53:14.749987 USB2 port 1 scanning...
965 13:53:14.753689 scan_static_bus for USB2 port 1
966 13:53:14.756813 scan_static_bus for USB2 port 1 done
967 13:53:14.760167 scan_bus: bus USB2 port 1 finished in 6 msecs
968 13:53:14.763423 USB2 port 2 scanning...
969 13:53:14.766627 scan_static_bus for USB2 port 2
970 13:53:14.770009 scan_static_bus for USB2 port 2 done
971 13:53:14.776515 scan_bus: bus USB2 port 2 finished in 6 msecs
972 13:53:14.776650 USB2 port 4 scanning...
973 13:53:14.780019 scan_static_bus for USB2 port 4
974 13:53:14.787143 scan_static_bus for USB2 port 4 done
975 13:53:14.790256 scan_bus: bus USB2 port 4 finished in 6 msecs
976 13:53:14.793651 USB3 port 1 scanning...
977 13:53:14.796979 scan_static_bus for USB3 port 1
978 13:53:14.800245 scan_static_bus for USB3 port 1 done
979 13:53:14.803479 scan_bus: bus USB3 port 1 finished in 6 msecs
980 13:53:14.806756 scan_static_bus for USB0 port 0 done
981 13:53:14.813463 scan_bus: bus USB0 port 0 finished in 93 msecs
982 13:53:14.816823 scan_static_bus for PCI: 00:14.0 done
983 13:53:14.820038 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 13:53:14.823573 PCI: 00:14.3 scanning...
985 13:53:14.826662 scan_static_bus for PCI: 00:14.3
986 13:53:14.829973 GENERIC: 0.0 enabled
987 13:53:14.833227 scan_static_bus for PCI: 00:14.3 done
988 13:53:14.836562 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 13:53:14.839955 PCI: 00:15.0 scanning...
990 13:53:14.843791 scan_static_bus for PCI: 00:15.0
991 13:53:14.847201 I2C: 00:1a enabled
992 13:53:14.847285 I2C: 00:31 enabled
993 13:53:14.850594 I2C: 00:32 enabled
994 13:53:14.853878 scan_static_bus for PCI: 00:15.0 done
995 13:53:14.857083 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 13:53:14.860855 PCI: 00:15.1 scanning...
997 13:53:14.864009 scan_static_bus for PCI: 00:15.1
998 13:53:14.867270 I2C: 00:10 enabled
999 13:53:14.870396 scan_static_bus for PCI: 00:15.1 done
1000 13:53:14.874108 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 13:53:14.877280 PCI: 00:15.2 scanning...
1002 13:53:14.880581 scan_static_bus for PCI: 00:15.2
1003 13:53:14.883826 scan_static_bus for PCI: 00:15.2 done
1004 13:53:14.890603 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 13:53:14.893728 PCI: 00:15.3 scanning...
1006 13:53:14.896907 scan_static_bus for PCI: 00:15.3
1007 13:53:14.900637 scan_static_bus for PCI: 00:15.3 done
1008 13:53:14.904025 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 13:53:14.907273 PCI: 00:19.1 scanning...
1010 13:53:14.910666 scan_static_bus for PCI: 00:19.1
1011 13:53:14.913446 I2C: 00:15 enabled
1012 13:53:14.916769 scan_static_bus for PCI: 00:19.1 done
1013 13:53:14.920192 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 13:53:14.923607 PCI: 00:1d.0 scanning...
1015 13:53:14.926949 do_pci_scan_bridge for PCI: 00:1d.0
1016 13:53:14.930302 PCI: pci_scan_bus for bus 01
1017 13:53:14.933411 PCI: 01:00.0 [1c5c/174a] enabled
1018 13:53:14.936745 GENERIC: 0.0 enabled
1019 13:53:14.940158 Enabling Common Clock Configuration
1020 13:53:14.943401 L1 Sub-State supported from root port 29
1021 13:53:14.946810 L1 Sub-State Support = 0xf
1022 13:53:14.950106 CommonModeRestoreTime = 0x28
1023 13:53:14.953413 Power On Value = 0x16, Power On Scale = 0x0
1024 13:53:14.956750 ASPM: Enabled L1
1025 13:53:14.960058 PCIe: Max_Payload_Size adjusted to 128
1026 13:53:14.963199 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 13:53:14.966442 PCI: 00:1e.2 scanning...
1028 13:53:14.969603 scan_generic_bus for PCI: 00:1e.2
1029 13:53:14.973358 SPI: 00 enabled
1030 13:53:14.979801 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 13:53:14.983096 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 13:53:14.986460 PCI: 00:1e.3 scanning...
1033 13:53:14.989516 scan_generic_bus for PCI: 00:1e.3
1034 13:53:14.989597 SPI: 00 enabled
1035 13:53:14.996410 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 13:53:15.002703 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 13:53:15.002785 PCI: 00:1f.0 scanning...
1038 13:53:15.006180 scan_static_bus for PCI: 00:1f.0
1039 13:53:15.009534 PNP: 0c09.0 enabled
1040 13:53:15.012814 PNP: 0c09.0 scanning...
1041 13:53:15.016268 scan_static_bus for PNP: 0c09.0
1042 13:53:15.019549 scan_static_bus for PNP: 0c09.0 done
1043 13:53:15.022836 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 13:53:15.029634 scan_static_bus for PCI: 00:1f.0 done
1045 13:53:15.032954 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 13:53:15.036107 PCI: 00:1f.2 scanning...
1047 13:53:15.039464 scan_static_bus for PCI: 00:1f.2
1048 13:53:15.039545 GENERIC: 0.0 enabled
1049 13:53:15.042570 GENERIC: 0.0 scanning...
1050 13:53:15.046367 scan_static_bus for GENERIC: 0.0
1051 13:53:15.049744 GENERIC: 0.0 enabled
1052 13:53:15.052956 GENERIC: 1.0 enabled
1053 13:53:15.056324 scan_static_bus for GENERIC: 0.0 done
1054 13:53:15.059651 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 13:53:15.062904 scan_static_bus for PCI: 00:1f.2 done
1056 13:53:15.069326 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 13:53:15.072506 PCI: 00:1f.3 scanning...
1058 13:53:15.075744 scan_static_bus for PCI: 00:1f.3
1059 13:53:15.079480 scan_static_bus for PCI: 00:1f.3 done
1060 13:53:15.082510 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 13:53:15.085731 PCI: 00:1f.5 scanning...
1062 13:53:15.089029 scan_generic_bus for PCI: 00:1f.5
1063 13:53:15.092719 scan_generic_bus for PCI: 00:1f.5 done
1064 13:53:15.099003 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 13:53:15.102788 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 13:53:15.105932 scan_static_bus for Root Device done
1067 13:53:15.112682 scan_bus: bus Root Device finished in 736 msecs
1068 13:53:15.112764 done
1069 13:53:15.119475 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 13:53:15.122065 Chrome EC: UHEPI supported
1071 13:53:15.128865 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 13:53:15.135505 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 13:53:15.138715 SPI flash protection: WPSW=0 SRP0=0
1074 13:53:15.142450 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 13:53:15.149074 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 13:53:15.151826 found VGA at PCI: 00:02.0
1077 13:53:15.155635 Setting up VGA for PCI: 00:02.0
1078 13:53:15.158912 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 13:53:15.165573 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 13:53:15.165655 Allocating resources...
1081 13:53:15.168757 Reading resources...
1082 13:53:15.172055 Root Device read_resources bus 0 link: 0
1083 13:53:15.178391 DOMAIN: 0000 read_resources bus 0 link: 0
1084 13:53:15.181754 PCI: 00:04.0 read_resources bus 1 link: 0
1085 13:53:15.188638 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 13:53:15.191966 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 13:53:15.198384 USB0 port 0 read_resources bus 0 link: 0
1088 13:53:15.201412 USB0 port 0 read_resources bus 0 link: 0 done
1089 13:53:15.208117 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 13:53:15.211340 PCI: 00:14.0 read_resources bus 0 link: 0
1091 13:53:15.214663 USB0 port 0 read_resources bus 0 link: 0
1092 13:53:15.222576 USB0 port 0 read_resources bus 0 link: 0 done
1093 13:53:15.225270 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 13:53:15.232578 PCI: 00:14.3 read_resources bus 0 link: 0
1095 13:53:15.235829 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 13:53:15.242486 PCI: 00:15.0 read_resources bus 0 link: 0
1097 13:53:15.245553 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 13:53:15.252250 PCI: 00:15.1 read_resources bus 0 link: 0
1099 13:53:15.255612 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 13:53:15.263126 PCI: 00:19.1 read_resources bus 0 link: 0
1101 13:53:15.266008 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 13:53:15.272815 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 13:53:15.275859 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 13:53:15.283245 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 13:53:15.286283 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 13:53:15.293108 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 13:53:15.296378 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 13:53:15.302867 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 13:53:15.306094 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 13:53:15.312740 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 13:53:15.315960 GENERIC: 0.0 read_resources bus 0 link: 0
1112 13:53:15.322637 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 13:53:15.325778 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 13:53:15.332414 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 13:53:15.335755 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 13:53:15.342330 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 13:53:15.345513 Root Device read_resources bus 0 link: 0 done
1118 13:53:15.349206 Done reading resources.
1119 13:53:15.355777 Show resources in subtree (Root Device)...After reading.
1120 13:53:15.359125 Root Device child on link 0 DOMAIN: 0000
1121 13:53:15.362592 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 13:53:15.371964 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 13:53:15.382229 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 13:53:15.382312 PCI: 00:00.0
1125 13:53:15.392400 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 13:53:15.402309 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 13:53:15.411834 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 13:53:15.422124 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 13:53:15.432013 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 13:53:15.441926 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 13:53:15.448644 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 13:53:15.458238 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 13:53:15.468728 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 13:53:15.478235 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 13:53:15.488418 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 13:53:15.494956 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 13:53:15.505169 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 13:53:15.514986 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 13:53:15.524941 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 13:53:15.534915 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 13:53:15.544844 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 13:53:15.551495 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 13:53:15.561220 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 13:53:15.571019 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 13:53:15.574357 PCI: 00:02.0
1146 13:53:15.584290 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 13:53:15.594403 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 13:53:15.601267 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 13:53:15.607651 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 13:53:15.617830 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 13:53:15.617938 GENERIC: 0.0
1152 13:53:15.620941 PCI: 00:05.0
1153 13:53:15.630930 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:53:15.633922 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 13:53:15.637214 GENERIC: 0.0
1156 13:53:15.637316 PCI: 00:08.0
1157 13:53:15.647210 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 13:53:15.650488 PCI: 00:0a.0
1159 13:53:15.653932 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 13:53:15.663756 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 13:53:15.670949 USB0 port 0 child on link 0 USB3 port 0
1162 13:53:15.671060 USB3 port 0
1163 13:53:15.674162 USB3 port 1
1164 13:53:15.674253 USB3 port 2
1165 13:53:15.677457 USB3 port 3
1166 13:53:15.680778 PCI: 00:14.0 child on link 0 USB0 port 0
1167 13:53:15.690612 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 13:53:15.693828 USB0 port 0 child on link 0 USB2 port 0
1169 13:53:15.696844 USB2 port 0
1170 13:53:15.700445 USB2 port 1
1171 13:53:15.700520 USB2 port 2
1172 13:53:15.703334 USB2 port 3
1173 13:53:15.703405 USB2 port 4
1174 13:53:15.707131 USB2 port 5
1175 13:53:15.707205 USB2 port 6
1176 13:53:15.710138 USB2 port 7
1177 13:53:15.710237 USB2 port 8
1178 13:53:15.713323 USB2 port 9
1179 13:53:15.713424 USB3 port 0
1180 13:53:15.716659 USB3 port 1
1181 13:53:15.716770 USB3 port 2
1182 13:53:15.720079 USB3 port 3
1183 13:53:15.720156 PCI: 00:14.2
1184 13:53:15.730184 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 13:53:15.739750 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 13:53:15.746732 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 13:53:15.756282 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 13:53:15.756387 GENERIC: 0.0
1189 13:53:15.762782 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 13:53:15.772923 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 13:53:15.773029 I2C: 00:1a
1192 13:53:15.776235 I2C: 00:31
1193 13:53:15.776339 I2C: 00:32
1194 13:53:15.779833 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 13:53:15.789414 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 13:53:15.792807 I2C: 00:10
1197 13:53:15.792886 PCI: 00:15.2
1198 13:53:15.802764 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 13:53:15.806437 PCI: 00:15.3
1200 13:53:15.815773 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 13:53:15.815887 PCI: 00:16.0
1202 13:53:15.826012 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:53:15.829290 PCI: 00:19.0
1204 13:53:15.832488 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 13:53:15.842432 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:53:15.845645 I2C: 00:15
1207 13:53:15.848960 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 13:53:15.859010 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 13:53:15.868791 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 13:53:15.875370 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 13:53:15.878679 GENERIC: 0.0
1212 13:53:15.878762 PCI: 01:00.0
1213 13:53:15.888682 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 13:53:15.898973 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 13:53:15.908853 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 13:53:15.912136 PCI: 00:1e.0
1217 13:53:15.921842 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 13:53:15.925651 PCI: 00:1e.2 child on link 0 SPI: 00
1219 13:53:15.935234 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 13:53:15.938936 SPI: 00
1221 13:53:15.942168 PCI: 00:1e.3 child on link 0 SPI: 00
1222 13:53:15.951786 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 13:53:15.951918 SPI: 00
1224 13:53:15.955159 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 13:53:15.965290 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 13:53:15.968456 PNP: 0c09.0
1227 13:53:15.975126 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 13:53:15.981549 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 13:53:15.988174 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 13:53:15.998371 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 13:53:16.004903 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 13:53:16.004986 GENERIC: 0.0
1233 13:53:16.008248 GENERIC: 1.0
1234 13:53:16.008331 PCI: 00:1f.3
1235 13:53:16.018003 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 13:53:16.028205 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 13:53:16.031523 PCI: 00:1f.5
1238 13:53:16.041495 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 13:53:16.044911 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 13:53:16.044994 APIC: 00
1241 13:53:16.047815 APIC: 01
1242 13:53:16.047938 APIC: 03
1243 13:53:16.048003 APIC: 07
1244 13:53:16.051214 APIC: 05
1245 13:53:16.051297 APIC: 04
1246 13:53:16.054652 APIC: 02
1247 13:53:16.054778 APIC: 06
1248 13:53:16.061281 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 13:53:16.067520 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 13:53:16.074566 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 13:53:16.081195 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 13:53:16.084317 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 13:53:16.087624 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 13:53:16.094052 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 13:53:16.100655 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 13:53:16.107252 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 13:53:16.114217 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 13:53:16.120791 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 13:53:16.127420 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 13:53:16.137187 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 13:53:16.143568 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 13:53:16.150473 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 13:53:16.153715 DOMAIN: 0000: Resource ranges:
1264 13:53:16.157062 * Base: 1000, Size: 800, Tag: 100
1265 13:53:16.160388 * Base: 1900, Size: e700, Tag: 100
1266 13:53:16.167186 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 13:53:16.173593 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 13:53:16.180466 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 13:53:16.187248 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 13:53:16.196983 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 13:53:16.203236 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 13:53:16.209865 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 13:53:16.220112 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 13:53:16.226623 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 13:53:16.233233 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 13:53:16.242990 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 13:53:16.249537 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 13:53:16.256420 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 13:53:16.266401 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 13:53:16.273181 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 13:53:16.279154 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 13:53:16.289460 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 13:53:16.296190 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 13:53:16.302703 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 13:53:16.312686 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 13:53:16.319276 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 13:53:16.325658 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 13:53:16.335774 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 13:53:16.342054 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 13:53:16.348986 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 13:53:16.352180 DOMAIN: 0000: Resource ranges:
1292 13:53:16.358936 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 13:53:16.362101 * Base: d0000000, Size: 28000000, Tag: 200
1294 13:53:16.365372 * Base: fa000000, Size: 1000000, Tag: 200
1295 13:53:16.368880 * Base: fb001000, Size: 2fff000, Tag: 200
1296 13:53:16.375481 * Base: fe010000, Size: 2e000, Tag: 200
1297 13:53:16.378905 * Base: fe03f000, Size: d41000, Tag: 200
1298 13:53:16.382078 * Base: fed88000, Size: 8000, Tag: 200
1299 13:53:16.385402 * Base: fed93000, Size: d000, Tag: 200
1300 13:53:16.391981 * Base: feda2000, Size: 1e000, Tag: 200
1301 13:53:16.395241 * Base: fede0000, Size: 1220000, Tag: 200
1302 13:53:16.398968 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 13:53:16.408480 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 13:53:16.415178 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 13:53:16.422229 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 13:53:16.428728 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 13:53:16.435292 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 13:53:16.441835 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 13:53:16.448687 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 13:53:16.454851 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 13:53:16.461612 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 13:53:16.468128 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 13:53:16.474817 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 13:53:16.481818 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 13:53:16.488278 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 13:53:16.494652 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 13:53:16.501561 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 13:53:16.507710 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 13:53:16.514438 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 13:53:16.521120 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 13:53:16.527763 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 13:53:16.534883 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 13:53:16.541109 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 13:53:16.547570 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 13:53:16.554189 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 13:53:16.560922 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 13:53:16.564210 PCI: 00:1d.0: Resource ranges:
1328 13:53:16.567716 * Base: 7fc00000, Size: 100000, Tag: 200
1329 13:53:16.574050 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 13:53:16.581102 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 13:53:16.587394 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 13:53:16.597450 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 13:53:16.603934 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 13:53:16.607184 Root Device assign_resources, bus 0 link: 0
1335 13:53:16.614028 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 13:53:16.620622 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 13:53:16.630547 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 13:53:16.636940 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 13:53:16.647040 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 13:53:16.650325 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 13:53:16.657176 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 13:53:16.663761 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 13:53:16.673871 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 13:53:16.680124 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 13:53:16.683311 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 13:53:16.690065 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 13:53:16.696699 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 13:53:16.703374 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 13:53:16.706747 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 13:53:16.716805 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 13:53:16.723052 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 13:53:16.733028 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 13:53:16.736410 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 13:53:16.739731 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 13:53:16.749433 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 13:53:16.752807 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 13:53:16.759722 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 13:53:16.765893 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 13:53:16.769736 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 13:53:16.776047 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 13:53:16.782804 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 13:53:16.792791 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 13:53:16.798971 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 13:53:16.809100 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 13:53:16.812300 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 13:53:16.818785 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 13:53:16.825555 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 13:53:16.835553 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 13:53:16.845454 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 13:53:16.848807 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 13:53:16.858516 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 13:53:16.865235 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 13:53:16.871944 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 13:53:16.878784 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 13:53:16.885231 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 13:53:16.891751 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 13:53:16.895159 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 13:53:16.905104 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 13:53:16.908376 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 13:53:16.911740 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 13:53:16.918887 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 13:53:16.921675 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 13:53:16.928884 LPC: Trying to open IO window from 800 size 1ff
1384 13:53:16.935128 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 13:53:16.945203 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 13:53:16.951832 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 13:53:16.958625 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 13:53:16.961638 Root Device assign_resources, bus 0 link: 0
1389 13:53:16.964917 Done setting resources.
1390 13:53:16.971417 Show resources in subtree (Root Device)...After assigning values.
1391 13:53:16.974873 Root Device child on link 0 DOMAIN: 0000
1392 13:53:16.978572 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 13:53:16.988257 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 13:53:16.998233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 13:53:17.001506 PCI: 00:00.0
1396 13:53:17.011748 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 13:53:17.018490 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 13:53:17.028218 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 13:53:17.038161 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 13:53:17.048144 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 13:53:17.057918 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 13:53:17.067713 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 13:53:17.074248 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 13:53:17.084077 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 13:53:17.094340 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 13:53:17.104304 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 13:53:17.114392 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 13:53:17.120988 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 13:53:17.130698 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 13:53:17.140752 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 13:53:17.150591 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 13:53:17.160569 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 13:53:17.170643 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 13:53:17.177178 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 13:53:17.187330 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 13:53:17.190422 PCI: 00:02.0
1417 13:53:17.200452 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 13:53:17.210487 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 13:53:17.220263 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 13:53:17.223741 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 13:53:17.236769 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 13:53:17.236866 GENERIC: 0.0
1423 13:53:17.240320 PCI: 00:05.0
1424 13:53:17.249743 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 13:53:17.253130 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 13:53:17.256422 GENERIC: 0.0
1427 13:53:17.256500 PCI: 00:08.0
1428 13:53:17.266178 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 13:53:17.270099 PCI: 00:0a.0
1430 13:53:17.273345 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 13:53:17.283158 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 13:53:17.289571 USB0 port 0 child on link 0 USB3 port 0
1433 13:53:17.289653 USB3 port 0
1434 13:53:17.292838 USB3 port 1
1435 13:53:17.292916 USB3 port 2
1436 13:53:17.296555 USB3 port 3
1437 13:53:17.299419 PCI: 00:14.0 child on link 0 USB0 port 0
1438 13:53:17.309544 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 13:53:17.316132 USB0 port 0 child on link 0 USB2 port 0
1440 13:53:17.316215 USB2 port 0
1441 13:53:17.319477 USB2 port 1
1442 13:53:17.319555 USB2 port 2
1443 13:53:17.322808 USB2 port 3
1444 13:53:17.322886 USB2 port 4
1445 13:53:17.326201 USB2 port 5
1446 13:53:17.326291 USB2 port 6
1447 13:53:17.329545 USB2 port 7
1448 13:53:17.329622 USB2 port 8
1449 13:53:17.332806 USB2 port 9
1450 13:53:17.336554 USB3 port 0
1451 13:53:17.336642 USB3 port 1
1452 13:53:17.339588 USB3 port 2
1453 13:53:17.339670 USB3 port 3
1454 13:53:17.342984 PCI: 00:14.2
1455 13:53:17.352908 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 13:53:17.362845 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 13:53:17.366111 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 13:53:17.376339 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 13:53:17.379341 GENERIC: 0.0
1460 13:53:17.382799 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 13:53:17.392333 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 13:53:17.395732 I2C: 00:1a
1463 13:53:17.395817 I2C: 00:31
1464 13:53:17.399390 I2C: 00:32
1465 13:53:17.402512 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 13:53:17.412587 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 13:53:17.415864 I2C: 00:10
1468 13:53:17.415949 PCI: 00:15.2
1469 13:53:17.425824 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 13:53:17.429138 PCI: 00:15.3
1471 13:53:17.439127 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 13:53:17.439219 PCI: 00:16.0
1473 13:53:17.449021 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 13:53:17.452405 PCI: 00:19.0
1475 13:53:17.455757 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 13:53:17.465332 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 13:53:17.469228 I2C: 00:15
1478 13:53:17.472372 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 13:53:17.482242 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 13:53:17.492428 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 13:53:17.505547 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 13:53:17.505649 GENERIC: 0.0
1483 13:53:17.508646 PCI: 01:00.0
1484 13:53:17.518658 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 13:53:17.529043 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 13:53:17.538582 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 13:53:17.541838 PCI: 00:1e.0
1488 13:53:17.551691 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 13:53:17.555320 PCI: 00:1e.2 child on link 0 SPI: 00
1490 13:53:17.565290 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 13:53:17.568656 SPI: 00
1492 13:53:17.571869 PCI: 00:1e.3 child on link 0 SPI: 00
1493 13:53:17.581784 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 13:53:17.581893 SPI: 00
1495 13:53:17.588164 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 13:53:17.595173 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 13:53:17.598346 PNP: 0c09.0
1498 13:53:17.608251 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 13:53:17.611515 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 13:53:17.621720 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 13:53:17.628010 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 13:53:17.634647 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 13:53:17.634757 GENERIC: 0.0
1504 13:53:17.637957 GENERIC: 1.0
1505 13:53:17.638059 PCI: 00:1f.3
1506 13:53:17.651112 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 13:53:17.661314 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 13:53:17.661405 PCI: 00:1f.5
1509 13:53:17.671391 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 13:53:17.677884 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 13:53:17.678006 APIC: 00
1512 13:53:17.678107 APIC: 01
1513 13:53:17.681124 APIC: 03
1514 13:53:17.681227 APIC: 07
1515 13:53:17.684327 APIC: 05
1516 13:53:17.684421 APIC: 04
1517 13:53:17.684522 APIC: 02
1518 13:53:17.687693 APIC: 06
1519 13:53:17.690845 Done allocating resources.
1520 13:53:17.694185 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 13:53:17.701411 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 13:53:17.704901 Configure GPIOs for I2S audio on UP4.
1523 13:53:17.711952 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 13:53:17.715305 Enabling resources...
1525 13:53:17.718991 PCI: 00:00.0 subsystem <- 8086/9a12
1526 13:53:17.722101 PCI: 00:00.0 cmd <- 06
1527 13:53:17.725180 PCI: 00:02.0 subsystem <- 8086/9a40
1528 13:53:17.728772 PCI: 00:02.0 cmd <- 03
1529 13:53:17.732028 PCI: 00:04.0 subsystem <- 8086/9a03
1530 13:53:17.734870 PCI: 00:04.0 cmd <- 02
1531 13:53:17.738262 PCI: 00:05.0 subsystem <- 8086/9a19
1532 13:53:17.738347 PCI: 00:05.0 cmd <- 02
1533 13:53:17.744947 PCI: 00:08.0 subsystem <- 8086/9a11
1534 13:53:17.745072 PCI: 00:08.0 cmd <- 06
1535 13:53:17.748377 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 13:53:17.751751 PCI: 00:0d.0 cmd <- 02
1537 13:53:17.754940 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 13:53:17.758335 PCI: 00:14.0 cmd <- 02
1539 13:53:17.761675 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 13:53:17.765073 PCI: 00:14.2 cmd <- 02
1541 13:53:17.768052 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 13:53:17.771421 PCI: 00:14.3 cmd <- 02
1543 13:53:17.774903 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 13:53:17.778321 PCI: 00:15.0 cmd <- 02
1545 13:53:17.781638 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 13:53:17.785034 PCI: 00:15.1 cmd <- 02
1547 13:53:17.788132 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 13:53:17.788216 PCI: 00:15.2 cmd <- 02
1549 13:53:17.794635 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 13:53:17.794719 PCI: 00:15.3 cmd <- 02
1551 13:53:17.798448 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 13:53:17.801361 PCI: 00:16.0 cmd <- 02
1553 13:53:17.804588 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 13:53:17.808147 PCI: 00:19.1 cmd <- 02
1555 13:53:17.811417 PCI: 00:1d.0 bridge ctrl <- 0013
1556 13:53:17.814939 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 13:53:17.818310 PCI: 00:1d.0 cmd <- 06
1558 13:53:17.821461 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 13:53:17.824584 PCI: 00:1e.0 cmd <- 06
1560 13:53:17.827732 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 13:53:17.831009 PCI: 00:1e.2 cmd <- 06
1562 13:53:17.834470 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 13:53:17.837770 PCI: 00:1e.3 cmd <- 02
1564 13:53:17.841296 PCI: 00:1f.0 subsystem <- 8086/a087
1565 13:53:17.841384 PCI: 00:1f.0 cmd <- 407
1566 13:53:17.847998 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 13:53:17.848084 PCI: 00:1f.3 cmd <- 02
1568 13:53:17.851210 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 13:53:17.854483 PCI: 00:1f.5 cmd <- 406
1570 13:53:17.859299 PCI: 01:00.0 cmd <- 02
1571 13:53:17.863775 done.
1572 13:53:17.867249 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 13:53:17.870603 Initializing devices...
1574 13:53:17.873895 Root Device init
1575 13:53:17.877336 Chrome EC: Set SMI mask to 0x0000000000000000
1576 13:53:17.883966 Chrome EC: clear events_b mask to 0x0000000000000000
1577 13:53:17.890340 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 13:53:17.893740 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 13:53:17.900911 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 13:53:17.907200 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 13:53:17.910869 fw_config match found: DB_USB=USB3_ACTIVE
1582 13:53:17.917362 Configure Right Type-C port orientation for retimer
1583 13:53:17.920653 Root Device init finished in 42 msecs
1584 13:53:17.923906 PCI: 00:00.0 init
1585 13:53:17.923988 CPU TDP = 9 Watts
1586 13:53:17.926903 CPU PL1 = 9 Watts
1587 13:53:17.930580 CPU PL2 = 40 Watts
1588 13:53:17.930658 CPU PL4 = 83 Watts
1589 13:53:17.933908 PCI: 00:00.0 init finished in 8 msecs
1590 13:53:17.937164 PCI: 00:02.0 init
1591 13:53:17.940401 GMA: Found VBT in CBFS
1592 13:53:17.943817 GMA: Found valid VBT in CBFS
1593 13:53:17.947201 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 13:53:17.957220 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 13:53:17.960459 PCI: 00:02.0 init finished in 18 msecs
1596 13:53:17.963694 PCI: 00:05.0 init
1597 13:53:17.967010 PCI: 00:05.0 init finished in 0 msecs
1598 13:53:17.967103 PCI: 00:08.0 init
1599 13:53:17.973200 PCI: 00:08.0 init finished in 0 msecs
1600 13:53:17.973280 PCI: 00:14.0 init
1601 13:53:17.979854 PCI: 00:14.0 init finished in 0 msecs
1602 13:53:17.979967 PCI: 00:14.2 init
1603 13:53:17.983197 PCI: 00:14.2 init finished in 0 msecs
1604 13:53:17.986963 PCI: 00:15.0 init
1605 13:53:17.990248 I2C bus 0 version 0x3230302a
1606 13:53:17.993914 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 13:53:17.997204 PCI: 00:15.0 init finished in 6 msecs
1608 13:53:18.000818 PCI: 00:15.1 init
1609 13:53:18.003785 I2C bus 1 version 0x3230302a
1610 13:53:18.007010 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 13:53:18.010405 PCI: 00:15.1 init finished in 6 msecs
1612 13:53:18.013614 PCI: 00:15.2 init
1613 13:53:18.017179 I2C bus 2 version 0x3230302a
1614 13:53:18.020228 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 13:53:18.023496 PCI: 00:15.2 init finished in 6 msecs
1616 13:53:18.023572 PCI: 00:15.3 init
1617 13:53:18.026845 I2C bus 3 version 0x3230302a
1618 13:53:18.030027 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 13:53:18.036575 PCI: 00:15.3 init finished in 6 msecs
1620 13:53:18.036658 PCI: 00:16.0 init
1621 13:53:18.039873 PCI: 00:16.0 init finished in 0 msecs
1622 13:53:18.043946 PCI: 00:19.1 init
1623 13:53:18.047207 I2C bus 5 version 0x3230302a
1624 13:53:18.050622 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 13:53:18.053787 PCI: 00:19.1 init finished in 6 msecs
1626 13:53:18.057148 PCI: 00:1d.0 init
1627 13:53:18.060466 Initializing PCH PCIe bridge.
1628 13:53:18.063752 PCI: 00:1d.0 init finished in 3 msecs
1629 13:53:18.067042 PCI: 00:1f.0 init
1630 13:53:18.070394 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 13:53:18.076866 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 13:53:18.076949 IOAPIC: ID = 0x02
1633 13:53:18.080141 IOAPIC: Dumping registers
1634 13:53:18.083522 reg 0x0000: 0x02000000
1635 13:53:18.083606 reg 0x0001: 0x00770020
1636 13:53:18.086886 reg 0x0002: 0x00000000
1637 13:53:18.090657 PCI: 00:1f.0 init finished in 21 msecs
1638 13:53:18.094128 PCI: 00:1f.2 init
1639 13:53:18.097228 Disabling ACPI via APMC.
1640 13:53:18.100424 APMC done.
1641 13:53:18.103906 PCI: 00:1f.2 init finished in 5 msecs
1642 13:53:18.115117 PCI: 01:00.0 init
1643 13:53:18.118390 PCI: 01:00.0 init finished in 0 msecs
1644 13:53:18.121424 PNP: 0c09.0 init
1645 13:53:18.124658 Google Chrome EC uptime: 8.425 seconds
1646 13:53:18.131311 Google Chrome AP resets since EC boot: 0
1647 13:53:18.134548 Google Chrome most recent AP reset causes:
1648 13:53:18.141547 Google Chrome EC reset flags at last EC boot: reset-pin
1649 13:53:18.144372 PNP: 0c09.0 init finished in 18 msecs
1650 13:53:18.149382 Devices initialized
1651 13:53:18.152657 Show all devs... After init.
1652 13:53:18.156030 Root Device: enabled 1
1653 13:53:18.156130 DOMAIN: 0000: enabled 1
1654 13:53:18.159346 CPU_CLUSTER: 0: enabled 1
1655 13:53:18.162675 PCI: 00:00.0: enabled 1
1656 13:53:18.166144 PCI: 00:02.0: enabled 1
1657 13:53:18.166241 PCI: 00:04.0: enabled 1
1658 13:53:18.169233 PCI: 00:05.0: enabled 1
1659 13:53:18.172502 PCI: 00:06.0: enabled 0
1660 13:53:18.175765 PCI: 00:07.0: enabled 0
1661 13:53:18.175897 PCI: 00:07.1: enabled 0
1662 13:53:18.179352 PCI: 00:07.2: enabled 0
1663 13:53:18.182579 PCI: 00:07.3: enabled 0
1664 13:53:18.185901 PCI: 00:08.0: enabled 1
1665 13:53:18.185999 PCI: 00:09.0: enabled 0
1666 13:53:18.189161 PCI: 00:0a.0: enabled 0
1667 13:53:18.192567 PCI: 00:0d.0: enabled 1
1668 13:53:18.195712 PCI: 00:0d.1: enabled 0
1669 13:53:18.195809 PCI: 00:0d.2: enabled 0
1670 13:53:18.199063 PCI: 00:0d.3: enabled 0
1671 13:53:18.202303 PCI: 00:0e.0: enabled 0
1672 13:53:18.202408 PCI: 00:10.2: enabled 1
1673 13:53:18.205743 PCI: 00:10.6: enabled 0
1674 13:53:18.209102 PCI: 00:10.7: enabled 0
1675 13:53:18.212478 PCI: 00:12.0: enabled 0
1676 13:53:18.212548 PCI: 00:12.6: enabled 0
1677 13:53:18.215804 PCI: 00:13.0: enabled 0
1678 13:53:18.219165 PCI: 00:14.0: enabled 1
1679 13:53:18.222237 PCI: 00:14.1: enabled 0
1680 13:53:18.222333 PCI: 00:14.2: enabled 1
1681 13:53:18.225805 PCI: 00:14.3: enabled 1
1682 13:53:18.228747 PCI: 00:15.0: enabled 1
1683 13:53:18.231980 PCI: 00:15.1: enabled 1
1684 13:53:18.232053 PCI: 00:15.2: enabled 1
1685 13:53:18.235329 PCI: 00:15.3: enabled 1
1686 13:53:18.238899 PCI: 00:16.0: enabled 1
1687 13:53:18.238998 PCI: 00:16.1: enabled 0
1688 13:53:18.242114 PCI: 00:16.2: enabled 0
1689 13:53:18.245265 PCI: 00:16.3: enabled 0
1690 13:53:18.248676 PCI: 00:16.4: enabled 0
1691 13:53:18.248750 PCI: 00:16.5: enabled 0
1692 13:53:18.252121 PCI: 00:17.0: enabled 0
1693 13:53:18.255362 PCI: 00:19.0: enabled 0
1694 13:53:18.258717 PCI: 00:19.1: enabled 1
1695 13:53:18.258813 PCI: 00:19.2: enabled 0
1696 13:53:18.262015 PCI: 00:1c.0: enabled 1
1697 13:53:18.265567 PCI: 00:1c.1: enabled 0
1698 13:53:18.268725 PCI: 00:1c.2: enabled 0
1699 13:53:18.268797 PCI: 00:1c.3: enabled 0
1700 13:53:18.271925 PCI: 00:1c.4: enabled 0
1701 13:53:18.275253 PCI: 00:1c.5: enabled 0
1702 13:53:18.278544 PCI: 00:1c.6: enabled 1
1703 13:53:18.278642 PCI: 00:1c.7: enabled 0
1704 13:53:18.281864 PCI: 00:1d.0: enabled 1
1705 13:53:18.285205 PCI: 00:1d.1: enabled 0
1706 13:53:18.288379 PCI: 00:1d.2: enabled 1
1707 13:53:18.288453 PCI: 00:1d.3: enabled 0
1708 13:53:18.291773 PCI: 00:1e.0: enabled 1
1709 13:53:18.295147 PCI: 00:1e.1: enabled 0
1710 13:53:18.295222 PCI: 00:1e.2: enabled 1
1711 13:53:18.298336 PCI: 00:1e.3: enabled 1
1712 13:53:18.301744 PCI: 00:1f.0: enabled 1
1713 13:53:18.304918 PCI: 00:1f.1: enabled 0
1714 13:53:18.304990 PCI: 00:1f.2: enabled 1
1715 13:53:18.308353 PCI: 00:1f.3: enabled 1
1716 13:53:18.311704 PCI: 00:1f.4: enabled 0
1717 13:53:18.314779 PCI: 00:1f.5: enabled 1
1718 13:53:18.314878 PCI: 00:1f.6: enabled 0
1719 13:53:18.318536 PCI: 00:1f.7: enabled 0
1720 13:53:18.321646 APIC: 00: enabled 1
1721 13:53:18.321746 GENERIC: 0.0: enabled 1
1722 13:53:18.324949 GENERIC: 0.0: enabled 1
1723 13:53:18.328201 GENERIC: 1.0: enabled 1
1724 13:53:18.331280 GENERIC: 0.0: enabled 1
1725 13:53:18.331350 GENERIC: 1.0: enabled 1
1726 13:53:18.334589 USB0 port 0: enabled 1
1727 13:53:18.338394 GENERIC: 0.0: enabled 1
1728 13:53:18.341155 USB0 port 0: enabled 1
1729 13:53:18.341258 GENERIC: 0.0: enabled 1
1730 13:53:18.344770 I2C: 00:1a: enabled 1
1731 13:53:18.348028 I2C: 00:31: enabled 1
1732 13:53:18.348104 I2C: 00:32: enabled 1
1733 13:53:18.351425 I2C: 00:10: enabled 1
1734 13:53:18.354730 I2C: 00:15: enabled 1
1735 13:53:18.354832 GENERIC: 0.0: enabled 0
1736 13:53:18.358112 GENERIC: 1.0: enabled 0
1737 13:53:18.361341 GENERIC: 0.0: enabled 1
1738 13:53:18.361444 SPI: 00: enabled 1
1739 13:53:18.364841 SPI: 00: enabled 1
1740 13:53:18.367989 PNP: 0c09.0: enabled 1
1741 13:53:18.371404 GENERIC: 0.0: enabled 1
1742 13:53:18.371502 USB3 port 0: enabled 1
1743 13:53:18.374260 USB3 port 1: enabled 1
1744 13:53:18.377783 USB3 port 2: enabled 0
1745 13:53:18.377886 USB3 port 3: enabled 0
1746 13:53:18.381138 USB2 port 0: enabled 0
1747 13:53:18.384376 USB2 port 1: enabled 1
1748 13:53:18.384466 USB2 port 2: enabled 1
1749 13:53:18.387798 USB2 port 3: enabled 0
1750 13:53:18.391254 USB2 port 4: enabled 1
1751 13:53:18.394662 USB2 port 5: enabled 0
1752 13:53:18.394762 USB2 port 6: enabled 0
1753 13:53:18.397941 USB2 port 7: enabled 0
1754 13:53:18.401224 USB2 port 8: enabled 0
1755 13:53:18.401325 USB2 port 9: enabled 0
1756 13:53:18.404620 USB3 port 0: enabled 0
1757 13:53:18.408028 USB3 port 1: enabled 1
1758 13:53:18.411338 USB3 port 2: enabled 0
1759 13:53:18.411468 USB3 port 3: enabled 0
1760 13:53:18.414319 GENERIC: 0.0: enabled 1
1761 13:53:18.417570 GENERIC: 1.0: enabled 1
1762 13:53:18.417648 APIC: 01: enabled 1
1763 13:53:18.421049 APIC: 03: enabled 1
1764 13:53:18.424367 APIC: 07: enabled 1
1765 13:53:18.424476 APIC: 05: enabled 1
1766 13:53:18.427533 APIC: 04: enabled 1
1767 13:53:18.427688 APIC: 02: enabled 1
1768 13:53:18.430760 APIC: 06: enabled 1
1769 13:53:18.434399 PCI: 01:00.0: enabled 1
1770 13:53:18.437660 BS: BS_DEV_INIT run times (exec / console): 29 / 536 ms
1771 13:53:18.443863 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1772 13:53:18.447433 ELOG: NV offset 0xf30000 size 0x1000
1773 13:53:18.454486 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1774 13:53:18.461094 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:18 UTC
1775 13:53:18.467363 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:18 UTC
1776 13:53:18.473971 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:18 UTC
1777 13:53:18.481070 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:18 UTC
1778 13:53:18.487341 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:18 UTC
1779 13:53:18.493898 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1780 13:53:18.500554 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:18 UTC
1781 13:53:18.507081 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1782 13:53:18.513806 ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:18 UTC
1783 13:53:18.517234 elog_add_boot_reason: Logged dev mode boot
1784 13:53:18.523626 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1785 13:53:18.523764 Finalize devices...
1786 13:53:18.527210 Devices finalized
1787 13:53:18.533765 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1788 13:53:18.537223 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1789 13:53:18.543351 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1790 13:53:18.546704 ME: HFSTS1 : 0x80030055
1791 13:53:18.553412 ME: HFSTS2 : 0x30280116
1792 13:53:18.556697 ME: HFSTS3 : 0x00000050
1793 13:53:18.559800 ME: HFSTS4 : 0x00004000
1794 13:53:18.566883 ME: HFSTS5 : 0x00000000
1795 13:53:18.570224 ME: HFSTS6 : 0x00400006
1796 13:53:18.573474 ME: Manufacturing Mode : YES
1797 13:53:18.576384 ME: SPI Protection Mode Enabled : NO
1798 13:53:18.583144 ME: FW Partition Table : OK
1799 13:53:18.586335 ME: Bringup Loader Failure : NO
1800 13:53:18.589929 ME: Firmware Init Complete : NO
1801 13:53:18.593324 ME: Boot Options Present : NO
1802 13:53:18.596521 ME: Update In Progress : NO
1803 13:53:18.599785 ME: D0i3 Support : YES
1804 13:53:18.603300 ME: Low Power State Enabled : NO
1805 13:53:18.606516 ME: CPU Replaced : YES
1806 13:53:18.613208 ME: CPU Replacement Valid : YES
1807 13:53:18.616554 ME: Current Working State : 5
1808 13:53:18.619699 ME: Current Operation State : 1
1809 13:53:18.622785 ME: Current Operation Mode : 3
1810 13:53:18.626305 ME: Error Code : 0
1811 13:53:18.629425 ME: Enhanced Debug Mode : NO
1812 13:53:18.633145 ME: CPU Debug Disabled : YES
1813 13:53:18.636310 ME: TXT Support : NO
1814 13:53:18.642918 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1815 13:53:18.652941 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1816 13:53:18.655946 CBFS: 'fallback/slic' not found.
1817 13:53:18.659136 ACPI: Writing ACPI tables at 76b01000.
1818 13:53:18.659302 ACPI: * FACS
1819 13:53:18.662322 ACPI: * DSDT
1820 13:53:18.665661 Ramoops buffer: 0x100000@0x76a00000.
1821 13:53:18.669111 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1822 13:53:18.675687 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1823 13:53:18.679065 Google Chrome EC: version:
1824 13:53:18.682528 ro: voema_v2.0.10114-a447f03e46
1825 13:53:18.685854 rw: voema_v2.0.10114-a447f03e46
1826 13:53:18.685963 running image: 1
1827 13:53:18.692180 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1828 13:53:18.697452 ACPI: * FADT
1829 13:53:18.697609 SCI is IRQ9
1830 13:53:18.703652 ACPI: added table 1/32, length now 40
1831 13:53:18.703796 ACPI: * SSDT
1832 13:53:18.707037 Found 1 CPU(s) with 8 core(s) each.
1833 13:53:18.713619 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1834 13:53:18.716875 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1835 13:53:18.720401 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1836 13:53:18.723622 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1837 13:53:18.730552 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1838 13:53:18.736829 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1839 13:53:18.740493 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1840 13:53:18.746808 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1841 13:53:18.753452 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1842 13:53:18.756641 \_SB.PCI0.RP09: Added StorageD3Enable property
1843 13:53:18.760289 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1844 13:53:18.766811 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1845 13:53:18.773652 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1846 13:53:18.776954 PS2K: Passing 80 keymaps to kernel
1847 13:53:18.783511 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1848 13:53:18.790149 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1849 13:53:18.796834 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1850 13:53:18.803270 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1851 13:53:18.809966 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1852 13:53:18.816634 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1853 13:53:18.823116 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1854 13:53:18.829756 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1855 13:53:18.832951 ACPI: added table 2/32, length now 44
1856 13:53:18.833074 ACPI: * MCFG
1857 13:53:18.836198 ACPI: added table 3/32, length now 48
1858 13:53:18.839957 ACPI: * TPM2
1859 13:53:18.843291 TPM2 log created at 0x769f0000
1860 13:53:18.846390 ACPI: added table 4/32, length now 52
1861 13:53:18.846499 ACPI: * MADT
1862 13:53:18.849713 SCI is IRQ9
1863 13:53:18.853343 ACPI: added table 5/32, length now 56
1864 13:53:18.856197 current = 76b09850
1865 13:53:18.856295 ACPI: * DMAR
1866 13:53:18.859533 ACPI: added table 6/32, length now 60
1867 13:53:18.863271 ACPI: added table 7/32, length now 64
1868 13:53:18.866440 ACPI: * HPET
1869 13:53:18.869574 ACPI: added table 8/32, length now 68
1870 13:53:18.869705 ACPI: done.
1871 13:53:18.872965 ACPI tables: 35216 bytes.
1872 13:53:18.876318 smbios_write_tables: 769ef000
1873 13:53:18.880256 EC returned error result code 3
1874 13:53:18.883614 Couldn't obtain OEM name from CBI
1875 13:53:18.887505 Create SMBIOS type 16
1876 13:53:18.890851 Create SMBIOS type 17
1877 13:53:18.894399 GENERIC: 0.0 (WIFI Device)
1878 13:53:18.894504 SMBIOS tables: 1750 bytes.
1879 13:53:18.900646 Writing table forward entry at 0x00000500
1880 13:53:18.907434 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1881 13:53:18.911023 Writing coreboot table at 0x76b25000
1882 13:53:18.917065 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1883 13:53:18.920605 1. 0000000000001000-000000000009ffff: RAM
1884 13:53:18.923688 2. 00000000000a0000-00000000000fffff: RESERVED
1885 13:53:18.930323 3. 0000000000100000-00000000769eefff: RAM
1886 13:53:18.933671 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1887 13:53:18.940561 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1888 13:53:18.946864 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1889 13:53:18.950132 7. 0000000077000000-000000007fbfffff: RESERVED
1890 13:53:18.956920 8. 00000000c0000000-00000000cfffffff: RESERVED
1891 13:53:18.960144 9. 00000000f8000000-00000000f9ffffff: RESERVED
1892 13:53:18.963550 10. 00000000fb000000-00000000fb000fff: RESERVED
1893 13:53:18.970379 11. 00000000fe000000-00000000fe00ffff: RESERVED
1894 13:53:18.973703 12. 00000000fed80000-00000000fed87fff: RESERVED
1895 13:53:18.980282 13. 00000000fed90000-00000000fed92fff: RESERVED
1896 13:53:18.983760 14. 00000000feda0000-00000000feda1fff: RESERVED
1897 13:53:18.989909 15. 00000000fedc0000-00000000feddffff: RESERVED
1898 13:53:18.993364 16. 0000000100000000-00000002803fffff: RAM
1899 13:53:18.996665 Passing 4 GPIOs to payload:
1900 13:53:19.000009 NAME | PORT | POLARITY | VALUE
1901 13:53:19.006500 lid | undefined | high | high
1902 13:53:19.013308 power | undefined | high | low
1903 13:53:19.016620 oprom | undefined | high | low
1904 13:53:19.023470 EC in RW | 0x000000e5 | high | low
1905 13:53:19.029860 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4a43
1906 13:53:19.030001 coreboot table: 1576 bytes.
1907 13:53:19.036793 IMD ROOT 0. 0x76fff000 0x00001000
1908 13:53:19.040006 IMD SMALL 1. 0x76ffe000 0x00001000
1909 13:53:19.043348 FSP MEMORY 2. 0x76c4e000 0x003b0000
1910 13:53:19.046472 VPD 3. 0x76c4d000 0x00000367
1911 13:53:19.049874 RO MCACHE 4. 0x76c4c000 0x00000fdc
1912 13:53:19.053124 CONSOLE 5. 0x76c2c000 0x00020000
1913 13:53:19.056308 FMAP 6. 0x76c2b000 0x00000578
1914 13:53:19.059832 TIME STAMP 7. 0x76c2a000 0x00000910
1915 13:53:19.066777 VBOOT WORK 8. 0x76c16000 0x00014000
1916 13:53:19.069982 ROMSTG STCK 9. 0x76c15000 0x00001000
1917 13:53:19.073416 AFTER CAR 10. 0x76c0a000 0x0000b000
1918 13:53:19.076572 RAMSTAGE 11. 0x76b97000 0x00073000
1919 13:53:19.079717 REFCODE 12. 0x76b42000 0x00055000
1920 13:53:19.082979 SMM BACKUP 13. 0x76b32000 0x00010000
1921 13:53:19.086403 4f444749 14. 0x76b30000 0x00002000
1922 13:53:19.089927 EXT VBT15. 0x76b2d000 0x0000219f
1923 13:53:19.093222 COREBOOT 16. 0x76b25000 0x00008000
1924 13:53:19.099718 ACPI 17. 0x76b01000 0x00024000
1925 13:53:19.103006 ACPI GNVS 18. 0x76b00000 0x00001000
1926 13:53:19.106465 RAMOOPS 19. 0x76a00000 0x00100000
1927 13:53:19.109676 TPM2 TCGLOG20. 0x769f0000 0x00010000
1928 13:53:19.112447 SMBIOS 21. 0x769ef000 0x00000800
1929 13:53:19.115970 IMD small region:
1930 13:53:19.119159 IMD ROOT 0. 0x76ffec00 0x00000400
1931 13:53:19.122452 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1932 13:53:19.125895 POWER STATE 2. 0x76ffeb80 0x00000044
1933 13:53:19.129202 ROMSTAGE 3. 0x76ffeb60 0x00000004
1934 13:53:19.135584 MEM INFO 4. 0x76ffe980 0x000001e0
1935 13:53:19.138964 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1936 13:53:19.142812 MTRR: Physical address space:
1937 13:53:19.149249 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1938 13:53:19.155862 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1939 13:53:19.162323 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1940 13:53:19.169392 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1941 13:53:19.176008 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1942 13:53:19.182249 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1943 13:53:19.185497 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1944 13:53:19.192299 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 13:53:19.195602 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 13:53:19.199104 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 13:53:19.202310 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 13:53:19.209037 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 13:53:19.212404 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 13:53:19.215576 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 13:53:19.218904 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 13:53:19.225694 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 13:53:19.228547 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 13:53:19.231861 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 13:53:19.235229 call enable_fixed_mtrr()
1956 13:53:19.238542 CPU physical address size: 39 bits
1957 13:53:19.245096 MTRR: default type WB/UC MTRR counts: 6/6.
1958 13:53:19.248359 MTRR: UC selected as default type.
1959 13:53:19.255379 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1960 13:53:19.258681 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1961 13:53:19.265159 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1962 13:53:19.271911 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1963 13:53:19.278626 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1964 13:53:19.285121 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1965 13:53:19.285229
1966 13:53:19.288462 MTRR check
1967 13:53:19.291778 Fixed MTRRs : Enabled
1968 13:53:19.291887 Variable MTRRs: Enabled
1969 13:53:19.291985
1970 13:53:19.298491 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 13:53:19.301994 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 13:53:19.305215 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 13:53:19.308502 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 13:53:19.311791 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 13:53:19.318384 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 13:53:19.321608 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 13:53:19.324869 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 13:53:19.328311 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 13:53:19.335007 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 13:53:19.338353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 13:53:19.344581 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1982 13:53:19.348112 call enable_fixed_mtrr()
1983 13:53:19.351256 Checking cr50 for pending updates
1984 13:53:19.354987 CPU physical address size: 39 bits
1985 13:53:19.358692 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 13:53:19.361671 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 13:53:19.365136 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 13:53:19.371586 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 13:53:19.374792 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 13:53:19.378062 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 13:53:19.381415 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 13:53:19.388312 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 13:53:19.391319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 13:53:19.394751 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 13:53:19.397959 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 13:53:19.404777 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 13:53:19.408150 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 13:53:19.411444 call enable_fixed_mtrr()
1999 13:53:19.414765 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 13:53:19.418165 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 13:53:19.424644 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 13:53:19.427975 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 13:53:19.430723 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 13:53:19.434106 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 13:53:19.440753 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 13:53:19.444235 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 13:53:19.447570 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 13:53:19.450822 CPU physical address size: 39 bits
2009 13:53:19.457706 call enable_fixed_mtrr()
2010 13:53:19.460994 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 13:53:19.464227 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 13:53:19.467453 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 13:53:19.474258 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 13:53:19.477402 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 13:53:19.481053 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 13:53:19.484313 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 13:53:19.487503 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 13:53:19.493862 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 13:53:19.497059 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 13:53:19.500546 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 13:53:19.503792 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 13:53:19.510479 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 13:53:19.513713 call enable_fixed_mtrr()
2024 13:53:19.516927 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 13:53:19.520411 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 13:53:19.523570 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 13:53:19.530343 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 13:53:19.533864 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 13:53:19.537195 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 13:53:19.540021 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 13:53:19.546583 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 13:53:19.549908 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 13:53:19.553640 CPU physical address size: 39 bits
2034 13:53:19.557264 call enable_fixed_mtrr()
2035 13:53:19.560591 CPU physical address size: 39 bits
2036 13:53:19.564337 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 13:53:19.570693 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 13:53:19.573870 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 13:53:19.577547 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 13:53:19.580494 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 13:53:19.587351 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 13:53:19.590494 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 13:53:19.593662 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 13:53:19.597241 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 13:53:19.603646 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 13:53:19.607181 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 13:53:19.610330 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 13:53:19.616919 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 13:53:19.617001 call enable_fixed_mtrr()
2050 13:53:19.623710 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 13:53:19.627018 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 13:53:19.630329 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 13:53:19.633689 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 13:53:19.640368 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 13:53:19.643750 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 13:53:19.647009 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 13:53:19.650473 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 13:53:19.657154 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 13:53:19.660450 CPU physical address size: 39 bits
2060 13:53:19.663610 call enable_fixed_mtrr()
2061 13:53:19.667416 Reading cr50 TPM mode
2062 13:53:19.670941 CPU physical address size: 39 bits
2063 13:53:19.674419 CPU physical address size: 39 bits
2064 13:53:19.677561 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2065 13:53:19.687566 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2066 13:53:19.691020 Checking segment from ROM address 0xffc02b38
2067 13:53:19.694357 Checking segment from ROM address 0xffc02b54
2068 13:53:19.700747 Loading segment from ROM address 0xffc02b38
2069 13:53:19.700860 code (compression=0)
2070 13:53:19.711132 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2071 13:53:19.721100 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2072 13:53:19.721238 it's not compressed!
2073 13:53:19.860290 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2074 13:53:19.866939 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2075 13:53:19.873778 Loading segment from ROM address 0xffc02b54
2076 13:53:19.873863 Entry Point 0x30000000
2077 13:53:19.877119 Loaded segments
2078 13:53:19.883724 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2079 13:53:19.926518 Finalizing chipset.
2080 13:53:19.929717 Finalizing SMM.
2081 13:53:19.929801 APMC done.
2082 13:53:19.936447 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2083 13:53:19.939744 mp_park_aps done after 0 msecs.
2084 13:53:19.942961 Jumping to boot code at 0x30000000(0x76b25000)
2085 13:53:19.953170 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2086 13:53:19.953254
2087 13:53:19.953319
2088 13:53:19.953383
2089 13:53:19.956541 Starting depthcharge on Voema...
2090 13:53:19.956622
2091 13:53:19.956954 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2092 13:53:19.957052 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2093 13:53:19.957135 Setting prompt string to ['volteer:']
2094 13:53:19.957213 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2095 13:53:19.966438 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2096 13:53:19.966524
2097 13:53:19.973079 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2098 13:53:19.973161
2099 13:53:19.979191 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2100 13:53:19.979272
2101 13:53:19.982982 Failed to find eMMC card reader
2102 13:53:19.983064
2103 13:53:19.983128 Wipe memory regions:
2104 13:53:19.983188
2105 13:53:19.989531 [0x00000000001000, 0x000000000a0000)
2106 13:53:19.989614
2107 13:53:19.992732 [0x00000000100000, 0x00000030000000)
2108 13:53:20.017832
2109 13:53:20.020844 [0x00000032662db0, 0x000000769ef000)
2110 13:53:20.056625
2111 13:53:20.060067 [0x00000100000000, 0x00000280400000)
2112 13:53:20.262016
2113 13:53:20.265253 ec_init: CrosEC protocol v3 supported (256, 256)
2114 13:53:20.696104
2115 13:53:20.696242 R8152: Initializing
2116 13:53:20.696309
2117 13:53:20.699246 Version 6 (ocp_data = 5c30)
2118 13:53:20.699328
2119 13:53:20.702578 R8152: Done initializing
2120 13:53:20.702661
2121 13:53:20.705278 Adding net device
2122 13:53:21.006971
2123 13:53:21.010216 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2124 13:53:21.010308
2125 13:53:21.010374
2126 13:53:21.010434
2127 13:53:21.013416 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 13:53:21.113811 volteer: tftpboot 192.168.201.1 10607088/tftp-deploy-_n6vva71/kernel/bzImage 10607088/tftp-deploy-_n6vva71/kernel/cmdline 10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
2130 13:53:21.114064 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 13:53:21.114174 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2132 13:53:21.118196 tftpboot 192.168.201.1 10607088/tftp-deploy-_n6vva71/kernel/bzIploy-_n6vva71/kernel/cmdline 10607088/tftp-deploy-_n6vva71/ramdisk/ramdisk.cpio.gz
2133 13:53:21.118298
2134 13:53:21.118385 Waiting for link
2135 13:53:21.321325
2136 13:53:21.321479 done.
2137 13:53:21.321548
2138 13:53:21.321680 MAC: 00:24:32:30:77:76
2139 13:53:21.321818
2140 13:53:21.324559 Sending DHCP discover... done.
2141 13:53:21.324643
2142 13:53:21.327392 Waiting for reply... done.
2143 13:53:21.327475
2144 13:53:21.330624 Sending DHCP request... done.
2145 13:53:21.330732
2146 13:53:21.337415 Waiting for reply... done.
2147 13:53:21.337500
2148 13:53:21.337589 My ip is 192.168.201.16
2149 13:53:21.337654
2150 13:53:21.344200 The DHCP server ip is 192.168.201.1
2151 13:53:21.344287
2152 13:53:21.347511 TFTP server IP predefined by user: 192.168.201.1
2153 13:53:21.347621
2154 13:53:21.354011 Bootfile predefined by user: 10607088/tftp-deploy-_n6vva71/kernel/bzImage
2155 13:53:21.354098
2156 13:53:21.357283 Sending tftp read request... done.
2157 13:53:21.357376
2158 13:53:21.360541 Waiting for the transfer...
2159 13:53:21.363643
2160 13:53:21.887371 00000000 ################################################################
2161 13:53:21.887557
2162 13:53:22.418269 00080000 ################################################################
2163 13:53:22.418428
2164 13:53:22.957452 00100000 ################################################################
2165 13:53:22.957637
2166 13:53:23.494832 00180000 ################################################################
2167 13:53:23.495014
2168 13:53:24.025617 00200000 ################################################################
2169 13:53:24.025835
2170 13:53:24.552866 00280000 ################################################################
2171 13:53:24.553025
2172 13:53:25.086911 00300000 ################################################################
2173 13:53:25.087057
2174 13:53:25.615975 00380000 ################################################################
2175 13:53:25.616142
2176 13:53:26.134380 00400000 ################################################################
2177 13:53:26.134549
2178 13:53:26.656346 00480000 ################################################################
2179 13:53:26.656481
2180 13:53:27.181634 00500000 ################################################################
2181 13:53:27.181780
2182 13:53:27.717862 00580000 ################################################################
2183 13:53:27.718077
2184 13:53:28.251700 00600000 ################################################################
2185 13:53:28.251900
2186 13:53:28.783077 00680000 ################################################################
2187 13:53:28.783219
2188 13:53:29.313749 00700000 ################################################################
2189 13:53:29.313890
2190 13:53:29.331604 00780000 ## done.
2191 13:53:29.331721
2192 13:53:29.335091 The bootfile was 7880592 bytes long.
2193 13:53:29.335170
2194 13:53:29.338275 Sending tftp read request... done.
2195 13:53:29.338361
2196 13:53:29.341565 Waiting for the transfer...
2197 13:53:29.341673
2198 13:53:29.858268 00000000 ################################################################
2199 13:53:29.858418
2200 13:53:30.383320 00080000 ################################################################
2201 13:53:30.383496
2202 13:53:30.910490 00100000 ################################################################
2203 13:53:30.910641
2204 13:53:31.457164 00180000 ################################################################
2205 13:53:31.457343
2206 13:53:32.014680 00200000 ################################################################
2207 13:53:32.014826
2208 13:53:32.580857 00280000 ################################################################
2209 13:53:32.581014
2210 13:53:33.123030 00300000 ################################################################
2211 13:53:33.123184
2212 13:53:33.698474 00380000 ################################################################
2213 13:53:33.698623
2214 13:53:34.257008 00400000 ################################################################
2215 13:53:34.257190
2216 13:53:34.848301 00480000 ################################################################
2217 13:53:34.848914
2218 13:53:35.424401 00500000 ################################################################
2219 13:53:35.424540
2220 13:53:35.958030 00580000 ################################################################
2221 13:53:35.958192
2222 13:53:36.508936 00600000 ################################################################
2223 13:53:36.509110
2224 13:53:37.054619 00680000 ################################################################
2225 13:53:37.054761
2226 13:53:37.605502 00700000 ################################################################
2227 13:53:37.605654
2228 13:53:38.158909 00780000 ################################################################
2229 13:53:38.159049
2230 13:53:38.605766 00800000 ##################################################### done.
2231 13:53:38.605963
2232 13:53:38.609053 Sending tftp read request... done.
2233 13:53:38.609141
2234 13:53:38.612307 Waiting for the transfer...
2235 13:53:38.612396
2236 13:53:38.612460 00000000 # done.
2237 13:53:38.612524
2238 13:53:38.622323 Command line loaded dynamically from TFTP file: 10607088/tftp-deploy-_n6vva71/kernel/cmdline
2239 13:53:38.622435
2240 13:53:38.635099 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2241 13:53:38.639327
2242 13:53:38.642674 Shutting down all USB controllers.
2243 13:53:38.642770
2244 13:53:38.642835 Removing current net device
2245 13:53:38.642896
2246 13:53:38.646254 Finalizing coreboot
2247 13:53:38.646341
2248 13:53:38.652814 Exiting depthcharge with code 4 at timestamp: 27353536
2249 13:53:38.652913
2250 13:53:38.652979
2251 13:53:38.653040 Starting kernel ...
2252 13:53:38.653097
2253 13:53:38.653154
2254 13:53:38.653522 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2255 13:53:38.653621 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2256 13:53:38.653699 Setting prompt string to ['Linux version [0-9]']
2257 13:53:38.653770 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2258 13:53:38.653838 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2260 13:58:04.653901 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2262 13:58:04.654214 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2264 13:58:04.654444 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2267 13:58:04.654856 end: 2 depthcharge-action (duration 00:05:00) [common]
2269 13:58:04.655196 Cleaning after the job
2270 13:58:04.655325 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/ramdisk
2271 13:58:04.656511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/kernel
2272 13:58:04.657540 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607088/tftp-deploy-_n6vva71/modules
2273 13:58:04.657866 start: 5.1 power-off (timeout 00:00:30) [common]
2274 13:58:04.658024 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2275 13:58:04.734228 >> Command sent successfully.
2276 13:58:04.736831 Returned 0 in 0 seconds
2277 13:58:04.837261 end: 5.1 power-off (duration 00:00:00) [common]
2279 13:58:04.837726 start: 5.2 read-feedback (timeout 00:10:00) [common]
2280 13:58:04.838039 Listened to connection for namespace 'common' for up to 1s
2281 13:58:05.838974 Finalising connection for namespace 'common'
2282 13:58:05.839154 Disconnecting from shell: Finalise
2283 13:58:05.839238
2284 13:58:05.939531 end: 5.2 read-feedback (duration 00:00:01) [common]
2285 13:58:05.939679 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607088
2286 13:58:05.953924 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607088
2287 13:58:05.954100 JobError: Your job cannot terminate cleanly.