Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:52:42.946109 lava-dispatcher, installed at version: 2023.05.1
2 13:52:42.946362 start: 0 validate
3 13:52:42.946514 Start time: 2023-06-06 13:52:42.946506+00:00 (UTC)
4 13:52:42.946670 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:52:42.946827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:52:43.218947 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:52:43.219168 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:52:48.220420 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:52:48.220624 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:52:48.491370 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:52:48.491594 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:52:48.994748 validate duration: 6.05
14 13:52:48.995150 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:52:48.995303 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:52:48.995439 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:52:48.995632 Not decompressing ramdisk as can be used compressed.
18 13:52:48.995778 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 13:52:48.995889 saving as /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/ramdisk/initrd.cpio.gz
20 13:52:48.995996 total size: 5432865 (5MB)
21 13:52:48.997594 progress 0% (0MB)
22 13:52:49.000312 progress 5% (0MB)
23 13:52:49.002797 progress 10% (0MB)
24 13:52:49.005292 progress 15% (0MB)
25 13:52:49.007966 progress 20% (1MB)
26 13:52:49.010371 progress 25% (1MB)
27 13:52:49.012804 progress 30% (1MB)
28 13:52:49.015482 progress 35% (1MB)
29 13:52:49.017952 progress 40% (2MB)
30 13:52:49.020373 progress 45% (2MB)
31 13:52:49.022754 progress 50% (2MB)
32 13:52:49.025532 progress 55% (2MB)
33 13:52:49.027947 progress 60% (3MB)
34 13:52:49.030340 progress 65% (3MB)
35 13:52:49.033128 progress 70% (3MB)
36 13:52:49.035561 progress 75% (3MB)
37 13:52:49.037940 progress 80% (4MB)
38 13:52:49.040356 progress 85% (4MB)
39 13:52:49.043137 progress 90% (4MB)
40 13:52:49.045656 progress 95% (4MB)
41 13:52:49.048152 progress 100% (5MB)
42 13:52:49.048518 5MB downloaded in 0.05s (98.66MB/s)
43 13:52:49.048748 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:52:49.049157 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:52:49.049308 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:52:49.049436 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:52:49.049623 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:52:49.049731 saving as /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/kernel/bzImage
50 13:52:49.049848 total size: 7880592 (7MB)
51 13:52:49.049947 No compression specified
52 13:52:49.051645 progress 0% (0MB)
53 13:52:49.055338 progress 5% (0MB)
54 13:52:49.058994 progress 10% (0MB)
55 13:52:49.062664 progress 15% (1MB)
56 13:52:49.066335 progress 20% (1MB)
57 13:52:49.070029 progress 25% (1MB)
58 13:52:49.073620 progress 30% (2MB)
59 13:52:49.077201 progress 35% (2MB)
60 13:52:49.080800 progress 40% (3MB)
61 13:52:49.084517 progress 45% (3MB)
62 13:52:49.088258 progress 50% (3MB)
63 13:52:49.091996 progress 55% (4MB)
64 13:52:49.095742 progress 60% (4MB)
65 13:52:49.099479 progress 65% (4MB)
66 13:52:49.103208 progress 70% (5MB)
67 13:52:49.106930 progress 75% (5MB)
68 13:52:49.110660 progress 80% (6MB)
69 13:52:49.114365 progress 85% (6MB)
70 13:52:49.118071 progress 90% (6MB)
71 13:52:49.121769 progress 95% (7MB)
72 13:52:49.125492 progress 100% (7MB)
73 13:52:49.125789 7MB downloaded in 0.08s (98.97MB/s)
74 13:52:49.126017 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:52:49.126412 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:52:49.126552 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:52:49.126692 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:52:49.126876 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 13:52:49.126996 saving as /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/nfsrootfs/full.rootfs.tar
81 13:52:49.127102 total size: 133381488 (127MB)
82 13:52:49.127197 Using unxz to decompress xz
83 13:52:49.132217 progress 0% (0MB)
84 13:52:49.519729 progress 5% (6MB)
85 13:52:49.912085 progress 10% (12MB)
86 13:52:50.232890 progress 15% (19MB)
87 13:52:50.444696 progress 20% (25MB)
88 13:52:50.717588 progress 25% (31MB)
89 13:52:51.097575 progress 30% (38MB)
90 13:52:51.484109 progress 35% (44MB)
91 13:52:51.925533 progress 40% (50MB)
92 13:52:52.351125 progress 45% (57MB)
93 13:52:52.750382 progress 50% (63MB)
94 13:52:53.164022 progress 55% (69MB)
95 13:52:53.565759 progress 60% (76MB)
96 13:52:53.971206 progress 65% (82MB)
97 13:52:54.383011 progress 70% (89MB)
98 13:52:54.793131 progress 75% (95MB)
99 13:52:55.283898 progress 80% (101MB)
100 13:52:55.767546 progress 85% (108MB)
101 13:52:56.068772 progress 90% (114MB)
102 13:52:56.468676 progress 95% (120MB)
103 13:52:56.921147 progress 100% (127MB)
104 13:52:56.927179 127MB downloaded in 7.80s (16.31MB/s)
105 13:52:56.927534 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:52:56.927860 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:52:56.927975 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:52:56.928089 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:52:56.928287 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:52:56.928375 saving as /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/modules/modules.tar
112 13:52:56.928467 total size: 251288 (0MB)
113 13:52:56.928557 Using unxz to decompress xz
114 13:52:56.932544 progress 13% (0MB)
115 13:52:56.932976 progress 26% (0MB)
116 13:52:56.933247 progress 39% (0MB)
117 13:52:56.934780 progress 52% (0MB)
118 13:52:56.936869 progress 65% (0MB)
119 13:52:56.939125 progress 78% (0MB)
120 13:52:56.941317 progress 91% (0MB)
121 13:52:56.943497 progress 100% (0MB)
122 13:52:56.949874 0MB downloaded in 0.02s (11.20MB/s)
123 13:52:56.950193 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:52:56.950525 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:52:56.950647 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 13:52:56.950772 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 13:52:59.164237 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607076/extract-nfsrootfs-5itae287
129 13:52:59.164443 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:52:59.164551 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:52:59.164746 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg
132 13:52:59.164901 makedir: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin
133 13:52:59.165019 makedir: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/tests
134 13:52:59.165129 makedir: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/results
135 13:52:59.165241 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-add-keys
136 13:52:59.165394 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-add-sources
137 13:52:59.165533 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-background-process-start
138 13:52:59.165680 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-background-process-stop
139 13:52:59.165850 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-common-functions
140 13:52:59.166017 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-echo-ipv4
141 13:52:59.166186 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-install-packages
142 13:52:59.166358 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-installed-packages
143 13:52:59.166523 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-os-build
144 13:52:59.166690 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-probe-channel
145 13:52:59.166857 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-probe-ip
146 13:52:59.167024 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-target-ip
147 13:52:59.167190 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-target-mac
148 13:52:59.167355 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-target-storage
149 13:52:59.167526 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-case
150 13:52:59.167660 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-event
151 13:52:59.167792 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-feedback
152 13:52:59.167928 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-raise
153 13:52:59.168059 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-reference
154 13:52:59.168195 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-runner
155 13:52:59.168325 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-set
156 13:52:59.168459 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-test-shell
157 13:52:59.168591 Updating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-install-packages (oe)
158 13:52:59.168759 Updating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/bin/lava-installed-packages (oe)
159 13:52:59.168898 Creating /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/environment
160 13:52:59.169001 LAVA metadata
161 13:52:59.169084 - LAVA_JOB_ID=10607076
162 13:52:59.169153 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:52:59.169267 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:52:59.169339 skipped lava-vland-overlay
165 13:52:59.169422 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:52:59.169508 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:52:59.169582 skipped lava-multinode-overlay
168 13:52:59.169662 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:52:59.169749 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:52:59.169832 Loading test definitions
171 13:52:59.169932 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 13:52:59.170009 Using /lava-10607076 at stage 0
173 13:52:59.170343 uuid=10607076_1.5.2.3.1 testdef=None
174 13:52:59.170440 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:52:59.170532 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 13:52:59.171074 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:52:59.171319 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 13:52:59.172108 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:52:59.172361 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 13:52:59.173030 runner path: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/0/tests/0_dmesg test_uuid 10607076_1.5.2.3.1
183 13:52:59.173195 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:52:59.173441 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 13:52:59.173518 Using /lava-10607076 at stage 1
187 13:52:59.173838 uuid=10607076_1.5.2.3.5 testdef=None
188 13:52:59.173937 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:52:59.174031 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 13:52:59.174530 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:52:59.174764 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 13:52:59.175465 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:52:59.175715 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 13:52:59.176397 runner path: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/1/tests/1_bootrr test_uuid 10607076_1.5.2.3.5
197 13:52:59.176561 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:52:59.176783 Creating lava-test-runner.conf files
200 13:52:59.176852 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/0 for stage 0
201 13:52:59.176947 - 0_dmesg
202 13:52:59.177032 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607076/lava-overlay-e3bpicrg/lava-10607076/1 for stage 1
203 13:52:59.177128 - 1_bootrr
204 13:52:59.177228 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:52:59.177321 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 13:52:59.185342 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:52:59.185479 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 13:52:59.185574 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:52:59.185669 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:52:59.185761 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 13:52:59.332247 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:52:59.332644 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 13:52:59.332777 extracting modules file /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607076/extract-nfsrootfs-5itae287
214 13:52:59.347756 extracting modules file /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607076/extract-overlay-ramdisk-jsqlyg02/ramdisk
215 13:52:59.362049 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:52:59.362221 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 13:52:59.362322 [common] Applying overlay to NFS
218 13:52:59.362400 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607076/compress-overlay-2lbjokwp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607076/extract-nfsrootfs-5itae287
219 13:52:59.371314 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:52:59.371473 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 13:52:59.371577 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:52:59.371682 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 13:52:59.371778 Building ramdisk /var/lib/lava/dispatcher/tmp/10607076/extract-overlay-ramdisk-jsqlyg02/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607076/extract-overlay-ramdisk-jsqlyg02/ramdisk
224 13:52:59.442995 >> 26161 blocks
225 13:53:00.046702 rename /var/lib/lava/dispatcher/tmp/10607076/extract-overlay-ramdisk-jsqlyg02/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
226 13:53:00.047160 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:53:00.047306 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 13:53:00.047421 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 13:53:00.047538 No mkimage arch provided, not using FIT.
230 13:53:00.047634 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:53:00.047727 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:53:00.047843 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:53:00.047948 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 13:53:00.048033 No LXC device requested
235 13:53:00.048124 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:53:00.048222 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 13:53:00.048314 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:53:00.048399 Checking files for TFTP limit of 4294967296 bytes.
239 13:53:00.048836 end: 1 tftp-deploy (duration 00:00:11) [common]
240 13:53:00.048952 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:53:00.049053 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:53:00.049187 substitutions:
243 13:53:00.049260 - {DTB}: None
244 13:53:00.049330 - {INITRD}: 10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
245 13:53:00.049395 - {KERNEL}: 10607076/tftp-deploy-rot6iup9/kernel/bzImage
246 13:53:00.049460 - {LAVA_MAC}: None
247 13:53:00.049521 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607076/extract-nfsrootfs-5itae287
248 13:53:00.049583 - {NFS_SERVER_IP}: 192.168.201.1
249 13:53:00.049644 - {PRESEED_CONFIG}: None
250 13:53:00.049705 - {PRESEED_LOCAL}: None
251 13:53:00.049767 - {RAMDISK}: 10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
252 13:53:00.049828 - {ROOT_PART}: None
253 13:53:00.049888 - {ROOT}: None
254 13:53:00.049948 - {SERVER_IP}: 192.168.201.1
255 13:53:00.050008 - {TEE}: None
256 13:53:00.050068 Parsed boot commands:
257 13:53:00.050127 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:53:00.050323 Parsed boot commands: tftpboot 192.168.201.1 10607076/tftp-deploy-rot6iup9/kernel/bzImage 10607076/tftp-deploy-rot6iup9/kernel/cmdline 10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
259 13:53:00.050423 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:53:00.050514 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:53:00.050617 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:53:00.050710 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:53:00.050788 Not connected, no need to disconnect.
264 13:53:00.050869 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:53:00.050964 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:53:00.051043 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
267 13:53:00.054871 Setting prompt string to ['lava-test: # ']
268 13:53:00.055257 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:53:00.055380 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:53:00.055508 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:53:00.055646 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:53:00.055902 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 13:53:05.195128 >> Command sent successfully.
274 13:53:05.197893 Returned 0 in 5 seconds
275 13:53:05.298370 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:53:05.298879 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:53:05.299038 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:53:05.299177 Setting prompt string to 'Starting depthcharge on Helios...'
280 13:53:05.299292 Changing prompt to 'Starting depthcharge on Helios...'
281 13:53:05.299405 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 13:53:05.299815 [Enter `^Ec?' for help]
283 13:53:05.920904
284 13:53:05.921106
285 13:53:05.930615 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 13:53:05.933900 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 13:53:05.940763 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 13:53:05.943820 CPU: AES supported, TXT NOT supported, VT supported
289 13:53:05.950870 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 13:53:05.954020 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 13:53:05.960608 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 13:53:05.964299 VBOOT: Loading verstage.
293 13:53:05.967400 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 13:53:05.973796 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 13:53:05.977672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 13:53:05.980728 CBFS @ c08000 size 3f8000
297 13:53:05.987558 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 13:53:05.990698 CBFS: Locating 'fallback/verstage'
299 13:53:05.994009 CBFS: Found @ offset 10fb80 size 1072c
300 13:53:05.994114
301 13:53:05.994200
302 13:53:06.007228 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 13:53:06.021537 Probing TPM: . done!
304 13:53:06.024771 TPM ready after 0 ms
305 13:53:06.027954 Connected to device vid:did:rid of 1ae0:0028:00
306 13:53:06.038285 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 13:53:06.042128 Initialized TPM device CR50 revision 0
308 13:53:06.083686 tlcl_send_startup: Startup return code is 0
309 13:53:06.083883 TPM: setup succeeded
310 13:53:06.096671 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 13:53:06.100448 Chrome EC: UHEPI supported
312 13:53:06.103602 Phase 1
313 13:53:06.106718 FMAP: area GBB found @ c05000 (12288 bytes)
314 13:53:06.113719 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 13:53:06.113915 Phase 2
316 13:53:06.116734 Phase 3
317 13:53:06.119974 FMAP: area GBB found @ c05000 (12288 bytes)
318 13:53:06.127165 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 13:53:06.133539 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 13:53:06.136705 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 13:53:06.143794 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 13:53:06.158747 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 13:53:06.162638 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 13:53:06.168845 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 13:53:06.173245 Phase 4
326 13:53:06.176543 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 13:53:06.183076 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 13:53:06.362413 VB2:vb2_rsa_verify_digest() Digest check failed!
329 13:53:06.369166 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 13:53:06.369358 Saving nvdata
331 13:53:06.372847 Reboot requested (10020007)
332 13:53:06.375981 board_reset() called!
333 13:53:06.376125 full_reset() called!
334 13:53:10.887426
335 13:53:10.887586
336 13:53:10.897282 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 13:53:10.900496 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 13:53:10.907295 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 13:53:10.910490 CPU: AES supported, TXT NOT supported, VT supported
340 13:53:10.917332 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 13:53:10.920457 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 13:53:10.927115 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 13:53:10.930310 VBOOT: Loading verstage.
344 13:53:10.933426 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 13:53:10.940342 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 13:53:10.943608 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 13:53:10.946629 CBFS @ c08000 size 3f8000
348 13:53:10.953788 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 13:53:10.956767 CBFS: Locating 'fallback/verstage'
350 13:53:10.959797 CBFS: Found @ offset 10fb80 size 1072c
351 13:53:10.963575
352 13:53:10.963694
353 13:53:10.973835 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 13:53:10.988014 Probing TPM: . done!
355 13:53:10.991887 TPM ready after 0 ms
356 13:53:10.995183 Connected to device vid:did:rid of 1ae0:0028:00
357 13:53:11.004874 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 13:53:11.008589 Initialized TPM device CR50 revision 0
359 13:53:11.049748 tlcl_send_startup: Startup return code is 0
360 13:53:11.049925 TPM: setup succeeded
361 13:53:11.062330 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 13:53:11.066459 Chrome EC: UHEPI supported
363 13:53:11.069497 Phase 1
364 13:53:11.072659 FMAP: area GBB found @ c05000 (12288 bytes)
365 13:53:11.079394 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 13:53:11.086139 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 13:53:11.089315 Recovery requested (1009000e)
368 13:53:11.095121 Saving nvdata
369 13:53:11.101410 tlcl_extend: response is 0
370 13:53:11.110384 tlcl_extend: response is 0
371 13:53:11.117368 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 13:53:11.120546 CBFS @ c08000 size 3f8000
373 13:53:11.126998 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 13:53:11.130192 CBFS: Locating 'fallback/romstage'
375 13:53:11.133422 CBFS: Found @ offset 80 size 145fc
376 13:53:11.136717 Accumulated console time in verstage 98 ms
377 13:53:11.136881
378 13:53:11.137013
379 13:53:11.150158 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 13:53:11.156810 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 13:53:11.160078 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 13:53:11.163274 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 13:53:11.170134 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 13:53:11.173196 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 13:53:11.176940 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 13:53:11.179952 TCO_STS: 0000 0000
387 13:53:11.183682 GEN_PMCON: e0015238 00000200
388 13:53:11.186839 GBLRST_CAUSE: 00000000 00000000
389 13:53:11.186958 prev_sleep_state 5
390 13:53:11.190040 Boot Count incremented to 58435
391 13:53:11.196572 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 13:53:11.199782 CBFS @ c08000 size 3f8000
393 13:53:11.206342 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 13:53:11.206440 CBFS: Locating 'fspm.bin'
395 13:53:11.212897 CBFS: Found @ offset 5ffc0 size 71000
396 13:53:11.216673 Chrome EC: UHEPI supported
397 13:53:11.222743 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 13:53:11.226721 Probing TPM: done!
399 13:53:11.233275 Connected to device vid:did:rid of 1ae0:0028:00
400 13:53:11.243256 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 13:53:11.248967 Initialized TPM device CR50 revision 0
402 13:53:11.258463 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 13:53:11.264567 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 13:53:11.267807 MRC cache found, size 1948
405 13:53:11.271608 bootmode is set to: 2
406 13:53:11.274712 PRMRR disabled by config.
407 13:53:11.278099 SPD INDEX = 1
408 13:53:11.281237 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 13:53:11.284712 CBFS @ c08000 size 3f8000
410 13:53:11.291371 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 13:53:11.291483 CBFS: Locating 'spd.bin'
412 13:53:11.294487 CBFS: Found @ offset 5fb80 size 400
413 13:53:11.297492 SPD: module type is LPDDR3
414 13:53:11.301239 SPD: module part is
415 13:53:11.307670 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 13:53:11.310946 SPD: device width 4 bits, bus width 8 bits
417 13:53:11.314372 SPD: module size is 4096 MB (per channel)
418 13:53:11.317488 memory slot: 0 configuration done.
419 13:53:11.320599 memory slot: 2 configuration done.
420 13:53:11.372378 CBMEM:
421 13:53:11.375573 IMD: root @ 99fff000 254 entries.
422 13:53:11.379331 IMD: root @ 99ffec00 62 entries.
423 13:53:11.382607 External stage cache:
424 13:53:11.385819 IMD: root @ 9abff000 254 entries.
425 13:53:11.389008 IMD: root @ 9abfec00 62 entries.
426 13:53:11.396189 Chrome EC: clear events_b mask to 0x0000000020004000
427 13:53:11.408644 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 13:53:11.421939 tlcl_write: response is 0
429 13:53:11.431085 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 13:53:11.437663 MRC: TPM MRC hash updated successfully.
431 13:53:11.437787 2 DIMMs found
432 13:53:11.440976 SMM Memory Map
433 13:53:11.444117 SMRAM : 0x9a000000 0x1000000
434 13:53:11.447258 Subregion 0: 0x9a000000 0xa00000
435 13:53:11.450388 Subregion 1: 0x9aa00000 0x200000
436 13:53:11.454394 Subregion 2: 0x9ac00000 0x400000
437 13:53:11.457752 top_of_ram = 0x9a000000
438 13:53:11.460666 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 13:53:11.467102 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 13:53:11.470526 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 13:53:11.476956 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:53:11.480824 CBFS @ c08000 size 3f8000
443 13:53:11.483991 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:53:11.487125 CBFS: Locating 'fallback/postcar'
445 13:53:11.490434 CBFS: Found @ offset 107000 size 4b44
446 13:53:11.497446 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 13:53:11.509879 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 13:53:11.513002 Processing 180 relocs. Offset value of 0x97c0c000
449 13:53:11.521226 Accumulated console time in romstage 285 ms
450 13:53:11.521351
451 13:53:11.521458
452 13:53:11.530915 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 13:53:11.537653 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 13:53:11.540988 CBFS @ c08000 size 3f8000
455 13:53:11.544268 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 13:53:11.550840 CBFS: Locating 'fallback/ramstage'
457 13:53:11.554171 CBFS: Found @ offset 43380 size 1b9e8
458 13:53:11.560986 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 13:53:11.593024 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 13:53:11.596289 Processing 3976 relocs. Offset value of 0x98db0000
461 13:53:11.602698 Accumulated console time in postcar 52 ms
462 13:53:11.602798
463 13:53:11.602875
464 13:53:11.612943 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 13:53:11.619325 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 13:53:11.623123 WARNING: RO_VPD is uninitialized or empty.
467 13:53:11.626413 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 13:53:11.632949 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 13:53:11.633041 Normal boot.
470 13:53:11.639353 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 13:53:11.643284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 13:53:11.645955 CBFS @ c08000 size 3f8000
473 13:53:11.653086 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 13:53:11.656484 CBFS: Locating 'cpu_microcode_blob.bin'
475 13:53:11.659712 CBFS: Found @ offset 14700 size 2ec00
476 13:53:11.662931 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 13:53:11.666007 Skip microcode update
478 13:53:11.669900 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 13:53:11.673114 CBFS @ c08000 size 3f8000
480 13:53:11.679256 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 13:53:11.682610 CBFS: Locating 'fsps.bin'
482 13:53:11.686535 CBFS: Found @ offset d1fc0 size 35000
483 13:53:11.711209 Detected 4 core, 8 thread CPU.
484 13:53:11.714584 Setting up SMI for CPU
485 13:53:11.717906 IED base = 0x9ac00000
486 13:53:11.718023 IED size = 0x00400000
487 13:53:11.721039 Will perform SMM setup.
488 13:53:11.727713 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 13:53:11.734179 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 13:53:11.737879 Processing 16 relocs. Offset value of 0x00030000
491 13:53:11.741727 Attempting to start 7 APs
492 13:53:11.744520 Waiting for 10ms after sending INIT.
493 13:53:11.760569 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
494 13:53:11.760680 done.
495 13:53:11.764594 AP: slot 3 apic_id 7.
496 13:53:11.767783 AP: slot 6 apic_id 6.
497 13:53:11.767871 AP: slot 1 apic_id 3.
498 13:53:11.771088 AP: slot 7 apic_id 2.
499 13:53:11.774271 AP: slot 5 apic_id 5.
500 13:53:11.774366 AP: slot 2 apic_id 4.
501 13:53:11.780558 Waiting for 2nd SIPI to complete...done.
502 13:53:11.787583 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 13:53:11.790891 Processing 13 relocs. Offset value of 0x00038000
504 13:53:11.797287 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 13:53:11.803825 Installing SMM handler to 0x9a000000
506 13:53:11.810282 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 13:53:11.814168 Processing 658 relocs. Offset value of 0x9a010000
508 13:53:11.823982 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 13:53:11.827284 Processing 13 relocs. Offset value of 0x9a008000
510 13:53:11.834343 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 13:53:11.840517 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 13:53:11.843683 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 13:53:11.850322 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 13:53:11.857023 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 13:53:11.864151 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 13:53:11.867505 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 13:53:11.874177 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 13:53:11.877406 Clearing SMI status registers
519 13:53:11.880620 SMI_STS: PM1
520 13:53:11.880754 PM1_STS: PWRBTN
521 13:53:11.883745 TCO_STS: SECOND_TO
522 13:53:11.887502 New SMBASE 0x9a000000
523 13:53:11.887602 In relocation handler: CPU 0
524 13:53:11.894087 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 13:53:11.897252 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 13:53:11.900438 Relocation complete.
527 13:53:11.900560 New SMBASE 0x99fff000
528 13:53:11.903718 In relocation handler: CPU 4
529 13:53:11.910391 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 13:53:11.914186 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 13:53:11.917501 Relocation complete.
532 13:53:11.917595 New SMBASE 0x99fff400
533 13:53:11.920792 In relocation handler: CPU 3
534 13:53:11.927404 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
535 13:53:11.930749 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 13:53:11.934066 Relocation complete.
537 13:53:11.934200 New SMBASE 0x99ffe800
538 13:53:11.937295 In relocation handler: CPU 6
539 13:53:11.940621 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
540 13:53:11.947266 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 13:53:11.950449 Relocation complete.
542 13:53:11.950568 New SMBASE 0x99ffe400
543 13:53:11.953661 In relocation handler: CPU 7
544 13:53:11.957174 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 13:53:11.963816 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 13:53:11.963906 Relocation complete.
547 13:53:11.967283 New SMBASE 0x99fffc00
548 13:53:11.970478 In relocation handler: CPU 1
549 13:53:11.973672 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
550 13:53:11.980311 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 13:53:11.980449 Relocation complete.
552 13:53:11.983541 New SMBASE 0x99fff800
553 13:53:11.986792 In relocation handler: CPU 2
554 13:53:11.990621 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
555 13:53:11.996946 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 13:53:11.997076 Relocation complete.
557 13:53:12.000351 New SMBASE 0x99ffec00
558 13:53:12.003714 In relocation handler: CPU 5
559 13:53:12.007094 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 13:53:12.013742 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 13:53:12.013874 Relocation complete.
562 13:53:12.016994 Initializing CPU #0
563 13:53:12.020357 CPU: vendor Intel device 806ec
564 13:53:12.023718 CPU: family 06, model 8e, stepping 0c
565 13:53:12.026994 Clearing out pending MCEs
566 13:53:12.030209 Setting up local APIC...
567 13:53:12.030336 apic_id: 0x00 done.
568 13:53:12.033636 Turbo is available but hidden
569 13:53:12.037179 Turbo is available and visible
570 13:53:12.040322 VMX status: enabled
571 13:53:12.043382 IA32_FEATURE_CONTROL status: locked
572 13:53:12.043494 Skip microcode update
573 13:53:12.047186 CPU #0 initialized
574 13:53:12.050146 Initializing CPU #4
575 13:53:12.050250 Initializing CPU #3
576 13:53:12.053456 Initializing CPU #6
577 13:53:12.056632 CPU: vendor Intel device 806ec
578 13:53:12.060700 CPU: family 06, model 8e, stepping 0c
579 13:53:12.063263 CPU: vendor Intel device 806ec
580 13:53:12.067193 CPU: family 06, model 8e, stepping 0c
581 13:53:12.070569 Initializing CPU #7
582 13:53:12.070665 Initializing CPU #1
583 13:53:12.073848 CPU: vendor Intel device 806ec
584 13:53:12.077164 CPU: family 06, model 8e, stepping 0c
585 13:53:12.080548 CPU: vendor Intel device 806ec
586 13:53:12.083686 CPU: family 06, model 8e, stepping 0c
587 13:53:12.086908 Clearing out pending MCEs
588 13:53:12.090130 Clearing out pending MCEs
589 13:53:12.093898 Setting up local APIC...
590 13:53:12.096700 CPU: vendor Intel device 806ec
591 13:53:12.100405 CPU: family 06, model 8e, stepping 0c
592 13:53:12.103602 Clearing out pending MCEs
593 13:53:12.103728 Initializing CPU #2
594 13:53:12.106853 Initializing CPU #5
595 13:53:12.110120 CPU: vendor Intel device 806ec
596 13:53:12.113206 CPU: family 06, model 8e, stepping 0c
597 13:53:12.117209 Clearing out pending MCEs
598 13:53:12.120364 Clearing out pending MCEs
599 13:53:12.120480 Setting up local APIC...
600 13:53:12.123423 Setting up local APIC...
601 13:53:12.126538 Setting up local APIC...
602 13:53:12.129733 CPU: vendor Intel device 806ec
603 13:53:12.133143 CPU: family 06, model 8e, stepping 0c
604 13:53:12.136475 Clearing out pending MCEs
605 13:53:12.140410 Clearing out pending MCEs
606 13:53:12.140529 Setting up local APIC...
607 13:53:12.143050 apic_id: 0x01 done.
608 13:53:12.146819 Setting up local APIC...
609 13:53:12.146936 apic_id: 0x07 done.
610 13:53:12.149973 apic_id: 0x06 done.
611 13:53:12.153081 VMX status: enabled
612 13:53:12.153200 VMX status: enabled
613 13:53:12.156840 IA32_FEATURE_CONTROL status: locked
614 13:53:12.160001 IA32_FEATURE_CONTROL status: locked
615 13:53:12.163108 Skip microcode update
616 13:53:12.167074 Skip microcode update
617 13:53:12.167172 CPU #3 initialized
618 13:53:12.169751 CPU #6 initialized
619 13:53:12.169870 VMX status: enabled
620 13:53:12.173111 apic_id: 0x02 done.
621 13:53:12.176464 apic_id: 0x03 done.
622 13:53:12.176549 VMX status: enabled
623 13:53:12.179823 VMX status: enabled
624 13:53:12.183251 IA32_FEATURE_CONTROL status: locked
625 13:53:12.186595 IA32_FEATURE_CONTROL status: locked
626 13:53:12.189773 Skip microcode update
627 13:53:12.193189 Skip microcode update
628 13:53:12.193314 CPU #7 initialized
629 13:53:12.197066 CPU #1 initialized
630 13:53:12.197162 apic_id: 0x04 done.
631 13:53:12.200254 Setting up local APIC...
632 13:53:12.203398 IA32_FEATURE_CONTROL status: locked
633 13:53:12.206677 VMX status: enabled
634 13:53:12.206772 apic_id: 0x05 done.
635 13:53:12.209733 IA32_FEATURE_CONTROL status: locked
636 13:53:12.213587 VMX status: enabled
637 13:53:12.216832 Skip microcode update
638 13:53:12.220068 IA32_FEATURE_CONTROL status: locked
639 13:53:12.220202 CPU #2 initialized
640 13:53:12.223286 Skip microcode update
641 13:53:12.226390 Skip microcode update
642 13:53:12.226506 CPU #5 initialized
643 13:53:12.229695 CPU #4 initialized
644 13:53:12.232982 bsp_do_flight_plan done after 452 msecs.
645 13:53:12.236232 CPU: frequency set to 4200 MHz
646 13:53:12.239465 Enabling SMIs.
647 13:53:12.239559 Locking SMM.
648 13:53:12.255005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 13:53:12.258135 CBFS @ c08000 size 3f8000
650 13:53:12.264529 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 13:53:12.264695 CBFS: Locating 'vbt.bin'
652 13:53:12.268167 CBFS: Found @ offset 5f5c0 size 499
653 13:53:12.274683 Found a VBT of 4608 bytes after decompression
654 13:53:12.456339 Display FSP Version Info HOB
655 13:53:12.459555 Reference Code - CPU = 9.0.1e.30
656 13:53:12.462774 uCode Version = 0.0.0.ca
657 13:53:12.466815 TXT ACM version = ff.ff.ff.ffff
658 13:53:12.469879 Display FSP Version Info HOB
659 13:53:12.473033 Reference Code - ME = 9.0.1e.30
660 13:53:12.476153 MEBx version = 0.0.0.0
661 13:53:12.479405 ME Firmware Version = Consumer SKU
662 13:53:12.483423 Display FSP Version Info HOB
663 13:53:12.486522 Reference Code - CML PCH = 9.0.1e.30
664 13:53:12.489799 PCH-CRID Status = Disabled
665 13:53:12.493174 PCH-CRID Original Value = ff.ff.ff.ffff
666 13:53:12.496023 PCH-CRID New Value = ff.ff.ff.ffff
667 13:53:12.499883 OPROM - RST - RAID = ff.ff.ff.ffff
668 13:53:12.503353 ChipsetInit Base Version = ff.ff.ff.ffff
669 13:53:12.506545 ChipsetInit Oem Version = ff.ff.ff.ffff
670 13:53:12.509882 Display FSP Version Info HOB
671 13:53:12.516499 Reference Code - SA - System Agent = 9.0.1e.30
672 13:53:12.516615 Reference Code - MRC = 0.7.1.6c
673 13:53:12.519679 SA - PCIe Version = 9.0.1e.30
674 13:53:12.522889 SA-CRID Status = Disabled
675 13:53:12.526693 SA-CRID Original Value = 0.0.0.c
676 13:53:12.529859 SA-CRID New Value = 0.0.0.c
677 13:53:12.533019 OPROM - VBIOS = ff.ff.ff.ffff
678 13:53:12.533130 RTC Init
679 13:53:12.539537 Set power on after power failure.
680 13:53:12.539715 Disabling Deep S3
681 13:53:12.542810 Disabling Deep S3
682 13:53:12.542932 Disabling Deep S4
683 13:53:12.546527 Disabling Deep S4
684 13:53:12.546622 Disabling Deep S5
685 13:53:12.549781 Disabling Deep S5
686 13:53:12.556661 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
687 13:53:12.556811 Enumerating buses...
688 13:53:12.563392 Show all devs... Before device enumeration.
689 13:53:12.563546 Root Device: enabled 1
690 13:53:12.566179 CPU_CLUSTER: 0: enabled 1
691 13:53:12.569704 DOMAIN: 0000: enabled 1
692 13:53:12.569811 APIC: 00: enabled 1
693 13:53:12.572858 PCI: 00:00.0: enabled 1
694 13:53:12.576080 PCI: 00:02.0: enabled 1
695 13:53:12.580023 PCI: 00:04.0: enabled 0
696 13:53:12.580132 PCI: 00:05.0: enabled 0
697 13:53:12.583368 PCI: 00:12.0: enabled 1
698 13:53:12.586098 PCI: 00:12.5: enabled 0
699 13:53:12.589823 PCI: 00:12.6: enabled 0
700 13:53:12.589945 PCI: 00:14.0: enabled 1
701 13:53:12.593038 PCI: 00:14.1: enabled 0
702 13:53:12.596313 PCI: 00:14.3: enabled 1
703 13:53:12.596417 PCI: 00:14.5: enabled 0
704 13:53:12.599651 PCI: 00:15.0: enabled 1
705 13:53:12.603055 PCI: 00:15.1: enabled 1
706 13:53:12.606322 PCI: 00:15.2: enabled 0
707 13:53:12.606439 PCI: 00:15.3: enabled 0
708 13:53:12.609673 PCI: 00:16.0: enabled 1
709 13:53:12.613142 PCI: 00:16.1: enabled 0
710 13:53:12.616584 PCI: 00:16.2: enabled 0
711 13:53:12.616743 PCI: 00:16.3: enabled 0
712 13:53:12.619289 PCI: 00:16.4: enabled 0
713 13:53:12.622605 PCI: 00:16.5: enabled 0
714 13:53:12.625979 PCI: 00:17.0: enabled 1
715 13:53:12.626130 PCI: 00:19.0: enabled 1
716 13:53:12.629224 PCI: 00:19.1: enabled 0
717 13:53:12.632614 PCI: 00:19.2: enabled 0
718 13:53:12.635952 PCI: 00:1a.0: enabled 0
719 13:53:12.636074 PCI: 00:1c.0: enabled 0
720 13:53:12.639130 PCI: 00:1c.1: enabled 0
721 13:53:12.642765 PCI: 00:1c.2: enabled 0
722 13:53:12.642872 PCI: 00:1c.3: enabled 0
723 13:53:12.646018 PCI: 00:1c.4: enabled 0
724 13:53:12.649268 PCI: 00:1c.5: enabled 0
725 13:53:12.652445 PCI: 00:1c.6: enabled 0
726 13:53:12.652553 PCI: 00:1c.7: enabled 0
727 13:53:12.655799 PCI: 00:1d.0: enabled 1
728 13:53:12.659164 PCI: 00:1d.1: enabled 0
729 13:53:12.662673 PCI: 00:1d.2: enabled 0
730 13:53:12.662819 PCI: 00:1d.3: enabled 0
731 13:53:12.665933 PCI: 00:1d.4: enabled 0
732 13:53:12.669385 PCI: 00:1d.5: enabled 1
733 13:53:12.672091 PCI: 00:1e.0: enabled 1
734 13:53:12.672200 PCI: 00:1e.1: enabled 0
735 13:53:12.675493 PCI: 00:1e.2: enabled 1
736 13:53:12.678718 PCI: 00:1e.3: enabled 1
737 13:53:12.678826 PCI: 00:1f.0: enabled 1
738 13:53:12.682534 PCI: 00:1f.1: enabled 1
739 13:53:12.685757 PCI: 00:1f.2: enabled 1
740 13:53:12.689197 PCI: 00:1f.3: enabled 1
741 13:53:12.689313 PCI: 00:1f.4: enabled 1
742 13:53:12.692377 PCI: 00:1f.5: enabled 1
743 13:53:12.695480 PCI: 00:1f.6: enabled 0
744 13:53:12.699190 USB0 port 0: enabled 1
745 13:53:12.699338 I2C: 00:15: enabled 1
746 13:53:12.702438 I2C: 00:5d: enabled 1
747 13:53:12.705759 GENERIC: 0.0: enabled 1
748 13:53:12.705914 I2C: 00:1a: enabled 1
749 13:53:12.709178 I2C: 00:38: enabled 1
750 13:53:12.712502 I2C: 00:39: enabled 1
751 13:53:12.712634 I2C: 00:3a: enabled 1
752 13:53:12.715793 I2C: 00:3b: enabled 1
753 13:53:12.719175 PCI: 00:00.0: enabled 1
754 13:53:12.719335 SPI: 00: enabled 1
755 13:53:12.722456 SPI: 01: enabled 1
756 13:53:12.725138 PNP: 0c09.0: enabled 1
757 13:53:12.725282 USB2 port 0: enabled 1
758 13:53:12.728471 USB2 port 1: enabled 1
759 13:53:12.732228 USB2 port 2: enabled 0
760 13:53:12.735359 USB2 port 3: enabled 0
761 13:53:12.735513 USB2 port 5: enabled 0
762 13:53:12.738667 USB2 port 6: enabled 1
763 13:53:12.741994 USB2 port 9: enabled 1
764 13:53:12.742116 USB3 port 0: enabled 1
765 13:53:12.745199 USB3 port 1: enabled 1
766 13:53:12.748394 USB3 port 2: enabled 1
767 13:53:12.748544 USB3 port 3: enabled 1
768 13:53:12.751980 USB3 port 4: enabled 0
769 13:53:12.754961 APIC: 03: enabled 1
770 13:53:12.755073 APIC: 04: enabled 1
771 13:53:12.758101 APIC: 07: enabled 1
772 13:53:12.761316 APIC: 01: enabled 1
773 13:53:12.761465 APIC: 05: enabled 1
774 13:53:12.764607 APIC: 06: enabled 1
775 13:53:12.768574 APIC: 02: enabled 1
776 13:53:12.768710 Compare with tree...
777 13:53:12.771263 Root Device: enabled 1
778 13:53:12.774579 CPU_CLUSTER: 0: enabled 1
779 13:53:12.774709 APIC: 00: enabled 1
780 13:53:12.778459 APIC: 03: enabled 1
781 13:53:12.781187 APIC: 04: enabled 1
782 13:53:12.781342 APIC: 07: enabled 1
783 13:53:12.785213 APIC: 01: enabled 1
784 13:53:12.788410 APIC: 05: enabled 1
785 13:53:12.788556 APIC: 06: enabled 1
786 13:53:12.791678 APIC: 02: enabled 1
787 13:53:12.794907 DOMAIN: 0000: enabled 1
788 13:53:12.797957 PCI: 00:00.0: enabled 1
789 13:53:12.798101 PCI: 00:02.0: enabled 1
790 13:53:12.801132 PCI: 00:04.0: enabled 0
791 13:53:12.804755 PCI: 00:05.0: enabled 0
792 13:53:12.807918 PCI: 00:12.0: enabled 1
793 13:53:12.811186 PCI: 00:12.5: enabled 0
794 13:53:12.811323 PCI: 00:12.6: enabled 0
795 13:53:12.814333 PCI: 00:14.0: enabled 1
796 13:53:12.818241 USB0 port 0: enabled 1
797 13:53:12.821530 USB2 port 0: enabled 1
798 13:53:12.824729 USB2 port 1: enabled 1
799 13:53:12.824874 USB2 port 2: enabled 0
800 13:53:12.828170 USB2 port 3: enabled 0
801 13:53:12.831433 USB2 port 5: enabled 0
802 13:53:12.834771 USB2 port 6: enabled 1
803 13:53:12.838093 USB2 port 9: enabled 1
804 13:53:12.841278 USB3 port 0: enabled 1
805 13:53:12.841413 USB3 port 1: enabled 1
806 13:53:12.844550 USB3 port 2: enabled 1
807 13:53:12.847790 USB3 port 3: enabled 1
808 13:53:12.851353 USB3 port 4: enabled 0
809 13:53:12.854691 PCI: 00:14.1: enabled 0
810 13:53:12.854823 PCI: 00:14.3: enabled 1
811 13:53:12.857884 PCI: 00:14.5: enabled 0
812 13:53:12.860899 PCI: 00:15.0: enabled 1
813 13:53:12.864385 I2C: 00:15: enabled 1
814 13:53:12.867465 PCI: 00:15.1: enabled 1
815 13:53:12.867566 I2C: 00:5d: enabled 1
816 13:53:12.871334 GENERIC: 0.0: enabled 1
817 13:53:12.874681 PCI: 00:15.2: enabled 0
818 13:53:12.877476 PCI: 00:15.3: enabled 0
819 13:53:12.877596 PCI: 00:16.0: enabled 1
820 13:53:12.881349 PCI: 00:16.1: enabled 0
821 13:53:12.884531 PCI: 00:16.2: enabled 0
822 13:53:12.887779 PCI: 00:16.3: enabled 0
823 13:53:12.891100 PCI: 00:16.4: enabled 0
824 13:53:12.891222 PCI: 00:16.5: enabled 0
825 13:53:12.894466 PCI: 00:17.0: enabled 1
826 13:53:12.918081 PCI: 00:19.0: enabled 1
827 13:53:12.918229 I2C: 00:1a: enabled 1
828 13:53:12.918340 I2C: 00:38: enabled 1
829 13:53:12.918449 I2C: 00:39: enabled 1
830 13:53:12.918525 I2C: 00:3a: enabled 1
831 13:53:12.918593 I2C: 00:3b: enabled 1
832 13:53:12.918665 PCI: 00:19.1: enabled 0
833 13:53:12.918753 PCI: 00:19.2: enabled 0
834 13:53:12.918851 PCI: 00:1a.0: enabled 0
835 13:53:12.921232 PCI: 00:1c.0: enabled 0
836 13:53:12.924520 PCI: 00:1c.1: enabled 0
837 13:53:12.927837 PCI: 00:1c.2: enabled 0
838 13:53:12.927971 PCI: 00:1c.3: enabled 0
839 13:53:12.931245 PCI: 00:1c.4: enabled 0
840 13:53:12.934465 PCI: 00:1c.5: enabled 0
841 13:53:12.937602 PCI: 00:1c.6: enabled 0
842 13:53:12.941031 PCI: 00:1c.7: enabled 0
843 13:53:12.941119 PCI: 00:1d.0: enabled 1
844 13:53:12.944225 PCI: 00:1d.1: enabled 0
845 13:53:12.947399 PCI: 00:1d.2: enabled 0
846 13:53:12.951255 PCI: 00:1d.3: enabled 0
847 13:53:12.951374 PCI: 00:1d.4: enabled 0
848 13:53:12.954359 PCI: 00:1d.5: enabled 1
849 13:53:12.957622 PCI: 00:00.0: enabled 1
850 13:53:12.960880 PCI: 00:1e.0: enabled 1
851 13:53:12.963870 PCI: 00:1e.1: enabled 0
852 13:53:12.963996 PCI: 00:1e.2: enabled 1
853 13:53:12.967562 SPI: 00: enabled 1
854 13:53:12.970696 PCI: 00:1e.3: enabled 1
855 13:53:12.974311 SPI: 01: enabled 1
856 13:53:12.974430 PCI: 00:1f.0: enabled 1
857 13:53:12.977359 PNP: 0c09.0: enabled 1
858 13:53:12.980667 PCI: 00:1f.1: enabled 1
859 13:53:12.983949 PCI: 00:1f.2: enabled 1
860 13:53:12.987799 PCI: 00:1f.3: enabled 1
861 13:53:12.987933 PCI: 00:1f.4: enabled 1
862 13:53:12.991044 PCI: 00:1f.5: enabled 1
863 13:53:12.994345 PCI: 00:1f.6: enabled 0
864 13:53:12.997568 Root Device scanning...
865 13:53:13.000864 scan_static_bus for Root Device
866 13:53:13.000989 CPU_CLUSTER: 0 enabled
867 13:53:13.003984 DOMAIN: 0000 enabled
868 13:53:13.007278 DOMAIN: 0000 scanning...
869 13:53:13.011097 PCI: pci_scan_bus for bus 00
870 13:53:13.014178 PCI: 00:00.0 [8086/0000] ops
871 13:53:13.017340 PCI: 00:00.0 [8086/9b61] enabled
872 13:53:13.020501 PCI: 00:02.0 [8086/0000] bus ops
873 13:53:13.023724 PCI: 00:02.0 [8086/9b41] enabled
874 13:53:13.027580 PCI: 00:04.0 [8086/1903] disabled
875 13:53:13.030849 PCI: 00:08.0 [8086/1911] enabled
876 13:53:13.034205 PCI: 00:12.0 [8086/02f9] enabled
877 13:53:13.037571 PCI: 00:14.0 [8086/0000] bus ops
878 13:53:13.040765 PCI: 00:14.0 [8086/02ed] enabled
879 13:53:13.044110 PCI: 00:14.2 [8086/02ef] enabled
880 13:53:13.047413 PCI: 00:14.3 [8086/02f0] enabled
881 13:53:13.050703 PCI: 00:15.0 [8086/0000] bus ops
882 13:53:13.054056 PCI: 00:15.0 [8086/02e8] enabled
883 13:53:13.057410 PCI: 00:15.1 [8086/0000] bus ops
884 13:53:13.060660 PCI: 00:15.1 [8086/02e9] enabled
885 13:53:13.063921 PCI: 00:16.0 [8086/0000] ops
886 13:53:13.067117 PCI: 00:16.0 [8086/02e0] enabled
887 13:53:13.070916 PCI: 00:17.0 [8086/0000] ops
888 13:53:13.074042 PCI: 00:17.0 [8086/02d3] enabled
889 13:53:13.076948 PCI: 00:19.0 [8086/0000] bus ops
890 13:53:13.080744 PCI: 00:19.0 [8086/02c5] enabled
891 13:53:13.083631 PCI: 00:1d.0 [8086/0000] bus ops
892 13:53:13.087329 PCI: 00:1d.0 [8086/02b0] enabled
893 13:53:13.090564 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 13:53:13.093940 PCI: 00:1e.0 [8086/0000] ops
895 13:53:13.097291 PCI: 00:1e.0 [8086/02a8] enabled
896 13:53:13.100732 PCI: 00:1e.2 [8086/0000] bus ops
897 13:53:13.104036 PCI: 00:1e.2 [8086/02aa] enabled
898 13:53:13.107329 PCI: 00:1e.3 [8086/0000] bus ops
899 13:53:13.110551 PCI: 00:1e.3 [8086/02ab] enabled
900 13:53:13.113596 PCI: 00:1f.0 [8086/0000] bus ops
901 13:53:13.116887 PCI: 00:1f.0 [8086/0284] enabled
902 13:53:13.123981 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 13:53:13.127245 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 13:53:13.130409 PCI: 00:1f.3 [8086/0000] bus ops
905 13:53:13.133841 PCI: 00:1f.3 [8086/02c8] enabled
906 13:53:13.137153 PCI: 00:1f.4 [8086/0000] bus ops
907 13:53:13.140516 PCI: 00:1f.4 [8086/02a3] enabled
908 13:53:13.143907 PCI: 00:1f.5 [8086/0000] bus ops
909 13:53:13.147144 PCI: 00:1f.5 [8086/02a4] enabled
910 13:53:13.150625 PCI: Leftover static devices:
911 13:53:13.154004 PCI: 00:05.0
912 13:53:13.154126 PCI: 00:12.5
913 13:53:13.157279 PCI: 00:12.6
914 13:53:13.157377 PCI: 00:14.1
915 13:53:13.157485 PCI: 00:14.5
916 13:53:13.160618 PCI: 00:15.2
917 13:53:13.160736 PCI: 00:15.3
918 13:53:13.163883 PCI: 00:16.1
919 13:53:13.163983 PCI: 00:16.2
920 13:53:13.164060 PCI: 00:16.3
921 13:53:13.167232 PCI: 00:16.4
922 13:53:13.167330 PCI: 00:16.5
923 13:53:13.170313 PCI: 00:19.1
924 13:53:13.170408 PCI: 00:19.2
925 13:53:13.173516 PCI: 00:1a.0
926 13:53:13.173610 PCI: 00:1c.0
927 13:53:13.173685 PCI: 00:1c.1
928 13:53:13.177153 PCI: 00:1c.2
929 13:53:13.177249 PCI: 00:1c.3
930 13:53:13.180093 PCI: 00:1c.4
931 13:53:13.180195 PCI: 00:1c.5
932 13:53:13.180306 PCI: 00:1c.6
933 13:53:13.183863 PCI: 00:1c.7
934 13:53:13.183958 PCI: 00:1d.1
935 13:53:13.187085 PCI: 00:1d.2
936 13:53:13.187187 PCI: 00:1d.3
937 13:53:13.187273 PCI: 00:1d.4
938 13:53:13.190239 PCI: 00:1d.5
939 13:53:13.190338 PCI: 00:1e.1
940 13:53:13.193321 PCI: 00:1f.1
941 13:53:13.193421 PCI: 00:1f.2
942 13:53:13.197224 PCI: 00:1f.6
943 13:53:13.197329 PCI: Check your devicetree.cb.
944 13:53:13.200768 PCI: 00:02.0 scanning...
945 13:53:13.203249 scan_generic_bus for PCI: 00:02.0
946 13:53:13.209990 scan_generic_bus for PCI: 00:02.0 done
947 13:53:13.213357 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
948 13:53:13.216509 PCI: 00:14.0 scanning...
949 13:53:13.219867 scan_static_bus for PCI: 00:14.0
950 13:53:13.223778 USB0 port 0 enabled
951 13:53:13.223896 USB0 port 0 scanning...
952 13:53:13.226994 scan_static_bus for USB0 port 0
953 13:53:13.230125 USB2 port 0 enabled
954 13:53:13.233258 USB2 port 1 enabled
955 13:53:13.233358 USB2 port 2 disabled
956 13:53:13.236443 USB2 port 3 disabled
957 13:53:13.240341 USB2 port 5 disabled
958 13:53:13.240447 USB2 port 6 enabled
959 13:53:13.243136 USB2 port 9 enabled
960 13:53:13.243256 USB3 port 0 enabled
961 13:53:13.246517 USB3 port 1 enabled
962 13:53:13.249894 USB3 port 2 enabled
963 13:53:13.249989 USB3 port 3 enabled
964 13:53:13.253236 USB3 port 4 disabled
965 13:53:13.256538 USB2 port 0 scanning...
966 13:53:13.259938 scan_static_bus for USB2 port 0
967 13:53:13.263222 scan_static_bus for USB2 port 0 done
968 13:53:13.266623 scan_bus: scanning of bus USB2 port 0 took 9690 usecs
969 13:53:13.270097 USB2 port 1 scanning...
970 13:53:13.273313 scan_static_bus for USB2 port 1
971 13:53:13.276578 scan_static_bus for USB2 port 1 done
972 13:53:13.283135 scan_bus: scanning of bus USB2 port 1 took 9698 usecs
973 13:53:13.286483 USB2 port 6 scanning...
974 13:53:13.289750 scan_static_bus for USB2 port 6
975 13:53:13.292906 scan_static_bus for USB2 port 6 done
976 13:53:13.299767 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
977 13:53:13.299905 USB2 port 9 scanning...
978 13:53:13.302848 scan_static_bus for USB2 port 9
979 13:53:13.306611 scan_static_bus for USB2 port 9 done
980 13:53:13.313255 scan_bus: scanning of bus USB2 port 9 took 9698 usecs
981 13:53:13.316589 USB3 port 0 scanning...
982 13:53:13.320110 scan_static_bus for USB3 port 0
983 13:53:13.322832 scan_static_bus for USB3 port 0 done
984 13:53:13.329913 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
985 13:53:13.330099 USB3 port 1 scanning...
986 13:53:13.332959 scan_static_bus for USB3 port 1
987 13:53:13.336315 scan_static_bus for USB3 port 1 done
988 13:53:13.342678 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
989 13:53:13.346557 USB3 port 2 scanning...
990 13:53:13.349849 scan_static_bus for USB3 port 2
991 13:53:13.353031 scan_static_bus for USB3 port 2 done
992 13:53:13.359690 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
993 13:53:13.359855 USB3 port 3 scanning...
994 13:53:13.363247 scan_static_bus for USB3 port 3
995 13:53:13.366394 scan_static_bus for USB3 port 3 done
996 13:53:13.373398 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
997 13:53:13.376108 scan_static_bus for USB0 port 0 done
998 13:53:13.382789 scan_bus: scanning of bus USB0 port 0 took 155342 usecs
999 13:53:13.386010 scan_static_bus for PCI: 00:14.0 done
1000 13:53:13.392586 scan_bus: scanning of bus PCI: 00:14.0 took 172968 usecs
1001 13:53:13.392718 PCI: 00:15.0 scanning...
1002 13:53:13.399731 scan_generic_bus for PCI: 00:15.0
1003 13:53:13.402723 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 13:53:13.406002 scan_generic_bus for PCI: 00:15.0 done
1005 13:53:13.412866 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1006 13:53:13.413005 PCI: 00:15.1 scanning...
1007 13:53:13.416030 scan_generic_bus for PCI: 00:15.1
1008 13:53:13.422671 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 13:53:13.426127 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 13:53:13.429417 scan_generic_bus for PCI: 00:15.1 done
1011 13:53:13.435952 scan_bus: scanning of bus PCI: 00:15.1 took 18601 usecs
1012 13:53:13.439710 PCI: 00:19.0 scanning...
1013 13:53:13.442752 scan_generic_bus for PCI: 00:19.0
1014 13:53:13.446052 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 13:53:13.449275 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 13:53:13.452950 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 13:53:13.459373 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 13:53:13.462693 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 13:53:13.466083 scan_generic_bus for PCI: 00:19.0 done
1020 13:53:13.472856 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1021 13:53:13.472981 PCI: 00:1d.0 scanning...
1022 13:53:13.479544 do_pci_scan_bridge for PCI: 00:1d.0
1023 13:53:13.479677 PCI: pci_scan_bus for bus 01
1024 13:53:13.482840 PCI: 01:00.0 [1c5c/1327] enabled
1025 13:53:13.489481 Enabling Common Clock Configuration
1026 13:53:13.492945 L1 Sub-State supported from root port 29
1027 13:53:13.496448 L1 Sub-State Support = 0xf
1028 13:53:13.499721 CommonModeRestoreTime = 0x28
1029 13:53:13.503133 Power On Value = 0x16, Power On Scale = 0x0
1030 13:53:13.503260 ASPM: Enabled L1
1031 13:53:13.509478 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
1032 13:53:13.513135 PCI: 00:1e.2 scanning...
1033 13:53:13.516291 scan_generic_bus for PCI: 00:1e.2
1034 13:53:13.519487 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 13:53:13.523051 scan_generic_bus for PCI: 00:1e.2 done
1036 13:53:13.529389 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1037 13:53:13.532681 PCI: 00:1e.3 scanning...
1038 13:53:13.536057 scan_generic_bus for PCI: 00:1e.3
1039 13:53:13.539466 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 13:53:13.542686 scan_generic_bus for PCI: 00:1e.3 done
1041 13:53:13.549836 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1042 13:53:13.552959 PCI: 00:1f.0 scanning...
1043 13:53:13.556143 scan_static_bus for PCI: 00:1f.0
1044 13:53:13.556291 PNP: 0c09.0 enabled
1045 13:53:13.559318 scan_static_bus for PCI: 00:1f.0 done
1046 13:53:13.566266 scan_bus: scanning of bus PCI: 00:1f.0 took 12040 usecs
1047 13:53:13.569604 PCI: 00:1f.3 scanning...
1048 13:53:13.576200 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1049 13:53:13.576346 PCI: 00:1f.4 scanning...
1050 13:53:13.579636 scan_generic_bus for PCI: 00:1f.4
1051 13:53:13.586208 scan_generic_bus for PCI: 00:1f.4 done
1052 13:53:13.589622 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1053 13:53:13.593129 PCI: 00:1f.5 scanning...
1054 13:53:13.595832 scan_generic_bus for PCI: 00:1f.5
1055 13:53:13.599753 scan_generic_bus for PCI: 00:1f.5 done
1056 13:53:13.605831 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1057 13:53:13.612603 scan_bus: scanning of bus DOMAIN: 0000 took 605059 usecs
1058 13:53:13.615849 scan_static_bus for Root Device done
1059 13:53:13.622519 scan_bus: scanning of bus Root Device took 624925 usecs
1060 13:53:13.622673 done
1061 13:53:13.625648 Chrome EC: UHEPI supported
1062 13:53:13.632636 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 13:53:13.635569 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 13:53:13.642884 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 13:53:13.649561 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 13:53:13.652816 SPI flash protection: WPSW=0 SRP0=0
1067 13:53:13.659373 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 13:53:13.662617 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 13:53:13.665920 found VGA at PCI: 00:02.0
1070 13:53:13.669069 Setting up VGA for PCI: 00:02.0
1071 13:53:13.676185 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 13:53:13.679417 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 13:53:13.682142 Allocating resources...
1074 13:53:13.685606 Reading resources...
1075 13:53:13.688987 Root Device read_resources bus 0 link: 0
1076 13:53:13.692406 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 13:53:13.699045 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 13:53:13.702257 DOMAIN: 0000 read_resources bus 0 link: 0
1079 13:53:13.709534 PCI: 00:14.0 read_resources bus 0 link: 0
1080 13:53:13.712932 USB0 port 0 read_resources bus 0 link: 0
1081 13:53:13.720996 USB0 port 0 read_resources bus 0 link: 0 done
1082 13:53:13.724363 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 13:53:13.731387 PCI: 00:15.0 read_resources bus 1 link: 0
1084 13:53:13.735082 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 13:53:13.741517 PCI: 00:15.1 read_resources bus 2 link: 0
1086 13:53:13.744659 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 13:53:13.751964 PCI: 00:19.0 read_resources bus 3 link: 0
1088 13:53:13.759038 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 13:53:13.762364 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 13:53:13.768799 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 13:53:13.772020 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 13:53:13.779072 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 13:53:13.782534 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 13:53:13.789381 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 13:53:13.792030 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 13:53:13.798601 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 13:53:13.805327 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 13:53:13.808617 Root Device read_resources bus 0 link: 0 done
1099 13:53:13.812121 Done reading resources.
1100 13:53:13.815506 Show resources in subtree (Root Device)...After reading.
1101 13:53:13.822302 Root Device child on link 0 CPU_CLUSTER: 0
1102 13:53:13.825039 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 13:53:13.825151 APIC: 00
1104 13:53:13.828446 APIC: 03
1105 13:53:13.828564 APIC: 04
1106 13:53:13.831829 APIC: 07
1107 13:53:13.831937 APIC: 01
1108 13:53:13.832039 APIC: 05
1109 13:53:13.834964 APIC: 06
1110 13:53:13.835074 APIC: 02
1111 13:53:13.838831 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 13:53:13.848556 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 13:53:13.896913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 13:53:13.897073 PCI: 00:00.0
1115 13:53:13.898256 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 13:53:13.898547 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 13:53:13.898654 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 13:53:13.902331 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 13:53:13.908349 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 13:53:13.918545 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 13:53:13.925306 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 13:53:13.934969 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 13:53:13.944930 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 13:53:13.955188 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 13:53:13.961323 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 13:53:13.971270 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 13:53:13.981149 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 13:53:13.991058 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 13:53:14.001155 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 13:53:14.011199 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 13:53:14.011350 PCI: 00:02.0
1132 13:53:14.021266 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 13:53:14.031213 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 13:53:14.041266 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 13:53:14.041448 PCI: 00:04.0
1136 13:53:14.044595 PCI: 00:08.0
1137 13:53:14.055166 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 13:53:14.055330 PCI: 00:12.0
1139 13:53:14.064887 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 13:53:14.071217 PCI: 00:14.0 child on link 0 USB0 port 0
1141 13:53:14.081382 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 13:53:14.084620 USB0 port 0 child on link 0 USB2 port 0
1143 13:53:14.087765 USB2 port 0
1144 13:53:14.087860 USB2 port 1
1145 13:53:14.090986 USB2 port 2
1146 13:53:14.091085 USB2 port 3
1147 13:53:14.094092 USB2 port 5
1148 13:53:14.094184 USB2 port 6
1149 13:53:14.097699 USB2 port 9
1150 13:53:14.097795 USB3 port 0
1151 13:53:14.100995 USB3 port 1
1152 13:53:14.101092 USB3 port 2
1153 13:53:14.104353 USB3 port 3
1154 13:53:14.104447 USB3 port 4
1155 13:53:14.107702 PCI: 00:14.2
1156 13:53:14.117798 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 13:53:14.127851 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 13:53:14.127983 PCI: 00:14.3
1159 13:53:14.137111 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 13:53:14.143948 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 13:53:14.153914 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 13:53:14.154037 I2C: 01:15
1163 13:53:14.157261 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 13:53:14.167207 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 13:53:14.170997 I2C: 02:5d
1166 13:53:14.171113 GENERIC: 0.0
1167 13:53:14.174216 PCI: 00:16.0
1168 13:53:14.184190 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 13:53:14.184318 PCI: 00:17.0
1170 13:53:14.194026 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 13:53:14.203826 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 13:53:14.210818 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 13:53:14.220921 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 13:53:14.226774 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 13:53:14.237118 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 13:53:14.240520 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 13:53:14.250425 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 13:53:14.253762 I2C: 03:1a
1179 13:53:14.253891 I2C: 03:38
1180 13:53:14.257230 I2C: 03:39
1181 13:53:14.257348 I2C: 03:3a
1182 13:53:14.259917 I2C: 03:3b
1183 13:53:14.263071 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 13:53:14.273674 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 13:53:14.283175 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 13:53:14.289611 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 13:53:14.293067 PCI: 01:00.0
1188 13:53:14.303359 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 13:53:14.306656 PCI: 00:1e.0
1190 13:53:14.316352 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 13:53:14.326224 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 13:53:14.329493 PCI: 00:1e.2 child on link 0 SPI: 00
1193 13:53:14.339671 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 13:53:14.339774 SPI: 00
1195 13:53:14.346385 PCI: 00:1e.3 child on link 0 SPI: 01
1196 13:53:14.356287 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 13:53:14.356414 SPI: 01
1198 13:53:14.359125 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 13:53:14.369861 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 13:53:14.379216 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 13:53:14.379354 PNP: 0c09.0
1202 13:53:14.389376 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 13:53:14.389480 PCI: 00:1f.3
1204 13:53:14.399013 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 13:53:14.408739 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 13:53:14.412462 PCI: 00:1f.4
1207 13:53:14.422503 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 13:53:14.432020 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 13:53:14.432141 PCI: 00:1f.5
1210 13:53:14.442122 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 13:53:14.448795 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 13:53:14.455389 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 13:53:14.462168 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 13:53:14.465569 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 13:53:14.468853 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 13:53:14.472161 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 13:53:14.475587 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 13:53:14.481725 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 13:53:14.488608 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 13:53:14.498532 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 13:53:14.505512 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 13:53:14.512067 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 13:53:14.515347 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 13:53:14.525679 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 13:53:14.528647 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 13:53:14.531614 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 13:53:14.538527 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 13:53:14.541769 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 13:53:14.548614 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 13:53:14.551905 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 13:53:14.558122 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 13:53:14.562167 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 13:53:14.568336 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 13:53:14.571499 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 13:53:14.578368 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 13:53:14.581394 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 13:53:14.588529 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 13:53:14.591893 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 13:53:14.595283 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 13:53:14.601757 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 13:53:14.604910 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 13:53:14.611328 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 13:53:14.614557 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 13:53:14.621543 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 13:53:14.624910 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 13:53:14.631264 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 13:53:14.634945 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 13:53:14.644326 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 13:53:14.647993 avoid_fixed_resources: DOMAIN: 0000
1250 13:53:14.654643 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 13:53:14.658047 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 13:53:14.667902 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 13:53:14.674474 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 13:53:14.681000 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 13:53:14.691101 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 13:53:14.697814 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 13:53:14.704628 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 13:53:14.714397 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 13:53:14.721154 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 13:53:14.727690 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 13:53:14.734450 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 13:53:14.737759 Setting resources...
1263 13:53:14.744096 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 13:53:14.747709 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 13:53:14.750834 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 13:53:14.754012 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 13:53:14.761106 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 13:53:14.767825 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 13:53:14.770632 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 13:53:14.777326 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 13:53:14.787149 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 13:53:14.790515 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 13:53:14.797281 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 13:53:14.800715 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 13:53:14.807477 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 13:53:14.810712 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 13:53:14.817352 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 13:53:14.820703 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 13:53:14.823799 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 13:53:14.830443 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 13:53:14.833716 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 13:53:14.840236 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 13:53:14.843632 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 13:53:14.850436 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 13:53:14.853712 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 13:53:14.860671 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 13:53:14.863861 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 13:53:14.870333 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 13:53:14.873693 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 13:53:14.877038 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 13:53:14.883841 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 13:53:14.887304 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 13:53:14.893808 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 13:53:14.896601 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 13:53:14.906961 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 13:53:14.913660 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 13:53:14.920117 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 13:53:14.926904 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 13:53:14.933426 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 13:53:14.939887 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 13:53:14.943175 Root Device assign_resources, bus 0 link: 0
1302 13:53:14.950347 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 13:53:14.957133 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 13:53:14.966753 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 13:53:14.973161 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 13:53:14.983605 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 13:53:14.989699 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 13:53:14.999677 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 13:53:15.003108 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 13:53:15.006478 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 13:53:15.016625 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 13:53:15.023331 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 13:53:15.033342 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 13:53:15.039874 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 13:53:15.046542 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 13:53:15.049838 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 13:53:15.059596 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 13:53:15.062876 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 13:53:15.066204 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 13:53:15.076401 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 13:53:15.083520 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 13:53:15.093398 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 13:53:15.099778 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 13:53:15.106527 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 13:53:15.116113 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 13:53:15.122728 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 13:53:15.129873 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 13:53:15.135852 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 13:53:15.139224 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 13:53:15.149450 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 13:53:15.159050 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 13:53:15.165542 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 13:53:15.169054 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 13:53:15.179248 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 13:53:15.182276 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 13:53:15.192567 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 13:53:15.199264 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 13:53:15.205783 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 13:53:15.209095 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 13:53:15.219325 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 13:53:15.222649 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 13:53:15.226036 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 13:53:15.232567 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 13:53:15.236012 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 13:53:15.242069 LPC: Trying to open IO window from 800 size 1ff
1346 13:53:15.248839 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 13:53:15.258607 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 13:53:15.265643 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 13:53:15.275256 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 13:53:15.278635 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 13:53:15.285118 Root Device assign_resources, bus 0 link: 0
1352 13:53:15.285243 Done setting resources.
1353 13:53:15.291720 Show resources in subtree (Root Device)...After assigning values.
1354 13:53:15.298208 Root Device child on link 0 CPU_CLUSTER: 0
1355 13:53:15.301550 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 13:53:15.301670 APIC: 00
1357 13:53:15.304786 APIC: 03
1358 13:53:15.304869 APIC: 04
1359 13:53:15.304947 APIC: 07
1360 13:53:15.308067 APIC: 01
1361 13:53:15.308153 APIC: 05
1362 13:53:15.311994 APIC: 06
1363 13:53:15.312109 APIC: 02
1364 13:53:15.315381 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 13:53:15.324737 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 13:53:15.338057 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 13:53:15.338191 PCI: 00:00.0
1368 13:53:15.348263 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 13:53:15.358434 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 13:53:15.368019 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 13:53:15.374429 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 13:53:15.384375 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 13:53:15.394450 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 13:53:15.404476 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 13:53:15.414369 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 13:53:15.424296 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 13:53:15.430398 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 13:53:15.440330 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 13:53:15.450265 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 13:53:15.460400 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 13:53:15.470234 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 13:53:15.479948 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 13:53:15.486890 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 13:53:15.490021 PCI: 00:02.0
1385 13:53:15.500302 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 13:53:15.510006 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 13:53:15.519711 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 13:53:15.522992 PCI: 00:04.0
1389 13:53:15.523083 PCI: 00:08.0
1390 13:53:15.533084 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 13:53:15.536602 PCI: 00:12.0
1392 13:53:15.546556 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 13:53:15.549247 PCI: 00:14.0 child on link 0 USB0 port 0
1394 13:53:15.559478 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 13:53:15.566157 USB0 port 0 child on link 0 USB2 port 0
1396 13:53:15.566283 USB2 port 0
1397 13:53:15.569470 USB2 port 1
1398 13:53:15.569563 USB2 port 2
1399 13:53:15.572725 USB2 port 3
1400 13:53:15.572817 USB2 port 5
1401 13:53:15.575874 USB2 port 6
1402 13:53:15.575967 USB2 port 9
1403 13:53:15.579185 USB3 port 0
1404 13:53:15.582329 USB3 port 1
1405 13:53:15.582433 USB3 port 2
1406 13:53:15.586133 USB3 port 3
1407 13:53:15.586215 USB3 port 4
1408 13:53:15.589471 PCI: 00:14.2
1409 13:53:15.599139 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 13:53:15.609069 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 13:53:15.609169 PCI: 00:14.3
1412 13:53:15.618584 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 13:53:15.625263 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 13:53:15.635408 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 13:53:15.635534 I2C: 01:15
1416 13:53:15.642069 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 13:53:15.652058 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 13:53:15.652168 I2C: 02:5d
1419 13:53:15.655521 GENERIC: 0.0
1420 13:53:15.655645 PCI: 00:16.0
1421 13:53:15.664980 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 13:53:15.668374 PCI: 00:17.0
1423 13:53:15.678479 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 13:53:15.688532 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 13:53:15.697999 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 13:53:15.708004 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 13:53:15.714482 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 13:53:15.724754 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 13:53:15.731224 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 13:53:15.741480 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 13:53:15.741625 I2C: 03:1a
1432 13:53:15.744725 I2C: 03:38
1433 13:53:15.744812 I2C: 03:39
1434 13:53:15.747640 I2C: 03:3a
1435 13:53:15.747719 I2C: 03:3b
1436 13:53:15.754682 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 13:53:15.760847 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 13:53:15.771070 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 13:53:15.784283 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 13:53:15.784399 PCI: 01:00.0
1441 13:53:15.794047 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 13:53:15.797285 PCI: 00:1e.0
1443 13:53:15.807691 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 13:53:15.816929 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 13:53:15.820307 PCI: 00:1e.2 child on link 0 SPI: 00
1446 13:53:15.830649 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 13:53:15.833854 SPI: 00
1448 13:53:15.837137 PCI: 00:1e.3 child on link 0 SPI: 01
1449 13:53:15.847117 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 13:53:15.850386 SPI: 01
1451 13:53:15.853792 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 13:53:15.863751 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 13:53:15.870265 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 13:53:15.873612 PNP: 0c09.0
1455 13:53:15.880375 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 13:53:15.883699 PCI: 00:1f.3
1457 13:53:15.893180 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 13:53:15.903554 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 13:53:15.906700 PCI: 00:1f.4
1460 13:53:15.913054 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 13:53:15.926593 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 13:53:15.926730 PCI: 00:1f.5
1463 13:53:15.936230 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 13:53:15.939340 Done allocating resources.
1465 13:53:15.946274 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 13:53:15.946398 Enabling resources...
1467 13:53:15.953752 PCI: 00:00.0 subsystem <- 8086/9b61
1468 13:53:15.953875 PCI: 00:00.0 cmd <- 06
1469 13:53:15.957071 PCI: 00:02.0 subsystem <- 8086/9b41
1470 13:53:15.960373 PCI: 00:02.0 cmd <- 03
1471 13:53:15.963510 PCI: 00:08.0 cmd <- 06
1472 13:53:15.966915 PCI: 00:12.0 subsystem <- 8086/02f9
1473 13:53:15.970264 PCI: 00:12.0 cmd <- 02
1474 13:53:15.973408 PCI: 00:14.0 subsystem <- 8086/02ed
1475 13:53:15.976951 PCI: 00:14.0 cmd <- 02
1476 13:53:15.980238 PCI: 00:14.2 cmd <- 02
1477 13:53:15.983742 PCI: 00:14.3 subsystem <- 8086/02f0
1478 13:53:15.983838 PCI: 00:14.3 cmd <- 02
1479 13:53:15.990508 PCI: 00:15.0 subsystem <- 8086/02e8
1480 13:53:15.990610 PCI: 00:15.0 cmd <- 02
1481 13:53:15.994036 PCI: 00:15.1 subsystem <- 8086/02e9
1482 13:53:15.996707 PCI: 00:15.1 cmd <- 02
1483 13:53:16.000095 PCI: 00:16.0 subsystem <- 8086/02e0
1484 13:53:16.003412 PCI: 00:16.0 cmd <- 02
1485 13:53:16.006685 PCI: 00:17.0 subsystem <- 8086/02d3
1486 13:53:16.009959 PCI: 00:17.0 cmd <- 03
1487 13:53:16.013554 PCI: 00:19.0 subsystem <- 8086/02c5
1488 13:53:16.016889 PCI: 00:19.0 cmd <- 02
1489 13:53:16.020144 PCI: 00:1d.0 bridge ctrl <- 0013
1490 13:53:16.023609 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 13:53:16.026867 PCI: 00:1d.0 cmd <- 06
1492 13:53:16.030375 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 13:53:16.032976 PCI: 00:1e.0 cmd <- 06
1494 13:53:16.037105 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 13:53:16.037199 PCI: 00:1e.2 cmd <- 06
1496 13:53:16.043527 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 13:53:16.043638 PCI: 00:1e.3 cmd <- 02
1498 13:53:16.046726 PCI: 00:1f.0 subsystem <- 8086/0284
1499 13:53:16.049963 PCI: 00:1f.0 cmd <- 407
1500 13:53:16.053246 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 13:53:16.057320 PCI: 00:1f.3 cmd <- 02
1502 13:53:16.060006 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 13:53:16.063305 PCI: 00:1f.4 cmd <- 03
1504 13:53:16.066567 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 13:53:16.070482 PCI: 00:1f.5 cmd <- 406
1506 13:53:16.078514 PCI: 01:00.0 cmd <- 02
1507 13:53:16.083873 done.
1508 13:53:16.095574 ME: Version: 14.0.39.1367
1509 13:53:16.102355 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 13:53:16.105688 Initializing devices...
1511 13:53:16.105780 Root Device init ...
1512 13:53:16.112498 Chrome EC: Set SMI mask to 0x0000000000000000
1513 13:53:16.115953 Chrome EC: clear events_b mask to 0x0000000000000000
1514 13:53:16.122083 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 13:53:16.128550 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 13:53:16.135886 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 13:53:16.139163 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 13:53:16.141997 Root Device init finished in 35222 usecs
1519 13:53:16.145760 CPU_CLUSTER: 0 init ...
1520 13:53:16.152151 CPU_CLUSTER: 0 init finished in 2448 usecs
1521 13:53:16.156254 PCI: 00:00.0 init ...
1522 13:53:16.159433 CPU TDP: 15 Watts
1523 13:53:16.162796 CPU PL2 = 64 Watts
1524 13:53:16.166145 PCI: 00:00.0 init finished in 7080 usecs
1525 13:53:16.169440 PCI: 00:02.0 init ...
1526 13:53:16.173264 PCI: 00:02.0 init finished in 2255 usecs
1527 13:53:16.176599 PCI: 00:08.0 init ...
1528 13:53:16.180123 PCI: 00:08.0 init finished in 2253 usecs
1529 13:53:16.183084 PCI: 00:12.0 init ...
1530 13:53:16.186538 PCI: 00:12.0 init finished in 2252 usecs
1531 13:53:16.189808 PCI: 00:14.0 init ...
1532 13:53:16.193216 PCI: 00:14.0 init finished in 2253 usecs
1533 13:53:16.196095 PCI: 00:14.2 init ...
1534 13:53:16.199331 PCI: 00:14.2 init finished in 2252 usecs
1535 13:53:16.202722 PCI: 00:14.3 init ...
1536 13:53:16.206235 PCI: 00:14.3 init finished in 2264 usecs
1537 13:53:16.209643 PCI: 00:15.0 init ...
1538 13:53:16.213104 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 13:53:16.216511 PCI: 00:15.0 init finished in 5978 usecs
1540 13:53:16.219243 PCI: 00:15.1 init ...
1541 13:53:16.223156 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 13:53:16.226278 PCI: 00:15.1 init finished in 5979 usecs
1543 13:53:16.230078 PCI: 00:16.0 init ...
1544 13:53:16.233108 PCI: 00:16.0 init finished in 2243 usecs
1545 13:53:16.236786 PCI: 00:19.0 init ...
1546 13:53:16.240034 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 13:53:16.247034 PCI: 00:19.0 init finished in 5980 usecs
1548 13:53:16.247173 PCI: 00:1d.0 init ...
1549 13:53:16.250376 Initializing PCH PCIe bridge.
1550 13:53:16.253656 PCI: 00:1d.0 init finished in 5276 usecs
1551 13:53:16.258129 PCI: 00:1f.0 init ...
1552 13:53:16.261282 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 13:53:16.268299 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 13:53:16.268456 IOAPIC: ID = 0x02
1555 13:53:16.271690 IOAPIC: Dumping registers
1556 13:53:16.275000 reg 0x0000: 0x02000000
1557 13:53:16.278418 reg 0x0001: 0x00770020
1558 13:53:16.278535 reg 0x0002: 0x00000000
1559 13:53:16.284954 PCI: 00:1f.0 init finished in 23540 usecs
1560 13:53:16.288309 PCI: 00:1f.4 init ...
1561 13:53:16.291795 PCI: 00:1f.4 init finished in 2264 usecs
1562 13:53:16.302674 PCI: 01:00.0 init ...
1563 13:53:16.306084 PCI: 01:00.0 init finished in 2253 usecs
1564 13:53:16.310096 PNP: 0c09.0 init ...
1565 13:53:16.313467 Google Chrome EC uptime: 11.057 seconds
1566 13:53:16.320142 Google Chrome AP resets since EC boot: 0
1567 13:53:16.323483 Google Chrome most recent AP reset causes:
1568 13:53:16.329657 Google Chrome EC reset flags at last EC boot: reset-pin
1569 13:53:16.333123 PNP: 0c09.0 init finished in 20578 usecs
1570 13:53:16.336328 Devices initialized
1571 13:53:16.339540 Show all devs... After init.
1572 13:53:16.339636 Root Device: enabled 1
1573 13:53:16.342853 CPU_CLUSTER: 0: enabled 1
1574 13:53:16.346697 DOMAIN: 0000: enabled 1
1575 13:53:16.346787 APIC: 00: enabled 1
1576 13:53:16.349971 PCI: 00:00.0: enabled 1
1577 13:53:16.353387 PCI: 00:02.0: enabled 1
1578 13:53:16.356114 PCI: 00:04.0: enabled 0
1579 13:53:16.356207 PCI: 00:05.0: enabled 0
1580 13:53:16.359413 PCI: 00:12.0: enabled 1
1581 13:53:16.363135 PCI: 00:12.5: enabled 0
1582 13:53:16.366506 PCI: 00:12.6: enabled 0
1583 13:53:16.366599 PCI: 00:14.0: enabled 1
1584 13:53:16.369790 PCI: 00:14.1: enabled 0
1585 13:53:16.373092 PCI: 00:14.3: enabled 1
1586 13:53:16.373187 PCI: 00:14.5: enabled 0
1587 13:53:16.376258 PCI: 00:15.0: enabled 1
1588 13:53:16.379615 PCI: 00:15.1: enabled 1
1589 13:53:16.382821 PCI: 00:15.2: enabled 0
1590 13:53:16.382914 PCI: 00:15.3: enabled 0
1591 13:53:16.385901 PCI: 00:16.0: enabled 1
1592 13:53:16.389297 PCI: 00:16.1: enabled 0
1593 13:53:16.392715 PCI: 00:16.2: enabled 0
1594 13:53:16.392811 PCI: 00:16.3: enabled 0
1595 13:53:16.396067 PCI: 00:16.4: enabled 0
1596 13:53:16.399368 PCI: 00:16.5: enabled 0
1597 13:53:16.402703 PCI: 00:17.0: enabled 1
1598 13:53:16.402796 PCI: 00:19.0: enabled 1
1599 13:53:16.406109 PCI: 00:19.1: enabled 0
1600 13:53:16.408837 PCI: 00:19.2: enabled 0
1601 13:53:16.412213 PCI: 00:1a.0: enabled 0
1602 13:53:16.412336 PCI: 00:1c.0: enabled 0
1603 13:53:16.415478 PCI: 00:1c.1: enabled 0
1604 13:53:16.418873 PCI: 00:1c.2: enabled 0
1605 13:53:16.422281 PCI: 00:1c.3: enabled 0
1606 13:53:16.422376 PCI: 00:1c.4: enabled 0
1607 13:53:16.425660 PCI: 00:1c.5: enabled 0
1608 13:53:16.429061 PCI: 00:1c.6: enabled 0
1609 13:53:16.429161 PCI: 00:1c.7: enabled 0
1610 13:53:16.432420 PCI: 00:1d.0: enabled 1
1611 13:53:16.435757 PCI: 00:1d.1: enabled 0
1612 13:53:16.439180 PCI: 00:1d.2: enabled 0
1613 13:53:16.439294 PCI: 00:1d.3: enabled 0
1614 13:53:16.441863 PCI: 00:1d.4: enabled 0
1615 13:53:16.445263 PCI: 00:1d.5: enabled 0
1616 13:53:16.448761 PCI: 00:1e.0: enabled 1
1617 13:53:16.448855 PCI: 00:1e.1: enabled 0
1618 13:53:16.451861 PCI: 00:1e.2: enabled 1
1619 13:53:16.455179 PCI: 00:1e.3: enabled 1
1620 13:53:16.458845 PCI: 00:1f.0: enabled 1
1621 13:53:16.458942 PCI: 00:1f.1: enabled 0
1622 13:53:16.462259 PCI: 00:1f.2: enabled 0
1623 13:53:16.465685 PCI: 00:1f.3: enabled 1
1624 13:53:16.465779 PCI: 00:1f.4: enabled 1
1625 13:53:16.468783 PCI: 00:1f.5: enabled 1
1626 13:53:16.471971 PCI: 00:1f.6: enabled 0
1627 13:53:16.475208 USB0 port 0: enabled 1
1628 13:53:16.475302 I2C: 01:15: enabled 1
1629 13:53:16.478649 I2C: 02:5d: enabled 1
1630 13:53:16.481828 GENERIC: 0.0: enabled 1
1631 13:53:16.481921 I2C: 03:1a: enabled 1
1632 13:53:16.485172 I2C: 03:38: enabled 1
1633 13:53:16.488347 I2C: 03:39: enabled 1
1634 13:53:16.488441 I2C: 03:3a: enabled 1
1635 13:53:16.491566 I2C: 03:3b: enabled 1
1636 13:53:16.495428 PCI: 00:00.0: enabled 1
1637 13:53:16.495543 SPI: 00: enabled 1
1638 13:53:16.498611 SPI: 01: enabled 1
1639 13:53:16.501397 PNP: 0c09.0: enabled 1
1640 13:53:16.501497 USB2 port 0: enabled 1
1641 13:53:16.504759 USB2 port 1: enabled 1
1642 13:53:16.508141 USB2 port 2: enabled 0
1643 13:53:16.511409 USB2 port 3: enabled 0
1644 13:53:16.511542 USB2 port 5: enabled 0
1645 13:53:16.514745 USB2 port 6: enabled 1
1646 13:53:16.518227 USB2 port 9: enabled 1
1647 13:53:16.518325 USB3 port 0: enabled 1
1648 13:53:16.521516 USB3 port 1: enabled 1
1649 13:53:16.524895 USB3 port 2: enabled 1
1650 13:53:16.528412 USB3 port 3: enabled 1
1651 13:53:16.528508 USB3 port 4: enabled 0
1652 13:53:16.531009 APIC: 03: enabled 1
1653 13:53:16.534568 APIC: 04: enabled 1
1654 13:53:16.534655 APIC: 07: enabled 1
1655 13:53:16.537990 APIC: 01: enabled 1
1656 13:53:16.538073 APIC: 05: enabled 1
1657 13:53:16.541308 APIC: 06: enabled 1
1658 13:53:16.544723 APIC: 02: enabled 1
1659 13:53:16.544842 PCI: 00:08.0: enabled 1
1660 13:53:16.548060 PCI: 00:14.2: enabled 1
1661 13:53:16.551294 PCI: 01:00.0: enabled 1
1662 13:53:16.554559 Disabling ACPI via APMC:
1663 13:53:16.557815 done.
1664 13:53:16.561135 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 13:53:16.564103 ELOG: NV offset 0xaf0000 size 0x4000
1666 13:53:16.571741 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 13:53:16.578174 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:14 UTC
1668 13:53:16.584924 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:14 UTC
1669 13:53:16.591513 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:14 UTC
1670 13:53:16.598401 ELOG: Event(9A) added with size 9 at 2023-06-06 13:53:14 UTC
1671 13:53:16.604819 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:14 UTC
1672 13:53:16.611407 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:14 UTC
1673 13:53:16.614867 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 13:53:16.622139 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:14 UTC
1675 13:53:16.632165 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 13:53:16.638934 ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:14 UTC
1677 13:53:16.642247 elog_add_boot_reason: Logged dev mode boot
1678 13:53:16.642342 Finalize devices...
1679 13:53:16.645664 PCI: 00:17.0 final
1680 13:53:16.648463 Devices finalized
1681 13:53:16.651794 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 13:53:16.658619 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 13:53:16.661737 ME: HFSTS1 : 0x90000245
1684 13:53:16.665078 ME: HFSTS2 : 0x3B850126
1685 13:53:16.671422 ME: HFSTS3 : 0x00000020
1686 13:53:16.675338 ME: HFSTS4 : 0x00004800
1687 13:53:16.678424 ME: HFSTS5 : 0x00000000
1688 13:53:16.681671 ME: HFSTS6 : 0x40400006
1689 13:53:16.685356 ME: Manufacturing Mode : NO
1690 13:53:16.688446 ME: FW Partition Table : OK
1691 13:53:16.691627 ME: Bringup Loader Failure : NO
1692 13:53:16.694923 ME: Firmware Init Complete : YES
1693 13:53:16.698065 ME: Boot Options Present : NO
1694 13:53:16.701769 ME: Update In Progress : NO
1695 13:53:16.704773 ME: D0i3 Support : YES
1696 13:53:16.708533 ME: Low Power State Enabled : NO
1697 13:53:16.711814 ME: CPU Replaced : NO
1698 13:53:16.715010 ME: CPU Replacement Valid : YES
1699 13:53:16.717796 ME: Current Working State : 5
1700 13:53:16.721159 ME: Current Operation State : 1
1701 13:53:16.725083 ME: Current Operation Mode : 0
1702 13:53:16.727806 ME: Error Code : 0
1703 13:53:16.731225 ME: CPU Debug Disabled : YES
1704 13:53:16.734672 ME: TXT Support : NO
1705 13:53:16.741377 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 13:53:16.747941 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 13:53:16.748053 CBFS @ c08000 size 3f8000
1708 13:53:16.754547 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 13:53:16.757892 CBFS: Locating 'fallback/dsdt.aml'
1710 13:53:16.761204 CBFS: Found @ offset 10bb80 size 3fa5
1711 13:53:16.767741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 13:53:16.770896 CBFS @ c08000 size 3f8000
1713 13:53:16.774088 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 13:53:16.777347 CBFS: Locating 'fallback/slic'
1715 13:53:16.782189 CBFS: 'fallback/slic' not found.
1716 13:53:16.789021 ACPI: Writing ACPI tables at 99b3e000.
1717 13:53:16.789126 ACPI: * FACS
1718 13:53:16.792151 ACPI: * DSDT
1719 13:53:16.795461 Ramoops buffer: 0x100000@0x99a3d000.
1720 13:53:16.799259 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 13:53:16.805710 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 13:53:16.808825 Google Chrome EC: version:
1723 13:53:16.812109 ro: helios_v2.0.2659-56403530b
1724 13:53:16.815875 rw: helios_v2.0.2849-c41de27e7d
1725 13:53:16.816011 running image: 1
1726 13:53:16.819687 ACPI: * FADT
1727 13:53:16.819812 SCI is IRQ9
1728 13:53:16.826073 ACPI: added table 1/32, length now 40
1729 13:53:16.826213 ACPI: * SSDT
1730 13:53:16.829472 Found 1 CPU(s) with 8 core(s) each.
1731 13:53:16.832810 Error: Could not locate 'wifi_sar' in VPD.
1732 13:53:16.839544 Checking CBFS for default SAR values
1733 13:53:16.842952 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 13:53:16.846284 CBFS @ c08000 size 3f8000
1735 13:53:16.853003 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 13:53:16.856297 CBFS: Locating 'wifi_sar_defaults.hex'
1737 13:53:16.859191 CBFS: Found @ offset 5fac0 size 77
1738 13:53:16.863151 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 13:53:16.869213 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 13:53:16.873057 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 13:53:16.879630 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 13:53:16.882875 failed to find key in VPD: dsm_calib_r0_0
1743 13:53:16.892418 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 13:53:16.896029 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 13:53:16.899171 failed to find key in VPD: dsm_calib_r0_1
1746 13:53:16.909341 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 13:53:16.915601 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 13:53:16.918853 failed to find key in VPD: dsm_calib_r0_2
1749 13:53:16.929139 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 13:53:16.932293 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 13:53:16.939098 failed to find key in VPD: dsm_calib_r0_3
1752 13:53:16.945529 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 13:53:16.952076 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 13:53:16.955587 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 13:53:16.958751 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 13:53:16.962745 EC returned error result code 1
1757 13:53:16.966747 EC returned error result code 1
1758 13:53:16.970119 EC returned error result code 1
1759 13:53:16.976837 PS2K: Bad resp from EC. Vivaldi disabled!
1760 13:53:16.980060 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 13:53:16.986630 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 13:53:16.993191 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 13:53:16.996983 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 13:53:17.003322 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 13:53:17.009978 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 13:53:17.016851 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 13:53:17.020054 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 13:53:17.026684 ACPI: added table 2/32, length now 44
1769 13:53:17.026807 ACPI: * MCFG
1770 13:53:17.029722 ACPI: added table 3/32, length now 48
1771 13:53:17.032919 ACPI: * TPM2
1772 13:53:17.036547 TPM2 log created at 99a2d000
1773 13:53:17.039565 ACPI: added table 4/32, length now 52
1774 13:53:17.039656 ACPI: * MADT
1775 13:53:17.042893 SCI is IRQ9
1776 13:53:17.046213 ACPI: added table 5/32, length now 56
1777 13:53:17.046327 current = 99b43ac0
1778 13:53:17.049458 ACPI: * DMAR
1779 13:53:17.052836 ACPI: added table 6/32, length now 60
1780 13:53:17.056131 ACPI: * IGD OpRegion
1781 13:53:17.056236 GMA: Found VBT in CBFS
1782 13:53:17.059502 GMA: Found valid VBT in CBFS
1783 13:53:17.062758 ACPI: added table 7/32, length now 64
1784 13:53:17.066211 ACPI: * HPET
1785 13:53:17.069489 ACPI: added table 8/32, length now 68
1786 13:53:17.069574 ACPI: done.
1787 13:53:17.072819 ACPI tables: 31744 bytes.
1788 13:53:17.076114 smbios_write_tables: 99a2c000
1789 13:53:17.079528 EC returned error result code 3
1790 13:53:17.082695 Couldn't obtain OEM name from CBI
1791 13:53:17.086075 Create SMBIOS type 17
1792 13:53:17.089421 PCI: 00:00.0 (Intel Cannonlake)
1793 13:53:17.092736 PCI: 00:14.3 (Intel WiFi)
1794 13:53:17.096090 SMBIOS tables: 939 bytes.
1795 13:53:17.099277 Writing table forward entry at 0x00000500
1796 13:53:17.106301 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 13:53:17.109574 Writing coreboot table at 0x99b62000
1798 13:53:17.115892 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 13:53:17.119023 1. 0000000000001000-000000000009ffff: RAM
1800 13:53:17.123195 2. 00000000000a0000-00000000000fffff: RESERVED
1801 13:53:17.129076 3. 0000000000100000-0000000099a2bfff: RAM
1802 13:53:17.132802 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 13:53:17.139391 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 13:53:17.145830 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 13:53:17.149066 7. 000000009a000000-000000009f7fffff: RESERVED
1806 13:53:17.155653 8. 00000000e0000000-00000000efffffff: RESERVED
1807 13:53:17.158819 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 13:53:17.162212 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 13:53:17.168891 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 13:53:17.172169 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 13:53:17.178793 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 13:53:17.182163 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 13:53:17.188790 15. 0000000100000000-000000045e7fffff: RAM
1814 13:53:17.192106 Graphics framebuffer located at 0xc0000000
1815 13:53:17.195477 Passing 5 GPIOs to payload:
1816 13:53:17.198772 NAME | PORT | POLARITY | VALUE
1817 13:53:17.205591 write protect | undefined | high | low
1818 13:53:17.208954 lid | undefined | high | high
1819 13:53:17.215306 power | undefined | high | low
1820 13:53:17.222103 oprom | undefined | high | low
1821 13:53:17.225356 EC in RW | 0x000000cb | high | low
1822 13:53:17.228365 Board ID: 4
1823 13:53:17.232145 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 13:53:17.235348 CBFS @ c08000 size 3f8000
1825 13:53:17.241864 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 13:53:17.248147 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 13:53:17.248300 coreboot table: 1492 bytes.
1828 13:53:17.252022 IMD ROOT 0. 99fff000 00001000
1829 13:53:17.255326 IMD SMALL 1. 99ffe000 00001000
1830 13:53:17.258513 FSP MEMORY 2. 99c4e000 003b0000
1831 13:53:17.261943 CONSOLE 3. 99c2e000 00020000
1832 13:53:17.265308 FMAP 4. 99c2d000 0000054e
1833 13:53:17.268662 TIME STAMP 5. 99c2c000 00000910
1834 13:53:17.271349 VBOOT WORK 6. 99c18000 00014000
1835 13:53:17.274755 MRC DATA 7. 99c16000 00001958
1836 13:53:17.278018 ROMSTG STCK 8. 99c15000 00001000
1837 13:53:17.281257 AFTER CAR 9. 99c0b000 0000a000
1838 13:53:17.284671 RAMSTAGE 10. 99baf000 0005c000
1839 13:53:17.287942 REFCODE 11. 99b7a000 00035000
1840 13:53:17.291243 SMM BACKUP 12. 99b6a000 00010000
1841 13:53:17.295138 COREBOOT 13. 99b62000 00008000
1842 13:53:17.298423 ACPI 14. 99b3e000 00024000
1843 13:53:17.301104 ACPI GNVS 15. 99b3d000 00001000
1844 13:53:17.304458 RAMOOPS 16. 99a3d000 00100000
1845 13:53:17.307831 TPM2 TCGLOG17. 99a2d000 00010000
1846 13:53:17.311232 SMBIOS 18. 99a2c000 00000800
1847 13:53:17.314535 IMD small region:
1848 13:53:17.317802 IMD ROOT 0. 99ffec00 00000400
1849 13:53:17.320989 FSP RUNTIME 1. 99ffebe0 00000004
1850 13:53:17.324347 EC HOSTEVENT 2. 99ffebc0 00000008
1851 13:53:17.328161 POWER STATE 3. 99ffeb80 00000040
1852 13:53:17.331352 ROMSTAGE 4. 99ffeb60 00000004
1853 13:53:17.334426 MEM INFO 5. 99ffe9a0 000001b9
1854 13:53:17.338081 VPD 6. 99ffe920 0000006c
1855 13:53:17.341189 MTRR: Physical address space:
1856 13:53:17.348036 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 13:53:17.354383 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 13:53:17.361411 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 13:53:17.367829 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 13:53:17.374363 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 13:53:17.381041 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 13:53:17.387784 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 13:53:17.391112 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 13:53:17.394451 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 13:53:17.397770 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 13:53:17.400967 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 13:53:17.407574 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 13:53:17.410758 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 13:53:17.414087 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 13:53:17.417321 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 13:53:17.423877 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 13:53:17.427164 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 13:53:17.430492 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 13:53:17.433768 call enable_fixed_mtrr()
1875 13:53:17.436936 CPU physical address size: 39 bits
1876 13:53:17.444097 MTRR: default type WB/UC MTRR counts: 6/8.
1877 13:53:17.447299 MTRR: WB selected as default type.
1878 13:53:17.450580 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 13:53:17.457227 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 13:53:17.463497 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 13:53:17.470568 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 13:53:17.477221 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 13:53:17.483338 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 13:53:17.486625 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 13:53:17.493498 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 13:53:17.496816 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 13:53:17.500193 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 13:53:17.503388 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 13:53:17.510155 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 13:53:17.513717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 13:53:17.516355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 13:53:17.519815 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 13:53:17.523316 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 13:53:17.529944 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 13:53:17.530034
1896 13:53:17.530122 MTRR check
1897 13:53:17.533013 Fixed MTRRs : Enabled
1898 13:53:17.536390 Variable MTRRs: Enabled
1899 13:53:17.536486
1900 13:53:17.539821 call enable_fixed_mtrr()
1901 13:53:17.543055 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 13:53:17.546244 CPU physical address size: 39 bits
1903 13:53:17.552991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 13:53:17.555994 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 13:53:17.559226 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 13:53:17.565939 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 13:53:17.569710 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 13:53:17.573033 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 13:53:17.576153 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 13:53:17.582603 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 13:53:17.585825 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 13:53:17.589355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 13:53:17.592485 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 13:53:17.596002 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 13:53:17.602056 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 13:53:17.606019 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 13:53:17.608755 call enable_fixed_mtrr()
1918 13:53:17.612141 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 13:53:17.615554 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 13:53:17.622505 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 13:53:17.625754 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 13:53:17.629235 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 13:53:17.631899 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 13:53:17.638469 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 13:53:17.641779 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 13:53:17.645116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 13:53:17.648405 CPU physical address size: 39 bits
1928 13:53:17.652240 call enable_fixed_mtrr()
1929 13:53:17.654856 CBFS @ c08000 size 3f8000
1930 13:53:17.661577 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1931 13:53:17.664734 CBFS: Locating 'fallback/payload'
1932 13:53:17.668572 CPU physical address size: 39 bits
1933 13:53:17.671911 CBFS: Found @ offset 1c96c0 size 3f798
1934 13:53:17.675076 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 13:53:17.678453 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 13:53:17.684818 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 13:53:17.688041 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 13:53:17.691377 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 13:53:17.694859 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 13:53:17.698077 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 13:53:17.704713 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 13:53:17.707876 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 13:53:17.711254 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 13:53:17.714659 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 13:53:17.721454 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 13:53:17.724892 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 13:53:17.728251 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 13:53:17.731041 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 13:53:17.737669 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 13:53:17.740862 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 13:53:17.744209 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 13:53:17.747532 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 13:53:17.754210 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 13:53:17.757565 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 13:53:17.760707 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 13:53:17.764048 call enable_fixed_mtrr()
1957 13:53:17.767357 call enable_fixed_mtrr()
1958 13:53:17.770628 CPU physical address size: 39 bits
1959 13:53:17.774165 CPU physical address size: 39 bits
1960 13:53:17.777629 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 13:53:17.780380 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 13:53:17.787337 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:53:17.790576 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:53:17.793711 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:53:17.797003 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:53:17.803584 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:53:17.806965 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:53:17.810311 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:53:17.813651 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:53:17.819859 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:53:17.823328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:53:17.826652 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 13:53:17.829911 call enable_fixed_mtrr()
1974 13:53:17.833475 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 13:53:17.837158 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 13:53:17.843130 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 13:53:17.846458 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 13:53:17.849979 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 13:53:17.853453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 13:53:17.859723 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 13:53:17.862913 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 13:53:17.866958 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 13:53:17.870091 CPU physical address size: 39 bits
1984 13:53:17.873327 call enable_fixed_mtrr()
1985 13:53:17.876471 Checking segment from ROM address 0xffdd16f8
1986 13:53:17.879782 CPU physical address size: 39 bits
1987 13:53:17.886588 Checking segment from ROM address 0xffdd1714
1988 13:53:17.889974 Loading segment from ROM address 0xffdd16f8
1989 13:53:17.892843 code (compression=0)
1990 13:53:17.969368 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 13:53:17.969842 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 13:53:17.970170 it's not compressed!
1993 13:53:18.024850 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 13:53:18.025669 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 13:53:18.026171 Loading segment from ROM address 0xffdd1714
1996 13:53:18.026626 Entry Point 0x30000000
1997 13:53:18.027063 Loaded segments
1998 13:53:18.027950 Finalizing chipset.
1999 13:53:18.029529 Finalizing SMM.
2000 13:53:18.032899 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 13:53:18.036253 mp_park_aps done after 0 msecs.
2002 13:53:18.042845 Jumping to boot code at 30000000(99b62000)
2003 13:53:18.049881 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 13:53:18.050516
2005 13:53:18.050955
2006 13:53:18.051348
2007 13:53:18.053116 Starting depthcharge on Helios...
2008 13:53:18.053539
2009 13:53:18.054642 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 13:53:18.055168 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 13:53:18.055654 Setting prompt string to ['hatch:']
2012 13:53:18.056013 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 13:53:18.062396 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 13:53:18.062575
2015 13:53:18.068905 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 13:53:18.069071
2017 13:53:18.075706 board_setup: Info: eMMC controller not present; skipping
2018 13:53:18.075888
2019 13:53:18.078964 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 13:53:18.079079
2021 13:53:18.085946 board_setup: Info: SDHCI controller not present; skipping
2022 13:53:18.086084
2023 13:53:18.089363 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 13:53:18.092377
2025 13:53:18.092471 Wipe memory regions:
2026 13:53:18.092581
2027 13:53:18.095386 [0x00000000001000, 0x000000000a0000)
2028 13:53:18.095501
2029 13:53:18.098722 [0x00000000100000, 0x00000030000000)
2030 13:53:18.165255
2031 13:53:18.168520 [0x00000030657430, 0x00000099a2c000)
2032 13:53:18.315023
2033 13:53:18.318198 [0x00000100000000, 0x0000045e800000)
2034 13:53:19.775289
2035 13:53:19.775438 R8152: Initializing
2036 13:53:19.775527
2037 13:53:19.778295 Version 9 (ocp_data = 6010)
2038 13:53:19.782714
2039 13:53:19.782820 R8152: Done initializing
2040 13:53:19.782894
2041 13:53:19.785747 Adding net device
2042 13:53:20.269005
2043 13:53:20.269162 R8152: Initializing
2044 13:53:20.269284
2045 13:53:20.272177 Version 6 (ocp_data = 5c30)
2046 13:53:20.272309
2047 13:53:20.275349 R8152: Done initializing
2048 13:53:20.275532
2049 13:53:20.278431 net_add_device: Attemp to include the same device
2050 13:53:20.282160
2051 13:53:20.289387 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 13:53:20.289521
2053 13:53:20.289594
2054 13:53:20.289672
2055 13:53:20.289966 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 13:53:20.390351 hatch: tftpboot 192.168.201.1 10607076/tftp-deploy-rot6iup9/kernel/bzImage 10607076/tftp-deploy-rot6iup9/kernel/cmdline 10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
2058 13:53:20.390528 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 13:53:20.390628 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 13:53:20.394841 tftpboot 192.168.201.1 10607076/tftp-deploy-rot6iup9/kernel/bzIploy-rot6iup9/kernel/cmdline 10607076/tftp-deploy-rot6iup9/ramdisk/ramdisk.cpio.gz
2061 13:53:20.394964
2062 13:53:20.395061 Waiting for link
2063 13:53:20.595423
2064 13:53:20.595624 done.
2065 13:53:20.595725
2066 13:53:20.595797 MAC: 00:24:32:50:1a:59
2067 13:53:20.595864
2068 13:53:20.599210 Sending DHCP discover... done.
2069 13:53:20.599358
2070 13:53:20.602152 Waiting for reply... done.
2071 13:53:20.602273
2072 13:53:20.605232 Sending DHCP request... done.
2073 13:53:20.605349
2074 13:53:21.075137 Waiting for reply... done.
2075 13:53:21.075377
2076 13:53:21.075560 My ip is 192.168.201.14
2077 13:53:21.075711
2078 13:53:21.078396 The DHCP server ip is 192.168.201.1
2079 13:53:21.082133
2080 13:53:21.085320 TFTP server IP predefined by user: 192.168.201.1
2081 13:53:21.085438
2082 13:53:21.092166 Bootfile predefined by user: 10607076/tftp-deploy-rot6iup9/kernel/bzImage
2083 13:53:21.092271
2084 13:53:21.095427 Sending tftp read request... done.
2085 13:53:21.095543
2086 13:53:21.098211 Waiting for the transfer...
2087 13:53:21.098306
2088 13:53:21.626176 00000000 ################################################################
2089 13:53:21.626345
2090 13:53:22.147864 00080000 ################################################################
2091 13:53:22.148020
2092 13:53:22.684686 00100000 ################################################################
2093 13:53:22.684854
2094 13:53:23.390782 00180000 ################################################################
2095 13:53:23.391352
2096 13:53:23.770981 00200000 ################################################################
2097 13:53:23.771182
2098 13:53:24.302162 00280000 ################################################################
2099 13:53:24.302321
2100 13:53:24.851869 00300000 ################################################################
2101 13:53:24.852043
2102 13:53:25.404599 00380000 ################################################################
2103 13:53:25.404758
2104 13:53:25.950762 00400000 ################################################################
2105 13:53:25.950907
2106 13:53:26.494700 00480000 ################################################################
2107 13:53:26.494897
2108 13:53:27.009646 00500000 ################################################################
2109 13:53:27.009821
2110 13:53:27.523397 00580000 ################################################################
2111 13:53:27.523561
2112 13:53:28.036351 00600000 ################################################################
2113 13:53:28.036505
2114 13:53:28.560265 00680000 ################################################################
2115 13:53:28.560452
2116 13:53:29.076304 00700000 ################################################################
2117 13:53:29.076465
2118 13:53:29.093667 00780000 ## done.
2119 13:53:29.093805
2120 13:53:29.096887 The bootfile was 7880592 bytes long.
2121 13:53:29.096992
2122 13:53:29.100035 Sending tftp read request... done.
2123 13:53:29.100122
2124 13:53:29.103236 Waiting for the transfer...
2125 13:53:29.103337
2126 13:53:29.618082 00000000 ################################################################
2127 13:53:29.618230
2128 13:53:30.131680 00080000 ################################################################
2129 13:53:30.131846
2130 13:53:30.646929 00100000 ################################################################
2131 13:53:30.647124
2132 13:53:31.169831 00180000 ################################################################
2133 13:53:31.169979
2134 13:53:31.680581 00200000 ################################################################
2135 13:53:31.680731
2136 13:53:32.230199 00280000 ################################################################
2137 13:53:32.230338
2138 13:53:32.751621 00300000 ################################################################
2139 13:53:32.751765
2140 13:53:33.279764 00380000 ################################################################
2141 13:53:33.279914
2142 13:53:33.812849 00400000 ################################################################
2143 13:53:33.812995
2144 13:53:34.369886 00480000 ################################################################
2145 13:53:34.370032
2146 13:53:34.897492 00500000 ############################################################### done.
2147 13:53:34.897639
2148 13:53:34.900626 Sending tftp read request... done.
2149 13:53:34.900709
2150 13:53:34.903915 Waiting for the transfer...
2151 13:53:34.903996
2152 13:53:34.904064 00000000 # done.
2153 13:53:34.904131
2154 13:53:34.913769 Command line loaded dynamically from TFTP file: 10607076/tftp-deploy-rot6iup9/kernel/cmdline
2155 13:53:34.913856
2156 13:53:34.940463 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607076/extract-nfsrootfs-5itae287,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2157 13:53:34.940577
2158 13:53:34.947065 ec_init(0): CrosEC protocol v3 supported (256, 256)
2159 13:53:34.950475
2160 13:53:34.953456 Shutting down all USB controllers.
2161 13:53:34.953551
2162 13:53:34.953632 Removing current net device
2163 13:53:34.957537
2164 13:53:34.957648 Finalizing coreboot
2165 13:53:34.957723
2166 13:53:34.964067 Exiting depthcharge with code 4 at timestamp: 24228030
2167 13:53:34.964163
2168 13:53:34.964236
2169 13:53:34.964304 Starting kernel ...
2170 13:53:34.964371
2171 13:53:34.964436
2172 13:53:34.964812 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2173 13:53:34.964920 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2174 13:53:34.965009 Setting prompt string to ['Linux version [0-9]']
2175 13:53:34.965087 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 13:53:34.965162 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 13:57:59.965195 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2180 13:57:59.965554 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2182 13:57:59.965812 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 13:57:59.966260 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 13:57:59.966610 Cleaning after the job
2188 13:57:59.966715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/ramdisk
2189 13:57:59.967630 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/kernel
2190 13:57:59.968824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/nfsrootfs
2191 13:58:00.037399 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607076/tftp-deploy-rot6iup9/modules
2192 13:58:00.037961 start: 5.1 power-off (timeout 00:00:30) [common]
2193 13:58:00.038301 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2194 13:58:00.118153 >> Command sent successfully.
2195 13:58:00.121522 Returned 0 in 0 seconds
2196 13:58:00.222015 end: 5.1 power-off (duration 00:00:00) [common]
2198 13:58:00.222413 start: 5.2 read-feedback (timeout 00:10:00) [common]
2199 13:58:00.222756 Listened to connection for namespace 'common' for up to 1s
2201 13:58:00.223261 Listened to connection for namespace 'common' for up to 1s
2202 13:58:01.223512 Finalising connection for namespace 'common'
2203 13:58:01.223717 Disconnecting from shell: Finalise
2204 13:58:01.223843
2205 13:58:01.324225 end: 5.2 read-feedback (duration 00:00:01) [common]
2206 13:58:01.324413 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607076
2207 13:58:01.628374 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607076
2208 13:58:01.628576 JobError: Your job cannot terminate cleanly.