Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:52:41.276798 lava-dispatcher, installed at version: 2023.05.1
2 13:52:41.277058 start: 0 validate
3 13:52:41.277194 Start time: 2023-06-06 13:52:41.277187+00:00 (UTC)
4 13:52:41.277366 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:52:41.277497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:52:41.553044 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:52:41.553300 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:52:45.053100 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:52:45.053341 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:52:45.339881 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:52:45.340079 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:52:45.842595 validate duration: 4.57
14 13:52:45.842885 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:52:45.842997 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:52:45.843098 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:52:45.843237 Not decompressing ramdisk as can be used compressed.
18 13:52:45.843331 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 13:52:45.843407 saving as /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/ramdisk/initrd.cpio.gz
20 13:52:45.843507 total size: 5432865 (5MB)
21 13:52:45.845076 progress 0% (0MB)
22 13:52:45.846766 progress 5% (0MB)
23 13:52:45.848223 progress 10% (0MB)
24 13:52:45.849632 progress 15% (0MB)
25 13:52:45.851172 progress 20% (1MB)
26 13:52:45.852599 progress 25% (1MB)
27 13:52:45.853988 progress 30% (1MB)
28 13:52:45.855523 progress 35% (1MB)
29 13:52:45.856923 progress 40% (2MB)
30 13:52:45.858302 progress 45% (2MB)
31 13:52:45.859683 progress 50% (2MB)
32 13:52:45.861228 progress 55% (2MB)
33 13:52:45.862605 progress 60% (3MB)
34 13:52:45.864000 progress 65% (3MB)
35 13:52:45.865542 progress 70% (3MB)
36 13:52:45.866923 progress 75% (3MB)
37 13:52:45.868314 progress 80% (4MB)
38 13:52:45.869693 progress 85% (4MB)
39 13:52:45.871232 progress 90% (4MB)
40 13:52:45.872624 progress 95% (4MB)
41 13:52:45.874027 progress 100% (5MB)
42 13:52:45.874246 5MB downloaded in 0.03s (168.57MB/s)
43 13:52:45.874411 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:52:45.874677 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:52:45.874777 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:52:45.874878 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:52:45.875025 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:52:45.875100 saving as /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/kernel/bzImage
50 13:52:45.875199 total size: 7880592 (7MB)
51 13:52:45.875299 No compression specified
52 13:52:45.877029 progress 0% (0MB)
53 13:52:45.879465 progress 5% (0MB)
54 13:52:45.881579 progress 10% (0MB)
55 13:52:45.883759 progress 15% (1MB)
56 13:52:45.886006 progress 20% (1MB)
57 13:52:45.888230 progress 25% (1MB)
58 13:52:45.890407 progress 30% (2MB)
59 13:52:45.892633 progress 35% (2MB)
60 13:52:45.894866 progress 40% (3MB)
61 13:52:45.896976 progress 45% (3MB)
62 13:52:45.899185 progress 50% (3MB)
63 13:52:45.901364 progress 55% (4MB)
64 13:52:45.903539 progress 60% (4MB)
65 13:52:45.905691 progress 65% (4MB)
66 13:52:45.907867 progress 70% (5MB)
67 13:52:45.909952 progress 75% (5MB)
68 13:52:45.912097 progress 80% (6MB)
69 13:52:45.914280 progress 85% (6MB)
70 13:52:45.916444 progress 90% (6MB)
71 13:52:45.918466 progress 95% (7MB)
72 13:52:45.920511 progress 100% (7MB)
73 13:52:45.920681 7MB downloaded in 0.05s (165.25MB/s)
74 13:52:45.920823 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:52:45.921072 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:52:45.921177 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:52:45.921306 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:52:45.921457 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 13:52:45.921533 saving as /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/nfsrootfs/full.rootfs.tar
81 13:52:45.921632 total size: 133381488 (127MB)
82 13:52:45.921731 Using unxz to decompress xz
83 13:52:45.976704 progress 0% (0MB)
84 13:52:46.334519 progress 5% (6MB)
85 13:52:46.701485 progress 10% (12MB)
86 13:52:46.996638 progress 15% (19MB)
87 13:52:47.185673 progress 20% (25MB)
88 13:52:47.433321 progress 25% (31MB)
89 13:52:47.789116 progress 30% (38MB)
90 13:52:48.147481 progress 35% (44MB)
91 13:52:48.578148 progress 40% (50MB)
92 13:52:48.982543 progress 45% (57MB)
93 13:52:49.348874 progress 50% (63MB)
94 13:52:49.733809 progress 55% (69MB)
95 13:52:50.111492 progress 60% (76MB)
96 13:52:50.500825 progress 65% (82MB)
97 13:52:50.905974 progress 70% (89MB)
98 13:52:51.284900 progress 75% (95MB)
99 13:52:52.044864 progress 80% (101MB)
100 13:52:52.501156 progress 85% (108MB)
101 13:52:52.787171 progress 90% (114MB)
102 13:52:53.313488 progress 95% (120MB)
103 13:52:53.736354 progress 100% (127MB)
104 13:52:53.741922 127MB downloaded in 7.82s (16.27MB/s)
105 13:52:53.742241 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:52:53.742520 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:52:53.742611 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:52:53.742716 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:52:53.742875 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:52:53.742947 saving as /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/modules/modules.tar
112 13:52:53.743010 total size: 251288 (0MB)
113 13:52:53.743072 Using unxz to decompress xz
114 13:52:54.656980 progress 13% (0MB)
115 13:52:54.657415 progress 26% (0MB)
116 13:52:54.657660 progress 39% (0MB)
117 13:52:54.659570 progress 52% (0MB)
118 13:52:54.662301 progress 65% (0MB)
119 13:52:54.665299 progress 78% (0MB)
120 13:52:54.668183 progress 91% (0MB)
121 13:52:54.671009 progress 100% (0MB)
122 13:52:54.679474 0MB downloaded in 0.94s (0.26MB/s)
123 13:52:54.679778 end: 1.4.1 http-download (duration 00:00:01) [common]
125 13:52:54.680075 end: 1.4 download-retry (duration 00:00:01) [common]
126 13:52:54.680176 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 13:52:54.680275 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 13:52:57.146098 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607012/extract-nfsrootfs-d6_bu29w
129 13:52:57.146316 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:52:57.146426 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 13:52:57.146616 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9
132 13:52:57.146753 makedir: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin
133 13:52:57.146858 makedir: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/tests
134 13:52:57.146957 makedir: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/results
135 13:52:57.147058 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-add-keys
136 13:52:57.147202 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-add-sources
137 13:52:57.147329 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-background-process-start
138 13:52:57.147453 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-background-process-stop
139 13:52:57.147576 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-common-functions
140 13:52:57.147697 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-echo-ipv4
141 13:52:57.147817 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-install-packages
142 13:52:57.148196 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-installed-packages
143 13:52:57.148339 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-os-build
144 13:52:57.148536 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-probe-channel
145 13:52:57.148701 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-probe-ip
146 13:52:57.148825 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-target-ip
147 13:52:57.148949 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-target-mac
148 13:52:57.149069 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-target-storage
149 13:52:57.149191 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-case
150 13:52:57.149317 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-event
151 13:52:57.149444 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-feedback
152 13:52:57.149565 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-raise
153 13:52:57.149684 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-reference
154 13:52:57.149811 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-runner
155 13:52:57.149929 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-set
156 13:52:57.150048 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-test-shell
157 13:52:57.150169 Updating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-install-packages (oe)
158 13:52:57.156809 Updating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/bin/lava-installed-packages (oe)
159 13:52:57.157105 Creating /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/environment
160 13:52:57.157297 LAVA metadata
161 13:52:57.157428 - LAVA_JOB_ID=10607012
162 13:52:57.157551 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:52:57.157714 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 13:52:57.157812 skipped lava-vland-overlay
165 13:52:57.157920 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:52:57.158033 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 13:52:57.158125 skipped lava-multinode-overlay
168 13:52:57.158202 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:52:57.158282 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 13:52:57.158359 Loading test definitions
171 13:52:57.158451 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 13:52:57.158521 Using /lava-10607012 at stage 0
173 13:52:57.158841 uuid=10607012_1.5.2.3.1 testdef=None
174 13:52:57.158930 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:52:57.159014 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 13:52:57.159517 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:52:57.159734 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 13:52:57.173759 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:52:57.174046 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 13:52:57.187923 runner path: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/0/tests/0_dmesg test_uuid 10607012_1.5.2.3.1
183 13:52:57.188236 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:52:57.188489 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 13:52:57.188564 Using /lava-10607012 at stage 1
187 13:52:57.188887 uuid=10607012_1.5.2.3.5 testdef=None
188 13:52:57.188979 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:52:57.189065 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 13:52:57.189526 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:52:57.189750 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 13:52:57.194874 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:52:57.195141 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 13:52:57.209786 runner path: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/1/tests/1_bootrr test_uuid 10607012_1.5.2.3.5
197 13:52:57.210056 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:52:57.210278 Creating lava-test-runner.conf files
200 13:52:57.210344 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/0 for stage 0
201 13:52:57.210436 - 0_dmesg
202 13:52:57.210519 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607012/lava-overlay-czt_8py9/lava-10607012/1 for stage 1
203 13:52:57.210609 - 1_bootrr
204 13:52:57.210705 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:52:57.210794 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 13:52:57.218262 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:52:57.218491 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 13:52:57.218651 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:52:57.218803 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:52:57.218896 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 13:52:57.352065 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:52:57.352461 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
213 13:52:57.352609 extracting modules file /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607012/extract-nfsrootfs-d6_bu29w
214 13:52:57.372081 extracting modules file /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607012/extract-overlay-ramdisk-2kpanyn_/ramdisk
215 13:52:57.385821 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:52:57.386003 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
217 13:52:57.386108 [common] Applying overlay to NFS
218 13:52:57.386178 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607012/compress-overlay-tha56x6i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607012/extract-nfsrootfs-d6_bu29w
219 13:52:57.394412 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:52:57.394581 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
221 13:52:57.394683 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:52:57.394773 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
223 13:52:57.394853 Building ramdisk /var/lib/lava/dispatcher/tmp/10607012/extract-overlay-ramdisk-2kpanyn_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607012/extract-overlay-ramdisk-2kpanyn_/ramdisk
224 13:52:57.472918 >> 26161 blocks
225 13:52:58.026047 rename /var/lib/lava/dispatcher/tmp/10607012/extract-overlay-ramdisk-2kpanyn_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
226 13:52:58.026489 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:52:58.026626 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 13:52:58.026726 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 13:52:58.026822 No mkimage arch provided, not using FIT.
230 13:52:58.026910 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:52:58.026996 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:52:58.027100 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:52:58.027194 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 13:52:58.027275 No LXC device requested
235 13:52:58.027354 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:52:58.027441 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 13:52:58.027522 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:52:58.027594 Checking files for TFTP limit of 4294967296 bytes.
239 13:52:58.028028 end: 1 tftp-deploy (duration 00:00:12) [common]
240 13:52:58.028135 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:52:58.028234 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:52:58.028363 substitutions:
243 13:52:58.028430 - {DTB}: None
244 13:52:58.028492 - {INITRD}: 10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
245 13:52:58.028550 - {KERNEL}: 10607012/tftp-deploy-qulynwdf/kernel/bzImage
246 13:52:58.028607 - {LAVA_MAC}: None
247 13:52:58.028663 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607012/extract-nfsrootfs-d6_bu29w
248 13:52:58.028718 - {NFS_SERVER_IP}: 192.168.201.1
249 13:52:58.028773 - {PRESEED_CONFIG}: None
250 13:52:58.028826 - {PRESEED_LOCAL}: None
251 13:52:58.028880 - {RAMDISK}: 10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
252 13:52:58.028934 - {ROOT_PART}: None
253 13:52:58.028988 - {ROOT}: None
254 13:52:58.029042 - {SERVER_IP}: 192.168.201.1
255 13:52:58.029095 - {TEE}: None
256 13:52:58.029149 Parsed boot commands:
257 13:52:58.029201 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:52:58.029379 Parsed boot commands: tftpboot 192.168.201.1 10607012/tftp-deploy-qulynwdf/kernel/bzImage 10607012/tftp-deploy-qulynwdf/kernel/cmdline 10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
259 13:52:58.029470 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:52:58.029553 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:52:58.029648 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:52:58.029737 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:52:58.029807 Not connected, no need to disconnect.
264 13:52:58.029882 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:52:58.029965 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:52:58.030034 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
267 13:52:58.033466 Setting prompt string to ['lava-test: # ']
268 13:52:58.033851 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:52:58.033967 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:52:58.034063 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:52:58.034156 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:52:58.034354 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
273 13:53:03.747452 >> Command sent successfully.
274 13:53:03.749923 Returned 0 in 5 seconds
275 13:53:03.850353 end: 2.2.2.1 pdu-reboot (duration 00:00:06) [common]
277 13:53:03.850849 end: 2.2.2 reset-device (duration 00:00:06) [common]
278 13:53:03.850990 start: 2.2.3 depthcharge-start (timeout 00:04:54) [common]
279 13:53:03.851113 Setting prompt string to 'Starting depthcharge on Voema...'
280 13:53:03.851216 Changing prompt to 'Starting depthcharge on Voema...'
281 13:53:03.851324 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 13:53:03.851702 [Enter `^Ec?' for help]
283 13:53:05.825664
284 13:53:05.826469
285 13:53:05.827338 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 13:53:05.827908 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 13:53:05.828393 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 13:53:05.828859 CPU: AES supported, TXT NOT supported, VT supported
289 13:53:05.829314 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 13:53:05.829760 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 13:53:05.830207 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 13:53:05.830323 VBOOT: Loading verstage.
293 13:53:05.830409 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 13:53:05.830493 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 13:53:05.830581 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 13:53:05.830669 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 13:53:05.830758 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 13:53:05.830849
299 13:53:05.830938
300 13:53:05.831027 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 13:53:05.831120 Probing TPM: . done!
302 13:53:05.831210 TPM ready after 0 ms
303 13:53:05.831300 Connected to device vid:did:rid of 1ae0:0028:00
304 13:53:05.831390 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
305 13:53:05.831477 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 13:53:05.831564 Initialized TPM device CR50 revision 0
307 13:53:05.831651 tlcl_send_startup: Startup return code is 0
308 13:53:05.831740 TPM: setup succeeded
309 13:53:05.831826 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 13:53:05.831918 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 13:53:05.832004 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 13:53:05.832104 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 13:53:05.832222 Chrome EC: UHEPI supported
314 13:53:05.832357 Phase 1
315 13:53:05.832507 FMAP: area GBB found @ 1805000 (458752 bytes)
316 13:53:05.832599 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 13:53:05.832688 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 13:53:05.832779 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 13:53:05.832868 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 13:53:05.832969 Recovery requested (1009000e)
321 13:53:05.833069 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 13:53:05.833153 tlcl_extend: response is 0
323 13:53:05.833266 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 13:53:05.833381 tlcl_extend: response is 0
325 13:53:05.833465 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 13:53:05.833550 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 13:53:05.833633 BS: verstage times (exec / console): total (unknown) / 142 ms
328 13:53:05.833718
329 13:53:05.833800
330 13:53:05.833884 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 13:53:05.833967 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 13:53:05.834049 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 13:53:05.834131 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 13:53:05.834213 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 13:53:05.834304 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 13:53:05.834390 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 13:53:05.837441 TCO_STS: 0000 0000
338 13:53:05.837544 GEN_PMCON: d0015038 00002200
339 13:53:05.837614 GBLRST_CAUSE: 00000000 00000000
340 13:53:05.837678 HPR_CAUSE0: 00000000
341 13:53:05.837742 prev_sleep_state 5
342 13:53:05.838740 Boot Count incremented to 20386
343 13:53:05.845447 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 13:53:05.852321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 13:53:05.858798 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 13:53:05.865665 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 13:53:05.870332 Chrome EC: UHEPI supported
348 13:53:05.877094 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 13:53:05.889687 Probing TPM: done!
350 13:53:05.896540 Connected to device vid:did:rid of 1ae0:0028:00
351 13:53:05.908671 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
352 13:53:05.914616 Initialized TPM device CR50 revision 0
353 13:53:05.924945 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 13:53:05.931284 MRC: Hash idx 0x100b comparison successful.
355 13:53:05.934800 MRC cache found, size faa8
356 13:53:05.934955 bootmode is set to: 2
357 13:53:05.938571 SPD index = 0
358 13:53:05.945089 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 13:53:05.948239 SPD: module type is LPDDR4X
360 13:53:05.951351 SPD: module part number is MT53E512M64D4NW-046
361 13:53:05.958517 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 13:53:05.964634 SPD: device width 16 bits, bus width 16 bits
363 13:53:05.968454 SPD: module size is 1024 MB (per channel)
364 13:53:06.401594 CBMEM:
365 13:53:06.405559 IMD: root @ 0x76fff000 254 entries.
366 13:53:06.408256 IMD: root @ 0x76ffec00 62 entries.
367 13:53:06.411528 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 13:53:06.418134 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 13:53:06.422017 External stage cache:
370 13:53:06.424630 IMD: root @ 0x7b3ff000 254 entries.
371 13:53:06.427740 IMD: root @ 0x7b3fec00 62 entries.
372 13:53:06.443572 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 13:53:06.450125 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 13:53:06.456682 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 13:53:06.470304 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 13:53:06.477044 cse_lite: Skip switching to RW in the recovery path
377 13:53:06.477162 8 DIMMs found
378 13:53:06.477258 SMM Memory Map
379 13:53:06.484312 SMRAM : 0x7b000000 0x800000
380 13:53:06.484431 Subregion 0: 0x7b000000 0x200000
381 13:53:06.488125 Subregion 1: 0x7b200000 0x200000
382 13:53:06.491678 Subregion 2: 0x7b400000 0x400000
383 13:53:06.495064 top_of_ram = 0x77000000
384 13:53:06.501651 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 13:53:06.505093 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 13:53:06.511696 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 13:53:06.514805 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 13:53:06.521395 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 13:53:06.528340 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 13:53:06.540087 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 13:53:06.543234 Processing 211 relocs. Offset value of 0x74c0b000
392 13:53:06.553370 BS: romstage times (exec / console): total (unknown) / 277 ms
393 13:53:06.559233
394 13:53:06.559383
395 13:53:06.569817 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 13:53:06.572361 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 13:53:06.582579 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 13:53:06.589042 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 13:53:06.595870 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 13:53:06.602598 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 13:53:06.649831 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 13:53:06.656458 Processing 5008 relocs. Offset value of 0x75d98000
403 13:53:06.659377 BS: postcar times (exec / console): total (unknown) / 59 ms
404 13:53:06.663293
405 13:53:06.663451
406 13:53:06.672793 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 13:53:06.672998 Normal boot
408 13:53:06.676406 FW_CONFIG value is 0x804c02
409 13:53:06.679737 PCI: 00:07.0 disabled by fw_config
410 13:53:06.683271 PCI: 00:07.1 disabled by fw_config
411 13:53:06.686379 PCI: 00:0d.2 disabled by fw_config
412 13:53:06.690212 PCI: 00:1c.7 disabled by fw_config
413 13:53:06.696747 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 13:53:06.703559 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 13:53:06.706150 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 13:53:06.710039 GENERIC: 0.0 disabled by fw_config
417 13:53:06.713307 GENERIC: 1.0 disabled by fw_config
418 13:53:06.719754 fw_config match found: DB_USB=USB3_ACTIVE
419 13:53:06.723498 fw_config match found: DB_USB=USB3_ACTIVE
420 13:53:06.726275 fw_config match found: DB_USB=USB3_ACTIVE
421 13:53:06.729545 fw_config match found: DB_USB=USB3_ACTIVE
422 13:53:06.736333 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 13:53:06.743221 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 13:53:06.749923 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 13:53:06.759254 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 13:53:06.762761 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 13:53:06.769963 microcode: Update skipped, already up-to-date
428 13:53:06.776011 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 13:53:06.803198 Detected 4 core, 8 thread CPU.
430 13:53:06.806796 Setting up SMI for CPU
431 13:53:06.810109 IED base = 0x7b400000
432 13:53:06.810204 IED size = 0x00400000
433 13:53:06.813318 Will perform SMM setup.
434 13:53:06.819868 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 13:53:06.826491 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 13:53:06.833247 Processing 16 relocs. Offset value of 0x00030000
437 13:53:06.836635 Attempting to start 7 APs
438 13:53:06.839613 Waiting for 10ms after sending INIT.
439 13:53:06.856003 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 13:53:06.858828 AP: slot 2 apic_id 3.
441 13:53:06.861747 AP: slot 6 apic_id 2.
442 13:53:06.861847 AP: slot 3 apic_id 5.
443 13:53:06.865121 AP: slot 4 apic_id 7.
444 13:53:06.868804 AP: slot 5 apic_id 6.
445 13:53:06.868904 AP: slot 7 apic_id 4.
446 13:53:06.868971 done.
447 13:53:06.874966 Waiting for 2nd SIPI to complete...done.
448 13:53:06.881747 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 13:53:06.888513 Processing 13 relocs. Offset value of 0x00038000
450 13:53:06.888648 Unable to locate Global NVS
451 13:53:06.898431 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 13:53:06.901922 Installing permanent SMM handler to 0x7b000000
453 13:53:06.911862 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 13:53:06.915090 Processing 794 relocs. Offset value of 0x7b010000
455 13:53:06.925438 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 13:53:06.928396 Processing 13 relocs. Offset value of 0x7b008000
457 13:53:06.934822 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 13:53:06.941748 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 13:53:06.944826 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 13:53:06.951769 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 13:53:06.958001 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 13:53:06.964688 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 13:53:06.971689 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 13:53:06.971859 Unable to locate Global NVS
465 13:53:06.981547 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 13:53:06.984463 Clearing SMI status registers
467 13:53:06.984657 SMI_STS: PM1
468 13:53:06.988073 PM1_STS: PWRBTN
469 13:53:06.994984 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 13:53:06.997850 In relocation handler: CPU 0
471 13:53:07.001364 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 13:53:07.007716 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 13:53:07.007928 Relocation complete.
474 13:53:07.017746 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 13:53:07.018003 In relocation handler: CPU 1
476 13:53:07.024555 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 13:53:07.024782 Relocation complete.
478 13:53:07.034761 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 13:53:07.034941 In relocation handler: CPU 2
480 13:53:07.041223 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 13:53:07.041372 Relocation complete.
482 13:53:07.048043 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 13:53:07.050807 In relocation handler: CPU 6
484 13:53:07.057417 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 13:53:07.060778 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 13:53:07.064234 Relocation complete.
487 13:53:07.070917 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
488 13:53:07.074120 In relocation handler: CPU 3
489 13:53:07.077647 New SMBASE=0x7afff400 IEDBASE=0x7b400000
490 13:53:07.081215 Relocation complete.
491 13:53:07.087688 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
492 13:53:07.090795 In relocation handler: CPU 7
493 13:53:07.094448 New SMBASE=0x7affe400 IEDBASE=0x7b400000
494 13:53:07.097621 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 13:53:07.100868 Relocation complete.
496 13:53:07.107380 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 13:53:07.110715 In relocation handler: CPU 4
498 13:53:07.114241 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 13:53:07.117974 Relocation complete.
500 13:53:07.123900 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 13:53:07.127573 In relocation handler: CPU 5
502 13:53:07.130609 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 13:53:07.137667 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 13:53:07.137815 Relocation complete.
505 13:53:07.141098 Initializing CPU #0
506 13:53:07.144292 CPU: vendor Intel device 806c1
507 13:53:07.148059 CPU: family 06, model 8c, stepping 01
508 13:53:07.151192 Clearing out pending MCEs
509 13:53:07.154364 Setting up local APIC...
510 13:53:07.158014 apic_id: 0x00 done.
511 13:53:07.158154 Turbo is available but hidden
512 13:53:07.161387 Turbo is available and visible
513 13:53:07.167877 microcode: Update skipped, already up-to-date
514 13:53:07.168022 CPU #0 initialized
515 13:53:07.171285 Initializing CPU #1
516 13:53:07.174719 Initializing CPU #7
517 13:53:07.174828 Initializing CPU #4
518 13:53:07.177637 Initializing CPU #5
519 13:53:07.181234 CPU: vendor Intel device 806c1
520 13:53:07.184450 CPU: family 06, model 8c, stepping 01
521 13:53:07.187730 CPU: vendor Intel device 806c1
522 13:53:07.190967 CPU: family 06, model 8c, stepping 01
523 13:53:07.194613 Clearing out pending MCEs
524 13:53:07.197872 Clearing out pending MCEs
525 13:53:07.197969 Setting up local APIC...
526 13:53:07.201130 CPU: vendor Intel device 806c1
527 13:53:07.204745 CPU: family 06, model 8c, stepping 01
528 13:53:07.207966 Initializing CPU #6
529 13:53:07.211040 Initializing CPU #2
530 13:53:07.214364 CPU: vendor Intel device 806c1
531 13:53:07.217702 CPU: family 06, model 8c, stepping 01
532 13:53:07.217832 apic_id: 0x07 done.
533 13:53:07.220774 Setting up local APIC...
534 13:53:07.224121 Initializing CPU #3
535 13:53:07.227780 CPU: vendor Intel device 806c1
536 13:53:07.230888 CPU: family 06, model 8c, stepping 01
537 13:53:07.234329 CPU: vendor Intel device 806c1
538 13:53:07.237410 CPU: family 06, model 8c, stepping 01
539 13:53:07.240916 Clearing out pending MCEs
540 13:53:07.243865 Clearing out pending MCEs
541 13:53:07.243990 Setting up local APIC...
542 13:53:07.250768 microcode: Update skipped, already up-to-date
543 13:53:07.254486 CPU: vendor Intel device 806c1
544 13:53:07.257372 CPU: family 06, model 8c, stepping 01
545 13:53:07.260945 Clearing out pending MCEs
546 13:53:07.261122 Clearing out pending MCEs
547 13:53:07.264269 Setting up local APIC...
548 13:53:07.267589 apic_id: 0x04 done.
549 13:53:07.267763 Setting up local APIC...
550 13:53:07.270977 apic_id: 0x06 done.
551 13:53:07.273829 CPU #4 initialized
552 13:53:07.277747 microcode: Update skipped, already up-to-date
553 13:53:07.280457 Clearing out pending MCEs
554 13:53:07.284091 microcode: Update skipped, already up-to-date
555 13:53:07.287317 apic_id: 0x05 done.
556 13:53:07.287427 CPU #7 initialized
557 13:53:07.294372 microcode: Update skipped, already up-to-date
558 13:53:07.294543 apic_id: 0x02 done.
559 13:53:07.297283 Setting up local APIC...
560 13:53:07.300742 CPU #5 initialized
561 13:53:07.304091 microcode: Update skipped, already up-to-date
562 13:53:07.307274 apic_id: 0x03 done.
563 13:53:07.307433 CPU #6 initialized
564 13:53:07.313924 microcode: Update skipped, already up-to-date
565 13:53:07.317367 Setting up local APIC...
566 13:53:07.317512 CPU #3 initialized
567 13:53:07.320662 CPU #2 initialized
568 13:53:07.320799 apic_id: 0x01 done.
569 13:53:07.327259 microcode: Update skipped, already up-to-date
570 13:53:07.327413 CPU #1 initialized
571 13:53:07.334269 bsp_do_flight_plan done after 455 msecs.
572 13:53:07.337393 CPU: frequency set to 4000 MHz
573 13:53:07.337551 Enabling SMIs.
574 13:53:07.344156 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 13:53:07.360374 SATAXPCIE1 indicates PCIe NVMe is present
576 13:53:07.363925 Probing TPM: done!
577 13:53:07.367171 Connected to device vid:did:rid of 1ae0:0028:00
578 13:53:07.377568 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
579 13:53:07.381278 Initialized TPM device CR50 revision 0
580 13:53:07.384423 Enabling S0i3.4
581 13:53:07.390989 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 13:53:07.394758 Found a VBT of 8704 bytes after decompression
583 13:53:07.401107 cse_lite: CSE RO boot. HybridStorageMode disabled
584 13:53:07.407452 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 13:53:07.483580 FSPS returned 0
586 13:53:07.486933 Executing Phase 1 of FspMultiPhaseSiInit
587 13:53:07.497198 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 13:53:07.500579 port C0 DISC req: usage 1 usb3 1 usb2 5
589 13:53:07.503804 Raw Buffer output 0 00000511
590 13:53:07.507110 Raw Buffer output 1 00000000
591 13:53:07.511229 pmc_send_ipc_cmd succeeded
592 13:53:07.517539 port C1 DISC req: usage 1 usb3 2 usb2 3
593 13:53:07.517687 Raw Buffer output 0 00000321
594 13:53:07.520708 Raw Buffer output 1 00000000
595 13:53:07.524556 pmc_send_ipc_cmd succeeded
596 13:53:07.529871 Detected 4 core, 8 thread CPU.
597 13:53:07.533039 Detected 4 core, 8 thread CPU.
598 13:53:07.767225 Display FSP Version Info HOB
599 13:53:07.770355 Reference Code - CPU = a.0.4c.31
600 13:53:07.773938 uCode Version = 0.0.0.86
601 13:53:07.777362 TXT ACM version = ff.ff.ff.ffff
602 13:53:07.780308 Reference Code - ME = a.0.4c.31
603 13:53:07.783466 MEBx version = 0.0.0.0
604 13:53:07.786807 ME Firmware Version = Consumer SKU
605 13:53:07.790463 Reference Code - PCH = a.0.4c.31
606 13:53:07.793652 PCH-CRID Status = Disabled
607 13:53:07.796817 PCH-CRID Original Value = ff.ff.ff.ffff
608 13:53:07.800347 PCH-CRID New Value = ff.ff.ff.ffff
609 13:53:07.803718 OPROM - RST - RAID = ff.ff.ff.ffff
610 13:53:07.807042 PCH Hsio Version = 4.0.0.0
611 13:53:07.810242 Reference Code - SA - System Agent = a.0.4c.31
612 13:53:07.813732 Reference Code - MRC = 2.0.0.1
613 13:53:07.817057 SA - PCIe Version = a.0.4c.31
614 13:53:07.820460 SA-CRID Status = Disabled
615 13:53:07.823401 SA-CRID Original Value = 0.0.0.1
616 13:53:07.827073 SA-CRID New Value = 0.0.0.1
617 13:53:07.830702 OPROM - VBIOS = ff.ff.ff.ffff
618 13:53:07.833606 IO Manageability Engine FW Version = 11.1.4.0
619 13:53:07.837280 PHY Build Version = 0.0.0.e0
620 13:53:07.840721 Thunderbolt(TM) FW Version = 0.0.0.0
621 13:53:07.846969 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 13:53:07.850283 ITSS IRQ Polarities Before:
623 13:53:07.850398 IPC0: 0xffffffff
624 13:53:07.853621 IPC1: 0xffffffff
625 13:53:07.853718 IPC2: 0xffffffff
626 13:53:07.856937 IPC3: 0xffffffff
627 13:53:07.860311 ITSS IRQ Polarities After:
628 13:53:07.860412 IPC0: 0xffffffff
629 13:53:07.863729 IPC1: 0xffffffff
630 13:53:07.863872 IPC2: 0xffffffff
631 13:53:07.866814 IPC3: 0xffffffff
632 13:53:07.870284 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 13:53:07.883620 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 13:53:07.893391 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 13:53:07.907191 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 13:53:07.913220 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 13:53:07.913383 Enumerating buses...
638 13:53:07.920267 Show all devs... Before device enumeration.
639 13:53:07.920416 Root Device: enabled 1
640 13:53:07.923522 DOMAIN: 0000: enabled 1
641 13:53:07.927198 CPU_CLUSTER: 0: enabled 1
642 13:53:07.930060 PCI: 00:00.0: enabled 1
643 13:53:07.930183 PCI: 00:02.0: enabled 1
644 13:53:07.933341 PCI: 00:04.0: enabled 1
645 13:53:07.937173 PCI: 00:05.0: enabled 1
646 13:53:07.940115 PCI: 00:06.0: enabled 0
647 13:53:07.940225 PCI: 00:07.0: enabled 0
648 13:53:07.943451 PCI: 00:07.1: enabled 0
649 13:53:07.946847 PCI: 00:07.2: enabled 0
650 13:53:07.950422 PCI: 00:07.3: enabled 0
651 13:53:07.950529 PCI: 00:08.0: enabled 1
652 13:53:07.953228 PCI: 00:09.0: enabled 0
653 13:53:07.956596 PCI: 00:0a.0: enabled 0
654 13:53:07.956705 PCI: 00:0d.0: enabled 1
655 13:53:07.960124 PCI: 00:0d.1: enabled 0
656 13:53:07.963499 PCI: 00:0d.2: enabled 0
657 13:53:07.966529 PCI: 00:0d.3: enabled 0
658 13:53:07.966617 PCI: 00:0e.0: enabled 0
659 13:53:07.970199 PCI: 00:10.2: enabled 1
660 13:53:07.973453 PCI: 00:10.6: enabled 0
661 13:53:07.976964 PCI: 00:10.7: enabled 0
662 13:53:07.977093 PCI: 00:12.0: enabled 0
663 13:53:07.980191 PCI: 00:12.6: enabled 0
664 13:53:07.983443 PCI: 00:13.0: enabled 0
665 13:53:07.986667 PCI: 00:14.0: enabled 1
666 13:53:07.986747 PCI: 00:14.1: enabled 0
667 13:53:07.990299 PCI: 00:14.2: enabled 1
668 13:53:07.993578 PCI: 00:14.3: enabled 1
669 13:53:07.993675 PCI: 00:15.0: enabled 1
670 13:53:07.996661 PCI: 00:15.1: enabled 1
671 13:53:07.999760 PCI: 00:15.2: enabled 1
672 13:53:08.003213 PCI: 00:15.3: enabled 1
673 13:53:08.003323 PCI: 00:16.0: enabled 1
674 13:53:08.006405 PCI: 00:16.1: enabled 0
675 13:53:08.009746 PCI: 00:16.2: enabled 0
676 13:53:08.013623 PCI: 00:16.3: enabled 0
677 13:53:08.013716 PCI: 00:16.4: enabled 0
678 13:53:08.017110 PCI: 00:16.5: enabled 0
679 13:53:08.020163 PCI: 00:17.0: enabled 1
680 13:53:08.023013 PCI: 00:19.0: enabled 0
681 13:53:08.023144 PCI: 00:19.1: enabled 1
682 13:53:08.026493 PCI: 00:19.2: enabled 0
683 13:53:08.029733 PCI: 00:1c.0: enabled 1
684 13:53:08.033174 PCI: 00:1c.1: enabled 0
685 13:53:08.033266 PCI: 00:1c.2: enabled 0
686 13:53:08.036559 PCI: 00:1c.3: enabled 0
687 13:53:08.040047 PCI: 00:1c.4: enabled 0
688 13:53:08.040145 PCI: 00:1c.5: enabled 0
689 13:53:08.043030 PCI: 00:1c.6: enabled 1
690 13:53:08.046569 PCI: 00:1c.7: enabled 0
691 13:53:08.050128 PCI: 00:1d.0: enabled 1
692 13:53:08.050223 PCI: 00:1d.1: enabled 0
693 13:53:08.053353 PCI: 00:1d.2: enabled 1
694 13:53:08.056924 PCI: 00:1d.3: enabled 0
695 13:53:08.060033 PCI: 00:1e.0: enabled 1
696 13:53:08.060129 PCI: 00:1e.1: enabled 0
697 13:53:08.063261 PCI: 00:1e.2: enabled 1
698 13:53:08.066388 PCI: 00:1e.3: enabled 1
699 13:53:08.069975 PCI: 00:1f.0: enabled 1
700 13:53:08.070065 PCI: 00:1f.1: enabled 0
701 13:53:08.072919 PCI: 00:1f.2: enabled 1
702 13:53:08.076197 PCI: 00:1f.3: enabled 1
703 13:53:08.076287 PCI: 00:1f.4: enabled 0
704 13:53:08.079574 PCI: 00:1f.5: enabled 1
705 13:53:08.083415 PCI: 00:1f.6: enabled 0
706 13:53:08.086420 PCI: 00:1f.7: enabled 0
707 13:53:08.086508 APIC: 00: enabled 1
708 13:53:08.089707 GENERIC: 0.0: enabled 1
709 13:53:08.093328 GENERIC: 0.0: enabled 1
710 13:53:08.093412 GENERIC: 1.0: enabled 1
711 13:53:08.096622 GENERIC: 0.0: enabled 1
712 13:53:08.099777 GENERIC: 1.0: enabled 1
713 13:53:08.102926 USB0 port 0: enabled 1
714 13:53:08.103009 GENERIC: 0.0: enabled 1
715 13:53:08.106173 USB0 port 0: enabled 1
716 13:53:08.109616 GENERIC: 0.0: enabled 1
717 13:53:08.112905 I2C: 00:1a: enabled 1
718 13:53:08.112988 I2C: 00:31: enabled 1
719 13:53:08.116536 I2C: 00:32: enabled 1
720 13:53:08.119760 I2C: 00:10: enabled 1
721 13:53:08.119908 I2C: 00:15: enabled 1
722 13:53:08.122945 GENERIC: 0.0: enabled 0
723 13:53:08.126482 GENERIC: 1.0: enabled 0
724 13:53:08.126567 GENERIC: 0.0: enabled 1
725 13:53:08.129713 SPI: 00: enabled 1
726 13:53:08.132935 SPI: 00: enabled 1
727 13:53:08.133042 PNP: 0c09.0: enabled 1
728 13:53:08.136051 GENERIC: 0.0: enabled 1
729 13:53:08.139551 USB3 port 0: enabled 1
730 13:53:08.139664 USB3 port 1: enabled 1
731 13:53:08.143046 USB3 port 2: enabled 0
732 13:53:08.146393 USB3 port 3: enabled 0
733 13:53:08.149977 USB2 port 0: enabled 0
734 13:53:08.150074 USB2 port 1: enabled 1
735 13:53:08.152848 USB2 port 2: enabled 1
736 13:53:08.156364 USB2 port 3: enabled 0
737 13:53:08.156451 USB2 port 4: enabled 1
738 13:53:08.159948 USB2 port 5: enabled 0
739 13:53:08.163020 USB2 port 6: enabled 0
740 13:53:08.166191 USB2 port 7: enabled 0
741 13:53:08.166299 USB2 port 8: enabled 0
742 13:53:08.169352 USB2 port 9: enabled 0
743 13:53:08.172787 USB3 port 0: enabled 0
744 13:53:08.172875 USB3 port 1: enabled 1
745 13:53:08.176097 USB3 port 2: enabled 0
746 13:53:08.179560 USB3 port 3: enabled 0
747 13:53:08.179654 GENERIC: 0.0: enabled 1
748 13:53:08.182883 GENERIC: 1.0: enabled 1
749 13:53:08.185900 APIC: 01: enabled 1
750 13:53:08.185991 APIC: 03: enabled 1
751 13:53:08.189535 APIC: 05: enabled 1
752 13:53:08.192781 APIC: 07: enabled 1
753 13:53:08.192870 APIC: 06: enabled 1
754 13:53:08.196580 APIC: 02: enabled 1
755 13:53:08.199230 APIC: 04: enabled 1
756 13:53:08.199319 Compare with tree...
757 13:53:08.202611 Root Device: enabled 1
758 13:53:08.205793 DOMAIN: 0000: enabled 1
759 13:53:08.205887 PCI: 00:00.0: enabled 1
760 13:53:08.209555 PCI: 00:02.0: enabled 1
761 13:53:08.212577 PCI: 00:04.0: enabled 1
762 13:53:08.216238 GENERIC: 0.0: enabled 1
763 13:53:08.219370 PCI: 00:05.0: enabled 1
764 13:53:08.219459 PCI: 00:06.0: enabled 0
765 13:53:08.222849 PCI: 00:07.0: enabled 0
766 13:53:08.225960 GENERIC: 0.0: enabled 1
767 13:53:08.229256 PCI: 00:07.1: enabled 0
768 13:53:08.232534 GENERIC: 1.0: enabled 1
769 13:53:08.232629 PCI: 00:07.2: enabled 0
770 13:53:08.235736 GENERIC: 0.0: enabled 1
771 13:53:08.239270 PCI: 00:07.3: enabled 0
772 13:53:08.242383 GENERIC: 1.0: enabled 1
773 13:53:08.246097 PCI: 00:08.0: enabled 1
774 13:53:08.249261 PCI: 00:09.0: enabled 0
775 13:53:08.249350 PCI: 00:0a.0: enabled 0
776 13:53:08.252809 PCI: 00:0d.0: enabled 1
777 13:53:08.255792 USB0 port 0: enabled 1
778 13:53:08.259342 USB3 port 0: enabled 1
779 13:53:08.262796 USB3 port 1: enabled 1
780 13:53:08.262885 USB3 port 2: enabled 0
781 13:53:08.265743 USB3 port 3: enabled 0
782 13:53:08.269211 PCI: 00:0d.1: enabled 0
783 13:53:08.272268 PCI: 00:0d.2: enabled 0
784 13:53:08.275713 GENERIC: 0.0: enabled 1
785 13:53:08.275803 PCI: 00:0d.3: enabled 0
786 13:53:08.279694 PCI: 00:0e.0: enabled 0
787 13:53:08.282768 PCI: 00:10.2: enabled 1
788 13:53:08.285717 PCI: 00:10.6: enabled 0
789 13:53:08.289168 PCI: 00:10.7: enabled 0
790 13:53:08.289266 PCI: 00:12.0: enabled 0
791 13:53:08.292253 PCI: 00:12.6: enabled 0
792 13:53:08.295608 PCI: 00:13.0: enabled 0
793 13:53:08.299134 PCI: 00:14.0: enabled 1
794 13:53:08.302259 USB0 port 0: enabled 1
795 13:53:08.302348 USB2 port 0: enabled 0
796 13:53:08.306056 USB2 port 1: enabled 1
797 13:53:08.309248 USB2 port 2: enabled 1
798 13:53:08.312495 USB2 port 3: enabled 0
799 13:53:08.315590 USB2 port 4: enabled 1
800 13:53:08.315704 USB2 port 5: enabled 0
801 13:53:08.319296 USB2 port 6: enabled 0
802 13:53:08.322488 USB2 port 7: enabled 0
803 13:53:08.325816 USB2 port 8: enabled 0
804 13:53:08.329197 USB2 port 9: enabled 0
805 13:53:08.332510 USB3 port 0: enabled 0
806 13:53:08.332598 USB3 port 1: enabled 1
807 13:53:08.335992 USB3 port 2: enabled 0
808 13:53:08.338858 USB3 port 3: enabled 0
809 13:53:08.342669 PCI: 00:14.1: enabled 0
810 13:53:08.345687 PCI: 00:14.2: enabled 1
811 13:53:08.345776 PCI: 00:14.3: enabled 1
812 13:53:08.348880 GENERIC: 0.0: enabled 1
813 13:53:08.352377 PCI: 00:15.0: enabled 1
814 13:53:08.355469 I2C: 00:1a: enabled 1
815 13:53:08.359159 I2C: 00:31: enabled 1
816 13:53:08.359261 I2C: 00:32: enabled 1
817 13:53:08.362216 PCI: 00:15.1: enabled 1
818 13:53:08.365610 I2C: 00:10: enabled 1
819 13:53:08.368832 PCI: 00:15.2: enabled 1
820 13:53:08.368920 PCI: 00:15.3: enabled 1
821 13:53:08.372180 PCI: 00:16.0: enabled 1
822 13:53:08.375668 PCI: 00:16.1: enabled 0
823 13:53:08.379060 PCI: 00:16.2: enabled 0
824 13:53:08.382161 PCI: 00:16.3: enabled 0
825 13:53:08.382248 PCI: 00:16.4: enabled 0
826 13:53:08.385690 PCI: 00:16.5: enabled 0
827 13:53:08.389342 PCI: 00:17.0: enabled 1
828 13:53:08.392403 PCI: 00:19.0: enabled 0
829 13:53:08.395541 PCI: 00:19.1: enabled 1
830 13:53:08.395683 I2C: 00:15: enabled 1
831 13:53:08.398674 PCI: 00:19.2: enabled 0
832 13:53:08.402522 PCI: 00:1d.0: enabled 1
833 13:53:08.406006 GENERIC: 0.0: enabled 1
834 13:53:08.406100 PCI: 00:1e.0: enabled 1
835 13:53:08.409231 PCI: 00:1e.1: enabled 0
836 13:53:08.412849 PCI: 00:1e.2: enabled 1
837 13:53:08.416178 SPI: 00: enabled 1
838 13:53:08.416273 PCI: 00:1e.3: enabled 1
839 13:53:08.419399 SPI: 00: enabled 1
840 13:53:08.423153 PCI: 00:1f.0: enabled 1
841 13:53:08.474008 PNP: 0c09.0: enabled 1
842 13:53:08.474202 PCI: 00:1f.1: enabled 0
843 13:53:08.474300 PCI: 00:1f.2: enabled 1
844 13:53:08.474382 GENERIC: 0.0: enabled 1
845 13:53:08.474462 GENERIC: 0.0: enabled 1
846 13:53:08.474728 GENERIC: 1.0: enabled 1
847 13:53:08.474799 PCI: 00:1f.3: enabled 1
848 13:53:08.474877 PCI: 00:1f.4: enabled 0
849 13:53:08.474954 PCI: 00:1f.5: enabled 1
850 13:53:08.475049 PCI: 00:1f.6: enabled 0
851 13:53:08.475145 PCI: 00:1f.7: enabled 0
852 13:53:08.475240 CPU_CLUSTER: 0: enabled 1
853 13:53:08.475384 APIC: 00: enabled 1
854 13:53:08.475493 APIC: 01: enabled 1
855 13:53:08.475602 APIC: 03: enabled 1
856 13:53:08.475715 APIC: 05: enabled 1
857 13:53:08.475808 APIC: 07: enabled 1
858 13:53:08.476299 APIC: 06: enabled 1
859 13:53:08.476397 APIC: 02: enabled 1
860 13:53:08.476492 APIC: 04: enabled 1
861 13:53:08.485132 Root Device scanning...
862 13:53:08.485240 scan_static_bus for Root Device
863 13:53:08.485330 DOMAIN: 0000 enabled
864 13:53:08.488420 CPU_CLUSTER: 0 enabled
865 13:53:08.488508 DOMAIN: 0000 scanning...
866 13:53:08.491659 PCI: pci_scan_bus for bus 00
867 13:53:08.491769 PCI: 00:00.0 [8086/0000] ops
868 13:53:08.495141 PCI: 00:00.0 [8086/9a12] enabled
869 13:53:08.498531 PCI: 00:02.0 [8086/0000] bus ops
870 13:53:08.501882 PCI: 00:02.0 [8086/9a40] enabled
871 13:53:08.504931 PCI: 00:04.0 [8086/0000] bus ops
872 13:53:08.508707 PCI: 00:04.0 [8086/9a03] enabled
873 13:53:08.511697 PCI: 00:05.0 [8086/9a19] enabled
874 13:53:08.515178 PCI: 00:07.0 [0000/0000] hidden
875 13:53:08.518483 PCI: 00:08.0 [8086/9a11] enabled
876 13:53:08.521862 PCI: 00:0a.0 [8086/9a0d] disabled
877 13:53:08.525472 PCI: 00:0d.0 [8086/0000] bus ops
878 13:53:08.528824 PCI: 00:0d.0 [8086/9a13] enabled
879 13:53:08.531956 PCI: 00:14.0 [8086/0000] bus ops
880 13:53:08.534963 PCI: 00:14.0 [8086/a0ed] enabled
881 13:53:08.538670 PCI: 00:14.2 [8086/a0ef] enabled
882 13:53:08.541548 PCI: 00:14.3 [8086/0000] bus ops
883 13:53:08.544814 PCI: 00:14.3 [8086/a0f0] enabled
884 13:53:08.548354 PCI: 00:15.0 [8086/0000] bus ops
885 13:53:08.551736 PCI: 00:15.0 [8086/a0e8] enabled
886 13:53:08.555089 PCI: 00:15.1 [8086/0000] bus ops
887 13:53:08.558512 PCI: 00:15.1 [8086/a0e9] enabled
888 13:53:08.561912 PCI: 00:15.2 [8086/0000] bus ops
889 13:53:08.565220 PCI: 00:15.2 [8086/a0ea] enabled
890 13:53:08.568053 PCI: 00:15.3 [8086/0000] bus ops
891 13:53:08.571678 PCI: 00:15.3 [8086/a0eb] enabled
892 13:53:08.575147 PCI: 00:16.0 [8086/0000] ops
893 13:53:08.578213 PCI: 00:16.0 [8086/a0e0] enabled
894 13:53:08.584987 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 13:53:08.588316 PCI: 00:19.0 [8086/0000] bus ops
896 13:53:08.591711 PCI: 00:19.0 [8086/a0c5] disabled
897 13:53:08.595047 PCI: 00:19.1 [8086/0000] bus ops
898 13:53:08.598430 PCI: 00:19.1 [8086/a0c6] enabled
899 13:53:08.601823 PCI: 00:1d.0 [8086/0000] bus ops
900 13:53:08.605039 PCI: 00:1d.0 [8086/a0b0] enabled
901 13:53:08.608207 PCI: 00:1e.0 [8086/0000] ops
902 13:53:08.611465 PCI: 00:1e.0 [8086/a0a8] enabled
903 13:53:08.614916 PCI: 00:1e.2 [8086/0000] bus ops
904 13:53:08.618408 PCI: 00:1e.2 [8086/a0aa] enabled
905 13:53:08.621610 PCI: 00:1e.3 [8086/0000] bus ops
906 13:53:08.624859 PCI: 00:1e.3 [8086/a0ab] enabled
907 13:53:08.628213 PCI: 00:1f.0 [8086/0000] bus ops
908 13:53:08.631664 PCI: 00:1f.0 [8086/a087] enabled
909 13:53:08.631752 RTC Init
910 13:53:08.634867 Set power on after power failure.
911 13:53:08.638407 Disabling Deep S3
912 13:53:08.641808 Disabling Deep S3
913 13:53:08.641896 Disabling Deep S4
914 13:53:08.644702 Disabling Deep S4
915 13:53:08.644802 Disabling Deep S5
916 13:53:08.648083 Disabling Deep S5
917 13:53:08.651474 PCI: 00:1f.2 [0000/0000] hidden
918 13:53:08.655175 PCI: 00:1f.3 [8086/0000] bus ops
919 13:53:08.658378 PCI: 00:1f.3 [8086/a0c8] enabled
920 13:53:08.661784 PCI: 00:1f.5 [8086/0000] bus ops
921 13:53:08.664693 PCI: 00:1f.5 [8086/a0a4] enabled
922 13:53:08.668241 PCI: Leftover static devices:
923 13:53:08.668322 PCI: 00:10.2
924 13:53:08.671207 PCI: 00:10.6
925 13:53:08.671284 PCI: 00:10.7
926 13:53:08.671349 PCI: 00:06.0
927 13:53:08.675123 PCI: 00:07.1
928 13:53:08.675222 PCI: 00:07.2
929 13:53:08.678123 PCI: 00:07.3
930 13:53:08.678226 PCI: 00:09.0
931 13:53:08.678346 PCI: 00:0d.1
932 13:53:08.682100 PCI: 00:0d.2
933 13:53:08.682186 PCI: 00:0d.3
934 13:53:08.685100 PCI: 00:0e.0
935 13:53:08.685211 PCI: 00:12.0
936 13:53:08.688253 PCI: 00:12.6
937 13:53:08.688339 PCI: 00:13.0
938 13:53:08.688437 PCI: 00:14.1
939 13:53:08.691854 PCI: 00:16.1
940 13:53:08.691951 PCI: 00:16.2
941 13:53:08.694821 PCI: 00:16.3
942 13:53:08.694905 PCI: 00:16.4
943 13:53:08.694971 PCI: 00:16.5
944 13:53:08.698248 PCI: 00:17.0
945 13:53:08.698355 PCI: 00:19.2
946 13:53:08.701282 PCI: 00:1e.1
947 13:53:08.701366 PCI: 00:1f.1
948 13:53:08.701431 PCI: 00:1f.4
949 13:53:08.704945 PCI: 00:1f.6
950 13:53:08.705036 PCI: 00:1f.7
951 13:53:08.707849 PCI: Check your devicetree.cb.
952 13:53:08.711306 PCI: 00:02.0 scanning...
953 13:53:08.714731 scan_generic_bus for PCI: 00:02.0
954 13:53:08.717931 scan_generic_bus for PCI: 00:02.0 done
955 13:53:08.724721 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 13:53:08.724821 PCI: 00:04.0 scanning...
957 13:53:08.731553 scan_generic_bus for PCI: 00:04.0
958 13:53:08.731648 GENERIC: 0.0 enabled
959 13:53:08.738081 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 13:53:08.741416 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 13:53:08.744758 PCI: 00:0d.0 scanning...
962 13:53:08.748416 scan_static_bus for PCI: 00:0d.0
963 13:53:08.751476 USB0 port 0 enabled
964 13:53:08.754778 USB0 port 0 scanning...
965 13:53:08.757939 scan_static_bus for USB0 port 0
966 13:53:08.758028 USB3 port 0 enabled
967 13:53:08.761528 USB3 port 1 enabled
968 13:53:08.764408 USB3 port 2 disabled
969 13:53:08.764522 USB3 port 3 disabled
970 13:53:08.767829 USB3 port 0 scanning...
971 13:53:08.771392 scan_static_bus for USB3 port 0
972 13:53:08.774420 scan_static_bus for USB3 port 0 done
973 13:53:08.778253 scan_bus: bus USB3 port 0 finished in 6 msecs
974 13:53:08.781492 USB3 port 1 scanning...
975 13:53:08.784355 scan_static_bus for USB3 port 1
976 13:53:08.787675 scan_static_bus for USB3 port 1 done
977 13:53:08.794174 scan_bus: bus USB3 port 1 finished in 6 msecs
978 13:53:08.797637 scan_static_bus for USB0 port 0 done
979 13:53:08.801204 scan_bus: bus USB0 port 0 finished in 43 msecs
980 13:53:08.804198 scan_static_bus for PCI: 00:0d.0 done
981 13:53:08.811168 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 13:53:08.814510 PCI: 00:14.0 scanning...
983 13:53:08.817498 scan_static_bus for PCI: 00:14.0
984 13:53:08.817608 USB0 port 0 enabled
985 13:53:08.820832 USB0 port 0 scanning...
986 13:53:08.824325 scan_static_bus for USB0 port 0
987 13:53:08.827529 USB2 port 0 disabled
988 13:53:08.827622 USB2 port 1 enabled
989 13:53:08.831149 USB2 port 2 enabled
990 13:53:08.834455 USB2 port 3 disabled
991 13:53:08.834542 USB2 port 4 enabled
992 13:53:08.838234 USB2 port 5 disabled
993 13:53:08.841149 USB2 port 6 disabled
994 13:53:08.841240 USB2 port 7 disabled
995 13:53:08.844356 USB2 port 8 disabled
996 13:53:08.847445 USB2 port 9 disabled
997 13:53:08.847561 USB3 port 0 disabled
998 13:53:08.850862 USB3 port 1 enabled
999 13:53:08.850948 USB3 port 2 disabled
1000 13:53:08.854134 USB3 port 3 disabled
1001 13:53:08.857263 USB2 port 1 scanning...
1002 13:53:08.860780 scan_static_bus for USB2 port 1
1003 13:53:08.863865 scan_static_bus for USB2 port 1 done
1004 13:53:08.867680 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 13:53:08.870738 USB2 port 2 scanning...
1006 13:53:08.874697 scan_static_bus for USB2 port 2
1007 13:53:08.877728 scan_static_bus for USB2 port 2 done
1008 13:53:08.884244 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 13:53:08.884345 USB2 port 4 scanning...
1010 13:53:08.887354 scan_static_bus for USB2 port 4
1011 13:53:08.893785 scan_static_bus for USB2 port 4 done
1012 13:53:08.897556 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 13:53:08.900607 USB3 port 1 scanning...
1014 13:53:08.903692 scan_static_bus for USB3 port 1
1015 13:53:08.907366 scan_static_bus for USB3 port 1 done
1016 13:53:08.910564 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 13:53:08.913797 scan_static_bus for USB0 port 0 done
1018 13:53:08.920719 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 13:53:08.923712 scan_static_bus for PCI: 00:14.0 done
1020 13:53:08.927182 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 13:53:08.930414 PCI: 00:14.3 scanning...
1022 13:53:08.933600 scan_static_bus for PCI: 00:14.3
1023 13:53:08.937235 GENERIC: 0.0 enabled
1024 13:53:08.940395 scan_static_bus for PCI: 00:14.3 done
1025 13:53:08.943627 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 13:53:08.947421 PCI: 00:15.0 scanning...
1027 13:53:08.950669 scan_static_bus for PCI: 00:15.0
1028 13:53:08.953786 I2C: 00:1a enabled
1029 13:53:08.953872 I2C: 00:31 enabled
1030 13:53:08.957455 I2C: 00:32 enabled
1031 13:53:08.960289 scan_static_bus for PCI: 00:15.0 done
1032 13:53:08.967250 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 13:53:08.967363 PCI: 00:15.1 scanning...
1034 13:53:08.970674 scan_static_bus for PCI: 00:15.1
1035 13:53:08.973748 I2C: 00:10 enabled
1036 13:53:08.976812 scan_static_bus for PCI: 00:15.1 done
1037 13:53:08.983712 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 13:53:08.983836 PCI: 00:15.2 scanning...
1039 13:53:08.987453 scan_static_bus for PCI: 00:15.2
1040 13:53:08.991222 scan_static_bus for PCI: 00:15.2 done
1041 13:53:08.998310 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 13:53:08.998470 PCI: 00:15.3 scanning...
1043 13:53:09.001354 scan_static_bus for PCI: 00:15.3
1044 13:53:09.008149 scan_static_bus for PCI: 00:15.3 done
1045 13:53:09.011673 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 13:53:09.014359 PCI: 00:19.1 scanning...
1047 13:53:09.018314 scan_static_bus for PCI: 00:19.1
1048 13:53:09.018429 I2C: 00:15 enabled
1049 13:53:09.024718 scan_static_bus for PCI: 00:19.1 done
1050 13:53:09.028457 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 13:53:09.031063 PCI: 00:1d.0 scanning...
1052 13:53:09.034839 do_pci_scan_bridge for PCI: 00:1d.0
1053 13:53:09.037935 PCI: pci_scan_bus for bus 01
1054 13:53:09.041028 PCI: 01:00.0 [1c5c/174a] enabled
1055 13:53:09.044770 GENERIC: 0.0 enabled
1056 13:53:09.047779 Enabling Common Clock Configuration
1057 13:53:09.051029 L1 Sub-State supported from root port 29
1058 13:53:09.054254 L1 Sub-State Support = 0xf
1059 13:53:09.057559 CommonModeRestoreTime = 0x28
1060 13:53:09.060828 Power On Value = 0x16, Power On Scale = 0x0
1061 13:53:09.060952 ASPM: Enabled L1
1062 13:53:09.067514 PCIe: Max_Payload_Size adjusted to 128
1063 13:53:09.071138 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 13:53:09.074718 PCI: 00:1e.2 scanning...
1065 13:53:09.077569 scan_generic_bus for PCI: 00:1e.2
1066 13:53:09.077657 SPI: 00 enabled
1067 13:53:09.084143 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 13:53:09.091203 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 13:53:09.094628 PCI: 00:1e.3 scanning...
1070 13:53:09.097716 scan_generic_bus for PCI: 00:1e.3
1071 13:53:09.097829 SPI: 00 enabled
1072 13:53:09.104214 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 13:53:09.107678 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 13:53:09.110761 PCI: 00:1f.0 scanning...
1075 13:53:09.114240 scan_static_bus for PCI: 00:1f.0
1076 13:53:09.117940 PNP: 0c09.0 enabled
1077 13:53:09.120995 PNP: 0c09.0 scanning...
1078 13:53:09.124197 scan_static_bus for PNP: 0c09.0
1079 13:53:09.127568 scan_static_bus for PNP: 0c09.0 done
1080 13:53:09.130982 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 13:53:09.134335 scan_static_bus for PCI: 00:1f.0 done
1082 13:53:09.140505 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 13:53:09.140610 PCI: 00:1f.2 scanning...
1084 13:53:09.144250 scan_static_bus for PCI: 00:1f.2
1085 13:53:09.147673 GENERIC: 0.0 enabled
1086 13:53:09.151250 GENERIC: 0.0 scanning...
1087 13:53:09.154205 scan_static_bus for GENERIC: 0.0
1088 13:53:09.157567 GENERIC: 0.0 enabled
1089 13:53:09.157667 GENERIC: 1.0 enabled
1090 13:53:09.160812 scan_static_bus for GENERIC: 0.0 done
1091 13:53:09.167697 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 13:53:09.171044 scan_static_bus for PCI: 00:1f.2 done
1093 13:53:09.174838 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 13:53:09.177681 PCI: 00:1f.3 scanning...
1095 13:53:09.181121 scan_static_bus for PCI: 00:1f.3
1096 13:53:09.184051 scan_static_bus for PCI: 00:1f.3 done
1097 13:53:09.190649 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 13:53:09.193991 PCI: 00:1f.5 scanning...
1099 13:53:09.197421 scan_generic_bus for PCI: 00:1f.5
1100 13:53:09.200863 scan_generic_bus for PCI: 00:1f.5 done
1101 13:53:09.204003 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 13:53:09.210518 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 13:53:09.214291 scan_static_bus for Root Device done
1104 13:53:09.217337 scan_bus: bus Root Device finished in 736 msecs
1105 13:53:09.220718 done
1106 13:53:09.223867 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 13:53:09.227463 Chrome EC: UHEPI supported
1108 13:53:09.234264 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 13:53:09.240749 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 13:53:09.243837 SPI flash protection: WPSW=0 SRP0=0
1111 13:53:09.250485 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 13:53:09.254075 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 13:53:09.257159 found VGA at PCI: 00:02.0
1114 13:53:09.260350 Setting up VGA for PCI: 00:02.0
1115 13:53:09.267249 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 13:53:09.270322 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 13:53:09.273739 Allocating resources...
1118 13:53:09.277276 Reading resources...
1119 13:53:09.280721 Root Device read_resources bus 0 link: 0
1120 13:53:09.284374 DOMAIN: 0000 read_resources bus 0 link: 0
1121 13:53:09.290270 PCI: 00:04.0 read_resources bus 1 link: 0
1122 13:53:09.293968 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 13:53:09.300642 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 13:53:09.304067 USB0 port 0 read_resources bus 0 link: 0
1125 13:53:09.310140 USB0 port 0 read_resources bus 0 link: 0 done
1126 13:53:09.313531 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 13:53:09.317327 PCI: 00:14.0 read_resources bus 0 link: 0
1128 13:53:09.323778 USB0 port 0 read_resources bus 0 link: 0
1129 13:53:09.326862 USB0 port 0 read_resources bus 0 link: 0 done
1130 13:53:09.334006 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 13:53:09.337574 PCI: 00:14.3 read_resources bus 0 link: 0
1132 13:53:09.343729 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 13:53:09.347022 PCI: 00:15.0 read_resources bus 0 link: 0
1134 13:53:09.354371 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 13:53:09.357304 PCI: 00:15.1 read_resources bus 0 link: 0
1136 13:53:09.364208 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 13:53:09.367277 PCI: 00:19.1 read_resources bus 0 link: 0
1138 13:53:09.374534 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 13:53:09.377980 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 13:53:09.384637 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 13:53:09.387809 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 13:53:09.394328 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 13:53:09.397661 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 13:53:09.404792 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 13:53:09.408202 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 13:53:09.414251 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 13:53:09.417544 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 13:53:09.420913 GENERIC: 0.0 read_resources bus 0 link: 0
1149 13:53:09.427863 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 13:53:09.431219 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 13:53:09.438285 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 13:53:09.441897 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 13:53:09.448169 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 13:53:09.451564 Root Device read_resources bus 0 link: 0 done
1155 13:53:09.455445 Done reading resources.
1156 13:53:09.461817 Show resources in subtree (Root Device)...After reading.
1157 13:53:09.465090 Root Device child on link 0 DOMAIN: 0000
1158 13:53:09.468467 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 13:53:09.478321 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 13:53:09.488165 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 13:53:09.491258 PCI: 00:00.0
1162 13:53:09.501280 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 13:53:09.508198 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 13:53:09.517982 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 13:53:09.527863 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 13:53:09.537952 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 13:53:09.548322 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 13:53:09.557673 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 13:53:09.564532 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 13:53:09.574588 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 13:53:09.584077 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 13:53:09.594340 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 13:53:09.603888 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 13:53:09.610629 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 13:53:09.621118 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 13:53:09.630756 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 13:53:09.640725 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 13:53:09.650643 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 13:53:09.660571 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 13:53:09.667521 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 13:53:09.677467 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 13:53:09.709611 PCI: 00:02.0
1183 13:53:09.709758 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 13:53:09.709832 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 13:53:09.711049 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 13:53:09.713632 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 13:53:09.723542 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 13:53:09.727122 GENERIC: 0.0
1189 13:53:09.727227 PCI: 00:05.0
1190 13:53:09.736614 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 13:53:09.743625 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 13:53:09.743783 GENERIC: 0.0
1193 13:53:09.746621 PCI: 00:08.0
1194 13:53:09.756826 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 13:53:09.756972 PCI: 00:0a.0
1196 13:53:09.760252 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 13:53:09.770146 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 13:53:09.776617 USB0 port 0 child on link 0 USB3 port 0
1199 13:53:09.776731 USB3 port 0
1200 13:53:09.780223 USB3 port 1
1201 13:53:09.780316 USB3 port 2
1202 13:53:09.783190 USB3 port 3
1203 13:53:09.786661 PCI: 00:14.0 child on link 0 USB0 port 0
1204 13:53:09.796747 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 13:53:09.803125 USB0 port 0 child on link 0 USB2 port 0
1206 13:53:09.803264 USB2 port 0
1207 13:53:09.806680 USB2 port 1
1208 13:53:09.806780 USB2 port 2
1209 13:53:09.809897 USB2 port 3
1210 13:53:09.809991 USB2 port 4
1211 13:53:09.813390 USB2 port 5
1212 13:53:09.813478 USB2 port 6
1213 13:53:09.816878 USB2 port 7
1214 13:53:09.816968 USB2 port 8
1215 13:53:09.819806 USB2 port 9
1216 13:53:09.819901 USB3 port 0
1217 13:53:09.823496 USB3 port 1
1218 13:53:09.823609 USB3 port 2
1219 13:53:09.826648 USB3 port 3
1220 13:53:09.826733 PCI: 00:14.2
1221 13:53:09.836629 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 13:53:09.846327 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 13:53:09.853133 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 13:53:09.862941 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 13:53:09.863054 GENERIC: 0.0
1226 13:53:09.869801 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 13:53:09.879837 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 13:53:09.879968 I2C: 00:1a
1229 13:53:09.883351 I2C: 00:31
1230 13:53:09.883435 I2C: 00:32
1231 13:53:09.887090 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 13:53:09.896818 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 13:53:09.900141 I2C: 00:10
1234 13:53:09.900241 PCI: 00:15.2
1235 13:53:09.909496 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 13:53:09.913049 PCI: 00:15.3
1237 13:53:09.923380 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 13:53:09.923549 PCI: 00:16.0
1239 13:53:09.932808 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 13:53:09.936252 PCI: 00:19.0
1241 13:53:09.939681 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 13:53:09.950067 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 13:53:09.953336 I2C: 00:15
1244 13:53:09.955985 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 13:53:09.966177 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 13:53:09.973466 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 13:53:09.983123 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 13:53:09.986181 GENERIC: 0.0
1249 13:53:09.986292 PCI: 01:00.0
1250 13:53:09.996353 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 13:53:10.006225 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 13:53:10.016307 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 13:53:10.016427 PCI: 00:1e.0
1254 13:53:10.029572 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 13:53:10.033083 PCI: 00:1e.2 child on link 0 SPI: 00
1256 13:53:10.042649 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 13:53:10.042784 SPI: 00
1258 13:53:10.049381 PCI: 00:1e.3 child on link 0 SPI: 00
1259 13:53:10.059051 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 13:53:10.059163 SPI: 00
1261 13:53:10.062561 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 13:53:10.072445 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 13:53:10.072549 PNP: 0c09.0
1264 13:53:10.082289 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 13:53:10.085763 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 13:53:10.095751 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 13:53:10.105782 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 13:53:10.109257 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 13:53:10.112420 GENERIC: 0.0
1270 13:53:10.112512 GENERIC: 1.0
1271 13:53:10.115822 PCI: 00:1f.3
1272 13:53:10.125656 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 13:53:10.135334 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 13:53:10.135482 PCI: 00:1f.5
1275 13:53:10.145922 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 13:53:10.152106 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 13:53:10.152208 APIC: 00
1278 13:53:10.152275 APIC: 01
1279 13:53:10.155680 APIC: 03
1280 13:53:10.155769 APIC: 05
1281 13:53:10.155834 APIC: 07
1282 13:53:10.158547 APIC: 06
1283 13:53:10.158634 APIC: 02
1284 13:53:10.162549 APIC: 04
1285 13:53:10.168658 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 13:53:10.175370 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 13:53:10.178581 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 13:53:10.185388 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 13:53:10.191718 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 13:53:10.195599 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 13:53:10.198675 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 13:53:10.205780 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 13:53:10.211771 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 13:53:10.222013 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 13:53:10.228213 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 13:53:10.234872 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 13:53:10.241466 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 13:53:10.248351 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 13:53:10.258229 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 13:53:10.261493 DOMAIN: 0000: Resource ranges:
1301 13:53:10.264777 * Base: 1000, Size: 800, Tag: 100
1302 13:53:10.268378 * Base: 1900, Size: e700, Tag: 100
1303 13:53:10.271814 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 13:53:10.278724 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 13:53:10.285014 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 13:53:10.294713 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 13:53:10.301541 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 13:53:10.308315 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 13:53:10.317881 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 13:53:10.324897 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 13:53:10.331621 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 13:53:10.341475 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 13:53:10.348368 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 13:53:10.354524 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 13:53:10.364792 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 13:53:10.371141 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 13:53:10.377765 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 13:53:10.388067 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 13:53:10.394796 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 13:53:10.400982 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 13:53:10.411015 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 13:53:10.417902 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 13:53:10.424723 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 13:53:10.434708 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 13:53:10.441039 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 13:53:10.447836 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 13:53:10.457928 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 13:53:10.461414 DOMAIN: 0000: Resource ranges:
1329 13:53:10.464318 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 13:53:10.467892 * Base: d0000000, Size: 28000000, Tag: 200
1331 13:53:10.471098 * Base: fa000000, Size: 1000000, Tag: 200
1332 13:53:10.477838 * Base: fb001000, Size: 2fff000, Tag: 200
1333 13:53:10.481357 * Base: fe010000, Size: 2e000, Tag: 200
1334 13:53:10.484242 * Base: fe03f000, Size: d41000, Tag: 200
1335 13:53:10.488068 * Base: fed88000, Size: 8000, Tag: 200
1336 13:53:10.494362 * Base: fed93000, Size: d000, Tag: 200
1337 13:53:10.497455 * Base: feda2000, Size: 1e000, Tag: 200
1338 13:53:10.500796 * Base: fede0000, Size: 1220000, Tag: 200
1339 13:53:10.507696 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 13:53:10.514185 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 13:53:10.520950 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 13:53:10.527649 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 13:53:10.534368 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 13:53:10.541023 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 13:53:10.547357 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 13:53:10.554165 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 13:53:10.560808 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 13:53:10.567750 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 13:53:10.574098 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 13:53:10.580871 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 13:53:10.587450 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 13:53:10.593872 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 13:53:10.600451 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 13:53:10.607023 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 13:53:10.613807 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 13:53:10.620241 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 13:53:10.626890 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 13:53:10.633641 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 13:53:10.640534 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 13:53:10.646835 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 13:53:10.653622 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 13:53:10.659990 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 13:53:10.666772 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 13:53:10.670360 PCI: 00:1d.0: Resource ranges:
1365 13:53:10.677227 * Base: 7fc00000, Size: 100000, Tag: 200
1366 13:53:10.683893 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 13:53:10.690303 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 13:53:10.696858 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 13:53:10.703488 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 13:53:10.710180 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 13:53:10.716614 Root Device assign_resources, bus 0 link: 0
1372 13:53:10.719974 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 13:53:10.729864 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 13:53:10.736448 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 13:53:10.746175 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 13:53:10.752830 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 13:53:10.756192 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 13:53:10.762996 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 13:53:10.769577 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 13:53:10.779632 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 13:53:10.785958 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 13:53:10.792696 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 13:53:10.795735 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 13:53:10.805625 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 13:53:10.809552 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 13:53:10.812582 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 13:53:10.822408 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 13:53:10.829449 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 13:53:10.839653 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 13:53:10.843058 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 13:53:10.846246 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 13:53:10.856385 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 13:53:10.859621 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 13:53:10.866035 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 13:53:10.873218 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 13:53:10.876088 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 13:53:10.883489 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 13:53:10.889789 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 13:53:10.900066 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 13:53:10.906454 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 13:53:10.916025 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 13:53:10.919208 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 13:53:10.925821 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 13:53:10.932484 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 13:53:10.942346 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 13:53:10.952699 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 13:53:10.955699 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 13:53:10.965671 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 13:53:10.972632 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 13:53:10.979455 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 13:53:10.985898 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 13:53:10.992653 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 13:53:10.998844 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 13:53:11.002537 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 13:53:11.012458 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 13:53:11.015423 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 13:53:11.019016 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 13:53:11.025665 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 13:53:11.028741 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 13:53:11.035802 LPC: Trying to open IO window from 800 size 1ff
1421 13:53:11.042225 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 13:53:11.052396 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 13:53:11.058737 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 13:53:11.065245 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 13:53:11.068553 Root Device assign_resources, bus 0 link: 0
1426 13:53:11.071785 Done setting resources.
1427 13:53:11.079061 Show resources in subtree (Root Device)...After assigning values.
1428 13:53:11.082030 Root Device child on link 0 DOMAIN: 0000
1429 13:53:11.085252 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 13:53:11.095331 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 13:53:11.105144 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 13:53:11.108435 PCI: 00:00.0
1433 13:53:11.114898 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 13:53:11.124651 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 13:53:11.134689 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 13:53:11.144576 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 13:53:11.155049 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 13:53:11.164897 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 13:53:11.171482 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 13:53:11.181383 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 13:53:11.191700 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 13:53:11.201278 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 13:53:11.211424 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 13:53:11.221157 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 13:53:11.228062 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 13:53:11.237849 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 13:53:11.247883 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 13:53:11.257654 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 13:53:11.267831 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 13:53:11.277999 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 13:53:11.284288 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 13:53:11.294343 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 13:53:11.297919 PCI: 00:02.0
1454 13:53:11.307404 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 13:53:11.317395 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 13:53:11.327270 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 13:53:11.331051 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 13:53:11.343959 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 13:53:11.344155 GENERIC: 0.0
1460 13:53:11.347197 PCI: 00:05.0
1461 13:53:11.357332 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 13:53:11.360519 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 13:53:11.364042 GENERIC: 0.0
1464 13:53:11.364225 PCI: 00:08.0
1465 13:53:11.373535 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 13:53:11.377543 PCI: 00:0a.0
1467 13:53:11.380785 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 13:53:11.390559 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 13:53:11.397099 USB0 port 0 child on link 0 USB3 port 0
1470 13:53:11.397283 USB3 port 0
1471 13:53:11.400474 USB3 port 1
1472 13:53:11.400666 USB3 port 2
1473 13:53:11.403601 USB3 port 3
1474 13:53:11.406821 PCI: 00:14.0 child on link 0 USB0 port 0
1475 13:53:11.427504 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 13:53:11.427912 USB0 port 0 child on link 0 USB2 port 0
1477 13:53:11.428238 USB2 port 0
1478 13:53:11.428570 USB2 port 1
1479 13:53:11.428856 USB2 port 2
1480 13:53:11.430213 USB2 port 3
1481 13:53:11.430531 USB2 port 4
1482 13:53:11.433850 USB2 port 5
1483 13:53:11.434269 USB2 port 6
1484 13:53:11.437128 USB2 port 7
1485 13:53:11.437641 USB2 port 8
1486 13:53:11.440421 USB2 port 9
1487 13:53:11.440755 USB3 port 0
1488 13:53:11.443765 USB3 port 1
1489 13:53:11.444129 USB3 port 2
1490 13:53:11.446856 USB3 port 3
1491 13:53:11.447354 PCI: 00:14.2
1492 13:53:11.456785 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 13:53:11.470252 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 13:53:11.473726 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 13:53:11.483548 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 13:53:11.486854 GENERIC: 0.0
1497 13:53:11.490279 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 13:53:11.500555 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 13:53:11.501007 I2C: 00:1a
1500 13:53:11.503470 I2C: 00:31
1501 13:53:11.503939 I2C: 00:32
1502 13:53:11.512723 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 13:53:11.520339 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 13:53:11.520761 I2C: 00:10
1505 13:53:11.523381 PCI: 00:15.2
1506 13:53:11.534956 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 13:53:11.535465 PCI: 00:15.3
1508 13:53:11.546712 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 13:53:11.547147 PCI: 00:16.0
1510 13:53:11.556657 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 13:53:11.559999 PCI: 00:19.0
1512 13:53:11.563295 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 13:53:11.573601 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 13:53:11.576616 I2C: 00:15
1515 13:53:11.579877 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 13:53:11.589777 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 13:53:11.600301 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 13:53:11.609454 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 13:53:11.612563 GENERIC: 0.0
1520 13:53:11.612850 PCI: 01:00.0
1521 13:53:11.626468 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 13:53:11.636498 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 13:53:11.645853 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 13:53:11.645973 PCI: 00:1e.0
1525 13:53:11.659785 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 13:53:11.662762 PCI: 00:1e.2 child on link 0 SPI: 00
1527 13:53:11.672956 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 13:53:11.673420 SPI: 00
1529 13:53:11.679529 PCI: 00:1e.3 child on link 0 SPI: 00
1530 13:53:11.689900 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 13:53:11.690339 SPI: 00
1532 13:53:11.693563 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 13:53:11.703576 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 13:53:11.706818 PNP: 0c09.0
1535 13:53:11.712858 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 13:53:11.719405 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 13:53:11.725790 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 13:53:11.736121 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 13:53:11.742713 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 13:53:11.743268 GENERIC: 0.0
1541 13:53:11.746230 GENERIC: 1.0
1542 13:53:11.746655 PCI: 00:1f.3
1543 13:53:11.756129 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 13:53:11.765850 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 13:53:11.769512 PCI: 00:1f.5
1546 13:53:11.779029 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 13:53:11.782562 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 13:53:11.786042 APIC: 00
1549 13:53:11.786358 APIC: 01
1550 13:53:11.786595 APIC: 03
1551 13:53:11.789141 APIC: 05
1552 13:53:11.789564 APIC: 07
1553 13:53:11.792429 APIC: 06
1554 13:53:11.792847 APIC: 02
1555 13:53:11.793190 APIC: 04
1556 13:53:11.795598 Done allocating resources.
1557 13:53:11.802464 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 13:53:11.809104 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 13:53:11.812373 Configure GPIOs for I2S audio on UP4.
1560 13:53:11.818712 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 13:53:11.822615 Enabling resources...
1562 13:53:11.825924 PCI: 00:00.0 subsystem <- 8086/9a12
1563 13:53:11.829021 PCI: 00:00.0 cmd <- 06
1564 13:53:11.832547 PCI: 00:02.0 subsystem <- 8086/9a40
1565 13:53:11.835857 PCI: 00:02.0 cmd <- 03
1566 13:53:11.838506 PCI: 00:04.0 subsystem <- 8086/9a03
1567 13:53:11.838650 PCI: 00:04.0 cmd <- 02
1568 13:53:11.845530 PCI: 00:05.0 subsystem <- 8086/9a19
1569 13:53:11.845817 PCI: 00:05.0 cmd <- 02
1570 13:53:11.848718 PCI: 00:08.0 subsystem <- 8086/9a11
1571 13:53:11.852692 PCI: 00:08.0 cmd <- 06
1572 13:53:11.855825 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 13:53:11.858903 PCI: 00:0d.0 cmd <- 02
1574 13:53:11.862334 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 13:53:11.865807 PCI: 00:14.0 cmd <- 02
1576 13:53:11.869054 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 13:53:11.872361 PCI: 00:14.2 cmd <- 02
1578 13:53:11.875685 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 13:53:11.878960 PCI: 00:14.3 cmd <- 02
1580 13:53:11.882248 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 13:53:11.885456 PCI: 00:15.0 cmd <- 02
1582 13:53:11.888790 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 13:53:11.888989 PCI: 00:15.1 cmd <- 02
1584 13:53:11.895342 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 13:53:11.895511 PCI: 00:15.2 cmd <- 02
1586 13:53:11.898739 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 13:53:11.902003 PCI: 00:15.3 cmd <- 02
1588 13:53:11.905440 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 13:53:11.908188 PCI: 00:16.0 cmd <- 02
1590 13:53:11.911824 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 13:53:11.915260 PCI: 00:19.1 cmd <- 02
1592 13:53:11.918157 PCI: 00:1d.0 bridge ctrl <- 0013
1593 13:53:11.921532 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 13:53:11.924881 PCI: 00:1d.0 cmd <- 06
1595 13:53:11.928197 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 13:53:11.931735 PCI: 00:1e.0 cmd <- 06
1597 13:53:11.935043 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 13:53:11.938083 PCI: 00:1e.2 cmd <- 06
1599 13:53:11.941476 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 13:53:11.941552 PCI: 00:1e.3 cmd <- 02
1601 13:53:11.948687 PCI: 00:1f.0 subsystem <- 8086/a087
1602 13:53:11.948784 PCI: 00:1f.0 cmd <- 407
1603 13:53:11.951903 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 13:53:11.954946 PCI: 00:1f.3 cmd <- 02
1605 13:53:11.958287 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 13:53:11.961682 PCI: 00:1f.5 cmd <- 406
1607 13:53:11.966061 PCI: 01:00.0 cmd <- 02
1608 13:53:11.970581 done.
1609 13:53:11.974515 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 13:53:11.977656 Initializing devices...
1611 13:53:11.980535 Root Device init
1612 13:53:11.983971 Chrome EC: Set SMI mask to 0x0000000000000000
1613 13:53:11.990988 Chrome EC: clear events_b mask to 0x0000000000000000
1614 13:53:11.997473 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 13:53:12.000814 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 13:53:12.008422 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 13:53:12.015201 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 13:53:12.021857 fw_config match found: DB_USB=USB3_ACTIVE
1619 13:53:12.025011 Configure Right Type-C port orientation for retimer
1620 13:53:12.028268 Root Device init finished in 44 msecs
1621 13:53:12.031460 PCI: 00:00.0 init
1622 13:53:12.035209 CPU TDP = 9 Watts
1623 13:53:12.035737 CPU PL1 = 9 Watts
1624 13:53:12.038417 CPU PL2 = 40 Watts
1625 13:53:12.041467 CPU PL4 = 83 Watts
1626 13:53:12.044889 PCI: 00:00.0 init finished in 8 msecs
1627 13:53:12.045351 PCI: 00:02.0 init
1628 13:53:12.047897 GMA: Found VBT in CBFS
1629 13:53:12.051469 GMA: Found valid VBT in CBFS
1630 13:53:12.058025 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 13:53:12.064727 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 13:53:12.068395 PCI: 00:02.0 init finished in 18 msecs
1633 13:53:12.070904 PCI: 00:05.0 init
1634 13:53:12.074408 PCI: 00:05.0 init finished in 0 msecs
1635 13:53:12.077665 PCI: 00:08.0 init
1636 13:53:12.081093 PCI: 00:08.0 init finished in 0 msecs
1637 13:53:12.084369 PCI: 00:14.0 init
1638 13:53:12.087531 PCI: 00:14.0 init finished in 0 msecs
1639 13:53:12.090820 PCI: 00:14.2 init
1640 13:53:12.094522 PCI: 00:14.2 init finished in 0 msecs
1641 13:53:12.098125 PCI: 00:15.0 init
1642 13:53:12.098283 I2C bus 0 version 0x3230302a
1643 13:53:12.104420 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 13:53:12.107817 PCI: 00:15.0 init finished in 6 msecs
1645 13:53:12.107978 PCI: 00:15.1 init
1646 13:53:12.111348 I2C bus 1 version 0x3230302a
1647 13:53:12.114261 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 13:53:12.120720 PCI: 00:15.1 init finished in 6 msecs
1649 13:53:12.120824 PCI: 00:15.2 init
1650 13:53:12.124070 I2C bus 2 version 0x3230302a
1651 13:53:12.127624 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 13:53:12.131235 PCI: 00:15.2 init finished in 6 msecs
1653 13:53:12.134280 PCI: 00:15.3 init
1654 13:53:12.137736 I2C bus 3 version 0x3230302a
1655 13:53:12.140650 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 13:53:12.143961 PCI: 00:15.3 init finished in 6 msecs
1657 13:53:12.147731 PCI: 00:16.0 init
1658 13:53:12.151161 PCI: 00:16.0 init finished in 0 msecs
1659 13:53:12.154253 PCI: 00:19.1 init
1660 13:53:12.157690 I2C bus 5 version 0x3230302a
1661 13:53:12.160817 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 13:53:12.163873 PCI: 00:19.1 init finished in 6 msecs
1663 13:53:12.164008 PCI: 00:1d.0 init
1664 13:53:12.167531 Initializing PCH PCIe bridge.
1665 13:53:12.173936 PCI: 00:1d.0 init finished in 3 msecs
1666 13:53:12.174110 PCI: 00:1f.0 init
1667 13:53:12.180669 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 13:53:12.184042 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 13:53:12.187581 IOAPIC: ID = 0x02
1670 13:53:12.188222 IOAPIC: Dumping registers
1671 13:53:12.190921 reg 0x0000: 0x02000000
1672 13:53:12.194507 reg 0x0001: 0x00770020
1673 13:53:12.197833 reg 0x0002: 0x00000000
1674 13:53:12.200906 PCI: 00:1f.0 init finished in 21 msecs
1675 13:53:12.204190 PCI: 00:1f.2 init
1676 13:53:12.204601 Disabling ACPI via APMC.
1677 13:53:12.208859 APMC done.
1678 13:53:12.212260 PCI: 00:1f.2 init finished in 5 msecs
1679 13:53:12.223927 PCI: 01:00.0 init
1680 13:53:12.227036 PCI: 01:00.0 init finished in 0 msecs
1681 13:53:12.230435 PNP: 0c09.0 init
1682 13:53:12.234167 Google Chrome EC uptime: 8.365 seconds
1683 13:53:12.240625 Google Chrome AP resets since EC boot: 1
1684 13:53:12.243723 Google Chrome most recent AP reset causes:
1685 13:53:12.246843 0.347: 32775 shutdown: entering G3
1686 13:53:12.253977 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 13:53:12.257007 PNP: 0c09.0 init finished in 23 msecs
1688 13:53:12.263214 Devices initialized
1689 13:53:12.266349 Show all devs... After init.
1690 13:53:12.269966 Root Device: enabled 1
1691 13:53:12.270075 DOMAIN: 0000: enabled 1
1692 13:53:12.273281 CPU_CLUSTER: 0: enabled 1
1693 13:53:12.276559 PCI: 00:00.0: enabled 1
1694 13:53:12.279790 PCI: 00:02.0: enabled 1
1695 13:53:12.279893 PCI: 00:04.0: enabled 1
1696 13:53:12.283208 PCI: 00:05.0: enabled 1
1697 13:53:12.286446 PCI: 00:06.0: enabled 0
1698 13:53:12.289685 PCI: 00:07.0: enabled 0
1699 13:53:12.289766 PCI: 00:07.1: enabled 0
1700 13:53:12.292972 PCI: 00:07.2: enabled 0
1701 13:53:12.296242 PCI: 00:07.3: enabled 0
1702 13:53:12.299764 PCI: 00:08.0: enabled 1
1703 13:53:12.299860 PCI: 00:09.0: enabled 0
1704 13:53:12.303232 PCI: 00:0a.0: enabled 0
1705 13:53:12.306262 PCI: 00:0d.0: enabled 1
1706 13:53:12.309645 PCI: 00:0d.1: enabled 0
1707 13:53:12.309751 PCI: 00:0d.2: enabled 0
1708 13:53:12.312726 PCI: 00:0d.3: enabled 0
1709 13:53:12.316635 PCI: 00:0e.0: enabled 0
1710 13:53:12.316752 PCI: 00:10.2: enabled 1
1711 13:53:12.319739 PCI: 00:10.6: enabled 0
1712 13:53:12.323141 PCI: 00:10.7: enabled 0
1713 13:53:12.326495 PCI: 00:12.0: enabled 0
1714 13:53:12.326583 PCI: 00:12.6: enabled 0
1715 13:53:12.329823 PCI: 00:13.0: enabled 0
1716 13:53:12.332855 PCI: 00:14.0: enabled 1
1717 13:53:12.336238 PCI: 00:14.1: enabled 0
1718 13:53:12.336322 PCI: 00:14.2: enabled 1
1719 13:53:12.339689 PCI: 00:14.3: enabled 1
1720 13:53:12.342979 PCI: 00:15.0: enabled 1
1721 13:53:12.346127 PCI: 00:15.1: enabled 1
1722 13:53:12.346209 PCI: 00:15.2: enabled 1
1723 13:53:12.349229 PCI: 00:15.3: enabled 1
1724 13:53:12.352679 PCI: 00:16.0: enabled 1
1725 13:53:12.352769 PCI: 00:16.1: enabled 0
1726 13:53:12.355931 PCI: 00:16.2: enabled 0
1727 13:53:12.359514 PCI: 00:16.3: enabled 0
1728 13:53:12.362739 PCI: 00:16.4: enabled 0
1729 13:53:12.362861 PCI: 00:16.5: enabled 0
1730 13:53:12.365950 PCI: 00:17.0: enabled 0
1731 13:53:12.369261 PCI: 00:19.0: enabled 0
1732 13:53:12.372525 PCI: 00:19.1: enabled 1
1733 13:53:12.372626 PCI: 00:19.2: enabled 0
1734 13:53:12.376163 PCI: 00:1c.0: enabled 1
1735 13:53:12.379290 PCI: 00:1c.1: enabled 0
1736 13:53:12.382925 PCI: 00:1c.2: enabled 0
1737 13:53:12.382997 PCI: 00:1c.3: enabled 0
1738 13:53:12.386257 PCI: 00:1c.4: enabled 0
1739 13:53:12.389427 PCI: 00:1c.5: enabled 0
1740 13:53:12.392816 PCI: 00:1c.6: enabled 1
1741 13:53:12.392894 PCI: 00:1c.7: enabled 0
1742 13:53:12.395668 PCI: 00:1d.0: enabled 1
1743 13:53:12.399461 PCI: 00:1d.1: enabled 0
1744 13:53:12.399536 PCI: 00:1d.2: enabled 1
1745 13:53:12.402680 PCI: 00:1d.3: enabled 0
1746 13:53:12.406169 PCI: 00:1e.0: enabled 1
1747 13:53:12.409392 PCI: 00:1e.1: enabled 0
1748 13:53:12.409529 PCI: 00:1e.2: enabled 1
1749 13:53:12.412201 PCI: 00:1e.3: enabled 1
1750 13:53:12.416279 PCI: 00:1f.0: enabled 1
1751 13:53:12.419150 PCI: 00:1f.1: enabled 0
1752 13:53:12.419248 PCI: 00:1f.2: enabled 1
1753 13:53:12.422787 PCI: 00:1f.3: enabled 1
1754 13:53:12.425934 PCI: 00:1f.4: enabled 0
1755 13:53:12.429471 PCI: 00:1f.5: enabled 1
1756 13:53:12.429577 PCI: 00:1f.6: enabled 0
1757 13:53:12.432236 PCI: 00:1f.7: enabled 0
1758 13:53:12.435974 APIC: 00: enabled 1
1759 13:53:12.436075 GENERIC: 0.0: enabled 1
1760 13:53:12.439328 GENERIC: 0.0: enabled 1
1761 13:53:12.442556 GENERIC: 1.0: enabled 1
1762 13:53:12.445921 GENERIC: 0.0: enabled 1
1763 13:53:12.446021 GENERIC: 1.0: enabled 1
1764 13:53:12.449139 USB0 port 0: enabled 1
1765 13:53:12.452363 GENERIC: 0.0: enabled 1
1766 13:53:12.452468 USB0 port 0: enabled 1
1767 13:53:12.455375 GENERIC: 0.0: enabled 1
1768 13:53:12.458981 I2C: 00:1a: enabled 1
1769 13:53:12.462406 I2C: 00:31: enabled 1
1770 13:53:12.462498 I2C: 00:32: enabled 1
1771 13:53:12.465533 I2C: 00:10: enabled 1
1772 13:53:12.468706 I2C: 00:15: enabled 1
1773 13:53:12.468814 GENERIC: 0.0: enabled 0
1774 13:53:12.472507 GENERIC: 1.0: enabled 0
1775 13:53:12.475697 GENERIC: 0.0: enabled 1
1776 13:53:12.475822 SPI: 00: enabled 1
1777 13:53:12.478541 SPI: 00: enabled 1
1778 13:53:12.482182 PNP: 0c09.0: enabled 1
1779 13:53:12.482284 GENERIC: 0.0: enabled 1
1780 13:53:12.485439 USB3 port 0: enabled 1
1781 13:53:12.488765 USB3 port 1: enabled 1
1782 13:53:12.492416 USB3 port 2: enabled 0
1783 13:53:12.492523 USB3 port 3: enabled 0
1784 13:53:12.495567 USB2 port 0: enabled 0
1785 13:53:12.498733 USB2 port 1: enabled 1
1786 13:53:12.498828 USB2 port 2: enabled 1
1787 13:53:12.502140 USB2 port 3: enabled 0
1788 13:53:12.505456 USB2 port 4: enabled 1
1789 13:53:12.505562 USB2 port 5: enabled 0
1790 13:53:12.508761 USB2 port 6: enabled 0
1791 13:53:12.511905 USB2 port 7: enabled 0
1792 13:53:12.515294 USB2 port 8: enabled 0
1793 13:53:12.515500 USB2 port 9: enabled 0
1794 13:53:12.518717 USB3 port 0: enabled 0
1795 13:53:12.522497 USB3 port 1: enabled 1
1796 13:53:12.522655 USB3 port 2: enabled 0
1797 13:53:12.525575 USB3 port 3: enabled 0
1798 13:53:12.529058 GENERIC: 0.0: enabled 1
1799 13:53:12.531792 GENERIC: 1.0: enabled 1
1800 13:53:12.532033 APIC: 01: enabled 1
1801 13:53:12.536006 APIC: 03: enabled 1
1802 13:53:12.536218 APIC: 05: enabled 1
1803 13:53:12.539116 APIC: 07: enabled 1
1804 13:53:12.542191 APIC: 06: enabled 1
1805 13:53:12.542406 APIC: 02: enabled 1
1806 13:53:12.545123 APIC: 04: enabled 1
1807 13:53:12.548575 PCI: 01:00.0: enabled 1
1808 13:53:12.552400 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1809 13:53:12.558846 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 13:53:12.561956 ELOG: NV offset 0xf30000 size 0x1000
1811 13:53:12.568346 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 13:53:12.575375 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:11 UTC
1813 13:53:12.581857 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:11 UTC
1814 13:53:12.588308 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:11 UTC
1815 13:53:12.594884 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:11 UTC
1816 13:53:12.602159 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:11 UTC
1817 13:53:12.604880 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 13:53:12.612269 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:11 UTC
1819 13:53:12.621707 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1820 13:53:12.628271 ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:11 UTC
1821 13:53:12.631732 elog_add_boot_reason: Logged dev mode boot
1822 13:53:12.638502 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1823 13:53:12.638637 Finalize devices...
1824 13:53:12.642026 Devices finalized
1825 13:53:12.644759 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 13:53:12.651806 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 13:53:12.658493 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 13:53:12.661664 ME: HFSTS1 : 0x80030055
1829 13:53:12.664938 ME: HFSTS2 : 0x30280116
1830 13:53:12.671481 ME: HFSTS3 : 0x00000050
1831 13:53:12.675490 ME: HFSTS4 : 0x00004000
1832 13:53:12.682072 ME: HFSTS5 : 0x00000000
1833 13:53:12.684735 ME: HFSTS6 : 0x00400006
1834 13:53:12.688681 ME: Manufacturing Mode : YES
1835 13:53:12.691623 ME: SPI Protection Mode Enabled : NO
1836 13:53:12.695082 ME: FW Partition Table : OK
1837 13:53:12.698323 ME: Bringup Loader Failure : NO
1838 13:53:12.701612 ME: Firmware Init Complete : NO
1839 13:53:12.708360 ME: Boot Options Present : NO
1840 13:53:12.711467 ME: Update In Progress : NO
1841 13:53:12.714894 ME: D0i3 Support : YES
1842 13:53:12.718234 ME: Low Power State Enabled : NO
1843 13:53:12.721590 ME: CPU Replaced : YES
1844 13:53:12.724916 ME: CPU Replacement Valid : YES
1845 13:53:12.728212 ME: Current Working State : 5
1846 13:53:12.731361 ME: Current Operation State : 1
1847 13:53:12.738328 ME: Current Operation Mode : 3
1848 13:53:12.741273 ME: Error Code : 0
1849 13:53:12.744589 ME: Enhanced Debug Mode : NO
1850 13:53:12.748243 ME: CPU Debug Disabled : YES
1851 13:53:12.751451 ME: TXT Support : NO
1852 13:53:12.757816 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 13:53:12.764806 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1854 13:53:12.768005 CBFS: 'fallback/slic' not found.
1855 13:53:12.771157 ACPI: Writing ACPI tables at 76b01000.
1856 13:53:12.774880 ACPI: * FACS
1857 13:53:12.775002 ACPI: * DSDT
1858 13:53:12.778327 Ramoops buffer: 0x100000@0x76a00000.
1859 13:53:12.784767 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1860 13:53:12.788028 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1861 13:53:12.791245 Google Chrome EC: version:
1862 13:53:12.794421 ro: voema_v2.0.7540-147f8d37d1
1863 13:53:12.798244 rw: voema_v2.0.7540-147f8d37d1
1864 13:53:12.801182 running image: 2
1865 13:53:12.807641 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1866 13:53:12.810949 ACPI: * FADT
1867 13:53:12.811048 SCI is IRQ9
1868 13:53:12.814380 ACPI: added table 1/32, length now 40
1869 13:53:12.817788 ACPI: * SSDT
1870 13:53:12.820933 Found 1 CPU(s) with 8 core(s) each.
1871 13:53:12.824566 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 13:53:12.830878 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 13:53:12.834371 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 13:53:12.837585 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 13:53:12.844495 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 13:53:12.851285 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 13:53:12.854470 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 13:53:12.861240 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 13:53:12.867837 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 13:53:12.871231 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 13:53:12.874458 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 13:53:12.881077 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 13:53:12.887951 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 13:53:12.890681 PS2K: Passing 80 keymaps to kernel
1885 13:53:12.897921 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 13:53:12.904110 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 13:53:12.910582 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 13:53:12.917288 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 13:53:12.924062 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 13:53:12.930602 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 13:53:12.937446 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 13:53:12.944555 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 13:53:12.947596 ACPI: added table 2/32, length now 44
1894 13:53:12.948077 ACPI: * MCFG
1895 13:53:12.954257 ACPI: added table 3/32, length now 48
1896 13:53:12.954612 ACPI: * TPM2
1897 13:53:12.957307 TPM2 log created at 0x769f0000
1898 13:53:12.960456 ACPI: added table 4/32, length now 52
1899 13:53:12.964590 ACPI: * MADT
1900 13:53:12.964966 SCI is IRQ9
1901 13:53:12.967037 ACPI: added table 5/32, length now 56
1902 13:53:12.970590 current = 76b09850
1903 13:53:12.970881 ACPI: * DMAR
1904 13:53:12.974422 ACPI: added table 6/32, length now 60
1905 13:53:12.980763 ACPI: added table 7/32, length now 64
1906 13:53:12.980968 ACPI: * HPET
1907 13:53:12.983749 ACPI: added table 8/32, length now 68
1908 13:53:12.987235 ACPI: done.
1909 13:53:12.987401 ACPI tables: 35216 bytes.
1910 13:53:12.990328 smbios_write_tables: 769ef000
1911 13:53:12.994077 EC returned error result code 3
1912 13:53:12.996927 Couldn't obtain OEM name from CBI
1913 13:53:13.000654 Create SMBIOS type 16
1914 13:53:13.003673 Create SMBIOS type 17
1915 13:53:13.007094 GENERIC: 0.0 (WIFI Device)
1916 13:53:13.007230 SMBIOS tables: 1750 bytes.
1917 13:53:13.014025 Writing table forward entry at 0x00000500
1918 13:53:13.020628 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1919 13:53:13.024095 Writing coreboot table at 0x76b25000
1920 13:53:13.030152 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1921 13:53:13.033629 1. 0000000000001000-000000000009ffff: RAM
1922 13:53:13.036822 2. 00000000000a0000-00000000000fffff: RESERVED
1923 13:53:13.043562 3. 0000000000100000-00000000769eefff: RAM
1924 13:53:13.046965 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1925 13:53:13.053435 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1926 13:53:13.060021 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1927 13:53:13.063470 7. 0000000077000000-000000007fbfffff: RESERVED
1928 13:53:13.066917 8. 00000000c0000000-00000000cfffffff: RESERVED
1929 13:53:13.073458 9. 00000000f8000000-00000000f9ffffff: RESERVED
1930 13:53:13.076853 10. 00000000fb000000-00000000fb000fff: RESERVED
1931 13:53:13.083278 11. 00000000fe000000-00000000fe00ffff: RESERVED
1932 13:53:13.086523 12. 00000000fed80000-00000000fed87fff: RESERVED
1933 13:53:13.093480 13. 00000000fed90000-00000000fed92fff: RESERVED
1934 13:53:13.096656 14. 00000000feda0000-00000000feda1fff: RESERVED
1935 13:53:13.103269 15. 00000000fedc0000-00000000feddffff: RESERVED
1936 13:53:13.106996 16. 0000000100000000-00000002803fffff: RAM
1937 13:53:13.110183 Passing 4 GPIOs to payload:
1938 13:53:13.112989 NAME | PORT | POLARITY | VALUE
1939 13:53:13.119822 lid | undefined | high | high
1940 13:53:13.123046 power | undefined | high | low
1941 13:53:13.129954 oprom | undefined | high | low
1942 13:53:13.136462 EC in RW | 0x000000e5 | high | high
1943 13:53:13.143110 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 67da
1944 13:53:13.143247 coreboot table: 1576 bytes.
1945 13:53:13.150146 IMD ROOT 0. 0x76fff000 0x00001000
1946 13:53:13.153292 IMD SMALL 1. 0x76ffe000 0x00001000
1947 13:53:13.156586 FSP MEMORY 2. 0x76c4e000 0x003b0000
1948 13:53:13.159926 VPD 3. 0x76c4d000 0x00000367
1949 13:53:13.163233 RO MCACHE 4. 0x76c4c000 0x00000fdc
1950 13:53:13.166692 CONSOLE 5. 0x76c2c000 0x00020000
1951 13:53:13.170136 FMAP 6. 0x76c2b000 0x00000578
1952 13:53:13.173380 TIME STAMP 7. 0x76c2a000 0x00000910
1953 13:53:13.176636 VBOOT WORK 8. 0x76c16000 0x00014000
1954 13:53:13.183403 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 13:53:13.186450 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 13:53:13.190262 RAMSTAGE 11. 0x76b97000 0x00073000
1957 13:53:13.193060 REFCODE 12. 0x76b42000 0x00055000
1958 13:53:13.196479 SMM BACKUP 13. 0x76b32000 0x00010000
1959 13:53:13.199550 4f444749 14. 0x76b30000 0x00002000
1960 13:53:13.202922 EXT VBT15. 0x76b2d000 0x0000219f
1961 13:53:13.206207 COREBOOT 16. 0x76b25000 0x00008000
1962 13:53:13.209945 ACPI 17. 0x76b01000 0x00024000
1963 13:53:13.216795 ACPI GNVS 18. 0x76b00000 0x00001000
1964 13:53:13.219796 RAMOOPS 19. 0x76a00000 0x00100000
1965 13:53:13.223249 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 13:53:13.226613 SMBIOS 21. 0x769ef000 0x00000800
1967 13:53:13.226704 IMD small region:
1968 13:53:13.232720 IMD ROOT 0. 0x76ffec00 0x00000400
1969 13:53:13.236414 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 13:53:13.240015 POWER STATE 2. 0x76ffeb80 0x00000044
1971 13:53:13.242746 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 13:53:13.246178 MEM INFO 4. 0x76ffe980 0x000001e0
1973 13:53:13.252985 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1974 13:53:13.256380 MTRR: Physical address space:
1975 13:53:13.262866 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 13:53:13.269544 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1977 13:53:13.276478 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1978 13:53:13.283281 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1979 13:53:13.285909 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1980 13:53:13.292880 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1981 13:53:13.299250 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1982 13:53:13.306193 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 13:53:13.309504 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 13:53:13.312741 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 13:53:13.316014 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 13:53:13.319075 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 13:53:13.326153 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 13:53:13.329615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 13:53:13.344189 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 13:53:13.344388 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 13:53:13.344499 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 13:53:13.345863 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 13:53:13.348885 call enable_fixed_mtrr()
1994 13:53:13.352441 CPU physical address size: 39 bits
1995 13:53:13.355954 MTRR: default type WB/UC MTRR counts: 6/6.
1996 13:53:13.359339 MTRR: UC selected as default type.
1997 13:53:13.365817 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 13:53:13.372659 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 13:53:13.379308 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 13:53:13.385761 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 13:53:13.392477 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 13:53:13.398707 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 13:53:13.402705 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 13:53:13.408983 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 13:53:13.412119 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 13:53:13.415505 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 13:53:13.419208 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 13:53:13.425239 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 13:53:13.428635 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 13:53:13.431821 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 13:53:13.435331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 13:53:13.438564 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 13:53:13.445189 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 13:53:13.445315
2015 13:53:13.445386 MTRR check
2016 13:53:13.448624 Fixed MTRRs : Enabled
2017 13:53:13.451791 Variable MTRRs: Enabled
2018 13:53:13.451938
2019 13:53:13.455330 call enable_fixed_mtrr()
2020 13:53:13.461906 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2021 13:53:13.465494 CPU physical address size: 39 bits
2022 13:53:13.469326 Checking cr50 for pending updates
2023 13:53:13.472656 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 13:53:13.476062 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 13:53:13.479167 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 13:53:13.485948 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 13:53:13.489142 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 13:53:13.492467 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 13:53:13.495742 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 13:53:13.502275 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 13:53:13.505410 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 13:53:13.509299 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 13:53:13.512565 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 13:53:13.519001 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 13:53:13.522185 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 13:53:13.525837 call enable_fixed_mtrr()
2037 13:53:13.529061 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 13:53:13.532254 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 13:53:13.538646 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 13:53:13.542013 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 13:53:13.545425 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 13:53:13.548690 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 13:53:13.555849 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 13:53:13.559016 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 13:53:13.561993 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 13:53:13.565236 CPU physical address size: 39 bits
2047 13:53:13.572142 call enable_fixed_mtrr()
2048 13:53:13.575529 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 13:53:13.578686 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 13:53:13.582032 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 13:53:13.588940 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 13:53:13.591747 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 13:53:13.595025 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 13:53:13.598576 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 13:53:13.601721 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 13:53:13.608490 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 13:53:13.611671 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 13:53:13.615031 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 13:53:13.618104 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 13:53:13.626323 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 13:53:13.629091 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 13:53:13.632772 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 13:53:13.636002 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 13:53:13.642475 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 13:53:13.645701 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 13:53:13.649090 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 13:53:13.652437 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 13:53:13.659541 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 13:53:13.662727 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 13:53:13.665729 call enable_fixed_mtrr()
2071 13:53:13.669487 call enable_fixed_mtrr()
2072 13:53:13.672342 CPU physical address size: 39 bits
2073 13:53:13.676167 CPU physical address size: 39 bits
2074 13:53:13.679204 CPU physical address size: 39 bits
2075 13:53:13.682573 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 13:53:13.689491 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 13:53:13.693034 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 13:53:13.695965 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 13:53:13.699484 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 13:53:13.702561 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 13:53:13.708880 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 13:53:13.712609 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 13:53:13.715616 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 13:53:13.719328 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 13:53:13.725741 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 13:53:13.729222 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 13:53:13.733413 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 13:53:13.735722 call enable_fixed_mtrr()
2089 13:53:13.739278 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 13:53:13.745728 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 13:53:13.749169 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 13:53:13.752178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 13:53:13.755792 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 13:53:13.762458 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 13:53:13.765816 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 13:53:13.768683 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 13:53:13.772007 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 13:53:13.775982 CPU physical address size: 39 bits
2099 13:53:13.783568 call enable_fixed_mtrr()
2100 13:53:13.783754 Reading cr50 TPM mode
2101 13:53:13.787607 CPU physical address size: 39 bits
2102 13:53:13.793791 BS: BS_PAYLOAD_LOAD entry times (exec / console): 321 / 7 ms
2103 13:53:13.803784 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2104 13:53:13.807259 Checking segment from ROM address 0xffc02b38
2105 13:53:13.810656 Checking segment from ROM address 0xffc02b54
2106 13:53:13.817064 Loading segment from ROM address 0xffc02b38
2107 13:53:13.817160 code (compression=0)
2108 13:53:13.827263 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 13:53:13.833958 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 13:53:13.837183 it's not compressed!
2111 13:53:13.976542 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 13:53:13.982958 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 13:53:13.989542 Loading segment from ROM address 0xffc02b54
2114 13:53:13.989625 Entry Point 0x30000000
2115 13:53:13.992878 Loaded segments
2116 13:53:13.999379 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 13:53:14.042428 Finalizing chipset.
2118 13:53:14.045663 Finalizing SMM.
2119 13:53:14.045752 APMC done.
2120 13:53:14.052106 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 13:53:14.055659 mp_park_aps done after 0 msecs.
2122 13:53:14.059090 Jumping to boot code at 0x30000000(0x76b25000)
2123 13:53:14.069275 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 13:53:14.069362
2125 13:53:14.069427
2126 13:53:14.069486
2127 13:53:14.072170 Starting depthcharge on Voema...
2128 13:53:14.072253
2129 13:53:14.072599 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 13:53:14.072699 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2131 13:53:14.072783 Setting prompt string to ['volteer:']
2132 13:53:14.072860 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2133 13:53:14.082266 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 13:53:14.082348
2135 13:53:14.088892 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 13:53:14.088974
2137 13:53:14.092202 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 13:53:14.095429
2139 13:53:14.098698 Failed to find eMMC card reader
2140 13:53:14.098780
2141 13:53:14.098842 Wipe memory regions:
2142 13:53:14.098901
2143 13:53:14.105316 [0x00000000001000, 0x000000000a0000)
2144 13:53:14.105420
2145 13:53:14.108718 [0x00000000100000, 0x00000030000000)
2146 13:53:14.133656
2147 13:53:14.137193 [0x00000032662db0, 0x000000769ef000)
2148 13:53:14.173227
2149 13:53:14.176540 [0x00000100000000, 0x00000280400000)
2150 13:53:14.378133
2151 13:53:14.381521 ec_init: CrosEC protocol v3 supported (256, 256)
2152 13:53:14.381614
2153 13:53:14.388168 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 13:53:14.391654
2155 13:53:14.398265 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 13:53:14.402243
2157 13:53:14.405713 pmc_check_ipc_sts: STS_BUSY done after 1616 us
2158 13:53:14.405797
2159 13:53:14.408747 send_conn_disc_msg: pmc_send_cmd succeeded
2160 13:53:14.841944
2161 13:53:14.842080 R8152: Initializing
2162 13:53:14.842174
2163 13:53:14.845429 Version 9 (ocp_data = 6010)
2164 13:53:14.845514
2165 13:53:14.848478 R8152: Done initializing
2166 13:53:14.848561
2167 13:53:14.852148 Adding net device
2168 13:53:15.155306
2169 13:53:15.158556 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 13:53:15.158655
2171 13:53:15.158738
2172 13:53:15.158842
2173 13:53:15.162075 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 13:53:15.262499 volteer: tftpboot 192.168.201.1 10607012/tftp-deploy-qulynwdf/kernel/bzImage 10607012/tftp-deploy-qulynwdf/kernel/cmdline 10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
2176 13:53:15.262634 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 13:53:15.262719 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2178 13:53:15.266838 tftpboot 192.168.201.1 10607012/tftp-deploy-qulynwdf/kernel/bzIploy-qulynwdf/kernel/cmdline 10607012/tftp-deploy-qulynwdf/ramdisk/ramdisk.cpio.gz
2179 13:53:15.266950
2180 13:53:15.267042 Waiting for link
2181 13:53:15.470669
2182 13:53:15.470826 done.
2183 13:53:15.470923
2184 13:53:15.470999 MAC: 00:e0:4c:71:a6:42
2185 13:53:15.471059
2186 13:53:15.473980 Sending DHCP discover... done.
2187 13:53:15.474062
2188 13:53:15.477317 Waiting for reply... done.
2189 13:53:15.477401
2190 13:53:15.480668 Sending DHCP request... done.
2191 13:53:15.480752
2192 13:53:15.490203 Waiting for reply... done.
2193 13:53:15.490287
2194 13:53:15.490382 My ip is 192.168.201.18
2195 13:53:15.490460
2196 13:53:15.496817 The DHCP server ip is 192.168.201.1
2197 13:53:15.496900
2198 13:53:15.499825 TFTP server IP predefined by user: 192.168.201.1
2199 13:53:15.499946
2200 13:53:15.506484 Bootfile predefined by user: 10607012/tftp-deploy-qulynwdf/kernel/bzImage
2201 13:53:15.506568
2202 13:53:15.509852 Sending tftp read request... done.
2203 13:53:15.509935
2204 13:53:15.513093 Waiting for the transfer...
2205 13:53:15.513176
2206 13:53:15.800863 00000000 ################################################################
2207 13:53:15.801035
2208 13:53:16.054786 00080000 ################################################################
2209 13:53:16.054964
2210 13:53:16.304712 00100000 ################################################################
2211 13:53:16.304864
2212 13:53:16.558598 00180000 ################################################################
2213 13:53:16.558753
2214 13:53:16.817500 00200000 ################################################################
2215 13:53:16.817632
2216 13:53:17.066257 00280000 ################################################################
2217 13:53:17.066434
2218 13:53:17.324276 00300000 ################################################################
2219 13:53:17.324433
2220 13:53:17.573193 00380000 ################################################################
2221 13:53:17.573355
2222 13:53:17.824430 00400000 ################################################################
2223 13:53:17.824569
2224 13:53:18.070055 00480000 ################################################################
2225 13:53:18.070219
2226 13:53:18.315758 00500000 ################################################################
2227 13:53:18.315942
2228 13:53:18.575091 00580000 ################################################################
2229 13:53:18.575269
2230 13:53:18.829374 00600000 ################################################################
2231 13:53:18.829542
2232 13:53:19.087758 00680000 ################################################################
2233 13:53:19.087905
2234 13:53:19.348631 00700000 ################################################################
2235 13:53:19.348763
2236 13:53:19.356982 00780000 ## done.
2237 13:53:19.357072
2238 13:53:19.360115 The bootfile was 7880592 bytes long.
2239 13:53:19.360199
2240 13:53:19.363446 Sending tftp read request... done.
2241 13:53:19.363531
2242 13:53:19.367033 Waiting for the transfer...
2243 13:53:19.367132
2244 13:53:19.640506 00000000 ################################################################
2245 13:53:19.640640
2246 13:53:19.893560 00080000 ################################################################
2247 13:53:19.893693
2248 13:53:20.159209 00100000 ################################################################
2249 13:53:20.159375
2250 13:53:20.419947 00180000 ################################################################
2251 13:53:20.420111
2252 13:53:20.678005 00200000 ################################################################
2253 13:53:20.678143
2254 13:53:20.940360 00280000 ################################################################
2255 13:53:20.940529
2256 13:53:21.194030 00300000 ################################################################
2257 13:53:21.194191
2258 13:53:21.450365 00380000 ################################################################
2259 13:53:21.450510
2260 13:53:21.714569 00400000 ################################################################
2261 13:53:21.714704
2262 13:53:21.966452 00480000 ################################################################
2263 13:53:21.966606
2264 13:53:22.216222 00500000 ############################################################### done.
2265 13:53:22.216373
2266 13:53:22.219780 Sending tftp read request... done.
2267 13:53:22.219918
2268 13:53:22.222980 Waiting for the transfer...
2269 13:53:22.223076
2270 13:53:22.223144 00000000 # done.
2271 13:53:22.223208
2272 13:53:22.233279 Command line loaded dynamically from TFTP file: 10607012/tftp-deploy-qulynwdf/kernel/cmdline
2273 13:53:22.233413
2274 13:53:22.256271 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607012/extract-nfsrootfs-d6_bu29w,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 13:53:22.256417
2276 13:53:22.259502 Shutting down all USB controllers.
2277 13:53:22.262621
2278 13:53:22.262763 Removing current net device
2279 13:53:22.262860
2280 13:53:22.265922 Finalizing coreboot
2281 13:53:22.266052
2282 13:53:22.272542 Exiting depthcharge with code 4 at timestamp: 16853044
2283 13:53:22.272673
2284 13:53:22.272745
2285 13:53:22.272830 Starting kernel ...
2286 13:53:22.272893
2287 13:53:22.272951
2288 13:53:22.273333 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2289 13:53:22.273434 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
2290 13:53:22.273520 Setting prompt string to ['Linux version [0-9]']
2291 13:53:22.273592 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 13:53:22.273661 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 13:57:58.273715 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
2296 13:57:58.273921 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
2298 13:57:58.274078 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 13:57:58.274325 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 13:57:58.274572 Cleaning after the job
2304 13:57:58.274664 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/ramdisk
2305 13:57:58.275470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/kernel
2306 13:57:58.276419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/nfsrootfs
2307 13:57:58.330580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607012/tftp-deploy-qulynwdf/modules
2308 13:57:58.331021 start: 5.1 power-off (timeout 00:00:30) [common]
2309 13:57:58.331196 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2310 13:57:58.406729 >> Command sent successfully.
2311 13:57:58.409154 Returned 0 in 0 seconds
2312 13:57:58.509571 end: 5.1 power-off (duration 00:00:00) [common]
2314 13:57:58.509934 start: 5.2 read-feedback (timeout 00:10:00) [common]
2315 13:57:58.510181 Listened to connection for namespace 'common' for up to 1s
2316 13:57:59.511151 Finalising connection for namespace 'common'
2317 13:57:59.511332 Disconnecting from shell: Finalise
2318 13:57:59.511419
2319 13:57:59.611754 end: 5.2 read-feedback (duration 00:00:01) [common]
2320 13:57:59.612001 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607012
2321 13:57:59.872719 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607012
2322 13:57:59.872938 JobError: Your job cannot terminate cleanly.