Boot log: asus-cx9400-volteer

    1 13:52:45.384039  lava-dispatcher, installed at version: 2023.05.1
    2 13:52:45.384262  start: 0 validate
    3 13:52:45.384399  Start time: 2023-06-06 13:52:45.384388+00:00 (UTC)
    4 13:52:45.384536  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:52:45.384670  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230527.0%2Famd64%2Frootfs.cpio.gz exists
    6 13:52:45.682418  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:52:45.682613  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:52:45.968418  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:52:45.968593  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:52:50.109744  validate duration: 4.73
   12 13:52:50.110017  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:52:50.110115  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:52:50.110203  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:52:50.110335  Not decompressing ramdisk as can be used compressed.
   16 13:52:50.110417  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230527.0/amd64/rootfs.cpio.gz
   17 13:52:50.110481  saving as /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/ramdisk/rootfs.cpio.gz
   18 13:52:50.110541  total size: 35744549 (34MB)
   19 13:52:50.688612  progress   0% (0MB)
   20 13:52:50.697989  progress   5% (1MB)
   21 13:52:50.707084  progress  10% (3MB)
   22 13:52:50.715987  progress  15% (5MB)
   23 13:52:50.725184  progress  20% (6MB)
   24 13:52:50.734285  progress  25% (8MB)
   25 13:52:50.743407  progress  30% (10MB)
   26 13:52:50.752355  progress  35% (11MB)
   27 13:52:50.761370  progress  40% (13MB)
   28 13:52:50.770259  progress  45% (15MB)
   29 13:52:50.779280  progress  50% (17MB)
   30 13:52:50.788155  progress  55% (18MB)
   31 13:52:50.797172  progress  60% (20MB)
   32 13:52:50.806193  progress  65% (22MB)
   33 13:52:50.815130  progress  70% (23MB)
   34 13:52:50.824442  progress  75% (25MB)
   35 13:52:50.833537  progress  80% (27MB)
   36 13:52:50.842550  progress  85% (29MB)
   37 13:52:50.851691  progress  90% (30MB)
   38 13:52:50.860887  progress  95% (32MB)
   39 13:52:50.870470  progress 100% (34MB)
   40 13:52:50.870792  34MB downloaded in 0.76s (44.84MB/s)
   41 13:52:50.871017  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 13:52:50.871427  end: 1.1 download-retry (duration 00:00:01) [common]
   44 13:52:50.871551  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 13:52:50.871675  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 13:52:50.871853  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 13:52:50.871959  saving as /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/kernel/bzImage
   48 13:52:50.872057  total size: 7880592 (7MB)
   49 13:52:50.872156  No compression specified
   50 13:52:50.873585  progress   0% (0MB)
   51 13:52:50.875728  progress   5% (0MB)
   52 13:52:50.877806  progress  10% (0MB)
   53 13:52:50.879827  progress  15% (1MB)
   54 13:52:50.881877  progress  20% (1MB)
   55 13:52:50.883913  progress  25% (1MB)
   56 13:52:50.886008  progress  30% (2MB)
   57 13:52:50.888066  progress  35% (2MB)
   58 13:52:50.890142  progress  40% (3MB)
   59 13:52:50.892166  progress  45% (3MB)
   60 13:52:50.894241  progress  50% (3MB)
   61 13:52:50.896239  progress  55% (4MB)
   62 13:52:50.898264  progress  60% (4MB)
   63 13:52:50.900255  progress  65% (4MB)
   64 13:52:50.902286  progress  70% (5MB)
   65 13:52:50.904269  progress  75% (5MB)
   66 13:52:50.906286  progress  80% (6MB)
   67 13:52:50.908298  progress  85% (6MB)
   68 13:52:50.910354  progress  90% (6MB)
   69 13:52:50.912355  progress  95% (7MB)
   70 13:52:50.914394  progress 100% (7MB)
   71 13:52:50.914565  7MB downloaded in 0.04s (176.82MB/s)
   72 13:52:50.914711  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:52:50.914942  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:52:50.915035  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 13:52:50.915122  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 13:52:50.915254  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 13:52:50.915324  saving as /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/modules/modules.tar
   79 13:52:50.915387  total size: 251288 (0MB)
   80 13:52:50.915448  Using unxz to decompress xz
   81 13:52:50.919326  progress  13% (0MB)
   82 13:52:50.919754  progress  26% (0MB)
   83 13:52:50.920004  progress  39% (0MB)
   84 13:52:50.921424  progress  52% (0MB)
   85 13:52:50.923227  progress  65% (0MB)
   86 13:52:50.925262  progress  78% (0MB)
   87 13:52:50.927245  progress  91% (0MB)
   88 13:52:50.929208  progress 100% (0MB)
   89 13:52:50.934991  0MB downloaded in 0.02s (12.23MB/s)
   90 13:52:50.935339  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 13:52:50.935651  end: 1.3 download-retry (duration 00:00:00) [common]
   93 13:52:50.935752  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 13:52:50.935854  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 13:52:50.935937  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 13:52:50.936022  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 13:52:50.936248  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g
   98 13:52:50.936386  makedir: /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin
   99 13:52:50.936497  makedir: /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/tests
  100 13:52:50.936601  makedir: /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/results
  101 13:52:50.936713  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-add-keys
  102 13:52:50.936905  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-add-sources
  103 13:52:50.937035  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-background-process-start
  104 13:52:50.937166  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-background-process-stop
  105 13:52:50.937297  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-common-functions
  106 13:52:50.937423  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-echo-ipv4
  107 13:52:50.937555  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-install-packages
  108 13:52:50.937678  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-installed-packages
  109 13:52:50.937800  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-os-build
  110 13:52:50.937923  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-probe-channel
  111 13:52:50.938045  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-probe-ip
  112 13:52:50.938169  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-target-ip
  113 13:52:50.938290  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-target-mac
  114 13:52:50.938411  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-target-storage
  115 13:52:50.938539  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-case
  116 13:52:50.938663  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-event
  117 13:52:50.938785  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-feedback
  118 13:52:50.938907  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-raise
  119 13:52:50.939039  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-reference
  120 13:52:50.939165  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-runner
  121 13:52:50.939288  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-set
  122 13:52:50.939411  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-test-shell
  123 13:52:50.939546  Updating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-install-packages (oe)
  124 13:52:50.939703  Updating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/bin/lava-installed-packages (oe)
  125 13:52:50.939836  Creating /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/environment
  126 13:52:50.939942  LAVA metadata
  127 13:52:50.940020  - LAVA_JOB_ID=10607010
  128 13:52:50.940088  - LAVA_DISPATCHER_IP=192.168.201.1
  129 13:52:50.940204  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 13:52:50.940275  skipped lava-vland-overlay
  131 13:52:50.940395  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 13:52:50.940500  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 13:52:50.940567  skipped lava-multinode-overlay
  134 13:52:50.940643  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 13:52:50.940728  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 13:52:50.940849  Loading test definitions
  137 13:52:50.940949  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 13:52:50.941026  Using /lava-10607010 at stage 0
  139 13:52:50.941392  uuid=10607010_1.4.2.3.1 testdef=None
  140 13:52:50.941484  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 13:52:50.941572  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 13:52:50.942121  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 13:52:50.942357  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 13:52:50.942982  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 13:52:50.943221  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 13:52:50.943839  runner path: /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/0/tests/0_cros-ec test_uuid 10607010_1.4.2.3.1
  149 13:52:50.944000  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 13:52:50.944264  Creating lava-test-runner.conf files
  152 13:52:50.944331  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607010/lava-overlay-_9jczb5g/lava-10607010/0 for stage 0
  153 13:52:50.944424  - 0_cros-ec
  154 13:52:50.944526  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  155 13:52:50.944617  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  156 13:52:50.951340  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  157 13:52:50.951506  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  158 13:52:50.951610  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  159 13:52:50.951701  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  160 13:52:50.951790  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  161 13:52:51.917557  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  162 13:52:51.917918  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  163 13:52:51.918035  extracting modules file /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607010/extract-overlay-ramdisk-qs083nug/ramdisk
  164 13:52:51.931844  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  165 13:52:51.931997  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  166 13:52:51.932092  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607010/compress-overlay-otfe6pmz/overlay-1.4.2.4.tar.gz to ramdisk
  167 13:52:51.932163  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607010/compress-overlay-otfe6pmz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607010/extract-overlay-ramdisk-qs083nug/ramdisk
  168 13:52:51.939227  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  169 13:52:51.939353  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  170 13:52:51.939445  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  171 13:52:51.939534  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  172 13:52:51.939625  Building ramdisk /var/lib/lava/dispatcher/tmp/10607010/extract-overlay-ramdisk-qs083nug/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607010/extract-overlay-ramdisk-qs083nug/ramdisk
  173 13:52:52.569243  >> 184084 blocks

  174 13:52:56.094312  rename /var/lib/lava/dispatcher/tmp/10607010/extract-overlay-ramdisk-qs083nug/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz
  175 13:52:56.094721  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  176 13:52:56.094845  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  177 13:52:56.094947  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  178 13:52:56.095038  No mkimage arch provided, not using FIT.
  179 13:52:56.095124  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  180 13:52:56.095213  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  181 13:52:56.095319  end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
  182 13:52:56.095407  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  183 13:52:56.095484  No LXC device requested
  184 13:52:56.095570  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  185 13:52:56.095696  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  186 13:52:56.095808  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  187 13:52:56.095898  Checking files for TFTP limit of 4294967296 bytes.
  188 13:52:56.096287  end: 1 tftp-deploy (duration 00:00:06) [common]
  189 13:52:56.096389  start: 2 depthcharge-action (timeout 00:05:00) [common]
  190 13:52:56.096490  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  191 13:52:56.096609  substitutions:
  192 13:52:56.096677  - {DTB}: None
  193 13:52:56.096740  - {INITRD}: 10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz
  194 13:52:56.096824  - {KERNEL}: 10607010/tftp-deploy-nl44_s7a/kernel/bzImage
  195 13:52:56.096900  - {LAVA_MAC}: None
  196 13:52:56.096959  - {PRESEED_CONFIG}: None
  197 13:52:56.097014  - {PRESEED_LOCAL}: None
  198 13:52:56.097070  - {RAMDISK}: 10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz
  199 13:52:56.097125  - {ROOT_PART}: None
  200 13:52:56.097180  - {ROOT}: None
  201 13:52:56.097234  - {SERVER_IP}: 192.168.201.1
  202 13:52:56.097287  - {TEE}: None
  203 13:52:56.097365  Parsed boot commands:
  204 13:52:56.097448  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  205 13:52:56.097655  Parsed boot commands: tftpboot 192.168.201.1 10607010/tftp-deploy-nl44_s7a/kernel/bzImage 10607010/tftp-deploy-nl44_s7a/kernel/cmdline 10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz
  206 13:52:56.097751  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  207 13:52:56.097843  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  208 13:52:56.097937  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  209 13:52:56.098022  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  210 13:52:56.098093  Not connected, no need to disconnect.
  211 13:52:56.098169  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  212 13:52:56.098255  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  213 13:52:56.098322  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
  214 13:52:56.101660  Setting prompt string to ['lava-test: # ']
  215 13:52:56.102096  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  216 13:52:56.102236  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  217 13:52:56.102336  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  218 13:52:56.102433  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  219 13:52:56.102626  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
  220 13:53:01.234480  >> Command sent successfully.

  221 13:53:01.240001  Returned 0 in 5 seconds
  222 13:53:01.340928  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  224 13:53:01.342360  end: 2.2.2 reset-device (duration 00:00:05) [common]
  225 13:53:01.342858  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  226 13:53:01.343303  Setting prompt string to 'Starting depthcharge on Voema...'
  227 13:53:01.343647  Changing prompt to 'Starting depthcharge on Voema...'
  228 13:53:01.343994  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  229 13:53:01.345176  [Enter `^Ec?' for help]

  230 13:53:02.941313  

  231 13:53:02.941900  

  232 13:53:02.951071  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  233 13:53:02.954126  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  234 13:53:02.961039  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  235 13:53:02.964831  CPU: AES supported, TXT NOT supported, VT supported

  236 13:53:02.971428  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  237 13:53:02.974620  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  238 13:53:02.981050  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  239 13:53:02.984584  VBOOT: Loading verstage.

  240 13:53:02.988195  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  241 13:53:02.994294  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  242 13:53:02.997733  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  243 13:53:03.008272  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  244 13:53:03.014682  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  245 13:53:03.015138  

  246 13:53:03.015586  

  247 13:53:03.028242  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  248 13:53:03.041624  Probing TPM: . done!

  249 13:53:03.045085  TPM ready after 0 ms

  250 13:53:03.048600  Connected to device vid:did:rid of 1ae0:0028:00

  251 13:53:03.060044  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  252 13:53:03.066414  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  253 13:53:03.069856  Initialized TPM device CR50 revision 0

  254 13:53:03.162512  tlcl_send_startup: Startup return code is 0

  255 13:53:03.162851  TPM: setup succeeded

  256 13:53:03.178094  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  257 13:53:03.192540  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  258 13:53:03.205546  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  259 13:53:03.214991  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  260 13:53:03.218897  Chrome EC: UHEPI supported

  261 13:53:03.222452  Phase 1

  262 13:53:03.225534  FMAP: area GBB found @ 1805000 (458752 bytes)

  263 13:53:03.235302  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  264 13:53:03.242213  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  265 13:53:03.249171  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  266 13:53:03.255550  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  267 13:53:03.259082  Recovery requested (1009000e)

  268 13:53:03.262463  TPM: Extending digest for VBOOT: boot mode into PCR 0

  269 13:53:03.273935  tlcl_extend: response is 0

  270 13:53:03.280741  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  271 13:53:03.290468  tlcl_extend: response is 0

  272 13:53:03.297106  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  273 13:53:03.303736  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  274 13:53:03.310562  BS: verstage times (exec / console): total (unknown) / 142 ms

  275 13:53:03.311048  

  276 13:53:03.311465  

  277 13:53:03.323428  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  278 13:53:03.327050  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  279 13:53:03.334146  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  280 13:53:03.337564  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  281 13:53:03.340936  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  282 13:53:03.347360  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  283 13:53:03.350812  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  284 13:53:03.354113  TCO_STS:   0000 0000

  285 13:53:03.357611  GEN_PMCON: d0015038 00002200

  286 13:53:03.357717  GBLRST_CAUSE: 00000000 00000000

  287 13:53:03.361069  HPR_CAUSE0: 00000000

  288 13:53:03.364094  prev_sleep_state 5

  289 13:53:03.367633  Boot Count incremented to 22961

  290 13:53:03.373958  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  291 13:53:03.381629  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  292 13:53:03.388533  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  293 13:53:03.395616  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  294 13:53:03.398989  Chrome EC: UHEPI supported

  295 13:53:03.405480  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  296 13:53:03.417066  Probing TPM:  done!

  297 13:53:03.423710  Connected to device vid:did:rid of 1ae0:0028:00

  298 13:53:03.433636  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  299 13:53:03.437510  Initialized TPM device CR50 revision 0

  300 13:53:03.452133  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  301 13:53:03.458817  MRC: Hash idx 0x100b comparison successful.

  302 13:53:03.462007  MRC cache found, size faa8

  303 13:53:03.462143  bootmode is set to: 2

  304 13:53:03.465343  SPD index = 0

  305 13:53:03.472206  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  306 13:53:03.475472  SPD: module type is LPDDR4X

  307 13:53:03.478778  SPD: module part number is MT53E512M64D4NW-046

  308 13:53:03.485290  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  309 13:53:03.488617  SPD: device width 16 bits, bus width 16 bits

  310 13:53:03.495577  SPD: module size is 1024 MB (per channel)

  311 13:53:03.927268  CBMEM:

  312 13:53:03.930996  IMD: root @ 0x76fff000 254 entries.

  313 13:53:03.934319  IMD: root @ 0x76ffec00 62 entries.

  314 13:53:03.937533  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  315 13:53:03.944493  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  316 13:53:03.947442  External stage cache:

  317 13:53:03.950829  IMD: root @ 0x7b3ff000 254 entries.

  318 13:53:03.954037  IMD: root @ 0x7b3fec00 62 entries.

  319 13:53:03.969425  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  320 13:53:03.976006  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  321 13:53:03.982736  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  322 13:53:03.996886  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  323 13:53:04.003416  cse_lite: Skip switching to RW in the recovery path

  324 13:53:04.003902  8 DIMMs found

  325 13:53:04.004264  SMM Memory Map

  326 13:53:04.006766  SMRAM       : 0x7b000000 0x800000

  327 13:53:04.010062   Subregion 0: 0x7b000000 0x200000

  328 13:53:04.017026   Subregion 1: 0x7b200000 0x200000

  329 13:53:04.019943   Subregion 2: 0x7b400000 0x400000

  330 13:53:04.020434  top_of_ram = 0x77000000

  331 13:53:04.027009  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  332 13:53:04.033636  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  333 13:53:04.036862  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  334 13:53:04.043627  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  335 13:53:04.050207  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  336 13:53:04.056589  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  337 13:53:04.066902  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  338 13:53:04.070183  Processing 211 relocs. Offset value of 0x74c0b000

  339 13:53:04.079379  BS: romstage times (exec / console): total (unknown) / 277 ms

  340 13:53:04.085415  

  341 13:53:04.085614  

  342 13:53:04.095288  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  343 13:53:04.098976  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  344 13:53:04.108688  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  345 13:53:04.115422  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  346 13:53:04.122122  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  347 13:53:04.128799  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  348 13:53:04.175607  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  349 13:53:04.182430  Processing 5008 relocs. Offset value of 0x75d98000

  350 13:53:04.185858  BS: postcar times (exec / console): total (unknown) / 59 ms

  351 13:53:04.186141  

  352 13:53:04.189228  

  353 13:53:04.199405  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  354 13:53:04.199773  Normal boot

  355 13:53:04.202506  FW_CONFIG value is 0x804c02

  356 13:53:04.206032  PCI: 00:07.0 disabled by fw_config

  357 13:53:04.209312  PCI: 00:07.1 disabled by fw_config

  358 13:53:04.212641  PCI: 00:0d.2 disabled by fw_config

  359 13:53:04.216070  PCI: 00:1c.7 disabled by fw_config

  360 13:53:04.222452  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  361 13:53:04.229338  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  362 13:53:04.232722  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  363 13:53:04.236352  GENERIC: 0.0 disabled by fw_config

  364 13:53:04.239607  GENERIC: 1.0 disabled by fw_config

  365 13:53:04.245735  fw_config match found: DB_USB=USB3_ACTIVE

  366 13:53:04.249440  fw_config match found: DB_USB=USB3_ACTIVE

  367 13:53:04.252674  fw_config match found: DB_USB=USB3_ACTIVE

  368 13:53:04.255821  fw_config match found: DB_USB=USB3_ACTIVE

  369 13:53:04.262446  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  370 13:53:04.269267  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  371 13:53:04.275676  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  372 13:53:04.285827  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  373 13:53:04.288878  microcode: sig=0x806c1 pf=0x80 revision=0x86

  374 13:53:04.295716  microcode: Update skipped, already up-to-date

  375 13:53:04.302259  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  376 13:53:04.329109  Detected 4 core, 8 thread CPU.

  377 13:53:04.332412  Setting up SMI for CPU

  378 13:53:04.335799  IED base = 0x7b400000

  379 13:53:04.336164  IED size = 0x00400000

  380 13:53:04.339082  Will perform SMM setup.

  381 13:53:04.346403  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  382 13:53:04.352934  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  383 13:53:04.359354  Processing 16 relocs. Offset value of 0x00030000

  384 13:53:04.362709  Attempting to start 7 APs

  385 13:53:04.365941  Waiting for 10ms after sending INIT.

  386 13:53:04.381609  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  387 13:53:04.384501  AP: slot 6 apic_id 2.

  388 13:53:04.388294  AP: slot 2 apic_id 3.

  389 13:53:04.388843  AP: slot 3 apic_id 7.

  390 13:53:04.391372  AP: slot 7 apic_id 6.

  391 13:53:04.394855  AP: slot 5 apic_id 4.

  392 13:53:04.395297  AP: slot 4 apic_id 5.

  393 13:53:04.395649  done.

  394 13:53:04.401623  Waiting for 2nd SIPI to complete...done.

  395 13:53:04.408397  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  396 13:53:04.415223  Processing 13 relocs. Offset value of 0x00038000

  397 13:53:04.415684  Unable to locate Global NVS

  398 13:53:04.424917  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  399 13:53:04.428415  Installing permanent SMM handler to 0x7b000000

  400 13:53:04.435109  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  401 13:53:04.441392  Processing 794 relocs. Offset value of 0x7b010000

  402 13:53:04.447967  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  403 13:53:04.454647  Processing 13 relocs. Offset value of 0x7b008000

  404 13:53:04.461128  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  405 13:53:04.467672  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  406 13:53:04.470840  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  407 13:53:04.477479  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  408 13:53:04.484089  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  409 13:53:04.490669  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  410 13:53:04.497308  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  411 13:53:04.497405  Unable to locate Global NVS

  412 13:53:04.507578  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  413 13:53:04.510723  Clearing SMI status registers

  414 13:53:04.510809  SMI_STS: PM1 

  415 13:53:04.513830  PM1_STS: PWRBTN 

  416 13:53:04.520900  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  417 13:53:04.523930  In relocation handler: CPU 0

  418 13:53:04.527519  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  419 13:53:04.534143  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  420 13:53:04.534229  Relocation complete.

  421 13:53:04.540708  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  422 13:53:04.543789  In relocation handler: CPU 1

  423 13:53:04.550809  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  424 13:53:04.550897  Relocation complete.

  425 13:53:04.557228  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  426 13:53:04.560392  In relocation handler: CPU 3

  427 13:53:04.567069  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  428 13:53:04.567160  Relocation complete.

  429 13:53:04.573744  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  430 13:53:04.577073  In relocation handler: CPU 7

  431 13:53:04.580599  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  432 13:53:04.587150  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  433 13:53:04.590758  Relocation complete.

  434 13:53:04.597176  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  435 13:53:04.600658  In relocation handler: CPU 4

  436 13:53:04.603782  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  437 13:53:04.606948  Relocation complete.

  438 13:53:04.613640  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  439 13:53:04.617059  In relocation handler: CPU 5

  440 13:53:04.620891  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  441 13:53:04.625432  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  442 13:53:04.629094  Relocation complete.

  443 13:53:04.635916  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  444 13:53:04.638999  In relocation handler: CPU 6

  445 13:53:04.642453  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  446 13:53:04.645673  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  447 13:53:04.648704  Relocation complete.

  448 13:53:04.655740  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  449 13:53:04.659082  In relocation handler: CPU 2

  450 13:53:04.662350  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  451 13:53:04.665584  Relocation complete.

  452 13:53:04.665689  Initializing CPU #0

  453 13:53:04.669162  CPU: vendor Intel device 806c1

  454 13:53:04.675857  CPU: family 06, model 8c, stepping 01

  455 13:53:04.675970  Clearing out pending MCEs

  456 13:53:04.678969  Setting up local APIC...

  457 13:53:04.682226   apic_id: 0x00 done.

  458 13:53:04.685895  Turbo is available but hidden

  459 13:53:04.689255  Turbo is available and visible

  460 13:53:04.692556  microcode: Update skipped, already up-to-date

  461 13:53:04.695671  CPU #0 initialized

  462 13:53:04.695783  Initializing CPU #5

  463 13:53:04.699210  Initializing CPU #4

  464 13:53:04.702344  Initializing CPU #1

  465 13:53:04.702483  Initializing CPU #2

  466 13:53:04.705853  CPU: vendor Intel device 806c1

  467 13:53:04.709381  CPU: family 06, model 8c, stepping 01

  468 13:53:04.712309  CPU: vendor Intel device 806c1

  469 13:53:04.715667  CPU: family 06, model 8c, stepping 01

  470 13:53:04.718995  Clearing out pending MCEs

  471 13:53:04.722280  CPU: vendor Intel device 806c1

  472 13:53:04.725967  CPU: family 06, model 8c, stepping 01

  473 13:53:04.729152  Initializing CPU #6

  474 13:53:04.732299  Clearing out pending MCEs

  475 13:53:04.732410  Clearing out pending MCEs

  476 13:53:04.735999  Setting up local APIC...

  477 13:53:04.739384  Initializing CPU #7

  478 13:53:04.739484  Initializing CPU #3

  479 13:53:04.742919  CPU: vendor Intel device 806c1

  480 13:53:04.745802  CPU: family 06, model 8c, stepping 01

  481 13:53:04.748996  CPU: vendor Intel device 806c1

  482 13:53:04.755719  CPU: family 06, model 8c, stepping 01

  483 13:53:04.755867  Clearing out pending MCEs

  484 13:53:04.759140  Clearing out pending MCEs

  485 13:53:04.762476  Setting up local APIC...

  486 13:53:04.765777  Setting up local APIC...

  487 13:53:04.768985  CPU: vendor Intel device 806c1

  488 13:53:04.772114  CPU: family 06, model 8c, stepping 01

  489 13:53:04.775514  CPU: vendor Intel device 806c1

  490 13:53:04.778645  CPU: family 06, model 8c, stepping 01

  491 13:53:04.778769   apic_id: 0x03 done.

  492 13:53:04.782252  Clearing out pending MCEs

  493 13:53:04.788649  microcode: Update skipped, already up-to-date

  494 13:53:04.788783  Setting up local APIC...

  495 13:53:04.792105  Setting up local APIC...

  496 13:53:04.795746   apic_id: 0x05 done.

  497 13:53:04.795838   apic_id: 0x04 done.

  498 13:53:04.802114  microcode: Update skipped, already up-to-date

  499 13:53:04.805605  microcode: Update skipped, already up-to-date

  500 13:53:04.808721  CPU #4 initialized

  501 13:53:04.808850  CPU #5 initialized

  502 13:53:04.812325   apic_id: 0x06 done.

  503 13:53:04.815409  Setting up local APIC...

  504 13:53:04.815508  CPU #2 initialized

  505 13:53:04.818627   apic_id: 0x02 done.

  506 13:53:04.822096  Clearing out pending MCEs

  507 13:53:04.822185   apic_id: 0x07 done.

  508 13:53:04.828611  microcode: Update skipped, already up-to-date

  509 13:53:04.832183  microcode: Update skipped, already up-to-date

  510 13:53:04.835401  CPU #7 initialized

  511 13:53:04.835490  CPU #3 initialized

  512 13:53:04.842145  microcode: Update skipped, already up-to-date

  513 13:53:04.845554  Setting up local APIC...

  514 13:53:04.845647  CPU #6 initialized

  515 13:53:04.848710   apic_id: 0x01 done.

  516 13:53:04.852100  microcode: Update skipped, already up-to-date

  517 13:53:04.855792  CPU #1 initialized

  518 13:53:04.858923  bsp_do_flight_plan done after 455 msecs.

  519 13:53:04.862026  CPU: frequency set to 4000 MHz

  520 13:53:04.862113  Enabling SMIs.

  521 13:53:04.868934  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  522 13:53:04.886158  SATAXPCIE1 indicates PCIe NVMe is present

  523 13:53:04.889754  Probing TPM:  done!

  524 13:53:04.892815  Connected to device vid:did:rid of 1ae0:0028:00

  525 13:53:04.903659  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  526 13:53:04.906760  Initialized TPM device CR50 revision 0

  527 13:53:04.910310  Enabling S0i3.4

  528 13:53:04.917064  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  529 13:53:04.920125  Found a VBT of 8704 bytes after decompression

  530 13:53:04.927140  cse_lite: CSE RO boot. HybridStorageMode disabled

  531 13:53:04.933637  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  532 13:53:05.009570  FSPS returned 0

  533 13:53:05.012444  Executing Phase 1 of FspMultiPhaseSiInit

  534 13:53:05.022567  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  535 13:53:05.025639  port C0 DISC req: usage 1 usb3 1 usb2 5

  536 13:53:05.028964  Raw Buffer output 0 00000511

  537 13:53:05.032103  Raw Buffer output 1 00000000

  538 13:53:05.035894  pmc_send_ipc_cmd succeeded

  539 13:53:05.042858  port C1 DISC req: usage 1 usb3 2 usb2 3

  540 13:53:05.042948  Raw Buffer output 0 00000321

  541 13:53:05.045957  Raw Buffer output 1 00000000

  542 13:53:05.050176  pmc_send_ipc_cmd succeeded

  543 13:53:05.055575  Detected 4 core, 8 thread CPU.

  544 13:53:05.058763  Detected 4 core, 8 thread CPU.

  545 13:53:05.292528  Display FSP Version Info HOB

  546 13:53:05.295840  Reference Code - CPU = a.0.4c.31

  547 13:53:05.299188  uCode Version = 0.0.0.86

  548 13:53:05.302336  TXT ACM version = ff.ff.ff.ffff

  549 13:53:05.305730  Reference Code - ME = a.0.4c.31

  550 13:53:05.309311  MEBx version = 0.0.0.0

  551 13:53:05.312475  ME Firmware Version = Consumer SKU

  552 13:53:05.315664  Reference Code - PCH = a.0.4c.31

  553 13:53:05.319431  PCH-CRID Status = Disabled

  554 13:53:05.322402  PCH-CRID Original Value = ff.ff.ff.ffff

  555 13:53:05.326061  PCH-CRID New Value = ff.ff.ff.ffff

  556 13:53:05.329036  OPROM - RST - RAID = ff.ff.ff.ffff

  557 13:53:05.332455  PCH Hsio Version = 4.0.0.0

  558 13:53:05.335984  Reference Code - SA - System Agent = a.0.4c.31

  559 13:53:05.339007  Reference Code - MRC = 2.0.0.1

  560 13:53:05.342603  SA - PCIe Version = a.0.4c.31

  561 13:53:05.345859  SA-CRID Status = Disabled

  562 13:53:05.349054  SA-CRID Original Value = 0.0.0.1

  563 13:53:05.352241  SA-CRID New Value = 0.0.0.1

  564 13:53:05.355714  OPROM - VBIOS = ff.ff.ff.ffff

  565 13:53:05.359198  IO Manageability Engine FW Version = 11.1.4.0

  566 13:53:05.362442  PHY Build Version = 0.0.0.e0

  567 13:53:05.365735  Thunderbolt(TM) FW Version = 0.0.0.0

  568 13:53:05.372285  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  569 13:53:05.375526  ITSS IRQ Polarities Before:

  570 13:53:05.375691  IPC0: 0xffffffff

  571 13:53:05.379188  IPC1: 0xffffffff

  572 13:53:05.379351  IPC2: 0xffffffff

  573 13:53:05.382286  IPC3: 0xffffffff

  574 13:53:05.385630  ITSS IRQ Polarities After:

  575 13:53:05.385805  IPC0: 0xffffffff

  576 13:53:05.389269  IPC1: 0xffffffff

  577 13:53:05.389432  IPC2: 0xffffffff

  578 13:53:05.392511  IPC3: 0xffffffff

  579 13:53:05.395770  Found PCIe Root Port #9 at PCI: 00:1d.0.

  580 13:53:05.409101  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  581 13:53:05.419222  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  582 13:53:05.432687  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  583 13:53:05.439276  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  584 13:53:05.439504  Enumerating buses...

  585 13:53:05.445622  Show all devs... Before device enumeration.

  586 13:53:05.445828  Root Device: enabled 1

  587 13:53:05.449260  DOMAIN: 0000: enabled 1

  588 13:53:05.452317  CPU_CLUSTER: 0: enabled 1

  589 13:53:05.455590  PCI: 00:00.0: enabled 1

  590 13:53:05.455679  PCI: 00:02.0: enabled 1

  591 13:53:05.459045  PCI: 00:04.0: enabled 1

  592 13:53:05.462451  PCI: 00:05.0: enabled 1

  593 13:53:05.465740  PCI: 00:06.0: enabled 0

  594 13:53:05.465832  PCI: 00:07.0: enabled 0

  595 13:53:05.469170  PCI: 00:07.1: enabled 0

  596 13:53:05.472646  PCI: 00:07.2: enabled 0

  597 13:53:05.472754  PCI: 00:07.3: enabled 0

  598 13:53:05.475790  PCI: 00:08.0: enabled 1

  599 13:53:05.479411  PCI: 00:09.0: enabled 0

  600 13:53:05.482593  PCI: 00:0a.0: enabled 0

  601 13:53:05.482689  PCI: 00:0d.0: enabled 1

  602 13:53:05.485795  PCI: 00:0d.1: enabled 0

  603 13:53:05.489217  PCI: 00:0d.2: enabled 0

  604 13:53:05.492490  PCI: 00:0d.3: enabled 0

  605 13:53:05.492611  PCI: 00:0e.0: enabled 0

  606 13:53:05.495661  PCI: 00:10.2: enabled 1

  607 13:53:05.498961  PCI: 00:10.6: enabled 0

  608 13:53:05.502619  PCI: 00:10.7: enabled 0

  609 13:53:05.502705  PCI: 00:12.0: enabled 0

  610 13:53:05.505718  PCI: 00:12.6: enabled 0

  611 13:53:05.509052  PCI: 00:13.0: enabled 0

  612 13:53:05.509147  PCI: 00:14.0: enabled 1

  613 13:53:05.512738  PCI: 00:14.1: enabled 0

  614 13:53:05.515791  PCI: 00:14.2: enabled 1

  615 13:53:05.519415  PCI: 00:14.3: enabled 1

  616 13:53:05.519500  PCI: 00:15.0: enabled 1

  617 13:53:05.522591  PCI: 00:15.1: enabled 1

  618 13:53:05.525808  PCI: 00:15.2: enabled 1

  619 13:53:05.529457  PCI: 00:15.3: enabled 1

  620 13:53:05.529541  PCI: 00:16.0: enabled 1

  621 13:53:05.532392  PCI: 00:16.1: enabled 0

  622 13:53:05.536071  PCI: 00:16.2: enabled 0

  623 13:53:05.536163  PCI: 00:16.3: enabled 0

  624 13:53:05.539514  PCI: 00:16.4: enabled 0

  625 13:53:05.542736  PCI: 00:16.5: enabled 0

  626 13:53:05.546493  PCI: 00:17.0: enabled 1

  627 13:53:05.546662  PCI: 00:19.0: enabled 0

  628 13:53:05.549290  PCI: 00:19.1: enabled 1

  629 13:53:05.552800  PCI: 00:19.2: enabled 0

  630 13:53:05.556073  PCI: 00:1c.0: enabled 1

  631 13:53:05.556231  PCI: 00:1c.1: enabled 0

  632 13:53:05.559704  PCI: 00:1c.2: enabled 0

  633 13:53:05.562801  PCI: 00:1c.3: enabled 0

  634 13:53:05.566832  PCI: 00:1c.4: enabled 0

  635 13:53:05.567002  PCI: 00:1c.5: enabled 0

  636 13:53:05.569323  PCI: 00:1c.6: enabled 1

  637 13:53:05.572574  PCI: 00:1c.7: enabled 0

  638 13:53:05.575999  PCI: 00:1d.0: enabled 1

  639 13:53:05.576136  PCI: 00:1d.1: enabled 0

  640 13:53:05.579257  PCI: 00:1d.2: enabled 1

  641 13:53:05.582399  PCI: 00:1d.3: enabled 0

  642 13:53:05.582498  PCI: 00:1e.0: enabled 1

  643 13:53:05.585979  PCI: 00:1e.1: enabled 0

  644 13:53:05.589543  PCI: 00:1e.2: enabled 1

  645 13:53:05.592952  PCI: 00:1e.3: enabled 1

  646 13:53:05.593143  PCI: 00:1f.0: enabled 1

  647 13:53:05.596321  PCI: 00:1f.1: enabled 0

  648 13:53:05.599528  PCI: 00:1f.2: enabled 1

  649 13:53:05.602748  PCI: 00:1f.3: enabled 1

  650 13:53:05.602944  PCI: 00:1f.4: enabled 0

  651 13:53:05.605989  PCI: 00:1f.5: enabled 1

  652 13:53:05.609750  PCI: 00:1f.6: enabled 0

  653 13:53:05.613024  PCI: 00:1f.7: enabled 0

  654 13:53:05.613248  APIC: 00: enabled 1

  655 13:53:05.616029  GENERIC: 0.0: enabled 1

  656 13:53:05.619479  GENERIC: 0.0: enabled 1

  657 13:53:05.619721  GENERIC: 1.0: enabled 1

  658 13:53:05.622684  GENERIC: 0.0: enabled 1

  659 13:53:05.626112  GENERIC: 1.0: enabled 1

  660 13:53:05.629155  USB0 port 0: enabled 1

  661 13:53:05.629450  GENERIC: 0.0: enabled 1

  662 13:53:05.632363  USB0 port 0: enabled 1

  663 13:53:05.635916  GENERIC: 0.0: enabled 1

  664 13:53:05.636250  I2C: 00:1a: enabled 1

  665 13:53:05.639301  I2C: 00:31: enabled 1

  666 13:53:05.642777  I2C: 00:32: enabled 1

  667 13:53:05.643281  I2C: 00:10: enabled 1

  668 13:53:05.645762  I2C: 00:15: enabled 1

  669 13:53:05.649438  GENERIC: 0.0: enabled 0

  670 13:53:05.652810  GENERIC: 1.0: enabled 0

  671 13:53:05.653351  GENERIC: 0.0: enabled 1

  672 13:53:05.656124  SPI: 00: enabled 1

  673 13:53:05.659302  SPI: 00: enabled 1

  674 13:53:05.659739  PNP: 0c09.0: enabled 1

  675 13:53:05.662340  GENERIC: 0.0: enabled 1

  676 13:53:05.666241  USB3 port 0: enabled 1

  677 13:53:05.666791  USB3 port 1: enabled 1

  678 13:53:05.669072  USB3 port 2: enabled 0

  679 13:53:05.672295  USB3 port 3: enabled 0

  680 13:53:05.675813  USB2 port 0: enabled 0

  681 13:53:05.676350  USB2 port 1: enabled 1

  682 13:53:05.679110  USB2 port 2: enabled 1

  683 13:53:05.682440  USB2 port 3: enabled 0

  684 13:53:05.682896  USB2 port 4: enabled 1

  685 13:53:05.685667  USB2 port 5: enabled 0

  686 13:53:05.689363  USB2 port 6: enabled 0

  687 13:53:05.689856  USB2 port 7: enabled 0

  688 13:53:05.692142  USB2 port 8: enabled 0

  689 13:53:05.695947  USB2 port 9: enabled 0

  690 13:53:05.699122  USB3 port 0: enabled 0

  691 13:53:05.699704  USB3 port 1: enabled 1

  692 13:53:05.703065  USB3 port 2: enabled 0

  693 13:53:05.706196  USB3 port 3: enabled 0

  694 13:53:05.706730  GENERIC: 0.0: enabled 1

  695 13:53:05.709217  GENERIC: 1.0: enabled 1

  696 13:53:05.712866  APIC: 01: enabled 1

  697 13:53:05.713406  APIC: 03: enabled 1

  698 13:53:05.716010  APIC: 07: enabled 1

  699 13:53:05.719704  APIC: 05: enabled 1

  700 13:53:05.720261  APIC: 04: enabled 1

  701 13:53:05.722872  APIC: 02: enabled 1

  702 13:53:05.723524  APIC: 06: enabled 1

  703 13:53:05.726233  Compare with tree...

  704 13:53:05.729280  Root Device: enabled 1

  705 13:53:05.729718   DOMAIN: 0000: enabled 1

  706 13:53:05.732351    PCI: 00:00.0: enabled 1

  707 13:53:05.735839    PCI: 00:02.0: enabled 1

  708 13:53:05.739482    PCI: 00:04.0: enabled 1

  709 13:53:05.742933     GENERIC: 0.0: enabled 1

  710 13:53:05.743470    PCI: 00:05.0: enabled 1

  711 13:53:05.746810    PCI: 00:06.0: enabled 0

  712 13:53:05.749644    PCI: 00:07.0: enabled 0

  713 13:53:05.753641     GENERIC: 0.0: enabled 1

  714 13:53:05.756277    PCI: 00:07.1: enabled 0

  715 13:53:05.756916     GENERIC: 1.0: enabled 1

  716 13:53:05.759519    PCI: 00:07.2: enabled 0

  717 13:53:05.762713     GENERIC: 0.0: enabled 1

  718 13:53:05.766334    PCI: 00:07.3: enabled 0

  719 13:53:05.769557     GENERIC: 1.0: enabled 1

  720 13:53:05.770036    PCI: 00:08.0: enabled 1

  721 13:53:05.772835    PCI: 00:09.0: enabled 0

  722 13:53:05.776555    PCI: 00:0a.0: enabled 0

  723 13:53:05.779775    PCI: 00:0d.0: enabled 1

  724 13:53:05.783265     USB0 port 0: enabled 1

  725 13:53:05.783818      USB3 port 0: enabled 1

  726 13:53:05.786392      USB3 port 1: enabled 1

  727 13:53:05.789504      USB3 port 2: enabled 0

  728 13:53:05.792984      USB3 port 3: enabled 0

  729 13:53:05.795984    PCI: 00:0d.1: enabled 0

  730 13:53:05.796424    PCI: 00:0d.2: enabled 0

  731 13:53:05.799487     GENERIC: 0.0: enabled 1

  732 13:53:05.802974    PCI: 00:0d.3: enabled 0

  733 13:53:05.806530    PCI: 00:0e.0: enabled 0

  734 13:53:05.809484    PCI: 00:10.2: enabled 1

  735 13:53:05.809926    PCI: 00:10.6: enabled 0

  736 13:53:05.812995    PCI: 00:10.7: enabled 0

  737 13:53:05.816001    PCI: 00:12.0: enabled 0

  738 13:53:05.819738    PCI: 00:12.6: enabled 0

  739 13:53:05.822792    PCI: 00:13.0: enabled 0

  740 13:53:05.823315    PCI: 00:14.0: enabled 1

  741 13:53:05.826059     USB0 port 0: enabled 1

  742 13:53:05.829335      USB2 port 0: enabled 0

  743 13:53:05.832988      USB2 port 1: enabled 1

  744 13:53:05.836451      USB2 port 2: enabled 1

  745 13:53:05.836923      USB2 port 3: enabled 0

  746 13:53:05.839674      USB2 port 4: enabled 1

  747 13:53:05.843096      USB2 port 5: enabled 0

  748 13:53:05.846569      USB2 port 6: enabled 0

  749 13:53:05.849335      USB2 port 7: enabled 0

  750 13:53:05.853163      USB2 port 8: enabled 0

  751 13:53:05.853676      USB2 port 9: enabled 0

  752 13:53:05.855978      USB3 port 0: enabled 0

  753 13:53:05.859814      USB3 port 1: enabled 1

  754 13:53:05.863236      USB3 port 2: enabled 0

  755 13:53:05.867282      USB3 port 3: enabled 0

  756 13:53:05.867846    PCI: 00:14.1: enabled 0

  757 13:53:05.871079    PCI: 00:14.2: enabled 1

  758 13:53:05.874225    PCI: 00:14.3: enabled 1

  759 13:53:05.874665     GENERIC: 0.0: enabled 1

  760 13:53:05.877810    PCI: 00:15.0: enabled 1

  761 13:53:05.881090     I2C: 00:1a: enabled 1

  762 13:53:05.884491     I2C: 00:31: enabled 1

  763 13:53:05.884963     I2C: 00:32: enabled 1

  764 13:53:05.887812    PCI: 00:15.1: enabled 1

  765 13:53:05.891113     I2C: 00:10: enabled 1

  766 13:53:05.894354    PCI: 00:15.2: enabled 1

  767 13:53:05.898152    PCI: 00:15.3: enabled 1

  768 13:53:05.898694    PCI: 00:16.0: enabled 1

  769 13:53:05.901694    PCI: 00:16.1: enabled 0

  770 13:53:05.904509    PCI: 00:16.2: enabled 0

  771 13:53:05.907855    PCI: 00:16.3: enabled 0

  772 13:53:05.957151    PCI: 00:16.4: enabled 0

  773 13:53:05.957244    PCI: 00:16.5: enabled 0

  774 13:53:05.957319    PCI: 00:17.0: enabled 1

  775 13:53:05.957565    PCI: 00:19.0: enabled 0

  776 13:53:05.957639    PCI: 00:19.1: enabled 1

  777 13:53:05.957712     I2C: 00:15: enabled 1

  778 13:53:05.957782    PCI: 00:19.2: enabled 0

  779 13:53:05.957864    PCI: 00:1d.0: enabled 1

  780 13:53:05.957964     GENERIC: 0.0: enabled 1

  781 13:53:05.958055    PCI: 00:1e.0: enabled 1

  782 13:53:05.958143    PCI: 00:1e.1: enabled 0

  783 13:53:05.958228    PCI: 00:1e.2: enabled 1

  784 13:53:05.958319     SPI: 00: enabled 1

  785 13:53:05.958406    PCI: 00:1e.3: enabled 1

  786 13:53:05.958491     SPI: 00: enabled 1

  787 13:53:05.958581    PCI: 00:1f.0: enabled 1

  788 13:53:05.958640     PNP: 0c09.0: enabled 1

  789 13:53:05.958883    PCI: 00:1f.1: enabled 0

  790 13:53:05.958944    PCI: 00:1f.2: enabled 1

  791 13:53:05.959001     GENERIC: 0.0: enabled 1

  792 13:53:06.008880      GENERIC: 0.0: enabled 1

  793 13:53:06.009052      GENERIC: 1.0: enabled 1

  794 13:53:06.009130    PCI: 00:1f.3: enabled 1

  795 13:53:06.009210    PCI: 00:1f.4: enabled 0

  796 13:53:06.009471    PCI: 00:1f.5: enabled 1

  797 13:53:06.009547    PCI: 00:1f.6: enabled 0

  798 13:53:06.009624    PCI: 00:1f.7: enabled 0

  799 13:53:06.009697   CPU_CLUSTER: 0: enabled 1

  800 13:53:06.009762    APIC: 00: enabled 1

  801 13:53:06.009828    APIC: 01: enabled 1

  802 13:53:06.009894    APIC: 03: enabled 1

  803 13:53:06.009957    APIC: 07: enabled 1

  804 13:53:06.010042    APIC: 05: enabled 1

  805 13:53:06.010115    APIC: 04: enabled 1

  806 13:53:06.010179    APIC: 02: enabled 1

  807 13:53:06.010275    APIC: 06: enabled 1

  808 13:53:06.010346  Root Device scanning...

  809 13:53:06.010415  scan_static_bus for Root Device

  810 13:53:06.010483  DOMAIN: 0000 enabled

  811 13:53:06.010552  CPU_CLUSTER: 0 enabled

  812 13:53:06.034103  DOMAIN: 0000 scanning...

  813 13:53:06.034258  PCI: pci_scan_bus for bus 00

  814 13:53:06.034604  PCI: 00:00.0 [8086/0000] ops

  815 13:53:06.034736  PCI: 00:00.0 [8086/9a12] enabled

  816 13:53:06.034872  PCI: 00:02.0 [8086/0000] bus ops

  817 13:53:06.034987  PCI: 00:02.0 [8086/9a40] enabled

  818 13:53:06.037589  PCI: 00:04.0 [8086/0000] bus ops

  819 13:53:06.037766  PCI: 00:04.0 [8086/9a03] enabled

  820 13:53:06.040795  PCI: 00:05.0 [8086/9a19] enabled

  821 13:53:06.041020  PCI: 00:07.0 [0000/0000] hidden

  822 13:53:06.044523  PCI: 00:08.0 [8086/9a11] enabled

  823 13:53:06.047771  PCI: 00:0a.0 [8086/9a0d] disabled

  824 13:53:06.050980  PCI: 00:0d.0 [8086/0000] bus ops

  825 13:53:06.054576  PCI: 00:0d.0 [8086/9a13] enabled

  826 13:53:06.058052  PCI: 00:14.0 [8086/0000] bus ops

  827 13:53:06.061216  PCI: 00:14.0 [8086/a0ed] enabled

  828 13:53:06.064900  PCI: 00:14.2 [8086/a0ef] enabled

  829 13:53:06.068088  PCI: 00:14.3 [8086/0000] bus ops

  830 13:53:06.071204  PCI: 00:14.3 [8086/a0f0] enabled

  831 13:53:06.074855  PCI: 00:15.0 [8086/0000] bus ops

  832 13:53:06.078345  PCI: 00:15.0 [8086/a0e8] enabled

  833 13:53:06.081360  PCI: 00:15.1 [8086/0000] bus ops

  834 13:53:06.084525  PCI: 00:15.1 [8086/a0e9] enabled

  835 13:53:06.088258  PCI: 00:15.2 [8086/0000] bus ops

  836 13:53:06.091226  PCI: 00:15.2 [8086/a0ea] enabled

  837 13:53:06.094503  PCI: 00:15.3 [8086/0000] bus ops

  838 13:53:06.097938  PCI: 00:15.3 [8086/a0eb] enabled

  839 13:53:06.101181  PCI: 00:16.0 [8086/0000] ops

  840 13:53:06.104440  PCI: 00:16.0 [8086/a0e0] enabled

  841 13:53:06.111158  PCI: Static device PCI: 00:17.0 not found, disabling it.

  842 13:53:06.114440  PCI: 00:19.0 [8086/0000] bus ops

  843 13:53:06.117989  PCI: 00:19.0 [8086/a0c5] disabled

  844 13:53:06.121194  PCI: 00:19.1 [8086/0000] bus ops

  845 13:53:06.124408  PCI: 00:19.1 [8086/a0c6] enabled

  846 13:53:06.128164  PCI: 00:1d.0 [8086/0000] bus ops

  847 13:53:06.131352  PCI: 00:1d.0 [8086/a0b0] enabled

  848 13:53:06.134548  PCI: 00:1e.0 [8086/0000] ops

  849 13:53:06.137897  PCI: 00:1e.0 [8086/a0a8] enabled

  850 13:53:06.141301  PCI: 00:1e.2 [8086/0000] bus ops

  851 13:53:06.144727  PCI: 00:1e.2 [8086/a0aa] enabled

  852 13:53:06.148012  PCI: 00:1e.3 [8086/0000] bus ops

  853 13:53:06.151627  PCI: 00:1e.3 [8086/a0ab] enabled

  854 13:53:06.154787  PCI: 00:1f.0 [8086/0000] bus ops

  855 13:53:06.158209  PCI: 00:1f.0 [8086/a087] enabled

  856 13:53:06.158805  RTC Init

  857 13:53:06.161282  Set power on after power failure.

  858 13:53:06.164672  Disabling Deep S3

  859 13:53:06.165215  Disabling Deep S3

  860 13:53:06.167963  Disabling Deep S4

  861 13:53:06.171492  Disabling Deep S4

  862 13:53:06.172074  Disabling Deep S5

  863 13:53:06.174650  Disabling Deep S5

  864 13:53:06.177861  PCI: 00:1f.2 [0000/0000] hidden

  865 13:53:06.181123  PCI: 00:1f.3 [8086/0000] bus ops

  866 13:53:06.184842  PCI: 00:1f.3 [8086/a0c8] enabled

  867 13:53:06.187795  PCI: 00:1f.5 [8086/0000] bus ops

  868 13:53:06.191301  PCI: 00:1f.5 [8086/a0a4] enabled

  869 13:53:06.194503  PCI: Leftover static devices:

  870 13:53:06.195093  PCI: 00:10.2

  871 13:53:06.195644  PCI: 00:10.6

  872 13:53:06.197830  PCI: 00:10.7

  873 13:53:06.198279  PCI: 00:06.0

  874 13:53:06.201436  PCI: 00:07.1

  875 13:53:06.201911  PCI: 00:07.2

  876 13:53:06.202364  PCI: 00:07.3

  877 13:53:06.204649  PCI: 00:09.0

  878 13:53:06.205198  PCI: 00:0d.1

  879 13:53:06.207908  PCI: 00:0d.2

  880 13:53:06.208335  PCI: 00:0d.3

  881 13:53:06.208921  PCI: 00:0e.0

  882 13:53:06.211167  PCI: 00:12.0

  883 13:53:06.211757  PCI: 00:12.6

  884 13:53:06.214698  PCI: 00:13.0

  885 13:53:06.215288  PCI: 00:14.1

  886 13:53:06.217930  PCI: 00:16.1

  887 13:53:06.218440  PCI: 00:16.2

  888 13:53:06.218949  PCI: 00:16.3

  889 13:53:06.221282  PCI: 00:16.4

  890 13:53:06.221798  PCI: 00:16.5

  891 13:53:06.224422  PCI: 00:17.0

  892 13:53:06.225015  PCI: 00:19.2

  893 13:53:06.225520  PCI: 00:1e.1

  894 13:53:06.228356  PCI: 00:1f.1

  895 13:53:06.228960  PCI: 00:1f.4

  896 13:53:06.231383  PCI: 00:1f.6

  897 13:53:06.232004  PCI: 00:1f.7

  898 13:53:06.234658  PCI: Check your devicetree.cb.

  899 13:53:06.237927  PCI: 00:02.0 scanning...

  900 13:53:06.241477  scan_generic_bus for PCI: 00:02.0

  901 13:53:06.244829  scan_generic_bus for PCI: 00:02.0 done

  902 13:53:06.248073  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  903 13:53:06.251569  PCI: 00:04.0 scanning...

  904 13:53:06.254826  scan_generic_bus for PCI: 00:04.0

  905 13:53:06.257973  GENERIC: 0.0 enabled

  906 13:53:06.264525  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  907 13:53:06.267732  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  908 13:53:06.271316  PCI: 00:0d.0 scanning...

  909 13:53:06.274504  scan_static_bus for PCI: 00:0d.0

  910 13:53:06.277657  USB0 port 0 enabled

  911 13:53:06.278162  USB0 port 0 scanning...

  912 13:53:06.280887  scan_static_bus for USB0 port 0

  913 13:53:06.284832  USB3 port 0 enabled

  914 13:53:06.287976  USB3 port 1 enabled

  915 13:53:06.288353  USB3 port 2 disabled

  916 13:53:06.291329  USB3 port 3 disabled

  917 13:53:06.294320  USB3 port 0 scanning...

  918 13:53:06.298024  scan_static_bus for USB3 port 0

  919 13:53:06.301089  scan_static_bus for USB3 port 0 done

  920 13:53:06.304831  scan_bus: bus USB3 port 0 finished in 6 msecs

  921 13:53:06.307734  USB3 port 1 scanning...

  922 13:53:06.311329  scan_static_bus for USB3 port 1

  923 13:53:06.314726  scan_static_bus for USB3 port 1 done

  924 13:53:06.317922  scan_bus: bus USB3 port 1 finished in 6 msecs

  925 13:53:06.324842  scan_static_bus for USB0 port 0 done

  926 13:53:06.327885  scan_bus: bus USB0 port 0 finished in 43 msecs

  927 13:53:06.331542  scan_static_bus for PCI: 00:0d.0 done

  928 13:53:06.337782  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  929 13:53:06.338318  PCI: 00:14.0 scanning...

  930 13:53:06.341450  scan_static_bus for PCI: 00:14.0

  931 13:53:06.344641  USB0 port 0 enabled

  932 13:53:06.347853  USB0 port 0 scanning...

  933 13:53:06.351587  scan_static_bus for USB0 port 0

  934 13:53:06.352014  USB2 port 0 disabled

  935 13:53:06.354603  USB2 port 1 enabled

  936 13:53:06.358151  USB2 port 2 enabled

  937 13:53:06.358590  USB2 port 3 disabled

  938 13:53:06.361283  USB2 port 4 enabled

  939 13:53:06.364550  USB2 port 5 disabled

  940 13:53:06.365092  USB2 port 6 disabled

  941 13:53:06.367951  USB2 port 7 disabled

  942 13:53:06.368381  USB2 port 8 disabled

  943 13:53:06.371456  USB2 port 9 disabled

  944 13:53:06.374976  USB3 port 0 disabled

  945 13:53:06.375408  USB3 port 1 enabled

  946 13:53:06.378120  USB3 port 2 disabled

  947 13:53:06.381433  USB3 port 3 disabled

  948 13:53:06.381997  USB2 port 1 scanning...

  949 13:53:06.385200  scan_static_bus for USB2 port 1

  950 13:53:06.391209  scan_static_bus for USB2 port 1 done

  951 13:53:06.394804  scan_bus: bus USB2 port 1 finished in 6 msecs

  952 13:53:06.397932  USB2 port 2 scanning...

  953 13:53:06.401312  scan_static_bus for USB2 port 2

  954 13:53:06.405095  scan_static_bus for USB2 port 2 done

  955 13:53:06.408020  scan_bus: bus USB2 port 2 finished in 6 msecs

  956 13:53:06.411699  USB2 port 4 scanning...

  957 13:53:06.414928  scan_static_bus for USB2 port 4

  958 13:53:06.418167  scan_static_bus for USB2 port 4 done

  959 13:53:06.421487  scan_bus: bus USB2 port 4 finished in 6 msecs

  960 13:53:06.425126  USB3 port 1 scanning...

  961 13:53:06.428174  scan_static_bus for USB3 port 1

  962 13:53:06.431421  scan_static_bus for USB3 port 1 done

  963 13:53:06.437978  scan_bus: bus USB3 port 1 finished in 6 msecs

  964 13:53:06.442115  scan_static_bus for USB0 port 0 done

  965 13:53:06.445625  scan_bus: bus USB0 port 0 finished in 93 msecs

  966 13:53:06.448803  scan_static_bus for PCI: 00:14.0 done

  967 13:53:06.455444  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  968 13:53:06.455880  PCI: 00:14.3 scanning...

  969 13:53:06.458948  scan_static_bus for PCI: 00:14.3

  970 13:53:06.462134  GENERIC: 0.0 enabled

  971 13:53:06.465445  scan_static_bus for PCI: 00:14.3 done

  972 13:53:06.472296  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  973 13:53:06.472912  PCI: 00:15.0 scanning...

  974 13:53:06.475486  scan_static_bus for PCI: 00:15.0

  975 13:53:06.478671  I2C: 00:1a enabled

  976 13:53:06.482254  I2C: 00:31 enabled

  977 13:53:06.482698  I2C: 00:32 enabled

  978 13:53:06.485774  scan_static_bus for PCI: 00:15.0 done

  979 13:53:06.492068  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  980 13:53:06.495455  PCI: 00:15.1 scanning...

  981 13:53:06.498890  scan_static_bus for PCI: 00:15.1

  982 13:53:06.499327  I2C: 00:10 enabled

  983 13:53:06.501961  scan_static_bus for PCI: 00:15.1 done

  984 13:53:06.509099  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  985 13:53:06.512320  PCI: 00:15.2 scanning...

  986 13:53:06.515357  scan_static_bus for PCI: 00:15.2

  987 13:53:06.519089  scan_static_bus for PCI: 00:15.2 done

  988 13:53:06.522481  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  989 13:53:06.525546  PCI: 00:15.3 scanning...

  990 13:53:06.528926  scan_static_bus for PCI: 00:15.3

  991 13:53:06.532096  scan_static_bus for PCI: 00:15.3 done

  992 13:53:06.538872  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

  993 13:53:06.539308  PCI: 00:19.1 scanning...

  994 13:53:06.542077  scan_static_bus for PCI: 00:19.1

  995 13:53:06.545450  I2C: 00:15 enabled

  996 13:53:06.548889  scan_static_bus for PCI: 00:19.1 done

  997 13:53:06.552112  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

  998 13:53:06.555510  PCI: 00:1d.0 scanning...

  999 13:53:06.558667  do_pci_scan_bridge for PCI: 00:1d.0

 1000 13:53:06.561974  PCI: pci_scan_bus for bus 01

 1001 13:53:06.565305  PCI: 01:00.0 [1c5c/174a] enabled

 1002 13:53:06.568648  GENERIC: 0.0 enabled

 1003 13:53:06.572120  Enabling Common Clock Configuration

 1004 13:53:06.575515  L1 Sub-State supported from root port 29

 1005 13:53:06.578471  L1 Sub-State Support = 0xf

 1006 13:53:06.582182  CommonModeRestoreTime = 0x28

 1007 13:53:06.585443  Power On Value = 0x16, Power On Scale = 0x0

 1008 13:53:06.588724  ASPM: Enabled L1

 1009 13:53:06.591931  PCIe: Max_Payload_Size adjusted to 128

 1010 13:53:06.598782  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1011 13:53:06.599344  PCI: 00:1e.2 scanning...

 1012 13:53:06.602223  scan_generic_bus for PCI: 00:1e.2

 1013 13:53:06.605395  SPI: 00 enabled

 1014 13:53:06.612149  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1015 13:53:06.615759  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1016 13:53:06.618941  PCI: 00:1e.3 scanning...

 1017 13:53:06.622246  scan_generic_bus for PCI: 00:1e.3

 1018 13:53:06.625323  SPI: 00 enabled

 1019 13:53:06.628919  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1020 13:53:06.635500  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1021 13:53:06.638655  PCI: 00:1f.0 scanning...

 1022 13:53:06.641881  scan_static_bus for PCI: 00:1f.0

 1023 13:53:06.642307  PNP: 0c09.0 enabled

 1024 13:53:06.645559  PNP: 0c09.0 scanning...

 1025 13:53:06.648750  scan_static_bus for PNP: 0c09.0

 1026 13:53:06.651941  scan_static_bus for PNP: 0c09.0 done

 1027 13:53:06.658694  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1028 13:53:06.662026  scan_static_bus for PCI: 00:1f.0 done

 1029 13:53:06.665304  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1030 13:53:06.668496  PCI: 00:1f.2 scanning...

 1031 13:53:06.672152  scan_static_bus for PCI: 00:1f.2

 1032 13:53:06.675631  GENERIC: 0.0 enabled

 1033 13:53:06.676051  GENERIC: 0.0 scanning...

 1034 13:53:06.678681  scan_static_bus for GENERIC: 0.0

 1035 13:53:06.681879  GENERIC: 0.0 enabled

 1036 13:53:06.685339  GENERIC: 1.0 enabled

 1037 13:53:06.688638  scan_static_bus for GENERIC: 0.0 done

 1038 13:53:06.691953  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1039 13:53:06.695090  scan_static_bus for PCI: 00:1f.2 done

 1040 13:53:06.702069  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1041 13:53:06.705170  PCI: 00:1f.3 scanning...

 1042 13:53:06.708253  scan_static_bus for PCI: 00:1f.3

 1043 13:53:06.711709  scan_static_bus for PCI: 00:1f.3 done

 1044 13:53:06.715177  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1045 13:53:06.718308  PCI: 00:1f.5 scanning...

 1046 13:53:06.721986  scan_generic_bus for PCI: 00:1f.5

 1047 13:53:06.725043  scan_generic_bus for PCI: 00:1f.5 done

 1048 13:53:06.731547  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1049 13:53:06.735168  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1050 13:53:06.738402  scan_static_bus for Root Device done

 1051 13:53:06.744998  scan_bus: bus Root Device finished in 736 msecs

 1052 13:53:06.745106  done

 1053 13:53:06.751510  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1054 13:53:06.754835  Chrome EC: UHEPI supported

 1055 13:53:06.761529  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1056 13:53:06.768083  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1057 13:53:06.771320  SPI flash protection: WPSW=0 SRP0=0

 1058 13:53:06.774972  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1059 13:53:06.781304  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1060 13:53:06.784976  found VGA at PCI: 00:02.0

 1061 13:53:06.788414  Setting up VGA for PCI: 00:02.0

 1062 13:53:06.791602  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1063 13:53:06.798228  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1064 13:53:06.798336  Allocating resources...

 1065 13:53:06.801617  Reading resources...

 1066 13:53:06.804722  Root Device read_resources bus 0 link: 0

 1067 13:53:06.811671  DOMAIN: 0000 read_resources bus 0 link: 0

 1068 13:53:06.814712  PCI: 00:04.0 read_resources bus 1 link: 0

 1069 13:53:06.821487  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1070 13:53:06.824703  PCI: 00:0d.0 read_resources bus 0 link: 0

 1071 13:53:06.831443  USB0 port 0 read_resources bus 0 link: 0

 1072 13:53:06.834749  USB0 port 0 read_resources bus 0 link: 0 done

 1073 13:53:06.841534  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1074 13:53:06.845213  PCI: 00:14.0 read_resources bus 0 link: 0

 1075 13:53:06.848333  USB0 port 0 read_resources bus 0 link: 0

 1076 13:53:06.855534  USB0 port 0 read_resources bus 0 link: 0 done

 1077 13:53:06.858472  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1078 13:53:06.865414  PCI: 00:14.3 read_resources bus 0 link: 0

 1079 13:53:06.868658  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1080 13:53:06.875424  PCI: 00:15.0 read_resources bus 0 link: 0

 1081 13:53:06.878786  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1082 13:53:06.885049  PCI: 00:15.1 read_resources bus 0 link: 0

 1083 13:53:06.888526  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1084 13:53:06.895689  PCI: 00:19.1 read_resources bus 0 link: 0

 1085 13:53:06.899310  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1086 13:53:06.905600  PCI: 00:1d.0 read_resources bus 1 link: 0

 1087 13:53:06.909066  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1088 13:53:06.915594  PCI: 00:1e.2 read_resources bus 2 link: 0

 1089 13:53:06.919130  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1090 13:53:06.925524  PCI: 00:1e.3 read_resources bus 3 link: 0

 1091 13:53:06.928866  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1092 13:53:06.935674  PCI: 00:1f.0 read_resources bus 0 link: 0

 1093 13:53:06.939037  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1094 13:53:06.942273  PCI: 00:1f.2 read_resources bus 0 link: 0

 1095 13:53:06.949435  GENERIC: 0.0 read_resources bus 0 link: 0

 1096 13:53:06.952574  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1097 13:53:06.959463  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1098 13:53:06.966104  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1099 13:53:06.969412  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1100 13:53:06.972725  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1101 13:53:06.979196  Root Device read_resources bus 0 link: 0 done

 1102 13:53:06.982557  Done reading resources.

 1103 13:53:06.985857  Show resources in subtree (Root Device)...After reading.

 1104 13:53:06.992683   Root Device child on link 0 DOMAIN: 0000

 1105 13:53:06.995971    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1106 13:53:07.006058    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1107 13:53:07.015920    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1108 13:53:07.016050     PCI: 00:00.0

 1109 13:53:07.026115     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1110 13:53:07.035774     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1111 13:53:07.046106     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1112 13:53:07.052465     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1113 13:53:07.062584     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1114 13:53:07.072863     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1115 13:53:07.082581     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1116 13:53:07.092404     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1117 13:53:07.102350     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1118 13:53:07.109103     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1119 13:53:07.119315     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1120 13:53:07.129412     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1121 13:53:07.139071     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1122 13:53:07.145668     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1123 13:53:07.155935     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1124 13:53:07.165708     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1125 13:53:07.175986     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1126 13:53:07.186049     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1127 13:53:07.196184     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1128 13:53:07.206115     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1129 13:53:07.206228     PCI: 00:02.0

 1130 13:53:07.216122     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1131 13:53:07.225919     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1132 13:53:07.235750     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1133 13:53:07.239767     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1134 13:53:07.249302     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1135 13:53:07.252924      GENERIC: 0.0

 1136 13:53:07.253032     PCI: 00:05.0

 1137 13:53:07.262898     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 13:53:07.269552     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1139 13:53:07.269663      GENERIC: 0.0

 1140 13:53:07.272659     PCI: 00:08.0

 1141 13:53:07.282996     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1142 13:53:07.283107     PCI: 00:0a.0

 1143 13:53:07.286152     PCI: 00:0d.0 child on link 0 USB0 port 0

 1144 13:53:07.296093     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1145 13:53:07.302946      USB0 port 0 child on link 0 USB3 port 0

 1146 13:53:07.303055       USB3 port 0

 1147 13:53:07.305994       USB3 port 1

 1148 13:53:07.306099       USB3 port 2

 1149 13:53:07.309218       USB3 port 3

 1150 13:53:07.312453     PCI: 00:14.0 child on link 0 USB0 port 0

 1151 13:53:07.322840     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 13:53:07.329507      USB0 port 0 child on link 0 USB2 port 0

 1153 13:53:07.329617       USB2 port 0

 1154 13:53:07.332588       USB2 port 1

 1155 13:53:07.332692       USB2 port 2

 1156 13:53:07.336155       USB2 port 3

 1157 13:53:07.336261       USB2 port 4

 1158 13:53:07.339168       USB2 port 5

 1159 13:53:07.339274       USB2 port 6

 1160 13:53:07.342852       USB2 port 7

 1161 13:53:07.342958       USB2 port 8

 1162 13:53:07.346004       USB2 port 9

 1163 13:53:07.346109       USB3 port 0

 1164 13:53:07.349615       USB3 port 1

 1165 13:53:07.349722       USB3 port 2

 1166 13:53:07.352985       USB3 port 3

 1167 13:53:07.353090     PCI: 00:14.2

 1168 13:53:07.362453     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1169 13:53:07.372843     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1170 13:53:07.379203     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1171 13:53:07.389298     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1172 13:53:07.389422      GENERIC: 0.0

 1173 13:53:07.395852     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1174 13:53:07.406107     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1175 13:53:07.406226      I2C: 00:1a

 1176 13:53:07.409441      I2C: 00:31

 1177 13:53:07.409554      I2C: 00:32

 1178 13:53:07.412678     PCI: 00:15.1 child on link 0 I2C: 00:10

 1179 13:53:07.422705     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1180 13:53:07.425810      I2C: 00:10

 1181 13:53:07.425923     PCI: 00:15.2

 1182 13:53:07.436303     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 13:53:07.439056     PCI: 00:15.3

 1184 13:53:07.449075     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1185 13:53:07.449202     PCI: 00:16.0

 1186 13:53:07.458813     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 13:53:07.462546     PCI: 00:19.0

 1188 13:53:07.465684     PCI: 00:19.1 child on link 0 I2C: 00:15

 1189 13:53:07.475810     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 13:53:07.479074      I2C: 00:15

 1191 13:53:07.482377     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1192 13:53:07.492222     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1193 13:53:07.498944     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1194 13:53:07.508725     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1195 13:53:07.512544      GENERIC: 0.0

 1196 13:53:07.512657      PCI: 01:00.0

 1197 13:53:07.522293      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1198 13:53:07.532437      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1199 13:53:07.542307      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1200 13:53:07.542427     PCI: 00:1e.0

 1201 13:53:07.555685     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1202 13:53:07.559268     PCI: 00:1e.2 child on link 0 SPI: 00

 1203 13:53:07.568986     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1204 13:53:07.569113      SPI: 00

 1205 13:53:07.572293     PCI: 00:1e.3 child on link 0 SPI: 00

 1206 13:53:07.582243     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1207 13:53:07.585725      SPI: 00

 1208 13:53:07.589253     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1209 13:53:07.599140     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1210 13:53:07.599236      PNP: 0c09.0

 1211 13:53:07.609060      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1212 13:53:07.612447     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1213 13:53:07.622300     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1214 13:53:07.632487     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1215 13:53:07.635882      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1216 13:53:07.638980       GENERIC: 0.0

 1217 13:53:07.639066       GENERIC: 1.0

 1218 13:53:07.642435     PCI: 00:1f.3

 1219 13:53:07.652158     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1220 13:53:07.662264     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1221 13:53:07.662353     PCI: 00:1f.5

 1222 13:53:07.672285     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1223 13:53:07.675571    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1224 13:53:07.678849     APIC: 00

 1225 13:53:07.678950     APIC: 01

 1226 13:53:07.679046     APIC: 03

 1227 13:53:07.682293     APIC: 07

 1228 13:53:07.682368     APIC: 05

 1229 13:53:07.685821     APIC: 04

 1230 13:53:07.685897     APIC: 02

 1231 13:53:07.685959     APIC: 06

 1232 13:53:07.695508  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1233 13:53:07.698817   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1234 13:53:07.705520   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1235 13:53:07.712226   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1236 13:53:07.715619    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1237 13:53:07.722139    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1238 13:53:07.725541    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1239 13:53:07.732145   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1240 13:53:07.738701   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1241 13:53:07.748527   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1242 13:53:07.755248  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1243 13:53:07.762090  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1244 13:53:07.768740   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1245 13:53:07.775209   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1246 13:53:07.785306   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1247 13:53:07.785404   DOMAIN: 0000: Resource ranges:

 1248 13:53:07.792008   * Base: 1000, Size: 800, Tag: 100

 1249 13:53:07.795542   * Base: 1900, Size: e700, Tag: 100

 1250 13:53:07.798755    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1251 13:53:07.805289  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1252 13:53:07.812115  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1253 13:53:07.821772   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1254 13:53:07.828419   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1255 13:53:07.835321   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1256 13:53:07.845209   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1257 13:53:07.851730   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1258 13:53:07.858334   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1259 13:53:07.865428   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1260 13:53:07.874896   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1261 13:53:07.881841   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1262 13:53:07.888339   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1263 13:53:07.898586   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1264 13:53:07.904939   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1265 13:53:07.911643   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1266 13:53:07.921634   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1267 13:53:07.928663   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1268 13:53:07.934995   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1269 13:53:07.945047   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1270 13:53:07.952124   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1271 13:53:07.958478   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1272 13:53:07.968231   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1273 13:53:07.975334   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1274 13:53:07.981839   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1275 13:53:07.984864   DOMAIN: 0000: Resource ranges:

 1276 13:53:07.991733   * Base: 7fc00000, Size: 40400000, Tag: 200

 1277 13:53:07.994729   * Base: d0000000, Size: 28000000, Tag: 200

 1278 13:53:07.998374   * Base: fa000000, Size: 1000000, Tag: 200

 1279 13:53:08.001631   * Base: fb001000, Size: 2fff000, Tag: 200

 1280 13:53:08.008579   * Base: fe010000, Size: 2e000, Tag: 200

 1281 13:53:08.011583   * Base: fe03f000, Size: d41000, Tag: 200

 1282 13:53:08.015235   * Base: fed88000, Size: 8000, Tag: 200

 1283 13:53:08.018434   * Base: fed93000, Size: d000, Tag: 200

 1284 13:53:08.025265   * Base: feda2000, Size: 1e000, Tag: 200

 1285 13:53:08.028509   * Base: fede0000, Size: 1220000, Tag: 200

 1286 13:53:08.031582   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1287 13:53:08.038563    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1288 13:53:08.045063    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1289 13:53:08.051861    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1290 13:53:08.058451    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1291 13:53:08.065047    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1292 13:53:08.071634    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1293 13:53:08.078318    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1294 13:53:08.084930    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1295 13:53:08.091603    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1296 13:53:08.098408    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1297 13:53:08.105236    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1298 13:53:08.111775    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1299 13:53:08.118409    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1300 13:53:08.125006    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1301 13:53:08.131668    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1302 13:53:08.138331    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1303 13:53:08.145031    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1304 13:53:08.151587    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1305 13:53:08.158464    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1306 13:53:08.164716    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1307 13:53:08.171758    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1308 13:53:08.178187    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1309 13:53:08.185074  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1310 13:53:08.194660  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1311 13:53:08.197890   PCI: 00:1d.0: Resource ranges:

 1312 13:53:08.201394   * Base: 7fc00000, Size: 100000, Tag: 200

 1313 13:53:08.207967    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1314 13:53:08.214690    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1315 13:53:08.221332    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1316 13:53:08.231439  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1317 13:53:08.238258  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1318 13:53:08.241654  Root Device assign_resources, bus 0 link: 0

 1319 13:53:08.244812  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1320 13:53:08.255406  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1321 13:53:08.261932  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1322 13:53:08.271788  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1323 13:53:08.278331  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1324 13:53:08.285249  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1325 13:53:08.288602  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1326 13:53:08.295084  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1327 13:53:08.305550  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1328 13:53:08.311949  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1329 13:53:08.318775  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1330 13:53:08.321856  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1331 13:53:08.332233  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1332 13:53:08.335147  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1333 13:53:08.338729  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1334 13:53:08.348458  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1335 13:53:08.355127  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1336 13:53:08.365613  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1337 13:53:08.368643  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1338 13:53:08.371798  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1339 13:53:08.382141  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1340 13:53:08.385473  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1341 13:53:08.392090  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1342 13:53:08.398850  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1343 13:53:08.402243  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1344 13:53:08.409054  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1345 13:53:08.415646  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1346 13:53:08.425857  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1347 13:53:08.432235  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1348 13:53:08.442516  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1349 13:53:08.445668  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1350 13:53:08.452562  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1351 13:53:08.459119  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1352 13:53:08.468883  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 13:53:08.479211  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 13:53:08.482478  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 13:53:08.488995  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1356 13:53:08.498926  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1357 13:53:08.505819  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1358 13:53:08.512347  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1359 13:53:08.518963  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1360 13:53:08.522260  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1361 13:53:08.529411  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1362 13:53:08.535941  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1363 13:53:08.542536  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1364 13:53:08.545740  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1365 13:53:08.549126  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 13:53:08.556089  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1367 13:53:08.559831  LPC: Trying to open IO window from 800 size 1ff

 1368 13:53:08.569664  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1369 13:53:08.576468  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1370 13:53:08.586150  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1371 13:53:08.589882  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 13:53:08.593046  Root Device assign_resources, bus 0 link: 0

 1373 13:53:08.596585  Done setting resources.

 1374 13:53:08.603114  Show resources in subtree (Root Device)...After assigning values.

 1375 13:53:08.606483   Root Device child on link 0 DOMAIN: 0000

 1376 13:53:08.613019    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1377 13:53:08.622997    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1378 13:53:08.629697    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1379 13:53:08.632964     PCI: 00:00.0

 1380 13:53:08.642800     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1381 13:53:08.653006     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1382 13:53:08.663055     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1383 13:53:08.669541     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1384 13:53:08.679535     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1385 13:53:08.689298     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1386 13:53:08.699303     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1387 13:53:08.709414     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1388 13:53:08.716035     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1389 13:53:08.726186     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1390 13:53:08.736191     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1391 13:53:08.746082     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1392 13:53:08.756447     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1393 13:53:08.763011     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1394 13:53:08.772723     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1395 13:53:08.782981     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1396 13:53:08.792828     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1397 13:53:08.802808     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1398 13:53:08.812950     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1399 13:53:08.822890     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1400 13:53:08.822989     PCI: 00:02.0

 1401 13:53:08.832625     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1402 13:53:08.842713     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1403 13:53:08.852967     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1404 13:53:08.859527     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1405 13:53:08.869204     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1406 13:53:08.869302      GENERIC: 0.0

 1407 13:53:08.873047     PCI: 00:05.0

 1408 13:53:08.882660     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1409 13:53:08.886024     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1410 13:53:08.889066      GENERIC: 0.0

 1411 13:53:08.889151     PCI: 00:08.0

 1412 13:53:08.899140     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1413 13:53:08.902883     PCI: 00:0a.0

 1414 13:53:08.905898     PCI: 00:0d.0 child on link 0 USB0 port 0

 1415 13:53:08.916035     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1416 13:53:08.922737      USB0 port 0 child on link 0 USB3 port 0

 1417 13:53:08.922827       USB3 port 0

 1418 13:53:08.925856       USB3 port 1

 1419 13:53:08.925941       USB3 port 2

 1420 13:53:08.929397       USB3 port 3

 1421 13:53:08.932632     PCI: 00:14.0 child on link 0 USB0 port 0

 1422 13:53:08.942793     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1423 13:53:08.949399      USB0 port 0 child on link 0 USB2 port 0

 1424 13:53:08.949523       USB2 port 0

 1425 13:53:08.952240       USB2 port 1

 1426 13:53:08.952339       USB2 port 2

 1427 13:53:08.955563       USB2 port 3

 1428 13:53:08.955673       USB2 port 4

 1429 13:53:08.959250       USB2 port 5

 1430 13:53:08.959356       USB2 port 6

 1431 13:53:08.962663       USB2 port 7

 1432 13:53:08.962741       USB2 port 8

 1433 13:53:08.965788       USB2 port 9

 1434 13:53:08.965888       USB3 port 0

 1435 13:53:08.969231       USB3 port 1

 1436 13:53:08.972666       USB3 port 2

 1437 13:53:08.972791       USB3 port 3

 1438 13:53:08.975926     PCI: 00:14.2

 1439 13:53:08.986165     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1440 13:53:08.995827     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1441 13:53:08.999156     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1442 13:53:09.009267     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1443 13:53:09.012773      GENERIC: 0.0

 1444 13:53:09.016068     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1445 13:53:09.025909     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1446 13:53:09.029184      I2C: 00:1a

 1447 13:53:09.029267      I2C: 00:31

 1448 13:53:09.032822      I2C: 00:32

 1449 13:53:09.035995     PCI: 00:15.1 child on link 0 I2C: 00:10

 1450 13:53:09.045909     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1451 13:53:09.045999      I2C: 00:10

 1452 13:53:09.049005     PCI: 00:15.2

 1453 13:53:09.059308     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1454 13:53:09.059395     PCI: 00:15.3

 1455 13:53:09.072458     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1456 13:53:09.072555     PCI: 00:16.0

 1457 13:53:09.082360     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1458 13:53:09.085686     PCI: 00:19.0

 1459 13:53:09.088945     PCI: 00:19.1 child on link 0 I2C: 00:15

 1460 13:53:09.099187     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1461 13:53:09.102639      I2C: 00:15

 1462 13:53:09.105864     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1463 13:53:09.115651     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1464 13:53:09.126024     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1465 13:53:09.135701     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1466 13:53:09.138903      GENERIC: 0.0

 1467 13:53:09.138989      PCI: 01:00.0

 1468 13:53:09.152190      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1469 13:53:09.162730      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1470 13:53:09.172589      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1471 13:53:09.172715     PCI: 00:1e.0

 1472 13:53:09.185491     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1473 13:53:09.188750     PCI: 00:1e.2 child on link 0 SPI: 00

 1474 13:53:09.199090     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1475 13:53:09.199178      SPI: 00

 1476 13:53:09.205538     PCI: 00:1e.3 child on link 0 SPI: 00

 1477 13:53:09.215328     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1478 13:53:09.215417      SPI: 00

 1479 13:53:09.218941     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1480 13:53:09.228810     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1481 13:53:09.232321      PNP: 0c09.0

 1482 13:53:09.238833      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1483 13:53:09.245422     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1484 13:53:09.251885     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1485 13:53:09.261719     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1486 13:53:09.268432      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1487 13:53:09.268537       GENERIC: 0.0

 1488 13:53:09.272083       GENERIC: 1.0

 1489 13:53:09.272163     PCI: 00:1f.3

 1490 13:53:09.282175     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1491 13:53:09.291819     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1492 13:53:09.295408     PCI: 00:1f.5

 1493 13:53:09.305175     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1494 13:53:09.308672    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1495 13:53:09.311802     APIC: 00

 1496 13:53:09.311879     APIC: 01

 1497 13:53:09.311949     APIC: 03

 1498 13:53:09.315648     APIC: 07

 1499 13:53:09.315728     APIC: 05

 1500 13:53:09.318768     APIC: 04

 1501 13:53:09.318850     APIC: 02

 1502 13:53:09.318913     APIC: 06

 1503 13:53:09.321880  Done allocating resources.

 1504 13:53:09.328639  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1505 13:53:09.335065  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1506 13:53:09.338542  Configure GPIOs for I2S audio on UP4.

 1507 13:53:09.345263  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1508 13:53:09.348467  Enabling resources...

 1509 13:53:09.351965  PCI: 00:00.0 subsystem <- 8086/9a12

 1510 13:53:09.355391  PCI: 00:00.0 cmd <- 06

 1511 13:53:09.358471  PCI: 00:02.0 subsystem <- 8086/9a40

 1512 13:53:09.362088  PCI: 00:02.0 cmd <- 03

 1513 13:53:09.365187  PCI: 00:04.0 subsystem <- 8086/9a03

 1514 13:53:09.365270  PCI: 00:04.0 cmd <- 02

 1515 13:53:09.372041  PCI: 00:05.0 subsystem <- 8086/9a19

 1516 13:53:09.372126  PCI: 00:05.0 cmd <- 02

 1517 13:53:09.375261  PCI: 00:08.0 subsystem <- 8086/9a11

 1518 13:53:09.378681  PCI: 00:08.0 cmd <- 06

 1519 13:53:09.381863  PCI: 00:0d.0 subsystem <- 8086/9a13

 1520 13:53:09.385228  PCI: 00:0d.0 cmd <- 02

 1521 13:53:09.388982  PCI: 00:14.0 subsystem <- 8086/a0ed

 1522 13:53:09.392292  PCI: 00:14.0 cmd <- 02

 1523 13:53:09.395727  PCI: 00:14.2 subsystem <- 8086/a0ef

 1524 13:53:09.398879  PCI: 00:14.2 cmd <- 02

 1525 13:53:09.402078  PCI: 00:14.3 subsystem <- 8086/a0f0

 1526 13:53:09.402161  PCI: 00:14.3 cmd <- 02

 1527 13:53:09.408956  PCI: 00:15.0 subsystem <- 8086/a0e8

 1528 13:53:09.409038  PCI: 00:15.0 cmd <- 02

 1529 13:53:09.412436  PCI: 00:15.1 subsystem <- 8086/a0e9

 1530 13:53:09.415923  PCI: 00:15.1 cmd <- 02

 1531 13:53:09.418834  PCI: 00:15.2 subsystem <- 8086/a0ea

 1532 13:53:09.422452  PCI: 00:15.2 cmd <- 02

 1533 13:53:09.425473  PCI: 00:15.3 subsystem <- 8086/a0eb

 1534 13:53:09.428936  PCI: 00:15.3 cmd <- 02

 1535 13:53:09.432298  PCI: 00:16.0 subsystem <- 8086/a0e0

 1536 13:53:09.435567  PCI: 00:16.0 cmd <- 02

 1537 13:53:09.439061  PCI: 00:19.1 subsystem <- 8086/a0c6

 1538 13:53:09.442332  PCI: 00:19.1 cmd <- 02

 1539 13:53:09.445720  PCI: 00:1d.0 bridge ctrl <- 0013

 1540 13:53:09.449254  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1541 13:53:09.449337  PCI: 00:1d.0 cmd <- 06

 1542 13:53:09.455718  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1543 13:53:09.455801  PCI: 00:1e.0 cmd <- 06

 1544 13:53:09.459039  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1545 13:53:09.462480  PCI: 00:1e.2 cmd <- 06

 1546 13:53:09.465662  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1547 13:53:09.469350  PCI: 00:1e.3 cmd <- 02

 1548 13:53:09.472665  PCI: 00:1f.0 subsystem <- 8086/a087

 1549 13:53:09.475969  PCI: 00:1f.0 cmd <- 407

 1550 13:53:09.479318  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1551 13:53:09.482584  PCI: 00:1f.3 cmd <- 02

 1552 13:53:09.486016  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1553 13:53:09.489200  PCI: 00:1f.5 cmd <- 406

 1554 13:53:09.492440  PCI: 01:00.0 cmd <- 02

 1555 13:53:09.497109  done.

 1556 13:53:09.500314  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1557 13:53:09.503574  Initializing devices...

 1558 13:53:09.506941  Root Device init

 1559 13:53:09.510173  Chrome EC: Set SMI mask to 0x0000000000000000

 1560 13:53:09.516651  Chrome EC: clear events_b mask to 0x0000000000000000

 1561 13:53:09.523676  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1562 13:53:09.530426  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1563 13:53:09.537055  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1564 13:53:09.540342  Chrome EC: Set WAKE mask to 0x0000000000000000

 1565 13:53:09.547500  fw_config match found: DB_USB=USB3_ACTIVE

 1566 13:53:09.550782  Configure Right Type-C port orientation for retimer

 1567 13:53:09.553871  Root Device init finished in 45 msecs

 1568 13:53:09.557970  PCI: 00:00.0 init

 1569 13:53:09.561419  CPU TDP = 9 Watts

 1570 13:53:09.561503  CPU PL1 = 9 Watts

 1571 13:53:09.564661  CPU PL2 = 40 Watts

 1572 13:53:09.568057  CPU PL4 = 83 Watts

 1573 13:53:09.571974  PCI: 00:00.0 init finished in 8 msecs

 1574 13:53:09.572099  PCI: 00:02.0 init

 1575 13:53:09.575013  GMA: Found VBT in CBFS

 1576 13:53:09.578318  GMA: Found valid VBT in CBFS

 1577 13:53:09.585081  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1578 13:53:09.591782                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1579 13:53:09.594985  PCI: 00:02.0 init finished in 18 msecs

 1580 13:53:09.598166  PCI: 00:05.0 init

 1581 13:53:09.601392  PCI: 00:05.0 init finished in 0 msecs

 1582 13:53:09.604661  PCI: 00:08.0 init

 1583 13:53:09.608433  PCI: 00:08.0 init finished in 0 msecs

 1584 13:53:09.611645  PCI: 00:14.0 init

 1585 13:53:09.614865  PCI: 00:14.0 init finished in 0 msecs

 1586 13:53:09.618373  PCI: 00:14.2 init

 1587 13:53:09.621822  PCI: 00:14.2 init finished in 0 msecs

 1588 13:53:09.621893  PCI: 00:15.0 init

 1589 13:53:09.625175  I2C bus 0 version 0x3230302a

 1590 13:53:09.628382  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1591 13:53:09.634997  PCI: 00:15.0 init finished in 6 msecs

 1592 13:53:09.635108  PCI: 00:15.1 init

 1593 13:53:09.638443  I2C bus 1 version 0x3230302a

 1594 13:53:09.641749  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1595 13:53:09.645001  PCI: 00:15.1 init finished in 6 msecs

 1596 13:53:09.648021  PCI: 00:15.2 init

 1597 13:53:09.651614  I2C bus 2 version 0x3230302a

 1598 13:53:09.654973  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1599 13:53:09.658652  PCI: 00:15.2 init finished in 6 msecs

 1600 13:53:09.661421  PCI: 00:15.3 init

 1601 13:53:09.664832  I2C bus 3 version 0x3230302a

 1602 13:53:09.668317  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1603 13:53:09.671565  PCI: 00:15.3 init finished in 6 msecs

 1604 13:53:09.675014  PCI: 00:16.0 init

 1605 13:53:09.678456  PCI: 00:16.0 init finished in 0 msecs

 1606 13:53:09.678595  PCI: 00:19.1 init

 1607 13:53:09.681695  I2C bus 5 version 0x3230302a

 1608 13:53:09.685297  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1609 13:53:09.691546  PCI: 00:19.1 init finished in 6 msecs

 1610 13:53:09.691653  PCI: 00:1d.0 init

 1611 13:53:09.694985  Initializing PCH PCIe bridge.

 1612 13:53:09.698238  PCI: 00:1d.0 init finished in 3 msecs

 1613 13:53:09.702455  PCI: 00:1f.0 init

 1614 13:53:09.705640  IOAPIC: Initializing IOAPIC at 0xfec00000

 1615 13:53:09.712186  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1616 13:53:09.712279  IOAPIC: ID = 0x02

 1617 13:53:09.715463  IOAPIC: Dumping registers

 1618 13:53:09.718866    reg 0x0000: 0x02000000

 1619 13:53:09.722304    reg 0x0001: 0x00770020

 1620 13:53:09.722405    reg 0x0002: 0x00000000

 1621 13:53:09.728757  PCI: 00:1f.0 init finished in 21 msecs

 1622 13:53:09.728856  PCI: 00:1f.2 init

 1623 13:53:09.732133  Disabling ACPI via APMC.

 1624 13:53:09.735685  APMC done.

 1625 13:53:09.738874  PCI: 00:1f.2 init finished in 5 msecs

 1626 13:53:09.750816  PCI: 01:00.0 init

 1627 13:53:09.753857  PCI: 01:00.0 init finished in 0 msecs

 1628 13:53:09.757380  PNP: 0c09.0 init

 1629 13:53:09.760543  Google Chrome EC uptime: 8.471 seconds

 1630 13:53:09.767288  Google Chrome AP resets since EC boot: 1

 1631 13:53:09.770692  Google Chrome most recent AP reset causes:

 1632 13:53:09.773904  	0.349: 32775 shutdown: entering G3

 1633 13:53:09.780681  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1634 13:53:09.784138  PNP: 0c09.0 init finished in 22 msecs

 1635 13:53:09.789607  Devices initialized

 1636 13:53:09.792683  Show all devs... After init.

 1637 13:53:09.796297  Root Device: enabled 1

 1638 13:53:09.796396  DOMAIN: 0000: enabled 1

 1639 13:53:09.799546  CPU_CLUSTER: 0: enabled 1

 1640 13:53:09.802839  PCI: 00:00.0: enabled 1

 1641 13:53:09.806161  PCI: 00:02.0: enabled 1

 1642 13:53:09.806243  PCI: 00:04.0: enabled 1

 1643 13:53:09.809516  PCI: 00:05.0: enabled 1

 1644 13:53:09.812842  PCI: 00:06.0: enabled 0

 1645 13:53:09.815935  PCI: 00:07.0: enabled 0

 1646 13:53:09.816020  PCI: 00:07.1: enabled 0

 1647 13:53:09.819623  PCI: 00:07.2: enabled 0

 1648 13:53:09.822588  PCI: 00:07.3: enabled 0

 1649 13:53:09.825975  PCI: 00:08.0: enabled 1

 1650 13:53:09.826057  PCI: 00:09.0: enabled 0

 1651 13:53:09.829416  PCI: 00:0a.0: enabled 0

 1652 13:53:09.832553  PCI: 00:0d.0: enabled 1

 1653 13:53:09.832638  PCI: 00:0d.1: enabled 0

 1654 13:53:09.836228  PCI: 00:0d.2: enabled 0

 1655 13:53:09.839275  PCI: 00:0d.3: enabled 0

 1656 13:53:09.842863  PCI: 00:0e.0: enabled 0

 1657 13:53:09.842949  PCI: 00:10.2: enabled 1

 1658 13:53:09.845961  PCI: 00:10.6: enabled 0

 1659 13:53:09.849284  PCI: 00:10.7: enabled 0

 1660 13:53:09.852783  PCI: 00:12.0: enabled 0

 1661 13:53:09.852883  PCI: 00:12.6: enabled 0

 1662 13:53:09.856158  PCI: 00:13.0: enabled 0

 1663 13:53:09.859318  PCI: 00:14.0: enabled 1

 1664 13:53:09.862910  PCI: 00:14.1: enabled 0

 1665 13:53:09.862996  PCI: 00:14.2: enabled 1

 1666 13:53:09.865909  PCI: 00:14.3: enabled 1

 1667 13:53:09.869064  PCI: 00:15.0: enabled 1

 1668 13:53:09.872802  PCI: 00:15.1: enabled 1

 1669 13:53:09.872903  PCI: 00:15.2: enabled 1

 1670 13:53:09.875763  PCI: 00:15.3: enabled 1

 1671 13:53:09.879418  PCI: 00:16.0: enabled 1

 1672 13:53:09.879503  PCI: 00:16.1: enabled 0

 1673 13:53:09.882723  PCI: 00:16.2: enabled 0

 1674 13:53:09.885768  PCI: 00:16.3: enabled 0

 1675 13:53:09.889487  PCI: 00:16.4: enabled 0

 1676 13:53:09.889572  PCI: 00:16.5: enabled 0

 1677 13:53:09.892690  PCI: 00:17.0: enabled 0

 1678 13:53:09.895907  PCI: 00:19.0: enabled 0

 1679 13:53:09.899286  PCI: 00:19.1: enabled 1

 1680 13:53:09.899371  PCI: 00:19.2: enabled 0

 1681 13:53:09.902444  PCI: 00:1c.0: enabled 1

 1682 13:53:09.905821  PCI: 00:1c.1: enabled 0

 1683 13:53:09.909069  PCI: 00:1c.2: enabled 0

 1684 13:53:09.909154  PCI: 00:1c.3: enabled 0

 1685 13:53:09.912385  PCI: 00:1c.4: enabled 0

 1686 13:53:09.915698  PCI: 00:1c.5: enabled 0

 1687 13:53:09.915784  PCI: 00:1c.6: enabled 1

 1688 13:53:09.919323  PCI: 00:1c.7: enabled 0

 1689 13:53:09.922704  PCI: 00:1d.0: enabled 1

 1690 13:53:09.925979  PCI: 00:1d.1: enabled 0

 1691 13:53:09.926064  PCI: 00:1d.2: enabled 1

 1692 13:53:09.929248  PCI: 00:1d.3: enabled 0

 1693 13:53:09.932697  PCI: 00:1e.0: enabled 1

 1694 13:53:09.935943  PCI: 00:1e.1: enabled 0

 1695 13:53:09.936030  PCI: 00:1e.2: enabled 1

 1696 13:53:09.939311  PCI: 00:1e.3: enabled 1

 1697 13:53:09.942213  PCI: 00:1f.0: enabled 1

 1698 13:53:09.945826  PCI: 00:1f.1: enabled 0

 1699 13:53:09.945911  PCI: 00:1f.2: enabled 1

 1700 13:53:09.948920  PCI: 00:1f.3: enabled 1

 1701 13:53:09.951963  PCI: 00:1f.4: enabled 0

 1702 13:53:09.955413  PCI: 00:1f.5: enabled 1

 1703 13:53:09.955499  PCI: 00:1f.6: enabled 0

 1704 13:53:09.959008  PCI: 00:1f.7: enabled 0

 1705 13:53:09.962179  APIC: 00: enabled 1

 1706 13:53:09.962264  GENERIC: 0.0: enabled 1

 1707 13:53:09.965532  GENERIC: 0.0: enabled 1

 1708 13:53:09.968832  GENERIC: 1.0: enabled 1

 1709 13:53:09.972095  GENERIC: 0.0: enabled 1

 1710 13:53:09.972188  GENERIC: 1.0: enabled 1

 1711 13:53:09.975726  USB0 port 0: enabled 1

 1712 13:53:09.978731  GENERIC: 0.0: enabled 1

 1713 13:53:09.978804  USB0 port 0: enabled 1

 1714 13:53:09.981912  GENERIC: 0.0: enabled 1

 1715 13:53:09.985313  I2C: 00:1a: enabled 1

 1716 13:53:09.988667  I2C: 00:31: enabled 1

 1717 13:53:09.988851  I2C: 00:32: enabled 1

 1718 13:53:09.992089  I2C: 00:10: enabled 1

 1719 13:53:09.995410  I2C: 00:15: enabled 1

 1720 13:53:09.995492  GENERIC: 0.0: enabled 0

 1721 13:53:09.998601  GENERIC: 1.0: enabled 0

 1722 13:53:10.001929  GENERIC: 0.0: enabled 1

 1723 13:53:10.002011  SPI: 00: enabled 1

 1724 13:53:10.005620  SPI: 00: enabled 1

 1725 13:53:10.008715  PNP: 0c09.0: enabled 1

 1726 13:53:10.008847  GENERIC: 0.0: enabled 1

 1727 13:53:10.012125  USB3 port 0: enabled 1

 1728 13:53:10.015476  USB3 port 1: enabled 1

 1729 13:53:10.018665  USB3 port 2: enabled 0

 1730 13:53:10.018740  USB3 port 3: enabled 0

 1731 13:53:10.021817  USB2 port 0: enabled 0

 1732 13:53:10.025481  USB2 port 1: enabled 1

 1733 13:53:10.025563  USB2 port 2: enabled 1

 1734 13:53:10.028550  USB2 port 3: enabled 0

 1735 13:53:10.031918  USB2 port 4: enabled 1

 1736 13:53:10.031993  USB2 port 5: enabled 0

 1737 13:53:10.035356  USB2 port 6: enabled 0

 1738 13:53:10.038423  USB2 port 7: enabled 0

 1739 13:53:10.041609  USB2 port 8: enabled 0

 1740 13:53:10.041692  USB2 port 9: enabled 0

 1741 13:53:10.045320  USB3 port 0: enabled 0

 1742 13:53:10.048579  USB3 port 1: enabled 1

 1743 13:53:10.048660  USB3 port 2: enabled 0

 1744 13:53:10.051753  USB3 port 3: enabled 0

 1745 13:53:10.055074  GENERIC: 0.0: enabled 1

 1746 13:53:10.058498  GENERIC: 1.0: enabled 1

 1747 13:53:10.058580  APIC: 01: enabled 1

 1748 13:53:10.061949  APIC: 03: enabled 1

 1749 13:53:10.062031  APIC: 07: enabled 1

 1750 13:53:10.065060  APIC: 05: enabled 1

 1751 13:53:10.068411  APIC: 04: enabled 1

 1752 13:53:10.068492  APIC: 02: enabled 1

 1753 13:53:10.071694  APIC: 06: enabled 1

 1754 13:53:10.075296  PCI: 01:00.0: enabled 1

 1755 13:53:10.078586  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms

 1756 13:53:10.085015  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1757 13:53:10.088483  ELOG: NV offset 0xf30000 size 0x1000

 1758 13:53:10.095143  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1759 13:53:10.101858  ELOG: Event(17) added with size 13 at 2023-06-06 13:53:07 UTC

 1760 13:53:10.108262  ELOG: Event(92) added with size 9 at 2023-06-06 13:53:07 UTC

 1761 13:53:10.115108  ELOG: Event(93) added with size 9 at 2023-06-06 13:53:07 UTC

 1762 13:53:10.121791  ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:07 UTC

 1763 13:53:10.128659  ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:07 UTC

 1764 13:53:10.131887  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1765 13:53:10.138944  ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:07 UTC

 1766 13:53:10.148776  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1767 13:53:10.151946  ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:07 UTC

 1768 13:53:10.158536  elog_add_boot_reason: Logged dev mode boot

 1769 13:53:10.161991  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1770 13:53:10.165120  Finalize devices...

 1771 13:53:10.168747  Devices finalized

 1772 13:53:10.171825  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1773 13:53:10.178708  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1774 13:53:10.185186  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1775 13:53:10.188680  ME: HFSTS1                      : 0x80030055

 1776 13:53:10.191884  ME: HFSTS2                      : 0x30280116

 1777 13:53:10.198430  ME: HFSTS3                      : 0x00000050

 1778 13:53:10.202086  ME: HFSTS4                      : 0x00004000

 1779 13:53:10.205207  ME: HFSTS5                      : 0x00000000

 1780 13:53:10.211640  ME: HFSTS6                      : 0x00400006

 1781 13:53:10.215606  ME: Manufacturing Mode          : YES

 1782 13:53:10.218561  ME: SPI Protection Mode Enabled : NO

 1783 13:53:10.221870  ME: FW Partition Table          : OK

 1784 13:53:10.225068  ME: Bringup Loader Failure      : NO

 1785 13:53:10.228277  ME: Firmware Init Complete      : NO

 1786 13:53:10.232073  ME: Boot Options Present        : NO

 1787 13:53:10.238554  ME: Update In Progress          : NO

 1788 13:53:10.241798  ME: D0i3 Support                : YES

 1789 13:53:10.244984  ME: Low Power State Enabled     : NO

 1790 13:53:10.248373  ME: CPU Replaced                : YES

 1791 13:53:10.251937  ME: CPU Replacement Valid       : YES

 1792 13:53:10.255209  ME: Current Working State       : 5

 1793 13:53:10.258277  ME: Current Operation State     : 1

 1794 13:53:10.261948  ME: Current Operation Mode      : 3

 1795 13:53:10.265164  ME: Error Code                  : 0

 1796 13:53:10.271725  ME: Enhanced Debug Mode         : NO

 1797 13:53:10.275088  ME: CPU Debug Disabled          : YES

 1798 13:53:10.278425  ME: TXT Support                 : NO

 1799 13:53:10.285336  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1800 13:53:10.291738  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1801 13:53:10.294984  CBFS: 'fallback/slic' not found.

 1802 13:53:10.298264  ACPI: Writing ACPI tables at 76b01000.

 1803 13:53:10.301989  ACPI:    * FACS

 1804 13:53:10.302076  ACPI:    * DSDT

 1805 13:53:10.305202  Ramoops buffer: 0x100000@0x76a00000.

 1806 13:53:10.311719  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1807 13:53:10.314976  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1808 13:53:10.318665  Google Chrome EC: version:

 1809 13:53:10.321833  	ro: voema_v2.0.7540-147f8d37d1

 1810 13:53:10.325090  	rw: voema_v2.0.7540-147f8d37d1

 1811 13:53:10.328292    running image: 2

 1812 13:53:10.335198  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1813 13:53:10.338548  ACPI:    * FADT

 1814 13:53:10.338630  SCI is IRQ9

 1815 13:53:10.341674  ACPI: added table 1/32, length now 40

 1816 13:53:10.344924  ACPI:     * SSDT

 1817 13:53:10.348493  Found 1 CPU(s) with 8 core(s) each.

 1818 13:53:10.351650  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1819 13:53:10.354862  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1820 13:53:10.361999  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1821 13:53:10.364949  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1822 13:53:10.371677  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1823 13:53:10.374969  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1824 13:53:10.381849  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1825 13:53:10.384905  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1826 13:53:10.391567  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1827 13:53:10.398746  \_SB.PCI0.RP09: Added StorageD3Enable property

 1828 13:53:10.401678  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1829 13:53:10.404925  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1830 13:53:10.412552  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1831 13:53:10.416227  PS2K: Passing 80 keymaps to kernel

 1832 13:53:10.422777  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1833 13:53:10.429693  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1834 13:53:10.435618  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1835 13:53:10.442330  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1836 13:53:10.449060  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1837 13:53:10.455713  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1838 13:53:10.462749  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1839 13:53:10.469079  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1840 13:53:10.472309  ACPI: added table 2/32, length now 44

 1841 13:53:10.475407  ACPI:    * MCFG

 1842 13:53:10.478672  ACPI: added table 3/32, length now 48

 1843 13:53:10.478778  ACPI:    * TPM2

 1844 13:53:10.482176  TPM2 log created at 0x769f0000

 1845 13:53:10.485464  ACPI: added table 4/32, length now 52

 1846 13:53:10.488681  ACPI:    * MADT

 1847 13:53:10.488825  SCI is IRQ9

 1848 13:53:10.492526  ACPI: added table 5/32, length now 56

 1849 13:53:10.495805  current = 76b09850

 1850 13:53:10.495907  ACPI:    * DMAR

 1851 13:53:10.499104  ACPI: added table 6/32, length now 60

 1852 13:53:10.505521  ACPI: added table 7/32, length now 64

 1853 13:53:10.505621  ACPI:    * HPET

 1854 13:53:10.508896  ACPI: added table 8/32, length now 68

 1855 13:53:10.512276  ACPI: done.

 1856 13:53:10.512353  ACPI tables: 35216 bytes.

 1857 13:53:10.515516  smbios_write_tables: 769ef000

 1858 13:53:10.519164  EC returned error result code 3

 1859 13:53:10.522277  Couldn't obtain OEM name from CBI

 1860 13:53:10.526137  Create SMBIOS type 16

 1861 13:53:10.529441  Create SMBIOS type 17

 1862 13:53:10.532627  GENERIC: 0.0 (WIFI Device)

 1863 13:53:10.532734  SMBIOS tables: 1750 bytes.

 1864 13:53:10.539202  Writing table forward entry at 0x00000500

 1865 13:53:10.545775  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1866 13:53:10.549044  Writing coreboot table at 0x76b25000

 1867 13:53:10.555594   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1868 13:53:10.559384   1. 0000000000001000-000000000009ffff: RAM

 1869 13:53:10.562272   2. 00000000000a0000-00000000000fffff: RESERVED

 1870 13:53:10.569309   3. 0000000000100000-00000000769eefff: RAM

 1871 13:53:10.572377   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1872 13:53:10.579073   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1873 13:53:10.585640   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1874 13:53:10.588939   7. 0000000077000000-000000007fbfffff: RESERVED

 1875 13:53:10.592294   8. 00000000c0000000-00000000cfffffff: RESERVED

 1876 13:53:10.599049   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1877 13:53:10.602535  10. 00000000fb000000-00000000fb000fff: RESERVED

 1878 13:53:10.609054  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1879 13:53:10.612192  12. 00000000fed80000-00000000fed87fff: RESERVED

 1880 13:53:10.619021  13. 00000000fed90000-00000000fed92fff: RESERVED

 1881 13:53:10.622242  14. 00000000feda0000-00000000feda1fff: RESERVED

 1882 13:53:10.628994  15. 00000000fedc0000-00000000feddffff: RESERVED

 1883 13:53:10.632367  16. 0000000100000000-00000002803fffff: RAM

 1884 13:53:10.635578  Passing 4 GPIOs to payload:

 1885 13:53:10.638749              NAME |       PORT | POLARITY |     VALUE

 1886 13:53:10.645359               lid |  undefined |     high |      high

 1887 13:53:10.648990             power |  undefined |     high |       low

 1888 13:53:10.655446             oprom |  undefined |     high |       low

 1889 13:53:10.662578          EC in RW | 0x000000e5 |     high |      high

 1890 13:53:10.665695  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a9d6

 1891 13:53:10.669095  coreboot table: 1576 bytes.

 1892 13:53:10.672330  IMD ROOT    0. 0x76fff000 0x00001000

 1893 13:53:10.679169  IMD SMALL   1. 0x76ffe000 0x00001000

 1894 13:53:10.682050  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1895 13:53:10.685621  VPD         3. 0x76c4d000 0x00000367

 1896 13:53:10.689121  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1897 13:53:10.692191  CONSOLE     5. 0x76c2c000 0x00020000

 1898 13:53:10.695587  FMAP        6. 0x76c2b000 0x00000578

 1899 13:53:10.698802  TIME STAMP  7. 0x76c2a000 0x00000910

 1900 13:53:10.702139  VBOOT WORK  8. 0x76c16000 0x00014000

 1901 13:53:10.705890  ROMSTG STCK 9. 0x76c15000 0x00001000

 1902 13:53:10.712218  AFTER CAR  10. 0x76c0a000 0x0000b000

 1903 13:53:10.715682  RAMSTAGE   11. 0x76b97000 0x00073000

 1904 13:53:10.719246  REFCODE    12. 0x76b42000 0x00055000

 1905 13:53:10.722620  SMM BACKUP 13. 0x76b32000 0x00010000

 1906 13:53:10.725797  4f444749   14. 0x76b30000 0x00002000

 1907 13:53:10.728762  EXT VBT15. 0x76b2d000 0x0000219f

 1908 13:53:10.732479  COREBOOT   16. 0x76b25000 0x00008000

 1909 13:53:10.735770  ACPI       17. 0x76b01000 0x00024000

 1910 13:53:10.739136  ACPI GNVS  18. 0x76b00000 0x00001000

 1911 13:53:10.745657  RAMOOPS    19. 0x76a00000 0x00100000

 1912 13:53:10.748903  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1913 13:53:10.752406  SMBIOS     21. 0x769ef000 0x00000800

 1914 13:53:10.752522  IMD small region:

 1915 13:53:10.755752    IMD ROOT    0. 0x76ffec00 0x00000400

 1916 13:53:10.762439    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1917 13:53:10.765919    POWER STATE 2. 0x76ffeb80 0x00000044

 1918 13:53:10.769028    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1919 13:53:10.772417    MEM INFO    4. 0x76ffe980 0x000001e0

 1920 13:53:10.779201  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1921 13:53:10.782710  MTRR: Physical address space:

 1922 13:53:10.789210  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1923 13:53:10.795797  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1924 13:53:10.799518  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1925 13:53:10.805723  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1926 13:53:10.812307  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1927 13:53:10.819167  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1928 13:53:10.825661  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1929 13:53:10.829322  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 13:53:10.832700  MTRR: Fixed MSR 0x258 0x0606060606060606

 1931 13:53:10.839332  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 13:53:10.842473  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 13:53:10.845818  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 13:53:10.849389  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 13:53:10.855762  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 13:53:10.859062  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 13:53:10.862866  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 13:53:10.865636  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 13:53:10.872486  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 13:53:10.875742  call enable_fixed_mtrr()

 1941 13:53:10.878988  CPU physical address size: 39 bits

 1942 13:53:10.882231  MTRR: default type WB/UC MTRR counts: 6/6.

 1943 13:53:10.885845  MTRR: UC selected as default type.

 1944 13:53:10.892342  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1945 13:53:10.898927  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1946 13:53:10.905937  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1947 13:53:10.912257  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1948 13:53:10.915673  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1949 13:53:10.922486  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1950 13:53:10.926547  

 1951 13:53:10.926621  MTRR check

 1952 13:53:10.929749  Fixed MTRRs   : Enabled

 1953 13:53:10.929826  Variable MTRRs: Enabled

 1954 13:53:10.929890  

 1955 13:53:10.936350  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 13:53:10.940042  MTRR: Fixed MSR 0x258 0x0606060606060606

 1957 13:53:10.943392  MTRR: Fixed MSR 0x259 0x0000000000000000

 1958 13:53:10.946506  MTRR: Fixed MSR 0x268 0x0606060606060606

 1959 13:53:10.953328  MTRR: Fixed MSR 0x269 0x0606060606060606

 1960 13:53:10.956335  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1961 13:53:10.959830  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1962 13:53:10.962989  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1963 13:53:10.966751  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1964 13:53:10.973253  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1965 13:53:10.976705  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1966 13:53:10.983324  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1967 13:53:10.986655  call enable_fixed_mtrr()

 1968 13:53:10.989874  Checking cr50 for pending updates

 1969 13:53:10.994308  CPU physical address size: 39 bits

 1970 13:53:10.997481  MTRR: Fixed MSR 0x250 0x0606060606060606

 1971 13:53:11.000986  MTRR: Fixed MSR 0x250 0x0606060606060606

 1972 13:53:11.004250  MTRR: Fixed MSR 0x258 0x0606060606060606

 1973 13:53:11.007679  MTRR: Fixed MSR 0x259 0x0000000000000000

 1974 13:53:11.014413  MTRR: Fixed MSR 0x268 0x0606060606060606

 1975 13:53:11.017382  MTRR: Fixed MSR 0x269 0x0606060606060606

 1976 13:53:11.020973  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1977 13:53:11.023976  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1978 13:53:11.030694  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1979 13:53:11.034402  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1980 13:53:11.037718  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1981 13:53:11.040890  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1982 13:53:11.048342  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 13:53:11.051726  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 13:53:11.055014  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 13:53:11.058289  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 13:53:11.064909  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 13:53:11.068146  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 13:53:11.071770  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 13:53:11.075046  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 13:53:11.081426  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 13:53:11.084892  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 13:53:11.088333  call enable_fixed_mtrr()

 1993 13:53:11.091488  call enable_fixed_mtrr()

 1994 13:53:11.094791  MTRR: Fixed MSR 0x250 0x0606060606060606

 1995 13:53:11.098309  MTRR: Fixed MSR 0x250 0x0606060606060606

 1996 13:53:11.101386  MTRR: Fixed MSR 0x258 0x0606060606060606

 1997 13:53:11.108318  MTRR: Fixed MSR 0x259 0x0000000000000000

 1998 13:53:11.111576  MTRR: Fixed MSR 0x268 0x0606060606060606

 1999 13:53:11.114903  MTRR: Fixed MSR 0x269 0x0606060606060606

 2000 13:53:11.117999  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2001 13:53:11.121667  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2002 13:53:11.128043  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2003 13:53:11.131287  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2004 13:53:11.134738  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2005 13:53:11.137956  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2006 13:53:11.145880  MTRR: Fixed MSR 0x258 0x0606060606060606

 2007 13:53:11.145964  call enable_fixed_mtrr()

 2008 13:53:11.152286  MTRR: Fixed MSR 0x259 0x0000000000000000

 2009 13:53:11.155562  MTRR: Fixed MSR 0x268 0x0606060606060606

 2010 13:53:11.158815  MTRR: Fixed MSR 0x269 0x0606060606060606

 2011 13:53:11.162070  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2012 13:53:11.169338  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2013 13:53:11.172381  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2014 13:53:11.175697  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2015 13:53:11.178817  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2016 13:53:11.185491  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2017 13:53:11.188625  CPU physical address size: 39 bits

 2018 13:53:11.192311  call enable_fixed_mtrr()

 2019 13:53:11.195460  CPU physical address size: 39 bits

 2020 13:53:11.198683  CPU physical address size: 39 bits

 2021 13:53:11.205429  MTRR: Fixed MSR 0x250 0x0606060606060606

 2022 13:53:11.209040  MTRR: Fixed MSR 0x250 0x0606060606060606

 2023 13:53:11.211788  MTRR: Fixed MSR 0x258 0x0606060606060606

 2024 13:53:11.215080  MTRR: Fixed MSR 0x259 0x0000000000000000

 2025 13:53:11.221827  MTRR: Fixed MSR 0x268 0x0606060606060606

 2026 13:53:11.225145  MTRR: Fixed MSR 0x269 0x0606060606060606

 2027 13:53:11.228607  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2028 13:53:11.232122  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2029 13:53:11.238361  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2030 13:53:11.242109  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2031 13:53:11.245451  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2032 13:53:11.248255  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2033 13:53:11.255537  MTRR: Fixed MSR 0x258 0x0606060606060606

 2034 13:53:11.255617  call enable_fixed_mtrr()

 2035 13:53:11.262037  MTRR: Fixed MSR 0x259 0x0000000000000000

 2036 13:53:11.265643  MTRR: Fixed MSR 0x268 0x0606060606060606

 2037 13:53:11.268886  MTRR: Fixed MSR 0x269 0x0606060606060606

 2038 13:53:11.272104  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2039 13:53:11.278726  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2040 13:53:11.281959  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2041 13:53:11.285344  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2042 13:53:11.289063  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2043 13:53:11.291896  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2044 13:53:11.298613  CPU physical address size: 39 bits

 2045 13:53:11.301970  call enable_fixed_mtrr()

 2046 13:53:11.305342  CPU physical address size: 39 bits

 2047 13:53:11.308818  CPU physical address size: 39 bits

 2048 13:53:11.312169  Reading cr50 TPM mode

 2049 13:53:11.321293  BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms

 2050 13:53:11.331353  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2051 13:53:11.334337  Checking segment from ROM address 0xffc02b38

 2052 13:53:11.338097  Checking segment from ROM address 0xffc02b54

 2053 13:53:11.344835  Loading segment from ROM address 0xffc02b38

 2054 13:53:11.344915    code (compression=0)

 2055 13:53:11.354394    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2056 13:53:11.361062  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2057 13:53:11.364339  it's not compressed!

 2058 13:53:11.503645  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2059 13:53:11.510676  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2060 13:53:11.517334  Loading segment from ROM address 0xffc02b54

 2061 13:53:11.517422    Entry Point 0x30000000

 2062 13:53:11.520631  Loaded segments

 2063 13:53:11.527236  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2064 13:53:11.570020  Finalizing chipset.

 2065 13:53:11.573275  Finalizing SMM.

 2066 13:53:11.573384  APMC done.

 2067 13:53:11.579762  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2068 13:53:11.583129  mp_park_aps done after 0 msecs.

 2069 13:53:11.586400  Jumping to boot code at 0x30000000(0x76b25000)

 2070 13:53:11.596856  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2071 13:53:11.596941  

 2072 13:53:11.597008  

 2073 13:53:11.597070  

 2074 13:53:11.599786  Starting depthcharge on Voema...

 2075 13:53:11.599856  

 2076 13:53:11.600187  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2077 13:53:11.600291  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2078 13:53:11.600403  Setting prompt string to ['volteer:']
 2079 13:53:11.600508  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2080 13:53:11.610039  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2081 13:53:11.610151  

 2082 13:53:11.616514  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2083 13:53:11.616619  

 2084 13:53:11.619624  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2085 13:53:11.624050  

 2086 13:53:11.624127  Failed to find eMMC card reader

 2087 13:53:11.624192  

 2088 13:53:11.627303  Wipe memory regions:

 2089 13:53:11.627399  

 2090 13:53:11.630715  	[0x00000000001000, 0x000000000a0000)

 2091 13:53:11.630843  

 2092 13:53:11.634078  	[0x00000000100000, 0x00000030000000)

 2093 13:53:11.661483  

 2094 13:53:11.664615  	[0x00000032662db0, 0x000000769ef000)

 2095 13:53:11.699494  

 2096 13:53:11.702869  	[0x00000100000000, 0x00000280400000)

 2097 13:53:11.901647  

 2098 13:53:11.905178  ec_init: CrosEC protocol v3 supported (256, 256)

 2099 13:53:11.905263  

 2100 13:53:11.911745  update_port_state: port C0 state: usb enable 1 mux conn 0

 2101 13:53:11.911844  

 2102 13:53:11.921549  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2103 13:53:11.921654  

 2104 13:53:11.928459  pmc_check_ipc_sts: STS_BUSY done after 2312 us

 2105 13:53:11.928559  

 2106 13:53:11.931558  send_conn_disc_msg: pmc_send_cmd succeeded

 2107 13:53:12.364410  

 2108 13:53:12.364574  R8152: Initializing

 2109 13:53:12.364676  

 2110 13:53:12.367668  Version 6 (ocp_data = 5c30)

 2111 13:53:12.367769  

 2112 13:53:12.370955  R8152: Done initializing

 2113 13:53:12.371054  

 2114 13:53:12.374379  Adding net device

 2115 13:53:12.676260  

 2116 13:53:12.679547  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2117 13:53:12.679645  

 2118 13:53:12.679711  

 2119 13:53:12.679773  

 2120 13:53:12.682986  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2122 13:53:12.783355  volteer: tftpboot 192.168.201.1 10607010/tftp-deploy-nl44_s7a/kernel/bzImage 10607010/tftp-deploy-nl44_s7a/kernel/cmdline 10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz

 2123 13:53:12.783513  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2124 13:53:12.783599  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2125 13:53:12.787431  tftpboot 192.168.201.1 10607010/tftp-deploy-nl44_s7a/kernel/bzIploy-nl44_s7a/kernel/cmdline 10607010/tftp-deploy-nl44_s7a/ramdisk/ramdisk.cpio.gz

 2126 13:53:12.787518  

 2127 13:53:12.787584  Waiting for link

 2128 13:53:12.992058  

 2129 13:53:12.992213  done.

 2130 13:53:12.992285  

 2131 13:53:12.992347  MAC: 00:24:32:30:78:74

 2132 13:53:12.992406  

 2133 13:53:12.995735  Sending DHCP discover... done.

 2134 13:53:12.995819  

 2135 13:53:12.998758  Waiting for reply... done.

 2136 13:53:12.998840  

 2137 13:53:13.001980  Sending DHCP request... done.

 2138 13:53:13.002089  

 2139 13:53:13.009164  Waiting for reply... done.

 2140 13:53:13.009248  

 2141 13:53:13.009313  My ip is 192.168.201.14

 2142 13:53:13.009374  

 2143 13:53:13.012478  The DHCP server ip is 192.168.201.1

 2144 13:53:13.015855  

 2145 13:53:13.019653  TFTP server IP predefined by user: 192.168.201.1

 2146 13:53:13.019737  

 2147 13:53:13.025608  Bootfile predefined by user: 10607010/tftp-deploy-nl44_s7a/kernel/bzImage

 2148 13:53:13.025692  

 2149 13:53:13.028750  Sending tftp read request... done.

 2150 13:53:13.028859  

 2151 13:53:13.032279  Waiting for the transfer... 

 2152 13:53:13.032362  

 2153 13:53:13.592899  00000000 ################################################################

 2154 13:53:13.593029  

 2155 13:53:14.151171  00080000 ################################################################

 2156 13:53:14.151307  

 2157 13:53:14.703263  00100000 ################################################################

 2158 13:53:14.703454  

 2159 13:53:15.251973  00180000 ################################################################

 2160 13:53:15.252194  

 2161 13:53:15.772945  00200000 ################################################################

 2162 13:53:15.773100  

 2163 13:53:16.320705  00280000 ################################################################

 2164 13:53:16.320877  

 2165 13:53:16.837363  00300000 ################################################################

 2166 13:53:16.837503  

 2167 13:53:17.349702  00380000 ################################################################

 2168 13:53:17.349869  

 2169 13:53:17.867573  00400000 ################################################################

 2170 13:53:17.867725  

 2171 13:53:18.376644  00480000 ################################################################

 2172 13:53:18.376817  

 2173 13:53:18.888252  00500000 ################################################################

 2174 13:53:18.888401  

 2175 13:53:19.404879  00580000 ################################################################

 2176 13:53:19.405014  

 2177 13:53:19.934111  00600000 ################################################################

 2178 13:53:19.934251  

 2179 13:53:20.462400  00680000 ################################################################

 2180 13:53:20.462548  

 2181 13:53:20.996909  00700000 ################################################################

 2182 13:53:20.997056  

 2183 13:53:21.013732  00780000 ## done.

 2184 13:53:21.013875  

 2185 13:53:21.017088  The bootfile was 7880592 bytes long.

 2186 13:53:21.017176  

 2187 13:53:21.020389  Sending tftp read request... done.

 2188 13:53:21.020476  

 2189 13:53:21.023442  Waiting for the transfer... 

 2190 13:53:21.023545  

 2191 13:53:21.544530  00000000 ################################################################

 2192 13:53:21.544708  

 2193 13:53:22.050952  00080000 ################################################################

 2194 13:53:22.051110  

 2195 13:53:22.563881  00100000 ################################################################

 2196 13:53:22.564049  

 2197 13:53:23.110596  00180000 ################################################################

 2198 13:53:23.110820  

 2199 13:53:23.666301  00200000 ################################################################

 2200 13:53:23.666438  

 2201 13:53:24.210187  00280000 ################################################################

 2202 13:53:24.210322  

 2203 13:53:24.770953  00300000 ################################################################

 2204 13:53:24.771118  

 2205 13:53:25.435210  00380000 ################################################################

 2206 13:53:25.435792  

 2207 13:53:25.994195  00400000 ################################################################

 2208 13:53:25.994334  

 2209 13:53:26.540422  00480000 ################################################################

 2210 13:53:26.540597  

 2211 13:53:27.106000  00500000 ################################################################

 2212 13:53:27.106134  

 2213 13:53:27.670058  00580000 ################################################################

 2214 13:53:27.670197  

 2215 13:53:28.210485  00600000 ################################################################

 2216 13:53:28.210623  

 2217 13:53:28.751983  00680000 ################################################################

 2218 13:53:28.752121  

 2219 13:53:29.404574  00700000 ################################################################

 2220 13:53:29.404710  

 2221 13:53:29.940740  00780000 ################################################################

 2222 13:53:29.940913  

 2223 13:53:30.491124  00800000 ################################################################

 2224 13:53:30.491261  

 2225 13:53:31.035032  00880000 ################################################################

 2226 13:53:31.035163  

 2227 13:53:31.577142  00900000 ################################################################

 2228 13:53:31.577281  

 2229 13:53:32.118033  00980000 ################################################################

 2230 13:53:32.118196  

 2231 13:53:32.657557  00a00000 ################################################################

 2232 13:53:32.657721  

 2233 13:53:33.301424  00a80000 ################################################################

 2234 13:53:33.302060  

 2235 13:53:33.924257  00b00000 ################################################################

 2236 13:53:33.924417  

 2237 13:53:34.477648  00b80000 ################################################################

 2238 13:53:34.477783  

 2239 13:53:35.014747  00c00000 ################################################################

 2240 13:53:35.014908  

 2241 13:53:35.551930  00c80000 ################################################################

 2242 13:53:35.552081  

 2243 13:53:36.092697  00d00000 ################################################################

 2244 13:53:36.092880  

 2245 13:53:36.631449  00d80000 ################################################################

 2246 13:53:36.631588  

 2247 13:53:37.163532  00e00000 ################################################################

 2248 13:53:37.163684  

 2249 13:53:37.696441  00e80000 ################################################################

 2250 13:53:37.696632  

 2251 13:53:38.232187  00f00000 ################################################################

 2252 13:53:38.232362  

 2253 13:53:38.764681  00f80000 ################################################################

 2254 13:53:38.764856  

 2255 13:53:39.302315  01000000 ################################################################

 2256 13:53:39.302449  

 2257 13:53:39.835511  01080000 ################################################################

 2258 13:53:39.835687  

 2259 13:53:40.354692  01100000 ################################################################

 2260 13:53:40.354836  

 2261 13:53:40.866824  01180000 ################################################################

 2262 13:53:40.867006  

 2263 13:53:41.379138  01200000 ################################################################

 2264 13:53:41.379320  

 2265 13:53:41.890177  01280000 ################################################################

 2266 13:53:41.890318  

 2267 13:53:42.403597  01300000 ################################################################

 2268 13:53:42.403761  

 2269 13:53:42.917024  01380000 ################################################################

 2270 13:53:42.917219  

 2271 13:53:43.430731  01400000 ################################################################

 2272 13:53:43.430901  

 2273 13:53:43.968016  01480000 ################################################################

 2274 13:53:43.968162  

 2275 13:53:44.512622  01500000 ################################################################

 2276 13:53:44.512824  

 2277 13:53:45.050484  01580000 ################################################################

 2278 13:53:45.050655  

 2279 13:53:45.591371  01600000 ################################################################

 2280 13:53:45.591538  

 2281 13:53:46.134463  01680000 ################################################################

 2282 13:53:46.134600  

 2283 13:53:46.676199  01700000 ################################################################

 2284 13:53:46.676337  

 2285 13:53:47.219493  01780000 ################################################################

 2286 13:53:47.219640  

 2287 13:53:47.767125  01800000 ################################################################

 2288 13:53:47.767275  

 2289 13:53:48.308700  01880000 ################################################################

 2290 13:53:48.308881  

 2291 13:53:48.852291  01900000 ################################################################

 2292 13:53:48.852432  

 2293 13:53:49.398130  01980000 ################################################################

 2294 13:53:49.398270  

 2295 13:53:49.942421  01a00000 ################################################################

 2296 13:53:49.942583  

 2297 13:53:50.483418  01a80000 ################################################################

 2298 13:53:50.483593  

 2299 13:53:51.000865  01b00000 ################################################################

 2300 13:53:51.001002  

 2301 13:53:51.514545  01b80000 ################################################################

 2302 13:53:51.514716  

 2303 13:53:52.032629  01c00000 ################################################################

 2304 13:53:52.032847  

 2305 13:53:52.546352  01c80000 ################################################################

 2306 13:53:52.546511  

 2307 13:53:53.071185  01d00000 ################################################################

 2308 13:53:53.071375  

 2309 13:53:53.599239  01d80000 ################################################################

 2310 13:53:53.599430  

 2311 13:53:54.126572  01e00000 ################################################################

 2312 13:53:54.126704  

 2313 13:53:54.650600  01e80000 ################################################################

 2314 13:53:54.650771  

 2315 13:53:55.177100  01f00000 ################################################################

 2316 13:53:55.177283  

 2317 13:53:55.696215  01f80000 ################################################################

 2318 13:53:55.696370  

 2319 13:53:56.222424  02000000 ################################################################

 2320 13:53:56.222582  

 2321 13:53:56.745317  02080000 ################################################################

 2322 13:53:56.745458  

 2323 13:53:57.262777  02100000 ################################################################

 2324 13:53:57.262929  

 2325 13:53:57.791643  02180000 ################################################################

 2326 13:53:57.791808  

 2327 13:53:58.218346  02200000 ###################################################### done.

 2328 13:53:58.218487  

 2329 13:53:58.221564  Sending tftp read request... done.

 2330 13:53:58.221645  

 2331 13:53:58.224846  Waiting for the transfer... 

 2332 13:53:58.224945  

 2333 13:53:58.225011  00000000 # done.

 2334 13:53:58.225075  

 2335 13:53:58.234798  Command line loaded dynamically from TFTP file: 10607010/tftp-deploy-nl44_s7a/kernel/cmdline

 2336 13:53:58.234905  

 2337 13:53:58.248071  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2338 13:53:58.256159  

 2339 13:53:58.259481  Shutting down all USB controllers.

 2340 13:53:58.259594  

 2341 13:53:58.259690  Removing current net device

 2342 13:53:58.259795  

 2343 13:53:58.262719  Finalizing coreboot

 2344 13:53:58.262826  

 2345 13:53:58.269172  Exiting depthcharge with code 4 at timestamp: 55379669

 2346 13:53:58.269293  

 2347 13:53:58.269410  

 2348 13:53:58.269533  Starting kernel ...

 2349 13:53:58.269668  

 2350 13:53:58.269795  

 2351 13:53:58.270517  end: 2.2.4 bootloader-commands (duration 00:00:47) [common]
 2352 13:53:58.270677  start: 2.2.5 auto-login-action (timeout 00:03:58) [common]
 2353 13:53:58.270820  Setting prompt string to ['Linux version [0-9]']
 2354 13:53:58.270959  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2355 13:53:58.271068  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2357 13:57:56.271493  end: 2.2.5 auto-login-action (duration 00:03:58) [common]
 2359 13:57:56.272532  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 238 seconds'
 2361 13:57:56.273425  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2364 13:57:56.275152  end: 2 depthcharge-action (duration 00:05:00) [common]
 2366 13:57:56.276195  Cleaning after the job
 2367 13:57:56.276622  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/ramdisk
 2368 13:57:56.294488  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/kernel
 2369 13:57:56.297612  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607010/tftp-deploy-nl44_s7a/modules
 2370 13:57:56.298609  start: 4.1 power-off (timeout 00:00:30) [common]
 2371 13:57:56.299019  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
 2372 13:57:56.398901  >> Command sent successfully.

 2373 13:57:56.404991  Returned 0 in 0 seconds
 2374 13:57:56.505987  end: 4.1 power-off (duration 00:00:00) [common]
 2376 13:57:56.507533  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2377 13:57:56.508895  Listened to connection for namespace 'common' for up to 1s
 2378 13:57:57.509037  Finalising connection for namespace 'common'
 2379 13:57:57.509708  Disconnecting from shell: Finalise
 2380 13:57:57.510165  

 2381 13:57:57.611118  end: 4.2 read-feedback (duration 00:00:01) [common]
 2382 13:57:57.611796  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607010
 2383 13:57:57.710413  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607010
 2384 13:57:57.710589  JobError: Your job cannot terminate cleanly.