Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:52:41.163274 lava-dispatcher, installed at version: 2023.05.1
2 13:52:41.163495 start: 0 validate
3 13:52:41.163625 Start time: 2023-06-06 13:52:41.163617+00:00 (UTC)
4 13:52:41.163760 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:52:41.163943 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:52:41.458752 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:52:41.458935 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:52:41.742421 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:52:41.742625 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:52:44.930686 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:52:44.930916 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:52:45.216640 validate duration: 4.05
14 13:52:45.216897 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:52:45.216995 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:52:45.217082 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:52:45.217213 Not decompressing ramdisk as can be used compressed.
18 13:52:45.217302 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/initrd.cpio.gz
19 13:52:45.217367 saving as /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/ramdisk/initrd.cpio.gz
20 13:52:45.217428 total size: 6136227 (5MB)
21 13:52:45.782248 progress 0% (0MB)
22 13:52:45.783908 progress 5% (0MB)
23 13:52:45.785934 progress 10% (0MB)
24 13:52:45.788185 progress 15% (0MB)
25 13:52:45.792388 progress 20% (1MB)
26 13:52:45.794529 progress 25% (1MB)
27 13:52:45.797507 progress 30% (1MB)
28 13:52:45.801230 progress 35% (2MB)
29 13:52:45.802872 progress 40% (2MB)
30 13:52:45.804599 progress 45% (2MB)
31 13:52:45.808323 progress 50% (2MB)
32 13:52:45.811966 progress 55% (3MB)
33 13:52:45.816506 progress 60% (3MB)
34 13:52:45.818943 progress 65% (3MB)
35 13:52:45.821711 progress 70% (4MB)
36 13:52:45.823385 progress 75% (4MB)
37 13:52:45.825088 progress 80% (4MB)
38 13:52:45.827475 progress 85% (5MB)
39 13:52:45.830175 progress 90% (5MB)
40 13:52:45.831827 progress 95% (5MB)
41 13:52:45.833779 progress 100% (5MB)
42 13:52:45.833925 5MB downloaded in 0.62s (9.49MB/s)
43 13:52:45.834079 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:52:45.834319 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:52:45.834406 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:52:45.834495 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:52:45.834631 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:52:45.834704 saving as /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/kernel/bzImage
50 13:52:45.834796 total size: 7880592 (7MB)
51 13:52:45.834884 No compression specified
52 13:52:45.836124 progress 0% (0MB)
53 13:52:45.838351 progress 5% (0MB)
54 13:52:45.840427 progress 10% (0MB)
55 13:52:45.842512 progress 15% (1MB)
56 13:52:45.844623 progress 20% (1MB)
57 13:52:45.846696 progress 25% (1MB)
58 13:52:45.848804 progress 30% (2MB)
59 13:52:45.850929 progress 35% (2MB)
60 13:52:45.853093 progress 40% (3MB)
61 13:52:45.855253 progress 45% (3MB)
62 13:52:45.857298 progress 50% (3MB)
63 13:52:45.859431 progress 55% (4MB)
64 13:52:45.861560 progress 60% (4MB)
65 13:52:45.863598 progress 65% (4MB)
66 13:52:45.865718 progress 70% (5MB)
67 13:52:45.867916 progress 75% (5MB)
68 13:52:45.869944 progress 80% (6MB)
69 13:52:45.872083 progress 85% (6MB)
70 13:52:45.874216 progress 90% (6MB)
71 13:52:45.876259 progress 95% (7MB)
72 13:52:45.878443 progress 100% (7MB)
73 13:52:45.878624 7MB downloaded in 0.04s (171.44MB/s)
74 13:52:45.878767 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:52:45.879000 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:52:45.879089 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:52:45.879175 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:52:45.879307 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/full.rootfs.tar.xz
80 13:52:45.879378 saving as /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/nfsrootfs/full.rootfs.tar
81 13:52:45.879442 total size: 202642916 (193MB)
82 13:52:45.879505 Using unxz to decompress xz
83 13:52:45.884382 progress 0% (0MB)
84 13:52:46.474788 progress 5% (9MB)
85 13:52:47.006693 progress 10% (19MB)
86 13:52:47.579300 progress 15% (29MB)
87 13:52:47.853677 progress 20% (38MB)
88 13:52:48.406130 progress 25% (48MB)
89 13:52:49.047568 progress 30% (58MB)
90 13:52:49.632834 progress 35% (67MB)
91 13:52:50.208949 progress 40% (77MB)
92 13:52:50.791910 progress 45% (86MB)
93 13:52:51.408020 progress 50% (96MB)
94 13:52:52.115565 progress 55% (106MB)
95 13:52:52.826401 progress 60% (115MB)
96 13:52:53.328985 progress 65% (125MB)
97 13:52:53.441458 progress 70% (135MB)
98 13:52:53.619011 progress 75% (144MB)
99 13:52:54.058568 progress 80% (154MB)
100 13:52:54.341465 progress 85% (164MB)
101 13:52:54.589477 progress 90% (173MB)
102 13:52:54.966366 progress 95% (183MB)
103 13:52:55.567702 progress 100% (193MB)
104 13:52:55.572748 193MB downloaded in 9.69s (19.94MB/s)
105 13:52:55.573043 end: 1.3.1 http-download (duration 00:00:10) [common]
107 13:52:55.573365 end: 1.3 download-retry (duration 00:00:10) [common]
108 13:52:55.573494 start: 1.4 download-retry (timeout 00:09:50) [common]
109 13:52:55.573619 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 13:52:55.573797 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:52:55.573899 saving as /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/modules/modules.tar
112 13:52:55.573995 total size: 251288 (0MB)
113 13:52:55.574089 Using unxz to decompress xz
114 13:52:55.577804 progress 13% (0MB)
115 13:52:55.578206 progress 26% (0MB)
116 13:52:55.578488 progress 39% (0MB)
117 13:52:55.579785 progress 52% (0MB)
118 13:52:55.581630 progress 65% (0MB)
119 13:52:55.583718 progress 78% (0MB)
120 13:52:55.585620 progress 91% (0MB)
121 13:52:55.587453 progress 100% (0MB)
122 13:52:55.593104 0MB downloaded in 0.02s (12.55MB/s)
123 13:52:55.593438 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:52:55.593863 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:52:55.593996 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 13:52:55.594128 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 13:53:00.324600 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607044/extract-nfsrootfs-erirhgyz
129 13:53:00.324828 end: 1.5.1 extract-nfsrootfs (duration 00:00:05) [common]
130 13:53:00.324930 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
131 13:53:00.325111 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r
132 13:53:00.325243 makedir: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin
133 13:53:00.325346 makedir: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/tests
134 13:53:00.325446 makedir: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/results
135 13:53:00.325550 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-add-keys
136 13:53:00.325727 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-add-sources
137 13:53:00.325853 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-background-process-start
138 13:53:00.325982 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-background-process-stop
139 13:53:00.326103 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-common-functions
140 13:53:00.326225 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-echo-ipv4
141 13:53:00.326354 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-install-packages
142 13:53:00.326474 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-installed-packages
143 13:53:00.326591 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-os-build
144 13:53:00.326710 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-probe-channel
145 13:53:00.326830 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-probe-ip
146 13:53:00.326948 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-target-ip
147 13:53:00.327068 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-target-mac
148 13:53:00.327185 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-target-storage
149 13:53:00.327306 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-case
150 13:53:00.327426 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-event
151 13:53:00.327544 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-feedback
152 13:53:00.327663 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-raise
153 13:53:00.327782 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-reference
154 13:53:00.327940 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-runner
155 13:53:00.328065 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-set
156 13:53:00.328193 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-test-shell
157 13:53:00.328316 Updating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-add-keys (debian)
158 13:53:01.176021 Updating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-add-sources (debian)
159 13:53:01.177256 Updating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-install-packages (debian)
160 13:53:01.177437 Updating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-installed-packages (debian)
161 13:53:01.177583 Updating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/bin/lava-os-build (debian)
162 13:53:01.177708 Creating /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/environment
163 13:53:01.177826 LAVA metadata
164 13:53:01.177903 - LAVA_JOB_ID=10607044
165 13:53:01.177972 - LAVA_DISPATCHER_IP=192.168.201.1
166 13:53:01.178096 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:44) [common]
167 13:53:01.178167 skipped lava-vland-overlay
168 13:53:01.178246 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 13:53:01.178328 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:44) [common]
170 13:53:01.178391 skipped lava-multinode-overlay
171 13:53:01.178465 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 13:53:01.178545 start: 1.5.2.3 test-definition (timeout 00:09:44) [common]
173 13:53:01.178623 Loading test definitions
174 13:53:01.178717 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:44) [common]
175 13:53:01.178790 Using /lava-10607044 at stage 0
176 13:53:01.179244 uuid=10607044_1.5.2.3.1 testdef=None
177 13:53:01.179393 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 13:53:01.179488 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
179 13:53:01.179993 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 13:53:01.180224 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
182 13:53:01.180765 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 13:53:01.181000 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
185 13:53:02.049562 runner path: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/0/tests/0_timesync-off test_uuid 10607044_1.5.2.3.1
186 13:53:02.049789 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:01) [common]
188 13:53:02.050032 start: 1.5.2.3.5 git-repo-action (timeout 00:09:43) [common]
189 13:53:02.050122 Using /lava-10607044 at stage 0
190 13:53:02.050234 Fetching tests from https://github.com/kernelci/test-definitions.git
191 13:53:02.050318 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/0/tests/1_kselftest-alsa'
192 13:53:13.961044 Running '/usr/bin/git checkout kernelci.org
193 13:53:14.104439 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 13:53:14.105140 uuid=10607044_1.5.2.3.5 testdef=None
195 13:53:14.105297 end: 1.5.2.3.5 git-repo-action (duration 00:00:12) [common]
197 13:53:14.105542 start: 1.5.2.3.6 test-overlay (timeout 00:09:31) [common]
198 13:53:14.106282 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 13:53:14.106522 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:31) [common]
201 13:53:14.107472 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 13:53:14.107706 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:31) [common]
204 13:53:14.108665 runner path: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/0/tests/1_kselftest-alsa test_uuid 10607044_1.5.2.3.5
205 13:53:14.108758 BOARD='asus-C436FA-Flip-hatch'
206 13:53:14.108831 BRANCH='cip'
207 13:53:14.108895 SKIPFILE='/dev/null'
208 13:53:14.108958 SKIP_INSTALL='True'
209 13:53:14.109016 TESTPROG_URL='None'
210 13:53:14.109074 TST_CASENAME=''
211 13:53:14.109130 TST_CMDFILES='alsa'
212 13:53:14.109271 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 13:53:14.109477 Creating lava-test-runner.conf files
215 13:53:14.109542 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607044/lava-overlay-6r_jw86r/lava-10607044/0 for stage 0
216 13:53:14.109634 - 0_timesync-off
217 13:53:14.109712 - 1_kselftest-alsa
218 13:53:14.109813 end: 1.5.2.3 test-definition (duration 00:00:13) [common]
219 13:53:14.109902 start: 1.5.2.4 compress-overlay (timeout 00:09:31) [common]
220 13:53:21.656899 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 13:53:21.657100 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:24) [common]
222 13:53:21.657314 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 13:53:21.657453 end: 1.5.2 lava-overlay (duration 00:00:21) [common]
224 13:53:21.657576 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:24) [common]
225 13:53:21.818517 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 13:53:21.818922 start: 1.5.4 extract-modules (timeout 00:09:23) [common]
227 13:53:21.819071 extracting modules file /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607044/extract-nfsrootfs-erirhgyz
228 13:53:21.837845 extracting modules file /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607044/extract-overlay-ramdisk-_pg8gl46/ramdisk
229 13:53:21.856228 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 13:53:21.856413 start: 1.5.5 apply-overlay-tftp (timeout 00:09:23) [common]
231 13:53:21.856519 [common] Applying overlay to NFS
232 13:53:21.856620 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607044/compress-overlay-ychhvdmc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607044/extract-nfsrootfs-erirhgyz
233 13:53:22.858565 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 13:53:22.858777 start: 1.5.6 configure-preseed-file (timeout 00:09:22) [common]
235 13:53:22.858874 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 13:53:22.858968 start: 1.5.7 compress-ramdisk (timeout 00:09:22) [common]
237 13:53:22.859054 Building ramdisk /var/lib/lava/dispatcher/tmp/10607044/extract-overlay-ramdisk-_pg8gl46/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607044/extract-overlay-ramdisk-_pg8gl46/ramdisk
238 13:53:22.936258 >> 30664 blocks
239 13:53:23.595313 rename /var/lib/lava/dispatcher/tmp/10607044/extract-overlay-ramdisk-_pg8gl46/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
240 13:53:23.595770 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 13:53:23.595934 start: 1.5.8 prepare-kernel (timeout 00:09:22) [common]
242 13:53:23.596058 start: 1.5.8.1 prepare-fit (timeout 00:09:22) [common]
243 13:53:23.596156 No mkimage arch provided, not using FIT.
244 13:53:23.596252 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 13:53:23.596340 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 13:53:23.596450 end: 1.5 prepare-tftp-overlay (duration 00:00:28) [common]
247 13:53:23.596562 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:22) [common]
248 13:53:23.596672 No LXC device requested
249 13:53:23.596790 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 13:53:23.596921 start: 1.7 deploy-device-env (timeout 00:09:22) [common]
251 13:53:23.597036 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 13:53:23.597151 Checking files for TFTP limit of 4294967296 bytes.
253 13:53:23.597693 end: 1 tftp-deploy (duration 00:00:38) [common]
254 13:53:23.597836 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 13:53:23.597961 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 13:53:23.598167 substitutions:
257 13:53:23.598281 - {DTB}: None
258 13:53:23.598378 - {INITRD}: 10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
259 13:53:23.598470 - {KERNEL}: 10607044/tftp-deploy-u3c78iws/kernel/bzImage
260 13:53:23.598570 - {LAVA_MAC}: None
261 13:53:23.598674 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607044/extract-nfsrootfs-erirhgyz
262 13:53:23.598772 - {NFS_SERVER_IP}: 192.168.201.1
263 13:53:23.598862 - {PRESEED_CONFIG}: None
264 13:53:23.598949 - {PRESEED_LOCAL}: None
265 13:53:23.599045 - {RAMDISK}: 10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
266 13:53:23.599146 - {ROOT_PART}: None
267 13:53:23.599236 - {ROOT}: None
268 13:53:23.599322 - {SERVER_IP}: 192.168.201.1
269 13:53:23.599409 - {TEE}: None
270 13:53:23.599497 Parsed boot commands:
271 13:53:23.599593 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 13:53:23.599845 Parsed boot commands: tftpboot 192.168.201.1 10607044/tftp-deploy-u3c78iws/kernel/bzImage 10607044/tftp-deploy-u3c78iws/kernel/cmdline 10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
273 13:53:23.599948 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 13:53:23.600052 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 13:53:23.600198 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 13:53:23.600323 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 13:53:23.600424 Not connected, no need to disconnect.
278 13:53:23.600533 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 13:53:23.600664 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 13:53:23.600773 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
281 13:53:23.604510 Setting prompt string to ['lava-test: # ']
282 13:53:23.604935 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 13:53:23.605090 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 13:53:23.605229 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 13:53:23.605360 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 13:53:23.605707 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
287 13:53:28.746281 >> Command sent successfully.
288 13:53:28.748689 Returned 0 in 5 seconds
289 13:53:28.849053 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 13:53:28.849497 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 13:53:28.849633 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 13:53:28.849753 Setting prompt string to 'Starting depthcharge on Helios...'
294 13:53:28.849856 Changing prompt to 'Starting depthcharge on Helios...'
295 13:53:28.849959 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 13:53:28.850453 [Enter `^Ec?' for help]
297 13:53:29.470101
298 13:53:29.470280
299 13:53:29.480270 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 13:53:29.483500 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 13:53:29.490206 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 13:53:29.493136 CPU: AES supported, TXT NOT supported, VT supported
303 13:53:29.500035 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 13:53:29.504092 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 13:53:29.510147 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 13:53:29.513647 VBOOT: Loading verstage.
307 13:53:29.516856 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 13:53:29.523368 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 13:53:29.527020 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 13:53:29.530498 CBFS @ c08000 size 3f8000
311 13:53:29.536642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 13:53:29.539907 CBFS: Locating 'fallback/verstage'
313 13:53:29.543112 CBFS: Found @ offset 10fb80 size 1072c
314 13:53:29.546913
315 13:53:29.547016
316 13:53:29.556930 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 13:53:29.570769 Probing TPM: . done!
318 13:53:29.574155 TPM ready after 0 ms
319 13:53:29.577356 Connected to device vid:did:rid of 1ae0:0028:00
320 13:53:29.587536 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 13:53:29.591146 Initialized TPM device CR50 revision 0
322 13:53:29.638212 tlcl_send_startup: Startup return code is 0
323 13:53:29.638372 TPM: setup succeeded
324 13:53:29.650918 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 13:53:29.655165 Chrome EC: UHEPI supported
326 13:53:29.658428 Phase 1
327 13:53:29.661627 FMAP: area GBB found @ c05000 (12288 bytes)
328 13:53:29.668460 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 13:53:29.668596 Phase 2
330 13:53:29.671629 Phase 3
331 13:53:29.674893 FMAP: area GBB found @ c05000 (12288 bytes)
332 13:53:29.681469 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 13:53:29.688121 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 13:53:29.691825 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 13:53:29.698398 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 13:53:29.713701 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 13:53:29.717201 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 13:53:29.723408 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 13:53:29.727711 Phase 4
340 13:53:29.731249 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 13:53:29.737637 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 13:53:29.917185 VB2:vb2_rsa_verify_digest() Digest check failed!
343 13:53:29.923699 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 13:53:29.923809 Saving nvdata
345 13:53:29.927563 Reboot requested (10020007)
346 13:53:29.930590 board_reset() called!
347 13:53:29.930670 full_reset() called!
348 13:53:34.445413
349 13:53:34.445572
350 13:53:34.448895 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 13:53:34.452334 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 13:53:34.456053 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 13:53:34.460056 CPU: AES supported, TXT NOT supported, VT supported
354 13:53:34.467557 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 13:53:34.471361 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 13:53:34.475096 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 13:53:34.479692 VBOOT: Loading verstage.
358 13:53:34.487169 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 13:53:34.490718 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 13:53:34.494783 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 13:53:34.498660 CBFS @ c08000 size 3f8000
362 13:53:34.502398 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 13:53:34.506262 CBFS: Locating 'fallback/verstage'
364 13:53:34.510050 CBFS: Found @ offset 10fb80 size 1072c
365 13:53:34.513813
366 13:53:34.513908
367 13:53:34.524892 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 13:53:34.538901 Probing TPM: . done!
369 13:53:34.538997 TPM ready after 0 ms
370 13:53:34.546422 Connected to device vid:did:rid of 1ae0:0028:00
371 13:53:34.554157 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
372 13:53:34.557845 Initialized TPM device CR50 revision 0
373 13:53:34.622516 tlcl_send_startup: Startup return code is 0
374 13:53:34.622651 TPM: setup succeeded
375 13:53:34.634777 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 13:53:34.639058 Chrome EC: UHEPI supported
377 13:53:34.641958 Phase 1
378 13:53:34.645656 FMAP: area GBB found @ c05000 (12288 bytes)
379 13:53:34.652063 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 13:53:34.658792 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 13:53:34.661816 Recovery requested (1009000e)
382 13:53:34.667522 Saving nvdata
383 13:53:34.673722 tlcl_extend: response is 0
384 13:53:34.682945 tlcl_extend: response is 0
385 13:53:34.689582 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 13:53:34.693105 CBFS @ c08000 size 3f8000
387 13:53:34.699590 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 13:53:34.703029 CBFS: Locating 'fallback/romstage'
389 13:53:34.706309 CBFS: Found @ offset 80 size 145fc
390 13:53:34.709539 Accumulated console time in verstage 99 ms
391 13:53:34.709678
392 13:53:34.709787
393 13:53:34.722837 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 13:53:34.729140 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 13:53:34.732657 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 13:53:34.736024 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 13:53:34.742760 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 13:53:34.745880 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 13:53:34.749214 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 13:53:34.752547 TCO_STS: 0000 0000
401 13:53:34.756220 GEN_PMCON: e0015238 00000200
402 13:53:34.759389 GBLRST_CAUSE: 00000000 00000000
403 13:53:34.759820 prev_sleep_state 5
404 13:53:34.762863 Boot Count incremented to 63692
405 13:53:34.769756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 13:53:34.772918 CBFS @ c08000 size 3f8000
407 13:53:34.779447 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 13:53:34.779966 CBFS: Locating 'fspm.bin'
409 13:53:34.785870 CBFS: Found @ offset 5ffc0 size 71000
410 13:53:34.789323 Chrome EC: UHEPI supported
411 13:53:34.795857 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 13:53:34.800074 Probing TPM: done!
413 13:53:34.806358 Connected to device vid:did:rid of 1ae0:0028:00
414 13:53:34.816270 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
415 13:53:34.822322 Initialized TPM device CR50 revision 0
416 13:53:34.831141 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 13:53:34.838008 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 13:53:34.841327 MRC cache found, size 1948
419 13:53:34.844092 bootmode is set to: 2
420 13:53:34.847467 PRMRR disabled by config.
421 13:53:34.850734 SPD INDEX = 1
422 13:53:34.854558 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 13:53:34.857669 CBFS @ c08000 size 3f8000
424 13:53:34.864375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 13:53:34.864803 CBFS: Locating 'spd.bin'
426 13:53:34.867771 CBFS: Found @ offset 5fb80 size 400
427 13:53:34.870585 SPD: module type is LPDDR3
428 13:53:34.874128 SPD: module part is
429 13:53:34.880724 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 13:53:34.884039 SPD: device width 4 bits, bus width 8 bits
431 13:53:34.887680 SPD: module size is 4096 MB (per channel)
432 13:53:34.890813 memory slot: 0 configuration done.
433 13:53:34.893891 memory slot: 2 configuration done.
434 13:53:34.945625 CBMEM:
435 13:53:34.948727 IMD: root @ 99fff000 254 entries.
436 13:53:34.952005 IMD: root @ 99ffec00 62 entries.
437 13:53:34.955201 External stage cache:
438 13:53:34.958515 IMD: root @ 9abff000 254 entries.
439 13:53:34.962095 IMD: root @ 9abfec00 62 entries.
440 13:53:34.965389 Chrome EC: clear events_b mask to 0x0000000020004000
441 13:53:34.981487 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 13:53:34.994715 tlcl_write: response is 0
443 13:53:35.003779 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 13:53:35.010152 MRC: TPM MRC hash updated successfully.
445 13:53:35.010589 2 DIMMs found
446 13:53:35.013897 SMM Memory Map
447 13:53:35.016731 SMRAM : 0x9a000000 0x1000000
448 13:53:35.020192 Subregion 0: 0x9a000000 0xa00000
449 13:53:35.023514 Subregion 1: 0x9aa00000 0x200000
450 13:53:35.026871 Subregion 2: 0x9ac00000 0x400000
451 13:53:35.030092 top_of_ram = 0x9a000000
452 13:53:35.033332 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 13:53:35.040125 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 13:53:35.043417 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 13:53:35.049944 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 13:53:35.053487 CBFS @ c08000 size 3f8000
457 13:53:35.056743 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 13:53:35.060272 CBFS: Locating 'fallback/postcar'
459 13:53:35.067563 CBFS: Found @ offset 107000 size 4b44
460 13:53:35.070091 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 13:53:35.082677 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 13:53:35.086287 Processing 180 relocs. Offset value of 0x97c0c000
463 13:53:35.094354 Accumulated console time in romstage 286 ms
464 13:53:35.094687
465 13:53:35.095063
466 13:53:35.104413 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 13:53:35.110675 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 13:53:35.113873 CBFS @ c08000 size 3f8000
469 13:53:35.117308 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 13:53:35.123835 CBFS: Locating 'fallback/ramstage'
471 13:53:35.127263 CBFS: Found @ offset 43380 size 1b9e8
472 13:53:35.134193 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 13:53:35.166274 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 13:53:35.169065 Processing 3976 relocs. Offset value of 0x98db0000
475 13:53:35.176111 Accumulated console time in postcar 52 ms
476 13:53:35.176218
477 13:53:35.176286
478 13:53:35.185846 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 13:53:35.192402 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 13:53:35.195660 WARNING: RO_VPD is uninitialized or empty.
481 13:53:35.199163 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 13:53:35.206043 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 13:53:35.206138 Normal boot.
484 13:53:35.212178 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 13:53:35.215571 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 13:53:35.218980 CBFS @ c08000 size 3f8000
487 13:53:35.225846 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 13:53:35.229121 CBFS: Locating 'cpu_microcode_blob.bin'
489 13:53:35.232416 CBFS: Found @ offset 14700 size 2ec00
490 13:53:35.235464 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 13:53:35.238568 Skip microcode update
492 13:53:35.245284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 13:53:35.245382 CBFS @ c08000 size 3f8000
494 13:53:35.251790 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 13:53:35.255437 CBFS: Locating 'fsps.bin'
496 13:53:35.258778 CBFS: Found @ offset d1fc0 size 35000
497 13:53:35.284050 Detected 4 core, 8 thread CPU.
498 13:53:35.287344 Setting up SMI for CPU
499 13:53:35.290582 IED base = 0x9ac00000
500 13:53:35.290679 IED size = 0x00400000
501 13:53:35.293744 Will perform SMM setup.
502 13:53:35.300426 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 13:53:35.307191 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 13:53:35.310472 Processing 16 relocs. Offset value of 0x00030000
505 13:53:35.314561 Attempting to start 7 APs
506 13:53:35.317575 Waiting for 10ms after sending INIT.
507 13:53:35.333648 Waiting for 1st SIPI to complete...done.
508 13:53:35.333767 AP: slot 7 apic_id 7.
509 13:53:35.337085 AP: slot 6 apic_id 6.
510 13:53:35.340269 AP: slot 5 apic_id 5.
511 13:53:35.340358 AP: slot 2 apic_id 4.
512 13:53:35.343533 AP: slot 1 apic_id 3.
513 13:53:35.347393 AP: slot 4 apic_id 2.
514 13:53:35.347481 AP: slot 3 apic_id 1.
515 13:53:35.353709 Waiting for 2nd SIPI to complete...done.
516 13:53:35.360318 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 13:53:35.363700 Processing 13 relocs. Offset value of 0x00038000
518 13:53:35.370467 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 13:53:35.376910 Installing SMM handler to 0x9a000000
520 13:53:35.383346 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 13:53:35.386799 Processing 658 relocs. Offset value of 0x9a010000
522 13:53:35.396611 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 13:53:35.400033 Processing 13 relocs. Offset value of 0x9a008000
524 13:53:35.406666 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 13:53:35.413683 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 13:53:35.416908 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 13:53:35.423438 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 13:53:35.430273 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 13:53:35.436922 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 13:53:35.440103 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 13:53:35.446674 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 13:53:35.450405 Clearing SMI status registers
533 13:53:35.453222 SMI_STS: PM1
534 13:53:35.453317 PM1_STS: PWRBTN
535 13:53:35.456431 TCO_STS: SECOND_TO
536 13:53:35.459884 New SMBASE 0x9a000000
537 13:53:35.463354 In relocation handler: CPU 0
538 13:53:35.466698 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 13:53:35.469633 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 13:53:35.473440 Relocation complete.
541 13:53:35.476671 New SMBASE 0x99fff400
542 13:53:35.476767 In relocation handler: CPU 3
543 13:53:35.483272 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 13:53:35.486656 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 13:53:35.490004 Relocation complete.
546 13:53:35.492965 New SMBASE 0x99fffc00
547 13:53:35.493057 In relocation handler: CPU 1
548 13:53:35.499664 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
549 13:53:35.503617 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 13:53:35.506422 Relocation complete.
551 13:53:35.506514 New SMBASE 0x99fff000
552 13:53:35.509592 In relocation handler: CPU 4
553 13:53:35.516680 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
554 13:53:35.520114 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 13:53:35.523345 Relocation complete.
556 13:53:35.523438 New SMBASE 0x99ffe400
557 13:53:35.526454 In relocation handler: CPU 7
558 13:53:35.529835 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
559 13:53:35.536573 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 13:53:35.539408 Relocation complete.
561 13:53:35.539499 New SMBASE 0x99ffe800
562 13:53:35.542818 In relocation handler: CPU 6
563 13:53:35.546730 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
564 13:53:35.553207 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 13:53:35.556543 Relocation complete.
566 13:53:35.556642 New SMBASE 0x99fff800
567 13:53:35.559466 In relocation handler: CPU 2
568 13:53:35.562817 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
569 13:53:35.569623 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 13:53:35.569728 Relocation complete.
571 13:53:35.572942 New SMBASE 0x99ffec00
572 13:53:35.576327 In relocation handler: CPU 5
573 13:53:35.579578 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
574 13:53:35.586027 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 13:53:35.586143 Relocation complete.
576 13:53:35.589472 Initializing CPU #0
577 13:53:35.592724 CPU: vendor Intel device 806ec
578 13:53:35.595853 CPU: family 06, model 8e, stepping 0c
579 13:53:35.599406 Clearing out pending MCEs
580 13:53:35.603074 Setting up local APIC...
581 13:53:35.603167 apic_id: 0x00 done.
582 13:53:35.606105 Turbo is available but hidden
583 13:53:35.609307 Turbo is available and visible
584 13:53:35.612453 VMX status: enabled
585 13:53:35.615756 IA32_FEATURE_CONTROL status: locked
586 13:53:35.619082 Skip microcode update
587 13:53:35.619178 CPU #0 initialized
588 13:53:35.622916 Initializing CPU #3
589 13:53:35.625720 Initializing CPU #1
590 13:53:35.625834 Initializing CPU #4
591 13:53:35.629666 CPU: vendor Intel device 806ec
592 13:53:35.632498 CPU: family 06, model 8e, stepping 0c
593 13:53:35.635787 CPU: vendor Intel device 806ec
594 13:53:35.639183 CPU: family 06, model 8e, stepping 0c
595 13:53:35.642939 Clearing out pending MCEs
596 13:53:35.646233 Clearing out pending MCEs
597 13:53:35.648956 Setting up local APIC...
598 13:53:35.649048 Initializing CPU #6
599 13:53:35.652651 Initializing CPU #7
600 13:53:35.655880 CPU: vendor Intel device 806ec
601 13:53:35.659031 CPU: family 06, model 8e, stepping 0c
602 13:53:35.662569 CPU: vendor Intel device 806ec
603 13:53:35.665968 CPU: family 06, model 8e, stepping 0c
604 13:53:35.669158 Clearing out pending MCEs
605 13:53:35.672684 Clearing out pending MCEs
606 13:53:35.672816 Setting up local APIC...
607 13:53:35.676140 CPU: vendor Intel device 806ec
608 13:53:35.679433 CPU: family 06, model 8e, stepping 0c
609 13:53:35.682951 Clearing out pending MCEs
610 13:53:35.685904 Setting up local APIC...
611 13:53:35.689085 Setting up local APIC...
612 13:53:35.689213 Initializing CPU #5
613 13:53:35.692657 Initializing CPU #2
614 13:53:35.695855 apic_id: 0x02 done.
615 13:53:35.695990 apic_id: 0x03 done.
616 13:53:35.699089 VMX status: enabled
617 13:53:35.699208 VMX status: enabled
618 13:53:35.705655 IA32_FEATURE_CONTROL status: locked
619 13:53:35.709018 IA32_FEATURE_CONTROL status: locked
620 13:53:35.709167 Skip microcode update
621 13:53:35.712500 Skip microcode update
622 13:53:35.715972 CPU #4 initialized
623 13:53:35.716086 CPU #1 initialized
624 13:53:35.718698 Setting up local APIC...
625 13:53:35.722003 apic_id: 0x06 done.
626 13:53:35.722112 apic_id: 0x07 done.
627 13:53:35.725411 VMX status: enabled
628 13:53:35.725525 VMX status: enabled
629 13:53:35.732223 IA32_FEATURE_CONTROL status: locked
630 13:53:35.735435 IA32_FEATURE_CONTROL status: locked
631 13:53:35.735555 Skip microcode update
632 13:53:35.738745 Skip microcode update
633 13:53:35.772003 CPU #6 initialized
634 13:53:35.772181 CPU #7 initialized
635 13:53:35.772285 CPU: vendor Intel device 806ec
636 13:53:35.772435 CPU: family 06, model 8e, stepping 0c
637 13:53:35.772540 CPU: vendor Intel device 806ec
638 13:53:35.772637 CPU: family 06, model 8e, stepping 0c
639 13:53:35.772728 Clearing out pending MCEs
640 13:53:35.772818 Clearing out pending MCEs
641 13:53:35.772906 Setting up local APIC...
642 13:53:35.772993 apic_id: 0x01 done.
643 13:53:35.773082 apic_id: 0x04 done.
644 13:53:35.773383 Setting up local APIC...
645 13:53:35.773485 VMX status: enabled
646 13:53:35.775433 apic_id: 0x05 done.
647 13:53:35.778522 VMX status: enabled
648 13:53:35.778641 VMX status: enabled
649 13:53:35.782066 IA32_FEATURE_CONTROL status: locked
650 13:53:35.785461 IA32_FEATURE_CONTROL status: locked
651 13:53:35.788606 Skip microcode update
652 13:53:35.791741 Skip microcode update
653 13:53:35.791894 CPU #2 initialized
654 13:53:35.795129 CPU #5 initialized
655 13:53:35.798616 IA32_FEATURE_CONTROL status: locked
656 13:53:35.801993 Skip microcode update
657 13:53:35.802087 CPU #3 initialized
658 13:53:35.808521 bsp_do_flight_plan done after 452 msecs.
659 13:53:35.811688 CPU: frequency set to 4200 MHz
660 13:53:35.811829 Enabling SMIs.
661 13:53:35.811914 Locking SMM.
662 13:53:35.828180 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 13:53:35.831640 CBFS @ c08000 size 3f8000
664 13:53:35.838250 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 13:53:35.838387 CBFS: Locating 'vbt.bin'
666 13:53:35.841346 CBFS: Found @ offset 5f5c0 size 499
667 13:53:35.848187 Found a VBT of 4608 bytes after decompression
668 13:53:36.032429 Display FSP Version Info HOB
669 13:53:36.035945 Reference Code - CPU = 9.0.1e.30
670 13:53:36.039129 uCode Version = 0.0.0.ca
671 13:53:36.042088 TXT ACM version = ff.ff.ff.ffff
672 13:53:36.045670 Display FSP Version Info HOB
673 13:53:36.048753 Reference Code - ME = 9.0.1e.30
674 13:53:36.052222 MEBx version = 0.0.0.0
675 13:53:36.055544 ME Firmware Version = Consumer SKU
676 13:53:36.058725 Display FSP Version Info HOB
677 13:53:36.062156 Reference Code - CML PCH = 9.0.1e.30
678 13:53:36.065375 PCH-CRID Status = Disabled
679 13:53:36.068602 PCH-CRID Original Value = ff.ff.ff.ffff
680 13:53:36.072087 PCH-CRID New Value = ff.ff.ff.ffff
681 13:53:36.075358 OPROM - RST - RAID = ff.ff.ff.ffff
682 13:53:36.078873 ChipsetInit Base Version = ff.ff.ff.ffff
683 13:53:36.081907 ChipsetInit Oem Version = ff.ff.ff.ffff
684 13:53:36.085784 Display FSP Version Info HOB
685 13:53:36.092490 Reference Code - SA - System Agent = 9.0.1e.30
686 13:53:36.095114 Reference Code - MRC = 0.7.1.6c
687 13:53:36.095216 SA - PCIe Version = 9.0.1e.30
688 13:53:36.098684 SA-CRID Status = Disabled
689 13:53:36.101870 SA-CRID Original Value = 0.0.0.c
690 13:53:36.105292 SA-CRID New Value = 0.0.0.c
691 13:53:36.108521 OPROM - VBIOS = ff.ff.ff.ffff
692 13:53:36.112131 RTC Init
693 13:53:36.115500 Set power on after power failure.
694 13:53:36.115617 Disabling Deep S3
695 13:53:36.118335 Disabling Deep S3
696 13:53:36.118416 Disabling Deep S4
697 13:53:36.121713 Disabling Deep S4
698 13:53:36.121796 Disabling Deep S5
699 13:53:36.125009 Disabling Deep S5
700 13:53:36.131543 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
701 13:53:36.131654 Enumerating buses...
702 13:53:36.138123 Show all devs... Before device enumeration.
703 13:53:36.138254 Root Device: enabled 1
704 13:53:36.141456 CPU_CLUSTER: 0: enabled 1
705 13:53:36.144912 DOMAIN: 0000: enabled 1
706 13:53:36.148511 APIC: 00: enabled 1
707 13:53:36.148599 PCI: 00:00.0: enabled 1
708 13:53:36.151785 PCI: 00:02.0: enabled 1
709 13:53:36.155287 PCI: 00:04.0: enabled 0
710 13:53:36.158120 PCI: 00:05.0: enabled 0
711 13:53:36.158214 PCI: 00:12.0: enabled 1
712 13:53:36.161612 PCI: 00:12.5: enabled 0
713 13:53:36.164816 PCI: 00:12.6: enabled 0
714 13:53:36.164913 PCI: 00:14.0: enabled 1
715 13:53:36.168081 PCI: 00:14.1: enabled 0
716 13:53:36.171356 PCI: 00:14.3: enabled 1
717 13:53:36.175150 PCI: 00:14.5: enabled 0
718 13:53:36.175251 PCI: 00:15.0: enabled 1
719 13:53:36.178031 PCI: 00:15.1: enabled 1
720 13:53:36.181671 PCI: 00:15.2: enabled 0
721 13:53:36.184689 PCI: 00:15.3: enabled 0
722 13:53:36.184787 PCI: 00:16.0: enabled 1
723 13:53:36.187886 PCI: 00:16.1: enabled 0
724 13:53:36.191416 PCI: 00:16.2: enabled 0
725 13:53:36.194598 PCI: 00:16.3: enabled 0
726 13:53:36.194693 PCI: 00:16.4: enabled 0
727 13:53:36.198117 PCI: 00:16.5: enabled 0
728 13:53:36.201607 PCI: 00:17.0: enabled 1
729 13:53:36.201714 PCI: 00:19.0: enabled 1
730 13:53:36.205066 PCI: 00:19.1: enabled 0
731 13:53:36.207780 PCI: 00:19.2: enabled 0
732 13:53:36.211029 PCI: 00:1a.0: enabled 0
733 13:53:36.211123 PCI: 00:1c.0: enabled 0
734 13:53:36.214600 PCI: 00:1c.1: enabled 0
735 13:53:36.217920 PCI: 00:1c.2: enabled 0
736 13:53:36.221374 PCI: 00:1c.3: enabled 0
737 13:53:36.221469 PCI: 00:1c.4: enabled 0
738 13:53:36.225258 PCI: 00:1c.5: enabled 0
739 13:53:36.228201 PCI: 00:1c.6: enabled 0
740 13:53:36.230914 PCI: 00:1c.7: enabled 0
741 13:53:36.231005 PCI: 00:1d.0: enabled 1
742 13:53:36.234604 PCI: 00:1d.1: enabled 0
743 13:53:36.237611 PCI: 00:1d.2: enabled 0
744 13:53:36.241307 PCI: 00:1d.3: enabled 0
745 13:53:36.241403 PCI: 00:1d.4: enabled 0
746 13:53:36.244076 PCI: 00:1d.5: enabled 1
747 13:53:36.247452 PCI: 00:1e.0: enabled 1
748 13:53:36.247550 PCI: 00:1e.1: enabled 0
749 13:53:36.250697 PCI: 00:1e.2: enabled 1
750 13:53:36.254779 PCI: 00:1e.3: enabled 1
751 13:53:36.257505 PCI: 00:1f.0: enabled 1
752 13:53:36.257612 PCI: 00:1f.1: enabled 1
753 13:53:36.260754 PCI: 00:1f.2: enabled 1
754 13:53:36.264119 PCI: 00:1f.3: enabled 1
755 13:53:36.267456 PCI: 00:1f.4: enabled 1
756 13:53:36.267552 PCI: 00:1f.5: enabled 1
757 13:53:36.270730 PCI: 00:1f.6: enabled 0
758 13:53:36.274127 USB0 port 0: enabled 1
759 13:53:36.274225 I2C: 00:15: enabled 1
760 13:53:36.277416 I2C: 00:5d: enabled 1
761 13:53:36.281237 GENERIC: 0.0: enabled 1
762 13:53:36.283819 I2C: 00:1a: enabled 1
763 13:53:36.283937 I2C: 00:38: enabled 1
764 13:53:36.287235 I2C: 00:39: enabled 1
765 13:53:36.290888 I2C: 00:3a: enabled 1
766 13:53:36.290985 I2C: 00:3b: enabled 1
767 13:53:36.294106 PCI: 00:00.0: enabled 1
768 13:53:36.297514 SPI: 00: enabled 1
769 13:53:36.297610 SPI: 01: enabled 1
770 13:53:36.300430 PNP: 0c09.0: enabled 1
771 13:53:36.303863 USB2 port 0: enabled 1
772 13:53:36.303971 USB2 port 1: enabled 1
773 13:53:36.307113 USB2 port 2: enabled 0
774 13:53:36.310752 USB2 port 3: enabled 0
775 13:53:36.310845 USB2 port 5: enabled 0
776 13:53:36.313847 USB2 port 6: enabled 1
777 13:53:36.317052 USB2 port 9: enabled 1
778 13:53:36.317147 USB3 port 0: enabled 1
779 13:53:36.320710 USB3 port 1: enabled 1
780 13:53:36.324099 USB3 port 2: enabled 1
781 13:53:36.327468 USB3 port 3: enabled 1
782 13:53:36.327564 USB3 port 4: enabled 0
783 13:53:36.330543 APIC: 03: enabled 1
784 13:53:36.330634 APIC: 04: enabled 1
785 13:53:36.334215 APIC: 01: enabled 1
786 13:53:36.337542 APIC: 02: enabled 1
787 13:53:36.337634 APIC: 05: enabled 1
788 13:53:36.340630 APIC: 06: enabled 1
789 13:53:36.343579 APIC: 07: enabled 1
790 13:53:36.343670 Compare with tree...
791 13:53:36.347267 Root Device: enabled 1
792 13:53:36.350251 CPU_CLUSTER: 0: enabled 1
793 13:53:36.350376 APIC: 00: enabled 1
794 13:53:36.354117 APIC: 03: enabled 1
795 13:53:36.357302 APIC: 04: enabled 1
796 13:53:36.357401 APIC: 01: enabled 1
797 13:53:36.360425 APIC: 02: enabled 1
798 13:53:36.363853 APIC: 05: enabled 1
799 13:53:36.363963 APIC: 06: enabled 1
800 13:53:36.366836 APIC: 07: enabled 1
801 13:53:36.370520 DOMAIN: 0000: enabled 1
802 13:53:36.373510 PCI: 00:00.0: enabled 1
803 13:53:36.377186 PCI: 00:02.0: enabled 1
804 13:53:36.377287 PCI: 00:04.0: enabled 0
805 13:53:36.380039 PCI: 00:05.0: enabled 0
806 13:53:36.383557 PCI: 00:12.0: enabled 1
807 13:53:36.386963 PCI: 00:12.5: enabled 0
808 13:53:36.387062 PCI: 00:12.6: enabled 0
809 13:53:36.389963 PCI: 00:14.0: enabled 1
810 13:53:36.393926 USB0 port 0: enabled 1
811 13:53:36.396609 USB2 port 0: enabled 1
812 13:53:36.399909 USB2 port 1: enabled 1
813 13:53:36.403666 USB2 port 2: enabled 0
814 13:53:36.403764 USB2 port 3: enabled 0
815 13:53:36.407250 USB2 port 5: enabled 0
816 13:53:36.409774 USB2 port 6: enabled 1
817 13:53:36.413086 USB2 port 9: enabled 1
818 13:53:36.416592 USB3 port 0: enabled 1
819 13:53:36.416687 USB3 port 1: enabled 1
820 13:53:36.419902 USB3 port 2: enabled 1
821 13:53:36.423212 USB3 port 3: enabled 1
822 13:53:36.426371 USB3 port 4: enabled 0
823 13:53:36.429759 PCI: 00:14.1: enabled 0
824 13:53:36.433098 PCI: 00:14.3: enabled 1
825 13:53:36.433193 PCI: 00:14.5: enabled 0
826 13:53:36.436415 PCI: 00:15.0: enabled 1
827 13:53:36.439572 I2C: 00:15: enabled 1
828 13:53:36.443354 PCI: 00:15.1: enabled 1
829 13:53:36.443453 I2C: 00:5d: enabled 1
830 13:53:36.446479 GENERIC: 0.0: enabled 1
831 13:53:36.449637 PCI: 00:15.2: enabled 0
832 13:53:36.453167 PCI: 00:15.3: enabled 0
833 13:53:36.456338 PCI: 00:16.0: enabled 1
834 13:53:36.456439 PCI: 00:16.1: enabled 0
835 13:53:36.459510 PCI: 00:16.2: enabled 0
836 13:53:36.462650 PCI: 00:16.3: enabled 0
837 13:53:36.466220 PCI: 00:16.4: enabled 0
838 13:53:36.469515 PCI: 00:16.5: enabled 0
839 13:53:36.469609 PCI: 00:17.0: enabled 1
840 13:53:36.472697 PCI: 00:19.0: enabled 1
841 13:53:36.476188 I2C: 00:1a: enabled 1
842 13:53:36.479441 I2C: 00:38: enabled 1
843 13:53:36.482851 I2C: 00:39: enabled 1
844 13:53:36.482948 I2C: 00:3a: enabled 1
845 13:53:36.486154 I2C: 00:3b: enabled 1
846 13:53:36.489505 PCI: 00:19.1: enabled 0
847 13:53:36.492552 PCI: 00:19.2: enabled 0
848 13:53:36.492658 PCI: 00:1a.0: enabled 0
849 13:53:36.496231 PCI: 00:1c.0: enabled 0
850 13:53:36.499463 PCI: 00:1c.1: enabled 0
851 13:53:36.503058 PCI: 00:1c.2: enabled 0
852 13:53:36.505800 PCI: 00:1c.3: enabled 0
853 13:53:36.505890 PCI: 00:1c.4: enabled 0
854 13:53:36.509033 PCI: 00:1c.5: enabled 0
855 13:53:36.512592 PCI: 00:1c.6: enabled 0
856 13:53:36.515901 PCI: 00:1c.7: enabled 0
857 13:53:36.519522 PCI: 00:1d.0: enabled 1
858 13:53:36.519676 PCI: 00:1d.1: enabled 0
859 13:53:36.522543 PCI: 00:1d.2: enabled 0
860 13:53:36.525501 PCI: 00:1d.3: enabled 0
861 13:53:36.529106 PCI: 00:1d.4: enabled 0
862 13:53:36.532083 PCI: 00:1d.5: enabled 1
863 13:53:36.532209 PCI: 00:00.0: enabled 1
864 13:53:36.535596 PCI: 00:1e.0: enabled 1
865 13:53:36.538777 PCI: 00:1e.1: enabled 0
866 13:53:36.542480 PCI: 00:1e.2: enabled 1
867 13:53:36.542613 SPI: 00: enabled 1
868 13:53:36.545511 PCI: 00:1e.3: enabled 1
869 13:53:36.548946 SPI: 01: enabled 1
870 13:53:36.552217 PCI: 00:1f.0: enabled 1
871 13:53:36.552354 PNP: 0c09.0: enabled 1
872 13:53:36.555487 PCI: 00:1f.1: enabled 1
873 13:53:36.559114 PCI: 00:1f.2: enabled 1
874 13:53:36.562194 PCI: 00:1f.3: enabled 1
875 13:53:36.565510 PCI: 00:1f.4: enabled 1
876 13:53:36.565617 PCI: 00:1f.5: enabled 1
877 13:53:36.569208 PCI: 00:1f.6: enabled 0
878 13:53:36.571914 Root Device scanning...
879 13:53:36.575300 scan_static_bus for Root Device
880 13:53:36.578553 CPU_CLUSTER: 0 enabled
881 13:53:36.578702 DOMAIN: 0000 enabled
882 13:53:36.582338 DOMAIN: 0000 scanning...
883 13:53:36.585741 PCI: pci_scan_bus for bus 00
884 13:53:36.589047 PCI: 00:00.0 [8086/0000] ops
885 13:53:36.592221 PCI: 00:00.0 [8086/9b61] enabled
886 13:53:36.595406 PCI: 00:02.0 [8086/0000] bus ops
887 13:53:36.598645 PCI: 00:02.0 [8086/9b41] enabled
888 13:53:36.601967 PCI: 00:04.0 [8086/1903] disabled
889 13:53:36.605390 PCI: 00:08.0 [8086/1911] enabled
890 13:53:36.608711 PCI: 00:12.0 [8086/02f9] enabled
891 13:53:36.612124 PCI: 00:14.0 [8086/0000] bus ops
892 13:53:36.614931 PCI: 00:14.0 [8086/02ed] enabled
893 13:53:36.618909 PCI: 00:14.2 [8086/02ef] enabled
894 13:53:36.622148 PCI: 00:14.3 [8086/02f0] enabled
895 13:53:36.625091 PCI: 00:15.0 [8086/0000] bus ops
896 13:53:36.628685 PCI: 00:15.0 [8086/02e8] enabled
897 13:53:36.631794 PCI: 00:15.1 [8086/0000] bus ops
898 13:53:36.635204 PCI: 00:15.1 [8086/02e9] enabled
899 13:53:36.638585 PCI: 00:16.0 [8086/0000] ops
900 13:53:36.641930 PCI: 00:16.0 [8086/02e0] enabled
901 13:53:36.645144 PCI: 00:17.0 [8086/0000] ops
902 13:53:36.648352 PCI: 00:17.0 [8086/02d3] enabled
903 13:53:36.651594 PCI: 00:19.0 [8086/0000] bus ops
904 13:53:36.655049 PCI: 00:19.0 [8086/02c5] enabled
905 13:53:36.658255 PCI: 00:1d.0 [8086/0000] bus ops
906 13:53:36.661562 PCI: 00:1d.0 [8086/02b0] enabled
907 13:53:36.668183 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 13:53:36.668316 PCI: 00:1e.0 [8086/0000] ops
909 13:53:36.671266 PCI: 00:1e.0 [8086/02a8] enabled
910 13:53:36.674856 PCI: 00:1e.2 [8086/0000] bus ops
911 13:53:36.678291 PCI: 00:1e.2 [8086/02aa] enabled
912 13:53:36.681729 PCI: 00:1e.3 [8086/0000] bus ops
913 13:53:36.684671 PCI: 00:1e.3 [8086/02ab] enabled
914 13:53:36.687838 PCI: 00:1f.0 [8086/0000] bus ops
915 13:53:36.691076 PCI: 00:1f.0 [8086/0284] enabled
916 13:53:36.698114 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 13:53:36.704793 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 13:53:36.707731 PCI: 00:1f.3 [8086/0000] bus ops
919 13:53:36.711119 PCI: 00:1f.3 [8086/02c8] enabled
920 13:53:36.714517 PCI: 00:1f.4 [8086/0000] bus ops
921 13:53:36.717834 PCI: 00:1f.4 [8086/02a3] enabled
922 13:53:36.721488 PCI: 00:1f.5 [8086/0000] bus ops
923 13:53:36.724715 PCI: 00:1f.5 [8086/02a4] enabled
924 13:53:36.727785 PCI: Leftover static devices:
925 13:53:36.727915 PCI: 00:05.0
926 13:53:36.731085 PCI: 00:12.5
927 13:53:36.731174 PCI: 00:12.6
928 13:53:36.731242 PCI: 00:14.1
929 13:53:36.734310 PCI: 00:14.5
930 13:53:36.734399 PCI: 00:15.2
931 13:53:36.737861 PCI: 00:15.3
932 13:53:36.738006 PCI: 00:16.1
933 13:53:36.741228 PCI: 00:16.2
934 13:53:36.741360 PCI: 00:16.3
935 13:53:36.741461 PCI: 00:16.4
936 13:53:36.744589 PCI: 00:16.5
937 13:53:36.744680 PCI: 00:19.1
938 13:53:36.747651 PCI: 00:19.2
939 13:53:36.747769 PCI: 00:1a.0
940 13:53:36.747883 PCI: 00:1c.0
941 13:53:36.750972 PCI: 00:1c.1
942 13:53:36.751066 PCI: 00:1c.2
943 13:53:36.754196 PCI: 00:1c.3
944 13:53:36.754312 PCI: 00:1c.4
945 13:53:36.754409 PCI: 00:1c.5
946 13:53:36.757941 PCI: 00:1c.6
947 13:53:36.758076 PCI: 00:1c.7
948 13:53:36.761227 PCI: 00:1d.1
949 13:53:36.761325 PCI: 00:1d.2
950 13:53:36.764036 PCI: 00:1d.3
951 13:53:36.764152 PCI: 00:1d.4
952 13:53:36.764223 PCI: 00:1d.5
953 13:53:36.767782 PCI: 00:1e.1
954 13:53:36.767915 PCI: 00:1f.1
955 13:53:36.770953 PCI: 00:1f.2
956 13:53:36.771068 PCI: 00:1f.6
957 13:53:36.774135 PCI: Check your devicetree.cb.
958 13:53:36.777413 PCI: 00:02.0 scanning...
959 13:53:36.780709 scan_generic_bus for PCI: 00:02.0
960 13:53:36.784370 scan_generic_bus for PCI: 00:02.0 done
961 13:53:36.790504 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
962 13:53:36.790680 PCI: 00:14.0 scanning...
963 13:53:36.794216 scan_static_bus for PCI: 00:14.0
964 13:53:36.797333 USB0 port 0 enabled
965 13:53:36.800725 USB0 port 0 scanning...
966 13:53:36.804459 scan_static_bus for USB0 port 0
967 13:53:36.807472 USB2 port 0 enabled
968 13:53:36.807650 USB2 port 1 enabled
969 13:53:36.810788 USB2 port 2 disabled
970 13:53:36.810985 USB2 port 3 disabled
971 13:53:36.814347 USB2 port 5 disabled
972 13:53:36.817210 USB2 port 6 enabled
973 13:53:36.817384 USB2 port 9 enabled
974 13:53:36.821179 USB3 port 0 enabled
975 13:53:36.824299 USB3 port 1 enabled
976 13:53:36.824477 USB3 port 2 enabled
977 13:53:36.827044 USB3 port 3 enabled
978 13:53:36.827235 USB3 port 4 disabled
979 13:53:36.830486 USB2 port 0 scanning...
980 13:53:36.833950 scan_static_bus for USB2 port 0
981 13:53:36.837256 scan_static_bus for USB2 port 0 done
982 13:53:36.843977 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
983 13:53:36.847467 USB2 port 1 scanning...
984 13:53:36.850251 scan_static_bus for USB2 port 1
985 13:53:36.853930 scan_static_bus for USB2 port 1 done
986 13:53:36.857207 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
987 13:53:36.860475 USB2 port 6 scanning...
988 13:53:36.863623 scan_static_bus for USB2 port 6
989 13:53:36.867439 scan_static_bus for USB2 port 6 done
990 13:53:36.873942 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
991 13:53:36.877133 USB2 port 9 scanning...
992 13:53:36.880484 scan_static_bus for USB2 port 9
993 13:53:36.883768 scan_static_bus for USB2 port 9 done
994 13:53:36.887114 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
995 13:53:36.890418 USB3 port 0 scanning...
996 13:53:36.893694 scan_static_bus for USB3 port 0
997 13:53:36.896977 scan_static_bus for USB3 port 0 done
998 13:53:36.903423 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
999 13:53:36.906804 USB3 port 1 scanning...
1000 13:53:36.910082 scan_static_bus for USB3 port 1
1001 13:53:36.913820 scan_static_bus for USB3 port 1 done
1002 13:53:36.920524 scan_bus: scanning of bus USB3 port 1 took 9685 usecs
1003 13:53:36.920642 USB3 port 2 scanning...
1004 13:53:36.923327 scan_static_bus for USB3 port 2
1005 13:53:36.927112 scan_static_bus for USB3 port 2 done
1006 13:53:36.933228 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
1007 13:53:36.936675 USB3 port 3 scanning...
1008 13:53:36.939979 scan_static_bus for USB3 port 3
1009 13:53:36.943785 scan_static_bus for USB3 port 3 done
1010 13:53:36.950120 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1011 13:53:36.953165 scan_static_bus for USB0 port 0 done
1012 13:53:36.957001 scan_bus: scanning of bus USB0 port 0 took 155316 usecs
1013 13:53:36.963243 scan_static_bus for PCI: 00:14.0 done
1014 13:53:36.966487 scan_bus: scanning of bus PCI: 00:14.0 took 172930 usecs
1015 13:53:36.970257 PCI: 00:15.0 scanning...
1016 13:53:36.973213 scan_generic_bus for PCI: 00:15.0
1017 13:53:36.976449 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 13:53:36.980055 scan_generic_bus for PCI: 00:15.0 done
1019 13:53:36.986505 scan_bus: scanning of bus PCI: 00:15.0 took 14287 usecs
1020 13:53:36.989734 PCI: 00:15.1 scanning...
1021 13:53:36.993225 scan_generic_bus for PCI: 00:15.1
1022 13:53:36.996555 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 13:53:37.002933 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 13:53:37.006472 scan_generic_bus for PCI: 00:15.1 done
1025 13:53:37.009554 scan_bus: scanning of bus PCI: 00:15.1 took 18605 usecs
1026 13:53:37.013115 PCI: 00:19.0 scanning...
1027 13:53:37.016151 scan_generic_bus for PCI: 00:19.0
1028 13:53:37.023329 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 13:53:37.026529 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 13:53:37.029462 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 13:53:37.033301 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 13:53:37.036608 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 13:53:37.042840 scan_generic_bus for PCI: 00:19.0 done
1034 13:53:37.046116 scan_bus: scanning of bus PCI: 00:19.0 took 30716 usecs
1035 13:53:37.049391 PCI: 00:1d.0 scanning...
1036 13:53:37.053180 do_pci_scan_bridge for PCI: 00:1d.0
1037 13:53:37.056352 PCI: pci_scan_bus for bus 01
1038 13:53:37.059626 PCI: 01:00.0 [1c5c/1327] enabled
1039 13:53:37.062595 Enabling Common Clock Configuration
1040 13:53:37.069592 L1 Sub-State supported from root port 29
1041 13:53:37.069732 L1 Sub-State Support = 0xf
1042 13:53:37.072766 CommonModeRestoreTime = 0x28
1043 13:53:37.079493 Power On Value = 0x16, Power On Scale = 0x0
1044 13:53:37.079641 ASPM: Enabled L1
1045 13:53:37.086852 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
1046 13:53:37.089244 PCI: 00:1e.2 scanning...
1047 13:53:37.093101 scan_generic_bus for PCI: 00:1e.2
1048 13:53:37.095851 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 13:53:37.099411 scan_generic_bus for PCI: 00:1e.2 done
1050 13:53:37.105885 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1051 13:53:37.106004 PCI: 00:1e.3 scanning...
1052 13:53:37.112553 scan_generic_bus for PCI: 00:1e.3
1053 13:53:37.115857 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 13:53:37.119229 scan_generic_bus for PCI: 00:1e.3 done
1055 13:53:37.122819 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1056 13:53:37.126309 PCI: 00:1f.0 scanning...
1057 13:53:37.129467 scan_static_bus for PCI: 00:1f.0
1058 13:53:37.132516 PNP: 0c09.0 enabled
1059 13:53:37.135809 scan_static_bus for PCI: 00:1f.0 done
1060 13:53:37.142671 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1061 13:53:37.146027 PCI: 00:1f.3 scanning...
1062 13:53:37.149206 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1063 13:53:37.152562 PCI: 00:1f.4 scanning...
1064 13:53:37.155660 scan_generic_bus for PCI: 00:1f.4
1065 13:53:37.159478 scan_generic_bus for PCI: 00:1f.4 done
1066 13:53:37.165741 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1067 13:53:37.169304 PCI: 00:1f.5 scanning...
1068 13:53:37.172720 scan_generic_bus for PCI: 00:1f.5
1069 13:53:37.176104 scan_generic_bus for PCI: 00:1f.5 done
1070 13:53:37.182161 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1071 13:53:37.185731 scan_bus: scanning of bus DOMAIN: 0000 took 604854 usecs
1072 13:53:37.192433 scan_static_bus for Root Device done
1073 13:53:37.195551 scan_bus: scanning of bus Root Device took 624685 usecs
1074 13:53:37.198980 done
1075 13:53:37.199091 Chrome EC: UHEPI supported
1076 13:53:37.205821 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 13:53:37.212427 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 13:53:37.218749 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 13:53:37.225739 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 13:53:37.228603 SPI flash protection: WPSW=0 SRP0=0
1081 13:53:37.235310 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 13:53:37.238402 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 13:53:37.241919 found VGA at PCI: 00:02.0
1084 13:53:37.245369 Setting up VGA for PCI: 00:02.0
1085 13:53:37.251812 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 13:53:37.255278 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 13:53:37.258276 Allocating resources...
1088 13:53:37.258453 Reading resources...
1089 13:53:37.265501 Root Device read_resources bus 0 link: 0
1090 13:53:37.268338 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 13:53:37.274845 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 13:53:37.278314 DOMAIN: 0000 read_resources bus 0 link: 0
1093 13:53:37.285309 PCI: 00:14.0 read_resources bus 0 link: 0
1094 13:53:37.288715 USB0 port 0 read_resources bus 0 link: 0
1095 13:53:37.296750 USB0 port 0 read_resources bus 0 link: 0 done
1096 13:53:37.300173 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 13:53:37.307120 PCI: 00:15.0 read_resources bus 1 link: 0
1098 13:53:37.310851 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 13:53:37.317506 PCI: 00:15.1 read_resources bus 2 link: 0
1100 13:53:37.320749 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 13:53:37.328359 PCI: 00:19.0 read_resources bus 3 link: 0
1102 13:53:37.334694 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 13:53:37.338263 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 13:53:37.344530 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 13:53:37.348011 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 13:53:37.355023 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 13:53:37.358195 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 13:53:37.364619 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 13:53:37.367809 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 13:53:37.374530 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 13:53:37.381684 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 13:53:37.384426 Root Device read_resources bus 0 link: 0 done
1113 13:53:37.387629 Done reading resources.
1114 13:53:37.391019 Show resources in subtree (Root Device)...After reading.
1115 13:53:37.397756 Root Device child on link 0 CPU_CLUSTER: 0
1116 13:53:37.400954 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 13:53:37.401083 APIC: 00
1118 13:53:37.404085 APIC: 03
1119 13:53:37.404195 APIC: 04
1120 13:53:37.407936 APIC: 01
1121 13:53:37.408059 APIC: 02
1122 13:53:37.408157 APIC: 05
1123 13:53:37.410834 APIC: 06
1124 13:53:37.410942 APIC: 07
1125 13:53:37.414228 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 13:53:37.470211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 13:53:37.470888 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 13:53:37.471182 PCI: 00:00.0
1129 13:53:37.471484 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 13:53:37.471608 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 13:53:37.471718 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 13:53:37.504504 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 13:53:37.505142 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 13:53:37.505450 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 13:53:37.505523 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 13:53:37.511972 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 13:53:37.521974 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 13:53:37.528601 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 13:53:37.538360 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 13:53:37.548228 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 13:53:37.558683 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 13:53:37.568270 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 13:53:37.578245 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 13:53:37.585175 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 13:53:37.588465 PCI: 00:02.0
1146 13:53:37.598469 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 13:53:37.608059 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 13:53:37.618170 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 13:53:37.618319 PCI: 00:04.0
1150 13:53:37.621198 PCI: 00:08.0
1151 13:53:37.631106 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 13:53:37.631262 PCI: 00:12.0
1153 13:53:37.640954 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:53:37.644182 PCI: 00:14.0 child on link 0 USB0 port 0
1155 13:53:37.654413 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 13:53:37.661024 USB0 port 0 child on link 0 USB2 port 0
1157 13:53:37.661225 USB2 port 0
1158 13:53:37.664304 USB2 port 1
1159 13:53:37.664445 USB2 port 2
1160 13:53:37.667708 USB2 port 3
1161 13:53:37.667877 USB2 port 5
1162 13:53:37.670807 USB2 port 6
1163 13:53:37.670936 USB2 port 9
1164 13:53:37.674211 USB3 port 0
1165 13:53:37.677770 USB3 port 1
1166 13:53:37.677913 USB3 port 2
1167 13:53:37.681311 USB3 port 3
1168 13:53:37.681421 USB3 port 4
1169 13:53:37.684442 PCI: 00:14.2
1170 13:53:37.694137 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 13:53:37.703887 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 13:53:37.704080 PCI: 00:14.3
1173 13:53:37.714372 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 13:53:37.717216 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 13:53:37.727273 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 13:53:37.730597 I2C: 01:15
1177 13:53:37.733899 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 13:53:37.743770 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 13:53:37.747214 I2C: 02:5d
1180 13:53:37.747335 GENERIC: 0.0
1181 13:53:37.750924 PCI: 00:16.0
1182 13:53:37.760739 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:53:37.760966 PCI: 00:17.0
1184 13:53:37.770286 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 13:53:37.780557 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 13:53:37.786892 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 13:53:37.797452 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 13:53:37.803955 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 13:53:37.813767 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 13:53:37.817083 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 13:53:37.827174 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 13:53:37.830344 I2C: 03:1a
1193 13:53:37.830502 I2C: 03:38
1194 13:53:37.830601 I2C: 03:39
1195 13:53:37.833780 I2C: 03:3a
1196 13:53:37.833892 I2C: 03:3b
1197 13:53:37.840781 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 13:53:37.846975 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 13:53:37.857124 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 13:53:37.866492 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 13:53:37.869890 PCI: 01:00.0
1202 13:53:37.880245 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 13:53:37.880405 PCI: 00:1e.0
1204 13:53:37.890023 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 13:53:37.900119 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 13:53:37.906498 PCI: 00:1e.2 child on link 0 SPI: 00
1207 13:53:37.916641 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 13:53:37.916789 SPI: 00
1209 13:53:37.919755 PCI: 00:1e.3 child on link 0 SPI: 01
1210 13:53:37.929857 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 13:53:37.933196 SPI: 01
1212 13:53:37.936431 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 13:53:37.946298 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 13:53:37.952648 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 13:53:37.956552 PNP: 0c09.0
1216 13:53:37.962598 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 13:53:37.966057 PCI: 00:1f.3
1218 13:53:37.976216 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 13:53:37.985686 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 13:53:37.985828 PCI: 00:1f.4
1221 13:53:37.996396 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 13:53:38.005774 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 13:53:38.008915 PCI: 00:1f.5
1224 13:53:38.015449 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 13:53:38.022530 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 13:53:38.029069 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 13:53:38.035485 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 13:53:38.039278 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 13:53:38.041936 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 13:53:38.048577 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 13:53:38.051797 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 13:53:38.058491 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 13:53:38.065299 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 13:53:38.071769 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 13:53:38.081992 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 13:53:38.088643 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 13:53:38.092077 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 13:53:38.098623 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 13:53:38.104987 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 13:53:38.108250 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 13:53:38.114877 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 13:53:38.118508 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 13:53:38.121744 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 13:53:38.128396 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 13:53:38.131833 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 13:53:38.138262 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 13:53:38.141716 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 13:53:38.148069 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 13:53:38.151921 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 13:53:38.158340 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 13:53:38.161756 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 13:53:38.168141 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 13:53:38.171661 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 13:53:38.178251 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 13:53:38.181796 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 13:53:38.187827 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 13:53:38.191331 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 13:53:38.194804 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 13:53:38.201458 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 13:53:38.204629 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 13:53:38.211484 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 13:53:38.217682 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 13:53:38.224342 avoid_fixed_resources: DOMAIN: 0000
1264 13:53:38.227651 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 13:53:38.234434 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 13:53:38.240979 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 13:53:38.251117 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 13:53:38.257587 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 13:53:38.263949 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 13:53:38.273837 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 13:53:38.280567 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 13:53:38.287113 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 13:53:38.297181 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 13:53:38.303855 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 13:53:38.310363 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 13:53:38.313698 Setting resources...
1277 13:53:38.320236 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 13:53:38.323680 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 13:53:38.327018 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 13:53:38.330515 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 13:53:38.336040 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 13:53:38.340240 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 13:53:38.347095 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 13:53:38.353631 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 13:53:38.360080 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 13:53:38.367220 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 13:53:38.370359 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 13:53:38.377056 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 13:53:38.379934 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 13:53:38.387185 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 13:53:38.389991 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 13:53:38.396566 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 13:53:38.400113 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 13:53:38.406830 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 13:53:38.410146 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 13:53:38.413288 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 13:53:38.420121 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 13:53:38.423461 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 13:53:38.430148 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 13:53:38.433101 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 13:53:38.439636 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 13:53:38.443200 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 13:53:38.449985 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 13:53:38.453213 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 13:53:38.459751 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 13:53:38.463026 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 13:53:38.469502 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 13:53:38.473243 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 13:53:38.479663 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 13:53:38.489518 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 13:53:38.496385 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 13:53:38.502938 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 13:53:38.509143 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 13:53:38.516338 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 13:53:38.519801 Root Device assign_resources, bus 0 link: 0
1316 13:53:38.525859 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 13:53:38.532793 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 13:53:38.542413 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 13:53:38.549262 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 13:53:38.555752 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 13:53:38.566126 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 13:53:38.572516 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 13:53:38.579581 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 13:53:38.582420 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 13:53:38.592494 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 13:53:38.599134 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 13:53:38.608666 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 13:53:38.615270 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 13:53:38.622416 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 13:53:38.625261 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 13:53:38.631816 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 13:53:38.638548 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 13:53:38.642544 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 13:53:38.651928 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 13:53:38.658617 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 13:53:38.668546 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 13:53:38.674928 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 13:53:38.681925 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 13:53:38.688305 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 13:53:38.698317 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 13:53:38.705085 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 13:53:38.711364 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 13:53:38.714615 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 13:53:38.724796 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 13:53:38.731147 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 13:53:38.741589 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 13:53:38.744493 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 13:53:38.754801 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 13:53:38.757967 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 13:53:38.768186 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 13:53:38.774615 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 13:53:38.780984 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 13:53:38.784065 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 13:53:38.794243 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 13:53:38.797693 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 13:53:38.801090 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 13:53:38.807187 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 13:53:38.810646 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 13:53:38.817144 LPC: Trying to open IO window from 800 size 1ff
1360 13:53:38.823896 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 13:53:38.833852 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 13:53:38.840751 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 13:53:38.850659 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 13:53:38.854038 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 13:53:38.860279 Root Device assign_resources, bus 0 link: 0
1366 13:53:38.860397 Done setting resources.
1367 13:53:38.867427 Show resources in subtree (Root Device)...After assigning values.
1368 13:53:38.873799 Root Device child on link 0 CPU_CLUSTER: 0
1369 13:53:38.876794 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 13:53:38.876893 APIC: 00
1371 13:53:38.880153 APIC: 03
1372 13:53:38.880240 APIC: 04
1373 13:53:38.880305 APIC: 01
1374 13:53:38.884064 APIC: 02
1375 13:53:38.884149 APIC: 05
1376 13:53:38.886994 APIC: 06
1377 13:53:38.887077 APIC: 07
1378 13:53:38.890268 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 13:53:38.900372 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 13:53:38.910176 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 13:53:38.913690 PCI: 00:00.0
1382 13:53:38.923117 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 13:53:38.932907 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 13:53:38.942843 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 13:53:38.949468 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 13:53:38.959663 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 13:53:38.969913 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 13:53:38.979499 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 13:53:38.989450 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 13:53:38.999058 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 13:53:39.005734 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 13:53:39.015707 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 13:53:39.025585 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 13:53:39.035713 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 13:53:39.045510 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 13:53:39.055382 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 13:53:39.061825 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 13:53:39.065372 PCI: 00:02.0
1399 13:53:39.074941 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 13:53:39.084990 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 13:53:39.094924 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 13:53:39.098265 PCI: 00:04.0
1403 13:53:39.098367 PCI: 00:08.0
1404 13:53:39.108406 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 13:53:39.111213 PCI: 00:12.0
1406 13:53:39.121153 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 13:53:39.124448 PCI: 00:14.0 child on link 0 USB0 port 0
1408 13:53:39.134335 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 13:53:39.140882 USB0 port 0 child on link 0 USB2 port 0
1410 13:53:39.141001 USB2 port 0
1411 13:53:39.144112 USB2 port 1
1412 13:53:39.144199 USB2 port 2
1413 13:53:39.147485 USB2 port 3
1414 13:53:39.147568 USB2 port 5
1415 13:53:39.150677 USB2 port 6
1416 13:53:39.150760 USB2 port 9
1417 13:53:39.153986 USB3 port 0
1418 13:53:39.157494 USB3 port 1
1419 13:53:39.157581 USB3 port 2
1420 13:53:39.160665 USB3 port 3
1421 13:53:39.160749 USB3 port 4
1422 13:53:39.164033 PCI: 00:14.2
1423 13:53:39.174008 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 13:53:39.184155 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 13:53:39.184295 PCI: 00:14.3
1426 13:53:39.193726 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 13:53:39.200266 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 13:53:39.210435 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 13:53:39.210577 I2C: 01:15
1430 13:53:39.216660 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 13:53:39.226598 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 13:53:39.226723 I2C: 02:5d
1433 13:53:39.230235 GENERIC: 0.0
1434 13:53:39.230319 PCI: 00:16.0
1435 13:53:39.240141 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 13:53:39.243250 PCI: 00:17.0
1437 13:53:39.253646 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 13:53:39.263037 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 13:53:39.273177 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 13:53:39.282924 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 13:53:39.289613 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 13:53:39.299577 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 13:53:39.305951 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 13:53:39.316282 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 13:53:39.316412 I2C: 03:1a
1446 13:53:39.319186 I2C: 03:38
1447 13:53:39.319270 I2C: 03:39
1448 13:53:39.322508 I2C: 03:3a
1449 13:53:39.322591 I2C: 03:3b
1450 13:53:39.329312 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 13:53:39.335801 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 13:53:39.345942 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 13:53:39.358717 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 13:53:39.358908 PCI: 01:00.0
1455 13:53:39.368905 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 13:53:39.372187 PCI: 00:1e.0
1457 13:53:39.382174 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 13:53:39.391704 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 13:53:39.398277 PCI: 00:1e.2 child on link 0 SPI: 00
1460 13:53:39.408369 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 13:53:39.408508 SPI: 00
1462 13:53:39.411571 PCI: 00:1e.3 child on link 0 SPI: 01
1463 13:53:39.421249 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 13:53:39.424733 SPI: 01
1465 13:53:39.428001 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 13:53:39.438202 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 13:53:39.444900 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 13:53:39.448002 PNP: 0c09.0
1469 13:53:39.454448 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 13:53:39.457714 PCI: 00:1f.3
1471 13:53:39.467591 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 13:53:39.477559 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 13:53:39.480785 PCI: 00:1f.4
1474 13:53:39.491005 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 13:53:39.500414 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 13:53:39.500551 PCI: 00:1f.5
1477 13:53:39.510635 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 13:53:39.513589 Done allocating resources.
1479 13:53:39.520543 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 13:53:39.523567 Enabling resources...
1481 13:53:39.527049 PCI: 00:00.0 subsystem <- 8086/9b61
1482 13:53:39.530260 PCI: 00:00.0 cmd <- 06
1483 13:53:39.533534 PCI: 00:02.0 subsystem <- 8086/9b41
1484 13:53:39.537038 PCI: 00:02.0 cmd <- 03
1485 13:53:39.537131 PCI: 00:08.0 cmd <- 06
1486 13:53:39.543819 PCI: 00:12.0 subsystem <- 8086/02f9
1487 13:53:39.543919 PCI: 00:12.0 cmd <- 02
1488 13:53:39.547012 PCI: 00:14.0 subsystem <- 8086/02ed
1489 13:53:39.549931 PCI: 00:14.0 cmd <- 02
1490 13:53:39.553170 PCI: 00:14.2 cmd <- 02
1491 13:53:39.556546 PCI: 00:14.3 subsystem <- 8086/02f0
1492 13:53:39.559787 PCI: 00:14.3 cmd <- 02
1493 13:53:39.563402 PCI: 00:15.0 subsystem <- 8086/02e8
1494 13:53:39.566539 PCI: 00:15.0 cmd <- 02
1495 13:53:39.570172 PCI: 00:15.1 subsystem <- 8086/02e9
1496 13:53:39.573412 PCI: 00:15.1 cmd <- 02
1497 13:53:39.576638 PCI: 00:16.0 subsystem <- 8086/02e0
1498 13:53:39.580258 PCI: 00:16.0 cmd <- 02
1499 13:53:39.582938 PCI: 00:17.0 subsystem <- 8086/02d3
1500 13:53:39.583025 PCI: 00:17.0 cmd <- 03
1501 13:53:39.590303 PCI: 00:19.0 subsystem <- 8086/02c5
1502 13:53:39.590407 PCI: 00:19.0 cmd <- 02
1503 13:53:39.593424 PCI: 00:1d.0 bridge ctrl <- 0013
1504 13:53:39.596703 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 13:53:39.600390 PCI: 00:1d.0 cmd <- 06
1506 13:53:39.603614 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 13:53:39.606651 PCI: 00:1e.0 cmd <- 06
1508 13:53:39.609735 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 13:53:39.613442 PCI: 00:1e.2 cmd <- 06
1510 13:53:39.616439 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 13:53:39.619775 PCI: 00:1e.3 cmd <- 02
1512 13:53:39.622855 PCI: 00:1f.0 subsystem <- 8086/0284
1513 13:53:39.626784 PCI: 00:1f.0 cmd <- 407
1514 13:53:39.629470 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 13:53:39.633286 PCI: 00:1f.3 cmd <- 02
1516 13:53:39.636174 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 13:53:39.639409 PCI: 00:1f.4 cmd <- 03
1518 13:53:39.642693 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 13:53:39.646178 PCI: 00:1f.5 cmd <- 406
1520 13:53:39.653979 PCI: 01:00.0 cmd <- 02
1521 13:53:39.658368 done.
1522 13:53:39.667183 ME: Version: 14.0.39.1367
1523 13:53:39.674146 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 8
1524 13:53:39.677544 Initializing devices...
1525 13:53:39.677636 Root Device init ...
1526 13:53:39.683621 Chrome EC: Set SMI mask to 0x0000000000000000
1527 13:53:39.687015 Chrome EC: clear events_b mask to 0x0000000000000000
1528 13:53:39.693602 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 13:53:39.700449 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 13:53:39.706894 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 13:53:39.709984 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 13:53:39.713624 Root Device init finished in 35183 usecs
1533 13:53:39.717460 CPU_CLUSTER: 0 init ...
1534 13:53:39.723857 CPU_CLUSTER: 0 init finished in 2441 usecs
1535 13:53:39.727916 PCI: 00:00.0 init ...
1536 13:53:39.731196 CPU TDP: 15 Watts
1537 13:53:39.734705 CPU PL2 = 64 Watts
1538 13:53:39.738064 PCI: 00:00.0 init finished in 7085 usecs
1539 13:53:39.741318 PCI: 00:02.0 init ...
1540 13:53:39.744746 PCI: 00:02.0 init finished in 2255 usecs
1541 13:53:39.748034 PCI: 00:08.0 init ...
1542 13:53:39.750982 PCI: 00:08.0 init finished in 2255 usecs
1543 13:53:39.754798 PCI: 00:12.0 init ...
1544 13:53:39.757598 PCI: 00:12.0 init finished in 2252 usecs
1545 13:53:39.760906 PCI: 00:14.0 init ...
1546 13:53:39.764335 PCI: 00:14.0 init finished in 2253 usecs
1547 13:53:39.767563 PCI: 00:14.2 init ...
1548 13:53:39.770931 PCI: 00:14.2 init finished in 2252 usecs
1549 13:53:39.774758 PCI: 00:14.3 init ...
1550 13:53:39.777527 PCI: 00:14.3 init finished in 2271 usecs
1551 13:53:39.780921 PCI: 00:15.0 init ...
1552 13:53:39.784124 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 13:53:39.787455 PCI: 00:15.0 init finished in 5987 usecs
1554 13:53:39.790861 PCI: 00:15.1 init ...
1555 13:53:39.794353 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 13:53:39.800918 PCI: 00:15.1 init finished in 5980 usecs
1557 13:53:39.801019 PCI: 00:16.0 init ...
1558 13:53:39.807314 PCI: 00:16.0 init finished in 2254 usecs
1559 13:53:39.810650 PCI: 00:19.0 init ...
1560 13:53:39.814390 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 13:53:39.817493 PCI: 00:19.0 init finished in 5982 usecs
1562 13:53:39.820273 PCI: 00:1d.0 init ...
1563 13:53:39.823899 Initializing PCH PCIe bridge.
1564 13:53:39.827288 PCI: 00:1d.0 init finished in 5288 usecs
1565 13:53:39.830314 PCI: 00:1f.0 init ...
1566 13:53:39.833575 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 13:53:39.840275 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 13:53:39.840380 IOAPIC: ID = 0x02
1569 13:53:39.843554 IOAPIC: Dumping registers
1570 13:53:39.847285 reg 0x0000: 0x02000000
1571 13:53:39.850191 reg 0x0001: 0x00770020
1572 13:53:39.850278 reg 0x0002: 0x00000000
1573 13:53:39.856825 PCI: 00:1f.0 init finished in 23564 usecs
1574 13:53:39.860218 PCI: 00:1f.4 init ...
1575 13:53:39.863523 PCI: 00:1f.4 init finished in 2264 usecs
1576 13:53:39.874207 PCI: 01:00.0 init ...
1577 13:53:39.877392 PCI: 01:00.0 init finished in 2254 usecs
1578 13:53:39.881524 PNP: 0c09.0 init ...
1579 13:53:39.884837 Google Chrome EC uptime: 11.100 seconds
1580 13:53:39.891726 Google Chrome AP resets since EC boot: 0
1581 13:53:39.894632 Google Chrome most recent AP reset causes:
1582 13:53:39.901489 Google Chrome EC reset flags at last EC boot: reset-pin
1583 13:53:39.904607 PNP: 0c09.0 init finished in 20599 usecs
1584 13:53:39.908442 Devices initialized
1585 13:53:39.911233 Show all devs... After init.
1586 13:53:39.911321 Root Device: enabled 1
1587 13:53:39.914976 CPU_CLUSTER: 0: enabled 1
1588 13:53:39.917989 DOMAIN: 0000: enabled 1
1589 13:53:39.918074 APIC: 00: enabled 1
1590 13:53:39.921244 PCI: 00:00.0: enabled 1
1591 13:53:39.924530 PCI: 00:02.0: enabled 1
1592 13:53:39.927652 PCI: 00:04.0: enabled 0
1593 13:53:39.927738 PCI: 00:05.0: enabled 0
1594 13:53:39.930850 PCI: 00:12.0: enabled 1
1595 13:53:39.934486 PCI: 00:12.5: enabled 0
1596 13:53:39.937881 PCI: 00:12.6: enabled 0
1597 13:53:39.937969 PCI: 00:14.0: enabled 1
1598 13:53:39.941142 PCI: 00:14.1: enabled 0
1599 13:53:39.944445 PCI: 00:14.3: enabled 1
1600 13:53:39.947411 PCI: 00:14.5: enabled 0
1601 13:53:39.947496 PCI: 00:15.0: enabled 1
1602 13:53:39.950670 PCI: 00:15.1: enabled 1
1603 13:53:39.954165 PCI: 00:15.2: enabled 0
1604 13:53:39.957554 PCI: 00:15.3: enabled 0
1605 13:53:39.957639 PCI: 00:16.0: enabled 1
1606 13:53:39.960646 PCI: 00:16.1: enabled 0
1607 13:53:39.964221 PCI: 00:16.2: enabled 0
1608 13:53:39.964308 PCI: 00:16.3: enabled 0
1609 13:53:39.967580 PCI: 00:16.4: enabled 0
1610 13:53:39.970597 PCI: 00:16.5: enabled 0
1611 13:53:39.973949 PCI: 00:17.0: enabled 1
1612 13:53:39.974037 PCI: 00:19.0: enabled 1
1613 13:53:39.977331 PCI: 00:19.1: enabled 0
1614 13:53:39.980472 PCI: 00:19.2: enabled 0
1615 13:53:39.984225 PCI: 00:1a.0: enabled 0
1616 13:53:39.984327 PCI: 00:1c.0: enabled 0
1617 13:53:39.987006 PCI: 00:1c.1: enabled 0
1618 13:53:39.990492 PCI: 00:1c.2: enabled 0
1619 13:53:39.993900 PCI: 00:1c.3: enabled 0
1620 13:53:39.993987 PCI: 00:1c.4: enabled 0
1621 13:53:39.997279 PCI: 00:1c.5: enabled 0
1622 13:53:39.999987 PCI: 00:1c.6: enabled 0
1623 13:53:40.003645 PCI: 00:1c.7: enabled 0
1624 13:53:40.003731 PCI: 00:1d.0: enabled 1
1625 13:53:40.006569 PCI: 00:1d.1: enabled 0
1626 13:53:40.010255 PCI: 00:1d.2: enabled 0
1627 13:53:40.013571 PCI: 00:1d.3: enabled 0
1628 13:53:40.013658 PCI: 00:1d.4: enabled 0
1629 13:53:40.016566 PCI: 00:1d.5: enabled 0
1630 13:53:40.019876 PCI: 00:1e.0: enabled 1
1631 13:53:40.019989 PCI: 00:1e.1: enabled 0
1632 13:53:40.023525 PCI: 00:1e.2: enabled 1
1633 13:53:40.026930 PCI: 00:1e.3: enabled 1
1634 13:53:40.029992 PCI: 00:1f.0: enabled 1
1635 13:53:40.030078 PCI: 00:1f.1: enabled 0
1636 13:53:40.033144 PCI: 00:1f.2: enabled 0
1637 13:53:40.036548 PCI: 00:1f.3: enabled 1
1638 13:53:40.040078 PCI: 00:1f.4: enabled 1
1639 13:53:40.040166 PCI: 00:1f.5: enabled 1
1640 13:53:40.043288 PCI: 00:1f.6: enabled 0
1641 13:53:40.046640 USB0 port 0: enabled 1
1642 13:53:40.046727 I2C: 01:15: enabled 1
1643 13:53:40.049935 I2C: 02:5d: enabled 1
1644 13:53:40.053214 GENERIC: 0.0: enabled 1
1645 13:53:40.056652 I2C: 03:1a: enabled 1
1646 13:53:40.056737 I2C: 03:38: enabled 1
1647 13:53:40.059562 I2C: 03:39: enabled 1
1648 13:53:40.063229 I2C: 03:3a: enabled 1
1649 13:53:40.063317 I2C: 03:3b: enabled 1
1650 13:53:40.066703 PCI: 00:00.0: enabled 1
1651 13:53:40.070078 SPI: 00: enabled 1
1652 13:53:40.070165 SPI: 01: enabled 1
1653 13:53:40.073499 PNP: 0c09.0: enabled 1
1654 13:53:40.076129 USB2 port 0: enabled 1
1655 13:53:40.076214 USB2 port 1: enabled 1
1656 13:53:40.079788 USB2 port 2: enabled 0
1657 13:53:40.083265 USB2 port 3: enabled 0
1658 13:53:40.083352 USB2 port 5: enabled 0
1659 13:53:40.086428 USB2 port 6: enabled 1
1660 13:53:40.089612 USB2 port 9: enabled 1
1661 13:53:40.092812 USB3 port 0: enabled 1
1662 13:53:40.092898 USB3 port 1: enabled 1
1663 13:53:40.096346 USB3 port 2: enabled 1
1664 13:53:40.099679 USB3 port 3: enabled 1
1665 13:53:40.099765 USB3 port 4: enabled 0
1666 13:53:40.103066 APIC: 03: enabled 1
1667 13:53:40.106333 APIC: 04: enabled 1
1668 13:53:40.106419 APIC: 01: enabled 1
1669 13:53:40.109690 APIC: 02: enabled 1
1670 13:53:40.109775 APIC: 05: enabled 1
1671 13:53:40.113034 APIC: 06: enabled 1
1672 13:53:40.116191 APIC: 07: enabled 1
1673 13:53:40.116276 PCI: 00:08.0: enabled 1
1674 13:53:40.119264 PCI: 00:14.2: enabled 1
1675 13:53:40.122423 PCI: 01:00.0: enabled 1
1676 13:53:40.125752 Disabling ACPI via APMC:
1677 13:53:40.129397 done.
1678 13:53:40.132953 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 13:53:40.136185 ELOG: NV offset 0xaf0000 size 0x4000
1680 13:53:40.143683 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 13:53:40.150072 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:39 UTC
1682 13:53:40.156664 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:39 UTC
1683 13:53:40.163389 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:39 UTC
1684 13:53:40.170117 ELOG: Event(9A) added with size 9 at 2023-06-06 13:53:39 UTC
1685 13:53:40.176487 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:39 UTC
1686 13:53:40.183636 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:39 UTC
1687 13:53:40.186328 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 13:53:40.193844 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:39 UTC
1689 13:53:40.203969 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 13:53:40.210017 ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:39 UTC
1691 13:53:40.213496 elog_add_boot_reason: Logged dev mode boot
1692 13:53:40.216706 Finalize devices...
1693 13:53:40.216795 PCI: 00:17.0 final
1694 13:53:40.220110 Devices finalized
1695 13:53:40.223596 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 13:53:40.230253 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 13:53:40.233392 ME: HFSTS1 : 0x90000245
1698 13:53:40.236815 ME: HFSTS2 : 0x3B850126
1699 13:53:40.243330 ME: HFSTS3 : 0x00000020
1700 13:53:40.246556 ME: HFSTS4 : 0x00004800
1701 13:53:40.249990 ME: HFSTS5 : 0x00000000
1702 13:53:40.253350 ME: HFSTS6 : 0x40400006
1703 13:53:40.256735 ME: Manufacturing Mode : NO
1704 13:53:40.260138 ME: FW Partition Table : OK
1705 13:53:40.262978 ME: Bringup Loader Failure : NO
1706 13:53:40.266418 ME: Firmware Init Complete : YES
1707 13:53:40.269713 ME: Boot Options Present : NO
1708 13:53:40.273251 ME: Update In Progress : NO
1709 13:53:40.276302 ME: D0i3 Support : YES
1710 13:53:40.279902 ME: Low Power State Enabled : NO
1711 13:53:40.283020 ME: CPU Replaced : NO
1712 13:53:40.286263 ME: CPU Replacement Valid : YES
1713 13:53:40.289453 ME: Current Working State : 5
1714 13:53:40.293425 ME: Current Operation State : 1
1715 13:53:40.296525 ME: Current Operation Mode : 0
1716 13:53:40.299345 ME: Error Code : 0
1717 13:53:40.303249 ME: CPU Debug Disabled : YES
1718 13:53:40.305965 ME: TXT Support : NO
1719 13:53:40.312722 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 13:53:40.319285 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 13:53:40.319392 CBFS @ c08000 size 3f8000
1722 13:53:40.326567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 13:53:40.329241 CBFS: Locating 'fallback/dsdt.aml'
1724 13:53:40.332708 CBFS: Found @ offset 10bb80 size 3fa5
1725 13:53:40.339465 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 13:53:40.342904 CBFS @ c08000 size 3f8000
1727 13:53:40.348977 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 13:53:40.349097 CBFS: Locating 'fallback/slic'
1729 13:53:40.354590 CBFS: 'fallback/slic' not found.
1730 13:53:40.361191 ACPI: Writing ACPI tables at 99b3e000.
1731 13:53:40.361300 ACPI: * FACS
1732 13:53:40.364435 ACPI: * DSDT
1733 13:53:40.368047 Ramoops buffer: 0x100000@0x99a3d000.
1734 13:53:40.371273 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 13:53:40.377782 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 13:53:40.381168 Google Chrome EC: version:
1737 13:53:40.384082 ro: helios_v2.0.2659-56403530b
1738 13:53:40.387493 rw: helios_v2.0.2849-c41de27e7d
1739 13:53:40.387601 running image: 1
1740 13:53:40.391707 ACPI: * FADT
1741 13:53:40.391792 SCI is IRQ9
1742 13:53:40.398389 ACPI: added table 1/32, length now 40
1743 13:53:40.398498 ACPI: * SSDT
1744 13:53:40.401497 Found 1 CPU(s) with 8 core(s) each.
1745 13:53:40.405052 Error: Could not locate 'wifi_sar' in VPD.
1746 13:53:40.411508 Checking CBFS for default SAR values
1747 13:53:40.414838 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 13:53:40.418278 CBFS @ c08000 size 3f8000
1749 13:53:40.424884 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 13:53:40.428093 CBFS: Locating 'wifi_sar_defaults.hex'
1751 13:53:40.431284 CBFS: Found @ offset 5fac0 size 77
1752 13:53:40.435126 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 13:53:40.441716 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 13:53:40.444633 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 13:53:40.451390 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 13:53:40.454982 failed to find key in VPD: dsm_calib_r0_0
1757 13:53:40.464540 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 13:53:40.467880 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 13:53:40.474674 failed to find key in VPD: dsm_calib_r0_1
1760 13:53:40.480766 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 13:53:40.487864 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 13:53:40.491142 failed to find key in VPD: dsm_calib_r0_2
1763 13:53:40.500576 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 13:53:40.504213 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 13:53:40.511043 failed to find key in VPD: dsm_calib_r0_3
1766 13:53:40.517620 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 13:53:40.524107 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 13:53:40.527102 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 13:53:40.534151 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 13:53:40.537429 EC returned error result code 1
1771 13:53:40.541340 EC returned error result code 1
1772 13:53:40.544203 EC returned error result code 1
1773 13:53:40.548127 PS2K: Bad resp from EC. Vivaldi disabled!
1774 13:53:40.554479 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 13:53:40.560908 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 13:53:40.564483 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 13:53:40.570901 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 13:53:40.573931 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 13:53:40.580605 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 13:53:40.587263 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 13:53:40.593968 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 13:53:40.597690 ACPI: added table 2/32, length now 44
1783 13:53:40.597786 ACPI: * MCFG
1784 13:53:40.604012 ACPI: added table 3/32, length now 48
1785 13:53:40.604114 ACPI: * TPM2
1786 13:53:40.607042 TPM2 log created at 99a2d000
1787 13:53:40.610418 ACPI: added table 4/32, length now 52
1788 13:53:40.613863 ACPI: * MADT
1789 13:53:40.613953 SCI is IRQ9
1790 13:53:40.617081 ACPI: added table 5/32, length now 56
1791 13:53:40.620432 current = 99b43ac0
1792 13:53:40.620519 ACPI: * DMAR
1793 13:53:40.623987 ACPI: added table 6/32, length now 60
1794 13:53:40.627512 ACPI: * IGD OpRegion
1795 13:53:40.630618 GMA: Found VBT in CBFS
1796 13:53:40.634032 GMA: Found valid VBT in CBFS
1797 13:53:40.637228 ACPI: added table 7/32, length now 64
1798 13:53:40.637316 ACPI: * HPET
1799 13:53:40.640364 ACPI: added table 8/32, length now 68
1800 13:53:40.643823 ACPI: done.
1801 13:53:40.647194 ACPI tables: 31744 bytes.
1802 13:53:40.650397 smbios_write_tables: 99a2c000
1803 13:53:40.653525 EC returned error result code 3
1804 13:53:40.656502 Couldn't obtain OEM name from CBI
1805 13:53:40.659765 Create SMBIOS type 17
1806 13:53:40.663595 PCI: 00:00.0 (Intel Cannonlake)
1807 13:53:40.663708 PCI: 00:14.3 (Intel WiFi)
1808 13:53:40.666572 SMBIOS tables: 939 bytes.
1809 13:53:40.669964 Writing table forward entry at 0x00000500
1810 13:53:40.676523 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 13:53:40.679799 Writing coreboot table at 0x99b62000
1812 13:53:40.686511 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 13:53:40.690190 1. 0000000000001000-000000000009ffff: RAM
1814 13:53:40.696597 2. 00000000000a0000-00000000000fffff: RESERVED
1815 13:53:40.700082 3. 0000000000100000-0000000099a2bfff: RAM
1816 13:53:40.706210 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 13:53:40.709640 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 13:53:40.716627 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 13:53:40.722718 7. 000000009a000000-000000009f7fffff: RESERVED
1820 13:53:40.726068 8. 00000000e0000000-00000000efffffff: RESERVED
1821 13:53:40.732828 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 13:53:40.736232 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 13:53:40.739552 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 13:53:40.745858 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 13:53:40.748902 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 13:53:40.755677 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 13:53:40.759483 15. 0000000100000000-000000045e7fffff: RAM
1828 13:53:40.762471 Graphics framebuffer located at 0xc0000000
1829 13:53:40.765782 Passing 5 GPIOs to payload:
1830 13:53:40.772176 NAME | PORT | POLARITY | VALUE
1831 13:53:40.776135 write protect | undefined | high | low
1832 13:53:40.782227 lid | undefined | high | high
1833 13:53:40.788556 power | undefined | high | low
1834 13:53:40.792279 oprom | undefined | high | low
1835 13:53:40.798941 EC in RW | 0x000000cb | high | low
1836 13:53:40.799058 Board ID: 4
1837 13:53:40.805157 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 13:53:40.808907 CBFS @ c08000 size 3f8000
1839 13:53:40.811755 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 13:53:40.818626 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1841 13:53:40.822174 coreboot table: 1492 bytes.
1842 13:53:40.825218 IMD ROOT 0. 99fff000 00001000
1843 13:53:40.828682 IMD SMALL 1. 99ffe000 00001000
1844 13:53:40.831666 FSP MEMORY 2. 99c4e000 003b0000
1845 13:53:40.835450 CONSOLE 3. 99c2e000 00020000
1846 13:53:40.838670 FMAP 4. 99c2d000 0000054e
1847 13:53:40.842002 TIME STAMP 5. 99c2c000 00000910
1848 13:53:40.845417 VBOOT WORK 6. 99c18000 00014000
1849 13:53:40.848335 MRC DATA 7. 99c16000 00001958
1850 13:53:40.851521 ROMSTG STCK 8. 99c15000 00001000
1851 13:53:40.855442 AFTER CAR 9. 99c0b000 0000a000
1852 13:53:40.858649 RAMSTAGE 10. 99baf000 0005c000
1853 13:53:40.861488 REFCODE 11. 99b7a000 00035000
1854 13:53:40.865230 SMM BACKUP 12. 99b6a000 00010000
1855 13:53:40.868272 COREBOOT 13. 99b62000 00008000
1856 13:53:40.871624 ACPI 14. 99b3e000 00024000
1857 13:53:40.874719 ACPI GNVS 15. 99b3d000 00001000
1858 13:53:40.878298 RAMOOPS 16. 99a3d000 00100000
1859 13:53:40.881346 TPM2 TCGLOG17. 99a2d000 00010000
1860 13:53:40.884813 SMBIOS 18. 99a2c000 00000800
1861 13:53:40.888154 IMD small region:
1862 13:53:40.891650 IMD ROOT 0. 99ffec00 00000400
1863 13:53:40.894611 FSP RUNTIME 1. 99ffebe0 00000004
1864 13:53:40.898201 EC HOSTEVENT 2. 99ffebc0 00000008
1865 13:53:40.901369 POWER STATE 3. 99ffeb80 00000040
1866 13:53:40.904915 ROMSTAGE 4. 99ffeb60 00000004
1867 13:53:40.908254 MEM INFO 5. 99ffe9a0 000001b9
1868 13:53:40.911518 VPD 6. 99ffe920 0000006c
1869 13:53:40.914852 MTRR: Physical address space:
1870 13:53:40.921286 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 13:53:40.927810 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 13:53:40.934606 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 13:53:40.941188 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 13:53:40.944518 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 13:53:40.951076 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 13:53:40.957523 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 13:53:40.961048 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 13:53:40.967539 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 13:53:40.970902 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 13:53:40.974284 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 13:53:40.977503 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 13:53:40.984213 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 13:53:40.987281 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 13:53:40.991095 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 13:53:40.994143 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 13:53:41.000979 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 13:53:41.004320 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 13:53:41.007711 call enable_fixed_mtrr()
1889 13:53:41.010368 CPU physical address size: 39 bits
1890 13:53:41.013775 MTRR: default type WB/UC MTRR counts: 6/8.
1891 13:53:41.017129 MTRR: WB selected as default type.
1892 13:53:41.023667 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 13:53:41.030477 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 13:53:41.037351 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 13:53:41.043629 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 13:53:41.050231 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 13:53:41.056695 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 13:53:41.060437 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:53:41.063451 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 13:53:41.069820 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 13:53:41.073152 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 13:53:41.076917 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 13:53:41.080280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 13:53:41.086471 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 13:53:41.090112 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 13:53:41.093140 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 13:53:41.096344 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 13:53:41.099662 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 13:53:41.103448
1910 13:53:41.103541 MTRR check
1911 13:53:41.106241 call enable_fixed_mtrr()
1912 13:53:41.109668 Fixed MTRRs : Enabled
1913 13:53:41.109755 Variable MTRRs: Enabled
1914 13:53:41.109821
1915 13:53:41.112932 CPU physical address size: 39 bits
1916 13:53:41.119637 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1917 13:53:41.123144 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 13:53:41.129401 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 13:53:41.133311 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 13:53:41.136030 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 13:53:41.139350 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 13:53:41.145707 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 13:53:41.149031 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 13:53:41.152432 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 13:53:41.155783 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 13:53:41.162801 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 13:53:41.165597 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 13:53:41.169086 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 13:53:41.172730 call enable_fixed_mtrr()
1930 13:53:41.175429 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 13:53:41.178750 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 13:53:41.185508 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 13:53:41.188724 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 13:53:41.192357 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 13:53:41.195355 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 13:53:41.202308 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 13:53:41.205721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 13:53:41.208521 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 13:53:41.211811 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 13:53:41.215221 CPU physical address size: 39 bits
1941 13:53:41.218631 call enable_fixed_mtrr()
1942 13:53:41.221904 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 13:53:41.228575 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 13:53:41.231893 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 13:53:41.235110 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 13:53:41.238437 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 13:53:41.244996 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 13:53:41.248641 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 13:53:41.251934 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 13:53:41.255040 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 13:53:41.261504 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 13:53:41.264992 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 13:53:41.268147 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 13:53:41.271295 call enable_fixed_mtrr()
1955 13:53:41.275184 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 13:53:41.278347 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 13:53:41.284629 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 13:53:41.288018 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 13:53:41.291371 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 13:53:41.294591 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 13:53:41.300983 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 13:53:41.304867 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 13:53:41.308040 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 13:53:41.311041 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 13:53:41.314508 CPU physical address size: 39 bits
1966 13:53:41.317595 call enable_fixed_mtrr()
1967 13:53:41.321033 CPU physical address size: 39 bits
1968 13:53:41.327830 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1969 13:53:41.331035 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 13:53:41.334510 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 13:53:41.340718 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 13:53:41.344189 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 13:53:41.347592 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 13:53:41.350871 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 13:53:41.357364 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 13:53:41.360811 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 13:53:41.364041 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 13:53:41.367336 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 13:53:41.373890 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 13:53:41.377059 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 13:53:41.380274 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 13:53:41.383468 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 13:53:41.390127 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 13:53:41.393754 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 13:53:41.396626 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 13:53:41.400193 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 13:53:41.406524 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 13:53:41.410027 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 13:53:41.413273 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 13:53:41.416282 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 13:53:41.419570 call enable_fixed_mtrr()
1992 13:53:41.422887 call enable_fixed_mtrr()
1993 13:53:41.426244 CPU physical address size: 39 bits
1994 13:53:41.429656 CPU physical address size: 39 bits
1995 13:53:41.432814 CPU physical address size: 39 bits
1996 13:53:41.436191 CBFS @ c08000 size 3f8000
1997 13:53:41.442560 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1998 13:53:41.445930 CBFS: Locating 'fallback/payload'
1999 13:53:41.449340 CBFS: Found @ offset 1c96c0 size 3f798
2000 13:53:41.455791 Checking segment from ROM address 0xffdd16f8
2001 13:53:41.459251 Checking segment from ROM address 0xffdd1714
2002 13:53:41.463000 Loading segment from ROM address 0xffdd16f8
2003 13:53:41.465944 code (compression=0)
2004 13:53:41.475769 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 13:53:41.482427 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 13:53:41.485787 it's not compressed!
2007 13:53:41.577515 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 13:53:41.584187 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 13:53:41.587313 Loading segment from ROM address 0xffdd1714
2010 13:53:41.590924 Entry Point 0x30000000
2011 13:53:41.594064 Loaded segments
2012 13:53:41.599634 Finalizing chipset.
2013 13:53:41.602918 Finalizing SMM.
2014 13:53:41.606746 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2015 13:53:41.609868 mp_park_aps done after 0 msecs.
2016 13:53:41.616353 Jumping to boot code at 30000000(99b62000)
2017 13:53:41.622874 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 13:53:41.622988
2019 13:53:41.623055
2020 13:53:41.623122
2021 13:53:41.626538 Starting depthcharge on Helios...
2022 13:53:41.626623
2023 13:53:41.626967 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 13:53:41.627070 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 13:53:41.627153 Setting prompt string to ['hatch:']
2026 13:53:41.627232 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 13:53:41.636186 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 13:53:41.636299
2029 13:53:41.642882 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 13:53:41.642986
2031 13:53:41.649494 board_setup: Info: eMMC controller not present; skipping
2032 13:53:41.649648
2033 13:53:41.652802 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 13:53:41.652902
2035 13:53:41.659595 board_setup: Info: SDHCI controller not present; skipping
2036 13:53:41.659697
2037 13:53:41.665710 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 13:53:41.665816
2039 13:53:41.665883 Wipe memory regions:
2040 13:53:41.665944
2041 13:53:41.669018 [0x00000000001000, 0x000000000a0000)
2042 13:53:41.669113
2043 13:53:41.672619 [0x00000000100000, 0x00000030000000)
2044 13:53:41.738728
2045 13:53:41.741801 [0x00000030657430, 0x00000099a2c000)
2046 13:53:41.879468
2047 13:53:41.882513 [0x00000100000000, 0x0000045e800000)
2048 13:53:43.265284
2049 13:53:43.265432 R8152: Initializing
2050 13:53:43.265499
2051 13:53:43.268516 Version 9 (ocp_data = 6010)
2052 13:53:43.272729
2053 13:53:43.272813 R8152: Done initializing
2054 13:53:43.272878
2055 13:53:43.275754 Adding net device
2056 13:53:43.885233
2057 13:53:43.885371 R8152: Initializing
2058 13:53:43.885473
2059 13:53:43.888521 Version 6 (ocp_data = 5c30)
2060 13:53:43.888603
2061 13:53:43.891856 R8152: Done initializing
2062 13:53:43.891993
2063 13:53:43.895251 net_add_device: Attemp to include the same device
2064 13:53:43.898647
2065 13:53:43.906094 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 13:53:43.906206
2067 13:53:43.906298
2068 13:53:43.906386
2069 13:53:43.906695 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 13:53:44.007065 hatch: tftpboot 192.168.201.1 10607044/tftp-deploy-u3c78iws/kernel/bzImage 10607044/tftp-deploy-u3c78iws/kernel/cmdline 10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
2072 13:53:44.007270 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 13:53:44.007349 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 13:53:44.012037 tftpboot 192.168.201.1 10607044/tftp-deploy-u3c78iws/kernel/bzImploy-u3c78iws/kernel/cmdline 10607044/tftp-deploy-u3c78iws/ramdisk/ramdisk.cpio.gz
2075 13:53:44.012126
2076 13:53:44.012191 Waiting for link
2077 13:53:44.212814
2078 13:53:44.212954 done.
2079 13:53:44.213020
2080 13:53:44.213081 MAC: 00:24:32:50:1a:5f
2081 13:53:44.213140
2082 13:53:44.216091 Sending DHCP discover... done.
2083 13:53:44.216175
2084 13:53:44.219274 Waiting for reply... done.
2085 13:53:44.219417
2086 13:53:44.222744 Sending DHCP request... done.
2087 13:53:44.222829
2088 13:53:44.231341 Waiting for reply... done.
2089 13:53:44.231429
2090 13:53:44.231530 My ip is 192.168.201.21
2091 13:53:44.231621
2092 13:53:44.234580 The DHCP server ip is 192.168.201.1
2093 13:53:44.237487
2094 13:53:44.240693 TFTP server IP predefined by user: 192.168.201.1
2095 13:53:44.240778
2096 13:53:44.247429 Bootfile predefined by user: 10607044/tftp-deploy-u3c78iws/kernel/bzImage
2097 13:53:44.247524
2098 13:53:44.250729 Sending tftp read request... done.
2099 13:53:44.250813
2100 13:53:44.253890 Waiting for the transfer...
2101 13:53:44.257177
2102 13:53:44.824687 00000000 ################################################################
2103 13:53:44.824827
2104 13:53:45.376242 00080000 ################################################################
2105 13:53:45.376420
2106 13:53:45.933621 00100000 ################################################################
2107 13:53:45.933779
2108 13:53:46.508842 00180000 ################################################################
2109 13:53:46.509061
2110 13:53:47.123744 00200000 ################################################################
2111 13:53:47.124241
2112 13:53:47.774172 00280000 ################################################################
2113 13:53:47.774361
2114 13:53:48.411865 00300000 ################################################################
2115 13:53:48.412424
2116 13:53:49.110312 00380000 ################################################################
2117 13:53:49.110828
2118 13:53:49.838675 00400000 ################################################################
2119 13:53:49.839235
2120 13:53:50.573477 00480000 ################################################################
2121 13:53:50.574018
2122 13:53:51.292330 00500000 ################################################################
2123 13:53:51.292628
2124 13:53:51.906063 00580000 ################################################################
2125 13:53:51.906226
2126 13:53:52.569708 00600000 ################################################################
2127 13:53:52.570285
2128 13:53:53.160100 00680000 ################################################################
2129 13:53:53.160263
2130 13:53:53.729353 00700000 ################################################################
2131 13:53:53.729528
2132 13:53:53.747608 00780000 ## done.
2133 13:53:53.747689
2134 13:53:53.750432 The bootfile was 7880592 bytes long.
2135 13:53:53.750514
2136 13:53:53.754023 Sending tftp read request... done.
2137 13:53:53.754106
2138 13:53:53.757051 Waiting for the transfer...
2139 13:53:53.757134
2140 13:53:54.391797 00000000 ################################################################
2141 13:53:54.392335
2142 13:53:55.029244 00080000 ################################################################
2143 13:53:55.029914
2144 13:53:55.621352 00100000 ################################################################
2145 13:53:55.621493
2146 13:53:56.167127 00180000 ################################################################
2147 13:53:56.167261
2148 13:53:56.780029 00200000 ################################################################
2149 13:53:56.780179
2150 13:53:57.362826 00280000 ################################################################
2151 13:53:57.362964
2152 13:53:57.930598 00300000 ################################################################
2153 13:53:57.930737
2154 13:53:58.521091 00380000 ################################################################
2155 13:53:58.521267
2156 13:53:59.107255 00400000 ################################################################
2157 13:53:59.107401
2158 13:53:59.691138 00480000 ################################################################
2159 13:53:59.691313
2160 13:54:00.279042 00500000 ################################################################
2161 13:54:00.279195
2162 13:54:00.879374 00580000 ################################################################
2163 13:54:00.879544
2164 13:54:01.091324 00600000 ##################### done.
2165 13:54:01.091465
2166 13:54:01.094644 Sending tftp read request... done.
2167 13:54:01.094728
2168 13:54:01.097773 Waiting for the transfer...
2169 13:54:01.097858
2170 13:54:01.097924 00000000 # done.
2171 13:54:01.097988
2172 13:54:01.107872 Command line loaded dynamically from TFTP file: 10607044/tftp-deploy-u3c78iws/kernel/cmdline
2173 13:54:01.107958
2174 13:54:01.134067 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607044/extract-nfsrootfs-erirhgyz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2175 13:54:01.134168
2176 13:54:01.140686 ec_init(0): CrosEC protocol v3 supported (256, 256)
2177 13:54:01.144560
2178 13:54:01.147324 Shutting down all USB controllers.
2179 13:54:01.147428
2180 13:54:01.147536 Removing current net device
2181 13:54:01.155259
2182 13:54:01.155357 Finalizing coreboot
2183 13:54:01.155490
2184 13:54:01.161580 Exiting depthcharge with code 4 at timestamp: 26891350
2185 13:54:01.161685
2186 13:54:01.161778
2187 13:54:01.161868 Starting kernel ...
2188 13:54:01.161958
2189 13:54:01.162536 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2190 13:54:01.162663 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2191 13:54:01.162767 Setting prompt string to ['Linux version [0-9]']
2192 13:54:01.162862 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 13:54:01.162958 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 13:54:01.165059
2196 13:58:23.162916 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2198 13:58:23.163124 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2200 13:58:23.163314 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2203 13:58:23.163570 end: 2 depthcharge-action (duration 00:05:00) [common]
2205 13:58:23.163788 Cleaning after the job
2206 13:58:23.163917 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/ramdisk
2207 13:58:23.164759 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/kernel
2208 13:58:23.165666 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/nfsrootfs
2209 13:58:23.232460 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607044/tftp-deploy-u3c78iws/modules
2210 13:58:23.232897 start: 4.1 power-off (timeout 00:00:30) [common]
2211 13:58:23.233072 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2212 13:58:23.308819 >> Command sent successfully.
2213 13:58:23.311096 Returned 0 in 0 seconds
2214 13:58:23.411477 end: 4.1 power-off (duration 00:00:00) [common]
2216 13:58:23.411804 start: 4.2 read-feedback (timeout 00:10:00) [common]
2217 13:58:23.412066 Listened to connection for namespace 'common' for up to 1s
2219 13:58:23.412444 Listened to connection for namespace 'common' for up to 1s
2220 13:58:24.413013 Finalising connection for namespace 'common'
2221 13:58:24.413176 Disconnecting from shell: Finalise
2222 13:58:24.413251
2223 13:58:24.513567 end: 4.2 read-feedback (duration 00:00:01) [common]
2224 13:58:24.513704 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607044
2225 13:58:24.978883 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607044
2226 13:58:24.979080 JobError: Your job cannot terminate cleanly.