Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:53:05.302736 lava-dispatcher, installed at version: 2023.05.1
2 13:53:05.303009 start: 0 validate
3 13:53:05.303202 Start time: 2023-06-06 13:53:05.303193+00:00 (UTC)
4 13:53:05.303407 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:53:05.303545 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:53:05.600089 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:53:05.600336 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:53:05.889607 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:53:05.889880 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:53:09.843834 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:53:09.844042 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:53:10.128226 validate duration: 4.83
14 13:53:10.128487 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:53:10.128590 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:53:10.128684 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:53:10.128801 Not decompressing ramdisk as can be used compressed.
18 13:53:10.128889 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/initrd.cpio.gz
19 13:53:10.128954 saving as /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/ramdisk/initrd.cpio.gz
20 13:53:10.129016 total size: 6136227 (5MB)
21 13:53:10.689597 progress 0% (0MB)
22 13:53:10.691623 progress 5% (0MB)
23 13:53:10.693454 progress 10% (0MB)
24 13:53:10.695407 progress 15% (0MB)
25 13:53:10.697210 progress 20% (1MB)
26 13:53:10.699128 progress 25% (1MB)
27 13:53:10.701253 progress 30% (1MB)
28 13:53:10.703185 progress 35% (2MB)
29 13:53:10.705122 progress 40% (2MB)
30 13:53:10.707254 progress 45% (2MB)
31 13:53:10.709112 progress 50% (2MB)
32 13:53:10.710764 progress 55% (3MB)
33 13:53:10.712652 progress 60% (3MB)
34 13:53:10.714317 progress 65% (3MB)
35 13:53:10.716294 progress 70% (4MB)
36 13:53:10.717957 progress 75% (4MB)
37 13:53:10.719655 progress 80% (4MB)
38 13:53:10.721447 progress 85% (5MB)
39 13:53:10.723201 progress 90% (5MB)
40 13:53:10.724819 progress 95% (5MB)
41 13:53:10.726644 progress 100% (5MB)
42 13:53:10.726782 5MB downloaded in 0.60s (9.79MB/s)
43 13:53:10.726926 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:53:10.727241 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:53:10.727406 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:53:10.727506 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:53:10.727638 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:53:10.727708 saving as /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/kernel/bzImage
50 13:53:10.727768 total size: 7880592 (7MB)
51 13:53:10.727831 No compression specified
52 13:53:10.729284 progress 0% (0MB)
53 13:53:10.731593 progress 5% (0MB)
54 13:53:10.733759 progress 10% (0MB)
55 13:53:10.735984 progress 15% (1MB)
56 13:53:10.738177 progress 20% (1MB)
57 13:53:10.740365 progress 25% (1MB)
58 13:53:10.742555 progress 30% (2MB)
59 13:53:10.744738 progress 35% (2MB)
60 13:53:10.746905 progress 40% (3MB)
61 13:53:10.749060 progress 45% (3MB)
62 13:53:10.751250 progress 50% (3MB)
63 13:53:10.753478 progress 55% (4MB)
64 13:53:10.755649 progress 60% (4MB)
65 13:53:10.757838 progress 65% (4MB)
66 13:53:10.760026 progress 70% (5MB)
67 13:53:10.762185 progress 75% (5MB)
68 13:53:10.764343 progress 80% (6MB)
69 13:53:10.766505 progress 85% (6MB)
70 13:53:10.768697 progress 90% (6MB)
71 13:53:10.770817 progress 95% (7MB)
72 13:53:10.773010 progress 100% (7MB)
73 13:53:10.773221 7MB downloaded in 0.05s (165.36MB/s)
74 13:53:10.773411 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:53:10.773790 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:53:10.773908 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:53:10.774026 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:53:10.774211 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/full.rootfs.tar.xz
80 13:53:10.774311 saving as /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/nfsrootfs/full.rootfs.tar
81 13:53:10.774403 total size: 202642916 (193MB)
82 13:53:10.774493 Using unxz to decompress xz
83 13:53:10.778651 progress 0% (0MB)
84 13:53:11.350957 progress 5% (9MB)
85 13:53:11.862972 progress 10% (19MB)
86 13:53:12.409303 progress 15% (29MB)
87 13:53:12.676977 progress 20% (38MB)
88 13:53:13.199119 progress 25% (48MB)
89 13:53:13.751444 progress 30% (58MB)
90 13:53:14.305053 progress 35% (67MB)
91 13:53:14.850579 progress 40% (77MB)
92 13:53:15.403481 progress 45% (86MB)
93 13:53:16.001013 progress 50% (96MB)
94 13:53:16.596613 progress 55% (106MB)
95 13:53:17.276352 progress 60% (115MB)
96 13:53:17.691823 progress 65% (125MB)
97 13:53:17.786694 progress 70% (135MB)
98 13:53:17.932438 progress 75% (144MB)
99 13:53:18.018714 progress 80% (154MB)
100 13:53:18.073229 progress 85% (164MB)
101 13:53:18.168347 progress 90% (173MB)
102 13:53:18.538109 progress 95% (183MB)
103 13:53:19.143572 progress 100% (193MB)
104 13:53:19.148563 193MB downloaded in 8.37s (23.08MB/s)
105 13:53:19.148862 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:53:19.149155 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:53:19.149260 start: 1.4 download-retry (timeout 00:09:51) [common]
109 13:53:19.149392 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 13:53:19.149588 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:53:19.149705 saving as /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/modules/modules.tar
112 13:53:19.149791 total size: 251288 (0MB)
113 13:53:19.149898 Using unxz to decompress xz
114 13:53:19.153799 progress 13% (0MB)
115 13:53:19.154239 progress 26% (0MB)
116 13:53:19.154481 progress 39% (0MB)
117 13:53:19.155861 progress 52% (0MB)
118 13:53:19.157783 progress 65% (0MB)
119 13:53:19.159824 progress 78% (0MB)
120 13:53:19.161856 progress 91% (0MB)
121 13:53:19.163842 progress 100% (0MB)
122 13:53:19.169438 0MB downloaded in 0.02s (12.20MB/s)
123 13:53:19.169696 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:53:19.169985 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:53:19.170089 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 13:53:19.170220 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 13:53:22.496525 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607095/extract-nfsrootfs-i0d1a8sp
129 13:53:22.496717 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:53:22.496818 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 13:53:22.496987 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y
132 13:53:22.497112 makedir: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin
133 13:53:22.497212 makedir: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/tests
134 13:53:22.497309 makedir: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/results
135 13:53:22.497408 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-add-keys
136 13:53:22.497551 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-add-sources
137 13:53:22.497677 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-background-process-start
138 13:53:22.497799 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-background-process-stop
139 13:53:22.497920 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-common-functions
140 13:53:22.498038 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-echo-ipv4
141 13:53:22.498156 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-install-packages
142 13:53:22.498275 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-installed-packages
143 13:53:22.498394 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-os-build
144 13:53:22.498519 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-probe-channel
145 13:53:22.498636 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-probe-ip
146 13:53:22.498753 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-target-ip
147 13:53:22.498868 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-target-mac
148 13:53:22.498985 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-target-storage
149 13:53:22.499105 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-case
150 13:53:22.499224 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-event
151 13:53:22.499345 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-feedback
152 13:53:22.499509 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-raise
153 13:53:22.499627 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-reference
154 13:53:22.499751 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-runner
155 13:53:22.499870 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-set
156 13:53:22.499988 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-test-shell
157 13:53:22.500109 Updating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-add-keys (debian)
158 13:53:22.500257 Updating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-add-sources (debian)
159 13:53:22.500405 Updating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-install-packages (debian)
160 13:53:22.500540 Updating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-installed-packages (debian)
161 13:53:22.500676 Updating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/bin/lava-os-build (debian)
162 13:53:22.500798 Creating /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/environment
163 13:53:22.500897 LAVA metadata
164 13:53:22.500966 - LAVA_JOB_ID=10607095
165 13:53:22.501029 - LAVA_DISPATCHER_IP=192.168.201.1
166 13:53:22.501127 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 13:53:22.501192 skipped lava-vland-overlay
168 13:53:22.501265 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 13:53:22.501342 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 13:53:22.501402 skipped lava-multinode-overlay
171 13:53:22.501474 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 13:53:22.501551 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 13:53:22.501623 Loading test definitions
174 13:53:22.501710 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 13:53:22.501781 Using /lava-10607095 at stage 0
176 13:53:22.502051 uuid=10607095_1.5.2.3.1 testdef=None
177 13:53:22.502138 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 13:53:22.502221 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 13:53:22.502656 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 13:53:22.502877 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 13:53:22.503456 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 13:53:22.503682 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 13:53:22.504211 runner path: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/0/tests/0_timesync-off test_uuid 10607095_1.5.2.3.1
186 13:53:22.504366 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 13:53:22.504592 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 13:53:22.504663 Using /lava-10607095 at stage 0
190 13:53:22.504759 Fetching tests from https://github.com/kernelci/test-definitions.git
191 13:53:22.504838 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/0/tests/1_kselftest-alsa'
192 13:53:32.049914 Running '/usr/bin/git checkout kernelci.org
193 13:53:32.106298 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 13:53:32.107014 uuid=10607095_1.5.2.3.5 testdef=None
195 13:53:32.107175 end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
197 13:53:32.107424 start: 1.5.2.3.6 test-overlay (timeout 00:09:38) [common]
198 13:53:32.108143 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 13:53:32.108380 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:38) [common]
201 13:53:32.109317 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 13:53:32.109550 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:38) [common]
204 13:53:32.110477 runner path: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/0/tests/1_kselftest-alsa test_uuid 10607095_1.5.2.3.5
205 13:53:32.110570 BOARD='asus-cx9400-volteer'
206 13:53:32.110634 BRANCH='cip'
207 13:53:32.110693 SKIPFILE='/dev/null'
208 13:53:32.110750 SKIP_INSTALL='True'
209 13:53:32.110806 TESTPROG_URL='None'
210 13:53:32.110860 TST_CASENAME=''
211 13:53:32.110915 TST_CMDFILES='alsa'
212 13:53:32.111051 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 13:53:32.111257 Creating lava-test-runner.conf files
215 13:53:32.111320 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607095/lava-overlay-_w0cmr1y/lava-10607095/0 for stage 0
216 13:53:32.111459 - 0_timesync-off
217 13:53:32.111528 - 1_kselftest-alsa
218 13:53:32.111622 end: 1.5.2.3 test-definition (duration 00:00:10) [common]
219 13:53:32.111711 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
220 13:53:39.610292 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 13:53:39.610440 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
222 13:53:39.610566 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 13:53:39.610670 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
224 13:53:39.610762 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
225 13:53:39.763931 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 13:53:39.764288 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
227 13:53:39.764407 extracting modules file /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607095/extract-nfsrootfs-i0d1a8sp
228 13:53:39.776987 extracting modules file /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607095/extract-overlay-ramdisk-xmgh7f6t/ramdisk
229 13:53:39.789279 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 13:53:39.789404 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
231 13:53:39.789488 [common] Applying overlay to NFS
232 13:53:39.789557 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607095/compress-overlay-lkape4dp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607095/extract-nfsrootfs-i0d1a8sp
233 13:53:40.674587 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 13:53:40.674749 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
235 13:53:40.674849 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 13:53:40.674940 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
237 13:53:40.675020 Building ramdisk /var/lib/lava/dispatcher/tmp/10607095/extract-overlay-ramdisk-xmgh7f6t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607095/extract-overlay-ramdisk-xmgh7f6t/ramdisk
238 13:53:40.774731 >> 30664 blocks
239 13:53:41.399187 rename /var/lib/lava/dispatcher/tmp/10607095/extract-overlay-ramdisk-xmgh7f6t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
240 13:53:41.399683 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 13:53:41.399832 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
242 13:53:41.399984 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
243 13:53:41.400109 No mkimage arch provided, not using FIT.
244 13:53:41.400230 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 13:53:41.400356 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 13:53:41.400500 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
247 13:53:41.400627 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
248 13:53:41.400749 No LXC device requested
249 13:53:41.400866 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 13:53:41.401004 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
251 13:53:41.401118 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 13:53:41.401227 Checking files for TFTP limit of 4294967296 bytes.
253 13:53:41.401770 end: 1 tftp-deploy (duration 00:00:31) [common]
254 13:53:41.401909 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 13:53:41.402043 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 13:53:41.402211 substitutions:
257 13:53:41.402326 - {DTB}: None
258 13:53:41.402418 - {INITRD}: 10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
259 13:53:41.402487 - {KERNEL}: 10607095/tftp-deploy-2g6a2e40/kernel/bzImage
260 13:53:41.402547 - {LAVA_MAC}: None
261 13:53:41.402604 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607095/extract-nfsrootfs-i0d1a8sp
262 13:53:41.402697 - {NFS_SERVER_IP}: 192.168.201.1
263 13:53:41.402785 - {PRESEED_CONFIG}: None
264 13:53:41.402873 - {PRESEED_LOCAL}: None
265 13:53:41.402958 - {RAMDISK}: 10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
266 13:53:41.403046 - {ROOT_PART}: None
267 13:53:41.403130 - {ROOT}: None
268 13:53:41.403218 - {SERVER_IP}: 192.168.201.1
269 13:53:41.403315 - {TEE}: None
270 13:53:41.403431 Parsed boot commands:
271 13:53:41.403515 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 13:53:41.403749 Parsed boot commands: tftpboot 192.168.201.1 10607095/tftp-deploy-2g6a2e40/kernel/bzImage 10607095/tftp-deploy-2g6a2e40/kernel/cmdline 10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
273 13:53:41.403869 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 13:53:41.404000 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 13:53:41.404139 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 13:53:41.404260 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 13:53:41.404362 Not connected, no need to disconnect.
278 13:53:41.404467 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 13:53:41.404587 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 13:53:41.404683 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
281 13:53:41.408350 Setting prompt string to ['lava-test: # ']
282 13:53:41.408763 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 13:53:41.408922 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 13:53:41.409050 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 13:53:41.409176 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 13:53:41.409501 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
287 13:53:46.543051 >> Command sent successfully.
288 13:53:46.545421 Returned 0 in 5 seconds
289 13:53:46.645825 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 13:53:46.646166 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 13:53:46.646269 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 13:53:46.646361 Setting prompt string to 'Starting depthcharge on Voema...'
294 13:53:46.646429 Changing prompt to 'Starting depthcharge on Voema...'
295 13:53:46.646497 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 13:53:46.646762 [Enter `^Ec?' for help]
297 13:53:48.244665
298 13:53:48.244907
299 13:53:48.252120 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 13:53:48.260390 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
301 13:53:48.263689 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 13:53:48.268104 CPU: AES supported, TXT NOT supported, VT supported
303 13:53:48.275564 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 13:53:48.279153 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 13:53:48.282540 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 13:53:48.287221 VBOOT: Loading verstage.
307 13:53:48.291258 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 13:53:48.297672 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 13:53:48.302018 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 13:53:48.309751 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 13:53:48.316724 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 13:53:48.320863
313 13:53:48.320954
314 13:53:48.331295 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 13:53:48.344845 Probing TPM: . done!
316 13:53:48.348430 TPM ready after 0 ms
317 13:53:48.351929 Connected to device vid:did:rid of 1ae0:0028:00
318 13:53:48.363085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
319 13:53:48.369482 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 13:53:48.372722 Initialized TPM device CR50 revision 0
321 13:53:48.463795 tlcl_send_startup: Startup return code is 0
322 13:53:48.463941 TPM: setup succeeded
323 13:53:48.478599 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 13:53:48.492737 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 13:53:48.505852 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 13:53:48.515519 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 13:53:48.519439 Chrome EC: UHEPI supported
328 13:53:48.522565 Phase 1
329 13:53:48.526111 FMAP: area GBB found @ 1805000 (458752 bytes)
330 13:53:48.535906 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 13:53:48.542468 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 13:53:48.549187 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 13:53:48.555830 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 13:53:48.559012 Recovery requested (1009000e)
335 13:53:48.562393 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 13:53:48.574235 tlcl_extend: response is 0
337 13:53:48.580545 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 13:53:48.590659 tlcl_extend: response is 0
339 13:53:48.597192 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 13:53:48.603625 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 13:53:48.610524 BS: verstage times (exec / console): total (unknown) / 142 ms
342 13:53:48.610628
343 13:53:48.610699
344 13:53:48.623896 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 13:53:48.629976 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 13:53:48.633215 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 13:53:48.636773 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 13:53:48.643771 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 13:53:48.646885 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 13:53:48.650228 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
351 13:53:48.653211 TCO_STS: 0000 0000
352 13:53:48.656795 GEN_PMCON: d0015038 00002200
353 13:53:48.660416 GBLRST_CAUSE: 00000000 00000000
354 13:53:48.660507 HPR_CAUSE0: 00000000
355 13:53:48.663588 prev_sleep_state 5
356 13:53:48.666640 Boot Count incremented to 20019
357 13:53:48.673691 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 13:53:48.679861 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 13:53:48.686624 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 13:53:48.694106 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 13:53:48.697767 Chrome EC: UHEPI supported
362 13:53:48.705962 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 13:53:48.719492 Probing TPM: done!
364 13:53:48.726016 Connected to device vid:did:rid of 1ae0:0028:00
365 13:53:48.735678 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
366 13:53:48.739703 Initialized TPM device CR50 revision 0
367 13:53:48.753918 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 13:53:48.760949 MRC: Hash idx 0x100b comparison successful.
369 13:53:48.763842 MRC cache found, size faa8
370 13:53:48.763937 bootmode is set to: 2
371 13:53:48.767281 SPD index = 0
372 13:53:48.773818 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 13:53:48.777107 SPD: module type is LPDDR4X
374 13:53:48.780815 SPD: module part number is MT53E512M64D4NW-046
375 13:53:48.787091 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
376 13:53:48.790184 SPD: device width 16 bits, bus width 16 bits
377 13:53:48.797320 SPD: module size is 1024 MB (per channel)
378 13:53:49.231039 CBMEM:
379 13:53:49.234543 IMD: root @ 0x76fff000 254 entries.
380 13:53:49.238283 IMD: root @ 0x76ffec00 62 entries.
381 13:53:49.241276 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 13:53:49.247688 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 13:53:49.251137 External stage cache:
384 13:53:49.254821 IMD: root @ 0x7b3ff000 254 entries.
385 13:53:49.258177 IMD: root @ 0x7b3fec00 62 entries.
386 13:53:49.273451 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 13:53:49.279864 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 13:53:49.286720 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 13:53:49.300206 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 13:53:49.303814 cse_lite: Skip switching to RW in the recovery path
391 13:53:49.307319 8 DIMMs found
392 13:53:49.307456 SMM Memory Map
393 13:53:49.310641 SMRAM : 0x7b000000 0x800000
394 13:53:49.313819 Subregion 0: 0x7b000000 0x200000
395 13:53:49.317160 Subregion 1: 0x7b200000 0x200000
396 13:53:49.323817 Subregion 2: 0x7b400000 0x400000
397 13:53:49.323920 top_of_ram = 0x77000000
398 13:53:49.330342 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 13:53:49.337186 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 13:53:49.340782 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 13:53:49.347013 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 13:53:49.354156 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 13:53:49.360764 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 13:53:49.370088 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 13:53:49.373440 Processing 211 relocs. Offset value of 0x74c0b000
406 13:53:49.382986 BS: romstage times (exec / console): total (unknown) / 277 ms
407 13:53:49.389467
408 13:53:49.389558
409 13:53:49.399540 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 13:53:49.402219 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 13:53:49.412086 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 13:53:49.419124 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 13:53:49.425503 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 13:53:49.432028 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 13:53:49.479035 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 13:53:49.485992 Processing 5008 relocs. Offset value of 0x75d98000
417 13:53:49.489529 BS: postcar times (exec / console): total (unknown) / 59 ms
418 13:53:49.492247
419 13:53:49.492340
420 13:53:49.502194 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 13:53:49.502319 Normal boot
422 13:53:49.505725 FW_CONFIG value is 0x804c02
423 13:53:49.508779 PCI: 00:07.0 disabled by fw_config
424 13:53:49.512287 PCI: 00:07.1 disabled by fw_config
425 13:53:49.515834 PCI: 00:0d.2 disabled by fw_config
426 13:53:49.519167 PCI: 00:1c.7 disabled by fw_config
427 13:53:49.525693 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 13:53:49.532553 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 13:53:49.535657 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 13:53:49.539129 GENERIC: 0.0 disabled by fw_config
431 13:53:49.545471 GENERIC: 1.0 disabled by fw_config
432 13:53:49.549091 fw_config match found: DB_USB=USB3_ACTIVE
433 13:53:49.552044 fw_config match found: DB_USB=USB3_ACTIVE
434 13:53:49.555879 fw_config match found: DB_USB=USB3_ACTIVE
435 13:53:49.562299 fw_config match found: DB_USB=USB3_ACTIVE
436 13:53:49.565692 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 13:53:49.572559 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 13:53:49.582211 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 13:53:49.588620 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 13:53:49.592110 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 13:53:49.598504 microcode: Update skipped, already up-to-date
442 13:53:49.605081 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 13:53:49.633090 Detected 4 core, 8 thread CPU.
444 13:53:49.636341 Setting up SMI for CPU
445 13:53:49.639428 IED base = 0x7b400000
446 13:53:49.639543 IED size = 0x00400000
447 13:53:49.642416 Will perform SMM setup.
448 13:53:49.649558 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
449 13:53:49.655749 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 13:53:49.662626 Processing 16 relocs. Offset value of 0x00030000
451 13:53:49.666016 Attempting to start 7 APs
452 13:53:49.668880 Waiting for 10ms after sending INIT.
453 13:53:49.684498 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 13:53:49.688044 AP: slot 4 apic_id 5.
455 13:53:49.691462 AP: slot 5 apic_id 4.
456 13:53:49.691586 done.
457 13:53:49.691704 AP: slot 6 apic_id 2.
458 13:53:49.694454 AP: slot 2 apic_id 3.
459 13:53:49.697867 AP: slot 3 apic_id 7.
460 13:53:49.697995 AP: slot 7 apic_id 6.
461 13:53:49.704695 Waiting for 2nd SIPI to complete...done.
462 13:53:49.711409 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 13:53:49.717935 Processing 13 relocs. Offset value of 0x00038000
464 13:53:49.718052 Unable to locate Global NVS
465 13:53:49.728145 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 13:53:49.731118 Installing permanent SMM handler to 0x7b000000
467 13:53:49.741011 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 13:53:49.744713 Processing 794 relocs. Offset value of 0x7b010000
469 13:53:49.754565 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 13:53:49.757531 Processing 13 relocs. Offset value of 0x7b008000
471 13:53:49.764413 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 13:53:49.770897 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 13:53:49.774328 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 13:53:49.780727 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 13:53:49.787792 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 13:53:49.794371 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 13:53:49.800681 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 13:53:49.800800 Unable to locate Global NVS
479 13:53:49.810762 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 13:53:49.814386 Clearing SMI status registers
481 13:53:49.814512 SMI_STS: PM1
482 13:53:49.817299 PM1_STS: PWRBTN
483 13:53:49.823883 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 13:53:49.827370 In relocation handler: CPU 0
485 13:53:49.830874 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 13:53:49.837375 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 13:53:49.837521 Relocation complete.
488 13:53:49.847244 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 13:53:49.847360 In relocation handler: CPU 1
490 13:53:49.853981 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 13:53:49.854079 Relocation complete.
492 13:53:49.863988 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 13:53:49.864104 In relocation handler: CPU 7
494 13:53:49.870364 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 13:53:49.874192 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 13:53:49.877658 Relocation complete.
497 13:53:49.884189 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
498 13:53:49.887368 In relocation handler: CPU 6
499 13:53:49.890768 New SMBASE=0x7affe800 IEDBASE=0x7b400000
500 13:53:49.897028 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 13:53:49.897170 Relocation complete.
502 13:53:49.903820 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
503 13:53:49.906940 In relocation handler: CPU 2
504 13:53:49.910497 New SMBASE=0x7afff800 IEDBASE=0x7b400000
505 13:53:49.913793 Relocation complete.
506 13:53:49.920193 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
507 13:53:49.923795 In relocation handler: CPU 4
508 13:53:49.927848 New SMBASE=0x7afff000 IEDBASE=0x7b400000
509 13:53:49.931346 Relocation complete.
510 13:53:49.938223 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
511 13:53:49.941827 In relocation handler: CPU 5
512 13:53:49.945182 New SMBASE=0x7affec00 IEDBASE=0x7b400000
513 13:53:49.948351 Writing SMRR. base = 0x7b000006, mask=0xff800c00
514 13:53:49.951728 Relocation complete.
515 13:53:49.958138 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
516 13:53:49.961721 In relocation handler: CPU 3
517 13:53:49.964953 New SMBASE=0x7afff400 IEDBASE=0x7b400000
518 13:53:49.968720 Relocation complete.
519 13:53:49.971568 Initializing CPU #0
520 13:53:49.974863 CPU: vendor Intel device 806c1
521 13:53:49.978212 CPU: family 06, model 8c, stepping 01
522 13:53:49.981382 Clearing out pending MCEs
523 13:53:49.981467 Setting up local APIC...
524 13:53:49.984812 apic_id: 0x00 done.
525 13:53:49.988119 Turbo is available but hidden
526 13:53:49.991989 Turbo is available and visible
527 13:53:49.994934 microcode: Update skipped, already up-to-date
528 13:53:49.998223 CPU #0 initialized
529 13:53:50.001569 Initializing CPU #4
530 13:53:50.001686 Initializing CPU #5
531 13:53:50.005247 CPU: vendor Intel device 806c1
532 13:53:50.008196 CPU: family 06, model 8c, stepping 01
533 13:53:50.011836 CPU: vendor Intel device 806c1
534 13:53:50.014663 CPU: family 06, model 8c, stepping 01
535 13:53:50.018121 Clearing out pending MCEs
536 13:53:50.021656 Clearing out pending MCEs
537 13:53:50.025122 Setting up local APIC...
538 13:53:50.025236 Initializing CPU #2
539 13:53:50.028476 Initializing CPU #6
540 13:53:50.031290 CPU: vendor Intel device 806c1
541 13:53:50.034959 CPU: family 06, model 8c, stepping 01
542 13:53:50.038067 CPU: vendor Intel device 806c1
543 13:53:50.041584 CPU: family 06, model 8c, stepping 01
544 13:53:50.044610 Clearing out pending MCEs
545 13:53:50.048081 Clearing out pending MCEs
546 13:53:50.051591 Setting up local APIC...
547 13:53:50.051700 Initializing CPU #1
548 13:53:50.054969 apic_id: 0x03 done.
549 13:53:50.057783 Setting up local APIC...
550 13:53:50.057891 Setting up local APIC...
551 13:53:50.064965 microcode: Update skipped, already up-to-date
552 13:53:50.065085 apic_id: 0x02 done.
553 13:53:50.068289 CPU #2 initialized
554 13:53:50.071499 microcode: Update skipped, already up-to-date
555 13:53:50.074899 Initializing CPU #3
556 13:53:50.078083 Initializing CPU #7
557 13:53:50.078199 apic_id: 0x05 done.
558 13:53:50.081417 CPU: vendor Intel device 806c1
559 13:53:50.084738 CPU: family 06, model 8c, stepping 01
560 13:53:50.088096 CPU: vendor Intel device 806c1
561 13:53:50.091114 CPU: family 06, model 8c, stepping 01
562 13:53:50.094367 Clearing out pending MCEs
563 13:53:50.097969 Clearing out pending MCEs
564 13:53:50.101381 Setting up local APIC...
565 13:53:50.101491 CPU #6 initialized
566 13:53:50.104360 CPU: vendor Intel device 806c1
567 13:53:50.107728 CPU: family 06, model 8c, stepping 01
568 13:53:50.114709 microcode: Update skipped, already up-to-date
569 13:53:50.114829 apic_id: 0x04 done.
570 13:53:50.117746 CPU #4 initialized
571 13:53:50.121124 microcode: Update skipped, already up-to-date
572 13:53:50.124362 apic_id: 0x07 done.
573 13:53:50.127761 Setting up local APIC...
574 13:53:50.130705 Clearing out pending MCEs
575 13:53:50.130816 CPU #5 initialized
576 13:53:50.134105 Setting up local APIC...
577 13:53:50.137804 apic_id: 0x06 done.
578 13:53:50.141132 microcode: Update skipped, already up-to-date
579 13:53:50.144002 microcode: Update skipped, already up-to-date
580 13:53:50.147664 CPU #3 initialized
581 13:53:50.151095 CPU #7 initialized
582 13:53:50.151208 apic_id: 0x01 done.
583 13:53:50.157414 microcode: Update skipped, already up-to-date
584 13:53:50.157532 CPU #1 initialized
585 13:53:50.164396 bsp_do_flight_plan done after 455 msecs.
586 13:53:50.164522 CPU: frequency set to 4000 MHz
587 13:53:50.167285 Enabling SMIs.
588 13:53:50.174211 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
589 13:53:50.189781 SATAXPCIE1 indicates PCIe NVMe is present
590 13:53:50.193100 Probing TPM: done!
591 13:53:50.196880 Connected to device vid:did:rid of 1ae0:0028:00
592 13:53:50.207048 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
593 13:53:50.210224 Initialized TPM device CR50 revision 0
594 13:53:50.213457 Enabling S0i3.4
595 13:53:50.220162 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 13:53:50.223586 Found a VBT of 8704 bytes after decompression
597 13:53:50.230414 cse_lite: CSE RO boot. HybridStorageMode disabled
598 13:53:50.236910 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 13:53:50.312761 FSPS returned 0
600 13:53:50.315791 Executing Phase 1 of FspMultiPhaseSiInit
601 13:53:50.325791 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 13:53:50.329276 port C0 DISC req: usage 1 usb3 1 usb2 5
603 13:53:50.332805 Raw Buffer output 0 00000511
604 13:53:50.336300 Raw Buffer output 1 00000000
605 13:53:50.339835 pmc_send_ipc_cmd succeeded
606 13:53:50.346238 port C1 DISC req: usage 1 usb3 2 usb2 3
607 13:53:50.346340 Raw Buffer output 0 00000321
608 13:53:50.349693 Raw Buffer output 1 00000000
609 13:53:50.353784 pmc_send_ipc_cmd succeeded
610 13:53:50.359010 Detected 4 core, 8 thread CPU.
611 13:53:50.361904 Detected 4 core, 8 thread CPU.
612 13:53:50.596296 Display FSP Version Info HOB
613 13:53:50.599815 Reference Code - CPU = a.0.4c.31
614 13:53:50.603180 uCode Version = 0.0.0.86
615 13:53:50.606287 TXT ACM version = ff.ff.ff.ffff
616 13:53:50.609550 Reference Code - ME = a.0.4c.31
617 13:53:50.613490 MEBx version = 0.0.0.0
618 13:53:50.616318 ME Firmware Version = Consumer SKU
619 13:53:50.619576 Reference Code - PCH = a.0.4c.31
620 13:53:50.623105 PCH-CRID Status = Disabled
621 13:53:50.626431 PCH-CRID Original Value = ff.ff.ff.ffff
622 13:53:50.630146 PCH-CRID New Value = ff.ff.ff.ffff
623 13:53:50.633107 OPROM - RST - RAID = ff.ff.ff.ffff
624 13:53:50.636272 PCH Hsio Version = 4.0.0.0
625 13:53:50.639526 Reference Code - SA - System Agent = a.0.4c.31
626 13:53:50.642754 Reference Code - MRC = 2.0.0.1
627 13:53:50.646342 SA - PCIe Version = a.0.4c.31
628 13:53:50.649433 SA-CRID Status = Disabled
629 13:53:50.652759 SA-CRID Original Value = 0.0.0.1
630 13:53:50.656220 SA-CRID New Value = 0.0.0.1
631 13:53:50.659794 OPROM - VBIOS = ff.ff.ff.ffff
632 13:53:50.663301 IO Manageability Engine FW Version = 11.1.4.0
633 13:53:50.666012 PHY Build Version = 0.0.0.e0
634 13:53:50.669635 Thunderbolt(TM) FW Version = 0.0.0.0
635 13:53:50.675938 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 13:53:50.679533 ITSS IRQ Polarities Before:
637 13:53:50.679629 IPC0: 0xffffffff
638 13:53:50.682852 IPC1: 0xffffffff
639 13:53:50.682939 IPC2: 0xffffffff
640 13:53:50.686405 IPC3: 0xffffffff
641 13:53:50.689415 ITSS IRQ Polarities After:
642 13:53:50.689506 IPC0: 0xffffffff
643 13:53:50.692842 IPC1: 0xffffffff
644 13:53:50.692934 IPC2: 0xffffffff
645 13:53:50.696334 IPC3: 0xffffffff
646 13:53:50.699716 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 13:53:50.712729 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 13:53:50.722836 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 13:53:50.735926 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 13:53:50.742693 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
651 13:53:50.742802 Enumerating buses...
652 13:53:50.749282 Show all devs... Before device enumeration.
653 13:53:50.749378 Root Device: enabled 1
654 13:53:50.752540 DOMAIN: 0000: enabled 1
655 13:53:50.756277 CPU_CLUSTER: 0: enabled 1
656 13:53:50.759551 PCI: 00:00.0: enabled 1
657 13:53:50.759638 PCI: 00:02.0: enabled 1
658 13:53:50.762838 PCI: 00:04.0: enabled 1
659 13:53:50.766215 PCI: 00:05.0: enabled 1
660 13:53:50.769127 PCI: 00:06.0: enabled 0
661 13:53:50.769216 PCI: 00:07.0: enabled 0
662 13:53:50.772567 PCI: 00:07.1: enabled 0
663 13:53:50.775793 PCI: 00:07.2: enabled 0
664 13:53:50.779296 PCI: 00:07.3: enabled 0
665 13:53:50.779420 PCI: 00:08.0: enabled 1
666 13:53:50.782707 PCI: 00:09.0: enabled 0
667 13:53:50.786294 PCI: 00:0a.0: enabled 0
668 13:53:50.789163 PCI: 00:0d.0: enabled 1
669 13:53:50.789283 PCI: 00:0d.1: enabled 0
670 13:53:50.792583 PCI: 00:0d.2: enabled 0
671 13:53:50.796383 PCI: 00:0d.3: enabled 0
672 13:53:50.796493 PCI: 00:0e.0: enabled 0
673 13:53:50.799166 PCI: 00:10.2: enabled 1
674 13:53:50.802964 PCI: 00:10.6: enabled 0
675 13:53:50.805851 PCI: 00:10.7: enabled 0
676 13:53:50.805936 PCI: 00:12.0: enabled 0
677 13:53:50.809183 PCI: 00:12.6: enabled 0
678 13:53:50.812826 PCI: 00:13.0: enabled 0
679 13:53:50.815735 PCI: 00:14.0: enabled 1
680 13:53:50.815827 PCI: 00:14.1: enabled 0
681 13:53:50.819302 PCI: 00:14.2: enabled 1
682 13:53:50.822655 PCI: 00:14.3: enabled 1
683 13:53:50.826063 PCI: 00:15.0: enabled 1
684 13:53:50.826192 PCI: 00:15.1: enabled 1
685 13:53:50.829318 PCI: 00:15.2: enabled 1
686 13:53:50.832729 PCI: 00:15.3: enabled 1
687 13:53:50.832816 PCI: 00:16.0: enabled 1
688 13:53:50.835697 PCI: 00:16.1: enabled 0
689 13:53:50.838911 PCI: 00:16.2: enabled 0
690 13:53:50.842492 PCI: 00:16.3: enabled 0
691 13:53:50.842581 PCI: 00:16.4: enabled 0
692 13:53:50.845839 PCI: 00:16.5: enabled 0
693 13:53:50.848970 PCI: 00:17.0: enabled 1
694 13:53:50.852810 PCI: 00:19.0: enabled 0
695 13:53:50.852900 PCI: 00:19.1: enabled 1
696 13:53:50.855676 PCI: 00:19.2: enabled 0
697 13:53:50.858902 PCI: 00:1c.0: enabled 1
698 13:53:50.862301 PCI: 00:1c.1: enabled 0
699 13:53:50.862393 PCI: 00:1c.2: enabled 0
700 13:53:50.865596 PCI: 00:1c.3: enabled 0
701 13:53:50.869245 PCI: 00:1c.4: enabled 0
702 13:53:50.872186 PCI: 00:1c.5: enabled 0
703 13:53:50.872303 PCI: 00:1c.6: enabled 1
704 13:53:50.875556 PCI: 00:1c.7: enabled 0
705 13:53:50.878962 PCI: 00:1d.0: enabled 1
706 13:53:50.879092 PCI: 00:1d.1: enabled 0
707 13:53:50.882290 PCI: 00:1d.2: enabled 1
708 13:53:50.885997 PCI: 00:1d.3: enabled 0
709 13:53:50.888942 PCI: 00:1e.0: enabled 1
710 13:53:50.889096 PCI: 00:1e.1: enabled 0
711 13:53:50.892349 PCI: 00:1e.2: enabled 1
712 13:53:50.896058 PCI: 00:1e.3: enabled 1
713 13:53:50.898835 PCI: 00:1f.0: enabled 1
714 13:53:50.898955 PCI: 00:1f.1: enabled 0
715 13:53:50.902670 PCI: 00:1f.2: enabled 1
716 13:53:50.905464 PCI: 00:1f.3: enabled 1
717 13:53:50.909087 PCI: 00:1f.4: enabled 0
718 13:53:50.909197 PCI: 00:1f.5: enabled 1
719 13:53:50.912106 PCI: 00:1f.6: enabled 0
720 13:53:50.915711 PCI: 00:1f.7: enabled 0
721 13:53:50.915796 APIC: 00: enabled 1
722 13:53:50.919078 GENERIC: 0.0: enabled 1
723 13:53:50.922163 GENERIC: 0.0: enabled 1
724 13:53:50.925532 GENERIC: 1.0: enabled 1
725 13:53:50.925640 GENERIC: 0.0: enabled 1
726 13:53:50.928848 GENERIC: 1.0: enabled 1
727 13:53:50.932256 USB0 port 0: enabled 1
728 13:53:50.932349 GENERIC: 0.0: enabled 1
729 13:53:50.935685 USB0 port 0: enabled 1
730 13:53:50.938733 GENERIC: 0.0: enabled 1
731 13:53:50.942004 I2C: 00:1a: enabled 1
732 13:53:50.942143 I2C: 00:31: enabled 1
733 13:53:50.946019 I2C: 00:32: enabled 1
734 13:53:50.948934 I2C: 00:10: enabled 1
735 13:53:50.949122 I2C: 00:15: enabled 1
736 13:53:50.952304 GENERIC: 0.0: enabled 0
737 13:53:50.955266 GENERIC: 1.0: enabled 0
738 13:53:50.958801 GENERIC: 0.0: enabled 1
739 13:53:50.958914 SPI: 00: enabled 1
740 13:53:50.962493 SPI: 00: enabled 1
741 13:53:50.962609 PNP: 0c09.0: enabled 1
742 13:53:50.965479 GENERIC: 0.0: enabled 1
743 13:53:50.968871 USB3 port 0: enabled 1
744 13:53:50.972339 USB3 port 1: enabled 1
745 13:53:50.972455 USB3 port 2: enabled 0
746 13:53:50.975755 USB3 port 3: enabled 0
747 13:53:50.979089 USB2 port 0: enabled 0
748 13:53:50.979210 USB2 port 1: enabled 1
749 13:53:50.982156 USB2 port 2: enabled 1
750 13:53:50.985127 USB2 port 3: enabled 0
751 13:53:50.985216 USB2 port 4: enabled 1
752 13:53:50.988722 USB2 port 5: enabled 0
753 13:53:50.992190 USB2 port 6: enabled 0
754 13:53:50.995131 USB2 port 7: enabled 0
755 13:53:50.995248 USB2 port 8: enabled 0
756 13:53:50.998635 USB2 port 9: enabled 0
757 13:53:51.002017 USB3 port 0: enabled 0
758 13:53:51.002106 USB3 port 1: enabled 1
759 13:53:51.005277 USB3 port 2: enabled 0
760 13:53:51.008585 USB3 port 3: enabled 0
761 13:53:51.012013 GENERIC: 0.0: enabled 1
762 13:53:51.012099 GENERIC: 1.0: enabled 1
763 13:53:51.015136 APIC: 01: enabled 1
764 13:53:51.018540 APIC: 03: enabled 1
765 13:53:51.018646 APIC: 07: enabled 1
766 13:53:51.022028 APIC: 05: enabled 1
767 13:53:51.022106 APIC: 04: enabled 1
768 13:53:51.025592 APIC: 02: enabled 1
769 13:53:51.028286 APIC: 06: enabled 1
770 13:53:51.028367 Compare with tree...
771 13:53:51.031752 Root Device: enabled 1
772 13:53:51.035416 DOMAIN: 0000: enabled 1
773 13:53:51.038252 PCI: 00:00.0: enabled 1
774 13:53:51.038334 PCI: 00:02.0: enabled 1
775 13:53:51.041614 PCI: 00:04.0: enabled 1
776 13:53:51.045539 GENERIC: 0.0: enabled 1
777 13:53:51.048581 PCI: 00:05.0: enabled 1
778 13:53:51.051986 PCI: 00:06.0: enabled 0
779 13:53:51.052078 PCI: 00:07.0: enabled 0
780 13:53:51.055213 GENERIC: 0.0: enabled 1
781 13:53:51.058407 PCI: 00:07.1: enabled 0
782 13:53:51.061783 GENERIC: 1.0: enabled 1
783 13:53:51.064997 PCI: 00:07.2: enabled 0
784 13:53:51.065088 GENERIC: 0.0: enabled 1
785 13:53:51.068493 PCI: 00:07.3: enabled 0
786 13:53:51.071545 GENERIC: 1.0: enabled 1
787 13:53:51.075370 PCI: 00:08.0: enabled 1
788 13:53:51.078331 PCI: 00:09.0: enabled 0
789 13:53:51.078421 PCI: 00:0a.0: enabled 0
790 13:53:51.081643 PCI: 00:0d.0: enabled 1
791 13:53:51.085200 USB0 port 0: enabled 1
792 13:53:51.088491 USB3 port 0: enabled 1
793 13:53:51.091569 USB3 port 1: enabled 1
794 13:53:51.091662 USB3 port 2: enabled 0
795 13:53:51.095043 USB3 port 3: enabled 0
796 13:53:51.098372 PCI: 00:0d.1: enabled 0
797 13:53:51.101862 PCI: 00:0d.2: enabled 0
798 13:53:51.104933 GENERIC: 0.0: enabled 1
799 13:53:51.105025 PCI: 00:0d.3: enabled 0
800 13:53:51.108314 PCI: 00:0e.0: enabled 0
801 13:53:51.111640 PCI: 00:10.2: enabled 1
802 13:53:51.115045 PCI: 00:10.6: enabled 0
803 13:53:51.118132 PCI: 00:10.7: enabled 0
804 13:53:51.118221 PCI: 00:12.0: enabled 0
805 13:53:51.121714 PCI: 00:12.6: enabled 0
806 13:53:51.124831 PCI: 00:13.0: enabled 0
807 13:53:51.128147 PCI: 00:14.0: enabled 1
808 13:53:51.131618 USB0 port 0: enabled 1
809 13:53:51.131714 USB2 port 0: enabled 0
810 13:53:51.134630 USB2 port 1: enabled 1
811 13:53:51.138034 USB2 port 2: enabled 1
812 13:53:51.141562 USB2 port 3: enabled 0
813 13:53:51.144814 USB2 port 4: enabled 1
814 13:53:51.148024 USB2 port 5: enabled 0
815 13:53:51.148135 USB2 port 6: enabled 0
816 13:53:51.151262 USB2 port 7: enabled 0
817 13:53:51.154875 USB2 port 8: enabled 0
818 13:53:51.158295 USB2 port 9: enabled 0
819 13:53:51.161526 USB3 port 0: enabled 0
820 13:53:51.161618 USB3 port 1: enabled 1
821 13:53:51.165048 USB3 port 2: enabled 0
822 13:53:51.168281 USB3 port 3: enabled 0
823 13:53:51.171833 PCI: 00:14.1: enabled 0
824 13:53:51.175391 PCI: 00:14.2: enabled 1
825 13:53:51.175497 PCI: 00:14.3: enabled 1
826 13:53:51.178772 GENERIC: 0.0: enabled 1
827 13:53:51.181890 PCI: 00:15.0: enabled 1
828 13:53:51.185727 I2C: 00:1a: enabled 1
829 13:53:51.185838 I2C: 00:31: enabled 1
830 13:53:51.188897 I2C: 00:32: enabled 1
831 13:53:51.192309 PCI: 00:15.1: enabled 1
832 13:53:51.195270 I2C: 00:10: enabled 1
833 13:53:51.198594 PCI: 00:15.2: enabled 1
834 13:53:51.198687 PCI: 00:15.3: enabled 1
835 13:53:51.202294 PCI: 00:16.0: enabled 1
836 13:53:51.205268 PCI: 00:16.1: enabled 0
837 13:53:51.208785 PCI: 00:16.2: enabled 0
838 13:53:51.211682 PCI: 00:16.3: enabled 0
839 13:53:51.211767 PCI: 00:16.4: enabled 0
840 13:53:51.215118 PCI: 00:16.5: enabled 0
841 13:53:51.218738 PCI: 00:17.0: enabled 1
842 13:53:51.268829 PCI: 00:19.0: enabled 0
843 13:53:51.268987 PCI: 00:19.1: enabled 1
844 13:53:51.269057 I2C: 00:15: enabled 1
845 13:53:51.269120 PCI: 00:19.2: enabled 0
846 13:53:51.269180 PCI: 00:1d.0: enabled 1
847 13:53:51.269436 GENERIC: 0.0: enabled 1
848 13:53:51.269543 PCI: 00:1e.0: enabled 1
849 13:53:51.269627 PCI: 00:1e.1: enabled 0
850 13:53:51.269691 PCI: 00:1e.2: enabled 1
851 13:53:51.269750 SPI: 00: enabled 1
852 13:53:51.269819 PCI: 00:1e.3: enabled 1
853 13:53:51.269880 SPI: 00: enabled 1
854 13:53:51.269947 PCI: 00:1f.0: enabled 1
855 13:53:51.270006 PNP: 0c09.0: enabled 1
856 13:53:51.270063 PCI: 00:1f.1: enabled 0
857 13:53:51.270446 PCI: 00:1f.2: enabled 1
858 13:53:51.270531 GENERIC: 0.0: enabled 1
859 13:53:51.270783 GENERIC: 0.0: enabled 1
860 13:53:51.270851 GENERIC: 1.0: enabled 1
861 13:53:51.320768 PCI: 00:1f.3: enabled 1
862 13:53:51.320916 PCI: 00:1f.4: enabled 0
863 13:53:51.321022 PCI: 00:1f.5: enabled 1
864 13:53:51.321422 PCI: 00:1f.6: enabled 0
865 13:53:51.321501 PCI: 00:1f.7: enabled 0
866 13:53:51.321764 CPU_CLUSTER: 0: enabled 1
867 13:53:51.321838 APIC: 00: enabled 1
868 13:53:51.321920 APIC: 01: enabled 1
869 13:53:51.322000 APIC: 03: enabled 1
870 13:53:51.322078 APIC: 07: enabled 1
871 13:53:51.322453 APIC: 05: enabled 1
872 13:53:51.322555 APIC: 04: enabled 1
873 13:53:51.322635 APIC: 02: enabled 1
874 13:53:51.322976 APIC: 06: enabled 1
875 13:53:51.323075 Root Device scanning...
876 13:53:51.323176 scan_static_bus for Root Device
877 13:53:51.323556 DOMAIN: 0000 enabled
878 13:53:51.323630 CPU_CLUSTER: 0 enabled
879 13:53:51.324139 DOMAIN: 0000 scanning...
880 13:53:51.324212 PCI: pci_scan_bus for bus 00
881 13:53:51.338131 PCI: 00:00.0 [8086/0000] ops
882 13:53:51.338258 PCI: 00:00.0 [8086/9a12] enabled
883 13:53:51.338732 PCI: 00:02.0 [8086/0000] bus ops
884 13:53:51.338821 PCI: 00:02.0 [8086/9a40] enabled
885 13:53:51.341713 PCI: 00:04.0 [8086/0000] bus ops
886 13:53:51.341804 PCI: 00:04.0 [8086/9a03] enabled
887 13:53:51.345075 PCI: 00:05.0 [8086/9a19] enabled
888 13:53:51.345166 PCI: 00:07.0 [0000/0000] hidden
889 13:53:51.348134 PCI: 00:08.0 [8086/9a11] enabled
890 13:53:51.351704 PCI: 00:0a.0 [8086/9a0d] disabled
891 13:53:51.354993 PCI: 00:0d.0 [8086/0000] bus ops
892 13:53:51.358114 PCI: 00:0d.0 [8086/9a13] enabled
893 13:53:51.361483 PCI: 00:14.0 [8086/0000] bus ops
894 13:53:51.365007 PCI: 00:14.0 [8086/a0ed] enabled
895 13:53:51.368293 PCI: 00:14.2 [8086/a0ef] enabled
896 13:53:51.371248 PCI: 00:14.3 [8086/0000] bus ops
897 13:53:51.374535 PCI: 00:14.3 [8086/a0f0] enabled
898 13:53:51.378119 PCI: 00:15.0 [8086/0000] bus ops
899 13:53:51.381551 PCI: 00:15.0 [8086/a0e8] enabled
900 13:53:51.384795 PCI: 00:15.1 [8086/0000] bus ops
901 13:53:51.387843 PCI: 00:15.1 [8086/a0e9] enabled
902 13:53:51.391265 PCI: 00:15.2 [8086/0000] bus ops
903 13:53:51.394444 PCI: 00:15.2 [8086/a0ea] enabled
904 13:53:51.397809 PCI: 00:15.3 [8086/0000] bus ops
905 13:53:51.401742 PCI: 00:15.3 [8086/a0eb] enabled
906 13:53:51.404600 PCI: 00:16.0 [8086/0000] ops
907 13:53:51.407930 PCI: 00:16.0 [8086/a0e0] enabled
908 13:53:51.414599 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 13:53:51.418083 PCI: 00:19.0 [8086/0000] bus ops
910 13:53:51.421121 PCI: 00:19.0 [8086/a0c5] disabled
911 13:53:51.424681 PCI: 00:19.1 [8086/0000] bus ops
912 13:53:51.428158 PCI: 00:19.1 [8086/a0c6] enabled
913 13:53:51.431373 PCI: 00:1d.0 [8086/0000] bus ops
914 13:53:51.434642 PCI: 00:1d.0 [8086/a0b0] enabled
915 13:53:51.438049 PCI: 00:1e.0 [8086/0000] ops
916 13:53:51.441037 PCI: 00:1e.0 [8086/a0a8] enabled
917 13:53:51.444918 PCI: 00:1e.2 [8086/0000] bus ops
918 13:53:51.447734 PCI: 00:1e.2 [8086/a0aa] enabled
919 13:53:51.451152 PCI: 00:1e.3 [8086/0000] bus ops
920 13:53:51.454916 PCI: 00:1e.3 [8086/a0ab] enabled
921 13:53:51.457823 PCI: 00:1f.0 [8086/0000] bus ops
922 13:53:51.461036 PCI: 00:1f.0 [8086/a087] enabled
923 13:53:51.461121 RTC Init
924 13:53:51.464523 Set power on after power failure.
925 13:53:51.467989 Disabling Deep S3
926 13:53:51.471069 Disabling Deep S3
927 13:53:51.471155 Disabling Deep S4
928 13:53:51.474821 Disabling Deep S4
929 13:53:51.474909 Disabling Deep S5
930 13:53:51.478096 Disabling Deep S5
931 13:53:51.481298 PCI: 00:1f.2 [0000/0000] hidden
932 13:53:51.484791 PCI: 00:1f.3 [8086/0000] bus ops
933 13:53:51.487999 PCI: 00:1f.3 [8086/a0c8] enabled
934 13:53:51.491418 PCI: 00:1f.5 [8086/0000] bus ops
935 13:53:51.494336 PCI: 00:1f.5 [8086/a0a4] enabled
936 13:53:51.497996 PCI: Leftover static devices:
937 13:53:51.498126 PCI: 00:10.2
938 13:53:51.498238 PCI: 00:10.6
939 13:53:51.501239 PCI: 00:10.7
940 13:53:51.501368 PCI: 00:06.0
941 13:53:51.504746 PCI: 00:07.1
942 13:53:51.504869 PCI: 00:07.2
943 13:53:51.508166 PCI: 00:07.3
944 13:53:51.508279 PCI: 00:09.0
945 13:53:51.508394 PCI: 00:0d.1
946 13:53:51.511167 PCI: 00:0d.2
947 13:53:51.511279 PCI: 00:0d.3
948 13:53:51.514662 PCI: 00:0e.0
949 13:53:51.514782 PCI: 00:12.0
950 13:53:51.514887 PCI: 00:12.6
951 13:53:51.518376 PCI: 00:13.0
952 13:53:51.518485 PCI: 00:14.1
953 13:53:51.520913 PCI: 00:16.1
954 13:53:51.521022 PCI: 00:16.2
955 13:53:51.521136 PCI: 00:16.3
956 13:53:51.524668 PCI: 00:16.4
957 13:53:51.524792 PCI: 00:16.5
958 13:53:51.528244 PCI: 00:17.0
959 13:53:51.528359 PCI: 00:19.2
960 13:53:51.531078 PCI: 00:1e.1
961 13:53:51.531191 PCI: 00:1f.1
962 13:53:51.531286 PCI: 00:1f.4
963 13:53:51.534467 PCI: 00:1f.6
964 13:53:51.534546 PCI: 00:1f.7
965 13:53:51.537721 PCI: Check your devicetree.cb.
966 13:53:51.541127 PCI: 00:02.0 scanning...
967 13:53:51.544486 scan_generic_bus for PCI: 00:02.0
968 13:53:51.548037 scan_generic_bus for PCI: 00:02.0 done
969 13:53:51.554582 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 13:53:51.554698 PCI: 00:04.0 scanning...
971 13:53:51.557872 scan_generic_bus for PCI: 00:04.0
972 13:53:51.561069 GENERIC: 0.0 enabled
973 13:53:51.567916 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 13:53:51.571196 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 13:53:51.574118 PCI: 00:0d.0 scanning...
976 13:53:51.577599 scan_static_bus for PCI: 00:0d.0
977 13:53:51.581104 USB0 port 0 enabled
978 13:53:51.584023 USB0 port 0 scanning...
979 13:53:51.587684 scan_static_bus for USB0 port 0
980 13:53:51.587821 USB3 port 0 enabled
981 13:53:51.590792 USB3 port 1 enabled
982 13:53:51.590915 USB3 port 2 disabled
983 13:53:51.594403 USB3 port 3 disabled
984 13:53:51.597387 USB3 port 0 scanning...
985 13:53:51.600780 scan_static_bus for USB3 port 0
986 13:53:51.604231 scan_static_bus for USB3 port 0 done
987 13:53:51.607372 scan_bus: bus USB3 port 0 finished in 6 msecs
988 13:53:51.611026 USB3 port 1 scanning...
989 13:53:51.614008 scan_static_bus for USB3 port 1
990 13:53:51.617259 scan_static_bus for USB3 port 1 done
991 13:53:51.624314 scan_bus: bus USB3 port 1 finished in 6 msecs
992 13:53:51.627231 scan_static_bus for USB0 port 0 done
993 13:53:51.630793 scan_bus: bus USB0 port 0 finished in 43 msecs
994 13:53:51.633777 scan_static_bus for PCI: 00:0d.0 done
995 13:53:51.640601 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 13:53:51.643768 PCI: 00:14.0 scanning...
997 13:53:51.646944 scan_static_bus for PCI: 00:14.0
998 13:53:51.647055 USB0 port 0 enabled
999 13:53:51.650478 USB0 port 0 scanning...
1000 13:53:51.653545 scan_static_bus for USB0 port 0
1001 13:53:51.657350 USB2 port 0 disabled
1002 13:53:51.657462 USB2 port 1 enabled
1003 13:53:51.660356 USB2 port 2 enabled
1004 13:53:51.663851 USB2 port 3 disabled
1005 13:53:51.663971 USB2 port 4 enabled
1006 13:53:51.667311 USB2 port 5 disabled
1007 13:53:51.670233 USB2 port 6 disabled
1008 13:53:51.670351 USB2 port 7 disabled
1009 13:53:51.673911 USB2 port 8 disabled
1010 13:53:51.674031 USB2 port 9 disabled
1011 13:53:51.677255 USB3 port 0 disabled
1012 13:53:51.680335 USB3 port 1 enabled
1013 13:53:51.680463 USB3 port 2 disabled
1014 13:53:51.683809 USB3 port 3 disabled
1015 13:53:51.687064 USB2 port 1 scanning...
1016 13:53:51.690424 scan_static_bus for USB2 port 1
1017 13:53:51.693845 scan_static_bus for USB2 port 1 done
1018 13:53:51.697153 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 13:53:51.700147 USB2 port 2 scanning...
1020 13:53:51.703609 scan_static_bus for USB2 port 2
1021 13:53:51.707202 scan_static_bus for USB2 port 2 done
1022 13:53:51.713475 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 13:53:51.713566 USB2 port 4 scanning...
1024 13:53:51.716811 scan_static_bus for USB2 port 4
1025 13:53:51.723563 scan_static_bus for USB2 port 4 done
1026 13:53:51.726979 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 13:53:51.730516 USB3 port 1 scanning...
1028 13:53:51.733417 scan_static_bus for USB3 port 1
1029 13:53:51.736932 scan_static_bus for USB3 port 1 done
1030 13:53:51.740090 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 13:53:51.743597 scan_static_bus for USB0 port 0 done
1032 13:53:51.750528 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 13:53:51.754063 scan_static_bus for PCI: 00:14.0 done
1034 13:53:51.757838 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1035 13:53:51.760861 PCI: 00:14.3 scanning...
1036 13:53:51.764208 scan_static_bus for PCI: 00:14.3
1037 13:53:51.767217 GENERIC: 0.0 enabled
1038 13:53:51.770613 scan_static_bus for PCI: 00:14.3 done
1039 13:53:51.773983 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 13:53:51.777690 PCI: 00:15.0 scanning...
1041 13:53:51.780465 scan_static_bus for PCI: 00:15.0
1042 13:53:51.784046 I2C: 00:1a enabled
1043 13:53:51.784134 I2C: 00:31 enabled
1044 13:53:51.787003 I2C: 00:32 enabled
1045 13:53:51.790323 scan_static_bus for PCI: 00:15.0 done
1046 13:53:51.793831 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 13:53:51.797218 PCI: 00:15.1 scanning...
1048 13:53:51.800675 scan_static_bus for PCI: 00:15.1
1049 13:53:51.803469 I2C: 00:10 enabled
1050 13:53:51.807087 scan_static_bus for PCI: 00:15.1 done
1051 13:53:51.810278 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 13:53:51.813466 PCI: 00:15.2 scanning...
1053 13:53:51.816836 scan_static_bus for PCI: 00:15.2
1054 13:53:51.820101 scan_static_bus for PCI: 00:15.2 done
1055 13:53:51.826868 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 13:53:51.830330 PCI: 00:15.3 scanning...
1057 13:53:51.833637 scan_static_bus for PCI: 00:15.3
1058 13:53:51.837014 scan_static_bus for PCI: 00:15.3 done
1059 13:53:51.840015 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 13:53:51.843390 PCI: 00:19.1 scanning...
1061 13:53:51.846802 scan_static_bus for PCI: 00:19.1
1062 13:53:51.850185 I2C: 00:15 enabled
1063 13:53:51.853632 scan_static_bus for PCI: 00:19.1 done
1064 13:53:51.856743 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 13:53:51.860140 PCI: 00:1d.0 scanning...
1066 13:53:51.863473 do_pci_scan_bridge for PCI: 00:1d.0
1067 13:53:51.866727 PCI: pci_scan_bus for bus 01
1068 13:53:51.870279 PCI: 01:00.0 [1c5c/174a] enabled
1069 13:53:51.873160 GENERIC: 0.0 enabled
1070 13:53:51.876591 Enabling Common Clock Configuration
1071 13:53:51.880092 L1 Sub-State supported from root port 29
1072 13:53:51.883590 L1 Sub-State Support = 0xf
1073 13:53:51.886994 CommonModeRestoreTime = 0x28
1074 13:53:51.889890 Power On Value = 0x16, Power On Scale = 0x0
1075 13:53:51.893400 ASPM: Enabled L1
1076 13:53:51.896982 PCIe: Max_Payload_Size adjusted to 128
1077 13:53:51.900374 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 13:53:51.903162 PCI: 00:1e.2 scanning...
1079 13:53:51.906804 scan_generic_bus for PCI: 00:1e.2
1080 13:53:51.910060 SPI: 00 enabled
1081 13:53:51.913188 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 13:53:51.920178 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 13:53:51.923152 PCI: 00:1e.3 scanning...
1084 13:53:51.926768 scan_generic_bus for PCI: 00:1e.3
1085 13:53:51.926859 SPI: 00 enabled
1086 13:53:51.933076 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 13:53:51.936619 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 13:53:51.940280 PCI: 00:1f.0 scanning...
1089 13:53:51.943066 scan_static_bus for PCI: 00:1f.0
1090 13:53:51.946484 PNP: 0c09.0 enabled
1091 13:53:51.949727 PNP: 0c09.0 scanning...
1092 13:53:51.953444 scan_static_bus for PNP: 0c09.0
1093 13:53:51.956674 scan_static_bus for PNP: 0c09.0 done
1094 13:53:51.959578 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 13:53:51.963009 scan_static_bus for PCI: 00:1f.0 done
1096 13:53:51.970031 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 13:53:51.972879 PCI: 00:1f.2 scanning...
1098 13:53:51.976585 scan_static_bus for PCI: 00:1f.2
1099 13:53:51.976665 GENERIC: 0.0 enabled
1100 13:53:51.979368 GENERIC: 0.0 scanning...
1101 13:53:51.982997 scan_static_bus for GENERIC: 0.0
1102 13:53:51.986426 GENERIC: 0.0 enabled
1103 13:53:51.986512 GENERIC: 1.0 enabled
1104 13:53:51.992645 scan_static_bus for GENERIC: 0.0 done
1105 13:53:51.996360 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 13:53:51.999601 scan_static_bus for PCI: 00:1f.2 done
1107 13:53:52.006219 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 13:53:52.006337 PCI: 00:1f.3 scanning...
1109 13:53:52.009642 scan_static_bus for PCI: 00:1f.3
1110 13:53:52.016149 scan_static_bus for PCI: 00:1f.3 done
1111 13:53:52.019576 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 13:53:52.022774 PCI: 00:1f.5 scanning...
1113 13:53:52.026059 scan_generic_bus for PCI: 00:1f.5
1114 13:53:52.029567 scan_generic_bus for PCI: 00:1f.5 done
1115 13:53:52.036259 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 13:53:52.039061 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 13:53:52.042669 scan_static_bus for Root Device done
1118 13:53:52.049199 scan_bus: bus Root Device finished in 737 msecs
1119 13:53:52.049316 done
1120 13:53:52.055787 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 13:53:52.059474 Chrome EC: UHEPI supported
1122 13:53:52.062287 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 13:53:52.069178 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 13:53:52.072789 SPI flash protection: WPSW=0 SRP0=0
1125 13:53:52.078967 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 13:53:52.085924 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 13:53:52.086018 found VGA at PCI: 00:02.0
1128 13:53:52.088839 Setting up VGA for PCI: 00:02.0
1129 13:53:52.095868 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 13:53:52.098899 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 13:53:52.102451 Allocating resources...
1132 13:53:52.105397 Reading resources...
1133 13:53:52.108894 Root Device read_resources bus 0 link: 0
1134 13:53:52.112405 DOMAIN: 0000 read_resources bus 0 link: 0
1135 13:53:52.119367 PCI: 00:04.0 read_resources bus 1 link: 0
1136 13:53:52.122807 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 13:53:52.129616 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 13:53:52.132814 USB0 port 0 read_resources bus 0 link: 0
1139 13:53:52.139494 USB0 port 0 read_resources bus 0 link: 0 done
1140 13:53:52.142868 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 13:53:52.146266 PCI: 00:14.0 read_resources bus 0 link: 0
1142 13:53:52.153182 USB0 port 0 read_resources bus 0 link: 0
1143 13:53:52.156204 USB0 port 0 read_resources bus 0 link: 0 done
1144 13:53:52.163008 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 13:53:52.166526 PCI: 00:14.3 read_resources bus 0 link: 0
1146 13:53:52.173434 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 13:53:52.176367 PCI: 00:15.0 read_resources bus 0 link: 0
1148 13:53:52.183176 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 13:53:52.187011 PCI: 00:15.1 read_resources bus 0 link: 0
1150 13:53:52.193445 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 13:53:52.196649 PCI: 00:19.1 read_resources bus 0 link: 0
1152 13:53:52.203487 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 13:53:52.207094 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 13:53:52.213419 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 13:53:52.216866 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 13:53:52.223455 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 13:53:52.227059 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 13:53:52.233504 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 13:53:52.237020 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 13:53:52.243507 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 13:53:52.246663 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 13:53:52.249885 GENERIC: 0.0 read_resources bus 0 link: 0
1163 13:53:52.257247 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 13:53:52.260526 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 13:53:52.267648 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 13:53:52.271131 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 13:53:52.277972 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 13:53:52.281118 Root Device read_resources bus 0 link: 0 done
1169 13:53:52.284229 Done reading resources.
1170 13:53:52.291062 Show resources in subtree (Root Device)...After reading.
1171 13:53:52.294586 Root Device child on link 0 DOMAIN: 0000
1172 13:53:52.297835 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 13:53:52.307611 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 13:53:52.318079 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 13:53:52.320897 PCI: 00:00.0
1176 13:53:52.330810 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 13:53:52.337473 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 13:53:52.348009 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 13:53:52.357466 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 13:53:52.367473 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 13:53:52.377429 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 13:53:52.387145 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 13:53:52.393997 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 13:53:52.404264 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 13:53:52.414016 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 13:53:52.423640 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 13:53:52.433768 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 13:53:52.440414 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 13:53:52.450273 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 13:53:52.460000 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 13:53:52.470168 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 13:53:52.479921 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 13:53:52.490200 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 13:53:52.497103 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 13:53:52.506382 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 13:53:52.510258 PCI: 00:02.0
1197 13:53:52.520167 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 13:53:52.529930 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 13:53:52.539891 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 13:53:52.543020 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 13:53:52.553130 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 13:53:52.556403 GENERIC: 0.0
1203 13:53:52.556496 PCI: 00:05.0
1204 13:53:52.566552 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 13:53:52.569493 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 13:53:52.573286 GENERIC: 0.0
1207 13:53:52.576362 PCI: 00:08.0
1208 13:53:52.583458 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 13:53:52.586676 PCI: 00:0a.0
1210 13:53:52.590052 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 13:53:52.599545 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 13:53:52.606631 USB0 port 0 child on link 0 USB3 port 0
1213 13:53:52.606750 USB3 port 0
1214 13:53:52.610025 USB3 port 1
1215 13:53:52.610129 USB3 port 2
1216 13:53:52.612932 USB3 port 3
1217 13:53:52.616372 PCI: 00:14.0 child on link 0 USB0 port 0
1218 13:53:52.626183 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 13:53:52.629870 USB0 port 0 child on link 0 USB2 port 0
1220 13:53:52.632828 USB2 port 0
1221 13:53:52.636407 USB2 port 1
1222 13:53:52.636494 USB2 port 2
1223 13:53:52.639974 USB2 port 3
1224 13:53:52.640062 USB2 port 4
1225 13:53:52.643423 USB2 port 5
1226 13:53:52.643526 USB2 port 6
1227 13:53:52.646733 USB2 port 7
1228 13:53:52.646820 USB2 port 8
1229 13:53:52.649822 USB2 port 9
1230 13:53:52.649908 USB3 port 0
1231 13:53:52.653089 USB3 port 1
1232 13:53:52.653175 USB3 port 2
1233 13:53:52.656822 USB3 port 3
1234 13:53:52.656908 PCI: 00:14.2
1235 13:53:52.666455 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 13:53:52.676191 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 13:53:52.683019 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 13:53:52.692904 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 13:53:52.693031 GENERIC: 0.0
1240 13:53:52.699302 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 13:53:52.709279 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 13:53:52.709373 I2C: 00:1a
1243 13:53:52.709441 I2C: 00:31
1244 13:53:52.712652 I2C: 00:32
1245 13:53:52.716438 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 13:53:52.726320 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 13:53:52.729318 I2C: 00:10
1248 13:53:52.729397 PCI: 00:15.2
1249 13:53:52.739298 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 13:53:52.742862 PCI: 00:15.3
1251 13:53:52.752495 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 13:53:52.752588 PCI: 00:16.0
1253 13:53:52.762886 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 13:53:52.765729 PCI: 00:19.0
1255 13:53:52.769168 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 13:53:52.779381 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 13:53:52.779534 I2C: 00:15
1258 13:53:52.785909 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 13:53:52.792317 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 13:53:52.802336 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 13:53:52.812791 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 13:53:52.816304 GENERIC: 0.0
1263 13:53:52.816397 PCI: 01:00.0
1264 13:53:52.825574 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 13:53:52.836199 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1266 13:53:52.845441 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1267 13:53:52.845558 PCI: 00:1e.0
1268 13:53:52.859201 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1269 13:53:52.862283 PCI: 00:1e.2 child on link 0 SPI: 00
1270 13:53:52.872542 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 13:53:52.872638 SPI: 00
1272 13:53:52.875416 PCI: 00:1e.3 child on link 0 SPI: 00
1273 13:53:52.885400 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 13:53:52.888626 SPI: 00
1275 13:53:52.892154 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1276 13:53:52.902213 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1277 13:53:52.902318 PNP: 0c09.0
1278 13:53:52.911738 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1279 13:53:52.915486 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1280 13:53:52.925192 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1281 13:53:52.935470 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1282 13:53:52.938397 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1283 13:53:52.942132 GENERIC: 0.0
1284 13:53:52.942226 GENERIC: 1.0
1285 13:53:52.945256 PCI: 00:1f.3
1286 13:53:52.954988 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1287 13:53:52.965149 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1288 13:53:52.965244 PCI: 00:1f.5
1289 13:53:52.975476 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1290 13:53:52.981760 CPU_CLUSTER: 0 child on link 0 APIC: 00
1291 13:53:52.981861 APIC: 00
1292 13:53:52.981926 APIC: 01
1293 13:53:52.985167 APIC: 03
1294 13:53:52.985240 APIC: 07
1295 13:53:52.985300 APIC: 05
1296 13:53:52.988628 APIC: 04
1297 13:53:52.988715 APIC: 02
1298 13:53:52.991384 APIC: 06
1299 13:53:52.998144 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1300 13:53:53.004914 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1301 13:53:53.011554 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1302 13:53:53.014868 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1303 13:53:53.021673 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1304 13:53:53.024620 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1305 13:53:53.028426 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1306 13:53:53.035026 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1307 13:53:53.045017 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1308 13:53:53.051207 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1309 13:53:53.058314 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1310 13:53:53.064575 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1311 13:53:53.071271 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1312 13:53:53.077804 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1313 13:53:53.087961 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1314 13:53:53.090797 DOMAIN: 0000: Resource ranges:
1315 13:53:53.094155 * Base: 1000, Size: 800, Tag: 100
1316 13:53:53.097563 * Base: 1900, Size: e700, Tag: 100
1317 13:53:53.100912 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1318 13:53:53.108018 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1319 13:53:53.117607 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1320 13:53:53.123977 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1321 13:53:53.130808 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1322 13:53:53.141074 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1323 13:53:53.147664 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1324 13:53:53.153928 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1325 13:53:53.160846 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1326 13:53:53.171047 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1327 13:53:53.177531 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1328 13:53:53.183865 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1329 13:53:53.194060 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1330 13:53:53.200918 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1331 13:53:53.207121 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1332 13:53:53.217379 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1333 13:53:53.223580 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1334 13:53:53.230398 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1335 13:53:53.240497 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1336 13:53:53.246741 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1337 13:53:53.253517 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1338 13:53:53.263366 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1339 13:53:53.269996 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1340 13:53:53.276716 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1341 13:53:53.286721 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1342 13:53:53.290023 DOMAIN: 0000: Resource ranges:
1343 13:53:53.293564 * Base: 7fc00000, Size: 40400000, Tag: 200
1344 13:53:53.296650 * Base: d0000000, Size: 28000000, Tag: 200
1345 13:53:53.303579 * Base: fa000000, Size: 1000000, Tag: 200
1346 13:53:53.306963 * Base: fb001000, Size: 2fff000, Tag: 200
1347 13:53:53.310172 * Base: fe010000, Size: 2e000, Tag: 200
1348 13:53:53.313096 * Base: fe03f000, Size: d41000, Tag: 200
1349 13:53:53.319912 * Base: fed88000, Size: 8000, Tag: 200
1350 13:53:53.323390 * Base: fed93000, Size: d000, Tag: 200
1351 13:53:53.326531 * Base: feda2000, Size: 1e000, Tag: 200
1352 13:53:53.329846 * Base: fede0000, Size: 1220000, Tag: 200
1353 13:53:53.336388 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 13:53:53.342924 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 13:53:53.349633 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 13:53:53.356661 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 13:53:53.362845 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 13:53:53.369870 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 13:53:53.376392 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 13:53:53.383197 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 13:53:53.389633 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 13:53:53.395994 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 13:53:53.402840 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 13:53:53.409559 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 13:53:53.416065 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 13:53:53.422590 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 13:53:53.429597 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 13:53:53.435707 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 13:53:53.442452 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 13:53:53.449374 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 13:53:53.455707 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 13:53:53.462387 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 13:53:53.469106 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 13:53:53.475622 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 13:53:53.482859 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 13:53:53.488827 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 13:53:53.499260 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 13:53:53.502383 PCI: 00:1d.0: Resource ranges:
1379 13:53:53.505704 * Base: 7fc00000, Size: 100000, Tag: 200
1380 13:53:53.512331 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 13:53:53.518730 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 13:53:53.525308 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 13:53:53.531902 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 13:53:53.541840 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 13:53:53.545805 Root Device assign_resources, bus 0 link: 0
1386 13:53:53.548770 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 13:53:53.558769 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 13:53:53.565250 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 13:53:53.575156 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 13:53:53.582024 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 13:53:53.588538 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 13:53:53.591887 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 13:53:53.598046 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 13:53:53.608715 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 13:53:53.615092 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 13:53:53.621766 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 13:53:53.625000 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 13:53:53.634809 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 13:53:53.638303 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 13:53:53.641960 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 13:53:53.651683 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 13:53:53.658576 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 13:53:53.668212 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 13:53:53.671425 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 13:53:53.678196 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 13:53:53.685195 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 13:53:53.688271 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 13:53:53.695247 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 13:53:53.701838 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 13:53:53.708101 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 13:53:53.711629 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 13:53:53.721565 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 13:53:53.728339 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 13:53:53.738184 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 13:53:53.744677 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 13:53:53.748162 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 13:53:53.754414 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 13:53:53.761452 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 13:53:53.771436 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 13:53:53.781210 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 13:53:53.784119 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 13:53:53.794118 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 13:53:53.800970 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 13:53:53.811070 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 13:53:53.813883 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 13:53:53.824003 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 13:53:53.827428 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 13:53:53.831004 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 13:53:53.840731 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 13:53:53.843722 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 13:53:53.850622 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 13:53:53.853938 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 13:53:53.860705 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 13:53:53.863736 LPC: Trying to open IO window from 800 size 1ff
1435 13:53:53.873899 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 13:53:53.880118 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 13:53:53.887004 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 13:53:53.893641 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 13:53:53.896985 Root Device assign_resources, bus 0 link: 0
1440 13:53:53.900222 Done setting resources.
1441 13:53:53.906968 Show resources in subtree (Root Device)...After assigning values.
1442 13:53:53.910289 Root Device child on link 0 DOMAIN: 0000
1443 13:53:53.917180 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 13:53:53.923519 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 13:53:53.933336 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 13:53:53.936665 PCI: 00:00.0
1447 13:53:53.946449 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 13:53:53.956772 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 13:53:53.963722 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 13:53:53.973152 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 13:53:53.983174 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 13:53:53.993206 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 13:53:54.003243 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 13:53:54.013294 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 13:53:54.019812 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 13:53:54.029902 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 13:53:54.039967 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 13:53:54.049511 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 13:53:54.059499 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 13:53:54.066260 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 13:53:54.076218 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 13:53:54.085919 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 13:53:54.096086 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 13:53:54.106282 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 13:53:54.115826 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 13:53:54.125683 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 13:53:54.125807 PCI: 00:02.0
1468 13:53:54.135993 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 13:53:54.148870 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 13:53:54.155776 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 13:53:54.162451 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 13:53:54.172129 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 13:53:54.172220 GENERIC: 0.0
1474 13:53:54.175587 PCI: 00:05.0
1475 13:53:54.185519 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 13:53:54.189056 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 13:53:54.192486 GENERIC: 0.0
1478 13:53:54.192571 PCI: 00:08.0
1479 13:53:54.205252 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 13:53:54.205438 PCI: 00:0a.0
1481 13:53:54.208691 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 13:53:54.221813 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 13:53:54.225548 USB0 port 0 child on link 0 USB3 port 0
1484 13:53:54.225702 USB3 port 0
1485 13:53:54.228800 USB3 port 1
1486 13:53:54.228915 USB3 port 2
1487 13:53:54.231931 USB3 port 3
1488 13:53:54.235940 PCI: 00:14.0 child on link 0 USB0 port 0
1489 13:53:54.245719 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1490 13:53:54.251893 USB0 port 0 child on link 0 USB2 port 0
1491 13:53:54.252024 USB2 port 0
1492 13:53:54.255284 USB2 port 1
1493 13:53:54.255396 USB2 port 2
1494 13:53:54.258897 USB2 port 3
1495 13:53:54.258997 USB2 port 4
1496 13:53:54.262267 USB2 port 5
1497 13:53:54.262357 USB2 port 6
1498 13:53:54.265382 USB2 port 7
1499 13:53:54.268958 USB2 port 8
1500 13:53:54.269045 USB2 port 9
1501 13:53:54.272416 USB3 port 0
1502 13:53:54.272503 USB3 port 1
1503 13:53:54.275097 USB3 port 2
1504 13:53:54.275210 USB3 port 3
1505 13:53:54.278762 PCI: 00:14.2
1506 13:53:54.288875 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 13:53:54.298584 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 13:53:54.301992 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1509 13:53:54.311863 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1510 13:53:54.315280 GENERIC: 0.0
1511 13:53:54.318678 PCI: 00:15.0 child on link 0 I2C: 00:1a
1512 13:53:54.328547 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1513 13:53:54.331646 I2C: 00:1a
1514 13:53:54.331731 I2C: 00:31
1515 13:53:54.335061 I2C: 00:32
1516 13:53:54.338354 PCI: 00:15.1 child on link 0 I2C: 00:10
1517 13:53:54.348508 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1518 13:53:54.351881 I2C: 00:10
1519 13:53:54.352015 PCI: 00:15.2
1520 13:53:54.361452 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1521 13:53:54.364930 PCI: 00:15.3
1522 13:53:54.374975 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1523 13:53:54.375092 PCI: 00:16.0
1524 13:53:54.384715 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1525 13:53:54.388107 PCI: 00:19.0
1526 13:53:54.391765 PCI: 00:19.1 child on link 0 I2C: 00:15
1527 13:53:54.401570 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1528 13:53:54.404684 I2C: 00:15
1529 13:53:54.408345 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1530 13:53:54.417854 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1531 13:53:54.427727 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1532 13:53:54.441261 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1533 13:53:54.441388 GENERIC: 0.0
1534 13:53:54.444434 PCI: 01:00.0
1535 13:53:54.454460 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1536 13:53:54.464757 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1537 13:53:54.474263 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1538 13:53:54.477530 PCI: 00:1e.0
1539 13:53:54.487600 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1540 13:53:54.491293 PCI: 00:1e.2 child on link 0 SPI: 00
1541 13:53:54.501053 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1542 13:53:54.504497 SPI: 00
1543 13:53:54.507461 PCI: 00:1e.3 child on link 0 SPI: 00
1544 13:53:54.517327 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1545 13:53:54.517449 SPI: 00
1546 13:53:54.524030 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1547 13:53:54.531069 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1548 13:53:54.534017 PNP: 0c09.0
1549 13:53:54.544407 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1550 13:53:54.547712 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1551 13:53:54.557592 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1552 13:53:54.564088 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1553 13:53:54.570922 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1554 13:53:54.571020 GENERIC: 0.0
1555 13:53:54.574144 GENERIC: 1.0
1556 13:53:54.574229 PCI: 00:1f.3
1557 13:53:54.587394 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1558 13:53:54.597632 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1559 13:53:54.597774 PCI: 00:1f.5
1560 13:53:54.607177 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1561 13:53:54.614242 CPU_CLUSTER: 0 child on link 0 APIC: 00
1562 13:53:54.614382 APIC: 00
1563 13:53:54.614448 APIC: 01
1564 13:53:54.617074 APIC: 03
1565 13:53:54.617158 APIC: 07
1566 13:53:54.620548 APIC: 05
1567 13:53:54.620630 APIC: 04
1568 13:53:54.620695 APIC: 02
1569 13:53:54.623960 APIC: 06
1570 13:53:54.627230 Done allocating resources.
1571 13:53:54.630834 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1572 13:53:54.637357 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1573 13:53:54.640879 Configure GPIOs for I2S audio on UP4.
1574 13:53:54.647955 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1575 13:53:54.651543 Enabling resources...
1576 13:53:54.654878 PCI: 00:00.0 subsystem <- 8086/9a12
1577 13:53:54.658015 PCI: 00:00.0 cmd <- 06
1578 13:53:54.661414 PCI: 00:02.0 subsystem <- 8086/9a40
1579 13:53:54.664697 PCI: 00:02.0 cmd <- 03
1580 13:53:54.667903 PCI: 00:04.0 subsystem <- 8086/9a03
1581 13:53:54.667995 PCI: 00:04.0 cmd <- 02
1582 13:53:54.674810 PCI: 00:05.0 subsystem <- 8086/9a19
1583 13:53:54.674898 PCI: 00:05.0 cmd <- 02
1584 13:53:54.678568 PCI: 00:08.0 subsystem <- 8086/9a11
1585 13:53:54.681939 PCI: 00:08.0 cmd <- 06
1586 13:53:54.685092 PCI: 00:0d.0 subsystem <- 8086/9a13
1587 13:53:54.687994 PCI: 00:0d.0 cmd <- 02
1588 13:53:54.691275 PCI: 00:14.0 subsystem <- 8086/a0ed
1589 13:53:54.694746 PCI: 00:14.0 cmd <- 02
1590 13:53:54.697986 PCI: 00:14.2 subsystem <- 8086/a0ef
1591 13:53:54.701612 PCI: 00:14.2 cmd <- 02
1592 13:53:54.704752 PCI: 00:14.3 subsystem <- 8086/a0f0
1593 13:53:54.707806 PCI: 00:14.3 cmd <- 02
1594 13:53:54.711644 PCI: 00:15.0 subsystem <- 8086/a0e8
1595 13:53:54.714506 PCI: 00:15.0 cmd <- 02
1596 13:53:54.718302 PCI: 00:15.1 subsystem <- 8086/a0e9
1597 13:53:54.718386 PCI: 00:15.1 cmd <- 02
1598 13:53:54.724809 PCI: 00:15.2 subsystem <- 8086/a0ea
1599 13:53:54.724896 PCI: 00:15.2 cmd <- 02
1600 13:53:54.728225 PCI: 00:15.3 subsystem <- 8086/a0eb
1601 13:53:54.731748 PCI: 00:15.3 cmd <- 02
1602 13:53:54.734654 PCI: 00:16.0 subsystem <- 8086/a0e0
1603 13:53:54.737966 PCI: 00:16.0 cmd <- 02
1604 13:53:54.741582 PCI: 00:19.1 subsystem <- 8086/a0c6
1605 13:53:54.744537 PCI: 00:19.1 cmd <- 02
1606 13:53:54.748196 PCI: 00:1d.0 bridge ctrl <- 0013
1607 13:53:54.751160 PCI: 00:1d.0 subsystem <- 8086/a0b0
1608 13:53:54.754606 PCI: 00:1d.0 cmd <- 06
1609 13:53:54.758044 PCI: 00:1e.0 subsystem <- 8086/a0a8
1610 13:53:54.761063 PCI: 00:1e.0 cmd <- 06
1611 13:53:54.764513 PCI: 00:1e.2 subsystem <- 8086/a0aa
1612 13:53:54.767872 PCI: 00:1e.2 cmd <- 06
1613 13:53:54.771045 PCI: 00:1e.3 subsystem <- 8086/a0ab
1614 13:53:54.771128 PCI: 00:1e.3 cmd <- 02
1615 13:53:54.777845 PCI: 00:1f.0 subsystem <- 8086/a087
1616 13:53:54.777935 PCI: 00:1f.0 cmd <- 407
1617 13:53:54.781161 PCI: 00:1f.3 subsystem <- 8086/a0c8
1618 13:53:54.784130 PCI: 00:1f.3 cmd <- 02
1619 13:53:54.787326 PCI: 00:1f.5 subsystem <- 8086/a0a4
1620 13:53:54.790716 PCI: 00:1f.5 cmd <- 406
1621 13:53:54.795281 PCI: 01:00.0 cmd <- 02
1622 13:53:54.800174 done.
1623 13:53:54.803835 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1624 13:53:54.806596 Initializing devices...
1625 13:53:54.809920 Root Device init
1626 13:53:54.813420 Chrome EC: Set SMI mask to 0x0000000000000000
1627 13:53:54.819962 Chrome EC: clear events_b mask to 0x0000000000000000
1628 13:53:54.826347 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1629 13:53:54.830100 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1630 13:53:54.836978 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1631 13:53:54.843457 Chrome EC: Set WAKE mask to 0x0000000000000000
1632 13:53:54.846438 fw_config match found: DB_USB=USB3_ACTIVE
1633 13:53:54.853222 Configure Right Type-C port orientation for retimer
1634 13:53:54.856765 Root Device init finished in 43 msecs
1635 13:53:54.859804 PCI: 00:00.0 init
1636 13:53:54.863244 CPU TDP = 9 Watts
1637 13:53:54.863373 CPU PL1 = 9 Watts
1638 13:53:54.866624 CPU PL2 = 40 Watts
1639 13:53:54.866708 CPU PL4 = 83 Watts
1640 13:53:54.873331 PCI: 00:00.0 init finished in 8 msecs
1641 13:53:54.873465 PCI: 00:02.0 init
1642 13:53:54.876502 GMA: Found VBT in CBFS
1643 13:53:54.879939 GMA: Found valid VBT in CBFS
1644 13:53:54.886436 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1645 13:53:54.892891 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1646 13:53:54.896503 PCI: 00:02.0 init finished in 18 msecs
1647 13:53:54.900026 PCI: 00:05.0 init
1648 13:53:54.902686 PCI: 00:05.0 init finished in 0 msecs
1649 13:53:54.906048 PCI: 00:08.0 init
1650 13:53:54.909786 PCI: 00:08.0 init finished in 0 msecs
1651 13:53:54.913248 PCI: 00:14.0 init
1652 13:53:54.916022 PCI: 00:14.0 init finished in 0 msecs
1653 13:53:54.919464 PCI: 00:14.2 init
1654 13:53:54.923106 PCI: 00:14.2 init finished in 0 msecs
1655 13:53:54.923193 PCI: 00:15.0 init
1656 13:53:54.926063 I2C bus 0 version 0x3230302a
1657 13:53:54.929555 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1658 13:53:54.935975 PCI: 00:15.0 init finished in 6 msecs
1659 13:53:54.936064 PCI: 00:15.1 init
1660 13:53:54.939586 I2C bus 1 version 0x3230302a
1661 13:53:54.942384 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1662 13:53:54.945751 PCI: 00:15.1 init finished in 6 msecs
1663 13:53:54.949223 PCI: 00:15.2 init
1664 13:53:54.952747 I2C bus 2 version 0x3230302a
1665 13:53:54.956209 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1666 13:53:54.959115 PCI: 00:15.2 init finished in 6 msecs
1667 13:53:54.962770 PCI: 00:15.3 init
1668 13:53:54.966060 I2C bus 3 version 0x3230302a
1669 13:53:54.969048 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1670 13:53:54.972657 PCI: 00:15.3 init finished in 6 msecs
1671 13:53:54.975814 PCI: 00:16.0 init
1672 13:53:54.979585 PCI: 00:16.0 init finished in 0 msecs
1673 13:53:54.982404 PCI: 00:19.1 init
1674 13:53:54.982508 I2C bus 5 version 0x3230302a
1675 13:53:54.989131 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1676 13:53:54.992312 PCI: 00:19.1 init finished in 6 msecs
1677 13:53:54.992400 PCI: 00:1d.0 init
1678 13:53:54.995484 Initializing PCH PCIe bridge.
1679 13:53:54.998962 PCI: 00:1d.0 init finished in 3 msecs
1680 13:53:55.003470 PCI: 00:1f.0 init
1681 13:53:55.006859 IOAPIC: Initializing IOAPIC at 0xfec00000
1682 13:53:55.013766 IOAPIC: Bootstrap Processor Local APIC = 0x00
1683 13:53:55.013860 IOAPIC: ID = 0x02
1684 13:53:55.017166 IOAPIC: Dumping registers
1685 13:53:55.020136 reg 0x0000: 0x02000000
1686 13:53:55.023486 reg 0x0001: 0x00770020
1687 13:53:55.023575 reg 0x0002: 0x00000000
1688 13:53:55.029869 PCI: 00:1f.0 init finished in 21 msecs
1689 13:53:55.029959 PCI: 00:1f.2 init
1690 13:53:55.033323 Disabling ACPI via APMC.
1691 13:53:55.036260 APMC done.
1692 13:53:55.040046 PCI: 00:1f.2 init finished in 5 msecs
1693 13:53:55.051800 PCI: 01:00.0 init
1694 13:53:55.055338 PCI: 01:00.0 init finished in 0 msecs
1695 13:53:55.058143 PNP: 0c09.0 init
1696 13:53:55.061749 Google Chrome EC uptime: 8.448 seconds
1697 13:53:55.068128 Google Chrome AP resets since EC boot: 1
1698 13:53:55.071627 Google Chrome most recent AP reset causes:
1699 13:53:55.075073 0.348: 32775 shutdown: entering G3
1700 13:53:55.081519 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 13:53:55.084693 PNP: 0c09.0 init finished in 22 msecs
1702 13:53:55.090387 Devices initialized
1703 13:53:55.093737 Show all devs... After init.
1704 13:53:55.097527 Root Device: enabled 1
1705 13:53:55.097615 DOMAIN: 0000: enabled 1
1706 13:53:55.100633 CPU_CLUSTER: 0: enabled 1
1707 13:53:55.104157 PCI: 00:00.0: enabled 1
1708 13:53:55.107261 PCI: 00:02.0: enabled 1
1709 13:53:55.107355 PCI: 00:04.0: enabled 1
1710 13:53:55.110696 PCI: 00:05.0: enabled 1
1711 13:53:55.113937 PCI: 00:06.0: enabled 0
1712 13:53:55.117091 PCI: 00:07.0: enabled 0
1713 13:53:55.117175 PCI: 00:07.1: enabled 0
1714 13:53:55.120717 PCI: 00:07.2: enabled 0
1715 13:53:55.123803 PCI: 00:07.3: enabled 0
1716 13:53:55.127115 PCI: 00:08.0: enabled 1
1717 13:53:55.127200 PCI: 00:09.0: enabled 0
1718 13:53:55.130289 PCI: 00:0a.0: enabled 0
1719 13:53:55.133838 PCI: 00:0d.0: enabled 1
1720 13:53:55.137220 PCI: 00:0d.1: enabled 0
1721 13:53:55.137307 PCI: 00:0d.2: enabled 0
1722 13:53:55.140691 PCI: 00:0d.3: enabled 0
1723 13:53:55.143808 PCI: 00:0e.0: enabled 0
1724 13:53:55.143893 PCI: 00:10.2: enabled 1
1725 13:53:55.147353 PCI: 00:10.6: enabled 0
1726 13:53:55.150067 PCI: 00:10.7: enabled 0
1727 13:53:55.153787 PCI: 00:12.0: enabled 0
1728 13:53:55.153872 PCI: 00:12.6: enabled 0
1729 13:53:55.157239 PCI: 00:13.0: enabled 0
1730 13:53:55.160277 PCI: 00:14.0: enabled 1
1731 13:53:55.163743 PCI: 00:14.1: enabled 0
1732 13:53:55.163828 PCI: 00:14.2: enabled 1
1733 13:53:55.166710 PCI: 00:14.3: enabled 1
1734 13:53:55.170222 PCI: 00:15.0: enabled 1
1735 13:53:55.173671 PCI: 00:15.1: enabled 1
1736 13:53:55.173762 PCI: 00:15.2: enabled 1
1737 13:53:55.176684 PCI: 00:15.3: enabled 1
1738 13:53:55.180287 PCI: 00:16.0: enabled 1
1739 13:53:55.180373 PCI: 00:16.1: enabled 0
1740 13:53:55.183710 PCI: 00:16.2: enabled 0
1741 13:53:55.186729 PCI: 00:16.3: enabled 0
1742 13:53:55.190147 PCI: 00:16.4: enabled 0
1743 13:53:55.190254 PCI: 00:16.5: enabled 0
1744 13:53:55.193681 PCI: 00:17.0: enabled 0
1745 13:53:55.196992 PCI: 00:19.0: enabled 0
1746 13:53:55.200391 PCI: 00:19.1: enabled 1
1747 13:53:55.200490 PCI: 00:19.2: enabled 0
1748 13:53:55.203768 PCI: 00:1c.0: enabled 1
1749 13:53:55.206834 PCI: 00:1c.1: enabled 0
1750 13:53:55.210370 PCI: 00:1c.2: enabled 0
1751 13:53:55.210486 PCI: 00:1c.3: enabled 0
1752 13:53:55.213722 PCI: 00:1c.4: enabled 0
1753 13:53:55.216997 PCI: 00:1c.5: enabled 0
1754 13:53:55.220351 PCI: 00:1c.6: enabled 1
1755 13:53:55.220436 PCI: 00:1c.7: enabled 0
1756 13:53:55.223587 PCI: 00:1d.0: enabled 1
1757 13:53:55.226665 PCI: 00:1d.1: enabled 0
1758 13:53:55.226769 PCI: 00:1d.2: enabled 1
1759 13:53:55.230151 PCI: 00:1d.3: enabled 0
1760 13:53:55.233551 PCI: 00:1e.0: enabled 1
1761 13:53:55.236951 PCI: 00:1e.1: enabled 0
1762 13:53:55.237037 PCI: 00:1e.2: enabled 1
1763 13:53:55.239897 PCI: 00:1e.3: enabled 1
1764 13:53:55.243292 PCI: 00:1f.0: enabled 1
1765 13:53:55.246982 PCI: 00:1f.1: enabled 0
1766 13:53:55.247084 PCI: 00:1f.2: enabled 1
1767 13:53:55.249844 PCI: 00:1f.3: enabled 1
1768 13:53:55.253434 PCI: 00:1f.4: enabled 0
1769 13:53:55.256392 PCI: 00:1f.5: enabled 1
1770 13:53:55.256472 PCI: 00:1f.6: enabled 0
1771 13:53:55.260315 PCI: 00:1f.7: enabled 0
1772 13:53:55.263046 APIC: 00: enabled 1
1773 13:53:55.263123 GENERIC: 0.0: enabled 1
1774 13:53:55.266521 GENERIC: 0.0: enabled 1
1775 13:53:55.270208 GENERIC: 1.0: enabled 1
1776 13:53:55.273553 GENERIC: 0.0: enabled 1
1777 13:53:55.273629 GENERIC: 1.0: enabled 1
1778 13:53:55.276557 USB0 port 0: enabled 1
1779 13:53:55.279876 GENERIC: 0.0: enabled 1
1780 13:53:55.279962 USB0 port 0: enabled 1
1781 13:53:55.283318 GENERIC: 0.0: enabled 1
1782 13:53:55.286351 I2C: 00:1a: enabled 1
1783 13:53:55.289915 I2C: 00:31: enabled 1
1784 13:53:55.290021 I2C: 00:32: enabled 1
1785 13:53:55.293435 I2C: 00:10: enabled 1
1786 13:53:55.296170 I2C: 00:15: enabled 1
1787 13:53:55.296273 GENERIC: 0.0: enabled 0
1788 13:53:55.299917 GENERIC: 1.0: enabled 0
1789 13:53:55.303138 GENERIC: 0.0: enabled 1
1790 13:53:55.303248 SPI: 00: enabled 1
1791 13:53:55.306348 SPI: 00: enabled 1
1792 13:53:55.310050 PNP: 0c09.0: enabled 1
1793 13:53:55.310156 GENERIC: 0.0: enabled 1
1794 13:53:55.313054 USB3 port 0: enabled 1
1795 13:53:55.316150 USB3 port 1: enabled 1
1796 13:53:55.319708 USB3 port 2: enabled 0
1797 13:53:55.319796 USB3 port 3: enabled 0
1798 13:53:55.322754 USB2 port 0: enabled 0
1799 13:53:55.326111 USB2 port 1: enabled 1
1800 13:53:55.326195 USB2 port 2: enabled 1
1801 13:53:55.329723 USB2 port 3: enabled 0
1802 13:53:55.333025 USB2 port 4: enabled 1
1803 13:53:55.333107 USB2 port 5: enabled 0
1804 13:53:55.335943 USB2 port 6: enabled 0
1805 13:53:55.339934 USB2 port 7: enabled 0
1806 13:53:55.342694 USB2 port 8: enabled 0
1807 13:53:55.342774 USB2 port 9: enabled 0
1808 13:53:55.346066 USB3 port 0: enabled 0
1809 13:53:55.349907 USB3 port 1: enabled 1
1810 13:53:55.350012 USB3 port 2: enabled 0
1811 13:53:55.352649 USB3 port 3: enabled 0
1812 13:53:55.356331 GENERIC: 0.0: enabled 1
1813 13:53:55.359276 GENERIC: 1.0: enabled 1
1814 13:53:55.359387 APIC: 01: enabled 1
1815 13:53:55.362704 APIC: 03: enabled 1
1816 13:53:55.362782 APIC: 07: enabled 1
1817 13:53:55.366427 APIC: 05: enabled 1
1818 13:53:55.369344 APIC: 04: enabled 1
1819 13:53:55.369438 APIC: 02: enabled 1
1820 13:53:55.372911 APIC: 06: enabled 1
1821 13:53:55.375785 PCI: 01:00.0: enabled 1
1822 13:53:55.379445 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1823 13:53:55.385826 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1824 13:53:55.389441 ELOG: NV offset 0xf30000 size 0x1000
1825 13:53:55.395801 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1826 13:53:55.402775 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:54 UTC
1827 13:53:55.409758 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:54 UTC
1828 13:53:55.416456 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:54 UTC
1829 13:53:55.422366 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:54 UTC
1830 13:53:55.428952 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:54 UTC
1831 13:53:55.435898 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1832 13:53:55.439004 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:54 UTC
1833 13:53:55.445991 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1834 13:53:55.452326 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1835 13:53:55.455387 Finalize devices...
1836 13:53:55.455488 Devices finalized
1837 13:53:55.462343 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1838 13:53:55.465672 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1839 13:53:55.472246 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1840 13:53:55.479119 ME: HFSTS1 : 0x80030055
1841 13:53:55.482469 ME: HFSTS2 : 0x30280116
1842 13:53:55.485410 ME: HFSTS3 : 0x00000050
1843 13:53:55.491841 ME: HFSTS4 : 0x00004000
1844 13:53:55.495159 ME: HFSTS5 : 0x00000000
1845 13:53:55.498771 ME: HFSTS6 : 0x00400006
1846 13:53:55.502110 ME: Manufacturing Mode : YES
1847 13:53:55.508658 ME: SPI Protection Mode Enabled : NO
1848 13:53:55.512098 ME: FW Partition Table : OK
1849 13:53:55.515124 ME: Bringup Loader Failure : NO
1850 13:53:55.518770 ME: Firmware Init Complete : NO
1851 13:53:55.521909 ME: Boot Options Present : NO
1852 13:53:55.525312 ME: Update In Progress : NO
1853 13:53:55.528908 ME: D0i3 Support : YES
1854 13:53:55.532083 ME: Low Power State Enabled : NO
1855 13:53:55.538656 ME: CPU Replaced : YES
1856 13:53:55.541871 ME: CPU Replacement Valid : YES
1857 13:53:55.545560 ME: Current Working State : 5
1858 13:53:55.548933 ME: Current Operation State : 1
1859 13:53:55.551965 ME: Current Operation Mode : 3
1860 13:53:55.555483 ME: Error Code : 0
1861 13:53:55.558277 ME: Enhanced Debug Mode : NO
1862 13:53:55.561668 ME: CPU Debug Disabled : YES
1863 13:53:55.565098 ME: TXT Support : NO
1864 13:53:55.571689 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1865 13:53:55.581967 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1866 13:53:55.584962 CBFS: 'fallback/slic' not found.
1867 13:53:55.588438 ACPI: Writing ACPI tables at 76b01000.
1868 13:53:55.588521 ACPI: * FACS
1869 13:53:55.591942 ACPI: * DSDT
1870 13:53:55.595517 Ramoops buffer: 0x100000@0x76a00000.
1871 13:53:55.598313 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1872 13:53:55.604901 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1873 13:53:55.608617 Google Chrome EC: version:
1874 13:53:55.611479 ro: voema_v2.0.7540-147f8d37d1
1875 13:53:55.614998 rw: voema_v2.0.7540-147f8d37d1
1876 13:53:55.615076 running image: 2
1877 13:53:55.621480 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1878 13:53:55.626240 ACPI: * FADT
1879 13:53:55.626334 SCI is IRQ9
1880 13:53:55.632926 ACPI: added table 1/32, length now 40
1881 13:53:55.633007 ACPI: * SSDT
1882 13:53:55.636322 Found 1 CPU(s) with 8 core(s) each.
1883 13:53:55.642995 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1884 13:53:55.646069 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1885 13:53:55.649694 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1886 13:53:55.652745 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1887 13:53:55.659492 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1888 13:53:55.666304 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1889 13:53:55.669234 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1890 13:53:55.675830 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1891 13:53:55.683321 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1892 13:53:55.686084 \_SB.PCI0.RP09: Added StorageD3Enable property
1893 13:53:55.689663 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1894 13:53:55.696022 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1895 13:53:55.702953 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1896 13:53:55.706386 PS2K: Passing 80 keymaps to kernel
1897 13:53:55.712870 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1898 13:53:55.719359 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1899 13:53:55.725932 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1900 13:53:55.733014 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1901 13:53:55.739134 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1902 13:53:55.745880 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1903 13:53:55.752492 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1904 13:53:55.759318 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1905 13:53:55.762740 ACPI: added table 2/32, length now 44
1906 13:53:55.762826 ACPI: * MCFG
1907 13:53:55.769223 ACPI: added table 3/32, length now 48
1908 13:53:55.769307 ACPI: * TPM2
1909 13:53:55.772539 TPM2 log created at 0x769f0000
1910 13:53:55.775646 ACPI: added table 4/32, length now 52
1911 13:53:55.779283 ACPI: * MADT
1912 13:53:55.779389 SCI is IRQ9
1913 13:53:55.782372 ACPI: added table 5/32, length now 56
1914 13:53:55.786072 current = 76b09850
1915 13:53:55.786155 ACPI: * DMAR
1916 13:53:55.789007 ACPI: added table 6/32, length now 60
1917 13:53:55.795730 ACPI: added table 7/32, length now 64
1918 13:53:55.795847 ACPI: * HPET
1919 13:53:55.798899 ACPI: added table 8/32, length now 68
1920 13:53:55.802087 ACPI: done.
1921 13:53:55.802215 ACPI tables: 35216 bytes.
1922 13:53:55.805678 smbios_write_tables: 769ef000
1923 13:53:55.808698 EC returned error result code 3
1924 13:53:55.812217 Couldn't obtain OEM name from CBI
1925 13:53:55.816210 Create SMBIOS type 16
1926 13:53:55.819869 Create SMBIOS type 17
1927 13:53:55.822585 GENERIC: 0.0 (WIFI Device)
1928 13:53:55.822673 SMBIOS tables: 1750 bytes.
1929 13:53:55.828994 Writing table forward entry at 0x00000500
1930 13:53:55.836194 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1931 13:53:55.839026 Writing coreboot table at 0x76b25000
1932 13:53:55.845761 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1933 13:53:55.849362 1. 0000000000001000-000000000009ffff: RAM
1934 13:53:55.852326 2. 00000000000a0000-00000000000fffff: RESERVED
1935 13:53:55.859215 3. 0000000000100000-00000000769eefff: RAM
1936 13:53:55.862220 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1937 13:53:55.868853 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1938 13:53:55.875529 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1939 13:53:55.879205 7. 0000000077000000-000000007fbfffff: RESERVED
1940 13:53:55.885845 8. 00000000c0000000-00000000cfffffff: RESERVED
1941 13:53:55.888868 9. 00000000f8000000-00000000f9ffffff: RESERVED
1942 13:53:55.892441 10. 00000000fb000000-00000000fb000fff: RESERVED
1943 13:53:55.898845 11. 00000000fe000000-00000000fe00ffff: RESERVED
1944 13:53:55.902396 12. 00000000fed80000-00000000fed87fff: RESERVED
1945 13:53:55.908819 13. 00000000fed90000-00000000fed92fff: RESERVED
1946 13:53:55.912025 14. 00000000feda0000-00000000feda1fff: RESERVED
1947 13:53:55.918650 15. 00000000fedc0000-00000000feddffff: RESERVED
1948 13:53:55.922044 16. 0000000100000000-00000002803fffff: RAM
1949 13:53:55.925040 Passing 4 GPIOs to payload:
1950 13:53:55.928521 NAME | PORT | POLARITY | VALUE
1951 13:53:55.935068 lid | undefined | high | high
1952 13:53:55.941633 power | undefined | high | low
1953 13:53:55.945195 oprom | undefined | high | low
1954 13:53:55.952238 EC in RW | 0x000000e5 | high | high
1955 13:53:55.958603 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 35c0
1956 13:53:55.958686 coreboot table: 1576 bytes.
1957 13:53:55.965526 IMD ROOT 0. 0x76fff000 0x00001000
1958 13:53:55.968577 IMD SMALL 1. 0x76ffe000 0x00001000
1959 13:53:55.971892 FSP MEMORY 2. 0x76c4e000 0x003b0000
1960 13:53:55.974933 VPD 3. 0x76c4d000 0x00000367
1961 13:53:55.978262 RO MCACHE 4. 0x76c4c000 0x00000fdc
1962 13:53:55.981668 CONSOLE 5. 0x76c2c000 0x00020000
1963 13:53:55.985222 FMAP 6. 0x76c2b000 0x00000578
1964 13:53:55.988481 TIME STAMP 7. 0x76c2a000 0x00000910
1965 13:53:55.995336 VBOOT WORK 8. 0x76c16000 0x00014000
1966 13:53:55.998393 ROMSTG STCK 9. 0x76c15000 0x00001000
1967 13:53:56.001819 AFTER CAR 10. 0x76c0a000 0x0000b000
1968 13:53:56.005394 RAMSTAGE 11. 0x76b97000 0x00073000
1969 13:53:56.008370 REFCODE 12. 0x76b42000 0x00055000
1970 13:53:56.011921 SMM BACKUP 13. 0x76b32000 0x00010000
1971 13:53:56.015405 4f444749 14. 0x76b30000 0x00002000
1972 13:53:56.018336 EXT VBT15. 0x76b2d000 0x0000219f
1973 13:53:56.021940 COREBOOT 16. 0x76b25000 0x00008000
1974 13:53:56.025330 ACPI 17. 0x76b01000 0x00024000
1975 13:53:56.031739 ACPI GNVS 18. 0x76b00000 0x00001000
1976 13:53:56.035535 RAMOOPS 19. 0x76a00000 0x00100000
1977 13:53:56.038723 TPM2 TCGLOG20. 0x769f0000 0x00010000
1978 13:53:56.041766 SMBIOS 21. 0x769ef000 0x00000800
1979 13:53:56.045034 IMD small region:
1980 13:53:56.048697 IMD ROOT 0. 0x76ffec00 0x00000400
1981 13:53:56.052174 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1982 13:53:56.055241 POWER STATE 2. 0x76ffeb80 0x00000044
1983 13:53:56.058764 ROMSTAGE 3. 0x76ffeb60 0x00000004
1984 13:53:56.061866 MEM INFO 4. 0x76ffe980 0x000001e0
1985 13:53:56.068526 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1986 13:53:56.071667 MTRR: Physical address space:
1987 13:53:56.078434 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1988 13:53:56.085144 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1989 13:53:56.091741 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1990 13:53:56.098587 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1991 13:53:56.101921 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1992 13:53:56.108639 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1993 13:53:56.115057 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1994 13:53:56.121856 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 13:53:56.124822 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 13:53:56.128431 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 13:53:56.131513 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 13:53:56.134805 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 13:53:56.141742 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 13:53:56.144783 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 13:53:56.148081 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 13:53:56.151531 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 13:53:56.157942 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 13:53:56.161328 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 13:53:56.164861 call enable_fixed_mtrr()
2006 13:53:56.167736 CPU physical address size: 39 bits
2007 13:53:56.171870 MTRR: default type WB/UC MTRR counts: 6/6.
2008 13:53:56.175005 MTRR: UC selected as default type.
2009 13:53:56.181455 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2010 13:53:56.188134 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2011 13:53:56.194467 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2012 13:53:56.201115 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2013 13:53:56.207769 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2014 13:53:56.214711 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2015 13:53:56.214829
2016 13:53:56.217594 MTRR check
2017 13:53:56.217706 Fixed MTRRs : Enabled
2018 13:53:56.221025 Variable MTRRs: Enabled
2019 13:53:56.221117
2020 13:53:56.224760 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 13:53:56.231055 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 13:53:56.234519 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 13:53:56.237607 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 13:53:56.241134 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 13:53:56.247740 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 13:53:56.251256 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 13:53:56.254407 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 13:53:56.257914 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 13:53:56.260882 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 13:53:56.267273 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 13:53:56.274162 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2032 13:53:56.277555 call enable_fixed_mtrr()
2033 13:53:56.281563 Checking cr50 for pending updates
2034 13:53:56.281652 CPU physical address size: 39 bits
2035 13:53:56.287987 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 13:53:56.291247 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 13:53:56.294478 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 13:53:56.297834 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 13:53:56.304798 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 13:53:56.308066 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 13:53:56.311493 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 13:53:56.314496 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 13:53:56.321074 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 13:53:56.324565 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 13:53:56.327822 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 13:53:56.331158 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 13:53:56.338547 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 13:53:56.338638 call enable_fixed_mtrr()
2049 13:53:56.345156 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 13:53:56.348463 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 13:53:56.352029 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 13:53:56.354716 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 13:53:56.361534 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 13:53:56.364724 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 13:53:56.368192 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 13:53:56.371663 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 13:53:56.378250 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 13:53:56.381199 CPU physical address size: 39 bits
2059 13:53:56.385223 call enable_fixed_mtrr()
2060 13:53:56.388007 Reading cr50 TPM mode
2061 13:53:56.392088 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 13:53:56.395907 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 13:53:56.398703 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 13:53:56.401891 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 13:53:56.409333 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 13:53:56.412178 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 13:53:56.415405 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 13:53:56.418790 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 13:53:56.425613 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 13:53:56.428695 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 13:53:56.432208 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 13:53:56.435059 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 13:53:56.442663 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 13:53:56.446203 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 13:53:56.449566 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 13:53:56.452493 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 13:53:56.459448 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 13:53:56.462755 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 13:53:56.465572 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 13:53:56.468868 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 13:53:56.475723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 13:53:56.479363 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 13:53:56.482416 call enable_fixed_mtrr()
2084 13:53:56.485658 call enable_fixed_mtrr()
2085 13:53:56.489078 MTRR: Fixed MSR 0x250 0x0606060606060606
2086 13:53:56.492512 MTRR: Fixed MSR 0x250 0x0606060606060606
2087 13:53:56.495700 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 13:53:56.502216 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 13:53:56.505499 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 13:53:56.508625 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 13:53:56.512326 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 13:53:56.515429 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 13:53:56.522096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 13:53:56.525375 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 13:53:56.528989 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 13:53:56.531896 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 13:53:56.540023 MTRR: Fixed MSR 0x258 0x0606060606060606
2098 13:53:56.542925 MTRR: Fixed MSR 0x259 0x0000000000000000
2099 13:53:56.546310 MTRR: Fixed MSR 0x268 0x0606060606060606
2100 13:53:56.549929 MTRR: Fixed MSR 0x269 0x0606060606060606
2101 13:53:56.556105 MTRR: Fixed MSR 0x26a 0x0606060606060606
2102 13:53:56.559849 MTRR: Fixed MSR 0x26b 0x0606060606060606
2103 13:53:56.562835 MTRR: Fixed MSR 0x26c 0x0606060606060606
2104 13:53:56.566619 MTRR: Fixed MSR 0x26d 0x0606060606060606
2105 13:53:56.572887 MTRR: Fixed MSR 0x26e 0x0606060606060606
2106 13:53:56.576025 MTRR: Fixed MSR 0x26f 0x0606060606060606
2107 13:53:56.579613 call enable_fixed_mtrr()
2108 13:53:56.583166 call enable_fixed_mtrr()
2109 13:53:56.585937 CPU physical address size: 39 bits
2110 13:53:56.589392 CPU physical address size: 39 bits
2111 13:53:56.592415 CPU physical address size: 39 bits
2112 13:53:56.596422 CPU physical address size: 39 bits
2113 13:53:56.603049 CPU physical address size: 39 bits
2114 13:53:56.606215 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2115 13:53:56.616442 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2116 13:53:56.619476 Checking segment from ROM address 0xffc02b38
2117 13:53:56.622671 Checking segment from ROM address 0xffc02b54
2118 13:53:56.629367 Loading segment from ROM address 0xffc02b38
2119 13:53:56.629490 code (compression=0)
2120 13:53:56.639693 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2121 13:53:56.649406 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2122 13:53:56.649534 it's not compressed!
2123 13:53:56.789239 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2124 13:53:56.795772 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2125 13:53:56.802483 Loading segment from ROM address 0xffc02b54
2126 13:53:56.802566 Entry Point 0x30000000
2127 13:53:56.806099 Loaded segments
2128 13:53:56.812722 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2129 13:53:56.855449 Finalizing chipset.
2130 13:53:56.858484 Finalizing SMM.
2131 13:53:56.858569 APMC done.
2132 13:53:56.865300 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2133 13:53:56.868777 mp_park_aps done after 0 msecs.
2134 13:53:56.871861 Jumping to boot code at 0x30000000(0x76b25000)
2135 13:53:56.882124 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2136 13:53:56.882209
2137 13:53:56.882275
2138 13:53:56.882335
2139 13:53:56.885256 Starting depthcharge on Voema...
2140 13:53:56.885338
2141 13:53:56.885690 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2142 13:53:56.885786 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2143 13:53:56.885872 Setting prompt string to ['volteer:']
2144 13:53:56.885956 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2145 13:53:56.895131 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2146 13:53:56.895221
2147 13:53:56.901727 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2148 13:53:56.901811
2149 13:53:56.908168 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2150 13:53:56.908252
2151 13:53:56.911637 Failed to find eMMC card reader
2152 13:53:56.911720
2153 13:53:56.911784 Wipe memory regions:
2154 13:53:56.911842
2155 13:53:56.918143 [0x00000000001000, 0x000000000a0000)
2156 13:53:56.918226
2157 13:53:56.921535 [0x00000000100000, 0x00000030000000)
2158 13:53:56.946928
2159 13:53:56.950221 [0x00000032662db0, 0x000000769ef000)
2160 13:53:56.985133
2161 13:53:56.988057 [0x00000100000000, 0x00000280400000)
2162 13:53:57.191009
2163 13:53:57.194284 ec_init: CrosEC protocol v3 supported (256, 256)
2164 13:53:57.194370
2165 13:53:57.201230 update_port_state: port C0 state: usb enable 1 mux conn 0
2166 13:53:57.201322
2167 13:53:57.207733 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2168 13:53:57.210568
2169 13:53:57.214146 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2170 13:53:57.214230
2171 13:53:57.220953 send_conn_disc_msg: pmc_send_cmd succeeded
2172 13:53:57.649973
2173 13:53:57.650137 R8152: Initializing
2174 13:53:57.650291
2175 13:53:57.653390 Version 6 (ocp_data = 5c30)
2176 13:53:57.653474
2177 13:53:57.656801 R8152: Done initializing
2178 13:53:57.656886
2179 13:53:57.660052 Adding net device
2180 13:53:57.962276
2181 13:53:57.965747 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 13:53:57.965844
2183 13:53:57.965958
2184 13:53:57.966037
2185 13:53:57.968655 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 13:53:58.069085 volteer: tftpboot 192.168.201.1 10607095/tftp-deploy-2g6a2e40/kernel/bzImage 10607095/tftp-deploy-2g6a2e40/kernel/cmdline 10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
2188 13:53:58.069334 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 13:53:58.069480 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 13:53:58.073924 tftpboot 192.168.201.1 10607095/tftp-deploy-2g6a2e40/kernel/bzIploy-2g6a2e40/kernel/cmdline 10607095/tftp-deploy-2g6a2e40/ramdisk/ramdisk.cpio.gz
2191 13:53:58.074118
2192 13:53:58.074202 Waiting for link
2193 13:53:58.276400
2194 13:53:58.276537 done.
2195 13:53:58.276604
2196 13:53:58.276665 MAC: 00:24:32:30:7e:47
2197 13:53:58.276736
2198 13:53:58.279608 Sending DHCP discover... done.
2199 13:53:58.279699
2200 13:53:58.283065 Waiting for reply... done.
2201 13:53:58.283176
2202 13:53:58.286554 Sending DHCP request... done.
2203 13:53:58.286711
2204 13:53:58.295795 Waiting for reply... done.
2205 13:53:58.295911
2206 13:53:58.296006 My ip is 192.168.201.19
2207 13:53:58.296098
2208 13:53:58.302702 The DHCP server ip is 192.168.201.1
2209 13:53:58.302807
2210 13:53:58.305505 TFTP server IP predefined by user: 192.168.201.1
2211 13:53:58.305606
2212 13:53:58.312443 Bootfile predefined by user: 10607095/tftp-deploy-2g6a2e40/kernel/bzImage
2213 13:53:58.312534
2214 13:53:58.315289 Sending tftp read request... done.
2215 13:53:58.315411
2216 13:53:58.322088 Waiting for the transfer...
2217 13:53:58.322180
2218 13:53:58.840647 00000000 ################################################################
2219 13:53:58.840786
2220 13:53:59.369665 00080000 ################################################################
2221 13:53:59.369802
2222 13:53:59.918412 00100000 ################################################################
2223 13:53:59.918564
2224 13:54:00.483242 00180000 ################################################################
2225 13:54:00.483404
2226 13:54:01.084940 00200000 ################################################################
2227 13:54:01.085092
2228 13:54:01.633102 00280000 ################################################################
2229 13:54:01.633242
2230 13:54:02.187988 00300000 ################################################################
2231 13:54:02.188137
2232 13:54:02.770381 00380000 ################################################################
2233 13:54:02.770535
2234 13:54:03.329102 00400000 ################################################################
2235 13:54:03.329268
2236 13:54:03.977448 00480000 ################################################################
2237 13:54:03.978193
2238 13:54:04.553958 00500000 ################################################################
2239 13:54:04.554100
2240 13:54:05.110075 00580000 ################################################################
2241 13:54:05.110248
2242 13:54:05.744397 00600000 ################################################################
2243 13:54:05.744921
2244 13:54:06.389971 00680000 ################################################################
2245 13:54:06.390717
2246 13:54:06.958547 00700000 ################################################################
2247 13:54:06.958683
2248 13:54:06.976096 00780000 ## done.
2249 13:54:06.976186
2250 13:54:06.979697 The bootfile was 7880592 bytes long.
2251 13:54:06.979783
2252 13:54:06.983007 Sending tftp read request... done.
2253 13:54:06.983092
2254 13:54:06.985868 Waiting for the transfer...
2255 13:54:06.985953
2256 13:54:07.533404 00000000 ################################################################
2257 13:54:07.533552
2258 13:54:08.089042 00080000 ################################################################
2259 13:54:08.089190
2260 13:54:08.637488 00100000 ################################################################
2261 13:54:08.637621
2262 13:54:09.195344 00180000 ################################################################
2263 13:54:09.195522
2264 13:54:09.794931 00200000 ################################################################
2265 13:54:09.795091
2266 13:54:10.345420 00280000 ################################################################
2267 13:54:10.345570
2268 13:54:10.900061 00300000 ################################################################
2269 13:54:10.900204
2270 13:54:11.458516 00380000 ################################################################
2271 13:54:11.458659
2272 13:54:12.014376 00400000 ################################################################
2273 13:54:12.014541
2274 13:54:12.566679 00480000 ################################################################
2275 13:54:12.566823
2276 13:54:13.113095 00500000 ################################################################
2277 13:54:13.113233
2278 13:54:13.662448 00580000 ################################################################
2279 13:54:13.662627
2280 13:54:13.837282 00600000 ##################### done.
2281 13:54:13.837444
2282 13:54:13.840446 Sending tftp read request... done.
2283 13:54:13.840526
2284 13:54:13.843924 Waiting for the transfer...
2285 13:54:13.844099
2286 13:54:13.844167 00000000 # done.
2287 13:54:13.844253
2288 13:54:13.853757 Command line loaded dynamically from TFTP file: 10607095/tftp-deploy-2g6a2e40/kernel/cmdline
2289 13:54:13.853844
2290 13:54:13.876822 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607095/extract-nfsrootfs-i0d1a8sp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2291 13:54:13.880597
2292 13:54:13.883784 Shutting down all USB controllers.
2293 13:54:13.883869
2294 13:54:13.883934 Removing current net device
2295 13:54:13.883994
2296 13:54:13.887215 Finalizing coreboot
2297 13:54:13.887298
2298 13:54:13.893526 Exiting depthcharge with code 4 at timestamp: 25687090
2299 13:54:13.893629
2300 13:54:13.893726
2301 13:54:13.893816 Starting kernel ...
2302 13:54:13.893905
2303 13:54:13.893991
2304 13:54:13.894377 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2305 13:54:13.894475 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2306 13:54:13.894551 Setting prompt string to ['Linux version [0-9]']
2307 13:54:13.894621 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2308 13:54:13.894691 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2310 13:58:41.895241 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2312 13:58:41.896311 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2314 13:58:41.897160 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2317 13:58:41.898459 end: 2 depthcharge-action (duration 00:05:00) [common]
2319 13:58:41.899837 Cleaning after the job
2320 13:58:41.900037 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/ramdisk
2321 13:58:41.900952 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/kernel
2322 13:58:41.901894 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/nfsrootfs
2323 13:58:41.971539 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607095/tftp-deploy-2g6a2e40/modules
2324 13:58:41.971987 start: 4.1 power-off (timeout 00:00:30) [common]
2325 13:58:41.972181 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2326 13:58:42.049787 >> Command sent successfully.
2327 13:58:42.052478 Returned 0 in 0 seconds
2328 13:58:42.152868 end: 4.1 power-off (duration 00:00:00) [common]
2330 13:58:42.153208 start: 4.2 read-feedback (timeout 00:10:00) [common]
2331 13:58:42.153483 Listened to connection for namespace 'common' for up to 1s
2332 13:58:43.154436 Finalising connection for namespace 'common'
2333 13:58:43.154626 Disconnecting from shell: Finalise
2334 13:58:43.154708
2335 13:58:43.255061 end: 4.2 read-feedback (duration 00:00:01) [common]
2336 13:58:43.255245 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607095
2337 13:58:43.736585 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607095
2338 13:58:43.736785 JobError: Your job cannot terminate cleanly.