Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:53:02.861478 lava-dispatcher, installed at version: 2023.05.1
2 13:53:02.861690 start: 0 validate
3 13:53:02.861825 Start time: 2023-06-06 13:53:02.861818+00:00 (UTC)
4 13:53:02.861966 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:53:02.862098 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:53:03.150381 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:53:03.150616 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:53:08.655293 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:53:08.655477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:53:08.936676 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:53:08.936848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-495-ga0a97337aff8d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:53:09.437775 validate duration: 6.58
14 13:53:09.438147 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:53:09.438280 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:53:09.438394 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:53:09.438516 Not decompressing ramdisk as can be used compressed.
18 13:53:09.438609 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 13:53:09.438675 saving as /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/ramdisk/initrd.cpio.gz
20 13:53:09.438736 total size: 5671546 (5MB)
21 13:53:09.439923 progress 0% (0MB)
22 13:53:09.441718 progress 5% (0MB)
23 13:53:09.443509 progress 10% (0MB)
24 13:53:09.444993 progress 15% (0MB)
25 13:53:09.446639 progress 20% (1MB)
26 13:53:09.448393 progress 25% (1MB)
27 13:53:09.449852 progress 30% (1MB)
28 13:53:09.451551 progress 35% (1MB)
29 13:53:09.453151 progress 40% (2MB)
30 13:53:09.454741 progress 45% (2MB)
31 13:53:09.456505 progress 50% (2MB)
32 13:53:09.458209 progress 55% (3MB)
33 13:53:09.459669 progress 60% (3MB)
34 13:53:09.461308 progress 65% (3MB)
35 13:53:09.462948 progress 70% (3MB)
36 13:53:09.464525 progress 75% (4MB)
37 13:53:09.466280 progress 80% (4MB)
38 13:53:09.468078 progress 85% (4MB)
39 13:53:09.469542 progress 90% (4MB)
40 13:53:09.471172 progress 95% (5MB)
41 13:53:09.472827 progress 100% (5MB)
42 13:53:09.472958 5MB downloaded in 0.03s (158.07MB/s)
43 13:53:09.473130 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:53:09.473404 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:53:09.473509 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:53:09.473626 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:53:09.473805 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:53:09.473882 saving as /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/kernel/bzImage
50 13:53:09.473982 total size: 7880592 (7MB)
51 13:53:09.474092 No compression specified
52 13:53:09.475668 progress 0% (0MB)
53 13:53:09.477851 progress 5% (0MB)
54 13:53:09.480032 progress 10% (0MB)
55 13:53:09.482277 progress 15% (1MB)
56 13:53:09.484576 progress 20% (1MB)
57 13:53:09.486907 progress 25% (1MB)
58 13:53:09.489164 progress 30% (2MB)
59 13:53:09.491434 progress 35% (2MB)
60 13:53:09.493693 progress 40% (3MB)
61 13:53:09.496033 progress 45% (3MB)
62 13:53:09.498302 progress 50% (3MB)
63 13:53:09.500544 progress 55% (4MB)
64 13:53:09.502752 progress 60% (4MB)
65 13:53:09.505071 progress 65% (4MB)
66 13:53:09.507291 progress 70% (5MB)
67 13:53:09.509519 progress 75% (5MB)
68 13:53:09.511839 progress 80% (6MB)
69 13:53:09.514151 progress 85% (6MB)
70 13:53:09.516405 progress 90% (6MB)
71 13:53:09.518663 progress 95% (7MB)
72 13:53:09.521092 progress 100% (7MB)
73 13:53:09.521329 7MB downloaded in 0.05s (158.75MB/s)
74 13:53:09.521540 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:53:09.521947 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:53:09.522076 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:53:09.522211 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:53:09.522382 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 13:53:09.522463 saving as /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/nfsrootfs/full.rootfs.tar
81 13:53:09.522545 total size: 125914312 (120MB)
82 13:53:09.522632 Using unxz to decompress xz
83 13:53:09.526333 progress 0% (0MB)
84 13:53:10.066333 progress 5% (6MB)
85 13:53:10.760946 progress 10% (12MB)
86 13:53:11.278712 progress 15% (18MB)
87 13:53:11.783290 progress 20% (24MB)
88 13:53:12.138774 progress 25% (30MB)
89 13:53:12.486828 progress 30% (36MB)
90 13:53:12.755710 progress 35% (42MB)
91 13:53:12.956759 progress 40% (48MB)
92 13:53:13.581118 progress 45% (54MB)
93 13:53:13.961706 progress 50% (60MB)
94 13:53:14.308333 progress 55% (66MB)
95 13:53:14.673240 progress 60% (72MB)
96 13:53:15.019552 progress 65% (78MB)
97 13:53:15.416213 progress 70% (84MB)
98 13:53:15.837127 progress 75% (90MB)
99 13:53:16.270991 progress 80% (96MB)
100 13:53:16.376726 progress 85% (102MB)
101 13:53:16.553050 progress 90% (108MB)
102 13:53:16.912947 progress 95% (114MB)
103 13:53:17.293444 progress 100% (120MB)
104 13:53:17.299261 120MB downloaded in 7.78s (15.44MB/s)
105 13:53:17.299693 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:53:17.300095 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:53:17.300229 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:53:17.300358 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:53:17.300564 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-495-ga0a97337aff8d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:53:17.300673 saving as /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/modules/modules.tar
112 13:53:17.300763 total size: 251288 (0MB)
113 13:53:17.300864 Using unxz to decompress xz
114 13:53:17.305547 progress 13% (0MB)
115 13:53:17.306104 progress 26% (0MB)
116 13:53:17.306476 progress 39% (0MB)
117 13:53:17.307667 progress 52% (0MB)
118 13:53:17.309530 progress 65% (0MB)
119 13:53:17.311551 progress 78% (0MB)
120 13:53:17.313557 progress 91% (0MB)
121 13:53:17.315460 progress 100% (0MB)
122 13:53:17.321122 0MB downloaded in 0.02s (11.78MB/s)
123 13:53:17.321491 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:53:17.321908 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:53:17.322047 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 13:53:17.322189 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 13:53:20.307308 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607051/extract-nfsrootfs-1ee7wqvf
129 13:53:20.307551 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:53:20.307653 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 13:53:20.307830 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc
132 13:53:20.307992 makedir: /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin
133 13:53:20.308135 makedir: /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/tests
134 13:53:20.308231 makedir: /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/results
135 13:53:20.308330 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-add-keys
136 13:53:20.308471 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-add-sources
137 13:53:20.308623 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-background-process-start
138 13:53:20.308743 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-background-process-stop
139 13:53:20.308862 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-common-functions
140 13:53:20.308989 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-echo-ipv4
141 13:53:20.309107 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-install-packages
142 13:53:20.309227 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-installed-packages
143 13:53:20.309342 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-os-build
144 13:53:20.309460 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-probe-channel
145 13:53:20.309579 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-probe-ip
146 13:53:20.309695 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-target-ip
147 13:53:20.309812 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-target-mac
148 13:53:20.309927 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-target-storage
149 13:53:20.310046 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-case
150 13:53:20.310165 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-event
151 13:53:20.310282 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-feedback
152 13:53:20.310398 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-raise
153 13:53:20.310514 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-reference
154 13:53:20.310632 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-runner
155 13:53:20.310747 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-set
156 13:53:20.310862 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-test-shell
157 13:53:20.310979 Updating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-install-packages (oe)
158 13:53:20.357015 Updating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/bin/lava-installed-packages (oe)
159 13:53:20.357227 Creating /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/environment
160 13:53:20.357353 LAVA metadata
161 13:53:20.357432 - LAVA_JOB_ID=10607051
162 13:53:20.357528 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:53:20.357654 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 13:53:20.357726 skipped lava-vland-overlay
165 13:53:20.357807 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:53:20.357891 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 13:53:20.357954 skipped lava-multinode-overlay
168 13:53:20.358049 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:53:20.358135 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 13:53:20.358213 Loading test definitions
171 13:53:20.358307 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
172 13:53:20.358386 Using /lava-10607051 at stage 0
173 13:53:20.358503 Fetching tests from https://github.com/kernelci/test-definitions
174 13:53:20.358607 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/0/tests/0_ltp-ipc'
175 13:53:29.973557 Running '/usr/bin/git checkout kernelci.org
176 13:53:30.129670 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 13:53:30.130619 uuid=10607051_1.5.2.3.1 testdef=None
178 13:53:30.130791 end: 1.5.2.3.1 git-repo-action (duration 00:00:10) [common]
180 13:53:30.131183 start: 1.5.2.3.2 test-overlay (timeout 00:09:39) [common]
181 13:53:30.132367 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:53:30.132757 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:39) [common]
184 13:53:30.134657 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:53:30.135077 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:39) [common]
187 13:53:30.137014 runner path: /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/0/tests/0_ltp-ipc test_uuid 10607051_1.5.2.3.1
188 13:53:30.137161 SKIPFILE='skipfile-lkft.yaml'
189 13:53:30.137261 SKIP_INSTALL='true'
190 13:53:30.137368 TST_CMDFILES='ipc'
191 13:53:30.137579 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 13:53:30.137956 Creating lava-test-runner.conf files
194 13:53:30.138056 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607051/lava-overlay-bb_uglmc/lava-10607051/0 for stage 0
195 13:53:30.138195 - 0_ltp-ipc
196 13:53:30.138349 end: 1.5.2.3 test-definition (duration 00:00:10) [common]
197 13:53:30.138482 start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
198 13:53:38.285421 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 13:53:38.285578 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
200 13:53:38.285683 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 13:53:38.285832 end: 1.5.2 lava-overlay (duration 00:00:18) [common]
202 13:53:38.285972 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
203 13:53:38.442742 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 13:53:38.443236 start: 1.5.4 extract-modules (timeout 00:09:31) [common]
205 13:53:38.443436 extracting modules file /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607051/extract-nfsrootfs-1ee7wqvf
206 13:53:38.463036 extracting modules file /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607051/extract-overlay-ramdisk-kf0rk_tw/ramdisk
207 13:53:38.482848 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 13:53:38.483113 start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
209 13:53:38.483282 [common] Applying overlay to NFS
210 13:53:38.483427 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607051/compress-overlay-zxruwyyu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607051/extract-nfsrootfs-1ee7wqvf
211 13:53:39.628228 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 13:53:39.628426 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
213 13:53:39.628553 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 13:53:39.628678 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
215 13:53:39.628792 Building ramdisk /var/lib/lava/dispatcher/tmp/10607051/extract-overlay-ramdisk-kf0rk_tw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607051/extract-overlay-ramdisk-kf0rk_tw/ramdisk
216 13:53:39.701704 >> 27180 blocks
217 13:53:40.309434 rename /var/lib/lava/dispatcher/tmp/10607051/extract-overlay-ramdisk-kf0rk_tw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
218 13:53:40.309895 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 13:53:40.310025 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
220 13:53:40.310141 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
221 13:53:40.310239 No mkimage arch provided, not using FIT.
222 13:53:40.310346 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 13:53:40.310429 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 13:53:40.310539 end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
225 13:53:40.310632 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
226 13:53:40.310716 No LXC device requested
227 13:53:40.310797 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 13:53:40.310891 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
229 13:53:40.310977 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 13:53:40.311047 Checking files for TFTP limit of 4294967296 bytes.
231 13:53:40.311529 end: 1 tftp-deploy (duration 00:00:31) [common]
232 13:53:40.311635 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 13:53:40.311736 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 13:53:40.311865 substitutions:
235 13:53:40.311935 - {DTB}: None
236 13:53:40.311996 - {INITRD}: 10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
237 13:53:40.312054 - {KERNEL}: 10607051/tftp-deploy-s3sh6lw9/kernel/bzImage
238 13:53:40.312111 - {LAVA_MAC}: None
239 13:53:40.312166 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607051/extract-nfsrootfs-1ee7wqvf
240 13:53:40.312221 - {NFS_SERVER_IP}: 192.168.201.1
241 13:53:40.312275 - {PRESEED_CONFIG}: None
242 13:53:40.312334 - {PRESEED_LOCAL}: None
243 13:53:40.312387 - {RAMDISK}: 10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
244 13:53:40.312442 - {ROOT_PART}: None
245 13:53:40.312497 - {ROOT}: None
246 13:53:40.312551 - {SERVER_IP}: 192.168.201.1
247 13:53:40.312604 - {TEE}: None
248 13:53:40.312657 Parsed boot commands:
249 13:53:40.312715 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 13:53:40.312883 Parsed boot commands: tftpboot 192.168.201.1 10607051/tftp-deploy-s3sh6lw9/kernel/bzImage 10607051/tftp-deploy-s3sh6lw9/kernel/cmdline 10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
251 13:53:40.312975 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 13:53:40.313059 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 13:53:40.313148 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 13:53:40.313233 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 13:53:40.313310 Not connected, no need to disconnect.
256 13:53:40.313385 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 13:53:40.313465 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 13:53:40.313530 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
259 13:53:40.317078 Setting prompt string to ['lava-test: # ']
260 13:53:40.317433 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 13:53:40.317549 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 13:53:40.317654 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 13:53:40.317746 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 13:53:40.317948 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
265 13:53:45.450343 >> Command sent successfully.
266 13:53:45.452942 Returned 0 in 5 seconds
267 13:53:45.553318 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 13:53:45.553640 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 13:53:45.553744 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 13:53:45.553834 Setting prompt string to 'Starting depthcharge on Voema...'
272 13:53:45.553903 Changing prompt to 'Starting depthcharge on Voema...'
273 13:53:45.553973 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 13:53:45.554233 [Enter `^Ec?' for help]
275 13:53:47.116563
276 13:53:47.116716
277 13:53:47.126684 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 13:53:47.133073 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
279 13:53:47.137200 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 13:53:47.139807 CPU: AES supported, TXT NOT supported, VT supported
281 13:53:47.146977 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 13:53:47.150539 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 13:53:47.156676 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 13:53:47.160218 VBOOT: Loading verstage.
285 13:53:47.163574 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 13:53:47.170162 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 13:53:47.173520 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 13:53:47.183814 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 13:53:47.190760 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 13:53:47.190891
291 13:53:47.190989
292 13:53:47.200691 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 13:53:47.217126 Probing TPM: . done!
294 13:53:47.220389 TPM ready after 0 ms
295 13:53:47.223824 Connected to device vid:did:rid of 1ae0:0028:00
296 13:53:47.235355 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
297 13:53:47.241896 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 13:53:47.245081 Initialized TPM device CR50 revision 0
299 13:53:47.300879 tlcl_send_startup: Startup return code is 0
300 13:53:47.301025 TPM: setup succeeded
301 13:53:47.314778 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 13:53:47.328856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 13:53:47.341827 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 13:53:47.351617 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 13:53:47.355231 Chrome EC: UHEPI supported
306 13:53:47.358592 Phase 1
307 13:53:47.361855 FMAP: area GBB found @ 1805000 (458752 bytes)
308 13:53:47.371954 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 13:53:47.378603 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 13:53:47.385336 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 13:53:47.392073 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 13:53:47.395499 Recovery requested (1009000e)
313 13:53:47.398639 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 13:53:47.409935 tlcl_extend: response is 0
315 13:53:47.416525 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 13:53:47.426950 tlcl_extend: response is 0
317 13:53:47.433621 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 13:53:47.439782 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 13:53:47.446653 BS: verstage times (exec / console): total (unknown) / 142 ms
320 13:53:47.446747
321 13:53:47.446816
322 13:53:47.459564 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 13:53:47.466266 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 13:53:47.469584 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 13:53:47.472970 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 13:53:47.479806 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 13:53:47.483087 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 13:53:47.486399 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
329 13:53:47.489280 TCO_STS: 0000 0000
330 13:53:47.492727 GEN_PMCON: d0015038 00002200
331 13:53:47.496141 GBLRST_CAUSE: 00000000 00000000
332 13:53:47.499588 HPR_CAUSE0: 00000000
333 13:53:47.499682 prev_sleep_state 5
334 13:53:47.502954 Boot Count incremented to 8546
335 13:53:47.509035 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 13:53:47.516249 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 13:53:47.526222 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 13:53:47.532307 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 13:53:47.535683 Chrome EC: UHEPI supported
340 13:53:47.542183 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 13:53:47.553847 Probing TPM: done!
342 13:53:47.560547 Connected to device vid:did:rid of 1ae0:0028:00
343 13:53:47.570651 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
344 13:53:47.573868 Initialized TPM device CR50 revision 0
345 13:53:47.588590 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 13:53:47.595123 MRC: Hash idx 0x100b comparison successful.
347 13:53:47.598481 MRC cache found, size faa8
348 13:53:47.598570 bootmode is set to: 2
349 13:53:47.601901 SPD index = 2
350 13:53:47.608699 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 13:53:47.612023 SPD: module type is LPDDR4X
352 13:53:47.615191 SPD: module part number is MT53D1G64D4NW-046
353 13:53:47.622067 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
354 13:53:47.625390 SPD: device width 16 bits, bus width 16 bits
355 13:53:47.629358 SPD: module size is 2048 MB (per channel)
356 13:53:48.060911 CBMEM:
357 13:53:48.064199 IMD: root @ 0x76fff000 254 entries.
358 13:53:48.067653 IMD: root @ 0x76ffec00 62 entries.
359 13:53:48.070513 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 13:53:48.077530 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 13:53:48.080725 External stage cache:
362 13:53:48.084076 IMD: root @ 0x7b3ff000 254 entries.
363 13:53:48.087414 IMD: root @ 0x7b3fec00 62 entries.
364 13:53:48.101954 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 13:53:48.108643 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 13:53:48.115242 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 13:53:48.128918 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 13:53:48.135556 cse_lite: Skip switching to RW in the recovery path
369 13:53:48.135658 8 DIMMs found
370 13:53:48.135750 SMM Memory Map
371 13:53:48.142028 SMRAM : 0x7b000000 0x800000
372 13:53:48.145560 Subregion 0: 0x7b000000 0x200000
373 13:53:48.148956 Subregion 1: 0x7b200000 0x200000
374 13:53:48.152333 Subregion 2: 0x7b400000 0x400000
375 13:53:48.152417 top_of_ram = 0x77000000
376 13:53:48.158451 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 13:53:48.165710 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 13:53:48.168952 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 13:53:48.175103 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 13:53:48.182002 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 13:53:48.188129 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 13:53:48.198844 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 13:53:48.205716 Processing 211 relocs. Offset value of 0x74c0b000
384 13:53:48.212542 BS: romstage times (exec / console): total (unknown) / 277 ms
385 13:53:48.217188
386 13:53:48.217313
387 13:53:48.227281 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 13:53:48.230538 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 13:53:48.240911 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 13:53:48.247058 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 13:53:48.253879 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 13:53:48.260678 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 13:53:48.304297 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 13:53:48.311163 Processing 5008 relocs. Offset value of 0x75d98000
395 13:53:48.314370 BS: postcar times (exec / console): total (unknown) / 59 ms
396 13:53:48.317337
397 13:53:48.317469
398 13:53:48.327640 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 13:53:48.327750 Normal boot
400 13:53:48.330959 FW_CONFIG value is 0x804c02
401 13:53:48.334486 PCI: 00:07.0 disabled by fw_config
402 13:53:48.337621 PCI: 00:07.1 disabled by fw_config
403 13:53:48.340872 PCI: 00:0d.2 disabled by fw_config
404 13:53:48.347486 PCI: 00:1c.7 disabled by fw_config
405 13:53:48.350726 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 13:53:48.357006 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 13:53:48.360320 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 13:53:48.367242 GENERIC: 0.0 disabled by fw_config
409 13:53:48.370677 GENERIC: 1.0 disabled by fw_config
410 13:53:48.373967 fw_config match found: DB_USB=USB3_ACTIVE
411 13:53:48.377467 fw_config match found: DB_USB=USB3_ACTIVE
412 13:53:48.380742 fw_config match found: DB_USB=USB3_ACTIVE
413 13:53:48.386901 fw_config match found: DB_USB=USB3_ACTIVE
414 13:53:48.390234 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 13:53:48.397227 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 13:53:48.406663 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 13:53:48.413591 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 13:53:48.417042 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 13:53:48.423849 microcode: Update skipped, already up-to-date
420 13:53:48.430823 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 13:53:48.457876 Detected 4 core, 8 thread CPU.
422 13:53:48.461043 Setting up SMI for CPU
423 13:53:48.464173 IED base = 0x7b400000
424 13:53:48.464261 IED size = 0x00400000
425 13:53:48.467963 Will perform SMM setup.
426 13:53:48.475042 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
427 13:53:48.481227 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 13:53:48.487317 Processing 16 relocs. Offset value of 0x00030000
429 13:53:48.490497 Attempting to start 7 APs
430 13:53:48.494222 Waiting for 10ms after sending INIT.
431 13:53:48.509970 Waiting for 1st SIPI to complete...done.
432 13:53:48.510063 AP: slot 1 apic_id 1.
433 13:53:48.516760 Waiting for 2nd SIPI to complete...done.
434 13:53:48.516848 AP: slot 5 apic_id 6.
435 13:53:48.519444 AP: slot 4 apic_id 7.
436 13:53:48.522784 AP: slot 3 apic_id 4.
437 13:53:48.522872 AP: slot 7 apic_id 5.
438 13:53:48.526238 AP: slot 2 apic_id 3.
439 13:53:48.529758 AP: slot 6 apic_id 2.
440 13:53:48.535905 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 13:53:48.542816 Processing 13 relocs. Offset value of 0x00038000
442 13:53:48.546206 Unable to locate Global NVS
443 13:53:48.553100 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 13:53:48.555841 Installing permanent SMM handler to 0x7b000000
445 13:53:48.565711 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 13:53:48.569422 Processing 794 relocs. Offset value of 0x7b010000
447 13:53:48.579255 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 13:53:48.582624 Processing 13 relocs. Offset value of 0x7b008000
449 13:53:48.589540 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 13:53:48.595841 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 13:53:48.598966 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 13:53:48.605752 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 13:53:48.612602 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 13:53:48.619222 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 13:53:48.625470 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 13:53:48.628663 Unable to locate Global NVS
457 13:53:48.635485 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 13:53:48.638902 Clearing SMI status registers
459 13:53:48.639012 SMI_STS: PM1
460 13:53:48.642291 PM1_STS: PWRBTN
461 13:53:48.648614 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 13:53:48.652004 In relocation handler: CPU 0
463 13:53:48.655361 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 13:53:48.662208 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 13:53:48.662329 Relocation complete.
466 13:53:48.672034 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 13:53:48.675201 In relocation handler: CPU 1
468 13:53:48.678458 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 13:53:48.678548 Relocation complete.
470 13:53:48.688735 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
471 13:53:48.688846 In relocation handler: CPU 2
472 13:53:48.695323 New SMBASE=0x7afff800 IEDBASE=0x7b400000
473 13:53:48.695446 Relocation complete.
474 13:53:48.704855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
475 13:53:48.704969 In relocation handler: CPU 6
476 13:53:48.711456 New SMBASE=0x7affe800 IEDBASE=0x7b400000
477 13:53:48.714784 Writing SMRR. base = 0x7b000006, mask=0xff800c00
478 13:53:48.718458 Relocation complete.
479 13:53:48.725053 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
480 13:53:48.728266 In relocation handler: CPU 4
481 13:53:48.731539 New SMBASE=0x7afff000 IEDBASE=0x7b400000
482 13:53:48.734950 Relocation complete.
483 13:53:48.741169 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
484 13:53:48.744554 In relocation handler: CPU 5
485 13:53:48.748005 New SMBASE=0x7affec00 IEDBASE=0x7b400000
486 13:53:48.754974 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 13:53:48.755058 Relocation complete.
488 13:53:48.761631 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
489 13:53:48.764669 In relocation handler: CPU 7
490 13:53:48.771527 New SMBASE=0x7affe400 IEDBASE=0x7b400000
491 13:53:48.771653 Relocation complete.
492 13:53:48.777661 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
493 13:53:48.781493 In relocation handler: CPU 3
494 13:53:48.788126 New SMBASE=0x7afff400 IEDBASE=0x7b400000
495 13:53:48.790766 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 13:53:48.794598 Relocation complete.
497 13:53:48.794704 Initializing CPU #0
498 13:53:48.797860 CPU: vendor Intel device 806c1
499 13:53:48.801163 CPU: family 06, model 8c, stepping 01
500 13:53:48.804662 Clearing out pending MCEs
501 13:53:48.807968 Setting up local APIC...
502 13:53:48.810669 apic_id: 0x00 done.
503 13:53:48.814007 Turbo is available but hidden
504 13:53:48.818110 Turbo is available and visible
505 13:53:48.820890 microcode: Update skipped, already up-to-date
506 13:53:48.824180 CPU #0 initialized
507 13:53:48.824283 Initializing CPU #3
508 13:53:48.827568 Initializing CPU #7
509 13:53:48.830901 CPU: vendor Intel device 806c1
510 13:53:48.834117 CPU: family 06, model 8c, stepping 01
511 13:53:48.837416 Initializing CPU #4
512 13:53:48.837520 Initializing CPU #5
513 13:53:48.840584 Initializing CPU #1
514 13:53:48.840688 Initializing CPU #6
515 13:53:48.844033 Initializing CPU #2
516 13:53:48.847571 CPU: vendor Intel device 806c1
517 13:53:48.850990 CPU: family 06, model 8c, stepping 01
518 13:53:48.854518 CPU: vendor Intel device 806c1
519 13:53:48.857163 CPU: family 06, model 8c, stepping 01
520 13:53:48.860643 Clearing out pending MCEs
521 13:53:48.864219 Clearing out pending MCEs
522 13:53:48.867091 CPU: vendor Intel device 806c1
523 13:53:48.871248 CPU: family 06, model 8c, stepping 01
524 13:53:48.874605 CPU: vendor Intel device 806c1
525 13:53:48.878714 CPU: family 06, model 8c, stepping 01
526 13:53:48.878798 Clearing out pending MCEs
527 13:53:48.881472 Clearing out pending MCEs
528 13:53:48.885203 Setting up local APIC...
529 13:53:48.888685 Setting up local APIC...
530 13:53:48.891496 Setting up local APIC...
531 13:53:48.894801 CPU: vendor Intel device 806c1
532 13:53:48.898137 CPU: family 06, model 8c, stepping 01
533 13:53:48.898222 apic_id: 0x07 done.
534 13:53:48.901498 apic_id: 0x06 done.
535 13:53:48.904792 microcode: Update skipped, already up-to-date
536 13:53:48.908141 CPU: vendor Intel device 806c1
537 13:53:48.911543 CPU: family 06, model 8c, stepping 01
538 13:53:48.914864 Clearing out pending MCEs
539 13:53:48.918224 Clearing out pending MCEs
540 13:53:48.921621 Setting up local APIC...
541 13:53:48.924825 microcode: Update skipped, already up-to-date
542 13:53:48.928305 CPU #4 initialized
543 13:53:48.928390 CPU #5 initialized
544 13:53:48.931679 apic_id: 0x05 done.
545 13:53:48.935092 Setting up local APIC...
546 13:53:48.937746 Setting up local APIC...
547 13:53:48.941690 microcode: Update skipped, already up-to-date
548 13:53:48.944458 apic_id: 0x04 done.
549 13:53:48.944543 CPU #7 initialized
550 13:53:48.951255 microcode: Update skipped, already up-to-date
551 13:53:48.951345 apic_id: 0x02 done.
552 13:53:48.954729 apic_id: 0x03 done.
553 13:53:48.958111 microcode: Update skipped, already up-to-date
554 13:53:48.964380 microcode: Update skipped, already up-to-date
555 13:53:48.964464 CPU #6 initialized
556 13:53:48.967797 CPU #2 initialized
557 13:53:48.967911 CPU #3 initialized
558 13:53:48.971225 Clearing out pending MCEs
559 13:53:48.974566 Setting up local APIC...
560 13:53:48.977949 apic_id: 0x01 done.
561 13:53:48.981374 microcode: Update skipped, already up-to-date
562 13:53:48.984868 CPU #1 initialized
563 13:53:48.987524 bsp_do_flight_plan done after 468 msecs.
564 13:53:48.990730 CPU: frequency set to 4400 MHz
565 13:53:48.990813 Enabling SMIs.
566 13:53:48.997540 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 13:53:49.014876 SATAXPCIE1 indicates PCIe NVMe is present
568 13:53:49.018217 Probing TPM: done!
569 13:53:49.021686 Connected to device vid:did:rid of 1ae0:0028:00
570 13:53:49.032072 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
571 13:53:49.035440 Initialized TPM device CR50 revision 0
572 13:53:49.038225 Enabling S0i3.4
573 13:53:49.045106 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 13:53:49.048235 Found a VBT of 8704 bytes after decompression
575 13:53:49.055387 cse_lite: CSE RO boot. HybridStorageMode disabled
576 13:53:49.061673 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 13:53:49.136423 FSPS returned 0
578 13:53:49.139551 Executing Phase 1 of FspMultiPhaseSiInit
579 13:53:49.149574 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 13:53:49.152883 port C0 DISC req: usage 1 usb3 1 usb2 5
581 13:53:49.156178 Raw Buffer output 0 00000511
582 13:53:49.159376 Raw Buffer output 1 00000000
583 13:53:49.163123 pmc_send_ipc_cmd succeeded
584 13:53:49.170027 port C1 DISC req: usage 1 usb3 2 usb2 3
585 13:53:49.170114 Raw Buffer output 0 00000321
586 13:53:49.173497 Raw Buffer output 1 00000000
587 13:53:49.177672 pmc_send_ipc_cmd succeeded
588 13:53:49.182569 Detected 4 core, 8 thread CPU.
589 13:53:49.185299 Detected 4 core, 8 thread CPU.
590 13:53:49.386422 Display FSP Version Info HOB
591 13:53:49.389131 Reference Code - CPU = a.0.4c.31
592 13:53:49.392382 uCode Version = 0.0.0.86
593 13:53:49.396289 TXT ACM version = ff.ff.ff.ffff
594 13:53:49.399667 Reference Code - ME = a.0.4c.31
595 13:53:49.402344 MEBx version = 0.0.0.0
596 13:53:49.405812 ME Firmware Version = Consumer SKU
597 13:53:49.409118 Reference Code - PCH = a.0.4c.31
598 13:53:49.412514 PCH-CRID Status = Disabled
599 13:53:49.415923 PCH-CRID Original Value = ff.ff.ff.ffff
600 13:53:49.419509 PCH-CRID New Value = ff.ff.ff.ffff
601 13:53:49.422835 OPROM - RST - RAID = ff.ff.ff.ffff
602 13:53:49.426196 PCH Hsio Version = 4.0.0.0
603 13:53:49.429053 Reference Code - SA - System Agent = a.0.4c.31
604 13:53:49.432400 Reference Code - MRC = 2.0.0.1
605 13:53:49.435691 SA - PCIe Version = a.0.4c.31
606 13:53:49.439020 SA-CRID Status = Disabled
607 13:53:49.442227 SA-CRID Original Value = 0.0.0.1
608 13:53:49.446195 SA-CRID New Value = 0.0.0.1
609 13:53:49.450214 OPROM - VBIOS = ff.ff.ff.ffff
610 13:53:49.453660 IO Manageability Engine FW Version = 11.1.4.0
611 13:53:49.453759 PHY Build Version = 0.0.0.e0
612 13:53:49.461027 Thunderbolt(TM) FW Version = 0.0.0.0
613 13:53:49.463831 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 13:53:49.467268 ITSS IRQ Polarities Before:
615 13:53:49.470772 IPC0: 0xffffffff
616 13:53:49.470849 IPC1: 0xffffffff
617 13:53:49.473574 IPC2: 0xffffffff
618 13:53:49.473647 IPC3: 0xffffffff
619 13:53:49.477097 ITSS IRQ Polarities After:
620 13:53:49.480302 IPC0: 0xffffffff
621 13:53:49.480390 IPC1: 0xffffffff
622 13:53:49.483577 IPC2: 0xffffffff
623 13:53:49.483657 IPC3: 0xffffffff
624 13:53:49.490505 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 13:53:49.500418 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 13:53:49.513989 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 13:53:49.523887 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 13:53:49.530746 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
629 13:53:49.533529 Enumerating buses...
630 13:53:49.536979 Show all devs... Before device enumeration.
631 13:53:49.540390 Root Device: enabled 1
632 13:53:49.543717 DOMAIN: 0000: enabled 1
633 13:53:49.547051 CPU_CLUSTER: 0: enabled 1
634 13:53:49.547128 PCI: 00:00.0: enabled 1
635 13:53:49.550418 PCI: 00:02.0: enabled 1
636 13:53:49.553567 PCI: 00:04.0: enabled 1
637 13:53:49.557028 PCI: 00:05.0: enabled 1
638 13:53:49.557102 PCI: 00:06.0: enabled 0
639 13:53:49.560497 PCI: 00:07.0: enabled 0
640 13:53:49.563888 PCI: 00:07.1: enabled 0
641 13:53:49.563981 PCI: 00:07.2: enabled 0
642 13:53:49.567063 PCI: 00:07.3: enabled 0
643 13:53:49.570210 PCI: 00:08.0: enabled 1
644 13:53:49.573574 PCI: 00:09.0: enabled 0
645 13:53:49.573690 PCI: 00:0a.0: enabled 0
646 13:53:49.576479 PCI: 00:0d.0: enabled 1
647 13:53:49.579848 PCI: 00:0d.1: enabled 0
648 13:53:49.583469 PCI: 00:0d.2: enabled 0
649 13:53:49.583588 PCI: 00:0d.3: enabled 0
650 13:53:49.586739 PCI: 00:0e.0: enabled 0
651 13:53:49.590057 PCI: 00:10.2: enabled 1
652 13:53:49.593425 PCI: 00:10.6: enabled 0
653 13:53:49.593505 PCI: 00:10.7: enabled 0
654 13:53:49.596891 PCI: 00:12.0: enabled 0
655 13:53:49.600158 PCI: 00:12.6: enabled 0
656 13:53:49.603617 PCI: 00:13.0: enabled 0
657 13:53:49.603696 PCI: 00:14.0: enabled 1
658 13:53:49.606895 PCI: 00:14.1: enabled 0
659 13:53:49.610283 PCI: 00:14.2: enabled 1
660 13:53:49.610386 PCI: 00:14.3: enabled 1
661 13:53:49.613021 PCI: 00:15.0: enabled 1
662 13:53:49.616500 PCI: 00:15.1: enabled 1
663 13:53:49.619923 PCI: 00:15.2: enabled 1
664 13:53:49.620005 PCI: 00:15.3: enabled 1
665 13:53:49.623077 PCI: 00:16.0: enabled 1
666 13:53:49.626489 PCI: 00:16.1: enabled 0
667 13:53:49.629971 PCI: 00:16.2: enabled 0
668 13:53:49.630053 PCI: 00:16.3: enabled 0
669 13:53:49.633474 PCI: 00:16.4: enabled 0
670 13:53:49.636326 PCI: 00:16.5: enabled 0
671 13:53:49.639673 PCI: 00:17.0: enabled 1
672 13:53:49.639776 PCI: 00:19.0: enabled 0
673 13:53:49.643167 PCI: 00:19.1: enabled 1
674 13:53:49.646595 PCI: 00:19.2: enabled 0
675 13:53:49.646669 PCI: 00:1c.0: enabled 1
676 13:53:49.649957 PCI: 00:1c.1: enabled 0
677 13:53:49.653209 PCI: 00:1c.2: enabled 0
678 13:53:49.656398 PCI: 00:1c.3: enabled 0
679 13:53:49.656477 PCI: 00:1c.4: enabled 0
680 13:53:49.659513 PCI: 00:1c.5: enabled 0
681 13:53:49.662971 PCI: 00:1c.6: enabled 1
682 13:53:49.666434 PCI: 00:1c.7: enabled 0
683 13:53:49.666518 PCI: 00:1d.0: enabled 1
684 13:53:49.669972 PCI: 00:1d.1: enabled 0
685 13:53:49.673140 PCI: 00:1d.2: enabled 1
686 13:53:49.676546 PCI: 00:1d.3: enabled 0
687 13:53:49.676629 PCI: 00:1e.0: enabled 1
688 13:53:49.679835 PCI: 00:1e.1: enabled 0
689 13:53:49.683171 PCI: 00:1e.2: enabled 1
690 13:53:49.686051 PCI: 00:1e.3: enabled 1
691 13:53:49.686128 PCI: 00:1f.0: enabled 1
692 13:53:49.689846 PCI: 00:1f.1: enabled 0
693 13:53:49.692586 PCI: 00:1f.2: enabled 1
694 13:53:49.692667 PCI: 00:1f.3: enabled 1
695 13:53:49.695950 PCI: 00:1f.4: enabled 0
696 13:53:49.699227 PCI: 00:1f.5: enabled 1
697 13:53:49.702617 PCI: 00:1f.6: enabled 0
698 13:53:49.702775 PCI: 00:1f.7: enabled 0
699 13:53:49.705977 APIC: 00: enabled 1
700 13:53:49.709433 GENERIC: 0.0: enabled 1
701 13:53:49.712972 GENERIC: 0.0: enabled 1
702 13:53:49.713050 GENERIC: 1.0: enabled 1
703 13:53:49.716263 GENERIC: 0.0: enabled 1
704 13:53:49.719681 GENERIC: 1.0: enabled 1
705 13:53:49.719763 USB0 port 0: enabled 1
706 13:53:49.722486 GENERIC: 0.0: enabled 1
707 13:53:49.725845 USB0 port 0: enabled 1
708 13:53:49.729219 GENERIC: 0.0: enabled 1
709 13:53:49.729332 I2C: 00:1a: enabled 1
710 13:53:49.732733 I2C: 00:31: enabled 1
711 13:53:49.736076 I2C: 00:32: enabled 1
712 13:53:49.736151 I2C: 00:10: enabled 1
713 13:53:49.739453 I2C: 00:15: enabled 1
714 13:53:49.742873 GENERIC: 0.0: enabled 0
715 13:53:49.743007 GENERIC: 1.0: enabled 0
716 13:53:49.746190 GENERIC: 0.0: enabled 1
717 13:53:49.748915 SPI: 00: enabled 1
718 13:53:49.748984 SPI: 00: enabled 1
719 13:53:49.752352 PNP: 0c09.0: enabled 1
720 13:53:49.755691 GENERIC: 0.0: enabled 1
721 13:53:49.759004 USB3 port 0: enabled 1
722 13:53:49.759078 USB3 port 1: enabled 1
723 13:53:49.762310 USB3 port 2: enabled 0
724 13:53:49.765630 USB3 port 3: enabled 0
725 13:53:49.765716 USB2 port 0: enabled 0
726 13:53:49.768860 USB2 port 1: enabled 1
727 13:53:49.772309 USB2 port 2: enabled 1
728 13:53:49.772394 USB2 port 3: enabled 0
729 13:53:49.775904 USB2 port 4: enabled 1
730 13:53:49.779081 USB2 port 5: enabled 0
731 13:53:49.782589 USB2 port 6: enabled 0
732 13:53:49.782674 USB2 port 7: enabled 0
733 13:53:49.785944 USB2 port 8: enabled 0
734 13:53:49.789303 USB2 port 9: enabled 0
735 13:53:49.789387 USB3 port 0: enabled 0
736 13:53:49.792719 USB3 port 1: enabled 1
737 13:53:49.796151 USB3 port 2: enabled 0
738 13:53:49.798925 USB3 port 3: enabled 0
739 13:53:49.799009 GENERIC: 0.0: enabled 1
740 13:53:49.802493 GENERIC: 1.0: enabled 1
741 13:53:49.805764 APIC: 01: enabled 1
742 13:53:49.805849 APIC: 03: enabled 1
743 13:53:49.808915 APIC: 04: enabled 1
744 13:53:49.808999 APIC: 07: enabled 1
745 13:53:49.812331 APIC: 06: enabled 1
746 13:53:49.815673 APIC: 02: enabled 1
747 13:53:49.815759 APIC: 05: enabled 1
748 13:53:49.819095 Compare with tree...
749 13:53:49.822538 Root Device: enabled 1
750 13:53:49.822627 DOMAIN: 0000: enabled 1
751 13:53:49.825882 PCI: 00:00.0: enabled 1
752 13:53:49.829182 PCI: 00:02.0: enabled 1
753 13:53:49.832522 PCI: 00:04.0: enabled 1
754 13:53:49.835271 GENERIC: 0.0: enabled 1
755 13:53:49.835364 PCI: 00:05.0: enabled 1
756 13:53:49.838576 PCI: 00:06.0: enabled 0
757 13:53:49.842020 PCI: 00:07.0: enabled 0
758 13:53:49.845419 GENERIC: 0.0: enabled 1
759 13:53:49.849006 PCI: 00:07.1: enabled 0
760 13:53:49.849095 GENERIC: 1.0: enabled 1
761 13:53:49.852401 PCI: 00:07.2: enabled 0
762 13:53:49.855826 GENERIC: 0.0: enabled 1
763 13:53:49.858603 PCI: 00:07.3: enabled 0
764 13:53:49.862100 GENERIC: 1.0: enabled 1
765 13:53:49.865476 PCI: 00:08.0: enabled 1
766 13:53:49.865574 PCI: 00:09.0: enabled 0
767 13:53:49.868769 PCI: 00:0a.0: enabled 0
768 13:53:49.872073 PCI: 00:0d.0: enabled 1
769 13:53:49.875362 USB0 port 0: enabled 1
770 13:53:49.878863 USB3 port 0: enabled 1
771 13:53:49.878963 USB3 port 1: enabled 1
772 13:53:49.881719 USB3 port 2: enabled 0
773 13:53:49.885665 USB3 port 3: enabled 0
774 13:53:49.888575 PCI: 00:0d.1: enabled 0
775 13:53:49.891845 PCI: 00:0d.2: enabled 0
776 13:53:49.891927 GENERIC: 0.0: enabled 1
777 13:53:49.895171 PCI: 00:0d.3: enabled 0
778 13:53:49.898622 PCI: 00:0e.0: enabled 0
779 13:53:49.901997 PCI: 00:10.2: enabled 1
780 13:53:49.905359 PCI: 00:10.6: enabled 0
781 13:53:49.905447 PCI: 00:10.7: enabled 0
782 13:53:49.908887 PCI: 00:12.0: enabled 0
783 13:53:49.912292 PCI: 00:12.6: enabled 0
784 13:53:49.914856 PCI: 00:13.0: enabled 0
785 13:53:49.918157 PCI: 00:14.0: enabled 1
786 13:53:49.918266 USB0 port 0: enabled 1
787 13:53:49.921518 USB2 port 0: enabled 0
788 13:53:49.924998 USB2 port 1: enabled 1
789 13:53:49.928239 USB2 port 2: enabled 1
790 13:53:49.931688 USB2 port 3: enabled 0
791 13:53:49.931771 USB2 port 4: enabled 1
792 13:53:49.935032 USB2 port 5: enabled 0
793 13:53:49.938238 USB2 port 6: enabled 0
794 13:53:49.941816 USB2 port 7: enabled 0
795 13:53:49.945162 USB2 port 8: enabled 0
796 13:53:49.948003 USB2 port 9: enabled 0
797 13:53:49.948092 USB3 port 0: enabled 0
798 13:53:49.951489 USB3 port 1: enabled 1
799 13:53:49.954686 USB3 port 2: enabled 0
800 13:53:49.958078 USB3 port 3: enabled 0
801 13:53:49.961482 PCI: 00:14.1: enabled 0
802 13:53:49.961574 PCI: 00:14.2: enabled 1
803 13:53:49.964882 PCI: 00:14.3: enabled 1
804 13:53:49.968342 GENERIC: 0.0: enabled 1
805 13:53:49.971677 PCI: 00:15.0: enabled 1
806 13:53:49.974954 I2C: 00:1a: enabled 1
807 13:53:49.975045 I2C: 00:31: enabled 1
808 13:53:49.978069 I2C: 00:32: enabled 1
809 13:53:49.981437 PCI: 00:15.1: enabled 1
810 13:53:49.984844 I2C: 00:10: enabled 1
811 13:53:49.988281 PCI: 00:15.2: enabled 1
812 13:53:49.988360 PCI: 00:15.3: enabled 1
813 13:53:49.991082 PCI: 00:16.0: enabled 1
814 13:53:49.994491 PCI: 00:16.1: enabled 0
815 13:53:49.997901 PCI: 00:16.2: enabled 0
816 13:53:50.001248 PCI: 00:16.3: enabled 0
817 13:53:50.001344 PCI: 00:16.4: enabled 0
818 13:53:50.004623 PCI: 00:16.5: enabled 0
819 13:53:50.007881 PCI: 00:17.0: enabled 1
820 13:53:50.010945 PCI: 00:19.0: enabled 0
821 13:53:50.014552 PCI: 00:19.1: enabled 1
822 13:53:50.014645 I2C: 00:15: enabled 1
823 13:53:50.017946 PCI: 00:19.2: enabled 0
824 13:53:50.020769 PCI: 00:1d.0: enabled 1
825 13:53:50.024067 GENERIC: 0.0: enabled 1
826 13:53:50.027306 PCI: 00:1e.0: enabled 1
827 13:53:50.027428 PCI: 00:1e.1: enabled 0
828 13:53:50.030647 PCI: 00:1e.2: enabled 1
829 13:53:50.034040 SPI: 00: enabled 1
830 13:53:50.037464 PCI: 00:1e.3: enabled 1
831 13:53:50.037561 SPI: 00: enabled 1
832 13:53:50.040861 PCI: 00:1f.0: enabled 1
833 13:53:50.044249 PNP: 0c09.0: enabled 1
834 13:53:50.047715 PCI: 00:1f.1: enabled 0
835 13:53:50.047803 PCI: 00:1f.2: enabled 1
836 13:53:50.051151 GENERIC: 0.0: enabled 1
837 13:53:50.053834 GENERIC: 0.0: enabled 1
838 13:53:50.057126 GENERIC: 1.0: enabled 1
839 13:53:50.090862 PCI: 00:1f.3: enabled 1
840 13:53:50.090991 PCI: 00:1f.4: enabled 0
841 13:53:50.091308 PCI: 00:1f.5: enabled 1
842 13:53:50.091415 PCI: 00:1f.6: enabled 0
843 13:53:50.091510 PCI: 00:1f.7: enabled 0
844 13:53:50.091608 CPU_CLUSTER: 0: enabled 1
845 13:53:50.091697 APIC: 00: enabled 1
846 13:53:50.091791 APIC: 01: enabled 1
847 13:53:50.091878 APIC: 03: enabled 1
848 13:53:50.091965 APIC: 04: enabled 1
849 13:53:50.092057 APIC: 07: enabled 1
850 13:53:50.092144 APIC: 06: enabled 1
851 13:53:50.092229 APIC: 02: enabled 1
852 13:53:50.097027 APIC: 05: enabled 1
853 13:53:50.097106 Root Device scanning...
854 13:53:50.100464 scan_static_bus for Root Device
855 13:53:50.100539 DOMAIN: 0000 enabled
856 13:53:50.103173 CPU_CLUSTER: 0 enabled
857 13:53:50.106471 DOMAIN: 0000 scanning...
858 13:53:50.110054 PCI: pci_scan_bus for bus 00
859 13:53:50.113424 PCI: 00:00.0 [8086/0000] ops
860 13:53:50.113511 PCI: 00:00.0 [8086/9a12] enabled
861 13:53:50.117333 PCI: 00:02.0 [8086/0000] bus ops
862 13:53:50.120776 PCI: 00:02.0 [8086/9a40] enabled
863 13:53:50.124215 PCI: 00:04.0 [8086/0000] bus ops
864 13:53:50.127664 PCI: 00:04.0 [8086/9a03] enabled
865 13:53:50.131053 PCI: 00:05.0 [8086/9a19] enabled
866 13:53:50.134303 PCI: 00:07.0 [0000/0000] hidden
867 13:53:50.137668 PCI: 00:08.0 [8086/9a11] enabled
868 13:53:50.140862 PCI: 00:0a.0 [8086/9a0d] disabled
869 13:53:50.144269 PCI: 00:0d.0 [8086/0000] bus ops
870 13:53:50.147595 PCI: 00:0d.0 [8086/9a13] enabled
871 13:53:50.151040 PCI: 00:14.0 [8086/0000] bus ops
872 13:53:50.153749 PCI: 00:14.0 [8086/a0ed] enabled
873 13:53:50.157061 PCI: 00:14.2 [8086/a0ef] enabled
874 13:53:50.160594 PCI: 00:14.3 [8086/0000] bus ops
875 13:53:50.163901 PCI: 00:14.3 [8086/a0f0] enabled
876 13:53:50.167364 PCI: 00:15.0 [8086/0000] bus ops
877 13:53:50.170746 PCI: 00:15.0 [8086/a0e8] enabled
878 13:53:50.174356 PCI: 00:15.1 [8086/0000] bus ops
879 13:53:50.176992 PCI: 00:15.1 [8086/a0e9] enabled
880 13:53:50.180504 PCI: 00:15.2 [8086/0000] bus ops
881 13:53:50.183911 PCI: 00:15.2 [8086/a0ea] enabled
882 13:53:50.187311 PCI: 00:15.3 [8086/0000] bus ops
883 13:53:50.190738 PCI: 00:15.3 [8086/a0eb] enabled
884 13:53:50.193945 PCI: 00:16.0 [8086/0000] ops
885 13:53:50.197387 PCI: 00:16.0 [8086/a0e0] enabled
886 13:53:50.203975 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 13:53:50.206763 PCI: 00:19.0 [8086/0000] bus ops
888 13:53:50.210183 PCI: 00:19.0 [8086/a0c5] disabled
889 13:53:50.213531 PCI: 00:19.1 [8086/0000] bus ops
890 13:53:50.217345 PCI: 00:19.1 [8086/a0c6] enabled
891 13:53:50.220330 PCI: 00:1d.0 [8086/0000] bus ops
892 13:53:50.223430 PCI: 00:1d.0 [8086/a0b0] enabled
893 13:53:50.227139 PCI: 00:1e.0 [8086/0000] ops
894 13:53:50.230517 PCI: 00:1e.0 [8086/a0a8] enabled
895 13:53:50.233845 PCI: 00:1e.2 [8086/0000] bus ops
896 13:53:50.237107 PCI: 00:1e.2 [8086/a0aa] enabled
897 13:53:50.240181 PCI: 00:1e.3 [8086/0000] bus ops
898 13:53:50.243201 PCI: 00:1e.3 [8086/a0ab] enabled
899 13:53:50.246473 PCI: 00:1f.0 [8086/0000] bus ops
900 13:53:50.250422 PCI: 00:1f.0 [8086/a087] enabled
901 13:53:50.250501 RTC Init
902 13:53:50.253665 Set power on after power failure.
903 13:53:50.257001 Disabling Deep S3
904 13:53:50.259771 Disabling Deep S3
905 13:53:50.259848 Disabling Deep S4
906 13:53:50.263222 Disabling Deep S4
907 13:53:50.263302 Disabling Deep S5
908 13:53:50.266690 Disabling Deep S5
909 13:53:50.270141 PCI: 00:1f.2 [0000/0000] hidden
910 13:53:50.273533 PCI: 00:1f.3 [8086/0000] bus ops
911 13:53:50.276517 PCI: 00:1f.3 [8086/a0c8] enabled
912 13:53:50.279979 PCI: 00:1f.5 [8086/0000] bus ops
913 13:53:50.283407 PCI: 00:1f.5 [8086/a0a4] enabled
914 13:53:50.286874 PCI: Leftover static devices:
915 13:53:50.286947 PCI: 00:10.2
916 13:53:50.289556 PCI: 00:10.6
917 13:53:50.289636 PCI: 00:10.7
918 13:53:50.289711 PCI: 00:06.0
919 13:53:50.292909 PCI: 00:07.1
920 13:53:50.292982 PCI: 00:07.2
921 13:53:50.296199 PCI: 00:07.3
922 13:53:50.296280 PCI: 00:09.0
923 13:53:50.296354 PCI: 00:0d.1
924 13:53:50.299708 PCI: 00:0d.2
925 13:53:50.299788 PCI: 00:0d.3
926 13:53:50.302986 PCI: 00:0e.0
927 13:53:50.303067 PCI: 00:12.0
928 13:53:50.306464 PCI: 00:12.6
929 13:53:50.306545 PCI: 00:13.0
930 13:53:50.306612 PCI: 00:14.1
931 13:53:50.309878 PCI: 00:16.1
932 13:53:50.309956 PCI: 00:16.2
933 13:53:50.313278 PCI: 00:16.3
934 13:53:50.313353 PCI: 00:16.4
935 13:53:50.313419 PCI: 00:16.5
936 13:53:50.316622 PCI: 00:17.0
937 13:53:50.316709 PCI: 00:19.2
938 13:53:50.320024 PCI: 00:1e.1
939 13:53:50.320099 PCI: 00:1f.1
940 13:53:50.320177 PCI: 00:1f.4
941 13:53:50.323265 PCI: 00:1f.6
942 13:53:50.323370 PCI: 00:1f.7
943 13:53:50.326519 PCI: Check your devicetree.cb.
944 13:53:50.329783 PCI: 00:02.0 scanning...
945 13:53:50.333092 scan_generic_bus for PCI: 00:02.0
946 13:53:50.336191 scan_generic_bus for PCI: 00:02.0 done
947 13:53:50.342553 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 13:53:50.342635 PCI: 00:04.0 scanning...
949 13:53:50.349830 scan_generic_bus for PCI: 00:04.0
950 13:53:50.349913 GENERIC: 0.0 enabled
951 13:53:50.356370 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 13:53:50.359768 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 13:53:50.362927 PCI: 00:0d.0 scanning...
954 13:53:50.366314 scan_static_bus for PCI: 00:0d.0
955 13:53:50.369650 USB0 port 0 enabled
956 13:53:50.373079 USB0 port 0 scanning...
957 13:53:50.376495 scan_static_bus for USB0 port 0
958 13:53:50.376584 USB3 port 0 enabled
959 13:53:50.379069 USB3 port 1 enabled
960 13:53:50.382597 USB3 port 2 disabled
961 13:53:50.382699 USB3 port 3 disabled
962 13:53:50.385989 USB3 port 0 scanning...
963 13:53:50.389639 scan_static_bus for USB3 port 0
964 13:53:50.392484 scan_static_bus for USB3 port 0 done
965 13:53:50.399045 scan_bus: bus USB3 port 0 finished in 6 msecs
966 13:53:50.399149 USB3 port 1 scanning...
967 13:53:50.402357 scan_static_bus for USB3 port 1
968 13:53:50.405953 scan_static_bus for USB3 port 1 done
969 13:53:50.412694 scan_bus: bus USB3 port 1 finished in 6 msecs
970 13:53:50.416012 scan_static_bus for USB0 port 0 done
971 13:53:50.418987 scan_bus: bus USB0 port 0 finished in 43 msecs
972 13:53:50.425670 scan_static_bus for PCI: 00:0d.0 done
973 13:53:50.428816 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 13:53:50.432223 PCI: 00:14.0 scanning...
975 13:53:50.435821 scan_static_bus for PCI: 00:14.0
976 13:53:50.435937 USB0 port 0 enabled
977 13:53:50.438976 USB0 port 0 scanning...
978 13:53:50.442311 scan_static_bus for USB0 port 0
979 13:53:50.445712 USB2 port 0 disabled
980 13:53:50.449014 USB2 port 1 enabled
981 13:53:50.449096 USB2 port 2 enabled
982 13:53:50.451727 USB2 port 3 disabled
983 13:53:50.451817 USB2 port 4 enabled
984 13:53:50.455025 USB2 port 5 disabled
985 13:53:50.458970 USB2 port 6 disabled
986 13:53:50.459053 USB2 port 7 disabled
987 13:53:50.462224 USB2 port 8 disabled
988 13:53:50.465347 USB2 port 9 disabled
989 13:53:50.465429 USB3 port 0 disabled
990 13:53:50.468515 USB3 port 1 enabled
991 13:53:50.471804 USB3 port 2 disabled
992 13:53:50.471888 USB3 port 3 disabled
993 13:53:50.474953 USB2 port 1 scanning...
994 13:53:50.478553 scan_static_bus for USB2 port 1
995 13:53:50.481998 scan_static_bus for USB2 port 1 done
996 13:53:50.485387 scan_bus: bus USB2 port 1 finished in 6 msecs
997 13:53:50.488757 USB2 port 2 scanning...
998 13:53:50.492150 scan_static_bus for USB2 port 2
999 13:53:50.495247 scan_static_bus for USB2 port 2 done
1000 13:53:50.501812 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 13:53:50.505372 USB2 port 4 scanning...
1002 13:53:50.508603 scan_static_bus for USB2 port 4
1003 13:53:50.511404 scan_static_bus for USB2 port 4 done
1004 13:53:50.514861 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 13:53:50.518254 USB3 port 1 scanning...
1006 13:53:50.521761 scan_static_bus for USB3 port 1
1007 13:53:50.525101 scan_static_bus for USB3 port 1 done
1008 13:53:50.528646 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 13:53:50.531235 scan_static_bus for USB0 port 0 done
1010 13:53:50.538149 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 13:53:50.541462 scan_static_bus for PCI: 00:14.0 done
1012 13:53:50.544767 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1013 13:53:50.548136 PCI: 00:14.3 scanning...
1014 13:53:50.551531 scan_static_bus for PCI: 00:14.3
1015 13:53:50.554887 GENERIC: 0.0 enabled
1016 13:53:50.558268 scan_static_bus for PCI: 00:14.3 done
1017 13:53:50.564402 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 13:53:50.564491 PCI: 00:15.0 scanning...
1019 13:53:50.567674 scan_static_bus for PCI: 00:15.0
1020 13:53:50.571581 I2C: 00:1a enabled
1021 13:53:50.574708 I2C: 00:31 enabled
1022 13:53:50.574806 I2C: 00:32 enabled
1023 13:53:50.577911 scan_static_bus for PCI: 00:15.0 done
1024 13:53:50.584197 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 13:53:50.587810 PCI: 00:15.1 scanning...
1026 13:53:50.591249 scan_static_bus for PCI: 00:15.1
1027 13:53:50.591373 I2C: 00:10 enabled
1028 13:53:50.594050 scan_static_bus for PCI: 00:15.1 done
1029 13:53:50.600843 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 13:53:50.604268 PCI: 00:15.2 scanning...
1031 13:53:50.607554 scan_static_bus for PCI: 00:15.2
1032 13:53:50.610878 scan_static_bus for PCI: 00:15.2 done
1033 13:53:50.614226 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 13:53:50.617700 PCI: 00:15.3 scanning...
1035 13:53:50.621154 scan_static_bus for PCI: 00:15.3
1036 13:53:50.623901 scan_static_bus for PCI: 00:15.3 done
1037 13:53:50.631008 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 13:53:50.631096 PCI: 00:19.1 scanning...
1039 13:53:50.634524 scan_static_bus for PCI: 00:19.1
1040 13:53:50.637941 I2C: 00:15 enabled
1041 13:53:50.640525 scan_static_bus for PCI: 00:19.1 done
1042 13:53:50.647678 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 13:53:50.647763 PCI: 00:1d.0 scanning...
1044 13:53:50.650453 do_pci_scan_bridge for PCI: 00:1d.0
1045 13:53:50.653910 PCI: pci_scan_bus for bus 01
1046 13:53:50.657221 PCI: 01:00.0 [15b7/5009] enabled
1047 13:53:50.660498 GENERIC: 0.0 enabled
1048 13:53:50.663771 Enabling Common Clock Configuration
1049 13:53:50.667217 L1 Sub-State supported from root port 29
1050 13:53:50.670754 L1 Sub-State Support = 0x5
1051 13:53:50.674308 CommonModeRestoreTime = 0x28
1052 13:53:50.677015 Power On Value = 0x16, Power On Scale = 0x0
1053 13:53:50.680972 ASPM: Enabled L1
1054 13:53:50.684084 PCIe: Max_Payload_Size adjusted to 128
1055 13:53:50.691102 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 13:53:50.691187 PCI: 00:1e.2 scanning...
1057 13:53:50.694538 scan_generic_bus for PCI: 00:1e.2
1058 13:53:50.698025 SPI: 00 enabled
1059 13:53:50.704888 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 13:53:50.707700 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 13:53:50.711037 PCI: 00:1e.3 scanning...
1062 13:53:50.714317 scan_generic_bus for PCI: 00:1e.3
1063 13:53:50.714405 SPI: 00 enabled
1064 13:53:50.721139 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 13:53:50.728071 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 13:53:50.728170 PCI: 00:1f.0 scanning...
1067 13:53:50.731316 scan_static_bus for PCI: 00:1f.0
1068 13:53:50.734859 PNP: 0c09.0 enabled
1069 13:53:50.737449 PNP: 0c09.0 scanning...
1070 13:53:50.741472 scan_static_bus for PNP: 0c09.0
1071 13:53:50.744151 scan_static_bus for PNP: 0c09.0 done
1072 13:53:50.747496 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 13:53:50.754217 scan_static_bus for PCI: 00:1f.0 done
1074 13:53:50.757643 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 13:53:50.760988 PCI: 00:1f.2 scanning...
1076 13:53:50.764316 scan_static_bus for PCI: 00:1f.2
1077 13:53:50.764423 GENERIC: 0.0 enabled
1078 13:53:50.767488 GENERIC: 0.0 scanning...
1079 13:53:50.770787 scan_static_bus for GENERIC: 0.0
1080 13:53:50.774280 GENERIC: 0.0 enabled
1081 13:53:50.777120 GENERIC: 1.0 enabled
1082 13:53:50.780520 scan_static_bus for GENERIC: 0.0 done
1083 13:53:50.783847 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 13:53:50.787131 scan_static_bus for PCI: 00:1f.2 done
1085 13:53:50.793976 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 13:53:50.797192 PCI: 00:1f.3 scanning...
1087 13:53:50.800455 scan_static_bus for PCI: 00:1f.3
1088 13:53:50.804188 scan_static_bus for PCI: 00:1f.3 done
1089 13:53:50.806979 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 13:53:50.810290 PCI: 00:1f.5 scanning...
1091 13:53:51.455194 scan_generic_bus for PCI: 00:1f.5
1092 13:53:51.456473 scan_generic_bus for PCI: 00:1f.5 done
1093 13:53:51.457086 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 13:53:51.457657 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1095 13:53:51.458570 scan_static_bus for Root Device done
1096 13:53:51.459145 scan_bus: bus Root Device finished in 735 msecs
1097 13:53:51.459691 done
1098 13:53:51.460278 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1099 13:53:51.460707 Chrome EC: UHEPI supported
1100 13:53:51.460812 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 13:53:51.460914 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 13:53:51.461019 SPI flash protection: WPSW=0 SRP0=1
1103 13:53:51.461119 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 13:53:51.461224 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1105 13:53:51.461323 found VGA at PCI: 00:02.0
1106 13:53:51.461421 Setting up VGA for PCI: 00:02.0
1107 13:53:51.461515 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 13:53:51.461627 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 13:53:51.461720 Allocating resources...
1110 13:53:51.461820 Reading resources...
1111 13:53:51.461959 Root Device read_resources bus 0 link: 0
1112 13:53:51.462050 DOMAIN: 0000 read_resources bus 0 link: 0
1113 13:53:51.462136 PCI: 00:04.0 read_resources bus 1 link: 0
1114 13:53:51.462252 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 13:53:51.462349 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 13:53:51.462449 USB0 port 0 read_resources bus 0 link: 0
1117 13:53:51.462533 USB0 port 0 read_resources bus 0 link: 0 done
1118 13:53:51.462660 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 13:53:51.462745 PCI: 00:14.0 read_resources bus 0 link: 0
1120 13:53:51.462830 USB0 port 0 read_resources bus 0 link: 0
1121 13:53:51.462937 USB0 port 0 read_resources bus 0 link: 0 done
1122 13:53:51.463020 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 13:53:51.463103 PCI: 00:14.3 read_resources bus 0 link: 0
1124 13:53:51.463186 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 13:53:51.463286 PCI: 00:15.0 read_resources bus 0 link: 0
1126 13:53:51.463416 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 13:53:51.463531 PCI: 00:15.1 read_resources bus 0 link: 0
1128 13:53:51.463628 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 13:53:51.463711 PCI: 00:19.1 read_resources bus 0 link: 0
1130 13:53:51.463794 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 13:53:51.463898 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 13:53:51.463991 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 13:53:51.464088 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 13:53:51.464185 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 13:53:51.464272 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 13:53:51.464363 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 13:53:51.464449 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 13:53:51.464534 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 13:53:51.464619 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 13:53:51.464703 GENERIC: 0.0 read_resources bus 0 link: 0
1141 13:53:51.464789 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 13:53:51.464880 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 13:53:51.464966 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 13:53:51.465051 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 13:53:51.465137 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 13:53:51.465222 Root Device read_resources bus 0 link: 0 done
1147 13:53:51.465318 Done reading resources.
1148 13:53:51.465418 Show resources in subtree (Root Device)...After reading.
1149 13:53:51.465521 Root Device child on link 0 DOMAIN: 0000
1150 13:53:51.465609 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 13:53:51.465696 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 13:53:51.465785 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 13:53:51.465871 PCI: 00:00.0
1154 13:53:51.465999 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 13:53:51.466092 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 13:53:51.466179 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 13:53:51.466265 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 13:53:51.466351 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 13:53:51.466450 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 13:53:51.466542 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 13:53:51.466650 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 13:53:51.466746 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 13:53:51.466834 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 13:53:51.466922 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 13:53:51.467009 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 13:53:51.467106 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 13:53:51.467374 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 13:53:51.467470 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 13:53:51.467558 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 13:53:51.467654 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 13:53:51.467742 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 13:53:51.467841 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 13:53:51.467925 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 13:53:51.468008 PCI: 00:02.0
1175 13:53:51.468129 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 13:53:51.468218 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 13:53:51.468304 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 13:53:51.468389 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 13:53:51.468476 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 13:53:51.468588 GENERIC: 0.0
1181 13:53:51.468679 PCI: 00:05.0
1182 13:53:51.468766 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 13:53:51.468853 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 13:53:51.468941 GENERIC: 0.0
1185 13:53:51.469025 PCI: 00:08.0
1186 13:53:51.469110 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:53:51.469203 PCI: 00:0a.0
1188 13:53:51.469288 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 13:53:51.469374 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 13:53:51.469459 USB0 port 0 child on link 0 USB3 port 0
1191 13:53:51.469543 USB3 port 0
1192 13:53:51.469626 USB3 port 1
1193 13:53:51.469717 USB3 port 2
1194 13:53:51.469802 USB3 port 3
1195 13:53:51.469886 PCI: 00:14.0 child on link 0 USB0 port 0
1196 13:53:51.469971 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 13:53:51.470057 USB0 port 0 child on link 0 USB2 port 0
1198 13:53:51.470141 USB2 port 0
1199 13:53:51.470228 USB2 port 1
1200 13:53:51.470316 USB2 port 2
1201 13:53:51.470399 USB2 port 3
1202 13:53:51.470482 USB2 port 4
1203 13:53:51.470571 USB2 port 5
1204 13:53:51.470655 USB2 port 6
1205 13:53:51.470739 USB2 port 7
1206 13:53:51.470831 USB2 port 8
1207 13:53:51.470915 USB2 port 9
1208 13:53:51.470998 USB3 port 0
1209 13:53:51.471082 USB3 port 1
1210 13:53:51.471166 USB3 port 2
1211 13:53:51.471249 USB3 port 3
1212 13:53:51.471345 PCI: 00:14.2
1213 13:53:51.471434 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 13:53:51.471521 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 13:53:51.471629 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 13:53:51.480307 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 13:53:51.480408 GENERIC: 0.0
1218 13:53:51.483861 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 13:53:51.497326 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 13:53:51.497438 I2C: 00:1a
1221 13:53:51.497533 I2C: 00:31
1222 13:53:51.500803 I2C: 00:32
1223 13:53:51.503533 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 13:53:51.514091 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 13:53:51.517030 I2C: 00:10
1226 13:53:51.517119 PCI: 00:15.2
1227 13:53:51.526940 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 13:53:51.530285 PCI: 00:15.3
1229 13:53:51.540680 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 13:53:51.541142 PCI: 00:16.0
1231 13:53:51.550294 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 13:53:51.553641 PCI: 00:19.0
1233 13:53:51.557166 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 13:53:51.567146 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 13:53:51.570472 I2C: 00:15
1236 13:53:51.573590 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 13:53:51.580628 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 13:53:51.590339 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 13:53:51.600521 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 13:53:51.603848 GENERIC: 0.0
1241 13:53:51.604235 PCI: 01:00.0
1242 13:53:51.613230 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 13:53:51.623421 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1244 13:53:51.626971 PCI: 00:1e.0
1245 13:53:51.636914 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1246 13:53:51.640067 PCI: 00:1e.2 child on link 0 SPI: 00
1247 13:53:51.650089 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 13:53:51.653441 SPI: 00
1249 13:53:51.656896 PCI: 00:1e.3 child on link 0 SPI: 00
1250 13:53:51.666303 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 13:53:51.666826 SPI: 00
1252 13:53:51.673063 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1253 13:53:51.679854 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1254 13:53:51.683115 PNP: 0c09.0
1255 13:53:51.690103 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1256 13:53:51.696195 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1257 13:53:51.706387 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1258 13:53:51.712700 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1259 13:53:51.719721 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1260 13:53:51.720113 GENERIC: 0.0
1261 13:53:51.722727 GENERIC: 1.0
1262 13:53:51.723130 PCI: 00:1f.3
1263 13:53:51.732816 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1264 13:53:51.745884 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1265 13:53:51.746279 PCI: 00:1f.5
1266 13:53:51.756001 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1267 13:53:51.759484 CPU_CLUSTER: 0 child on link 0 APIC: 00
1268 13:53:51.760051 APIC: 00
1269 13:53:51.762670 APIC: 01
1270 13:53:51.763141 APIC: 03
1271 13:53:51.765256 APIC: 04
1272 13:53:51.765697 APIC: 07
1273 13:53:51.765996 APIC: 06
1274 13:53:51.768817 APIC: 02
1275 13:53:51.769366 APIC: 05
1276 13:53:51.775387 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1277 13:53:51.782279 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1278 13:53:51.789022 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1279 13:53:51.795628 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1280 13:53:51.798944 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1281 13:53:51.801891 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1282 13:53:51.812204 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1283 13:53:51.818996 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1284 13:53:51.825094 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1285 13:53:51.831728 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1286 13:53:51.838530 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1287 13:53:51.845349 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1288 13:53:51.854959 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1289 13:53:51.861971 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1290 13:53:51.865190 DOMAIN: 0000: Resource ranges:
1291 13:53:51.868458 * Base: 1000, Size: 800, Tag: 100
1292 13:53:51.871970 * Base: 1900, Size: e700, Tag: 100
1293 13:53:51.878521 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1294 13:53:51.884823 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1295 13:53:51.891539 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1296 13:53:51.898151 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1297 13:53:51.905070 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 13:53:51.915156 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 13:53:51.921806 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 13:53:51.927986 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 13:53:51.937979 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 13:53:51.944946 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 13:53:51.951097 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 13:53:51.961601 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 13:53:51.968038 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 13:53:51.974549 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 13:53:51.984652 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 13:53:51.991060 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 13:53:51.997888 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 13:53:52.007826 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 13:53:52.014566 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 13:53:52.020719 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1313 13:53:52.030731 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 13:53:52.037435 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 13:53:52.044473 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 13:53:52.053858 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 13:53:52.061023 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 13:53:52.064325 DOMAIN: 0000: Resource ranges:
1319 13:53:52.067674 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 13:53:52.074235 * Base: d0000000, Size: 28000000, Tag: 200
1321 13:53:52.077494 * Base: fa000000, Size: 1000000, Tag: 200
1322 13:53:52.080709 * Base: fb001000, Size: 2fff000, Tag: 200
1323 13:53:52.083850 * Base: fe010000, Size: 2e000, Tag: 200
1324 13:53:52.090320 * Base: fe03f000, Size: d41000, Tag: 200
1325 13:53:52.093527 * Base: fed88000, Size: 8000, Tag: 200
1326 13:53:52.097314 * Base: fed93000, Size: d000, Tag: 200
1327 13:53:52.100567 * Base: feda2000, Size: 1e000, Tag: 200
1328 13:53:52.107189 * Base: fede0000, Size: 1220000, Tag: 200
1329 13:53:52.110112 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1330 13:53:52.116789 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 13:53:52.123536 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 13:53:52.130389 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 13:53:52.136718 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 13:53:52.143678 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 13:53:52.150134 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1336 13:53:52.156732 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1337 13:53:52.163701 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1338 13:53:52.169815 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1339 13:53:52.176595 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1340 13:53:52.183226 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1341 13:53:52.189708 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1342 13:53:52.196772 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 13:53:52.203141 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1344 13:53:52.209699 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1345 13:53:52.216423 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1346 13:53:52.223177 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1347 13:53:52.229740 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1348 13:53:52.236634 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1349 13:53:52.242845 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1350 13:53:52.249626 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1351 13:53:52.255966 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1352 13:53:52.263222 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1353 13:53:52.272892 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1354 13:53:52.276313 PCI: 00:1d.0: Resource ranges:
1355 13:53:52.279576 * Base: 7fc00000, Size: 100000, Tag: 200
1356 13:53:52.285885 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1357 13:53:52.292723 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1358 13:53:52.302793 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1359 13:53:52.309396 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1360 13:53:52.312587 Root Device assign_resources, bus 0 link: 0
1361 13:53:52.319039 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 13:53:52.325864 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1363 13:53:52.335753 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1364 13:53:52.342415 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1365 13:53:52.348842 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1366 13:53:52.355207 PCI: 00:04.0 assign_resources, bus 1 link: 0
1367 13:53:52.358729 PCI: 00:04.0 assign_resources, bus 1 link: 0
1368 13:53:52.368049 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1369 13:53:52.374898 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1370 13:53:52.385204 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1371 13:53:52.387975 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1372 13:53:52.394748 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1373 13:53:52.401587 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1374 13:53:52.404831 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 13:53:52.411098 PCI: 00:14.0 assign_resources, bus 0 link: 0
1376 13:53:52.417769 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1377 13:53:52.427916 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1378 13:53:52.434749 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1379 13:53:52.440821 PCI: 00:14.3 assign_resources, bus 0 link: 0
1380 13:53:52.444572 PCI: 00:14.3 assign_resources, bus 0 link: 0
1381 13:53:52.450712 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1382 13:53:52.457581 PCI: 00:15.0 assign_resources, bus 0 link: 0
1383 13:53:52.461137 PCI: 00:15.0 assign_resources, bus 0 link: 0
1384 13:53:52.470713 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1385 13:53:52.473932 PCI: 00:15.1 assign_resources, bus 0 link: 0
1386 13:53:52.480757 PCI: 00:15.1 assign_resources, bus 0 link: 0
1387 13:53:52.486961 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1388 13:53:52.496713 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1389 13:53:52.503628 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1390 13:53:52.513776 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1391 13:53:52.516972 PCI: 00:19.1 assign_resources, bus 0 link: 0
1392 13:53:52.520213 PCI: 00:19.1 assign_resources, bus 0 link: 0
1393 13:53:52.530272 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1394 13:53:52.540275 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1395 13:53:52.547016 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1396 13:53:52.553684 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 13:53:52.560032 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1398 13:53:52.570075 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1399 13:53:52.573671 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 13:53:52.583104 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1401 13:53:52.586429 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 13:53:52.593253 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1403 13:53:52.599991 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1404 13:53:52.602760 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 13:53:52.609597 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 13:53:52.612967 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 13:53:52.619913 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 13:53:52.622715 LPC: Trying to open IO window from 800 size 1ff
1409 13:53:52.633082 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 13:53:52.639594 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 13:53:52.649658 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 13:53:52.652345 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 13:53:52.655779 Root Device assign_resources, bus 0 link: 0
1414 13:53:52.659652 Done setting resources.
1415 13:53:52.666066 Show resources in subtree (Root Device)...After assigning values.
1416 13:53:52.668795 Root Device child on link 0 DOMAIN: 0000
1417 13:53:52.675896 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 13:53:52.685576 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 13:53:52.692147 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 13:53:52.695835 PCI: 00:00.0
1421 13:53:52.705478 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 13:53:52.715819 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 13:53:52.725250 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 13:53:52.732119 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 13:53:52.742084 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 13:53:52.751842 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 13:53:52.761736 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 13:53:52.771547 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 13:53:52.781739 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 13:53:52.788483 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 13:53:52.798495 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 13:53:52.808724 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 13:53:52.818282 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 13:53:52.825306 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 13:53:52.834913 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 13:53:52.845240 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 13:53:52.854844 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 13:53:52.864740 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 13:53:52.874729 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 13:53:52.884599 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 13:53:52.884691 PCI: 00:02.0
1442 13:53:52.894888 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 13:53:52.907482 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 13:53:52.914490 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 13:53:52.921346 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 13:53:52.931314 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 13:53:52.934042 GENERIC: 0.0
1448 13:53:52.934158 PCI: 00:05.0
1449 13:53:52.944658 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 13:53:52.950810 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 13:53:52.950932 GENERIC: 0.0
1452 13:53:52.954242 PCI: 00:08.0
1453 13:53:52.964094 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 13:53:52.964190 PCI: 00:0a.0
1455 13:53:52.970914 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 13:53:52.981159 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 13:53:52.984310 USB0 port 0 child on link 0 USB3 port 0
1458 13:53:52.987648 USB3 port 0
1459 13:53:52.987726 USB3 port 1
1460 13:53:52.990740 USB3 port 2
1461 13:53:52.990836 USB3 port 3
1462 13:53:52.994295 PCI: 00:14.0 child on link 0 USB0 port 0
1463 13:53:53.007052 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 13:53:53.010388 USB0 port 0 child on link 0 USB2 port 0
1465 13:53:53.010477 USB2 port 0
1466 13:53:53.013745 USB2 port 1
1467 13:53:53.017056 USB2 port 2
1468 13:53:53.017145 USB2 port 3
1469 13:53:53.020655 USB2 port 4
1470 13:53:53.020742 USB2 port 5
1471 13:53:53.024041 USB2 port 6
1472 13:53:53.024126 USB2 port 7
1473 13:53:53.027591 USB2 port 8
1474 13:53:53.027690 USB2 port 9
1475 13:53:53.030326 USB3 port 0
1476 13:53:53.030411 USB3 port 1
1477 13:53:53.033669 USB3 port 2
1478 13:53:53.033753 USB3 port 3
1479 13:53:53.037167 PCI: 00:14.2
1480 13:53:53.047065 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 13:53:53.056728 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 13:53:53.063663 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 13:53:53.073303 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 13:53:53.073442 GENERIC: 0.0
1485 13:53:53.079925 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 13:53:53.090102 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 13:53:53.090226 I2C: 00:1a
1488 13:53:53.093378 I2C: 00:31
1489 13:53:53.093462 I2C: 00:32
1490 13:53:53.096701 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 13:53:53.106334 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 13:53:53.109833 I2C: 00:10
1493 13:53:53.109916 PCI: 00:15.2
1494 13:53:53.123134 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 13:53:53.123252 PCI: 00:15.3
1496 13:53:53.133141 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 13:53:53.136518 PCI: 00:16.0
1498 13:53:53.146241 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 13:53:53.146324 PCI: 00:19.0
1500 13:53:53.152688 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 13:53:53.163138 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 13:53:53.163224 I2C: 00:15
1503 13:53:53.169161 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 13:53:53.176382 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 13:53:53.189236 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 13:53:53.199552 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 13:53:53.202294 GENERIC: 0.0
1508 13:53:53.202372 PCI: 01:00.0
1509 13:53:53.212393 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 13:53:53.222648 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1511 13:53:53.226090 PCI: 00:1e.0
1512 13:53:53.235629 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 13:53:53.238957 PCI: 00:1e.2 child on link 0 SPI: 00
1514 13:53:53.248921 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 13:53:53.252372 SPI: 00
1516 13:53:53.255873 PCI: 00:1e.3 child on link 0 SPI: 00
1517 13:53:53.265775 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 13:53:53.269295 SPI: 00
1519 13:53:53.272700 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 13:53:53.282486 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 13:53:53.282599 PNP: 0c09.0
1522 13:53:53.292054 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1523 13:53:53.295267 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1524 13:53:53.305242 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1525 13:53:53.315536 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1526 13:53:53.318919 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1527 13:53:53.322243 GENERIC: 0.0
1528 13:53:53.322324 GENERIC: 1.0
1529 13:53:53.325167 PCI: 00:1f.3
1530 13:53:53.335431 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1531 13:53:53.344858 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1532 13:53:53.344941 PCI: 00:1f.5
1533 13:53:53.358790 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1534 13:53:53.361711 CPU_CLUSTER: 0 child on link 0 APIC: 00
1535 13:53:53.361796 APIC: 00
1536 13:53:53.365142 APIC: 01
1537 13:53:53.365225 APIC: 03
1538 13:53:53.365293 APIC: 04
1539 13:53:53.367871 APIC: 07
1540 13:53:53.367941 APIC: 06
1541 13:53:53.371362 APIC: 02
1542 13:53:53.371485 APIC: 05
1543 13:53:53.374687 Done allocating resources.
1544 13:53:53.381590 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1545 13:53:53.384403 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1546 13:53:53.391271 Configure GPIOs for I2S audio on UP4.
1547 13:53:53.397971 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1548 13:53:53.398082 Enabling resources...
1549 13:53:53.404490 PCI: 00:00.0 subsystem <- 8086/9a12
1550 13:53:53.404573 PCI: 00:00.0 cmd <- 06
1551 13:53:53.407917 PCI: 00:02.0 subsystem <- 8086/9a40
1552 13:53:53.411146 PCI: 00:02.0 cmd <- 03
1553 13:53:53.414362 PCI: 00:04.0 subsystem <- 8086/9a03
1554 13:53:53.417937 PCI: 00:04.0 cmd <- 02
1555 13:53:53.421211 PCI: 00:05.0 subsystem <- 8086/9a19
1556 13:53:53.424251 PCI: 00:05.0 cmd <- 02
1557 13:53:53.427634 PCI: 00:08.0 subsystem <- 8086/9a11
1558 13:53:53.431068 PCI: 00:08.0 cmd <- 06
1559 13:53:53.434400 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 13:53:53.437182 PCI: 00:0d.0 cmd <- 02
1561 13:53:53.440488 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 13:53:53.443959 PCI: 00:14.0 cmd <- 02
1563 13:53:53.447222 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 13:53:53.447347 PCI: 00:14.2 cmd <- 02
1565 13:53:53.454030 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 13:53:53.454114 PCI: 00:14.3 cmd <- 02
1567 13:53:53.457518 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 13:53:53.460956 PCI: 00:15.0 cmd <- 02
1569 13:53:53.463895 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 13:53:53.467511 PCI: 00:15.1 cmd <- 02
1571 13:53:53.470978 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 13:53:53.473786 PCI: 00:15.2 cmd <- 02
1573 13:53:53.477234 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 13:53:53.480776 PCI: 00:15.3 cmd <- 02
1575 13:53:53.483426 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 13:53:53.487465 PCI: 00:16.0 cmd <- 02
1577 13:53:53.490736 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 13:53:53.493606 PCI: 00:19.1 cmd <- 02
1579 13:53:53.497052 PCI: 00:1d.0 bridge ctrl <- 0013
1580 13:53:53.500511 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 13:53:53.500614 PCI: 00:1d.0 cmd <- 06
1582 13:53:53.507453 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 13:53:53.507532 PCI: 00:1e.0 cmd <- 06
1584 13:53:53.510685 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 13:53:53.513935 PCI: 00:1e.2 cmd <- 06
1586 13:53:53.517171 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 13:53:53.520550 PCI: 00:1e.3 cmd <- 02
1588 13:53:53.523359 PCI: 00:1f.0 subsystem <- 8086/a087
1589 13:53:53.526929 PCI: 00:1f.0 cmd <- 407
1590 13:53:53.530479 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 13:53:53.533205 PCI: 00:1f.3 cmd <- 02
1592 13:53:53.536659 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 13:53:53.539954 PCI: 00:1f.5 cmd <- 406
1594 13:53:53.543551 PCI: 01:00.0 cmd <- 02
1595 13:53:53.547710 done.
1596 13:53:53.551023 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 13:53:53.554413 Initializing devices...
1598 13:53:53.557856 Root Device init
1599 13:53:53.561318 Chrome EC: Set SMI mask to 0x0000000000000000
1600 13:53:53.567520 Chrome EC: clear events_b mask to 0x0000000000000000
1601 13:53:53.574363 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 13:53:53.580921 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 13:53:53.584286 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 13:53:53.590990 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 13:53:53.594478 fw_config match found: DB_USB=USB3_ACTIVE
1606 13:53:53.600733 Configure Right Type-C port orientation for retimer
1607 13:53:53.604327 Root Device init finished in 43 msecs
1608 13:53:53.607180 PCI: 00:00.0 init
1609 13:53:53.610676 CPU TDP = 9 Watts
1610 13:53:53.610778 CPU PL1 = 9 Watts
1611 13:53:53.613970 CPU PL2 = 40 Watts
1612 13:53:53.614072 CPU PL4 = 83 Watts
1613 13:53:53.620617 PCI: 00:00.0 init finished in 8 msecs
1614 13:53:53.620701 PCI: 00:02.0 init
1615 13:53:53.623726 GMA: Found VBT in CBFS
1616 13:53:53.627224 GMA: Found valid VBT in CBFS
1617 13:53:53.633915 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 13:53:53.640282 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 13:53:53.643695 PCI: 00:02.0 init finished in 18 msecs
1620 13:53:53.647155 PCI: 00:05.0 init
1621 13:53:53.650705 PCI: 00:05.0 init finished in 0 msecs
1622 13:53:53.654320 PCI: 00:08.0 init
1623 13:53:53.657051 PCI: 00:08.0 init finished in 0 msecs
1624 13:53:53.660243 PCI: 00:14.0 init
1625 13:53:53.663737 PCI: 00:14.0 init finished in 0 msecs
1626 13:53:53.667288 PCI: 00:14.2 init
1627 13:53:53.670162 PCI: 00:14.2 init finished in 0 msecs
1628 13:53:53.670273 PCI: 00:15.0 init
1629 13:53:53.673619 I2C bus 0 version 0x3230302a
1630 13:53:53.677249 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 13:53:53.683366 PCI: 00:15.0 init finished in 6 msecs
1632 13:53:53.683448 PCI: 00:15.1 init
1633 13:53:53.686865 I2C bus 1 version 0x3230302a
1634 13:53:53.690384 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 13:53:53.693090 PCI: 00:15.1 init finished in 6 msecs
1636 13:53:53.696423 PCI: 00:15.2 init
1637 13:53:53.699994 I2C bus 2 version 0x3230302a
1638 13:53:53.703374 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 13:53:53.706948 PCI: 00:15.2 init finished in 6 msecs
1640 13:53:53.709664 PCI: 00:15.3 init
1641 13:53:53.713221 I2C bus 3 version 0x3230302a
1642 13:53:53.716836 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 13:53:53.719650 PCI: 00:15.3 init finished in 6 msecs
1644 13:53:53.723110 PCI: 00:16.0 init
1645 13:53:53.726330 PCI: 00:16.0 init finished in 0 msecs
1646 13:53:53.729649 PCI: 00:19.1 init
1647 13:53:53.733018 I2C bus 5 version 0x3230302a
1648 13:53:53.736472 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 13:53:53.739856 PCI: 00:19.1 init finished in 6 msecs
1650 13:53:53.739968 PCI: 00:1d.0 init
1651 13:53:53.742688 Initializing PCH PCIe bridge.
1652 13:53:53.746225 PCI: 00:1d.0 init finished in 3 msecs
1653 13:53:53.751102 PCI: 00:1f.0 init
1654 13:53:53.754276 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 13:53:53.760680 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 13:53:53.760765 IOAPIC: ID = 0x02
1657 13:53:53.764045 IOAPIC: Dumping registers
1658 13:53:53.767426 reg 0x0000: 0x02000000
1659 13:53:53.770739 reg 0x0001: 0x00770020
1660 13:53:53.770844 reg 0x0002: 0x00000000
1661 13:53:53.776964 PCI: 00:1f.0 init finished in 21 msecs
1662 13:53:53.777058 PCI: 00:1f.2 init
1663 13:53:53.780375 Disabling ACPI via APMC.
1664 13:53:53.785345 APMC done.
1665 13:53:53.788270 PCI: 00:1f.2 init finished in 6 msecs
1666 13:53:53.800089 PCI: 01:00.0 init
1667 13:53:53.803591 PCI: 01:00.0 init finished in 0 msecs
1668 13:53:53.806286 PNP: 0c09.0 init
1669 13:53:53.813478 Google Chrome EC uptime: 8.294 seconds
1670 13:53:53.816862 Google Chrome AP resets since EC boot: 1
1671 13:53:53.820281 Google Chrome most recent AP reset causes:
1672 13:53:53.822975 0.453: 32775 shutdown: entering G3
1673 13:53:53.829949 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 13:53:53.833332 PNP: 0c09.0 init finished in 24 msecs
1675 13:53:53.839750 Devices initialized
1676 13:53:53.842980 Show all devs... After init.
1677 13:53:53.846972 Root Device: enabled 1
1678 13:53:53.847058 DOMAIN: 0000: enabled 1
1679 13:53:53.850288 CPU_CLUSTER: 0: enabled 1
1680 13:53:53.852967 PCI: 00:00.0: enabled 1
1681 13:53:53.856815 PCI: 00:02.0: enabled 1
1682 13:53:53.856901 PCI: 00:04.0: enabled 1
1683 13:53:53.860256 PCI: 00:05.0: enabled 1
1684 13:53:53.862962 PCI: 00:06.0: enabled 0
1685 13:53:53.866499 PCI: 00:07.0: enabled 0
1686 13:53:53.866584 PCI: 00:07.1: enabled 0
1687 13:53:53.869988 PCI: 00:07.2: enabled 0
1688 13:53:53.873379 PCI: 00:07.3: enabled 0
1689 13:53:53.876640 PCI: 00:08.0: enabled 1
1690 13:53:53.876727 PCI: 00:09.0: enabled 0
1691 13:53:53.880132 PCI: 00:0a.0: enabled 0
1692 13:53:53.882978 PCI: 00:0d.0: enabled 1
1693 13:53:53.886472 PCI: 00:0d.1: enabled 0
1694 13:53:53.886553 PCI: 00:0d.2: enabled 0
1695 13:53:53.890111 PCI: 00:0d.3: enabled 0
1696 13:53:53.892990 PCI: 00:0e.0: enabled 0
1697 13:53:53.893075 PCI: 00:10.2: enabled 1
1698 13:53:53.896513 PCI: 00:10.6: enabled 0
1699 13:53:53.899988 PCI: 00:10.7: enabled 0
1700 13:53:53.902843 PCI: 00:12.0: enabled 0
1701 13:53:53.902929 PCI: 00:12.6: enabled 0
1702 13:53:53.906416 PCI: 00:13.0: enabled 0
1703 13:53:53.909943 PCI: 00:14.0: enabled 1
1704 13:53:53.912803 PCI: 00:14.1: enabled 0
1705 13:53:53.912902 PCI: 00:14.2: enabled 1
1706 13:53:53.916430 PCI: 00:14.3: enabled 1
1707 13:53:53.919966 PCI: 00:15.0: enabled 1
1708 13:53:53.922851 PCI: 00:15.1: enabled 1
1709 13:53:53.922950 PCI: 00:15.2: enabled 1
1710 13:53:53.926403 PCI: 00:15.3: enabled 1
1711 13:53:53.929265 PCI: 00:16.0: enabled 1
1712 13:53:53.929349 PCI: 00:16.1: enabled 0
1713 13:53:53.933077 PCI: 00:16.2: enabled 0
1714 13:53:53.936380 PCI: 00:16.3: enabled 0
1715 13:53:53.939837 PCI: 00:16.4: enabled 0
1716 13:53:53.939922 PCI: 00:16.5: enabled 0
1717 13:53:53.942536 PCI: 00:17.0: enabled 0
1718 13:53:53.946258 PCI: 00:19.0: enabled 0
1719 13:53:53.949775 PCI: 00:19.1: enabled 1
1720 13:53:53.949914 PCI: 00:19.2: enabled 0
1721 13:53:53.952824 PCI: 00:1c.0: enabled 1
1722 13:53:53.956339 PCI: 00:1c.1: enabled 0
1723 13:53:53.959577 PCI: 00:1c.2: enabled 0
1724 13:53:53.959659 PCI: 00:1c.3: enabled 0
1725 13:53:53.963234 PCI: 00:1c.4: enabled 0
1726 13:53:53.965932 PCI: 00:1c.5: enabled 0
1727 13:53:53.966017 PCI: 00:1c.6: enabled 1
1728 13:53:53.969441 PCI: 00:1c.7: enabled 0
1729 13:53:53.972894 PCI: 00:1d.0: enabled 1
1730 13:53:53.975755 PCI: 00:1d.1: enabled 0
1731 13:53:53.975872 PCI: 00:1d.2: enabled 1
1732 13:53:53.979209 PCI: 00:1d.3: enabled 0
1733 13:53:53.982743 PCI: 00:1e.0: enabled 1
1734 13:53:53.986098 PCI: 00:1e.1: enabled 0
1735 13:53:53.986194 PCI: 00:1e.2: enabled 1
1736 13:53:53.989780 PCI: 00:1e.3: enabled 1
1737 13:53:53.992726 PCI: 00:1f.0: enabled 1
1738 13:53:53.996427 PCI: 00:1f.1: enabled 0
1739 13:53:53.996540 PCI: 00:1f.2: enabled 1
1740 13:53:53.999281 PCI: 00:1f.3: enabled 1
1741 13:53:54.002760 PCI: 00:1f.4: enabled 0
1742 13:53:54.005759 PCI: 00:1f.5: enabled 1
1743 13:53:54.005861 PCI: 00:1f.6: enabled 0
1744 13:53:54.009399 PCI: 00:1f.7: enabled 0
1745 13:53:54.012995 APIC: 00: enabled 1
1746 13:53:54.013099 GENERIC: 0.0: enabled 1
1747 13:53:54.015911 GENERIC: 0.0: enabled 1
1748 13:53:54.019367 GENERIC: 1.0: enabled 1
1749 13:53:54.022978 GENERIC: 0.0: enabled 1
1750 13:53:54.023057 GENERIC: 1.0: enabled 1
1751 13:53:54.025912 USB0 port 0: enabled 1
1752 13:53:54.029382 GENERIC: 0.0: enabled 1
1753 13:53:54.029460 USB0 port 0: enabled 1
1754 13:53:54.032845 GENERIC: 0.0: enabled 1
1755 13:53:54.035767 I2C: 00:1a: enabled 1
1756 13:53:54.039291 I2C: 00:31: enabled 1
1757 13:53:54.039403 I2C: 00:32: enabled 1
1758 13:53:54.042288 I2C: 00:10: enabled 1
1759 13:53:54.045723 I2C: 00:15: enabled 1
1760 13:53:54.045806 GENERIC: 0.0: enabled 0
1761 13:53:54.049240 GENERIC: 1.0: enabled 0
1762 13:53:54.052562 GENERIC: 0.0: enabled 1
1763 13:53:54.052645 SPI: 00: enabled 1
1764 13:53:54.055877 SPI: 00: enabled 1
1765 13:53:54.058970 PNP: 0c09.0: enabled 1
1766 13:53:54.059049 GENERIC: 0.0: enabled 1
1767 13:53:54.062328 USB3 port 0: enabled 1
1768 13:53:54.065733 USB3 port 1: enabled 1
1769 13:53:54.065813 USB3 port 2: enabled 0
1770 13:53:54.069544 USB3 port 3: enabled 0
1771 13:53:54.072677 USB2 port 0: enabled 0
1772 13:53:54.075603 USB2 port 1: enabled 1
1773 13:53:54.075696 USB2 port 2: enabled 1
1774 13:53:54.078890 USB2 port 3: enabled 0
1775 13:53:54.082425 USB2 port 4: enabled 1
1776 13:53:54.082533 USB2 port 5: enabled 0
1777 13:53:54.085946 USB2 port 6: enabled 0
1778 13:53:54.088773 USB2 port 7: enabled 0
1779 13:53:54.092239 USB2 port 8: enabled 0
1780 13:53:54.092349 USB2 port 9: enabled 0
1781 13:53:54.095740 USB3 port 0: enabled 0
1782 13:53:54.099056 USB3 port 1: enabled 1
1783 13:53:54.099170 USB3 port 2: enabled 0
1784 13:53:54.102537 USB3 port 3: enabled 0
1785 13:53:54.105359 GENERIC: 0.0: enabled 1
1786 13:53:54.109063 GENERIC: 1.0: enabled 1
1787 13:53:54.109148 APIC: 01: enabled 1
1788 13:53:54.111983 APIC: 03: enabled 1
1789 13:53:54.112067 APIC: 04: enabled 1
1790 13:53:54.115609 APIC: 07: enabled 1
1791 13:53:54.118540 APIC: 06: enabled 1
1792 13:53:54.118625 APIC: 02: enabled 1
1793 13:53:54.122104 APIC: 05: enabled 1
1794 13:53:54.125635 PCI: 01:00.0: enabled 1
1795 13:53:54.129182 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1796 13:53:54.135789 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1797 13:53:54.138651 ELOG: NV offset 0xf30000 size 0x1000
1798 13:53:54.145039 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1799 13:53:54.152149 ELOG: Event(17) added with size 13 at 2023-06-06 13:53:42 UTC
1800 13:53:54.158681 ELOG: Event(92) added with size 9 at 2023-06-06 13:53:42 UTC
1801 13:53:54.164922 ELOG: Event(93) added with size 9 at 2023-06-06 13:53:42 UTC
1802 13:53:54.171473 ELOG: Event(9E) added with size 10 at 2023-06-06 13:53:42 UTC
1803 13:53:54.178611 ELOG: Event(9F) added with size 14 at 2023-06-06 13:53:42 UTC
1804 13:53:54.185017 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1805 13:53:54.188489 ELOG: Event(A1) added with size 10 at 2023-06-06 13:53:42 UTC
1806 13:53:54.198578 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1807 13:53:54.204629 ELOG: Event(A0) added with size 9 at 2023-06-06 13:53:42 UTC
1808 13:53:54.208006 elog_add_boot_reason: Logged dev mode boot
1809 13:53:54.214986 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1810 13:53:54.215139 Finalize devices...
1811 13:53:54.217727 Devices finalized
1812 13:53:54.224760 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1813 13:53:54.227671 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1814 13:53:54.234769 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1815 13:53:54.237666 ME: HFSTS1 : 0x80030055
1816 13:53:54.244564 ME: HFSTS2 : 0x30280116
1817 13:53:54.248173 ME: HFSTS3 : 0x00000050
1818 13:53:54.251042 ME: HFSTS4 : 0x00004000
1819 13:53:54.257566 ME: HFSTS5 : 0x00000000
1820 13:53:54.261144 ME: HFSTS6 : 0x40400006
1821 13:53:54.264151 ME: Manufacturing Mode : YES
1822 13:53:54.267601 ME: SPI Protection Mode Enabled : NO
1823 13:53:54.271093 ME: FW Partition Table : OK
1824 13:53:54.277262 ME: Bringup Loader Failure : NO
1825 13:53:54.280781 ME: Firmware Init Complete : NO
1826 13:53:54.284120 ME: Boot Options Present : NO
1827 13:53:54.287273 ME: Update In Progress : NO
1828 13:53:54.290554 ME: D0i3 Support : YES
1829 13:53:54.294018 ME: Low Power State Enabled : NO
1830 13:53:54.297434 ME: CPU Replaced : YES
1831 13:53:54.304446 ME: CPU Replacement Valid : YES
1832 13:53:54.307194 ME: Current Working State : 5
1833 13:53:54.310821 ME: Current Operation State : 1
1834 13:53:54.314228 ME: Current Operation Mode : 3
1835 13:53:54.317060 ME: Error Code : 0
1836 13:53:54.320671 ME: Enhanced Debug Mode : NO
1837 13:53:54.324237 ME: CPU Debug Disabled : YES
1838 13:53:54.327105 ME: TXT Support : NO
1839 13:53:54.334044 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1840 13:53:54.340452 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1841 13:53:54.343992 CBFS: 'fallback/slic' not found.
1842 13:53:54.350548 ACPI: Writing ACPI tables at 76b01000.
1843 13:53:54.350636 ACPI: * FACS
1844 13:53:54.353477 ACPI: * DSDT
1845 13:53:54.357148 Ramoops buffer: 0x100000@0x76a00000.
1846 13:53:54.360640 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1847 13:53:54.366987 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1848 13:53:54.370550 Google Chrome EC: version:
1849 13:53:54.373509 ro: voema_v2.0.10114-a447f03e46
1850 13:53:54.376844 rw: voema_v2.0.10132-7b2059e3bc
1851 13:53:54.376931 running image: 2
1852 13:53:54.383088 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1853 13:53:54.387676 ACPI: * FADT
1854 13:53:54.387759 SCI is IRQ9
1855 13:53:54.394200 ACPI: added table 1/32, length now 40
1856 13:53:54.394316 ACPI: * SSDT
1857 13:53:54.397615 Found 1 CPU(s) with 8 core(s) each.
1858 13:53:54.404463 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1859 13:53:54.407984 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1860 13:53:54.411430 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1861 13:53:54.414246 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1862 13:53:54.420907 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1863 13:53:54.427958 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1864 13:53:54.430789 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1865 13:53:54.437939 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1866 13:53:54.444288 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1867 13:53:54.447748 \_SB.PCI0.RP09: Added StorageD3Enable property
1868 13:53:54.454172 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1869 13:53:54.457606 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1870 13:53:54.464126 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1871 13:53:54.467901 PS2K: Passing 80 keymaps to kernel
1872 13:53:54.474807 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1873 13:53:54.481126 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1874 13:53:54.487392 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1875 13:53:54.494282 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1876 13:53:54.501123 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1877 13:53:54.507849 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1878 13:53:54.514252 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1879 13:53:54.520594 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1880 13:53:54.523898 ACPI: added table 2/32, length now 44
1881 13:53:54.527338 ACPI: * MCFG
1882 13:53:54.530716 ACPI: added table 3/32, length now 48
1883 13:53:54.530824 ACPI: * TPM2
1884 13:53:54.534226 TPM2 log created at 0x769f0000
1885 13:53:54.537142 ACPI: added table 4/32, length now 52
1886 13:53:54.540726 ACPI: * MADT
1887 13:53:54.540836 SCI is IRQ9
1888 13:53:54.544318 ACPI: added table 5/32, length now 56
1889 13:53:54.547258 current = 76b09850
1890 13:53:54.547367 ACPI: * DMAR
1891 13:53:54.553727 ACPI: added table 6/32, length now 60
1892 13:53:54.557462 ACPI: added table 7/32, length now 64
1893 13:53:54.557572 ACPI: * HPET
1894 13:53:54.560874 ACPI: added table 8/32, length now 68
1895 13:53:54.563727 ACPI: done.
1896 13:53:54.567252 ACPI tables: 35216 bytes.
1897 13:53:54.567343 smbios_write_tables: 769ef000
1898 13:53:54.572068 EC returned error result code 3
1899 13:53:54.574929 Couldn't obtain OEM name from CBI
1900 13:53:54.579484 Create SMBIOS type 16
1901 13:53:54.582268 Create SMBIOS type 17
1902 13:53:54.585831 GENERIC: 0.0 (WIFI Device)
1903 13:53:54.589353 SMBIOS tables: 1734 bytes.
1904 13:53:54.592179 Writing table forward entry at 0x00000500
1905 13:53:54.599079 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1906 13:53:54.602559 Writing coreboot table at 0x76b25000
1907 13:53:54.608888 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1908 13:53:54.612173 1. 0000000000001000-000000000009ffff: RAM
1909 13:53:54.615705 2. 00000000000a0000-00000000000fffff: RESERVED
1910 13:53:54.621924 3. 0000000000100000-00000000769eefff: RAM
1911 13:53:54.625552 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1912 13:53:54.632212 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1913 13:53:54.638404 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1914 13:53:54.641878 7. 0000000077000000-000000007fbfffff: RESERVED
1915 13:53:54.648853 8. 00000000c0000000-00000000cfffffff: RESERVED
1916 13:53:54.651784 9. 00000000f8000000-00000000f9ffffff: RESERVED
1917 13:53:54.655317 10. 00000000fb000000-00000000fb000fff: RESERVED
1918 13:53:54.661671 11. 00000000fe000000-00000000fe00ffff: RESERVED
1919 13:53:54.665232 12. 00000000fed80000-00000000fed87fff: RESERVED
1920 13:53:54.671815 13. 00000000fed90000-00000000fed92fff: RESERVED
1921 13:53:54.675250 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 13:53:54.681760 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 13:53:54.685244 16. 0000000100000000-00000004803fffff: RAM
1924 13:53:54.688090 Passing 4 GPIOs to payload:
1925 13:53:54.691653 NAME | PORT | POLARITY | VALUE
1926 13:53:54.698690 lid | undefined | high | high
1927 13:53:54.705140 power | undefined | high | low
1928 13:53:54.708483 oprom | undefined | high | low
1929 13:53:54.715223 EC in RW | 0x000000e5 | high | high
1930 13:53:54.721544 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1931 13:53:54.721636 coreboot table: 1576 bytes.
1932 13:53:54.728160 IMD ROOT 0. 0x76fff000 0x00001000
1933 13:53:54.731601 IMD SMALL 1. 0x76ffe000 0x00001000
1934 13:53:54.735066 FSP MEMORY 2. 0x76c4e000 0x003b0000
1935 13:53:54.738473 VPD 3. 0x76c4d000 0x00000367
1936 13:53:54.741284 RO MCACHE 4. 0x76c4c000 0x00000fdc
1937 13:53:54.744554 CONSOLE 5. 0x76c2c000 0x00020000
1938 13:53:54.747984 FMAP 6. 0x76c2b000 0x00000578
1939 13:53:54.754962 TIME STAMP 7. 0x76c2a000 0x00000910
1940 13:53:54.757764 VBOOT WORK 8. 0x76c16000 0x00014000
1941 13:53:54.761300 ROMSTG STCK 9. 0x76c15000 0x00001000
1942 13:53:54.764654 AFTER CAR 10. 0x76c0a000 0x0000b000
1943 13:53:54.768276 RAMSTAGE 11. 0x76b97000 0x00073000
1944 13:53:54.771018 REFCODE 12. 0x76b42000 0x00055000
1945 13:53:54.774542 SMM BACKUP 13. 0x76b32000 0x00010000
1946 13:53:54.778071 4f444749 14. 0x76b30000 0x00002000
1947 13:53:54.780936 EXT VBT15. 0x76b2d000 0x0000219f
1948 13:53:54.788059 COREBOOT 16. 0x76b25000 0x00008000
1949 13:53:54.790911 ACPI 17. 0x76b01000 0x00024000
1950 13:53:54.794340 ACPI GNVS 18. 0x76b00000 0x00001000
1951 13:53:54.797967 RAMOOPS 19. 0x76a00000 0x00100000
1952 13:53:54.800792 TPM2 TCGLOG20. 0x769f0000 0x00010000
1953 13:53:54.804329 SMBIOS 21. 0x769ef000 0x00000800
1954 13:53:54.807606 IMD small region:
1955 13:53:54.810972 IMD ROOT 0. 0x76ffec00 0x00000400
1956 13:53:54.814147 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1957 13:53:54.817587 POWER STATE 2. 0x76ffeb80 0x00000044
1958 13:53:54.820866 ROMSTAGE 3. 0x76ffeb60 0x00000004
1959 13:53:54.827541 MEM INFO 4. 0x76ffe980 0x000001e0
1960 13:53:54.830956 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1961 13:53:54.834192 MTRR: Physical address space:
1962 13:53:54.840550 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1963 13:53:54.847547 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1964 13:53:54.854352 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1965 13:53:54.860513 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1966 13:53:54.867475 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1967 13:53:54.873728 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1968 13:53:54.880820 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1969 13:53:54.883728 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 13:53:54.887186 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 13:53:54.890753 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 13:53:54.893591 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 13:53:54.900531 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 13:53:54.903569 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 13:53:54.907022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 13:53:54.910416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 13:53:54.917429 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 13:53:54.920068 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 13:53:54.923684 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 13:53:54.927515 call enable_fixed_mtrr()
1981 13:53:54.931383 CPU physical address size: 39 bits
1982 13:53:54.937911 MTRR: default type WB/UC MTRR counts: 6/7.
1983 13:53:54.941214 MTRR: WB selected as default type.
1984 13:53:54.947918 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 13:53:54.950823 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 13:53:54.958205 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 13:53:54.964295 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1988 13:53:54.971225 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1989 13:53:54.977673 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1990 13:53:54.981139
1991 13:53:54.981224 MTRR check
1992 13:53:54.984796 Fixed MTRRs : Enabled
1993 13:53:54.984886 Variable MTRRs: Enabled
1994 13:53:54.984987
1995 13:53:54.990996 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 13:53:54.994563 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 13:53:54.998048 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 13:53:55.000811 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 13:53:55.007714 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 13:53:55.011244 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 13:53:55.014132 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 13:53:55.017759 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 13:53:55.024140 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 13:53:55.027479 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 13:53:55.030882 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 13:53:55.038288 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2007 13:53:55.041102 call enable_fixed_mtrr()
2008 13:53:55.045130 Checking cr50 for pending updates
2009 13:53:55.048330 CPU physical address size: 39 bits
2010 13:53:55.051616 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 13:53:55.055083 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 13:53:55.061906 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 13:53:55.065341 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 13:53:55.068286 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 13:53:55.071650 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 13:53:55.078027 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 13:53:55.081624 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 13:53:55.085066 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 13:53:55.088111 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 13:53:55.091499 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 13:53:55.098463 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 13:53:55.101404 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 13:53:55.108466 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 13:53:55.111299 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 13:53:55.114811 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 13:53:55.118272 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 13:53:55.125154 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 13:53:55.127977 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 13:53:55.131412 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 13:53:55.134817 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 13:53:55.141334 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 13:53:55.144540 call enable_fixed_mtrr()
2033 13:53:55.148438 call enable_fixed_mtrr()
2034 13:53:55.148528 Reading cr50 TPM mode
2035 13:53:55.153013 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 13:53:55.156459 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 13:53:55.162468 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 13:53:55.165991 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 13:53:55.169231 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 13:53:55.172697 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 13:53:55.179311 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 13:53:55.182858 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 13:53:55.185681 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 13:53:55.189212 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 13:53:55.192872 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 13:53:55.199134 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 13:53:55.202561 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 13:53:55.206176 call enable_fixed_mtrr()
2049 13:53:55.209041 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 13:53:55.215398 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 13:53:55.219551 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 13:53:55.222181 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 13:53:55.225807 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 13:53:55.232067 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 13:53:55.235449 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 13:53:55.238694 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 13:53:55.242104 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 13:53:55.246814 CPU physical address size: 39 bits
2059 13:53:55.253667 call enable_fixed_mtrr()
2060 13:53:55.256972 CPU physical address size: 39 bits
2061 13:53:55.260416 CPU physical address size: 39 bits
2062 13:53:55.267065 BS: BS_PAYLOAD_LOAD entry times (exec / console): 109 / 6 ms
2063 13:53:55.270520 CPU physical address size: 39 bits
2064 13:53:55.276752 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 13:53:55.280206 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 13:53:55.283752 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 13:53:55.287034 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 13:53:55.289899 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 13:53:55.296873 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 13:53:55.299807 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 13:53:55.303375 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 13:53:55.306868 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 13:53:55.313124 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 13:53:55.316583 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 13:53:55.320062 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 13:53:55.327075 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 13:53:55.330474 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 13:53:55.333854 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 13:53:55.337347 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 13:53:55.343874 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 13:53:55.347233 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 13:53:55.350622 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 13:53:55.353872 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 13:53:55.360533 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 13:53:55.363926 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 13:53:55.367230 call enable_fixed_mtrr()
2087 13:53:55.370473 call enable_fixed_mtrr()
2088 13:53:55.377275 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2089 13:53:55.380647 CPU physical address size: 39 bits
2090 13:53:55.384649 CPU physical address size: 39 bits
2091 13:53:55.391378 Checking segment from ROM address 0xffc02b38
2092 13:53:55.394837 Checking segment from ROM address 0xffc02b54
2093 13:53:55.401653 Loading segment from ROM address 0xffc02b38
2094 13:53:55.401764 code (compression=0)
2095 13:53:55.411547 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 13:53:55.417725 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 13:53:55.421249 it's not compressed!
2098 13:53:55.561824 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 13:53:55.568149 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 13:53:55.574988 Loading segment from ROM address 0xffc02b54
2101 13:53:55.578329 Entry Point 0x30000000
2102 13:53:55.578417 Loaded segments
2103 13:53:55.584949 BS: BS_PAYLOAD_LOAD run times (exec / console): 248 / 63 ms
2104 13:53:55.630278 Finalizing chipset.
2105 13:53:55.633664 Finalizing SMM.
2106 13:53:55.633756 APMC done.
2107 13:53:55.640536 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2108 13:53:55.643914 mp_park_aps done after 0 msecs.
2109 13:53:55.647546 Jumping to boot code at 0x30000000(0x76b25000)
2110 13:53:55.657079 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 13:53:55.657217
2112 13:53:55.657314
2113 13:53:55.660558
2114 13:53:55.660680 Starting depthcharge on Voema...
2115 13:53:55.661108 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2116 13:53:55.661246 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2117 13:53:55.661366 Setting prompt string to ['volteer:']
2118 13:53:55.661489 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2119 13:53:55.663423
2120 13:53:55.670565 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 13:53:55.670652
2122 13:53:55.676896 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 13:53:55.676986
2124 13:53:55.683446 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 13:53:55.683533
2126 13:53:55.686870 Failed to find eMMC card reader
2127 13:53:55.686951
2128 13:53:55.687015 Wipe memory regions:
2129 13:53:55.690213
2130 13:53:55.693445 [0x00000000001000, 0x000000000a0000)
2131 13:53:55.693552
2132 13:53:55.696790 [0x00000000100000, 0x00000030000000)
2133 13:53:55.730656
2134 13:53:55.734230 [0x00000032662db0, 0x000000769ef000)
2135 13:53:55.782495
2136 13:53:55.785102 [0x00000100000000, 0x00000480400000)
2137 13:53:56.392385
2138 13:53:56.395082 ec_init: CrosEC protocol v3 supported (256, 256)
2139 13:53:56.826614
2140 13:53:56.826754 R8152: Initializing
2141 13:53:56.826822
2142 13:53:56.830014 Version 6 (ocp_data = 5c30)
2143 13:53:56.830122
2144 13:53:56.833312 R8152: Done initializing
2145 13:53:56.833395
2146 13:53:56.836838 Adding net device
2147 13:53:57.139024
2148 13:53:57.142333 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 13:53:57.142444
2150 13:53:57.142560
2151 13:53:57.142670
2152 13:53:57.145318 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 13:53:57.245651 volteer: tftpboot 192.168.201.1 10607051/tftp-deploy-s3sh6lw9/kernel/bzImage 10607051/tftp-deploy-s3sh6lw9/kernel/cmdline 10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
2155 13:53:57.245805 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 13:53:57.245887 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2157 13:53:57.250356 tftpboot 192.168.201.1 10607051/tftp-deploy-s3sh6lw9/kernel/bzImaploy-s3sh6lw9/kernel/cmdline 10607051/tftp-deploy-s3sh6lw9/ramdisk/ramdisk.cpio.gz
2158 13:53:57.250443
2159 13:53:57.250508 Waiting for link
2160 13:53:57.453372
2161 13:53:57.453512 done.
2162 13:53:57.453580
2163 13:53:57.453640 MAC: 00:24:32:30:7e:22
2164 13:53:57.453696
2165 13:53:57.456613 Sending DHCP discover... done.
2166 13:53:57.456699
2167 13:53:57.459626 Waiting for reply... done.
2168 13:53:57.459710
2169 13:53:57.462904 Sending DHCP request... done.
2170 13:53:57.462990
2171 13:53:57.651003 Waiting for reply... done.
2172 13:53:57.651145
2173 13:53:57.651211 My ip is 192.168.201.21
2174 13:53:57.651272
2175 13:53:57.654636 The DHCP server ip is 192.168.201.1
2176 13:53:57.657591
2177 13:53:57.660861 TFTP server IP predefined by user: 192.168.201.1
2178 13:53:57.660945
2179 13:53:57.667117 Bootfile predefined by user: 10607051/tftp-deploy-s3sh6lw9/kernel/bzImage
2180 13:53:57.667231
2181 13:53:57.670424 Sending tftp read request... done.
2182 13:53:57.670507
2183 13:53:57.676871 Waiting for the transfer...
2184 13:53:57.676961
2185 13:53:58.252586 00000000 ################################################################
2186 13:53:58.252759
2187 13:53:58.829446 00080000 ################################################################
2188 13:53:58.829649
2189 13:53:59.386607 00100000 ################################################################
2190 13:53:59.386742
2191 13:53:59.936524 00180000 ################################################################
2192 13:53:59.936665
2193 13:54:00.524959 00200000 ################################################################
2194 13:54:00.525095
2195 13:54:01.076787 00280000 ################################################################
2196 13:54:01.076921
2197 13:54:01.613821 00300000 ################################################################
2198 13:54:01.613961
2199 13:54:02.164246 00380000 ################################################################
2200 13:54:02.164386
2201 13:54:02.706071 00400000 ################################################################
2202 13:54:02.706253
2203 13:54:03.259747 00480000 ################################################################
2204 13:54:03.259883
2205 13:54:03.802272 00500000 ################################################################
2206 13:54:03.802408
2207 13:54:04.331687 00580000 ################################################################
2208 13:54:04.331850
2209 13:54:04.874106 00600000 ################################################################
2210 13:54:04.874277
2211 13:54:05.387149 00680000 ################################################################
2212 13:54:05.387331
2213 13:54:05.897470 00700000 ################################################################
2214 13:54:05.897635
2215 13:54:05.914248 00780000 ## done.
2216 13:54:05.914371
2217 13:54:05.916966 The bootfile was 7880592 bytes long.
2218 13:54:05.917045
2219 13:54:05.920512 Sending tftp read request... done.
2220 13:54:05.920593
2221 13:54:05.923987 Waiting for the transfer...
2222 13:54:05.924096
2223 13:54:06.449309 00000000 ################################################################
2224 13:54:06.449448
2225 13:54:06.975736 00080000 ################################################################
2226 13:54:06.975877
2227 13:54:07.498262 00100000 ################################################################
2228 13:54:07.498400
2229 13:54:08.016975 00180000 ################################################################
2230 13:54:08.017116
2231 13:54:08.560207 00200000 ################################################################
2232 13:54:08.560692
2233 13:54:09.129915 00280000 ################################################################
2234 13:54:09.130153
2235 13:54:09.687641 00300000 ################################################################
2236 13:54:09.687778
2237 13:54:10.225353 00380000 ################################################################
2238 13:54:10.225493
2239 13:54:10.766000 00400000 ################################################################
2240 13:54:10.766134
2241 13:54:11.320722 00480000 ################################################################
2242 13:54:11.320854
2243 13:54:11.912275 00500000 ################################################################
2244 13:54:11.912416
2245 13:54:12.171158 00580000 ############################# done.
2246 13:54:12.171413
2247 13:54:12.174539 Sending tftp read request... done.
2248 13:54:12.174704
2249 13:54:12.178735 Waiting for the transfer...
2250 13:54:12.178898
2251 13:54:12.181371 00000000 # done.
2252 13:54:12.181632
2253 13:54:12.188091 Command line loaded dynamically from TFTP file: 10607051/tftp-deploy-s3sh6lw9/kernel/cmdline
2254 13:54:12.191297
2255 13:54:12.211216 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607051/extract-nfsrootfs-1ee7wqvf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2256 13:54:12.217606
2257 13:54:12.220278 Shutting down all USB controllers.
2258 13:54:12.220702
2259 13:54:12.221034 Removing current net device
2260 13:54:12.221343
2261 13:54:12.222963 Finalizing coreboot
2262 13:54:12.223347
2263 13:54:12.229700 Exiting depthcharge with code 4 at timestamp: 25139518
2264 13:54:12.230438
2265 13:54:12.231068
2266 13:54:12.231781 Starting kernel ...
2267 13:54:12.232318
2268 13:54:12.232866
2269 13:54:12.234580 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2270 13:54:12.235592 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2271 13:54:12.236140 Setting prompt string to ['Linux version [0-9]']
2272 13:54:12.236531 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2273 13:54:12.236907 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2275 13:58:40.235752 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2277 13:58:40.235966 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2279 13:58:40.236139 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 13:58:40.236437 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 13:58:40.236647 Cleaning after the job
2285 13:58:40.236737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/ramdisk
2286 13:58:40.237529 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/kernel
2287 13:58:40.238460 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/nfsrootfs
2288 13:58:40.324961 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607051/tftp-deploy-s3sh6lw9/modules
2289 13:58:40.325376 start: 4.1 power-off (timeout 00:00:30) [common]
2290 13:58:40.325546 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2291 13:58:40.403804 >> Command sent successfully.
2292 13:58:40.406274 Returned 0 in 0 seconds
2293 13:58:40.506674 end: 4.1 power-off (duration 00:00:00) [common]
2295 13:58:40.507101 start: 4.2 read-feedback (timeout 00:10:00) [common]
2296 13:58:40.507496 Listened to connection for namespace 'common' for up to 1s
2297 13:58:41.507420 Finalising connection for namespace 'common'
2298 13:58:41.507598 Disconnecting from shell: Finalise
2299 13:58:41.507683
2300 13:58:41.608028 end: 4.2 read-feedback (duration 00:00:01) [common]
2301 13:58:41.608218 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607051
2302 13:58:42.040707 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607051
2303 13:58:42.040915 JobError: Your job cannot terminate cleanly.