Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:52:58.622819 lava-dispatcher, installed at version: 2023.05.1
2 15:52:58.623053 start: 0 validate
3 15:52:58.623185 Start time: 2023-08-07 15:52:58.623177+00:00 (UTC)
4 15:52:58.623321 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:52:58.623459 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:52:58.891691 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:52:58.891908 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:52:59.157106 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:52:59.157291 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip%2Fv4.4.302-cip72-638-gbfc57fcad0ac%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:52:59.416666 validate duration: 0.79
12 15:52:59.416956 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:52:59.417053 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:52:59.417140 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:52:59.417261 Not decompressing ramdisk as can be used compressed.
16 15:52:59.417346 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:52:59.417410 saving as /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/ramdisk/rootfs.cpio.gz
18 15:52:59.417468 total size: 8418130 (8MB)
19 15:52:59.418633 progress 0% (0MB)
20 15:52:59.421039 progress 5% (0MB)
21 15:52:59.423336 progress 10% (0MB)
22 15:52:59.425704 progress 15% (1MB)
23 15:52:59.428031 progress 20% (1MB)
24 15:52:59.430304 progress 25% (2MB)
25 15:52:59.432673 progress 30% (2MB)
26 15:52:59.434761 progress 35% (2MB)
27 15:52:59.437056 progress 40% (3MB)
28 15:52:59.439345 progress 45% (3MB)
29 15:52:59.441648 progress 50% (4MB)
30 15:52:59.443976 progress 55% (4MB)
31 15:52:59.446250 progress 60% (4MB)
32 15:52:59.448364 progress 65% (5MB)
33 15:52:59.450621 progress 70% (5MB)
34 15:52:59.452884 progress 75% (6MB)
35 15:52:59.455103 progress 80% (6MB)
36 15:52:59.457364 progress 85% (6MB)
37 15:52:59.459640 progress 90% (7MB)
38 15:52:59.461851 progress 95% (7MB)
39 15:52:59.463960 progress 100% (8MB)
40 15:52:59.464189 8MB downloaded in 0.05s (171.84MB/s)
41 15:52:59.464363 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:52:59.464675 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:52:59.464761 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:52:59.464848 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:52:59.464988 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:52:59.465062 saving as /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/kernel/bzImage
48 15:52:59.465122 total size: 7880592 (7MB)
49 15:52:59.465181 No compression specified
50 15:52:59.466307 progress 0% (0MB)
51 15:52:59.468530 progress 5% (0MB)
52 15:52:59.470608 progress 10% (0MB)
53 15:52:59.472697 progress 15% (1MB)
54 15:52:59.474807 progress 20% (1MB)
55 15:52:59.476938 progress 25% (1MB)
56 15:52:59.479007 progress 30% (2MB)
57 15:52:59.481126 progress 35% (2MB)
58 15:52:59.483201 progress 40% (3MB)
59 15:52:59.485288 progress 45% (3MB)
60 15:52:59.487361 progress 50% (3MB)
61 15:52:59.489436 progress 55% (4MB)
62 15:52:59.491528 progress 60% (4MB)
63 15:52:59.493606 progress 65% (4MB)
64 15:52:59.495720 progress 70% (5MB)
65 15:52:59.497780 progress 75% (5MB)
66 15:52:59.499841 progress 80% (6MB)
67 15:52:59.501877 progress 85% (6MB)
68 15:52:59.503914 progress 90% (6MB)
69 15:52:59.505980 progress 95% (7MB)
70 15:52:59.508046 progress 100% (7MB)
71 15:52:59.508213 7MB downloaded in 0.04s (174.42MB/s)
72 15:52:59.508354 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:52:59.508578 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:52:59.508666 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:52:59.508750 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:52:59.508886 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip/v4.4.302-cip72-638-gbfc57fcad0ac/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:52:59.508955 saving as /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/modules/modules.tar
79 15:52:59.509015 total size: 251008 (0MB)
80 15:52:59.509073 Using unxz to decompress xz
81 15:52:59.513436 progress 13% (0MB)
82 15:52:59.513872 progress 26% (0MB)
83 15:52:59.514107 progress 39% (0MB)
84 15:52:59.515684 progress 52% (0MB)
85 15:52:59.517555 progress 65% (0MB)
86 15:52:59.519450 progress 78% (0MB)
87 15:52:59.521410 progress 91% (0MB)
88 15:52:59.523163 progress 100% (0MB)
89 15:52:59.528733 0MB downloaded in 0.02s (12.15MB/s)
90 15:52:59.529021 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:52:59.529294 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:52:59.529391 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 15:52:59.529486 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 15:52:59.529569 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:52:59.529653 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 15:52:59.529877 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi
98 15:52:59.530012 makedir: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin
99 15:52:59.530126 makedir: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/tests
100 15:52:59.530231 makedir: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/results
101 15:52:59.530342 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-add-keys
102 15:52:59.530489 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-add-sources
103 15:52:59.530649 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-background-process-start
104 15:52:59.530787 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-background-process-stop
105 15:52:59.530917 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-common-functions
106 15:52:59.531044 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-echo-ipv4
107 15:52:59.531172 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-install-packages
108 15:52:59.531299 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-installed-packages
109 15:52:59.531466 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-os-build
110 15:52:59.531592 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-probe-channel
111 15:52:59.531719 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-probe-ip
112 15:52:59.531844 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-target-ip
113 15:52:59.531969 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-target-mac
114 15:52:59.532093 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-target-storage
115 15:52:59.532223 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-case
116 15:52:59.532354 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-event
117 15:52:59.532478 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-feedback
118 15:52:59.532604 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-raise
119 15:52:59.532734 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-reference
120 15:52:59.532864 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-runner
121 15:52:59.532990 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-set
122 15:52:59.533118 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-test-shell
123 15:52:59.533246 Updating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-install-packages (oe)
124 15:52:59.533399 Updating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/bin/lava-installed-packages (oe)
125 15:52:59.533523 Creating /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/environment
126 15:52:59.533641 LAVA metadata
127 15:52:59.533717 - LAVA_JOB_ID=11224329
128 15:52:59.533782 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:52:59.533883 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 15:52:59.533948 skipped lava-vland-overlay
131 15:52:59.534020 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:52:59.534099 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 15:52:59.534160 skipped lava-multinode-overlay
134 15:52:59.534230 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:52:59.534309 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 15:52:59.534385 Loading test definitions
137 15:52:59.534475 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 15:52:59.534549 Using /lava-11224329 at stage 0
139 15:52:59.534905 uuid=11224329_1.4.2.3.1 testdef=None
140 15:52:59.534992 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:52:59.535078 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 15:52:59.535660 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:52:59.535881 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 15:52:59.536529 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:52:59.536757 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 15:52:59.537374 runner path: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/0/tests/0_dmesg test_uuid 11224329_1.4.2.3.1
149 15:52:59.537529 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:52:59.537770 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 15:52:59.537842 Using /lava-11224329 at stage 1
153 15:52:59.538163 uuid=11224329_1.4.2.3.5 testdef=None
154 15:52:59.538249 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:52:59.538364 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 15:52:59.538898 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:52:59.539117 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 15:52:59.539881 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:52:59.540106 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 15:52:59.540744 runner path: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/1/tests/1_bootrr test_uuid 11224329_1.4.2.3.5
163 15:52:59.540896 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:52:59.541100 Creating lava-test-runner.conf files
166 15:52:59.541163 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/0 for stage 0
167 15:52:59.541256 - 0_dmesg
168 15:52:59.541334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224329/lava-overlay-tnlmwnmi/lava-11224329/1 for stage 1
169 15:52:59.541424 - 1_bootrr
170 15:52:59.541516 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:52:59.541600 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 15:52:59.550236 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:52:59.550349 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 15:52:59.550437 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:52:59.550520 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:52:59.550602 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 15:52:59.816767 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:52:59.817151 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 15:52:59.817350 extracting modules file /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224329/extract-overlay-ramdisk-mbojdio8/ramdisk
180 15:52:59.830855 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:52:59.830981 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 15:52:59.831071 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224329/compress-overlay-ed0erfoh/overlay-1.4.2.4.tar.gz to ramdisk
183 15:52:59.831144 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224329/compress-overlay-ed0erfoh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224329/extract-overlay-ramdisk-mbojdio8/ramdisk
184 15:52:59.840105 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:52:59.840223 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 15:52:59.840310 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:52:59.840400 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 15:52:59.840479 Building ramdisk /var/lib/lava/dispatcher/tmp/11224329/extract-overlay-ramdisk-mbojdio8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224329/extract-overlay-ramdisk-mbojdio8/ramdisk
189 15:52:59.974595 >> 49790 blocks
190 15:53:00.838501 rename /var/lib/lava/dispatcher/tmp/11224329/extract-overlay-ramdisk-mbojdio8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
191 15:53:00.838955 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:53:00.839102 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 15:53:00.839218 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 15:53:00.839317 No mkimage arch provided, not using FIT.
195 15:53:00.839463 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:53:00.839621 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:53:00.839783 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:53:00.839911 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 15:53:00.839997 No LXC device requested
200 15:53:00.840078 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:53:00.840165 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 15:53:00.840248 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:53:00.840319 Checking files for TFTP limit of 4294967296 bytes.
204 15:53:00.840727 end: 1 tftp-deploy (duration 00:00:01) [common]
205 15:53:00.840834 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:53:00.840921 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:53:00.841040 substitutions:
208 15:53:00.841106 - {DTB}: None
209 15:53:00.841168 - {INITRD}: 11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
210 15:53:00.841227 - {KERNEL}: 11224329/tftp-deploy-hdif4p9e/kernel/bzImage
211 15:53:00.841283 - {LAVA_MAC}: None
212 15:53:00.841337 - {PRESEED_CONFIG}: None
213 15:53:00.841413 - {PRESEED_LOCAL}: None
214 15:53:00.841480 - {RAMDISK}: 11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
215 15:53:00.841533 - {ROOT_PART}: None
216 15:53:00.841585 - {ROOT}: None
217 15:53:00.841638 - {SERVER_IP}: 192.168.201.1
218 15:53:00.841690 - {TEE}: None
219 15:53:00.841743 Parsed boot commands:
220 15:53:00.841795 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:53:00.841965 Parsed boot commands: tftpboot 192.168.201.1 11224329/tftp-deploy-hdif4p9e/kernel/bzImage 11224329/tftp-deploy-hdif4p9e/kernel/cmdline 11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
222 15:53:00.842051 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:53:00.842133 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:53:00.842224 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:53:00.842312 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:53:00.842381 Not connected, no need to disconnect.
227 15:53:00.842452 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:53:00.842530 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:53:00.842593 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-8'
230 15:53:00.846702 Setting prompt string to ['lava-test: # ']
231 15:53:00.847062 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:53:00.847171 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:53:00.847267 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:53:00.847356 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:53:00.847564 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
236 15:53:05.981812 >> Command sent successfully.
237 15:53:05.984337 Returned 0 in 5 seconds
238 15:53:06.084741 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:53:06.085061 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:53:06.085160 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:53:06.085253 Setting prompt string to 'Starting depthcharge on Magolor...'
243 15:53:06.085323 Changing prompt to 'Starting depthcharge on Magolor...'
244 15:53:06.085397 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 15:53:06.085659 [Enter `^Ec?' for help]
246 15:53:07.227148
247 15:53:07.227326
248 15:53:07.237042 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 15:53:07.240221 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 15:53:07.246868 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 15:53:07.249974 CPU: AES supported, TXT NOT supported, VT supported
252 15:53:07.256644 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 15:53:07.260010 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 15:53:07.266921 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 15:53:07.267004 VBOOT: Loading verstage.
256 15:53:07.274270 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 15:53:07.277279 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 15:53:07.283707 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 15:53:07.290500 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 15:53:07.290583
261 15:53:07.290647
262 15:53:07.300547 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 15:53:07.315579 Probing TPM: . done!
264 15:53:07.319331 TPM ready after 0 ms
265 15:53:07.322741 Connected to device vid:did:rid of 1ae0:0028:00
266 15:53:07.333291 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 15:53:07.339678 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 15:53:07.343333 Initialized TPM device CR50 revision 0
269 15:53:07.409663 tlcl_send_startup: Startup return code is 0
270 15:53:07.409782 TPM: setup succeeded
271 15:53:07.428230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 15:53:07.439961 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 15:53:07.450851 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 15:53:07.460550 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 15:53:07.464050 Chrome EC: UHEPI supported
276 15:53:07.467326 Phase 1
277 15:53:07.470857 FMAP: area GBB found @ c05000 (12288 bytes)
278 15:53:07.477367 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 15:53:07.484363 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 15:53:07.487661 Recovery requested (1009000e)
281 15:53:07.496378 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 15:53:07.503210 tlcl_extend: response is 0
283 15:53:07.509866 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 15:53:07.518997 tlcl_extend: response is 0
285 15:53:07.525326 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 15:53:07.529125 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 15:53:07.536176 BS: verstage times (exec / console): total (unknown) / 124 ms
288 15:53:07.536310
289 15:53:07.536422
290 15:53:07.549798 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 15:53:07.553021 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 15:53:07.559950 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 15:53:07.563002 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 15:53:07.566148 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 15:53:07.572630 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 15:53:07.575939 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 15:53:07.579323 TCO_STS: 0000 0001
298 15:53:07.582805 GEN_PMCON: d0015038 00002200
299 15:53:07.586094 GBLRST_CAUSE: 00000000 00000000
300 15:53:07.586208 prev_sleep_state 5
301 15:53:07.589660 Boot Count incremented to 1118
302 15:53:07.595982 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 15:53:07.599429 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 15:53:07.602943 Chrome EC: UHEPI supported
305 15:53:07.609522 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 15:53:07.616704 Probing TPM: done!
307 15:53:07.623131 Connected to device vid:did:rid of 1ae0:0028:00
308 15:53:07.633016 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 15:53:07.645031 Initialized TPM device CR50 revision 0
310 15:53:07.654291 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 15:53:07.657722 MRC: Hash idx 0x100b comparison successful.
312 15:53:07.661185 MRC cache found, size 5458
313 15:53:07.664254 bootmode is set to: 2
314 15:53:07.667557 SPD INDEX = 0
315 15:53:07.671321 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 15:53:07.674783 SPD: module type is LPDDR4X
317 15:53:07.677628 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 15:53:07.684072 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 15:53:07.690936 SPD: device width 16 bits, bus width 32 bits
320 15:53:07.694219 SPD: module size is 4096 MB (per channel)
321 15:53:07.697569 meminit_channels: DRAM half-populated
322 15:53:07.780235 CBMEM:
323 15:53:07.782965 IMD: root @ 0x76fff000 254 entries.
324 15:53:07.786413 IMD: root @ 0x76ffec00 62 entries.
325 15:53:07.789728 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 15:53:07.796711 WARNING: RO_VPD is uninitialized or empty.
327 15:53:07.799576 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 15:53:07.803553 External stage cache:
329 15:53:07.806797 IMD: root @ 0x7b3ff000 254 entries.
330 15:53:07.810025 IMD: root @ 0x7b3fec00 62 entries.
331 15:53:07.819827 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 15:53:07.826579 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 15:53:07.833246 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 15:53:07.841865 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 15:53:07.848480 cse_lite: Skip switching to RW in the recovery path
336 15:53:07.848567 1 DIMMs found
337 15:53:07.848634 SMM Memory Map
338 15:53:07.851282 SMRAM : 0x7b000000 0x800000
339 15:53:07.857847 Subregion 0: 0x7b000000 0x200000
340 15:53:07.861724 Subregion 1: 0x7b200000 0x200000
341 15:53:07.864645 Subregion 2: 0x7b400000 0x400000
342 15:53:07.864728 top_of_ram = 0x77000000
343 15:53:07.871107 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 15:53:07.877698 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 15:53:07.881472 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 15:53:07.887908 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 15:53:07.894425 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 15:53:07.903923 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 15:53:07.907607 Processing 188 relocs. Offset value of 0x74c0e000
350 15:53:07.916845 BS: romstage times (exec / console): total (unknown) / 255 ms
351 15:53:07.921273
352 15:53:07.921357
353 15:53:07.931660 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 15:53:07.938009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 15:53:07.941067 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 15:53:07.947700 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 15:53:08.004018 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 15:53:08.010758 Processing 4805 relocs. Offset value of 0x75da8000
359 15:53:08.017149 BS: postcar times (exec / console): total (unknown) / 42 ms
360 15:53:08.017238
361 15:53:08.017302
362 15:53:08.027126 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 15:53:08.027240 Normal boot
364 15:53:08.031053 EC returned error result code 3
365 15:53:08.034107 FW_CONFIG value is 0x204
366 15:53:08.037429 GENERIC: 0.0 disabled by fw_config
367 15:53:08.044008 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 15:53:08.047407 I2C: 00:10 disabled by fw_config
369 15:53:08.050999 I2C: 00:10 disabled by fw_config
370 15:53:08.054418 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 15:53:08.060962 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 15:53:08.063858 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 15:53:08.070582 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 15:53:08.077374 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 15:53:08.080308 I2C: 00:10 disabled by fw_config
376 15:53:08.083745 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 15:53:08.090463 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 15:53:08.093484 I2C: 00:1a disabled by fw_config
379 15:53:08.097087 I2C: 00:1a disabled by fw_config
380 15:53:08.103390 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 15:53:08.106692 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 15:53:08.110568 GENERIC: 0.0 disabled by fw_config
383 15:53:08.116942 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 15:53:08.120106 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 15:53:08.126508 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 15:53:08.130082 microcode: Update skipped, already up-to-date
387 15:53:08.137039 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 15:53:08.162709 Detected 2 core, 2 thread CPU.
389 15:53:08.166247 Setting up SMI for CPU
390 15:53:08.169766 IED base = 0x7b400000
391 15:53:08.169848 IED size = 0x00400000
392 15:53:08.172812 Will perform SMM setup.
393 15:53:08.176565 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 15:53:08.186446 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 15:53:08.189367 Processing 16 relocs. Offset value of 0x00030000
396 15:53:08.193016 Attempting to start 1 APs
397 15:53:08.196287 Waiting for 10ms after sending INIT.
398 15:53:08.212937 Waiting for 1st SIPI to complete...done.
399 15:53:08.213019 AP: slot 1 apic_id 2.
400 15:53:08.219266 Waiting for 2nd SIPI to complete...done.
401 15:53:08.225716 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 15:53:08.232320 Processing 13 relocs. Offset value of 0x00038000
403 15:53:08.232404 Unable to locate Global NVS
404 15:53:08.242699 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 15:53:08.245811 Installing permanent SMM handler to 0x7b000000
406 15:53:08.255699 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 15:53:08.259191 Processing 704 relocs. Offset value of 0x7b010000
408 15:53:08.268522 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 15:53:08.272150 Processing 13 relocs. Offset value of 0x7b008000
410 15:53:08.278525 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 15:53:08.282147 Unable to locate Global NVS
412 15:53:08.288325 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 15:53:08.291333 Clearing SMI status registers
414 15:53:08.291453 SMI_STS: PM1
415 15:53:08.295046 PM1_STS: PWRBTN
416 15:53:08.298318 TCO_STS: INTRD_DET
417 15:53:08.304862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 15:53:08.307813 In relocation handler: CPU 0
419 15:53:08.311407 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 15:53:08.315053 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 15:53:08.318682 Relocation complete.
422 15:53:08.325652 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 15:53:08.328719 In relocation handler: CPU 1
424 15:53:08.332268 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 15:53:08.338724 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 15:53:08.338806 Relocation complete.
427 15:53:08.342080 Initializing CPU #0
428 15:53:08.345222 CPU: vendor Intel device 906c0
429 15:53:08.348572 CPU: family 06, model 9c, stepping 00
430 15:53:08.351850 Clearing out pending MCEs
431 15:53:08.355803 Setting up local APIC...
432 15:53:08.355884 apic_id: 0x00 done.
433 15:53:08.358593 Turbo is available but hidden
434 15:53:08.362317 Turbo is available and visible
435 15:53:08.364953 microcode: Update skipped, already up-to-date
436 15:53:08.368915 CPU #0 initialized
437 15:53:08.371773 Initializing CPU #1
438 15:53:08.375251 CPU: vendor Intel device 906c0
439 15:53:08.378164 CPU: family 06, model 9c, stepping 00
440 15:53:08.381918 Clearing out pending MCEs
441 15:53:08.381999 Setting up local APIC...
442 15:53:08.384756 apic_id: 0x02 done.
443 15:53:08.388332 microcode: Update skipped, already up-to-date
444 15:53:08.391408 CPU #1 initialized
445 15:53:08.394956 bsp_do_flight_plan done after 173 msecs.
446 15:53:08.398694 CPU: frequency set to 2800 MHz
447 15:53:08.401412 Enabling SMIs.
448 15:53:08.408269 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
449 15:53:08.416865 Probing TPM: done!
450 15:53:08.423988 Connected to device vid:did:rid of 1ae0:0028:00
451 15:53:08.433388 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 15:53:08.436978 Initialized TPM device CR50 revision 0
453 15:53:08.443571 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 15:53:08.446922 Found a VBT of 7680 bytes after decompression
455 15:53:08.456256 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 15:53:08.489091 Detected 2 core, 2 thread CPU.
457 15:53:08.492032 Detected 2 core, 2 thread CPU.
458 15:53:08.854839 Display FSP Version Info HOB
459 15:53:08.857800 Reference Code - CPU = 8.7.22.30
460 15:53:08.861143 uCode Version = 24.0.0.1f
461 15:53:08.864382 TXT ACM version = ff.ff.ff.ffff
462 15:53:08.867776 Reference Code - ME = 8.7.22.30
463 15:53:08.871097 MEBx version = 0.0.0.0
464 15:53:08.874158 ME Firmware Version = Consumer SKU
465 15:53:08.877831 Reference Code - PCH = 8.7.22.30
466 15:53:08.880778 PCH-CRID Status = Disabled
467 15:53:08.884347 PCH-CRID Original Value = ff.ff.ff.ffff
468 15:53:08.887425 PCH-CRID New Value = ff.ff.ff.ffff
469 15:53:08.891344 OPROM - RST - RAID = ff.ff.ff.ffff
470 15:53:08.894377 PCH Hsio Version = 4.0.0.0
471 15:53:08.898752 Reference Code - SA - System Agent = 8.7.22.30
472 15:53:08.901761 Reference Code - MRC = 0.0.4.68
473 15:53:08.905338 SA - PCIe Version = 8.7.22.30
474 15:53:08.908760 SA-CRID Status = Disabled
475 15:53:08.912440 SA-CRID Original Value = 0.0.0.0
476 15:53:08.912521 SA-CRID New Value = 0.0.0.0
477 15:53:08.915560 OPROM - VBIOS = ff.ff.ff.ffff
478 15:53:08.922202 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 15:53:08.925747 PHY Build Version = ff.ff.ff.ffff
480 15:53:08.929292 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 15:53:08.935448 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 15:53:08.939083 ITSS IRQ Polarities Before:
483 15:53:08.939164 IPC0: 0xffffffff
484 15:53:08.942622 IPC1: 0xffffffff
485 15:53:08.942703 IPC2: 0xffffffff
486 15:53:08.945379 IPC3: 0xffffffff
487 15:53:08.948696 ITSS IRQ Polarities After:
488 15:53:08.948777 IPC0: 0xffffffff
489 15:53:08.952604 IPC1: 0xffffffff
490 15:53:08.952684 IPC2: 0xffffffff
491 15:53:08.955386 IPC3: 0xffffffff
492 15:53:08.965406 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 15:53:08.972363 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
494 15:53:08.975255 Enumerating buses...
495 15:53:08.978706 Show all devs... Before device enumeration.
496 15:53:08.982236 Root Device: enabled 1
497 15:53:08.985327 CPU_CLUSTER: 0: enabled 1
498 15:53:08.988386 DOMAIN: 0000: enabled 1
499 15:53:08.988466 PCI: 00:00.0: enabled 1
500 15:53:08.991896 PCI: 00:02.0: enabled 1
501 15:53:08.995076 PCI: 00:04.0: enabled 1
502 15:53:08.995156 PCI: 00:05.0: enabled 1
503 15:53:08.998539 PCI: 00:09.0: enabled 0
504 15:53:09.001960 PCI: 00:12.6: enabled 0
505 15:53:09.005376 PCI: 00:14.0: enabled 1
506 15:53:09.005457 PCI: 00:14.1: enabled 0
507 15:53:09.008325 PCI: 00:14.2: enabled 0
508 15:53:09.011702 PCI: 00:14.3: enabled 1
509 15:53:09.015272 PCI: 00:14.5: enabled 1
510 15:53:09.015385 PCI: 00:15.0: enabled 1
511 15:53:09.018344 PCI: 00:15.1: enabled 1
512 15:53:09.021490 PCI: 00:15.2: enabled 1
513 15:53:09.025085 PCI: 00:15.3: enabled 1
514 15:53:09.025165 PCI: 00:16.0: enabled 1
515 15:53:09.028578 PCI: 00:16.1: enabled 0
516 15:53:09.031619 PCI: 00:16.4: enabled 0
517 15:53:09.035161 PCI: 00:16.5: enabled 0
518 15:53:09.035244 PCI: 00:17.0: enabled 0
519 15:53:09.038203 PCI: 00:19.0: enabled 1
520 15:53:09.041329 PCI: 00:19.1: enabled 0
521 15:53:09.041412 PCI: 00:19.2: enabled 1
522 15:53:09.044886 PCI: 00:1a.0: enabled 1
523 15:53:09.047903 PCI: 00:1c.0: enabled 0
524 15:53:09.051624 PCI: 00:1c.1: enabled 0
525 15:53:09.051706 PCI: 00:1c.2: enabled 0
526 15:53:09.054576 PCI: 00:1c.3: enabled 0
527 15:53:09.058044 PCI: 00:1c.4: enabled 0
528 15:53:09.061426 PCI: 00:1c.5: enabled 0
529 15:53:09.061508 PCI: 00:1c.6: enabled 0
530 15:53:09.064968 PCI: 00:1c.7: enabled 1
531 15:53:09.068065 PCI: 00:1e.0: enabled 0
532 15:53:09.071409 PCI: 00:1e.1: enabled 0
533 15:53:09.071492 PCI: 00:1e.2: enabled 1
534 15:53:09.074587 PCI: 00:1e.3: enabled 0
535 15:53:09.077809 PCI: 00:1f.0: enabled 1
536 15:53:09.077892 PCI: 00:1f.1: enabled 1
537 15:53:09.081461 PCI: 00:1f.2: enabled 1
538 15:53:09.084496 PCI: 00:1f.3: enabled 1
539 15:53:09.087721 PCI: 00:1f.4: enabled 0
540 15:53:09.087804 PCI: 00:1f.5: enabled 1
541 15:53:09.091492 PCI: 00:1f.7: enabled 0
542 15:53:09.094614 GENERIC: 0.0: enabled 1
543 15:53:09.097633 GENERIC: 0.0: enabled 1
544 15:53:09.097716 USB0 port 0: enabled 1
545 15:53:09.101200 GENERIC: 0.0: enabled 1
546 15:53:09.104134 I2C: 00:2c: enabled 1
547 15:53:09.104217 I2C: 00:15: enabled 1
548 15:53:09.107610 GENERIC: 0.0: enabled 0
549 15:53:09.110988 I2C: 00:15: enabled 1
550 15:53:09.114475 I2C: 00:10: enabled 0
551 15:53:09.114558 I2C: 00:10: enabled 0
552 15:53:09.117802 I2C: 00:2c: enabled 1
553 15:53:09.121159 I2C: 00:40: enabled 1
554 15:53:09.121241 I2C: 00:10: enabled 1
555 15:53:09.124177 I2C: 00:39: enabled 1
556 15:53:09.127667 I2C: 00:36: enabled 1
557 15:53:09.127750 I2C: 00:10: enabled 0
558 15:53:09.130636 I2C: 00:0c: enabled 1
559 15:53:09.134145 I2C: 00:50: enabled 1
560 15:53:09.134227 I2C: 00:1a: enabled 1
561 15:53:09.137734 I2C: 00:1a: enabled 0
562 15:53:09.140894 I2C: 00:1a: enabled 0
563 15:53:09.140976 I2C: 00:28: enabled 1
564 15:53:09.144383 I2C: 00:29: enabled 1
565 15:53:09.147367 PCI: 00:00.0: enabled 1
566 15:53:09.147491 SPI: 00: enabled 1
567 15:53:09.150879 PNP: 0c09.0: enabled 1
568 15:53:09.153997 GENERIC: 0.0: enabled 0
569 15:53:09.154080 USB2 port 0: enabled 1
570 15:53:09.157666 USB2 port 1: enabled 1
571 15:53:09.160789 USB2 port 2: enabled 1
572 15:53:09.163685 USB2 port 3: enabled 1
573 15:53:09.163767 USB2 port 4: enabled 0
574 15:53:09.167397 USB2 port 5: enabled 1
575 15:53:09.170652 USB2 port 6: enabled 0
576 15:53:09.170734 USB2 port 7: enabled 1
577 15:53:09.174011 USB3 port 0: enabled 1
578 15:53:09.177015 USB3 port 1: enabled 1
579 15:53:09.180347 USB3 port 2: enabled 1
580 15:53:09.180429 USB3 port 3: enabled 1
581 15:53:09.183800 APIC: 00: enabled 1
582 15:53:09.183882 APIC: 02: enabled 1
583 15:53:09.187302 Compare with tree...
584 15:53:09.190624 Root Device: enabled 1
585 15:53:09.193581 CPU_CLUSTER: 0: enabled 1
586 15:53:09.193664 APIC: 00: enabled 1
587 15:53:09.197053 APIC: 02: enabled 1
588 15:53:09.200556 DOMAIN: 0000: enabled 1
589 15:53:09.203900 PCI: 00:00.0: enabled 1
590 15:53:09.203983 PCI: 00:02.0: enabled 1
591 15:53:09.206985 PCI: 00:04.0: enabled 1
592 15:53:09.210501 GENERIC: 0.0: enabled 1
593 15:53:09.213431 PCI: 00:05.0: enabled 1
594 15:53:09.217211 GENERIC: 0.0: enabled 1
595 15:53:09.217294 PCI: 00:09.0: enabled 0
596 15:53:09.220190 PCI: 00:12.6: enabled 0
597 15:53:09.223885 PCI: 00:14.0: enabled 1
598 15:53:09.226668 USB0 port 0: enabled 1
599 15:53:09.230079 USB2 port 0: enabled 1
600 15:53:09.230161 USB2 port 1: enabled 1
601 15:53:09.233767 USB2 port 2: enabled 1
602 15:53:09.236630 USB2 port 3: enabled 1
603 15:53:09.240292 USB2 port 4: enabled 0
604 15:53:09.243336 USB2 port 5: enabled 1
605 15:53:09.246367 USB2 port 6: enabled 0
606 15:53:09.246450 USB2 port 7: enabled 1
607 15:53:09.250230 USB3 port 0: enabled 1
608 15:53:09.253265 USB3 port 1: enabled 1
609 15:53:09.256796 USB3 port 2: enabled 1
610 15:53:09.259813 USB3 port 3: enabled 1
611 15:53:09.259896 PCI: 00:14.1: enabled 0
612 15:53:09.262843 PCI: 00:14.2: enabled 0
613 15:53:09.266344 PCI: 00:14.3: enabled 1
614 15:53:09.269984 GENERIC: 0.0: enabled 1
615 15:53:09.272941 PCI: 00:14.5: enabled 1
616 15:53:09.273023 PCI: 00:15.0: enabled 1
617 15:53:09.276335 I2C: 00:2c: enabled 1
618 15:53:09.279401 I2C: 00:15: enabled 1
619 15:53:09.283152 PCI: 00:15.1: enabled 1
620 15:53:09.286007 PCI: 00:15.2: enabled 1
621 15:53:09.286089 GENERIC: 0.0: enabled 0
622 15:53:09.289544 I2C: 00:15: enabled 1
623 15:53:09.292711 I2C: 00:10: enabled 0
624 15:53:09.296121 I2C: 00:10: enabled 0
625 15:53:09.296202 I2C: 00:2c: enabled 1
626 15:53:09.299149 I2C: 00:40: enabled 1
627 15:53:09.302655 I2C: 00:10: enabled 1
628 15:53:09.305943 I2C: 00:39: enabled 1
629 15:53:09.309347 PCI: 00:15.3: enabled 1
630 15:53:09.309427 I2C: 00:36: enabled 1
631 15:53:09.312260 I2C: 00:10: enabled 0
632 15:53:09.315760 I2C: 00:0c: enabled 1
633 15:53:09.319237 I2C: 00:50: enabled 1
634 15:53:09.319317 PCI: 00:16.0: enabled 1
635 15:53:09.322321 PCI: 00:16.1: enabled 0
636 15:53:09.325461 PCI: 00:16.4: enabled 0
637 15:53:09.328870 PCI: 00:16.5: enabled 0
638 15:53:09.332167 PCI: 00:17.0: enabled 0
639 15:53:09.332247 PCI: 00:19.0: enabled 1
640 15:53:09.335398 I2C: 00:1a: enabled 1
641 15:53:09.338746 I2C: 00:1a: enabled 0
642 15:53:09.342191 I2C: 00:1a: enabled 0
643 15:53:09.342270 I2C: 00:28: enabled 1
644 15:53:09.345473 I2C: 00:29: enabled 1
645 15:53:09.349099 PCI: 00:19.1: enabled 0
646 15:53:09.352120 PCI: 00:19.2: enabled 1
647 15:53:09.355955 PCI: 00:1a.0: enabled 1
648 15:53:09.356034 PCI: 00:1e.0: enabled 0
649 15:53:09.358813 PCI: 00:1e.1: enabled 0
650 15:53:09.361909 PCI: 00:1e.2: enabled 1
651 15:53:09.365709 SPI: 00: enabled 1
652 15:53:09.365789 PCI: 00:1e.3: enabled 0
653 15:53:09.368600 PCI: 00:1f.0: enabled 1
654 15:53:09.371545 PNP: 0c09.0: enabled 1
655 15:53:09.375131 PCI: 00:1f.1: enabled 1
656 15:53:09.378533 PCI: 00:1f.2: enabled 1
657 15:53:09.381608 PCI: 00:1f.3: enabled 1
658 15:53:09.381687 GENERIC: 0.0: enabled 0
659 15:53:09.385156 PCI: 00:1f.4: enabled 0
660 15:53:09.388039 PCI: 00:1f.5: enabled 1
661 15:53:09.391867 PCI: 00:1f.7: enabled 0
662 15:53:09.391946 Root Device scanning...
663 15:53:09.395267 scan_static_bus for Root Device
664 15:53:09.398374 CPU_CLUSTER: 0 enabled
665 15:53:09.401358 DOMAIN: 0000 enabled
666 15:53:09.404966 DOMAIN: 0000 scanning...
667 15:53:09.407959 PCI: pci_scan_bus for bus 00
668 15:53:09.408040 PCI: 00:00.0 [8086/0000] ops
669 15:53:09.411514 PCI: 00:00.0 [8086/4e22] enabled
670 15:53:09.414606 PCI: 00:02.0 [8086/0000] bus ops
671 15:53:09.418313 PCI: 00:02.0 [8086/4e55] enabled
672 15:53:09.421751 PCI: 00:04.0 [8086/0000] bus ops
673 15:53:09.424768 PCI: 00:04.0 [8086/4e03] enabled
674 15:53:09.428319 PCI: 00:05.0 [8086/0000] bus ops
675 15:53:09.431258 PCI: 00:05.0 [8086/4e19] enabled
676 15:53:09.434497 PCI: 00:08.0 [8086/4e11] enabled
677 15:53:09.437919 PCI: 00:14.0 [8086/0000] bus ops
678 15:53:09.441135 PCI: 00:14.0 [8086/4ded] enabled
679 15:53:09.444817 PCI: 00:14.2 [8086/4def] disabled
680 15:53:09.448122 PCI: 00:14.3 [8086/0000] bus ops
681 15:53:09.451705 PCI: 00:14.3 [8086/4df0] enabled
682 15:53:09.454278 PCI: 00:14.5 [8086/0000] ops
683 15:53:09.457988 PCI: 00:14.5 [8086/4df8] enabled
684 15:53:09.460877 PCI: 00:15.0 [8086/0000] bus ops
685 15:53:09.464410 PCI: 00:15.0 [8086/4de8] enabled
686 15:53:09.468025 PCI: 00:15.1 [8086/0000] bus ops
687 15:53:09.471140 PCI: 00:15.1 [8086/4de9] enabled
688 15:53:09.474566 PCI: 00:15.2 [8086/0000] bus ops
689 15:53:09.477593 PCI: 00:15.2 [8086/4dea] enabled
690 15:53:09.481357 PCI: 00:15.3 [8086/0000] bus ops
691 15:53:09.484112 PCI: 00:15.3 [8086/4deb] enabled
692 15:53:09.487770 PCI: 00:16.0 [8086/0000] ops
693 15:53:09.490820 PCI: 00:16.0 [8086/4de0] enabled
694 15:53:09.494363 PCI: 00:19.0 [8086/0000] bus ops
695 15:53:09.497806 PCI: 00:19.0 [8086/4dc5] enabled
696 15:53:09.500641 PCI: 00:19.2 [8086/0000] ops
697 15:53:09.504209 PCI: 00:19.2 [8086/4dc7] enabled
698 15:53:09.507286 PCI: 00:1a.0 [8086/0000] ops
699 15:53:09.511055 PCI: 00:1a.0 [8086/4dc4] enabled
700 15:53:09.514291 PCI: 00:1e.0 [8086/0000] ops
701 15:53:09.517204 PCI: 00:1e.0 [8086/4da8] disabled
702 15:53:09.520845 PCI: 00:1e.2 [8086/0000] bus ops
703 15:53:09.524414 PCI: 00:1e.2 [8086/4daa] enabled
704 15:53:09.527324 PCI: 00:1f.0 [8086/0000] bus ops
705 15:53:09.530847 PCI: 00:1f.0 [8086/4d87] enabled
706 15:53:09.537446 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 15:53:09.537529 RTC Init
708 15:53:09.540522 Set power on after power failure.
709 15:53:09.543641 Disabling Deep S3
710 15:53:09.543748 Disabling Deep S3
711 15:53:09.547150 Disabling Deep S4
712 15:53:09.547248 Disabling Deep S4
713 15:53:09.550824 Disabling Deep S5
714 15:53:09.550931 Disabling Deep S5
715 15:53:09.553688 PCI: 00:1f.2 [0000/0000] hidden
716 15:53:09.556810 PCI: 00:1f.3 [8086/0000] bus ops
717 15:53:09.560254 PCI: 00:1f.3 [8086/4dc8] enabled
718 15:53:09.563625 PCI: 00:1f.5 [8086/0000] bus ops
719 15:53:09.566801 PCI: 00:1f.5 [8086/4da4] enabled
720 15:53:09.570511 PCI: Leftover static devices:
721 15:53:09.574606 PCI: 00:12.6
722 15:53:09.574687 PCI: 00:09.0
723 15:53:09.574751 PCI: 00:14.1
724 15:53:09.578451 PCI: 00:16.1
725 15:53:09.578532 PCI: 00:16.4
726 15:53:09.578595 PCI: 00:16.5
727 15:53:09.581670 PCI: 00:17.0
728 15:53:09.581750 PCI: 00:19.1
729 15:53:09.584692 PCI: 00:1e.1
730 15:53:09.584773 PCI: 00:1e.3
731 15:53:09.588099 PCI: 00:1f.1
732 15:53:09.588179 PCI: 00:1f.4
733 15:53:09.588242 PCI: 00:1f.7
734 15:53:09.591422 PCI: Check your devicetree.cb.
735 15:53:09.594594 PCI: 00:02.0 scanning...
736 15:53:09.597888 scan_generic_bus for PCI: 00:02.0
737 15:53:09.601184 scan_generic_bus for PCI: 00:02.0 done
738 15:53:09.607957 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 15:53:09.610946 PCI: 00:04.0 scanning...
740 15:53:09.614652 scan_generic_bus for PCI: 00:04.0
741 15:53:09.614733 GENERIC: 0.0 enabled
742 15:53:09.620815 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 15:53:09.627902 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 15:53:09.627983 PCI: 00:05.0 scanning...
745 15:53:09.630847 scan_generic_bus for PCI: 00:05.0
746 15:53:09.634376 GENERIC: 0.0 enabled
747 15:53:09.640917 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 15:53:09.644463 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 15:53:09.647632 PCI: 00:14.0 scanning...
750 15:53:09.650622 scan_static_bus for PCI: 00:14.0
751 15:53:09.654147 USB0 port 0 enabled
752 15:53:09.657709 USB0 port 0 scanning...
753 15:53:09.660722 scan_static_bus for USB0 port 0
754 15:53:09.660804 USB2 port 0 enabled
755 15:53:09.664186 USB2 port 1 enabled
756 15:53:09.664267 USB2 port 2 enabled
757 15:53:09.667304 USB2 port 3 enabled
758 15:53:09.670214 USB2 port 4 disabled
759 15:53:09.670295 USB2 port 5 enabled
760 15:53:09.673611 USB2 port 6 disabled
761 15:53:09.677008 USB2 port 7 enabled
762 15:53:09.677089 USB3 port 0 enabled
763 15:53:09.680343 USB3 port 1 enabled
764 15:53:09.680424 USB3 port 2 enabled
765 15:53:09.683760 USB3 port 3 enabled
766 15:53:09.686664 USB2 port 0 scanning...
767 15:53:09.690219 scan_static_bus for USB2 port 0
768 15:53:09.693221 scan_static_bus for USB2 port 0 done
769 15:53:09.697187 scan_bus: bus USB2 port 0 finished in 6 msecs
770 15:53:09.700551 USB2 port 1 scanning...
771 15:53:09.703339 scan_static_bus for USB2 port 1
772 15:53:09.706527 scan_static_bus for USB2 port 1 done
773 15:53:09.713156 scan_bus: bus USB2 port 1 finished in 6 msecs
774 15:53:09.713239 USB2 port 2 scanning...
775 15:53:09.716634 scan_static_bus for USB2 port 2
776 15:53:09.723298 scan_static_bus for USB2 port 2 done
777 15:53:09.726421 scan_bus: bus USB2 port 2 finished in 6 msecs
778 15:53:09.730031 USB2 port 3 scanning...
779 15:53:09.733019 scan_static_bus for USB2 port 3
780 15:53:09.735903 scan_static_bus for USB2 port 3 done
781 15:53:09.739239 scan_bus: bus USB2 port 3 finished in 6 msecs
782 15:53:09.742846 USB2 port 5 scanning...
783 15:53:09.745984 scan_static_bus for USB2 port 5
784 15:53:09.749671 scan_static_bus for USB2 port 5 done
785 15:53:09.752836 scan_bus: bus USB2 port 5 finished in 6 msecs
786 15:53:09.755745 USB2 port 7 scanning...
787 15:53:09.759394 scan_static_bus for USB2 port 7
788 15:53:09.762777 scan_static_bus for USB2 port 7 done
789 15:53:09.768972 scan_bus: bus USB2 port 7 finished in 6 msecs
790 15:53:09.769053 USB3 port 0 scanning...
791 15:53:09.772498 scan_static_bus for USB3 port 0
792 15:53:09.779139 scan_static_bus for USB3 port 0 done
793 15:53:09.782196 scan_bus: bus USB3 port 0 finished in 6 msecs
794 15:53:09.785707 USB3 port 1 scanning...
795 15:53:09.789124 scan_static_bus for USB3 port 1
796 15:53:09.792443 scan_static_bus for USB3 port 1 done
797 15:53:09.795781 scan_bus: bus USB3 port 1 finished in 6 msecs
798 15:53:09.798825 USB3 port 2 scanning...
799 15:53:09.802446 scan_static_bus for USB3 port 2
800 15:53:09.805269 scan_static_bus for USB3 port 2 done
801 15:53:09.811807 scan_bus: bus USB3 port 2 finished in 6 msecs
802 15:53:09.811889 USB3 port 3 scanning...
803 15:53:09.815214 scan_static_bus for USB3 port 3
804 15:53:09.818651 scan_static_bus for USB3 port 3 done
805 15:53:09.825063 scan_bus: bus USB3 port 3 finished in 6 msecs
806 15:53:09.828683 scan_static_bus for USB0 port 0 done
807 15:53:09.831312 scan_bus: bus USB0 port 0 finished in 172 msecs
808 15:53:09.838439 scan_static_bus for PCI: 00:14.0 done
809 15:53:09.841517 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 15:53:09.844851 PCI: 00:14.3 scanning...
811 15:53:09.848557 scan_static_bus for PCI: 00:14.3
812 15:53:09.848630 GENERIC: 0.0 enabled
813 15:53:09.854696 scan_static_bus for PCI: 00:14.3 done
814 15:53:09.858421 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 15:53:09.861317 PCI: 00:15.0 scanning...
816 15:53:09.864897 scan_static_bus for PCI: 00:15.0
817 15:53:09.864970 I2C: 00:2c enabled
818 15:53:09.867942 I2C: 00:15 enabled
819 15:53:09.871049 scan_static_bus for PCI: 00:15.0 done
820 15:53:09.877738 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
821 15:53:09.877819 PCI: 00:15.1 scanning...
822 15:53:09.881348 scan_static_bus for PCI: 00:15.1
823 15:53:09.888137 scan_static_bus for PCI: 00:15.1 done
824 15:53:09.891204 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 15:53:09.894232 PCI: 00:15.2 scanning...
826 15:53:09.897686 scan_static_bus for PCI: 00:15.2
827 15:53:09.900885 GENERIC: 0.0 disabled
828 15:53:09.900966 I2C: 00:15 enabled
829 15:53:09.904605 I2C: 00:10 disabled
830 15:53:09.904686 I2C: 00:10 disabled
831 15:53:09.907985 I2C: 00:2c enabled
832 15:53:09.910839 I2C: 00:40 enabled
833 15:53:09.910919 I2C: 00:10 enabled
834 15:53:09.914702 I2C: 00:39 enabled
835 15:53:09.917523 scan_static_bus for PCI: 00:15.2 done
836 15:53:09.920877 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 15:53:09.923923 PCI: 00:15.3 scanning...
838 15:53:09.927704 scan_static_bus for PCI: 00:15.3
839 15:53:09.931123 I2C: 00:36 enabled
840 15:53:09.931219 I2C: 00:10 disabled
841 15:53:09.933999 I2C: 00:0c enabled
842 15:53:09.937660 I2C: 00:50 enabled
843 15:53:09.940706 scan_static_bus for PCI: 00:15.3 done
844 15:53:09.944171 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 15:53:09.947146 PCI: 00:19.0 scanning...
846 15:53:09.950678 scan_static_bus for PCI: 00:19.0
847 15:53:09.953754 I2C: 00:1a enabled
848 15:53:09.953830 I2C: 00:1a disabled
849 15:53:09.957522 I2C: 00:1a disabled
850 15:53:09.957594 I2C: 00:28 enabled
851 15:53:09.960748 I2C: 00:29 enabled
852 15:53:09.963650 scan_static_bus for PCI: 00:19.0 done
853 15:53:09.970767 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
854 15:53:09.970850 PCI: 00:1e.2 scanning...
855 15:53:09.973854 scan_generic_bus for PCI: 00:1e.2
856 15:53:09.976812 SPI: 00 enabled
857 15:53:09.983521 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 15:53:09.987066 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 15:53:09.990721 PCI: 00:1f.0 scanning...
860 15:53:09.993804 scan_static_bus for PCI: 00:1f.0
861 15:53:09.996998 PNP: 0c09.0 enabled
862 15:53:09.997078 PNP: 0c09.0 scanning...
863 15:53:10.000346 scan_static_bus for PNP: 0c09.0
864 15:53:10.004069 scan_static_bus for PNP: 0c09.0 done
865 15:53:10.010256 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 15:53:10.013716 scan_static_bus for PCI: 00:1f.0 done
867 15:53:10.016783 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 15:53:10.020082 PCI: 00:1f.3 scanning...
869 15:53:10.023246 scan_static_bus for PCI: 00:1f.3
870 15:53:10.026636 GENERIC: 0.0 disabled
871 15:53:10.030317 scan_static_bus for PCI: 00:1f.3 done
872 15:53:10.033377 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 15:53:10.037017 PCI: 00:1f.5 scanning...
874 15:53:10.040082 scan_generic_bus for PCI: 00:1f.5
875 15:53:10.043095 scan_generic_bus for PCI: 00:1f.5 done
876 15:53:10.049879 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 15:53:10.053048 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
878 15:53:10.059729 scan_static_bus for Root Device done
879 15:53:10.063367 scan_bus: bus Root Device finished in 665 msecs
880 15:53:10.063490 done
881 15:53:10.069460 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1085 ms
882 15:53:10.073245 Chrome EC: UHEPI supported
883 15:53:10.079907 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 15:53:10.086239 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 15:53:10.089858 SPI flash protection: WPSW=1 SRP0=1
886 15:53:10.096476 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
887 15:53:10.102683 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
888 15:53:10.106373 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
889 15:53:10.109353 found VGA at PCI: 00:02.0
890 15:53:10.113038 Setting up VGA for PCI: 00:02.0
891 15:53:10.119310 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 15:53:10.122362 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 15:53:10.125989 Allocating resources...
894 15:53:10.129208 Reading resources...
895 15:53:10.132490 Root Device read_resources bus 0 link: 0
896 15:53:10.135909 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 15:53:10.142369 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 15:53:10.145459 DOMAIN: 0000 read_resources bus 0 link: 0
899 15:53:10.149057 PCI: 00:04.0 read_resources bus 1 link: 0
900 15:53:10.157103 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 15:53:10.159951 PCI: 00:05.0 read_resources bus 2 link: 0
902 15:53:10.218389 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 15:53:10.218483 PCI: 00:14.0 read_resources bus 0 link: 0
904 15:53:10.218732 USB0 port 0 read_resources bus 0 link: 0
905 15:53:10.218801 USB0 port 0 read_resources bus 0 link: 0 done
906 15:53:10.218863 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 15:53:10.218929 PCI: 00:14.3 read_resources bus 0 link: 0
908 15:53:10.218998 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 15:53:10.219056 PCI: 00:15.0 read_resources bus 0 link: 0
910 15:53:10.219131 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 15:53:10.219236 PCI: 00:15.2 read_resources bus 0 link: 0
912 15:53:10.222416 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 15:53:10.222490 PCI: 00:15.3 read_resources bus 0 link: 0
914 15:53:10.225607 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 15:53:10.229243 PCI: 00:19.0 read_resources bus 0 link: 0
916 15:53:10.235973 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 15:53:10.238904 PCI: 00:1e.2 read_resources bus 3 link: 0
918 15:53:10.245653 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 15:53:10.248733 PCI: 00:1f.0 read_resources bus 0 link: 0
920 15:53:10.255663 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 15:53:10.258731 PCI: 00:1f.3 read_resources bus 0 link: 0
922 15:53:10.265459 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 15:53:10.268394 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 15:53:10.275347 Root Device read_resources bus 0 link: 0 done
925 15:53:10.275474 Done reading resources.
926 15:53:10.281731 Show resources in subtree (Root Device)...After reading.
927 15:53:10.284968 Root Device child on link 0 CPU_CLUSTER: 0
928 15:53:10.291812 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 15:53:10.291897 APIC: 00
930 15:53:10.291962 APIC: 02
931 15:53:10.298611 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 15:53:10.308483 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 15:53:10.315172 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 15:53:10.318205 PCI: 00:00.0
935 15:53:10.328152 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 15:53:10.338233 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 15:53:10.347920 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 15:53:10.354369 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 15:53:10.364674 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 15:53:10.374317 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 15:53:10.384308 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 15:53:10.394499 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 15:53:10.404097 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 15:53:10.410738 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 15:53:10.420545 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 15:53:10.430796 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 15:53:10.440530 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 15:53:10.446873 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 15:53:10.456697 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 15:53:10.466703 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 15:53:10.476847 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 15:53:10.486892 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 15:53:10.496432 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 15:53:10.496520 PCI: 00:02.0
955 15:53:10.506583 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 15:53:10.519510 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 15:53:10.526039 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 15:53:10.529812 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 15:53:10.539239 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 15:53:10.542925 GENERIC: 0.0
961 15:53:10.545920 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 15:53:10.555962 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 15:53:10.559612 GENERIC: 0.0
964 15:53:10.559696 PCI: 00:08.0
965 15:53:10.569417 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 15:53:10.575639 PCI: 00:14.0 child on link 0 USB0 port 0
967 15:53:10.585871 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 15:53:10.589110 USB0 port 0 child on link 0 USB2 port 0
969 15:53:10.592360 USB2 port 0
970 15:53:10.592444 USB2 port 1
971 15:53:10.596011 USB2 port 2
972 15:53:10.596095 USB2 port 3
973 15:53:10.599017 USB2 port 4
974 15:53:10.599101 USB2 port 5
975 15:53:10.602390 USB2 port 6
976 15:53:10.602475 USB2 port 7
977 15:53:10.605707 USB3 port 0
978 15:53:10.605792 USB3 port 1
979 15:53:10.609155 USB3 port 2
980 15:53:10.609240 USB3 port 3
981 15:53:10.612167 PCI: 00:14.2
982 15:53:10.615808 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 15:53:10.625459 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 15:53:10.629118 GENERIC: 0.0
985 15:53:10.629202 PCI: 00:14.5
986 15:53:10.638378 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 15:53:10.645166 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 15:53:10.655267 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 15:53:10.655353 I2C: 00:2c
990 15:53:10.658049 I2C: 00:15
991 15:53:10.658135 PCI: 00:15.1
992 15:53:10.668463 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 15:53:10.675155 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 15:53:10.684828 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 15:53:10.684915 GENERIC: 0.0
996 15:53:10.701194 I2C: 00:15
997 15:53:10.701285 I2C: 00:10
998 15:53:10.701373 I2C: 00:10
999 15:53:10.701454 I2C: 00:2c
1000 15:53:10.701533 I2C: 00:40
1001 15:53:10.701611 I2C: 00:10
1002 15:53:10.701687 I2C: 00:39
1003 15:53:10.701949 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 15:53:10.711624 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 15:53:10.711712 I2C: 00:36
1006 15:53:10.714501 I2C: 00:10
1007 15:53:10.714585 I2C: 00:0c
1008 15:53:10.717779 I2C: 00:50
1009 15:53:10.717864 PCI: 00:16.0
1010 15:53:10.728110 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 15:53:10.730991 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 15:53:10.741123 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 15:53:10.744453 I2C: 00:1a
1014 15:53:10.744540 I2C: 00:1a
1015 15:53:10.747839 I2C: 00:1a
1016 15:53:10.747925 I2C: 00:28
1017 15:53:10.750969 I2C: 00:29
1018 15:53:10.751054 PCI: 00:19.2
1019 15:53:10.764584 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 15:53:10.774032 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 15:53:10.774119 PCI: 00:1a.0
1022 15:53:10.783987 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 15:53:10.787740 PCI: 00:1e.0
1024 15:53:10.790724 PCI: 00:1e.2 child on link 0 SPI: 00
1025 15:53:10.800492 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 15:53:10.800577 SPI: 00
1027 15:53:10.804137 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 15:53:10.813711 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 15:53:10.817383 PNP: 0c09.0
1030 15:53:10.824003 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 15:53:10.827007 PCI: 00:1f.2
1032 15:53:10.834371 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 15:53:10.844154 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 15:53:10.847721 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 15:53:10.857419 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 15:53:10.867054 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 15:53:10.870548 GENERIC: 0.0
1038 15:53:10.874062 PCI: 00:1f.5
1039 15:53:10.880584 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 15:53:10.890716 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 15:53:10.897320 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 15:53:10.903367 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 15:53:10.910087 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 15:53:10.916866 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 15:53:10.923636 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 15:53:10.926836 DOMAIN: 0000: Resource ranges:
1047 15:53:10.933308 * Base: 1000, Size: 800, Tag: 100
1048 15:53:10.936838 * Base: 1900, Size: e700, Tag: 100
1049 15:53:10.940298 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 15:53:10.946636 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 15:53:10.952998 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 15:53:10.962870 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 15:53:10.970003 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 15:53:10.976360 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 15:53:10.986497 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 15:53:10.992600 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 15:53:10.999766 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 15:53:11.009525 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 15:53:11.016240 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 15:53:11.022564 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 15:53:11.029477 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 15:53:11.038935 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 15:53:11.045464 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 15:53:11.051989 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 15:53:11.062069 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 15:53:11.068919 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 15:53:11.075344 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 15:53:11.085412 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 15:53:11.091985 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 15:53:11.098776 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 15:53:11.107957 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 15:53:11.114633 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 15:53:11.118154 DOMAIN: 0000: Resource ranges:
1074 15:53:11.121232 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 15:53:11.127762 * Base: d0000000, Size: 2b000000, Tag: 200
1076 15:53:11.131239 * Base: fb001000, Size: 2fff000, Tag: 200
1077 15:53:11.134692 * Base: fe010000, Size: 22000, Tag: 200
1078 15:53:11.141180 * Base: fe033000, Size: a4d000, Tag: 200
1079 15:53:11.144743 * Base: fea88000, Size: 2f8000, Tag: 200
1080 15:53:11.147676 * Base: fed88000, Size: 8000, Tag: 200
1081 15:53:11.151208 * Base: fed93000, Size: d000, Tag: 200
1082 15:53:11.157900 * Base: feda2000, Size: 125e000, Tag: 200
1083 15:53:11.160890 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 15:53:11.167471 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 15:53:11.174077 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 15:53:11.180821 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 15:53:11.187284 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 15:53:11.194015 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 15:53:11.201011 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 15:53:11.207314 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 15:53:11.213957 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 15:53:11.220661 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 15:53:11.226811 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 15:53:11.233743 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 15:53:11.240227 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 15:53:11.246973 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 15:53:11.253535 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 15:53:11.260245 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 15:53:11.266890 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 15:53:11.272927 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 15:53:11.279946 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 15:53:11.286215 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 15:53:11.292925 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 15:53:11.299624 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 15:53:11.309422 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 15:53:11.312571 Root Device assign_resources, bus 0 link: 0
1107 15:53:11.316404 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 15:53:11.326162 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 15:53:11.332888 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 15:53:11.342795 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 15:53:11.349072 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 15:53:11.352513 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 15:53:11.359469 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 15:53:11.365734 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 15:53:11.372171 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 15:53:11.375914 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 15:53:11.385909 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 15:53:11.392116 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 15:53:11.395749 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 15:53:11.401866 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 15:53:11.409407 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 15:53:11.413112 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 15:53:11.419454 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 15:53:11.425926 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 15:53:11.435772 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 15:53:11.439323 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 15:53:11.442753 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 15:53:11.452914 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 15:53:11.459406 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 15:53:11.465898 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 15:53:11.468915 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 15:53:11.478765 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 15:53:11.482368 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 15:53:11.485453 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 15:53:11.495661 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 15:53:11.502131 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 15:53:11.508632 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 15:53:11.511990 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 15:53:11.521926 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 15:53:11.528497 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 15:53:11.535103 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 15:53:11.541757 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 15:53:11.544830 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 15:53:11.551737 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 15:53:11.555110 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 15:53:11.561890 LPC: Trying to open IO window from 800 size 1ff
1147 15:53:11.568006 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 15:53:11.578178 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 15:53:11.581268 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 15:53:11.584339 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 15:53:11.594173 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 15:53:11.597667 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 15:53:11.604393 Root Device assign_resources, bus 0 link: 0
1154 15:53:11.604475 Done setting resources.
1155 15:53:11.610923 Show resources in subtree (Root Device)...After assigning values.
1156 15:53:11.617630 Root Device child on link 0 CPU_CLUSTER: 0
1157 15:53:11.620915 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 15:53:11.621026 APIC: 00
1159 15:53:11.624235 APIC: 02
1160 15:53:11.627642 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 15:53:11.637190 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 15:53:11.647149 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 15:53:11.647258 PCI: 00:00.0
1164 15:53:11.657272 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 15:53:11.666915 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 15:53:11.676722 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 15:53:11.686912 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 15:53:11.693619 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 15:53:11.703114 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 15:53:11.713070 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 15:53:11.722944 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 15:53:11.733235 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 15:53:11.742862 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 15:53:11.749295 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 15:53:11.759650 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 15:53:11.769376 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 15:53:11.779154 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 15:53:11.785860 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 15:53:11.795734 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 15:53:11.805954 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 15:53:11.815182 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 15:53:11.825344 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 15:53:11.825423 PCI: 00:02.0
1184 15:53:11.838502 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 15:53:11.848615 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 15:53:11.858300 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 15:53:11.861678 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 15:53:11.871444 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 15:53:11.875042 GENERIC: 0.0
1190 15:53:11.878346 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 15:53:11.888347 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 15:53:11.891139 GENERIC: 0.0
1193 15:53:11.891218 PCI: 00:08.0
1194 15:53:11.901130 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 15:53:11.907688 PCI: 00:14.0 child on link 0 USB0 port 0
1196 15:53:11.917808 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 15:53:11.921256 USB0 port 0 child on link 0 USB2 port 0
1198 15:53:11.924321 USB2 port 0
1199 15:53:11.924402 USB2 port 1
1200 15:53:11.927351 USB2 port 2
1201 15:53:11.927475 USB2 port 3
1202 15:53:11.930729 USB2 port 4
1203 15:53:11.930837 USB2 port 5
1204 15:53:11.934403 USB2 port 6
1205 15:53:11.934484 USB2 port 7
1206 15:53:11.937355 USB3 port 0
1207 15:53:11.941066 USB3 port 1
1208 15:53:11.941147 USB3 port 2
1209 15:53:11.944437 USB3 port 3
1210 15:53:11.944529 PCI: 00:14.2
1211 15:53:11.947601 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 15:53:11.961033 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 15:53:11.961116 GENERIC: 0.0
1214 15:53:11.964080 PCI: 00:14.5
1215 15:53:11.974099 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 15:53:11.977090 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 15:53:11.987005 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 15:53:11.990292 I2C: 00:2c
1219 15:53:11.990379 I2C: 00:15
1220 15:53:11.993963 PCI: 00:15.1
1221 15:53:12.004089 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 15:53:12.006522 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 15:53:12.016897 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 15:53:12.019914 GENERIC: 0.0
1225 15:53:12.019988 I2C: 00:15
1226 15:53:12.023290 I2C: 00:10
1227 15:53:12.023424 I2C: 00:10
1228 15:53:12.026957 I2C: 00:2c
1229 15:53:12.027026 I2C: 00:40
1230 15:53:12.027086 I2C: 00:10
1231 15:53:12.030171 I2C: 00:39
1232 15:53:12.033468 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 15:53:12.043027 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 15:53:12.046570 I2C: 00:36
1235 15:53:12.046653 I2C: 00:10
1236 15:53:12.049738 I2C: 00:0c
1237 15:53:12.049815 I2C: 00:50
1238 15:53:12.053280 PCI: 00:16.0
1239 15:53:12.063219 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 15:53:12.066346 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 15:53:12.076616 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 15:53:12.079805 I2C: 00:1a
1243 15:53:12.079882 I2C: 00:1a
1244 15:53:12.083069 I2C: 00:1a
1245 15:53:12.083148 I2C: 00:28
1246 15:53:12.086295 I2C: 00:29
1247 15:53:12.086370 PCI: 00:19.2
1248 15:53:12.096436 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 15:53:12.109275 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 15:53:12.109358 PCI: 00:1a.0
1251 15:53:12.119260 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 15:53:12.122710 PCI: 00:1e.0
1253 15:53:12.126141 PCI: 00:1e.2 child on link 0 SPI: 00
1254 15:53:12.135839 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 15:53:12.135922 SPI: 00
1256 15:53:12.142217 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 15:53:12.148952 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 15:53:12.152328 PNP: 0c09.0
1259 15:53:12.159178 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 15:53:12.162643 PCI: 00:1f.2
1261 15:53:12.172151 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 15:53:12.182179 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 15:53:12.185701 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 15:53:12.195044 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 15:53:12.204931 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 15:53:12.208338 GENERIC: 0.0
1267 15:53:12.208419 PCI: 00:1f.5
1268 15:53:12.218196 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 15:53:12.221577 Done allocating resources.
1270 15:53:12.228237 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2095 ms
1271 15:53:12.231770 Enabling resources...
1272 15:53:12.234715 PCI: 00:00.0 subsystem <- 8086/4e22
1273 15:53:12.238448 PCI: 00:00.0 cmd <- 06
1274 15:53:12.241263 PCI: 00:02.0 subsystem <- 8086/4e55
1275 15:53:12.244738 PCI: 00:02.0 cmd <- 03
1276 15:53:12.247727 PCI: 00:04.0 subsystem <- 8086/4e03
1277 15:53:12.251488 PCI: 00:04.0 cmd <- 02
1278 15:53:12.254483 PCI: 00:05.0 bridge ctrl <- 0003
1279 15:53:12.257858 PCI: 00:05.0 subsystem <- 8086/4e19
1280 15:53:12.257938 PCI: 00:05.0 cmd <- 02
1281 15:53:12.261402 PCI: 00:08.0 cmd <- 06
1282 15:53:12.264455 PCI: 00:14.0 subsystem <- 8086/4ded
1283 15:53:12.267579 PCI: 00:14.0 cmd <- 02
1284 15:53:12.271107 PCI: 00:14.3 subsystem <- 8086/4df0
1285 15:53:12.274195 PCI: 00:14.3 cmd <- 02
1286 15:53:12.277835 PCI: 00:14.5 subsystem <- 8086/4df8
1287 15:53:12.281215 PCI: 00:14.5 cmd <- 06
1288 15:53:12.284019 PCI: 00:15.0 subsystem <- 8086/4de8
1289 15:53:12.287547 PCI: 00:15.0 cmd <- 02
1290 15:53:12.290953 PCI: 00:15.1 subsystem <- 8086/4de9
1291 15:53:12.291040 PCI: 00:15.1 cmd <- 02
1292 15:53:12.297582 PCI: 00:15.2 subsystem <- 8086/4dea
1293 15:53:12.297663 PCI: 00:15.2 cmd <- 02
1294 15:53:12.300656 PCI: 00:15.3 subsystem <- 8086/4deb
1295 15:53:12.304311 PCI: 00:15.3 cmd <- 02
1296 15:53:12.307600 PCI: 00:16.0 subsystem <- 8086/4de0
1297 15:53:12.310815 PCI: 00:16.0 cmd <- 02
1298 15:53:12.314405 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 15:53:12.317630 PCI: 00:19.0 cmd <- 02
1300 15:53:12.320765 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 15:53:12.323711 PCI: 00:19.2 cmd <- 06
1302 15:53:12.327187 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 15:53:12.330809 PCI: 00:1a.0 cmd <- 06
1304 15:53:12.333854 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 15:53:12.333961 PCI: 00:1e.2 cmd <- 06
1306 15:53:12.340552 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 15:53:12.340660 PCI: 00:1f.0 cmd <- 407
1308 15:53:12.343721 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 15:53:12.347088 PCI: 00:1f.3 cmd <- 02
1310 15:53:12.350542 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 15:53:12.353751 PCI: 00:1f.5 cmd <- 406
1312 15:53:12.357799 done.
1313 15:53:12.361326 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 15:53:12.364436 Initializing devices...
1315 15:53:12.367593 Root Device init
1316 15:53:12.367673 mainboard: EC init
1317 15:53:12.374261 Chrome EC: Set SMI mask to 0x0000000000000000
1318 15:53:12.380980 Chrome EC: clear events_b mask to 0x0000000000000000
1319 15:53:12.384574 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 15:53:12.391393 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 15:53:12.398131 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 15:53:12.401124 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 15:53:12.408910 Root Device init finished in 37 msecs
1324 15:53:12.412577 PCI: 00:00.0 init
1325 15:53:12.412665 CPU TDP = 6 Watts
1326 15:53:12.415496 CPU PL1 = 7 Watts
1327 15:53:12.419024 CPU PL2 = 12 Watts
1328 15:53:12.422303 PCI: 00:00.0 init finished in 6 msecs
1329 15:53:12.422381 PCI: 00:02.0 init
1330 15:53:12.425672 GMA: Found VBT in CBFS
1331 15:53:12.428812 GMA: Found valid VBT in CBFS
1332 15:53:12.435261 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 15:53:12.441791 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 15:53:12.445371 PCI: 00:02.0 init finished in 18 msecs
1335 15:53:12.448464 PCI: 00:08.0 init
1336 15:53:12.451963 PCI: 00:08.0 init finished in 0 msecs
1337 15:53:12.455010 PCI: 00:14.0 init
1338 15:53:12.458699 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 15:53:12.461819 PCI: 00:14.0 init finished in 4 msecs
1340 15:53:12.465199 PCI: 00:15.0 init
1341 15:53:12.468261 I2C bus 0 version 0x3230302a
1342 15:53:12.471971 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 15:53:12.475105 PCI: 00:15.0 init finished in 6 msecs
1344 15:53:12.478651 PCI: 00:15.1 init
1345 15:53:12.481743 I2C bus 1 version 0x3230302a
1346 15:53:12.485366 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 15:53:12.488391 PCI: 00:15.1 init finished in 6 msecs
1348 15:53:12.491808 PCI: 00:15.2 init
1349 15:53:12.491888 I2C bus 2 version 0x3230302a
1350 15:53:12.498619 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 15:53:12.501764 PCI: 00:15.2 init finished in 6 msecs
1352 15:53:12.501846 PCI: 00:15.3 init
1353 15:53:12.505059 I2C bus 3 version 0x3230302a
1354 15:53:12.508399 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 15:53:12.515166 PCI: 00:15.3 init finished in 6 msecs
1356 15:53:12.515272 PCI: 00:16.0 init
1357 15:53:12.518146 PCI: 00:16.0 init finished in 0 msecs
1358 15:53:12.521813 PCI: 00:19.0 init
1359 15:53:12.524632 I2C bus 4 version 0x3230302a
1360 15:53:12.528265 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 15:53:12.531284 PCI: 00:19.0 init finished in 6 msecs
1362 15:53:12.534744 PCI: 00:1a.0 init
1363 15:53:12.538376 PCI: 00:1a.0 init finished in 0 msecs
1364 15:53:12.541095 PCI: 00:1f.0 init
1365 15:53:12.544535 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 15:53:12.547807 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 15:53:12.551342 IOAPIC: ID = 0x02
1368 15:53:12.554464 IOAPIC: Dumping registers
1369 15:53:12.557832 reg 0x0000: 0x02000000
1370 15:53:12.557949 reg 0x0001: 0x00770020
1371 15:53:12.560898 reg 0x0002: 0x00000000
1372 15:53:12.564553 PCI: 00:1f.0 init finished in 21 msecs
1373 15:53:12.567541 PCI: 00:1f.2 init
1374 15:53:12.571522 Disabling ACPI via APMC.
1375 15:53:12.574539 APMC done.
1376 15:53:12.577768 PCI: 00:1f.2 init finished in 5 msecs
1377 15:53:12.588632 PNP: 0c09.0 init
1378 15:53:12.591640 Google Chrome EC uptime: 6.563 seconds
1379 15:53:12.597976 Google Chrome AP resets since EC boot: 0
1380 15:53:12.601820 Google Chrome most recent AP reset causes:
1381 15:53:12.608321 Google Chrome EC reset flags at last EC boot: reset-pin
1382 15:53:12.611153 PNP: 0c09.0 init finished in 18 msecs
1383 15:53:12.611259 Devices initialized
1384 15:53:12.614403 Show all devs... After init.
1385 15:53:12.617801 Root Device: enabled 1
1386 15:53:12.621477 CPU_CLUSTER: 0: enabled 1
1387 15:53:12.624656 DOMAIN: 0000: enabled 1
1388 15:53:12.624736 PCI: 00:00.0: enabled 1
1389 15:53:12.627917 PCI: 00:02.0: enabled 1
1390 15:53:12.631342 PCI: 00:04.0: enabled 1
1391 15:53:12.631436 PCI: 00:05.0: enabled 1
1392 15:53:12.634386 PCI: 00:09.0: enabled 0
1393 15:53:12.637986 PCI: 00:12.6: enabled 0
1394 15:53:12.641024 PCI: 00:14.0: enabled 1
1395 15:53:12.641105 PCI: 00:14.1: enabled 0
1396 15:53:12.644262 PCI: 00:14.2: enabled 0
1397 15:53:12.647861 PCI: 00:14.3: enabled 1
1398 15:53:12.651245 PCI: 00:14.5: enabled 1
1399 15:53:12.651351 PCI: 00:15.0: enabled 1
1400 15:53:12.654584 PCI: 00:15.1: enabled 1
1401 15:53:12.658042 PCI: 00:15.2: enabled 1
1402 15:53:12.661097 PCI: 00:15.3: enabled 1
1403 15:53:12.661178 PCI: 00:16.0: enabled 1
1404 15:53:12.664303 PCI: 00:16.1: enabled 0
1405 15:53:12.667760 PCI: 00:16.4: enabled 0
1406 15:53:12.667840 PCI: 00:16.5: enabled 0
1407 15:53:12.671076 PCI: 00:17.0: enabled 0
1408 15:53:12.674371 PCI: 00:19.0: enabled 1
1409 15:53:12.678300 PCI: 00:19.1: enabled 0
1410 15:53:12.678380 PCI: 00:19.2: enabled 1
1411 15:53:12.680868 PCI: 00:1a.0: enabled 1
1412 15:53:12.684100 PCI: 00:1c.0: enabled 0
1413 15:53:12.687244 PCI: 00:1c.1: enabled 0
1414 15:53:12.687350 PCI: 00:1c.2: enabled 0
1415 15:53:12.690920 PCI: 00:1c.3: enabled 0
1416 15:53:12.694097 PCI: 00:1c.4: enabled 0
1417 15:53:12.697656 PCI: 00:1c.5: enabled 0
1418 15:53:12.697736 PCI: 00:1c.6: enabled 0
1419 15:53:12.700398 PCI: 00:1c.7: enabled 1
1420 15:53:12.704044 PCI: 00:1e.0: enabled 0
1421 15:53:12.707146 PCI: 00:1e.1: enabled 0
1422 15:53:12.707226 PCI: 00:1e.2: enabled 1
1423 15:53:12.710762 PCI: 00:1e.3: enabled 0
1424 15:53:12.713794 PCI: 00:1f.0: enabled 1
1425 15:53:12.716836 PCI: 00:1f.1: enabled 0
1426 15:53:12.716916 PCI: 00:1f.2: enabled 1
1427 15:53:12.720279 PCI: 00:1f.3: enabled 1
1428 15:53:12.723872 PCI: 00:1f.4: enabled 0
1429 15:53:12.723953 PCI: 00:1f.5: enabled 1
1430 15:53:12.727016 PCI: 00:1f.7: enabled 0
1431 15:53:12.730029 GENERIC: 0.0: enabled 1
1432 15:53:12.733640 GENERIC: 0.0: enabled 1
1433 15:53:12.733719 USB0 port 0: enabled 1
1434 15:53:12.737251 GENERIC: 0.0: enabled 1
1435 15:53:12.740288 I2C: 00:2c: enabled 1
1436 15:53:12.740367 I2C: 00:15: enabled 1
1437 15:53:12.743957 GENERIC: 0.0: enabled 0
1438 15:53:12.746999 I2C: 00:15: enabled 1
1439 15:53:12.750040 I2C: 00:10: enabled 0
1440 15:53:12.750121 I2C: 00:10: enabled 0
1441 15:53:12.753742 I2C: 00:2c: enabled 1
1442 15:53:12.756838 I2C: 00:40: enabled 1
1443 15:53:12.756917 I2C: 00:10: enabled 1
1444 15:53:12.760470 I2C: 00:39: enabled 1
1445 15:53:12.763201 I2C: 00:36: enabled 1
1446 15:53:12.763311 I2C: 00:10: enabled 0
1447 15:53:12.766753 I2C: 00:0c: enabled 1
1448 15:53:12.770150 I2C: 00:50: enabled 1
1449 15:53:12.770230 I2C: 00:1a: enabled 1
1450 15:53:12.773254 I2C: 00:1a: enabled 0
1451 15:53:12.776599 I2C: 00:1a: enabled 0
1452 15:53:12.776679 I2C: 00:28: enabled 1
1453 15:53:12.779957 I2C: 00:29: enabled 1
1454 15:53:12.783618 PCI: 00:00.0: enabled 1
1455 15:53:12.783701 SPI: 00: enabled 1
1456 15:53:12.786608 PNP: 0c09.0: enabled 1
1457 15:53:12.790031 GENERIC: 0.0: enabled 0
1458 15:53:12.790111 USB2 port 0: enabled 1
1459 15:53:12.793593 USB2 port 1: enabled 1
1460 15:53:12.796315 USB2 port 2: enabled 1
1461 15:53:12.799933 USB2 port 3: enabled 1
1462 15:53:12.800047 USB2 port 4: enabled 0
1463 15:53:12.803252 USB2 port 5: enabled 1
1464 15:53:12.806801 USB2 port 6: enabled 0
1465 15:53:12.806882 USB2 port 7: enabled 1
1466 15:53:12.809858 USB3 port 0: enabled 1
1467 15:53:12.812902 USB3 port 1: enabled 1
1468 15:53:12.816500 USB3 port 2: enabled 1
1469 15:53:12.816581 USB3 port 3: enabled 1
1470 15:53:12.819574 APIC: 00: enabled 1
1471 15:53:12.819654 APIC: 02: enabled 1
1472 15:53:12.823171 PCI: 00:08.0: enabled 1
1473 15:53:12.829599 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1474 15:53:12.833038 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 15:53:12.835949 ELOG: NV offset 0xbfa000 size 0x1000
1476 15:53:12.844339 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 15:53:12.850980 ELOG: Event(17) added with size 13 at 2023-08-07 15:53:13 UTC
1478 15:53:12.857579 ELOG: Event(92) added with size 9 at 2023-08-07 15:53:13 UTC
1479 15:53:12.864342 ELOG: Event(93) added with size 9 at 2023-08-07 15:53:13 UTC
1480 15:53:12.871110 ELOG: Event(9E) added with size 10 at 2023-08-07 15:53:13 UTC
1481 15:53:12.877234 ELOG: Event(9F) added with size 14 at 2023-08-07 15:53:13 UTC
1482 15:53:12.883874 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 15:53:12.890544 ELOG: Event(A1) added with size 10 at 2023-08-07 15:53:13 UTC
1484 15:53:12.897236 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 15:53:12.903763 ELOG: Event(A0) added with size 9 at 2023-08-07 15:53:13 UTC
1486 15:53:12.907070 elog_add_boot_reason: Logged dev mode boot
1487 15:53:12.913799 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 15:53:12.913887 Finalize devices...
1489 15:53:12.916869 Devices finalized
1490 15:53:12.923947 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 15:53:12.926882 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 15:53:12.933414 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 15:53:12.936902 ME: HFSTS1 : 0x80030045
1494 15:53:12.940231 ME: HFSTS2 : 0x30280136
1495 15:53:12.946486 ME: HFSTS3 : 0x00000050
1496 15:53:12.950207 ME: HFSTS4 : 0x00004000
1497 15:53:12.953756 ME: HFSTS5 : 0x00000000
1498 15:53:12.956729 ME: HFSTS6 : 0x40400006
1499 15:53:12.959730 ME: Manufacturing Mode : NO
1500 15:53:12.963352 ME: FW Partition Table : OK
1501 15:53:12.966484 ME: Bringup Loader Failure : NO
1502 15:53:12.970115 ME: Firmware Init Complete : NO
1503 15:53:12.973071 ME: Boot Options Present : NO
1504 15:53:12.976438 ME: Update In Progress : NO
1505 15:53:12.979389 ME: D0i3 Support : YES
1506 15:53:12.982930 ME: Low Power State Enabled : NO
1507 15:53:12.986464 ME: CPU Replaced : YES
1508 15:53:12.989640 ME: CPU Replacement Valid : YES
1509 15:53:12.993102 ME: Current Working State : 5
1510 15:53:12.996394 ME: Current Operation State : 1
1511 15:53:12.999797 ME: Current Operation Mode : 3
1512 15:53:13.002741 ME: Error Code : 0
1513 15:53:13.006410 ME: CPU Debug Disabled : YES
1514 15:53:13.009316 ME: TXT Support : NO
1515 15:53:13.015906 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 15:53:13.022691 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 15:53:13.025811 ACPI: Writing ACPI tables at 76b27000.
1518 15:53:13.029005 ACPI: * FACS
1519 15:53:13.029085 ACPI: * DSDT
1520 15:53:13.032257 Ramoops buffer: 0x100000@0x76a26000.
1521 15:53:13.038911 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 15:53:13.042447 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 15:53:13.045999 Google Chrome EC: version:
1524 15:53:13.049193 ro: magolor_1.1.9999-103b6f9
1525 15:53:13.052391 rw: magolor_1.1.9999-103b6f9
1526 15:53:13.055740 running image: 1
1527 15:53:13.062210 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 15:53:13.065346 ACPI: * FADT
1529 15:53:13.065427 SCI is IRQ9
1530 15:53:13.068957 ACPI: added table 1/32, length now 40
1531 15:53:13.071923 ACPI: * SSDT
1532 15:53:13.075626 Found 1 CPU(s) with 2 core(s) each.
1533 15:53:13.078464 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 15:53:13.085489 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 15:53:13.088944 Could not locate 'wifi_sar' in VPD.
1536 15:53:13.092069 Checking CBFS for default SAR values
1537 15:53:13.098645 wifi_sar_defaults.hex has bad len in CBFS
1538 15:53:13.102102 failed from getting SAR limits!
1539 15:53:13.105456 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 15:53:13.108310 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 15:53:13.114829 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 15:53:13.118488 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 15:53:13.125428 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 15:53:13.128414 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 15:53:13.134740 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 15:53:13.141761 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 15:53:13.148112 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 15:53:13.151251 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 15:53:13.158209 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 15:53:13.164762 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 15:53:13.168242 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 15:53:13.174463 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 15:53:13.178123 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 15:53:13.185295 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 15:53:13.188721 PS2K: Passing 101 keymaps to kernel
1556 15:53:13.194944 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 15:53:13.201593 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 15:53:13.204753 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 15:53:13.211360 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 15:53:13.218216 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 15:53:13.221369 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 15:53:13.228150 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 15:53:13.234841 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 15:53:13.238191 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 15:53:13.244876 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 15:53:13.247871 ACPI: added table 2/32, length now 44
1567 15:53:13.251495 ACPI: * MCFG
1568 15:53:13.254762 ACPI: added table 3/32, length now 48
1569 15:53:13.254848 ACPI: * TPM2
1570 15:53:13.258041 TPM2 log created at 0x76a16000
1571 15:53:13.261128 ACPI: added table 4/32, length now 52
1572 15:53:13.264391 ACPI: * MADT
1573 15:53:13.264471 SCI is IRQ9
1574 15:53:13.268117 ACPI: added table 5/32, length now 56
1575 15:53:13.271206 current = 76b2d580
1576 15:53:13.274544 ACPI: * DMAR
1577 15:53:13.278006 ACPI: added table 6/32, length now 60
1578 15:53:13.281058 ACPI: added table 7/32, length now 64
1579 15:53:13.281138 ACPI: * HPET
1580 15:53:13.284683 ACPI: added table 8/32, length now 68
1581 15:53:13.287724 ACPI: done.
1582 15:53:13.291362 ACPI tables: 26304 bytes.
1583 15:53:13.294993 smbios_write_tables: 76a15000
1584 15:53:13.297803 EC returned error result code 3
1585 15:53:13.301580 Couldn't obtain OEM name from CBI
1586 15:53:13.304478 Create SMBIOS type 16
1587 15:53:13.304558 Create SMBIOS type 17
1588 15:53:13.308112 GENERIC: 0.0 (WIFI Device)
1589 15:53:13.311119 SMBIOS tables: 913 bytes.
1590 15:53:13.314558 Writing table forward entry at 0x00000500
1591 15:53:13.321041 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 15:53:13.324408 Writing coreboot table at 0x76b4b000
1593 15:53:13.331156 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 15:53:13.334163 1. 0000000000001000-000000000009ffff: RAM
1595 15:53:13.340788 2. 00000000000a0000-00000000000fffff: RESERVED
1596 15:53:13.344268 3. 0000000000100000-0000000076a14fff: RAM
1597 15:53:13.350765 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 15:53:13.353806 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 15:53:13.360476 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 15:53:13.367602 7. 0000000077000000-000000007fbfffff: RESERVED
1601 15:53:13.371280 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 15:53:13.377452 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 15:53:13.380414 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 15:53:13.383532 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 15:53:13.390253 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 15:53:13.393856 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 15:53:13.400153 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 15:53:13.403624 15. 0000000100000000-00000001803fffff: RAM
1609 15:53:13.407077 Passing 4 GPIOs to payload:
1610 15:53:13.413524 NAME | PORT | POLARITY | VALUE
1611 15:53:13.416508 lid | undefined | high | high
1612 15:53:13.423680 power | undefined | high | low
1613 15:53:13.426939 oprom | undefined | high | low
1614 15:53:13.433675 EC in RW | 0x000000b9 | high | low
1615 15:53:13.439842 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 80bd
1616 15:53:13.443354 coreboot table: 1504 bytes.
1617 15:53:13.446387 IMD ROOT 0. 0x76fff000 0x00001000
1618 15:53:13.450026 IMD SMALL 1. 0x76ffe000 0x00001000
1619 15:53:13.453071 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 15:53:13.456563 CONSOLE 3. 0x76c2e000 0x00020000
1621 15:53:13.459550 FMAP 4. 0x76c2d000 0x00000578
1622 15:53:13.463223 TIME STAMP 5. 0x76c2c000 0x00000910
1623 15:53:13.466322 VBOOT WORK 6. 0x76c18000 0x00014000
1624 15:53:13.472839 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 15:53:13.476443 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 15:53:13.479487 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 15:53:13.483125 REFCODE 10. 0x76b67000 0x00040000
1628 15:53:13.486315 SMM BACKUP 11. 0x76b57000 0x00010000
1629 15:53:13.489551 4f444749 12. 0x76b55000 0x00002000
1630 15:53:13.492793 EXT VBT13. 0x76b53000 0x00001c43
1631 15:53:13.496009 COREBOOT 14. 0x76b4b000 0x00008000
1632 15:53:13.499805 ACPI 15. 0x76b27000 0x00024000
1633 15:53:13.506262 ACPI GNVS 16. 0x76b26000 0x00001000
1634 15:53:13.509842 RAMOOPS 17. 0x76a26000 0x00100000
1635 15:53:13.512720 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 15:53:13.516207 SMBIOS 19. 0x76a15000 0x00000800
1637 15:53:13.516287 IMD small region:
1638 15:53:13.522645 IMD ROOT 0. 0x76ffec00 0x00000400
1639 15:53:13.526344 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 15:53:13.529347 VPD 2. 0x76ffeb60 0x0000006c
1641 15:53:13.533009 POWER STATE 3. 0x76ffeb20 0x00000040
1642 15:53:13.535792 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 15:53:13.542481 MEM INFO 5. 0x76ffe920 0x000001e0
1644 15:53:13.546124 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1645 15:53:13.549140 MTRR: Physical address space:
1646 15:53:13.555825 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 15:53:13.562195 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 15:53:13.568892 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 15:53:13.575774 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 15:53:13.582385 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 15:53:13.589108 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 15:53:13.592113 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 15:53:13.598720 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 15:53:13.602089 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 15:53:13.605395 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 15:53:13.608851 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 15:53:13.615315 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 15:53:13.618720 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 15:53:13.621937 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 15:53:13.625174 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 15:53:13.632046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 15:53:13.635221 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 15:53:13.638885 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 15:53:13.641538 call enable_fixed_mtrr()
1665 15:53:13.645239 CPU physical address size: 39 bits
1666 15:53:13.648281 MTRR: default type WB/UC MTRR counts: 6/5.
1667 15:53:13.651951 MTRR: UC selected as default type.
1668 15:53:13.658241 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 15:53:13.664898 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 15:53:13.671556 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 15:53:13.677943 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 15:53:13.684895 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 15:53:13.685006
1674 15:53:13.685100 MTRR check
1675 15:53:13.688321 Fixed MTRRs : Enabled
1676 15:53:13.691396 Variable MTRRs: Enabled
1677 15:53:13.691520
1678 15:53:13.694435 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 15:53:13.698142 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 15:53:13.704917 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 15:53:13.707890 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 15:53:13.710991 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 15:53:13.714559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 15:53:13.717919 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 15:53:13.724110 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 15:53:13.727627 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 15:53:13.731020 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 15:53:13.734267 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 15:53:13.740794 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 15:53:13.744162 call enable_fixed_mtrr()
1691 15:53:13.747964 Checking cr50 for pending updates
1692 15:53:13.751334 CPU physical address size: 39 bits
1693 15:53:13.755000 Reading cr50 TPM mode
1694 15:53:13.764394 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 15:53:13.772293 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 15:53:13.775236 Checking segment from ROM address 0xfff9d5b8
1697 15:53:13.781601 Checking segment from ROM address 0xfff9d5d4
1698 15:53:13.785266 Loading segment from ROM address 0xfff9d5b8
1699 15:53:13.788950 code (compression=0)
1700 15:53:13.794900 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 15:53:13.805198 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 15:53:13.808220 it's not compressed!
1703 15:53:13.934010 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 15:53:13.940388 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 15:53:13.948283 Loading segment from ROM address 0xfff9d5d4
1706 15:53:13.951240 Entry Point 0x30000000
1707 15:53:13.951345 Loaded segments
1708 15:53:13.957960 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 15:53:13.974145 Finalizing chipset.
1710 15:53:13.977282 Finalizing SMM.
1711 15:53:13.977359 APMC done.
1712 15:53:13.984048 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 15:53:13.987031 mp_park_aps done after 0 msecs.
1714 15:53:13.990649 Jumping to boot code at 0x30000000(0x76b4b000)
1715 15:53:14.000326 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 15:53:14.000434
1717 15:53:14.000514
1718 15:53:14.000573
1719 15:53:14.003530 Starting depthcharge on Magolor...
1720 15:53:14.003879 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 15:53:14.003978 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 15:53:14.004065 Setting prompt string to ['dedede:']
1723 15:53:14.004148 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 15:53:14.007007
1725 15:53:14.013858 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 15:53:14.013952
1727 15:53:14.020558 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 15:53:14.020671
1729 15:53:14.023875 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 15:53:14.026692
1731 15:53:14.026774 Wipe memory regions:
1732 15:53:14.026838
1733 15:53:14.029837 [0x00000000001000, 0x000000000a0000)
1734 15:53:14.029918
1735 15:53:14.033405 [0x00000000100000, 0x00000030000000)
1736 15:53:14.162380
1737 15:53:14.166058 [0x00000031062170, 0x00000076a15000)
1738 15:53:14.334994
1739 15:53:14.338091 [0x00000100000000, 0x00000180400000)
1740 15:53:15.401831
1741 15:53:15.402089 R8152: Initializing
1742 15:53:15.402239
1743 15:53:15.404669 Version 6 (ocp_data = 5c30)
1744 15:53:15.408759
1745 15:53:15.408910 R8152: Done initializing
1746 15:53:15.409047
1747 15:53:15.411891 Adding net device
1748 15:53:15.412026
1749 15:53:15.415099 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 15:53:15.417997
1751 15:53:15.418177
1752 15:53:15.418318
1753 15:53:15.418716 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 15:53:15.519250 dedede: tftpboot 192.168.201.1 11224329/tftp-deploy-hdif4p9e/kernel/bzImage 11224329/tftp-deploy-hdif4p9e/kernel/cmdline 11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
1756 15:53:15.519552 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 15:53:15.519759 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 15:53:15.524041 tftpboot 192.168.201.1 11224329/tftp-deploy-hdif4p9e/kernel/bzIploy-hdif4p9e/kernel/cmdline 11224329/tftp-deploy-hdif4p9e/ramdisk/ramdisk.cpio.gz
1759 15:53:15.524229
1760 15:53:15.524373 Waiting for link
1761 15:53:15.726395
1762 15:53:15.726627 done.
1763 15:53:15.726774
1764 15:53:15.726910 MAC: 00:24:32:30:7b:c4
1765 15:53:15.727046
1766 15:53:15.729289 Sending DHCP discover... done.
1767 15:53:15.729369
1768 15:53:15.732626 Waiting for reply... done.
1769 15:53:15.732706
1770 15:53:15.736270 Sending DHCP request... done.
1771 15:53:15.736352
1772 15:53:15.759357 Waiting for reply... done.
1773 15:53:15.759523
1774 15:53:15.759591 My ip is 192.168.201.12
1775 15:53:15.759650
1776 15:53:15.762916 The DHCP server ip is 192.168.201.1
1777 15:53:15.766452
1778 15:53:15.769824 TFTP server IP predefined by user: 192.168.201.1
1779 15:53:15.769905
1780 15:53:15.776400 Bootfile predefined by user: 11224329/tftp-deploy-hdif4p9e/kernel/bzImage
1781 15:53:15.776481
1782 15:53:15.779322 Sending tftp read request... done.
1783 15:53:15.779426
1784 15:53:15.782718 Waiting for the transfer...
1785 15:53:15.782798
1786 15:53:16.344449 00000000 ################################################################
1787 15:53:16.344584
1788 15:53:16.929427 00080000 ################################################################
1789 15:53:16.929556
1790 15:53:17.520706 00100000 ################################################################
1791 15:53:17.520842
1792 15:53:18.115925 00180000 ################################################################
1793 15:53:18.116071
1794 15:53:18.689740 00200000 ################################################################
1795 15:53:18.689877
1796 15:53:19.272190 00280000 ################################################################
1797 15:53:19.272329
1798 15:53:19.865334 00300000 ################################################################
1799 15:53:19.865611
1800 15:53:20.541716 00380000 ################################################################
1801 15:53:20.542239
1802 15:53:21.152571 00400000 ################################################################
1803 15:53:21.152714
1804 15:53:21.786022 00480000 ################################################################
1805 15:53:21.786189
1806 15:53:22.512451 00500000 ################################################################
1807 15:53:22.512998
1808 15:53:23.238440 00580000 ################################################################
1809 15:53:23.238649
1810 15:53:23.926818 00600000 ################################################################
1811 15:53:23.927421
1812 15:53:24.666985 00680000 ################################################################
1813 15:53:24.667550
1814 15:53:25.387654 00700000 ################################################################
1815 15:53:25.388254
1816 15:53:25.410386 00780000 ## done.
1817 15:53:25.410897
1818 15:53:25.413332 The bootfile was 7880592 bytes long.
1819 15:53:25.413765
1820 15:53:25.416923 Sending tftp read request... done.
1821 15:53:25.417352
1822 15:53:25.420377 Waiting for the transfer...
1823 15:53:25.420811
1824 15:53:26.145050 00000000 ################################################################
1825 15:53:26.145544
1826 15:53:26.867723 00080000 ################################################################
1827 15:53:26.868258
1828 15:53:27.592935 00100000 ################################################################
1829 15:53:27.593482
1830 15:53:28.349455 00180000 ################################################################
1831 15:53:28.350002
1832 15:53:29.093055 00200000 ################################################################
1833 15:53:29.093563
1834 15:53:29.798882 00280000 ################################################################
1835 15:53:29.799419
1836 15:53:30.489625 00300000 ################################################################
1837 15:53:30.490124
1838 15:53:31.181918 00380000 ################################################################
1839 15:53:31.182472
1840 15:53:31.826188 00400000 ################################################################
1841 15:53:31.826354
1842 15:53:32.416270 00480000 ################################################################
1843 15:53:32.416415
1844 15:53:32.972607 00500000 ################################################################
1845 15:53:32.972745
1846 15:53:33.553544 00580000 ################################################################
1847 15:53:33.553713
1848 15:53:34.112598 00600000 ################################################################
1849 15:53:34.112736
1850 15:53:34.668938 00680000 ################################################################
1851 15:53:34.669070
1852 15:53:35.236698 00700000 ################################################################
1853 15:53:35.236830
1854 15:53:35.808135 00780000 ################################################################
1855 15:53:35.808271
1856 15:53:36.280645 00800000 ##################################################### done.
1857 15:53:36.280781
1858 15:53:36.284187 Sending tftp read request... done.
1859 15:53:36.284272
1860 15:53:36.287117 Waiting for the transfer...
1861 15:53:36.287199
1862 15:53:36.287264 00000000 # done.
1863 15:53:36.287326
1864 15:53:36.297032 Command line loaded dynamically from TFTP file: 11224329/tftp-deploy-hdif4p9e/kernel/cmdline
1865 15:53:36.297116
1866 15:53:36.313624 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1867 15:53:36.313713
1868 15:53:36.317186 ec_init: CrosEC protocol v3 supported (256, 256)
1869 15:53:36.326293
1870 15:53:36.329710 Shutting down all USB controllers.
1871 15:53:36.329847
1872 15:53:36.329929 Removing current net device
1873 15:53:36.330005
1874 15:53:36.332615 Finalizing coreboot
1875 15:53:36.332726
1876 15:53:36.339296 Exiting depthcharge with code 4 at timestamp: 29155690
1877 15:53:36.339455
1878 15:53:36.339553
1879 15:53:36.339643 Starting kernel ...
1880 15:53:36.339730
1881 15:53:36.339815
1882 15:53:36.340276 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
1883 15:53:36.340415 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
1884 15:53:36.340525 Setting prompt string to ['Linux version [0-9]']
1885 15:53:36.340626 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1886 15:53:36.340726 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1888 15:58:01.341343 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
1890 15:58:01.342338 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
1892 15:58:01.343109 end: 2.2 depthcharge-retry (duration 00:05:01) [common]
1895 15:58:01.344392 end: 2 depthcharge-action (duration 00:05:01) [common]
1897 15:58:01.345427 Cleaning after the job
1898 15:58:01.345868 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/ramdisk
1899 15:58:01.347352 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/kernel
1900 15:58:01.348621 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224329/tftp-deploy-hdif4p9e/modules
1901 15:58:01.348964 start: 5.1 power-off (timeout 00:00:30) [common]
1902 15:58:01.349125 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1903 15:58:01.421203 >> Command sent successfully.
1904 15:58:01.425841 Returned 0 in 0 seconds
1905 15:58:01.526872 end: 5.1 power-off (duration 00:00:00) [common]
1907 15:58:01.528581 start: 5.2 read-feedback (timeout 00:10:00) [common]
1908 15:58:01.529818 Listened to connection for namespace 'common' for up to 1s
1910 15:58:01.531071 Listened to connection for namespace 'common' for up to 1s
1911 15:58:02.529533 Finalising connection for namespace 'common'
1912 15:58:02.530161 Disconnecting from shell: Finalise
1913 15:58:02.530541
1914 15:58:02.631609 end: 5.2 read-feedback (duration 00:00:01) [common]
1915 15:58:02.632158 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224329
1916 15:58:02.684528 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224329
1917 15:58:02.684749 JobError: Your job cannot terminate cleanly.